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- -- Copyright (C) 1991-2013 Altera Corporation
- -- Your use of Altera Corporation's design tools, logic functions
- -- and other software and tools, and its AMPP partner logic
- -- functions, and any output files from any of the foregoing
- -- (including device programming or simulation files), and any
- -- associated documentation or information are expressly subject
- -- to the terms and conditions of the Altera Program License
- -- Subscription Agreement, Altera MegaCore Function License
- -- Agreement, or other applicable license agreement, including,
- -- without limitation, that your use is for the sole purpose of
- -- programming logic devices manufactured by Altera and sold by
- -- Altera or its authorized distributors. Please refer to the
- -- applicable agreement for further details.
- --
- -- This is a Quartus II output file. It is for reporting purposes only, and is
- -- not intended for use as a Quartus II input file. This file cannot be used
- -- to make Quartus II pin assignments - for instructions on how to make pin
- -- assignments, please see Quartus II help.
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- -- NC : No Connect. This pin has no internal connection to the device.
- -- DNU : Do Not Use. This pin MUST NOT be connected.
- -- VCCINT : Dedicated power pin, which MUST be connected to VCC (1.2V).
- -- VCCIO : Dedicated power pin, which MUST be connected to VCC
- -- of its bank.
- -- Bank 1: 3.3V
- -- Bank 2: 3.3V
- -- Bank 3: 3.3V
- -- Bank 4: 3.3V
- -- Bank 5: 3.3V
- -- Bank 6: 3.3V
- -- Bank 7: 3.3V
- -- Bank 8: 3.3V
- -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
- -- It can also be used to report unused dedicated pins. The connection
- -- on the board for unused dedicated pins depends on whether this will
- -- be used in a future design. One example is device migration. When
- -- using device migration, refer to the device pin-tables. If it is a
- -- GND pin in the pin table or if it will not be used in a future design
- -- for another purpose the it MUST be connected to GND. If it is an unused
- -- dedicated pin, then it can be connected to a valid signal on the board
- -- (low, high, or toggling) if that signal is required for a different
- -- revision of the design.
- -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
- -- This pin should be connected to GND. It may also be connected to a
- -- valid signal on the board (low, high, or toggling) if that signal
- -- is required for a different revision of the design.
- -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND
- -- or leave it unconnected.
- -- RESERVED : Unused I/O pin, which MUST be left unconnected.
- -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
- -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor.
- -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry.
- -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high.
- ---------------------------------------------------------------------------------
- ---------------------------------------------------------------------------------
- -- Pin directions (input, output or bidir) are based on device operating in user mode.
- ---------------------------------------------------------------------------------
- Quartus II 64-Bit Version 13.0.0 Build 156 04/24/2013 SJ Full Version
- CHIP "fpga_boot" ASSIGNED TO AN: EP4CE75F29C8
- Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
- -------------------------------------------------------------------------------------------------------------
- VCCIO8 : A2 : power : : 3.3V : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A3 : : : : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A4 : : : : 8 :
- VCCIO8 : A5 : power : : 3.3V : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A6 : : : : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A7 : : : : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A8 : : : : 8 :
- VCCIO8 : A9 : power : : 3.3V : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A10 : : : : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A11 : : : : 8 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A12 : : : : 8 :
- VCCIO8 : A13 : power : : 3.3V : 8 :
- GND+ : A14 : : : : 8 :
- GND+ : A15 : : : : 7 :
- VCCIO7 : A16 : power : : 3.3V : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A17 : : : : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A18 : : : : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A19 : : : : 7 :
- VCCIO7 : A20 : power : : 3.3V : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A21 : : : : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A22 : : : : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A23 : : : : 7 :
- VCCIO7 : A24 : power : : 3.3V : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A25 : : : : 7 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : A26 : : : : 7 :
- VCCIO7 : A27 : power : : 3.3V : 7 :
- VCCIO2 : AA1 : power : : 3.3V : 2 :
- GND : AA2 : gnd : : : :
- RESERVED_INPUT_WITH_WEAK_PULLUP : AA3 : : : : 2 :
- RESERVED_INPUT_WITH_WEAK_PULLUP : AA4 : : : : 2 :
- NC : AA5 : : : : :
- NC : AA6 : : : : :
- NC : AA7 : : : : :
- RESERVED_INPUT_WITH_WEAK_PULLUP : AA8 : : : : 3 :
- GNDA1 : AA9 : gnd : : : :
- RESERVED_INPUT_WITH_WEAK_PULLUP : AA10 : : : : 3 :
- VCCIO3 : AA11 : power : : 3.3V : 3 :
- NC : AA12 : : : : :
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