example_board_routed.v 2.2 MB

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  1. `timescale 1 ps/ 1 ps
  2. module example_board(
  3. BAUD_RATE,
  4. TEST_SINGLE,
  5. UART1_RX,
  6. so_io1,
  7. GPIO4_1,
  8. GPIO4_2,
  9. PIN_HSE,
  10. PIN_HSI,
  11. PLL_CLKIN,
  12. SPI0_CSN,
  13. SPI0_SCK,
  14. SPI0_SI_IO0,
  15. UART0_UARTRXD,
  16. UART0_UARTTXD,
  17. UART1_TX);
  18. inout BAUD_RATE;
  19. inout TEST_SINGLE;
  20. inout UART1_RX;
  21. inout so_io1;
  22. inout GPIO4_1;
  23. inout GPIO4_2;
  24. input PIN_HSE;
  25. input PIN_HSI;
  26. input PLL_CLKIN;
  27. output SPI0_CSN;
  28. output SPI0_SCK;
  29. inout SPI0_SI_IO0;
  30. input UART0_UARTRXD;
  31. output UART0_UARTTXD;
  32. inout UART1_TX;
  33. //wire gnd;
  34. //wire vcc;
  35. //wire unknown;
  36. wire AsyncReset_X56_Y8_GND;
  37. wire AsyncReset_X57_Y3_GND;
  38. wire AsyncReset_X57_Y6_GND;
  39. wire AsyncReset_X57_Y7_GND;
  40. wire AsyncReset_X57_Y8_GND;
  41. wire AsyncReset_X57_Y9_GND;
  42. wire AsyncReset_X62_Y9_GND;
  43. wire \BAUD_RATE~input_o ;
  44. wire \GPIO4_1~input_o ;
  45. wire \GPIO4_2~input_o ;
  46. wire \PIN_HSE~input_o ;
  47. wire \PIN_HSI~input_o ;
  48. wire \PLL_CLKIN~input_o ;
  49. wire \PLL_ENABLE~clkctrl_outclk ;
  50. wire \PLL_ENABLE~clkctrl_outclk__AsyncReset_X46_Y1_SIG ;
  51. wire \PLL_ENABLE~combout ;
  52. wire \PLL_LOCK~combout ;
  53. wire \SPI0_SI_IO0~input_o ;
  54. wire SyncLoad_X56_Y4_VCC;
  55. wire SyncLoad_X56_Y8_VCC;
  56. wire SyncLoad_X57_Y11_VCC;
  57. wire SyncLoad_X57_Y3_VCC;
  58. wire SyncLoad_X57_Y4_VCC;
  59. wire SyncLoad_X57_Y6_VCC;
  60. wire SyncLoad_X57_Y8_VCC;
  61. wire SyncLoad_X57_Y9_VCC;
  62. wire SyncLoad_X58_Y10_GND;
  63. wire SyncLoad_X58_Y11_GND;
  64. wire SyncLoad_X58_Y12_VCC;
  65. wire SyncLoad_X58_Y4_VCC;
  66. wire SyncLoad_X58_Y6_GND;
  67. wire SyncLoad_X58_Y7_GND;
  68. wire SyncLoad_X58_Y9_VCC;
  69. wire SyncLoad_X59_Y10_VCC;
  70. wire SyncLoad_X59_Y11_VCC;
  71. wire SyncLoad_X59_Y12_VCC;
  72. wire SyncLoad_X59_Y3_GND;
  73. wire SyncLoad_X59_Y4_VCC;
  74. wire SyncLoad_X59_Y5_GND;
  75. wire SyncLoad_X59_Y6_VCC;
  76. wire SyncLoad_X59_Y7_VCC;
  77. wire SyncLoad_X60_Y10_VCC;
  78. wire SyncLoad_X60_Y11_VCC;
  79. wire SyncLoad_X60_Y3_VCC;
  80. wire SyncLoad_X60_Y6_VCC;
  81. wire SyncLoad_X60_Y7_VCC;
  82. wire SyncLoad_X60_Y8_VCC;
  83. wire SyncLoad_X60_Y9_VCC;
  84. wire SyncLoad_X61_Y10_GND;
  85. wire SyncLoad_X61_Y6_VCC;
  86. wire SyncLoad_X61_Y9_VCC;
  87. wire SyncLoad_X62_Y10_GND;
  88. wire SyncLoad_X62_Y3_VCC;
  89. wire SyncLoad_X62_Y5_GND;
  90. wire SyncLoad_X62_Y6_GND;
  91. wire SyncReset_X56_Y4_GND;
  92. wire SyncReset_X56_Y8_GND;
  93. wire SyncReset_X57_Y11_GND;
  94. wire SyncReset_X57_Y3_GND;
  95. wire SyncReset_X57_Y4_GND;
  96. wire SyncReset_X57_Y6_GND;
  97. wire SyncReset_X57_Y8_GND;
  98. wire SyncReset_X57_Y9_GND;
  99. wire SyncReset_X58_Y12_GND;
  100. wire SyncReset_X58_Y4_GND;
  101. wire SyncReset_X58_Y9_GND;
  102. wire SyncReset_X59_Y10_GND;
  103. wire SyncReset_X59_Y11_GND;
  104. wire SyncReset_X59_Y12_GND;
  105. wire SyncReset_X59_Y4_GND;
  106. wire SyncReset_X59_Y6_GND;
  107. wire SyncReset_X59_Y7_GND;
  108. wire SyncReset_X60_Y10_GND;
  109. wire SyncReset_X60_Y11_GND;
  110. wire SyncReset_X60_Y3_GND;
  111. wire SyncReset_X60_Y6_GND;
  112. wire SyncReset_X60_Y7_GND;
  113. wire SyncReset_X60_Y8_GND;
  114. wire SyncReset_X60_Y9_GND;
  115. wire SyncReset_X61_Y6_GND;
  116. wire SyncReset_X61_Y9_GND;
  117. wire SyncReset_X62_Y3_GND;
  118. wire \TEST_SINGLE~input_o ;
  119. wire \UART0_UARTRXD~input_o ;
  120. wire \UART1_RX~input_o ;
  121. wire \UART1_TX~input_o ;
  122. wire \auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp ;
  123. wire \auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp_X46_Y1_SIG_VCC ;
  124. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ;
  125. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X54_Y4_SIG_VCC ;
  126. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y4_SIG_VCC ;
  127. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ;
  128. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y3_SIG_VCC ;
  129. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y6_SIG_VCC ;
  130. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y7_SIG_VCC ;
  131. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ;
  132. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ;
  133. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ;
  134. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ;
  135. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ;
  136. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ;
  137. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ;
  138. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y5_SIG_VCC ;
  139. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y10_SIG_VCC ;
  140. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ;
  141. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ;
  142. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ;
  143. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ;
  144. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y9_SIG_VCC ;
  145. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ;
  146. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ;
  147. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ;
  148. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ;
  149. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ;
  150. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y12_SIG_SIG ;
  151. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ;
  152. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ;
  153. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ;
  154. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ;
  155. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y12_SIG_SIG ;
  156. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ;
  157. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ;
  158. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ;
  159. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ;
  160. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X61_Y10_SIG_SIG ;
  161. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y11_SIG_SIG ;
  162. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y3_SIG_SIG ;
  163. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y9_SIG_SIG ;
  164. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y6_SIG_SIG ;
  165. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y9_SIG_SIG ;
  166. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X56_Y10_SIG_SIG ;
  167. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ;
  168. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ;
  169. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y7_SIG_SIG ;
  170. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y8_SIG_SIG ;
  171. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ;
  172. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X60_Y11_SIG_SIG ;
  173. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X61_Y8_SIG_SIG ;
  174. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|dac_en~2_combout_X61_Y9_SIG_SIG ;
  175. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ;
  176. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ;
  177. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ;
  178. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ;
  179. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ;
  180. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ;
  181. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y9_SIG_SIG ;
  182. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ;
  183. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y12_SIG_SIG ;
  184. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y9_SIG_SIG ;
  185. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X58_Y8_SIG_SIG ;
  186. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ;
  187. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ;
  188. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X59_Y6_SIG_SIG ;
  189. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y6_SIG_SIG ;
  190. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ;
  191. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ;
  192. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y4_SIG_SIG ;
  193. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y6_SIG_SIG ;
  194. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ;
  195. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ;
  196. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ;
  197. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ;
  198. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|wave_type[1]~0_combout_X58_Y8_SIG_SIG ;
  199. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ;
  200. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X59_Y4_SIG_SIG ;
  201. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ;
  202. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ;
  203. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ;
  204. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ;
  205. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ;
  206. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ;
  207. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ;
  208. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ;
  209. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ;
  210. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ;
  211. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X61_Y5_SIG_SIG ;
  212. tri1 devclrn;
  213. tri1 devoe;
  214. tri1 devpor;
  215. wire \gclksw_inst|gclk_switch__alta_gclksw__clkout ;
  216. wire [7:0] gpio0_io_in;
  217. //wire gpio0_io_in[0];
  218. //wire gpio0_io_in[1];
  219. //wire gpio0_io_in[2];
  220. //wire gpio0_io_in[3];
  221. //wire gpio0_io_in[4];
  222. //wire gpio0_io_in[5];
  223. //wire gpio0_io_in[6];
  224. //wire gpio0_io_in[7];
  225. wire [7:0] gpio0_io_out_data;
  226. //wire gpio0_io_out_data[0];
  227. //wire gpio0_io_out_data[1];
  228. //wire gpio0_io_out_data[2];
  229. //wire gpio0_io_out_data[3];
  230. //wire gpio0_io_out_data[4];
  231. //wire gpio0_io_out_data[5];
  232. //wire gpio0_io_out_data[6];
  233. //wire gpio0_io_out_data[7];
  234. wire [7:0] gpio0_io_out_en;
  235. //wire gpio0_io_out_en[0];
  236. //wire gpio0_io_out_en[1];
  237. //wire gpio0_io_out_en[2];
  238. //wire gpio0_io_out_en[3];
  239. //wire gpio0_io_out_en[4];
  240. //wire gpio0_io_out_en[5];
  241. //wire gpio0_io_out_en[6];
  242. //wire gpio0_io_out_en[7];
  243. wire [7:0] gpio4_io_in;
  244. //wire gpio4_io_in[0];
  245. //wire gpio4_io_in[1];
  246. //wire gpio4_io_in[2];
  247. //wire gpio4_io_in[3];
  248. //wire gpio4_io_in[4];
  249. //wire gpio4_io_in[5];
  250. //wire gpio4_io_in[6];
  251. //wire gpio4_io_in[7];
  252. wire [7:0] gpio4_io_out_data;
  253. //wire gpio4_io_out_data[0];
  254. //wire gpio4_io_out_data[1];
  255. //wire gpio4_io_out_data[2];
  256. //wire gpio4_io_out_data[3];
  257. //wire gpio4_io_out_data[4];
  258. //wire gpio4_io_out_data[5];
  259. //wire gpio4_io_out_data[6];
  260. //wire gpio4_io_out_data[7];
  261. wire [7:0] gpio4_io_out_en;
  262. //wire gpio4_io_out_en[0];
  263. //wire gpio4_io_out_en[1];
  264. //wire gpio4_io_out_en[2];
  265. //wire gpio4_io_out_en[3];
  266. //wire gpio4_io_out_en[4];
  267. //wire gpio4_io_out_en[5];
  268. //wire gpio4_io_out_en[6];
  269. //wire gpio4_io_out_en[7];
  270. wire [7:0] gpio6_io_in;
  271. //wire gpio6_io_in[0];
  272. //wire gpio6_io_in[1];
  273. //wire gpio6_io_in[2];
  274. //wire gpio6_io_in[3];
  275. //wire gpio6_io_in[4];
  276. //wire gpio6_io_in[5];
  277. //wire gpio6_io_in[6];
  278. //wire gpio6_io_in[7];
  279. wire [7:0] gpio7_io_out_data;
  280. //wire gpio7_io_out_data[0];
  281. //wire gpio7_io_out_data[1];
  282. //wire gpio7_io_out_data[2];
  283. //wire gpio7_io_out_data[3];
  284. //wire gpio7_io_out_data[4];
  285. //wire gpio7_io_out_data[5];
  286. //wire gpio7_io_out_data[6];
  287. //wire gpio7_io_out_data[7];
  288. wire [7:0] gpio7_io_out_en;
  289. //wire gpio7_io_out_en[0];
  290. //wire gpio7_io_out_en[1];
  291. //wire gpio7_io_out_en[2];
  292. //wire gpio7_io_out_en[3];
  293. //wire gpio7_io_out_en[4];
  294. //wire gpio7_io_out_en[5];
  295. //wire gpio7_io_out_en[6];
  296. //wire gpio7_io_out_en[7];
  297. wire [7:0] gpio8_io_out_data;
  298. //wire gpio8_io_out_data[0];
  299. //wire gpio8_io_out_data[1];
  300. //wire gpio8_io_out_data[2];
  301. //wire gpio8_io_out_data[3];
  302. //wire gpio8_io_out_data[4];
  303. //wire gpio8_io_out_data[5];
  304. //wire gpio8_io_out_data[6];
  305. //wire gpio8_io_out_data[7];
  306. wire [7:0] gpio8_io_out_en;
  307. //wire gpio8_io_out_en[0];
  308. //wire gpio8_io_out_en[1];
  309. //wire gpio8_io_out_en[2];
  310. //wire gpio8_io_out_en[3];
  311. //wire gpio8_io_out_en[4];
  312. //wire gpio8_io_out_en[5];
  313. //wire gpio8_io_out_en[6];
  314. //wire gpio8_io_out_en[7];
  315. wire hbi_272_0_9cb2c0024f9919c5_bp;
  316. wire hbi_272_1_9cb2c0024f9919c5_bp;
  317. wire \macro_inst|ShiftLeft0~0_combout ;
  318. wire \macro_inst|ShiftLeft0~1_combout ;
  319. wire \macro_inst|ShiftLeft0~2_combout ;
  320. wire \macro_inst|ShiftLeft0~3_combout ;
  321. wire \macro_inst|ahb2apb_inst|Selector0~0_combout ;
  322. wire \macro_inst|ahb2apb_inst|Selector25~0_combout ;
  323. wire \macro_inst|ahb2apb_inst|always0~0_combout ;
  324. wire \macro_inst|ahb2apb_inst|always2~0_combout ;
  325. wire \macro_inst|ahb2apb_inst|apbState.apbIdle~q ;
  326. wire \macro_inst|ahb2apb_inst|apbState.apbSetup~q ;
  327. wire \macro_inst|ahb2apb_inst|comb~0_combout ;
  328. wire [15:0] \macro_inst|ahb2apb_inst|haddr ;
  329. //wire \macro_inst|ahb2apb_inst|haddr [0];
  330. wire \macro_inst|ahb2apb_inst|haddr[0]__feeder__LutOut ;
  331. //wire \macro_inst|ahb2apb_inst|haddr [10];
  332. wire \macro_inst|ahb2apb_inst|haddr[10]__feeder__LutOut ;
  333. //wire \macro_inst|ahb2apb_inst|haddr [11];
  334. wire \macro_inst|ahb2apb_inst|haddr[11]__feeder__LutOut ;
  335. //wire \macro_inst|ahb2apb_inst|haddr [12];
  336. wire \macro_inst|ahb2apb_inst|haddr[12]__feeder__LutOut ;
  337. //wire \macro_inst|ahb2apb_inst|haddr [13];
  338. wire \macro_inst|ahb2apb_inst|haddr[13]__feeder__LutOut ;
  339. //wire \macro_inst|ahb2apb_inst|haddr [14];
  340. //wire \macro_inst|ahb2apb_inst|haddr [15];
  341. wire \macro_inst|ahb2apb_inst|haddr[15]__feeder__LutOut ;
  342. //wire \macro_inst|ahb2apb_inst|haddr [1];
  343. wire \macro_inst|ahb2apb_inst|haddr[1]__feeder__LutOut ;
  344. //wire \macro_inst|ahb2apb_inst|haddr [2];
  345. //wire \macro_inst|ahb2apb_inst|haddr [3];
  346. //wire \macro_inst|ahb2apb_inst|haddr [4];
  347. //wire \macro_inst|ahb2apb_inst|haddr [5];
  348. //wire \macro_inst|ahb2apb_inst|haddr [6];
  349. wire \macro_inst|ahb2apb_inst|haddr[6]__feeder__LutOut ;
  350. //wire \macro_inst|ahb2apb_inst|haddr [7];
  351. wire \macro_inst|ahb2apb_inst|haddr[7]__feeder__LutOut ;
  352. //wire \macro_inst|ahb2apb_inst|haddr [8];
  353. wire \macro_inst|ahb2apb_inst|haddr[8]__feeder__LutOut ;
  354. //wire \macro_inst|ahb2apb_inst|haddr [9];
  355. wire \macro_inst|ahb2apb_inst|haddr[9]__feeder__LutOut ;
  356. wire \macro_inst|ahb2apb_inst|hdone~0_combout ;
  357. wire \macro_inst|ahb2apb_inst|hdone~q ;
  358. wire \macro_inst|ahb2apb_inst|hreadyout~0_combout ;
  359. wire \macro_inst|ahb2apb_inst|hreadyout~q ;
  360. wire \macro_inst|ahb2apb_inst|hwrite~q ;
  361. wire [15:0] \macro_inst|ahb2apb_inst|paddr ;
  362. //wire \macro_inst|ahb2apb_inst|paddr [0];
  363. //wire \macro_inst|ahb2apb_inst|paddr [10];
  364. //wire \macro_inst|ahb2apb_inst|paddr [11];
  365. //wire \macro_inst|ahb2apb_inst|paddr [12];
  366. wire \macro_inst|ahb2apb_inst|paddr[12]~feeder_combout ;
  367. //wire \macro_inst|ahb2apb_inst|paddr [13];
  368. //wire \macro_inst|ahb2apb_inst|paddr [14];
  369. wire \macro_inst|ahb2apb_inst|paddr[14]~feeder_combout ;
  370. //wire \macro_inst|ahb2apb_inst|paddr [15];
  371. wire \macro_inst|ahb2apb_inst|paddr[15]~feeder_combout ;
  372. //wire \macro_inst|ahb2apb_inst|paddr [1];
  373. wire \macro_inst|ahb2apb_inst|paddr[1]~feeder_combout ;
  374. //wire \macro_inst|ahb2apb_inst|paddr [2];
  375. wire \macro_inst|ahb2apb_inst|paddr[2]~feeder_combout ;
  376. //wire \macro_inst|ahb2apb_inst|paddr [3];
  377. //wire \macro_inst|ahb2apb_inst|paddr [4];
  378. //wire \macro_inst|ahb2apb_inst|paddr [5];
  379. //wire \macro_inst|ahb2apb_inst|paddr [6];
  380. wire \macro_inst|ahb2apb_inst|paddr[6]~feeder_combout ;
  381. //wire \macro_inst|ahb2apb_inst|paddr [7];
  382. wire \macro_inst|ahb2apb_inst|paddr[7]~0_combout ;
  383. //wire \macro_inst|ahb2apb_inst|paddr [8];
  384. wire \macro_inst|ahb2apb_inst|paddr[8]~feeder_combout ;
  385. //wire \macro_inst|ahb2apb_inst|paddr [9];
  386. wire \macro_inst|ahb2apb_inst|pdone~0_combout ;
  387. wire \macro_inst|ahb2apb_inst|pdone~q ;
  388. wire \macro_inst|ahb2apb_inst|penable~q ;
  389. wire [31:0] \macro_inst|ahb2apb_inst|prdata ;
  390. //wire \macro_inst|ahb2apb_inst|prdata [0];
  391. wire \macro_inst|ahb2apb_inst|prdata[0]~0_combout ;
  392. //wire \macro_inst|ahb2apb_inst|prdata [10];
  393. //wire \macro_inst|ahb2apb_inst|prdata [11];
  394. //wire \macro_inst|ahb2apb_inst|prdata [12];
  395. //wire \macro_inst|ahb2apb_inst|prdata [13];
  396. //wire \macro_inst|ahb2apb_inst|prdata [14];
  397. wire \macro_inst|ahb2apb_inst|prdata[14]~12_combout ;
  398. //wire \macro_inst|ahb2apb_inst|prdata [15];
  399. //wire \macro_inst|ahb2apb_inst|prdata [16];
  400. //wire \macro_inst|ahb2apb_inst|prdata [17];
  401. //wire \macro_inst|ahb2apb_inst|prdata [18];
  402. //wire \macro_inst|ahb2apb_inst|prdata [19];
  403. //wire \macro_inst|ahb2apb_inst|prdata [1];
  404. wire \macro_inst|ahb2apb_inst|prdata[1]~1_combout ;
  405. //wire \macro_inst|ahb2apb_inst|prdata [20];
  406. //wire \macro_inst|ahb2apb_inst|prdata [21];
  407. //wire \macro_inst|ahb2apb_inst|prdata [22];
  408. //wire \macro_inst|ahb2apb_inst|prdata [23];
  409. //wire \macro_inst|ahb2apb_inst|prdata [24];
  410. //wire \macro_inst|ahb2apb_inst|prdata [25];
  411. //wire \macro_inst|ahb2apb_inst|prdata [26];
  412. //wire \macro_inst|ahb2apb_inst|prdata [27];
  413. //wire \macro_inst|ahb2apb_inst|prdata [28];
  414. //wire \macro_inst|ahb2apb_inst|prdata [29];
  415. wire \macro_inst|ahb2apb_inst|prdata[29]~13_combout ;
  416. //wire \macro_inst|ahb2apb_inst|prdata [2];
  417. wire \macro_inst|ahb2apb_inst|prdata[2]~2_combout ;
  418. //wire \macro_inst|ahb2apb_inst|prdata [30];
  419. //wire \macro_inst|ahb2apb_inst|prdata [31];
  420. //wire \macro_inst|ahb2apb_inst|prdata [3];
  421. wire \macro_inst|ahb2apb_inst|prdata[3]~3_combout ;
  422. //wire \macro_inst|ahb2apb_inst|prdata [4];
  423. wire \macro_inst|ahb2apb_inst|prdata[4]~4_combout ;
  424. //wire \macro_inst|ahb2apb_inst|prdata [5];
  425. wire \macro_inst|ahb2apb_inst|prdata[5]~5_combout ;
  426. //wire \macro_inst|ahb2apb_inst|prdata [6];
  427. wire \macro_inst|ahb2apb_inst|prdata[6]~6_combout ;
  428. //wire \macro_inst|ahb2apb_inst|prdata [7];
  429. wire \macro_inst|ahb2apb_inst|prdata[7]~7_combout ;
  430. //wire \macro_inst|ahb2apb_inst|prdata [8];
  431. wire \macro_inst|ahb2apb_inst|prdata[8]~8_combout ;
  432. //wire \macro_inst|ahb2apb_inst|prdata [9];
  433. wire \macro_inst|ahb2apb_inst|prdata[9]~10_combout ;
  434. wire \macro_inst|ahb2apb_inst|prdata[9]~11_combout ;
  435. wire \macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ;
  436. wire \macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ;
  437. wire \macro_inst|ahb2apb_inst|prdata[9]~9_combout ;
  438. wire \macro_inst|ahb2apb_inst|psel~0_combout ;
  439. wire \macro_inst|ahb2apb_inst|psel~q ;
  440. wire \macro_inst|ahb2apb_inst|pvalid~q ;
  441. wire \macro_inst|ahb2apb_inst|pwrite~q ;
  442. wire \macro_inst|always0~0_combout ;
  443. wire \macro_inst|apb_adc0_inst|Equal0~0_combout ;
  444. wire \macro_inst|apb_adc0_inst|Equal0~1_combout ;
  445. wire \macro_inst|apb_adc0_inst|Equal0~2_combout ;
  446. wire \macro_inst|apb_adc0_inst|Equal0~3_combout ;
  447. wire \macro_inst|apb_adc0_inst|Equal0~4_combout ;
  448. wire \macro_inst|apb_adc0_inst|Equal0~5_combout ;
  449. wire \macro_inst|apb_adc0_inst|Equal0~6_combout ;
  450. wire \macro_inst|apb_adc0_inst|adc_eoc_out~combout ;
  451. wire \macro_inst|apb_adc0_inst|adc_inst.db[0] ;
  452. wire \macro_inst|apb_adc0_inst|adc_inst.db[10] ;
  453. wire \macro_inst|apb_adc0_inst|adc_inst.db[11] ;
  454. wire \macro_inst|apb_adc0_inst|adc_inst.db[1] ;
  455. wire \macro_inst|apb_adc0_inst|adc_inst.db[2] ;
  456. wire \macro_inst|apb_adc0_inst|adc_inst.db[3] ;
  457. wire \macro_inst|apb_adc0_inst|adc_inst.db[4] ;
  458. wire \macro_inst|apb_adc0_inst|adc_inst.db[5] ;
  459. wire \macro_inst|apb_adc0_inst|adc_inst.db[6] ;
  460. wire \macro_inst|apb_adc0_inst|adc_inst.db[7] ;
  461. wire \macro_inst|apb_adc0_inst|adc_inst.db[8] ;
  462. wire \macro_inst|apb_adc0_inst|adc_inst.db[9] ;
  463. wire \macro_inst|apb_adc0_inst|adc_inst.eoc ;
  464. wire \macro_inst|apb_adc0_inst|always1~0_combout ;
  465. wire [11:0] \macro_inst|apb_adc0_inst|apb_db ;
  466. //wire \macro_inst|apb_adc0_inst|apb_db [0];
  467. wire \macro_inst|apb_adc0_inst|apb_db[0]__feeder__LutOut ;
  468. //wire \macro_inst|apb_adc0_inst|apb_db [10];
  469. //wire \macro_inst|apb_adc0_inst|apb_db [11];
  470. //wire \macro_inst|apb_adc0_inst|apb_db [1];
  471. //wire \macro_inst|apb_adc0_inst|apb_db [2];
  472. wire \macro_inst|apb_adc0_inst|apb_db[2]__feeder__LutOut ;
  473. //wire \macro_inst|apb_adc0_inst|apb_db [3];
  474. //wire \macro_inst|apb_adc0_inst|apb_db [4];
  475. //wire \macro_inst|apb_adc0_inst|apb_db [5];
  476. //wire \macro_inst|apb_adc0_inst|apb_db [6];
  477. //wire \macro_inst|apb_adc0_inst|apb_db [7];
  478. //wire \macro_inst|apb_adc0_inst|apb_db [8];
  479. //wire \macro_inst|apb_adc0_inst|apb_db [9];
  480. wire \macro_inst|apb_adc0_inst|apb_eoc~q ;
  481. wire [15:0] \macro_inst|apb_adc0_inst|sclk_counter ;
  482. //wire \macro_inst|apb_adc0_inst|sclk_counter [0];
  483. wire \macro_inst|apb_adc0_inst|sclk_counter[0]~16_combout ;
  484. wire \macro_inst|apb_adc0_inst|sclk_counter[0]~17 ;
  485. //wire \macro_inst|apb_adc0_inst|sclk_counter [10];
  486. wire \macro_inst|apb_adc0_inst|sclk_counter[10]~37_combout ;
  487. wire \macro_inst|apb_adc0_inst|sclk_counter[10]~38 ;
  488. //wire \macro_inst|apb_adc0_inst|sclk_counter [11];
  489. wire \macro_inst|apb_adc0_inst|sclk_counter[11]~39_combout ;
  490. wire \macro_inst|apb_adc0_inst|sclk_counter[11]~40 ;
  491. //wire \macro_inst|apb_adc0_inst|sclk_counter [12];
  492. wire \macro_inst|apb_adc0_inst|sclk_counter[12]~41_combout ;
  493. wire \macro_inst|apb_adc0_inst|sclk_counter[12]~42 ;
  494. //wire \macro_inst|apb_adc0_inst|sclk_counter [13];
  495. wire \macro_inst|apb_adc0_inst|sclk_counter[13]~43_combout ;
  496. wire \macro_inst|apb_adc0_inst|sclk_counter[13]~44 ;
  497. //wire \macro_inst|apb_adc0_inst|sclk_counter [14];
  498. wire \macro_inst|apb_adc0_inst|sclk_counter[14]~45_combout ;
  499. wire \macro_inst|apb_adc0_inst|sclk_counter[14]~46 ;
  500. //wire \macro_inst|apb_adc0_inst|sclk_counter [15];
  501. wire \macro_inst|apb_adc0_inst|sclk_counter[15]~47_combout ;
  502. //wire \macro_inst|apb_adc0_inst|sclk_counter [1];
  503. wire \macro_inst|apb_adc0_inst|sclk_counter[1]~19_combout ;
  504. wire \macro_inst|apb_adc0_inst|sclk_counter[1]~20 ;
  505. //wire \macro_inst|apb_adc0_inst|sclk_counter [2];
  506. wire \macro_inst|apb_adc0_inst|sclk_counter[2]~21_combout ;
  507. wire \macro_inst|apb_adc0_inst|sclk_counter[2]~22 ;
  508. //wire \macro_inst|apb_adc0_inst|sclk_counter [3];
  509. wire \macro_inst|apb_adc0_inst|sclk_counter[3]~23_combout ;
  510. wire \macro_inst|apb_adc0_inst|sclk_counter[3]~24 ;
  511. //wire \macro_inst|apb_adc0_inst|sclk_counter [4];
  512. wire \macro_inst|apb_adc0_inst|sclk_counter[4]~25_combout ;
  513. wire \macro_inst|apb_adc0_inst|sclk_counter[4]~26 ;
  514. //wire \macro_inst|apb_adc0_inst|sclk_counter [5];
  515. wire \macro_inst|apb_adc0_inst|sclk_counter[5]~27_combout ;
  516. wire \macro_inst|apb_adc0_inst|sclk_counter[5]~28 ;
  517. //wire \macro_inst|apb_adc0_inst|sclk_counter [6];
  518. wire \macro_inst|apb_adc0_inst|sclk_counter[6]~29_combout ;
  519. wire \macro_inst|apb_adc0_inst|sclk_counter[6]~30 ;
  520. //wire \macro_inst|apb_adc0_inst|sclk_counter [7];
  521. wire \macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout ;
  522. wire \macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ;
  523. wire \macro_inst|apb_adc0_inst|sclk_counter[7]~31_combout ;
  524. wire \macro_inst|apb_adc0_inst|sclk_counter[7]~32 ;
  525. //wire \macro_inst|apb_adc0_inst|sclk_counter [8];
  526. wire \macro_inst|apb_adc0_inst|sclk_counter[8]~33_combout ;
  527. wire \macro_inst|apb_adc0_inst|sclk_counter[8]~34 ;
  528. //wire \macro_inst|apb_adc0_inst|sclk_counter [9];
  529. wire \macro_inst|apb_adc0_inst|sclk_counter[9]~35_combout ;
  530. wire \macro_inst|apb_adc0_inst|sclk_counter[9]~36 ;
  531. wire \macro_inst|apb_adc0_inst|sclk~0_combout ;
  532. wire \macro_inst|apb_adc0_inst|sclk~q ;
  533. wire \macro_inst|apb_dac0_inst|Add2~20_combout ;
  534. wire \macro_inst|apb_dac0_inst|Add2~21_combout ;
  535. wire \macro_inst|apb_dac0_inst|Add2~22 ;
  536. wire \macro_inst|apb_dac0_inst|Add2~23_combout ;
  537. wire \macro_inst|apb_dac0_inst|Add2~24_combout ;
  538. wire \macro_inst|apb_dac0_inst|Add2~25 ;
  539. wire \macro_inst|apb_dac0_inst|Add2~26_combout ;
  540. wire \macro_inst|apb_dac0_inst|Add2~27_combout ;
  541. wire \macro_inst|apb_dac0_inst|Add2~28 ;
  542. wire \macro_inst|apb_dac0_inst|Add2~29_combout ;
  543. wire \macro_inst|apb_dac0_inst|Add2~30_combout ;
  544. wire \macro_inst|apb_dac0_inst|Add2~31 ;
  545. wire \macro_inst|apb_dac0_inst|Add2~32_combout ;
  546. wire \macro_inst|apb_dac0_inst|Add2~33_combout ;
  547. wire \macro_inst|apb_dac0_inst|Add2~34 ;
  548. wire \macro_inst|apb_dac0_inst|Add2~35_combout ;
  549. wire \macro_inst|apb_dac0_inst|Add2~36_combout ;
  550. wire \macro_inst|apb_dac0_inst|Add2~37 ;
  551. wire \macro_inst|apb_dac0_inst|Add2~38_combout ;
  552. wire \macro_inst|apb_dac0_inst|Add2~39_combout ;
  553. wire \macro_inst|apb_dac0_inst|Add2~40 ;
  554. wire \macro_inst|apb_dac0_inst|Add2~41_combout ;
  555. wire \macro_inst|apb_dac0_inst|Add2~42_combout ;
  556. wire \macro_inst|apb_dac0_inst|Add2~43 ;
  557. wire \macro_inst|apb_dac0_inst|Add2~44_combout ;
  558. wire \macro_inst|apb_dac0_inst|Add2~45_combout ;
  559. wire \macro_inst|apb_dac0_inst|Add2~46 ;
  560. wire \macro_inst|apb_dac0_inst|Add2~47_combout ;
  561. wire \macro_inst|apb_dac0_inst|Add2~48_combout ;
  562. wire \macro_inst|apb_dac0_inst|Add2~50_combout ;
  563. wire \macro_inst|apb_dac0_inst|Add2~51_combout ;
  564. wire \macro_inst|apb_dac0_inst|Add2~52_combout ;
  565. wire \macro_inst|apb_dac0_inst|Add2~53_combout ;
  566. wire \macro_inst|apb_dac0_inst|Add2~54_combout ;
  567. wire \macro_inst|apb_dac0_inst|Add2~55_combout ;
  568. wire \macro_inst|apb_dac0_inst|Add2~56_combout ;
  569. wire \macro_inst|apb_dac0_inst|Add2~57_combout ;
  570. wire \macro_inst|apb_dac0_inst|Add2~58_combout ;
  571. wire \macro_inst|apb_dac0_inst|Add2~59_combout ;
  572. wire \macro_inst|apb_dac0_inst|Add3~0_combout ;
  573. wire \macro_inst|apb_dac0_inst|Add3~1 ;
  574. wire \macro_inst|apb_dac0_inst|Add3~10_combout ;
  575. wire \macro_inst|apb_dac0_inst|Add3~11 ;
  576. wire \macro_inst|apb_dac0_inst|Add3~12_combout ;
  577. wire \macro_inst|apb_dac0_inst|Add3~13 ;
  578. wire \macro_inst|apb_dac0_inst|Add3~14_combout ;
  579. wire \macro_inst|apb_dac0_inst|Add3~15 ;
  580. wire \macro_inst|apb_dac0_inst|Add3~16_combout ;
  581. wire \macro_inst|apb_dac0_inst|Add3~17 ;
  582. wire \macro_inst|apb_dac0_inst|Add3~18_combout ;
  583. wire \macro_inst|apb_dac0_inst|Add3~2_combout ;
  584. wire \macro_inst|apb_dac0_inst|Add3~3 ;
  585. wire \macro_inst|apb_dac0_inst|Add3~4_combout ;
  586. wire \macro_inst|apb_dac0_inst|Add3~5 ;
  587. wire \macro_inst|apb_dac0_inst|Add3~6_combout ;
  588. wire \macro_inst|apb_dac0_inst|Add3~7 ;
  589. wire \macro_inst|apb_dac0_inst|Add3~8_combout ;
  590. wire \macro_inst|apb_dac0_inst|Add3~9 ;
  591. wire \macro_inst|apb_dac0_inst|Add4~0_combout ;
  592. wire \macro_inst|apb_dac0_inst|Add4~1 ;
  593. wire \macro_inst|apb_dac0_inst|Add4~10_combout ;
  594. wire \macro_inst|apb_dac0_inst|Add4~11 ;
  595. wire \macro_inst|apb_dac0_inst|Add4~12_combout ;
  596. wire \macro_inst|apb_dac0_inst|Add4~13 ;
  597. wire \macro_inst|apb_dac0_inst|Add4~14_combout ;
  598. wire \macro_inst|apb_dac0_inst|Add4~15 ;
  599. wire \macro_inst|apb_dac0_inst|Add4~16_combout ;
  600. wire \macro_inst|apb_dac0_inst|Add4~17 ;
  601. wire \macro_inst|apb_dac0_inst|Add4~18_combout ;
  602. wire \macro_inst|apb_dac0_inst|Add4~2_combout ;
  603. wire \macro_inst|apb_dac0_inst|Add4~3 ;
  604. wire \macro_inst|apb_dac0_inst|Add4~4_combout ;
  605. wire \macro_inst|apb_dac0_inst|Add4~5 ;
  606. wire \macro_inst|apb_dac0_inst|Add4~6_combout ;
  607. wire \macro_inst|apb_dac0_inst|Add4~7 ;
  608. wire \macro_inst|apb_dac0_inst|Add4~8_combout ;
  609. wire \macro_inst|apb_dac0_inst|Add4~9 ;
  610. wire \macro_inst|apb_dac0_inst|Add5~0_combout ;
  611. wire \macro_inst|apb_dac0_inst|Add5~1 ;
  612. wire \macro_inst|apb_dac0_inst|Add5~10_combout ;
  613. wire \macro_inst|apb_dac0_inst|Add5~11 ;
  614. wire \macro_inst|apb_dac0_inst|Add5~12_combout ;
  615. wire \macro_inst|apb_dac0_inst|Add5~13 ;
  616. wire \macro_inst|apb_dac0_inst|Add5~14_combout ;
  617. wire \macro_inst|apb_dac0_inst|Add5~15 ;
  618. wire \macro_inst|apb_dac0_inst|Add5~16_combout ;
  619. wire \macro_inst|apb_dac0_inst|Add5~17 ;
  620. wire \macro_inst|apb_dac0_inst|Add5~18_combout ;
  621. wire \macro_inst|apb_dac0_inst|Add5~2_combout ;
  622. wire \macro_inst|apb_dac0_inst|Add5~3 ;
  623. wire \macro_inst|apb_dac0_inst|Add5~4_combout ;
  624. wire \macro_inst|apb_dac0_inst|Add5~5 ;
  625. wire \macro_inst|apb_dac0_inst|Add5~6_combout ;
  626. wire \macro_inst|apb_dac0_inst|Add5~7 ;
  627. wire \macro_inst|apb_dac0_inst|Add5~8_combout ;
  628. wire \macro_inst|apb_dac0_inst|Add5~9 ;
  629. wire \macro_inst|apb_dac0_inst|LessThan0~11_cout ;
  630. wire \macro_inst|apb_dac0_inst|LessThan0~13_cout ;
  631. wire \macro_inst|apb_dac0_inst|LessThan0~15_cout ;
  632. wire \macro_inst|apb_dac0_inst|LessThan0~17_cout ;
  633. wire \macro_inst|apb_dac0_inst|LessThan0~18_combout ;
  634. wire \macro_inst|apb_dac0_inst|LessThan0~1_cout ;
  635. wire \macro_inst|apb_dac0_inst|LessThan0~3_cout ;
  636. wire \macro_inst|apb_dac0_inst|LessThan0~5_cout ;
  637. wire \macro_inst|apb_dac0_inst|LessThan0~7_cout ;
  638. wire \macro_inst|apb_dac0_inst|LessThan0~9_cout ;
  639. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ;
  640. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ;
  641. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ;
  642. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ;
  643. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ;
  644. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ;
  645. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ;
  646. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ;
  647. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ;
  648. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ;
  649. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ;
  650. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ;
  651. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ;
  652. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ;
  653. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ;
  654. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ;
  655. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ;
  656. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ;
  657. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ;
  658. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ;
  659. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ;
  660. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ;
  661. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ;
  662. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ;
  663. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ;
  664. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ;
  665. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ;
  666. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ;
  667. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ;
  668. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ;
  669. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ;
  670. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ;
  671. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ;
  672. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ;
  673. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ;
  674. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ;
  675. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ;
  676. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2_combout ;
  677. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ;
  678. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ;
  679. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ;
  680. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ;
  681. wire [11:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a ;
  682. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [0];
  683. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [10];
  684. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11];
  685. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [1];
  686. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [2];
  687. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [3];
  688. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [4];
  689. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [5];
  690. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [6];
  691. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [7];
  692. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [8];
  693. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [9];
  694. wire [11:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a ;
  695. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [0];
  696. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [10];
  697. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11];
  698. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [1];
  699. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [2];
  700. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [3];
  701. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [4];
  702. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [5];
  703. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [6];
  704. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [7];
  705. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [8];
  706. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [9];
  707. wire [11:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a ;
  708. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [0];
  709. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [10];
  710. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11];
  711. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [1];
  712. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [2];
  713. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [3];
  714. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [4];
  715. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [5];
  716. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [6];
  717. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [7];
  718. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [8];
  719. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [9];
  720. wire [11:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a ;
  721. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [0];
  722. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [10];
  723. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11];
  724. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [1];
  725. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [2];
  726. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [3];
  727. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [4];
  728. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [5];
  729. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [6];
  730. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [7];
  731. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [8];
  732. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [9];
  733. wire [11:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a ;
  734. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [0];
  735. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [10];
  736. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [11];
  737. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [1];
  738. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [2];
  739. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [3];
  740. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [4];
  741. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [5];
  742. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [6];
  743. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [7];
  744. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [8];
  745. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [9];
  746. wire [10:0] \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a ;
  747. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [0];
  748. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [10];
  749. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [1];
  750. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [2];
  751. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [3];
  752. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [4];
  753. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [5];
  754. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [6];
  755. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [7];
  756. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [8];
  757. //wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [9];
  758. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ;
  759. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ;
  760. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ;
  761. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ;
  762. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ;
  763. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ;
  764. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ;
  765. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ;
  766. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ;
  767. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ;
  768. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ;
  769. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ;
  770. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ;
  771. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ;
  772. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ;
  773. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ;
  774. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ;
  775. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ;
  776. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ;
  777. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ;
  778. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ;
  779. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ;
  780. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ;
  781. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ;
  782. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ;
  783. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ;
  784. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ;
  785. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ;
  786. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ;
  787. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ;
  788. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ;
  789. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ;
  790. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ;
  791. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ;
  792. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ;
  793. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ;
  794. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ;
  795. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ;
  796. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ;
  797. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ;
  798. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ;
  799. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ;
  800. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ;
  801. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ;
  802. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ;
  803. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ;
  804. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ;
  805. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ;
  806. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ;
  807. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ;
  808. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ;
  809. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ;
  810. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ;
  811. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ;
  812. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ;
  813. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ;
  814. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ;
  815. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ;
  816. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ;
  817. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ;
  818. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ;
  819. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ;
  820. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ;
  821. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ;
  822. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ;
  823. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ;
  824. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ;
  825. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ;
  826. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ;
  827. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ;
  828. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ;
  829. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ;
  830. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ;
  831. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ;
  832. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ;
  833. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ;
  834. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ;
  835. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ;
  836. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ;
  837. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ;
  838. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ;
  839. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ;
  840. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ;
  841. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ;
  842. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ;
  843. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ;
  844. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ;
  845. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ;
  846. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ;
  847. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ;
  848. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ;
  849. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ;
  850. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ;
  851. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ;
  852. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ;
  853. wire \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ;
  854. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8_combout ;
  855. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ;
  856. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0_combout ;
  857. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~1 ;
  858. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20_combout ;
  859. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~21 ;
  860. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22_combout ;
  861. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~23 ;
  862. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24_combout ;
  863. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~25 ;
  864. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26_combout ;
  865. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2_combout ;
  866. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~3 ;
  867. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4_combout ;
  868. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~5 ;
  869. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6_combout ;
  870. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~7 ;
  871. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8_combout ;
  872. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~9 ;
  873. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10_combout ;
  874. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~11 ;
  875. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12_combout ;
  876. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~13 ;
  877. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14_combout ;
  878. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~15 ;
  879. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16_combout ;
  880. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~17 ;
  881. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18_combout ;
  882. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~19 ;
  883. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0_combout ;
  884. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~1 ;
  885. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2_combout ;
  886. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~3 ;
  887. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4_combout ;
  888. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~5 ;
  889. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6_combout ;
  890. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~7 ;
  891. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8_combout ;
  892. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~9 ;
  893. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10_combout ;
  894. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~11 ;
  895. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12_combout ;
  896. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~13 ;
  897. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14_combout ;
  898. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~15 ;
  899. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16_combout ;
  900. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~17 ;
  901. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18_combout ;
  902. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ;
  903. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ;
  904. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ;
  905. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ;
  906. wire [11:0] \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a ;
  907. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [0];
  908. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [10];
  909. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [11];
  910. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [1];
  911. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [2];
  912. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [3];
  913. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [4];
  914. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [5];
  915. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [6];
  916. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [7];
  917. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [8];
  918. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [9];
  919. wire [11:0] \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a ;
  920. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [0];
  921. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [10];
  922. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11];
  923. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [1];
  924. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [2];
  925. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [3];
  926. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [4];
  927. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [5];
  928. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [6];
  929. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [7];
  930. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [8];
  931. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [9];
  932. wire [11:0] \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a ;
  933. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [0];
  934. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [10];
  935. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11];
  936. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [1];
  937. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [2];
  938. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [3];
  939. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [4];
  940. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [5];
  941. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [6];
  942. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [7];
  943. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [8];
  944. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [9];
  945. wire [11:0] \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a ;
  946. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [0];
  947. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [10];
  948. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11];
  949. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [1];
  950. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [2];
  951. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [3];
  952. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [4];
  953. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [5];
  954. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [6];
  955. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [7];
  956. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [8];
  957. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [9];
  958. wire [10:0] \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a ;
  959. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [0];
  960. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [10];
  961. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [1];
  962. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [2];
  963. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [3];
  964. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [4];
  965. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [5];
  966. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [6];
  967. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [7];
  968. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [8];
  969. //wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [9];
  970. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0_combout ;
  971. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 ;
  972. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10_combout ;
  973. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 ;
  974. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12_combout ;
  975. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 ;
  976. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14_combout ;
  977. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 ;
  978. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16_combout ;
  979. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 ;
  980. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18_combout ;
  981. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 ;
  982. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ;
  983. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ;
  984. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ;
  985. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ;
  986. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ;
  987. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ;
  988. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ;
  989. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ;
  990. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ;
  991. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ;
  992. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2_combout ;
  993. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 ;
  994. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ;
  995. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ;
  996. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ;
  997. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4_combout ;
  998. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 ;
  999. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6_combout ;
  1000. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 ;
  1001. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8_combout ;
  1002. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 ;
  1003. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11_cout ;
  1004. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13_cout ;
  1005. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15_cout ;
  1006. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17_cout ;
  1007. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18_combout ;
  1008. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~19 ;
  1009. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1_cout ;
  1010. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20_combout ;
  1011. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~21 ;
  1012. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22_combout ;
  1013. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~23 ;
  1014. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24_combout ;
  1015. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~25 ;
  1016. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26_combout ;
  1017. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~27 ;
  1018. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28_combout ;
  1019. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~29 ;
  1020. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30_combout ;
  1021. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~31 ;
  1022. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32_combout ;
  1023. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~33 ;
  1024. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34_combout ;
  1025. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~35 ;
  1026. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36_combout ;
  1027. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3_cout ;
  1028. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5_cout ;
  1029. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7_cout ;
  1030. wire \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9_cout ;
  1031. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ;
  1032. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ;
  1033. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ;
  1034. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ;
  1035. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ;
  1036. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ;
  1037. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ;
  1038. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ;
  1039. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ;
  1040. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ;
  1041. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ;
  1042. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ;
  1043. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ;
  1044. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ;
  1045. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ;
  1046. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ;
  1047. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ;
  1048. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ;
  1049. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ;
  1050. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ;
  1051. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ;
  1052. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ;
  1053. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ;
  1054. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ;
  1055. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ;
  1056. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ;
  1057. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ;
  1058. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ;
  1059. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ;
  1060. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ;
  1061. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ;
  1062. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ;
  1063. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ;
  1064. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ;
  1065. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ;
  1066. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ;
  1067. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ;
  1068. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ;
  1069. wire [11:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a ;
  1070. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [0];
  1071. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [10];
  1072. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [11];
  1073. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [1];
  1074. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [2];
  1075. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [3];
  1076. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [4];
  1077. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [5];
  1078. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [6];
  1079. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [7];
  1080. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [8];
  1081. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [9];
  1082. wire [11:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a ;
  1083. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [0];
  1084. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [10];
  1085. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [11];
  1086. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [1];
  1087. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [2];
  1088. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [3];
  1089. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [4];
  1090. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [5];
  1091. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [6];
  1092. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [7];
  1093. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [8];
  1094. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [9];
  1095. wire [11:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a ;
  1096. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [0];
  1097. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [10];
  1098. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [11];
  1099. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [1];
  1100. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [2];
  1101. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [3];
  1102. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [4];
  1103. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [5];
  1104. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [6];
  1105. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [7];
  1106. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [8];
  1107. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [9];
  1108. wire [11:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a ;
  1109. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [0];
  1110. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [10];
  1111. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [11];
  1112. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [1];
  1113. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [2];
  1114. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [3];
  1115. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [4];
  1116. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [5];
  1117. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [6];
  1118. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [7];
  1119. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [8];
  1120. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [9];
  1121. wire [11:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a ;
  1122. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [0];
  1123. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [10];
  1124. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [11];
  1125. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [1];
  1126. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [2];
  1127. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [3];
  1128. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [4];
  1129. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [5];
  1130. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [6];
  1131. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [7];
  1132. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [8];
  1133. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [9];
  1134. wire [10:0] \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a ;
  1135. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [0];
  1136. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [10];
  1137. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [1];
  1138. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [2];
  1139. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [3];
  1140. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [4];
  1141. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [5];
  1142. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [6];
  1143. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [7];
  1144. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [8];
  1145. //wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [9];
  1146. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ;
  1147. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ;
  1148. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ;
  1149. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ;
  1150. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ;
  1151. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ;
  1152. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ;
  1153. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ;
  1154. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ;
  1155. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ;
  1156. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ;
  1157. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ;
  1158. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ;
  1159. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ;
  1160. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ;
  1161. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ;
  1162. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ;
  1163. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ;
  1164. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ;
  1165. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ;
  1166. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ;
  1167. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ;
  1168. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ;
  1169. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ;
  1170. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ;
  1171. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ;
  1172. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ;
  1173. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ;
  1174. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ;
  1175. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ;
  1176. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ;
  1177. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ;
  1178. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ;
  1179. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ;
  1180. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ;
  1181. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ;
  1182. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ;
  1183. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ;
  1184. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ;
  1185. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ;
  1186. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ;
  1187. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ;
  1188. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ;
  1189. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ;
  1190. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ;
  1191. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ;
  1192. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ;
  1193. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ;
  1194. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ;
  1195. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ;
  1196. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ;
  1197. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ;
  1198. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ;
  1199. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ;
  1200. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ;
  1201. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ;
  1202. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ;
  1203. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ;
  1204. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ;
  1205. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ;
  1206. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ;
  1207. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ;
  1208. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ;
  1209. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ;
  1210. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ;
  1211. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ;
  1212. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ;
  1213. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ;
  1214. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ;
  1215. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ;
  1216. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ;
  1217. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ;
  1218. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ;
  1219. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ;
  1220. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ;
  1221. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ;
  1222. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ;
  1223. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ;
  1224. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ;
  1225. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ;
  1226. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ;
  1227. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ;
  1228. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ;
  1229. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ;
  1230. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ;
  1231. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ;
  1232. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ;
  1233. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ;
  1234. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ;
  1235. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ;
  1236. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ;
  1237. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ;
  1238. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ;
  1239. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ;
  1240. wire \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ;
  1241. wire \macro_inst|apb_dac0_inst|Mux0~0_combout ;
  1242. wire \macro_inst|apb_dac0_inst|Mux0~1_combout ;
  1243. wire \macro_inst|apb_dac0_inst|Mux1~0_combout ;
  1244. wire \macro_inst|apb_dac0_inst|Mux1~1_combout ;
  1245. wire \macro_inst|apb_dac0_inst|Mux2~0_combout ;
  1246. wire \macro_inst|apb_dac0_inst|Mux2~1_combout ;
  1247. wire \macro_inst|apb_dac0_inst|Mux3~0_combout ;
  1248. wire \macro_inst|apb_dac0_inst|Mux3~1_combout ;
  1249. wire \macro_inst|apb_dac0_inst|Mux4~0_combout ;
  1250. wire \macro_inst|apb_dac0_inst|Mux4~1_combout ;
  1251. wire \macro_inst|apb_dac0_inst|Mux5~0_combout ;
  1252. wire \macro_inst|apb_dac0_inst|Mux5~1_combout ;
  1253. wire \macro_inst|apb_dac0_inst|Mux6~0_combout ;
  1254. wire \macro_inst|apb_dac0_inst|Mux6~1_combout ;
  1255. wire \macro_inst|apb_dac0_inst|Mux7~0_combout ;
  1256. wire \macro_inst|apb_dac0_inst|Mux7~1_combout ;
  1257. wire \macro_inst|apb_dac0_inst|Mux7~2_combout ;
  1258. wire \macro_inst|apb_dac0_inst|Mux7~3_combout ;
  1259. wire \macro_inst|apb_dac0_inst|Mux7~4_combout ;
  1260. wire \macro_inst|apb_dac0_inst|Mux7~5_combout ;
  1261. wire \macro_inst|apb_dac0_inst|Mux8~0_combout ;
  1262. wire \macro_inst|apb_dac0_inst|Mux8~1_combout ;
  1263. wire \macro_inst|apb_dac0_inst|Mux9~0_combout ;
  1264. wire \macro_inst|apb_dac0_inst|Mux9~1_combout ;
  1265. wire \macro_inst|apb_dac0_inst|always0~0_combout ;
  1266. wire \macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ;
  1267. wire \macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ;
  1268. wire \macro_inst|apb_dac0_inst|dac_inst.dout ;
  1269. wire \macro_inst|apb_dac0_inst|diff[0]~0_combout ;
  1270. wire \macro_inst|apb_dac0_inst|diff[0]~1 ;
  1271. wire \macro_inst|apb_dac0_inst|diff[1]~2_combout ;
  1272. wire \macro_inst|apb_dac0_inst|diff[1]~3 ;
  1273. wire \macro_inst|apb_dac0_inst|diff[2]~4_combout ;
  1274. wire \macro_inst|apb_dac0_inst|diff[2]~5 ;
  1275. wire \macro_inst|apb_dac0_inst|diff[3]~6_combout ;
  1276. wire \macro_inst|apb_dac0_inst|diff[3]~7 ;
  1277. wire \macro_inst|apb_dac0_inst|diff[4]~8_combout ;
  1278. wire \macro_inst|apb_dac0_inst|diff[4]~9 ;
  1279. wire \macro_inst|apb_dac0_inst|diff[5]~10_combout ;
  1280. wire \macro_inst|apb_dac0_inst|diff[5]~11 ;
  1281. wire \macro_inst|apb_dac0_inst|diff[6]~12_combout ;
  1282. wire \macro_inst|apb_dac0_inst|diff[6]~13 ;
  1283. wire \macro_inst|apb_dac0_inst|diff[7]~14_combout ;
  1284. wire \macro_inst|apb_dac0_inst|diff[7]~15 ;
  1285. wire \macro_inst|apb_dac0_inst|diff[8]~16_combout ;
  1286. wire \macro_inst|apb_dac0_inst|diff[8]~17 ;
  1287. wire \macro_inst|apb_dac0_inst|diff[9]~18_combout ;
  1288. wire [9:0] \macro_inst|apb_dac0_inst|max_vol_r ;
  1289. //wire \macro_inst|apb_dac0_inst|max_vol_r [0];
  1290. //wire \macro_inst|apb_dac0_inst|max_vol_r [1];
  1291. //wire \macro_inst|apb_dac0_inst|max_vol_r [2];
  1292. wire \macro_inst|apb_dac0_inst|max_vol_r[2]~3_combout ;
  1293. //wire \macro_inst|apb_dac0_inst|max_vol_r [3];
  1294. //wire \macro_inst|apb_dac0_inst|max_vol_r [4];
  1295. //wire \macro_inst|apb_dac0_inst|max_vol_r [5];
  1296. //wire \macro_inst|apb_dac0_inst|max_vol_r [6];
  1297. //wire \macro_inst|apb_dac0_inst|max_vol_r [7];
  1298. wire \macro_inst|apb_dac0_inst|max_vol_r[7]~2_combout ;
  1299. //wire \macro_inst|apb_dac0_inst|max_vol_r [8];
  1300. wire \macro_inst|apb_dac0_inst|max_vol_r[8]~1_combout ;
  1301. //wire \macro_inst|apb_dac0_inst|max_vol_r [9];
  1302. wire \macro_inst|apb_dac0_inst|max_vol_r[9]~0_combout ;
  1303. wire [9:0] \macro_inst|apb_dac0_inst|min_vol_r ;
  1304. //wire \macro_inst|apb_dac0_inst|min_vol_r [0];
  1305. wire \macro_inst|apb_dac0_inst|min_vol_r[0]~feeder_combout ;
  1306. //wire \macro_inst|apb_dac0_inst|min_vol_r [1];
  1307. //wire \macro_inst|apb_dac0_inst|min_vol_r [2];
  1308. wire \macro_inst|apb_dac0_inst|min_vol_r[2]~0_combout ;
  1309. //wire \macro_inst|apb_dac0_inst|min_vol_r [3];
  1310. //wire \macro_inst|apb_dac0_inst|min_vol_r [4];
  1311. //wire \macro_inst|apb_dac0_inst|min_vol_r [5];
  1312. wire \macro_inst|apb_dac0_inst|min_vol_r[5]~1_combout ;
  1313. //wire \macro_inst|apb_dac0_inst|min_vol_r [6];
  1314. wire \macro_inst|apb_dac0_inst|min_vol_r[6]~2_combout ;
  1315. //wire \macro_inst|apb_dac0_inst|min_vol_r [7];
  1316. //wire \macro_inst|apb_dac0_inst|min_vol_r [8];
  1317. //wire \macro_inst|apb_dac0_inst|min_vol_r [9];
  1318. wire [31:0] \macro_inst|apb_dac0_inst|phase_acc ;
  1319. //wire \macro_inst|apb_dac0_inst|phase_acc [0];
  1320. wire \macro_inst|apb_dac0_inst|phase_acc[0]~32_combout ;
  1321. wire \macro_inst|apb_dac0_inst|phase_acc[0]~33 ;
  1322. //wire \macro_inst|apb_dac0_inst|phase_acc [10];
  1323. wire \macro_inst|apb_dac0_inst|phase_acc[10]~52_combout ;
  1324. wire \macro_inst|apb_dac0_inst|phase_acc[10]~53 ;
  1325. //wire \macro_inst|apb_dac0_inst|phase_acc [11];
  1326. wire \macro_inst|apb_dac0_inst|phase_acc[11]~54_combout ;
  1327. wire \macro_inst|apb_dac0_inst|phase_acc[11]~55 ;
  1328. //wire \macro_inst|apb_dac0_inst|phase_acc [12];
  1329. wire \macro_inst|apb_dac0_inst|phase_acc[12]~56_combout ;
  1330. wire \macro_inst|apb_dac0_inst|phase_acc[12]~57 ;
  1331. //wire \macro_inst|apb_dac0_inst|phase_acc [13];
  1332. wire \macro_inst|apb_dac0_inst|phase_acc[13]~58_combout ;
  1333. wire \macro_inst|apb_dac0_inst|phase_acc[13]~59 ;
  1334. //wire \macro_inst|apb_dac0_inst|phase_acc [14];
  1335. wire \macro_inst|apb_dac0_inst|phase_acc[14]~60_combout ;
  1336. wire \macro_inst|apb_dac0_inst|phase_acc[14]~61 ;
  1337. //wire \macro_inst|apb_dac0_inst|phase_acc [15];
  1338. wire \macro_inst|apb_dac0_inst|phase_acc[15]~62_combout ;
  1339. wire \macro_inst|apb_dac0_inst|phase_acc[15]~63 ;
  1340. //wire \macro_inst|apb_dac0_inst|phase_acc [16];
  1341. wire \macro_inst|apb_dac0_inst|phase_acc[16]~64_combout ;
  1342. wire \macro_inst|apb_dac0_inst|phase_acc[16]~65 ;
  1343. //wire \macro_inst|apb_dac0_inst|phase_acc [17];
  1344. wire \macro_inst|apb_dac0_inst|phase_acc[17]~66_combout ;
  1345. wire \macro_inst|apb_dac0_inst|phase_acc[17]~67 ;
  1346. //wire \macro_inst|apb_dac0_inst|phase_acc [18];
  1347. wire \macro_inst|apb_dac0_inst|phase_acc[18]~68_combout ;
  1348. wire \macro_inst|apb_dac0_inst|phase_acc[18]~69 ;
  1349. //wire \macro_inst|apb_dac0_inst|phase_acc [19];
  1350. wire \macro_inst|apb_dac0_inst|phase_acc[19]~70_combout ;
  1351. wire \macro_inst|apb_dac0_inst|phase_acc[19]~71 ;
  1352. //wire \macro_inst|apb_dac0_inst|phase_acc [1];
  1353. wire \macro_inst|apb_dac0_inst|phase_acc[1]~34_combout ;
  1354. wire \macro_inst|apb_dac0_inst|phase_acc[1]~35 ;
  1355. //wire \macro_inst|apb_dac0_inst|phase_acc [20];
  1356. wire \macro_inst|apb_dac0_inst|phase_acc[20]~72_combout ;
  1357. wire \macro_inst|apb_dac0_inst|phase_acc[20]~73 ;
  1358. //wire \macro_inst|apb_dac0_inst|phase_acc [21];
  1359. wire \macro_inst|apb_dac0_inst|phase_acc[21]~74_combout ;
  1360. wire \macro_inst|apb_dac0_inst|phase_acc[21]~75 ;
  1361. //wire \macro_inst|apb_dac0_inst|phase_acc [22];
  1362. wire \macro_inst|apb_dac0_inst|phase_acc[22]~76_combout ;
  1363. wire \macro_inst|apb_dac0_inst|phase_acc[22]~77 ;
  1364. //wire \macro_inst|apb_dac0_inst|phase_acc [23];
  1365. wire \macro_inst|apb_dac0_inst|phase_acc[23]~78_combout ;
  1366. wire \macro_inst|apb_dac0_inst|phase_acc[23]~79 ;
  1367. //wire \macro_inst|apb_dac0_inst|phase_acc [24];
  1368. wire \macro_inst|apb_dac0_inst|phase_acc[24]~80_combout ;
  1369. wire \macro_inst|apb_dac0_inst|phase_acc[24]~81 ;
  1370. //wire \macro_inst|apb_dac0_inst|phase_acc [25];
  1371. wire \macro_inst|apb_dac0_inst|phase_acc[25]~82_combout ;
  1372. wire \macro_inst|apb_dac0_inst|phase_acc[25]~83 ;
  1373. //wire \macro_inst|apb_dac0_inst|phase_acc [26];
  1374. wire \macro_inst|apb_dac0_inst|phase_acc[26]~84_combout ;
  1375. wire \macro_inst|apb_dac0_inst|phase_acc[26]~85 ;
  1376. //wire \macro_inst|apb_dac0_inst|phase_acc [27];
  1377. wire \macro_inst|apb_dac0_inst|phase_acc[27]~86_combout ;
  1378. wire \macro_inst|apb_dac0_inst|phase_acc[27]~87 ;
  1379. //wire \macro_inst|apb_dac0_inst|phase_acc [28];
  1380. wire \macro_inst|apb_dac0_inst|phase_acc[28]~88_combout ;
  1381. wire \macro_inst|apb_dac0_inst|phase_acc[28]~89 ;
  1382. //wire \macro_inst|apb_dac0_inst|phase_acc [29];
  1383. wire \macro_inst|apb_dac0_inst|phase_acc[29]~90_combout ;
  1384. wire \macro_inst|apb_dac0_inst|phase_acc[29]~91 ;
  1385. //wire \macro_inst|apb_dac0_inst|phase_acc [2];
  1386. wire \macro_inst|apb_dac0_inst|phase_acc[2]~36_combout ;
  1387. wire \macro_inst|apb_dac0_inst|phase_acc[2]~37 ;
  1388. //wire \macro_inst|apb_dac0_inst|phase_acc [30];
  1389. wire \macro_inst|apb_dac0_inst|phase_acc[30]~92_combout ;
  1390. wire \macro_inst|apb_dac0_inst|phase_acc[30]~93 ;
  1391. //wire \macro_inst|apb_dac0_inst|phase_acc [31];
  1392. wire \macro_inst|apb_dac0_inst|phase_acc[31]~94_combout ;
  1393. //wire \macro_inst|apb_dac0_inst|phase_acc [3];
  1394. wire \macro_inst|apb_dac0_inst|phase_acc[3]~38_combout ;
  1395. wire \macro_inst|apb_dac0_inst|phase_acc[3]~39 ;
  1396. //wire \macro_inst|apb_dac0_inst|phase_acc [4];
  1397. wire \macro_inst|apb_dac0_inst|phase_acc[4]~40_combout ;
  1398. wire \macro_inst|apb_dac0_inst|phase_acc[4]~41 ;
  1399. //wire \macro_inst|apb_dac0_inst|phase_acc [5];
  1400. wire \macro_inst|apb_dac0_inst|phase_acc[5]~42_combout ;
  1401. wire \macro_inst|apb_dac0_inst|phase_acc[5]~43 ;
  1402. //wire \macro_inst|apb_dac0_inst|phase_acc [6];
  1403. wire \macro_inst|apb_dac0_inst|phase_acc[6]~44_combout ;
  1404. wire \macro_inst|apb_dac0_inst|phase_acc[6]~45 ;
  1405. //wire \macro_inst|apb_dac0_inst|phase_acc [7];
  1406. wire \macro_inst|apb_dac0_inst|phase_acc[7]~46_combout ;
  1407. wire \macro_inst|apb_dac0_inst|phase_acc[7]~47 ;
  1408. //wire \macro_inst|apb_dac0_inst|phase_acc [8];
  1409. wire \macro_inst|apb_dac0_inst|phase_acc[8]~48_combout ;
  1410. wire \macro_inst|apb_dac0_inst|phase_acc[8]~49 ;
  1411. //wire \macro_inst|apb_dac0_inst|phase_acc [9];
  1412. wire \macro_inst|apb_dac0_inst|phase_acc[9]~50_combout ;
  1413. wire \macro_inst|apb_dac0_inst|phase_acc[9]~51 ;
  1414. wire [9:0] \macro_inst|apb_dac0_inst|phase_r ;
  1415. //wire \macro_inst|apb_dac0_inst|phase_r [0];
  1416. //wire \macro_inst|apb_dac0_inst|phase_r [1];
  1417. //wire \macro_inst|apb_dac0_inst|phase_r [2];
  1418. wire \macro_inst|apb_dac0_inst|phase_r[2]~feeder_combout ;
  1419. //wire \macro_inst|apb_dac0_inst|phase_r [3];
  1420. wire \macro_inst|apb_dac0_inst|phase_r[3]~feeder_combout ;
  1421. //wire \macro_inst|apb_dac0_inst|phase_r [4];
  1422. //wire \macro_inst|apb_dac0_inst|phase_r [5];
  1423. //wire \macro_inst|apb_dac0_inst|phase_r [6];
  1424. //wire \macro_inst|apb_dac0_inst|phase_r [7];
  1425. //wire \macro_inst|apb_dac0_inst|phase_r [8];
  1426. //wire \macro_inst|apb_dac0_inst|phase_r [9];
  1427. wire \macro_inst|apb_dac0_inst|sine_rom~100_combout ;
  1428. wire \macro_inst|apb_dac0_inst|sine_rom~101_combout ;
  1429. wire \macro_inst|apb_dac0_inst|sine_rom~102_combout ;
  1430. wire \macro_inst|apb_dac0_inst|sine_rom~103_combout ;
  1431. wire \macro_inst|apb_dac0_inst|sine_rom~104_combout ;
  1432. wire \macro_inst|apb_dac0_inst|sine_rom~105_combout ;
  1433. wire \macro_inst|apb_dac0_inst|sine_rom~106_combout ;
  1434. wire \macro_inst|apb_dac0_inst|sine_rom~107_combout ;
  1435. wire \macro_inst|apb_dac0_inst|sine_rom~108_combout ;
  1436. wire \macro_inst|apb_dac0_inst|sine_rom~109_combout ;
  1437. wire \macro_inst|apb_dac0_inst|sine_rom~10_combout ;
  1438. wire \macro_inst|apb_dac0_inst|sine_rom~110_combout ;
  1439. wire \macro_inst|apb_dac0_inst|sine_rom~111_combout ;
  1440. wire \macro_inst|apb_dac0_inst|sine_rom~112_combout ;
  1441. wire \macro_inst|apb_dac0_inst|sine_rom~113_combout ;
  1442. wire \macro_inst|apb_dac0_inst|sine_rom~114_combout ;
  1443. wire \macro_inst|apb_dac0_inst|sine_rom~115_combout ;
  1444. wire \macro_inst|apb_dac0_inst|sine_rom~116_combout ;
  1445. wire \macro_inst|apb_dac0_inst|sine_rom~117_combout ;
  1446. wire \macro_inst|apb_dac0_inst|sine_rom~118_combout ;
  1447. wire \macro_inst|apb_dac0_inst|sine_rom~119_combout ;
  1448. wire \macro_inst|apb_dac0_inst|sine_rom~11_combout ;
  1449. wire \macro_inst|apb_dac0_inst|sine_rom~120_combout ;
  1450. wire \macro_inst|apb_dac0_inst|sine_rom~121_combout ;
  1451. wire \macro_inst|apb_dac0_inst|sine_rom~122_combout ;
  1452. wire \macro_inst|apb_dac0_inst|sine_rom~123_combout ;
  1453. wire \macro_inst|apb_dac0_inst|sine_rom~124_combout ;
  1454. wire \macro_inst|apb_dac0_inst|sine_rom~125_combout ;
  1455. wire \macro_inst|apb_dac0_inst|sine_rom~126_combout ;
  1456. wire \macro_inst|apb_dac0_inst|sine_rom~127_combout ;
  1457. wire \macro_inst|apb_dac0_inst|sine_rom~128_combout ;
  1458. wire \macro_inst|apb_dac0_inst|sine_rom~129_combout ;
  1459. wire \macro_inst|apb_dac0_inst|sine_rom~12_combout ;
  1460. wire \macro_inst|apb_dac0_inst|sine_rom~130_combout ;
  1461. wire \macro_inst|apb_dac0_inst|sine_rom~131_combout ;
  1462. wire \macro_inst|apb_dac0_inst|sine_rom~132_combout ;
  1463. wire \macro_inst|apb_dac0_inst|sine_rom~133_combout ;
  1464. wire \macro_inst|apb_dac0_inst|sine_rom~134_combout ;
  1465. wire \macro_inst|apb_dac0_inst|sine_rom~135_combout ;
  1466. wire \macro_inst|apb_dac0_inst|sine_rom~136_combout ;
  1467. wire \macro_inst|apb_dac0_inst|sine_rom~137_combout ;
  1468. wire \macro_inst|apb_dac0_inst|sine_rom~138_combout ;
  1469. wire \macro_inst|apb_dac0_inst|sine_rom~139_combout ;
  1470. wire \macro_inst|apb_dac0_inst|sine_rom~13_combout ;
  1471. wire \macro_inst|apb_dac0_inst|sine_rom~140_combout ;
  1472. wire \macro_inst|apb_dac0_inst|sine_rom~141_combout ;
  1473. wire \macro_inst|apb_dac0_inst|sine_rom~142_combout ;
  1474. wire \macro_inst|apb_dac0_inst|sine_rom~143_combout ;
  1475. wire \macro_inst|apb_dac0_inst|sine_rom~144_combout ;
  1476. wire \macro_inst|apb_dac0_inst|sine_rom~145_combout ;
  1477. wire \macro_inst|apb_dac0_inst|sine_rom~146_combout ;
  1478. wire \macro_inst|apb_dac0_inst|sine_rom~147_combout ;
  1479. wire \macro_inst|apb_dac0_inst|sine_rom~148_combout ;
  1480. wire \macro_inst|apb_dac0_inst|sine_rom~149_combout ;
  1481. wire \macro_inst|apb_dac0_inst|sine_rom~14_combout ;
  1482. wire \macro_inst|apb_dac0_inst|sine_rom~150_combout ;
  1483. wire \macro_inst|apb_dac0_inst|sine_rom~151_combout ;
  1484. wire \macro_inst|apb_dac0_inst|sine_rom~152_combout ;
  1485. wire \macro_inst|apb_dac0_inst|sine_rom~153_combout ;
  1486. wire \macro_inst|apb_dac0_inst|sine_rom~154_combout ;
  1487. wire \macro_inst|apb_dac0_inst|sine_rom~155_combout ;
  1488. wire \macro_inst|apb_dac0_inst|sine_rom~156_combout ;
  1489. wire \macro_inst|apb_dac0_inst|sine_rom~157_combout ;
  1490. wire \macro_inst|apb_dac0_inst|sine_rom~158_combout ;
  1491. wire \macro_inst|apb_dac0_inst|sine_rom~159_combout ;
  1492. wire \macro_inst|apb_dac0_inst|sine_rom~15_combout ;
  1493. wire \macro_inst|apb_dac0_inst|sine_rom~160_combout ;
  1494. wire \macro_inst|apb_dac0_inst|sine_rom~161_combout ;
  1495. wire \macro_inst|apb_dac0_inst|sine_rom~162_combout ;
  1496. wire \macro_inst|apb_dac0_inst|sine_rom~163_combout ;
  1497. wire \macro_inst|apb_dac0_inst|sine_rom~164_combout ;
  1498. wire \macro_inst|apb_dac0_inst|sine_rom~165_combout ;
  1499. wire \macro_inst|apb_dac0_inst|sine_rom~166_combout ;
  1500. wire \macro_inst|apb_dac0_inst|sine_rom~167_combout ;
  1501. wire \macro_inst|apb_dac0_inst|sine_rom~168_combout ;
  1502. wire \macro_inst|apb_dac0_inst|sine_rom~169_combout ;
  1503. wire \macro_inst|apb_dac0_inst|sine_rom~16_combout ;
  1504. wire \macro_inst|apb_dac0_inst|sine_rom~170_combout ;
  1505. wire \macro_inst|apb_dac0_inst|sine_rom~171_combout ;
  1506. wire \macro_inst|apb_dac0_inst|sine_rom~172_combout ;
  1507. wire \macro_inst|apb_dac0_inst|sine_rom~173_combout ;
  1508. wire \macro_inst|apb_dac0_inst|sine_rom~174_combout ;
  1509. wire \macro_inst|apb_dac0_inst|sine_rom~175_combout ;
  1510. wire \macro_inst|apb_dac0_inst|sine_rom~176_combout ;
  1511. wire \macro_inst|apb_dac0_inst|sine_rom~177_combout ;
  1512. wire \macro_inst|apb_dac0_inst|sine_rom~178_combout ;
  1513. wire \macro_inst|apb_dac0_inst|sine_rom~17_combout ;
  1514. wire \macro_inst|apb_dac0_inst|sine_rom~180_combout ;
  1515. wire \macro_inst|apb_dac0_inst|sine_rom~181_combout ;
  1516. wire \macro_inst|apb_dac0_inst|sine_rom~182_combout ;
  1517. wire \macro_inst|apb_dac0_inst|sine_rom~183_combout ;
  1518. wire \macro_inst|apb_dac0_inst|sine_rom~184_combout ;
  1519. wire \macro_inst|apb_dac0_inst|sine_rom~185_combout ;
  1520. wire \macro_inst|apb_dac0_inst|sine_rom~186_combout ;
  1521. wire \macro_inst|apb_dac0_inst|sine_rom~187_combout ;
  1522. wire \macro_inst|apb_dac0_inst|sine_rom~188_combout ;
  1523. wire \macro_inst|apb_dac0_inst|sine_rom~189_combout ;
  1524. wire \macro_inst|apb_dac0_inst|sine_rom~18_combout ;
  1525. wire \macro_inst|apb_dac0_inst|sine_rom~190_combout ;
  1526. wire \macro_inst|apb_dac0_inst|sine_rom~191_combout ;
  1527. wire \macro_inst|apb_dac0_inst|sine_rom~192_combout ;
  1528. wire \macro_inst|apb_dac0_inst|sine_rom~193_combout ;
  1529. wire \macro_inst|apb_dac0_inst|sine_rom~194_combout ;
  1530. wire \macro_inst|apb_dac0_inst|sine_rom~195_combout ;
  1531. wire \macro_inst|apb_dac0_inst|sine_rom~196_combout ;
  1532. wire \macro_inst|apb_dac0_inst|sine_rom~197_combout ;
  1533. wire \macro_inst|apb_dac0_inst|sine_rom~198_combout ;
  1534. wire \macro_inst|apb_dac0_inst|sine_rom~199_combout ;
  1535. wire \macro_inst|apb_dac0_inst|sine_rom~19_combout ;
  1536. wire \macro_inst|apb_dac0_inst|sine_rom~200_combout ;
  1537. wire \macro_inst|apb_dac0_inst|sine_rom~201_combout ;
  1538. wire \macro_inst|apb_dac0_inst|sine_rom~202_combout ;
  1539. wire \macro_inst|apb_dac0_inst|sine_rom~203_combout ;
  1540. wire \macro_inst|apb_dac0_inst|sine_rom~204_combout ;
  1541. wire \macro_inst|apb_dac0_inst|sine_rom~205_combout ;
  1542. wire \macro_inst|apb_dac0_inst|sine_rom~206_combout ;
  1543. wire \macro_inst|apb_dac0_inst|sine_rom~207_combout ;
  1544. wire \macro_inst|apb_dac0_inst|sine_rom~208_combout ;
  1545. wire \macro_inst|apb_dac0_inst|sine_rom~209_combout ;
  1546. wire \macro_inst|apb_dac0_inst|sine_rom~20_combout ;
  1547. wire \macro_inst|apb_dac0_inst|sine_rom~210_combout ;
  1548. wire \macro_inst|apb_dac0_inst|sine_rom~211_combout ;
  1549. wire \macro_inst|apb_dac0_inst|sine_rom~212_combout ;
  1550. wire \macro_inst|apb_dac0_inst|sine_rom~213_combout ;
  1551. wire \macro_inst|apb_dac0_inst|sine_rom~214_combout ;
  1552. wire \macro_inst|apb_dac0_inst|sine_rom~215_combout ;
  1553. wire \macro_inst|apb_dac0_inst|sine_rom~216_combout ;
  1554. wire \macro_inst|apb_dac0_inst|sine_rom~217_combout ;
  1555. wire \macro_inst|apb_dac0_inst|sine_rom~218_combout ;
  1556. wire \macro_inst|apb_dac0_inst|sine_rom~219_combout ;
  1557. wire \macro_inst|apb_dac0_inst|sine_rom~21_combout ;
  1558. wire \macro_inst|apb_dac0_inst|sine_rom~220_combout ;
  1559. wire \macro_inst|apb_dac0_inst|sine_rom~221_combout ;
  1560. wire \macro_inst|apb_dac0_inst|sine_rom~222_combout ;
  1561. wire \macro_inst|apb_dac0_inst|sine_rom~223_combout ;
  1562. wire \macro_inst|apb_dac0_inst|sine_rom~224_combout ;
  1563. wire \macro_inst|apb_dac0_inst|sine_rom~225_combout ;
  1564. wire \macro_inst|apb_dac0_inst|sine_rom~226_combout ;
  1565. wire \macro_inst|apb_dac0_inst|sine_rom~227_combout ;
  1566. wire \macro_inst|apb_dac0_inst|sine_rom~228_combout ;
  1567. wire \macro_inst|apb_dac0_inst|sine_rom~229_combout ;
  1568. wire \macro_inst|apb_dac0_inst|sine_rom~22_combout ;
  1569. wire \macro_inst|apb_dac0_inst|sine_rom~230_combout ;
  1570. wire \macro_inst|apb_dac0_inst|sine_rom~231_combout ;
  1571. wire \macro_inst|apb_dac0_inst|sine_rom~232_combout ;
  1572. wire \macro_inst|apb_dac0_inst|sine_rom~233_combout ;
  1573. wire \macro_inst|apb_dac0_inst|sine_rom~234_combout ;
  1574. wire \macro_inst|apb_dac0_inst|sine_rom~235_combout ;
  1575. wire \macro_inst|apb_dac0_inst|sine_rom~236_combout ;
  1576. wire \macro_inst|apb_dac0_inst|sine_rom~237_combout ;
  1577. wire \macro_inst|apb_dac0_inst|sine_rom~238_combout ;
  1578. wire \macro_inst|apb_dac0_inst|sine_rom~239_combout ;
  1579. wire \macro_inst|apb_dac0_inst|sine_rom~23_combout ;
  1580. wire \macro_inst|apb_dac0_inst|sine_rom~240_combout ;
  1581. wire \macro_inst|apb_dac0_inst|sine_rom~241_combout ;
  1582. wire \macro_inst|apb_dac0_inst|sine_rom~242_combout ;
  1583. wire \macro_inst|apb_dac0_inst|sine_rom~243_combout ;
  1584. wire \macro_inst|apb_dac0_inst|sine_rom~244_combout ;
  1585. wire \macro_inst|apb_dac0_inst|sine_rom~245_combout ;
  1586. wire \macro_inst|apb_dac0_inst|sine_rom~246_combout ;
  1587. wire \macro_inst|apb_dac0_inst|sine_rom~247_combout ;
  1588. wire \macro_inst|apb_dac0_inst|sine_rom~248_combout ;
  1589. wire \macro_inst|apb_dac0_inst|sine_rom~249_combout ;
  1590. wire \macro_inst|apb_dac0_inst|sine_rom~24_combout ;
  1591. wire \macro_inst|apb_dac0_inst|sine_rom~250_combout ;
  1592. wire \macro_inst|apb_dac0_inst|sine_rom~251_combout ;
  1593. wire \macro_inst|apb_dac0_inst|sine_rom~252_combout ;
  1594. wire \macro_inst|apb_dac0_inst|sine_rom~253_combout ;
  1595. wire \macro_inst|apb_dac0_inst|sine_rom~254_combout ;
  1596. wire \macro_inst|apb_dac0_inst|sine_rom~255_combout ;
  1597. wire \macro_inst|apb_dac0_inst|sine_rom~256_combout ;
  1598. wire \macro_inst|apb_dac0_inst|sine_rom~257_combout ;
  1599. wire \macro_inst|apb_dac0_inst|sine_rom~258_combout ;
  1600. wire \macro_inst|apb_dac0_inst|sine_rom~259_combout ;
  1601. wire \macro_inst|apb_dac0_inst|sine_rom~25_combout ;
  1602. wire \macro_inst|apb_dac0_inst|sine_rom~260_combout ;
  1603. wire \macro_inst|apb_dac0_inst|sine_rom~261_combout ;
  1604. wire \macro_inst|apb_dac0_inst|sine_rom~262_combout ;
  1605. wire \macro_inst|apb_dac0_inst|sine_rom~263_combout ;
  1606. wire \macro_inst|apb_dac0_inst|sine_rom~264_combout ;
  1607. wire \macro_inst|apb_dac0_inst|sine_rom~265_combout ;
  1608. wire \macro_inst|apb_dac0_inst|sine_rom~266_combout ;
  1609. wire \macro_inst|apb_dac0_inst|sine_rom~267_combout ;
  1610. wire \macro_inst|apb_dac0_inst|sine_rom~268_combout ;
  1611. wire \macro_inst|apb_dac0_inst|sine_rom~269_combout ;
  1612. wire \macro_inst|apb_dac0_inst|sine_rom~26_combout ;
  1613. wire \macro_inst|apb_dac0_inst|sine_rom~270_combout ;
  1614. wire \macro_inst|apb_dac0_inst|sine_rom~271_combout ;
  1615. wire \macro_inst|apb_dac0_inst|sine_rom~272_combout ;
  1616. wire \macro_inst|apb_dac0_inst|sine_rom~273_combout ;
  1617. wire \macro_inst|apb_dac0_inst|sine_rom~274_combout ;
  1618. wire \macro_inst|apb_dac0_inst|sine_rom~275_combout ;
  1619. wire \macro_inst|apb_dac0_inst|sine_rom~276_combout ;
  1620. wire \macro_inst|apb_dac0_inst|sine_rom~277_combout ;
  1621. wire \macro_inst|apb_dac0_inst|sine_rom~278_combout ;
  1622. wire \macro_inst|apb_dac0_inst|sine_rom~279_combout ;
  1623. wire \macro_inst|apb_dac0_inst|sine_rom~27_combout ;
  1624. wire \macro_inst|apb_dac0_inst|sine_rom~280_combout ;
  1625. wire \macro_inst|apb_dac0_inst|sine_rom~281_combout ;
  1626. wire \macro_inst|apb_dac0_inst|sine_rom~282_combout ;
  1627. wire \macro_inst|apb_dac0_inst|sine_rom~283_combout ;
  1628. wire \macro_inst|apb_dac0_inst|sine_rom~284_combout ;
  1629. wire \macro_inst|apb_dac0_inst|sine_rom~285_combout ;
  1630. wire \macro_inst|apb_dac0_inst|sine_rom~286_combout ;
  1631. wire \macro_inst|apb_dac0_inst|sine_rom~287_combout ;
  1632. wire \macro_inst|apb_dac0_inst|sine_rom~288_combout ;
  1633. wire \macro_inst|apb_dac0_inst|sine_rom~289_combout ;
  1634. wire \macro_inst|apb_dac0_inst|sine_rom~28_combout ;
  1635. wire \macro_inst|apb_dac0_inst|sine_rom~290_combout ;
  1636. wire \macro_inst|apb_dac0_inst|sine_rom~291_combout ;
  1637. wire \macro_inst|apb_dac0_inst|sine_rom~292_combout ;
  1638. wire \macro_inst|apb_dac0_inst|sine_rom~293_combout ;
  1639. wire \macro_inst|apb_dac0_inst|sine_rom~294_combout ;
  1640. wire \macro_inst|apb_dac0_inst|sine_rom~295_combout ;
  1641. wire \macro_inst|apb_dac0_inst|sine_rom~296_combout ;
  1642. wire \macro_inst|apb_dac0_inst|sine_rom~297_combout ;
  1643. wire \macro_inst|apb_dac0_inst|sine_rom~298_combout ;
  1644. wire \macro_inst|apb_dac0_inst|sine_rom~299_combout ;
  1645. wire \macro_inst|apb_dac0_inst|sine_rom~29_combout ;
  1646. wire \macro_inst|apb_dac0_inst|sine_rom~2_combout ;
  1647. wire \macro_inst|apb_dac0_inst|sine_rom~300_combout ;
  1648. wire \macro_inst|apb_dac0_inst|sine_rom~301_combout ;
  1649. wire \macro_inst|apb_dac0_inst|sine_rom~302_combout ;
  1650. wire \macro_inst|apb_dac0_inst|sine_rom~303_combout ;
  1651. wire \macro_inst|apb_dac0_inst|sine_rom~304_combout ;
  1652. wire \macro_inst|apb_dac0_inst|sine_rom~305_combout ;
  1653. wire \macro_inst|apb_dac0_inst|sine_rom~306_combout ;
  1654. wire \macro_inst|apb_dac0_inst|sine_rom~307_combout ;
  1655. wire \macro_inst|apb_dac0_inst|sine_rom~308_combout ;
  1656. wire \macro_inst|apb_dac0_inst|sine_rom~309_combout ;
  1657. wire \macro_inst|apb_dac0_inst|sine_rom~30_combout ;
  1658. wire \macro_inst|apb_dac0_inst|sine_rom~310_combout ;
  1659. wire \macro_inst|apb_dac0_inst|sine_rom~311_combout ;
  1660. wire \macro_inst|apb_dac0_inst|sine_rom~312_combout ;
  1661. wire \macro_inst|apb_dac0_inst|sine_rom~313_combout ;
  1662. wire \macro_inst|apb_dac0_inst|sine_rom~314_combout ;
  1663. wire \macro_inst|apb_dac0_inst|sine_rom~315_combout ;
  1664. wire \macro_inst|apb_dac0_inst|sine_rom~316_combout ;
  1665. wire \macro_inst|apb_dac0_inst|sine_rom~317_combout ;
  1666. wire \macro_inst|apb_dac0_inst|sine_rom~318_combout ;
  1667. wire \macro_inst|apb_dac0_inst|sine_rom~319_combout ;
  1668. wire \macro_inst|apb_dac0_inst|sine_rom~31_combout ;
  1669. wire \macro_inst|apb_dac0_inst|sine_rom~320_combout ;
  1670. wire \macro_inst|apb_dac0_inst|sine_rom~321_combout ;
  1671. wire \macro_inst|apb_dac0_inst|sine_rom~322_combout ;
  1672. wire \macro_inst|apb_dac0_inst|sine_rom~323_combout ;
  1673. wire \macro_inst|apb_dac0_inst|sine_rom~324_combout ;
  1674. wire \macro_inst|apb_dac0_inst|sine_rom~325_combout ;
  1675. wire \macro_inst|apb_dac0_inst|sine_rom~326_combout ;
  1676. wire \macro_inst|apb_dac0_inst|sine_rom~327_combout ;
  1677. wire \macro_inst|apb_dac0_inst|sine_rom~328_combout ;
  1678. wire \macro_inst|apb_dac0_inst|sine_rom~329_combout ;
  1679. wire \macro_inst|apb_dac0_inst|sine_rom~32_combout ;
  1680. wire \macro_inst|apb_dac0_inst|sine_rom~330_combout ;
  1681. wire \macro_inst|apb_dac0_inst|sine_rom~331_combout ;
  1682. wire \macro_inst|apb_dac0_inst|sine_rom~332_combout ;
  1683. wire \macro_inst|apb_dac0_inst|sine_rom~333_combout ;
  1684. wire \macro_inst|apb_dac0_inst|sine_rom~334_combout ;
  1685. wire \macro_inst|apb_dac0_inst|sine_rom~335_combout ;
  1686. wire \macro_inst|apb_dac0_inst|sine_rom~336_combout ;
  1687. wire \macro_inst|apb_dac0_inst|sine_rom~337_combout ;
  1688. wire \macro_inst|apb_dac0_inst|sine_rom~338_combout ;
  1689. wire \macro_inst|apb_dac0_inst|sine_rom~339_combout ;
  1690. wire \macro_inst|apb_dac0_inst|sine_rom~33_combout ;
  1691. wire \macro_inst|apb_dac0_inst|sine_rom~340_combout ;
  1692. wire \macro_inst|apb_dac0_inst|sine_rom~341_combout ;
  1693. wire \macro_inst|apb_dac0_inst|sine_rom~342_combout ;
  1694. wire \macro_inst|apb_dac0_inst|sine_rom~343_combout ;
  1695. wire \macro_inst|apb_dac0_inst|sine_rom~344_combout ;
  1696. wire \macro_inst|apb_dac0_inst|sine_rom~345_combout ;
  1697. wire \macro_inst|apb_dac0_inst|sine_rom~346_combout ;
  1698. wire \macro_inst|apb_dac0_inst|sine_rom~34_combout ;
  1699. wire \macro_inst|apb_dac0_inst|sine_rom~35_combout ;
  1700. wire \macro_inst|apb_dac0_inst|sine_rom~36_combout ;
  1701. wire \macro_inst|apb_dac0_inst|sine_rom~37_combout ;
  1702. wire \macro_inst|apb_dac0_inst|sine_rom~38_combout ;
  1703. wire \macro_inst|apb_dac0_inst|sine_rom~39_combout ;
  1704. wire \macro_inst|apb_dac0_inst|sine_rom~3_combout ;
  1705. wire \macro_inst|apb_dac0_inst|sine_rom~40_combout ;
  1706. wire \macro_inst|apb_dac0_inst|sine_rom~41_combout ;
  1707. wire \macro_inst|apb_dac0_inst|sine_rom~42_combout ;
  1708. wire \macro_inst|apb_dac0_inst|sine_rom~43_combout ;
  1709. wire \macro_inst|apb_dac0_inst|sine_rom~44_combout ;
  1710. wire \macro_inst|apb_dac0_inst|sine_rom~45_combout ;
  1711. wire \macro_inst|apb_dac0_inst|sine_rom~46_combout ;
  1712. wire \macro_inst|apb_dac0_inst|sine_rom~47_combout ;
  1713. wire \macro_inst|apb_dac0_inst|sine_rom~48_combout ;
  1714. wire \macro_inst|apb_dac0_inst|sine_rom~49_combout ;
  1715. wire \macro_inst|apb_dac0_inst|sine_rom~4_combout ;
  1716. wire \macro_inst|apb_dac0_inst|sine_rom~50_combout ;
  1717. wire \macro_inst|apb_dac0_inst|sine_rom~51_combout ;
  1718. wire \macro_inst|apb_dac0_inst|sine_rom~52_combout ;
  1719. wire \macro_inst|apb_dac0_inst|sine_rom~53_combout ;
  1720. wire \macro_inst|apb_dac0_inst|sine_rom~54_combout ;
  1721. wire \macro_inst|apb_dac0_inst|sine_rom~55_combout ;
  1722. wire \macro_inst|apb_dac0_inst|sine_rom~56_combout ;
  1723. wire \macro_inst|apb_dac0_inst|sine_rom~57_combout ;
  1724. wire \macro_inst|apb_dac0_inst|sine_rom~58_combout ;
  1725. wire \macro_inst|apb_dac0_inst|sine_rom~59_combout ;
  1726. wire \macro_inst|apb_dac0_inst|sine_rom~5_combout ;
  1727. wire \macro_inst|apb_dac0_inst|sine_rom~60_combout ;
  1728. wire \macro_inst|apb_dac0_inst|sine_rom~61_combout ;
  1729. wire \macro_inst|apb_dac0_inst|sine_rom~62_combout ;
  1730. wire \macro_inst|apb_dac0_inst|sine_rom~63_combout ;
  1731. wire \macro_inst|apb_dac0_inst|sine_rom~64_combout ;
  1732. wire \macro_inst|apb_dac0_inst|sine_rom~65_combout ;
  1733. wire \macro_inst|apb_dac0_inst|sine_rom~66_combout ;
  1734. wire \macro_inst|apb_dac0_inst|sine_rom~67_combout ;
  1735. wire \macro_inst|apb_dac0_inst|sine_rom~68_combout ;
  1736. wire \macro_inst|apb_dac0_inst|sine_rom~69_combout ;
  1737. wire \macro_inst|apb_dac0_inst|sine_rom~6_combout ;
  1738. wire \macro_inst|apb_dac0_inst|sine_rom~70_combout ;
  1739. wire \macro_inst|apb_dac0_inst|sine_rom~71_combout ;
  1740. wire \macro_inst|apb_dac0_inst|sine_rom~72_combout ;
  1741. wire \macro_inst|apb_dac0_inst|sine_rom~73_combout ;
  1742. wire \macro_inst|apb_dac0_inst|sine_rom~74_combout ;
  1743. wire \macro_inst|apb_dac0_inst|sine_rom~75_combout ;
  1744. wire \macro_inst|apb_dac0_inst|sine_rom~76_combout ;
  1745. wire \macro_inst|apb_dac0_inst|sine_rom~77_combout ;
  1746. wire \macro_inst|apb_dac0_inst|sine_rom~78_combout ;
  1747. wire \macro_inst|apb_dac0_inst|sine_rom~79_combout ;
  1748. wire \macro_inst|apb_dac0_inst|sine_rom~7_combout ;
  1749. wire \macro_inst|apb_dac0_inst|sine_rom~80_combout ;
  1750. wire \macro_inst|apb_dac0_inst|sine_rom~81_combout ;
  1751. wire \macro_inst|apb_dac0_inst|sine_rom~82_combout ;
  1752. wire \macro_inst|apb_dac0_inst|sine_rom~83_combout ;
  1753. wire \macro_inst|apb_dac0_inst|sine_rom~84_combout ;
  1754. wire \macro_inst|apb_dac0_inst|sine_rom~85_combout ;
  1755. wire \macro_inst|apb_dac0_inst|sine_rom~86_combout ;
  1756. wire \macro_inst|apb_dac0_inst|sine_rom~87_combout ;
  1757. wire \macro_inst|apb_dac0_inst|sine_rom~88_combout ;
  1758. wire \macro_inst|apb_dac0_inst|sine_rom~89_combout ;
  1759. wire \macro_inst|apb_dac0_inst|sine_rom~8_combout ;
  1760. wire \macro_inst|apb_dac0_inst|sine_rom~90_combout ;
  1761. wire \macro_inst|apb_dac0_inst|sine_rom~91_combout ;
  1762. wire \macro_inst|apb_dac0_inst|sine_rom~92_combout ;
  1763. wire \macro_inst|apb_dac0_inst|sine_rom~93_combout ;
  1764. wire \macro_inst|apb_dac0_inst|sine_rom~94_combout ;
  1765. wire \macro_inst|apb_dac0_inst|sine_rom~95_combout ;
  1766. wire \macro_inst|apb_dac0_inst|sine_rom~96_combout ;
  1767. wire \macro_inst|apb_dac0_inst|sine_rom~97_combout ;
  1768. wire \macro_inst|apb_dac0_inst|sine_rom~98_combout ;
  1769. wire \macro_inst|apb_dac0_inst|sine_rom~99_combout ;
  1770. wire \macro_inst|apb_dac0_inst|sine_rom~9_combout ;
  1771. wire \macro_inst|apb_prdata[10]~0_combout ;
  1772. wire \macro_inst|apb_prdata[10]~1_combout ;
  1773. wire \macro_inst|apb_prdata[11]~2_combout ;
  1774. wire \macro_inst|apb_prdata[12]~3_combout ;
  1775. wire \macro_inst|apb_prdata[13]~4_combout ;
  1776. wire \macro_inst|apb_prdata[14]~5_combout ;
  1777. wire \macro_inst|apb_prdata[15]~6_combout ;
  1778. wire \macro_inst|apb_prdata[16]~7_combout ;
  1779. wire \macro_inst|apb_prdata[17]~8_combout ;
  1780. wire \macro_inst|apb_prdata[18]~9_combout ;
  1781. wire \macro_inst|apb_prdata[19]~10_combout ;
  1782. wire \macro_inst|apb_prdata[20]~11_combout ;
  1783. wire \macro_inst|apb_prdata[21]~12_combout ;
  1784. wire \macro_inst|apb_prdata[22]~13_combout ;
  1785. wire \macro_inst|apb_prdata[23]~14_combout ;
  1786. wire \macro_inst|apb_prdata[24]~15_combout ;
  1787. wire \macro_inst|apb_prdata[25]~16_combout ;
  1788. wire \macro_inst|apb_prdata[26]~17_combout ;
  1789. wire \macro_inst|apb_prdata[27]~18_combout ;
  1790. wire \macro_inst|apb_prdata[28]~19_combout ;
  1791. wire \macro_inst|apb_prdata[29]~20_combout ;
  1792. wire \macro_inst|apb_prdata[30]~21_combout ;
  1793. wire \macro_inst|apb_prdata[31]~22_combout ;
  1794. wire \macro_inst|cfg_reg_inst|Equal0~0_combout ;
  1795. wire \macro_inst|cfg_reg_inst|Equal0~1_combout ;
  1796. wire \macro_inst|cfg_reg_inst|Equal0~2_combout ;
  1797. wire \macro_inst|cfg_reg_inst|Equal0~3_combout ;
  1798. wire \macro_inst|cfg_reg_inst|Equal10~0_combout ;
  1799. wire \macro_inst|cfg_reg_inst|Equal10~1_combout ;
  1800. wire \macro_inst|cfg_reg_inst|Equal10~2_combout ;
  1801. wire \macro_inst|cfg_reg_inst|Equal11~0_combout ;
  1802. wire \macro_inst|cfg_reg_inst|Equal1~0_combout ;
  1803. wire \macro_inst|cfg_reg_inst|Equal1~1_combout ;
  1804. wire \macro_inst|cfg_reg_inst|Equal2~0_combout ;
  1805. wire \macro_inst|cfg_reg_inst|Equal2~1_combout ;
  1806. wire \macro_inst|cfg_reg_inst|Equal3~0_combout ;
  1807. wire \macro_inst|cfg_reg_inst|Equal4~0_combout ;
  1808. wire \macro_inst|cfg_reg_inst|Equal4~1_combout ;
  1809. wire \macro_inst|cfg_reg_inst|Equal4~2_combout ;
  1810. wire \macro_inst|cfg_reg_inst|Equal5~0_combout ;
  1811. wire \macro_inst|cfg_reg_inst|Equal8~0_combout ;
  1812. wire \macro_inst|cfg_reg_inst|Equal9~0_combout ;
  1813. wire \macro_inst|cfg_reg_inst|Selector0~0_combout ;
  1814. wire \macro_inst|cfg_reg_inst|Selector10~0_combout ;
  1815. wire \macro_inst|cfg_reg_inst|Selector10~1_combout ;
  1816. wire \macro_inst|cfg_reg_inst|Selector11~0_combout ;
  1817. wire \macro_inst|cfg_reg_inst|Selector11~1_combout ;
  1818. wire \macro_inst|cfg_reg_inst|Selector12~0_combout ;
  1819. wire \macro_inst|cfg_reg_inst|Selector12~1_combout ;
  1820. wire \macro_inst|cfg_reg_inst|Selector13~0_combout ;
  1821. wire \macro_inst|cfg_reg_inst|Selector13~1_combout ;
  1822. wire \macro_inst|cfg_reg_inst|Selector13~2_combout ;
  1823. wire \macro_inst|cfg_reg_inst|Selector14~0_combout ;
  1824. wire \macro_inst|cfg_reg_inst|Selector14~combout ;
  1825. wire \macro_inst|cfg_reg_inst|Selector15~0_combout ;
  1826. wire \macro_inst|cfg_reg_inst|Selector15~combout ;
  1827. wire \macro_inst|cfg_reg_inst|Selector16~0_combout ;
  1828. wire \macro_inst|cfg_reg_inst|Selector16~1_combout ;
  1829. wire \macro_inst|cfg_reg_inst|Selector16~2_combout ;
  1830. wire \macro_inst|cfg_reg_inst|Selector17~0_combout ;
  1831. wire \macro_inst|cfg_reg_inst|Selector17~1_combout ;
  1832. wire \macro_inst|cfg_reg_inst|Selector17~2_combout ;
  1833. wire \macro_inst|cfg_reg_inst|Selector17~3_combout ;
  1834. wire \macro_inst|cfg_reg_inst|Selector18~0_combout ;
  1835. wire \macro_inst|cfg_reg_inst|Selector18~1_combout ;
  1836. wire \macro_inst|cfg_reg_inst|Selector18~2_combout ;
  1837. wire \macro_inst|cfg_reg_inst|Selector18~3_combout ;
  1838. wire \macro_inst|cfg_reg_inst|Selector18~4_combout ;
  1839. wire \macro_inst|cfg_reg_inst|Selector19~0_combout ;
  1840. wire \macro_inst|cfg_reg_inst|Selector19~1_combout ;
  1841. wire \macro_inst|cfg_reg_inst|Selector19~2_combout ;
  1842. wire \macro_inst|cfg_reg_inst|Selector19~3_combout ;
  1843. wire \macro_inst|cfg_reg_inst|Selector19~4_combout ;
  1844. wire \macro_inst|cfg_reg_inst|Selector1~0_combout ;
  1845. wire \macro_inst|cfg_reg_inst|Selector20~0_combout ;
  1846. wire \macro_inst|cfg_reg_inst|Selector20~1_combout ;
  1847. wire \macro_inst|cfg_reg_inst|Selector20~2_combout ;
  1848. wire \macro_inst|cfg_reg_inst|Selector20~3_combout ;
  1849. wire \macro_inst|cfg_reg_inst|Selector20~4_combout ;
  1850. wire \macro_inst|cfg_reg_inst|Selector20~5_combout ;
  1851. wire \macro_inst|cfg_reg_inst|Selector21~0_combout ;
  1852. wire \macro_inst|cfg_reg_inst|Selector21~1_combout ;
  1853. wire \macro_inst|cfg_reg_inst|Selector21~2_combout ;
  1854. wire \macro_inst|cfg_reg_inst|Selector21~3_combout ;
  1855. wire \macro_inst|cfg_reg_inst|Selector21~4_combout ;
  1856. wire \macro_inst|cfg_reg_inst|Selector21~5_combout ;
  1857. wire \macro_inst|cfg_reg_inst|Selector22~0_combout ;
  1858. wire \macro_inst|cfg_reg_inst|Selector22~1_combout ;
  1859. wire \macro_inst|cfg_reg_inst|Selector22~2_combout ;
  1860. wire \macro_inst|cfg_reg_inst|Selector22~3_combout ;
  1861. wire \macro_inst|cfg_reg_inst|Selector22~4_combout ;
  1862. wire \macro_inst|cfg_reg_inst|Selector22~5_combout ;
  1863. wire \macro_inst|cfg_reg_inst|Selector23~0_combout ;
  1864. wire \macro_inst|cfg_reg_inst|Selector23~1_combout ;
  1865. wire \macro_inst|cfg_reg_inst|Selector23~2_combout ;
  1866. wire \macro_inst|cfg_reg_inst|Selector23~3_combout ;
  1867. wire \macro_inst|cfg_reg_inst|Selector23~4_combout ;
  1868. wire \macro_inst|cfg_reg_inst|Selector23~5_combout ;
  1869. wire \macro_inst|cfg_reg_inst|Selector24~0_combout ;
  1870. wire \macro_inst|cfg_reg_inst|Selector24~1_combout ;
  1871. wire \macro_inst|cfg_reg_inst|Selector24~2_combout ;
  1872. wire \macro_inst|cfg_reg_inst|Selector24~3_combout ;
  1873. wire \macro_inst|cfg_reg_inst|Selector24~4_combout ;
  1874. wire \macro_inst|cfg_reg_inst|Selector24~5_combout ;
  1875. wire \macro_inst|cfg_reg_inst|Selector24~6_combout ;
  1876. wire \macro_inst|cfg_reg_inst|Selector24~7_combout ;
  1877. wire \macro_inst|cfg_reg_inst|Selector24~8_combout ;
  1878. wire \macro_inst|cfg_reg_inst|Selector24~9_combout ;
  1879. wire \macro_inst|cfg_reg_inst|Selector25~0_combout ;
  1880. wire \macro_inst|cfg_reg_inst|Selector25~1_combout ;
  1881. wire \macro_inst|cfg_reg_inst|Selector25~2_combout ;
  1882. wire \macro_inst|cfg_reg_inst|Selector25~3_combout ;
  1883. wire \macro_inst|cfg_reg_inst|Selector25~4_combout ;
  1884. wire \macro_inst|cfg_reg_inst|Selector25~5_combout ;
  1885. wire \macro_inst|cfg_reg_inst|Selector25~6_combout ;
  1886. wire \macro_inst|cfg_reg_inst|Selector25~7_combout ;
  1887. wire \macro_inst|cfg_reg_inst|Selector2~0_combout ;
  1888. wire \macro_inst|cfg_reg_inst|Selector3~0_combout ;
  1889. wire \macro_inst|cfg_reg_inst|Selector4~0_combout ;
  1890. wire \macro_inst|cfg_reg_inst|Selector5~0_combout ;
  1891. wire \macro_inst|cfg_reg_inst|Selector6~0_combout ;
  1892. wire \macro_inst|cfg_reg_inst|Selector7~0_combout ;
  1893. wire \macro_inst|cfg_reg_inst|Selector8~0_combout ;
  1894. wire \macro_inst|cfg_reg_inst|Selector9~0_combout ;
  1895. wire [3:0] \macro_inst|cfg_reg_inst|adc_chnl_sel ;
  1896. //wire \macro_inst|cfg_reg_inst|adc_chnl_sel [0];
  1897. wire \macro_inst|cfg_reg_inst|adc_chnl_sel[0]~0_combout ;
  1898. //wire \macro_inst|cfg_reg_inst|adc_chnl_sel [1];
  1899. //wire \macro_inst|cfg_reg_inst|adc_chnl_sel [2];
  1900. wire \macro_inst|cfg_reg_inst|adc_chnl_sel[2]~1_combout ;
  1901. //wire \macro_inst|cfg_reg_inst|adc_chnl_sel [3];
  1902. wire \macro_inst|cfg_reg_inst|adc_chnl_sel[3]~2_combout ;
  1903. wire [7:0] \macro_inst|cfg_reg_inst|adc_clk_div ;
  1904. //wire \macro_inst|cfg_reg_inst|adc_clk_div [0];
  1905. wire \macro_inst|cfg_reg_inst|adc_clk_div[0]~1_combout ;
  1906. //wire \macro_inst|cfg_reg_inst|adc_clk_div [1];
  1907. wire \macro_inst|cfg_reg_inst|adc_clk_div[1]~2_combout ;
  1908. //wire \macro_inst|cfg_reg_inst|adc_clk_div [2];
  1909. //wire \macro_inst|cfg_reg_inst|adc_clk_div [3];
  1910. wire \macro_inst|cfg_reg_inst|adc_clk_div[3]__feeder__LutOut ;
  1911. //wire \macro_inst|cfg_reg_inst|adc_clk_div [4];
  1912. wire \macro_inst|cfg_reg_inst|adc_clk_div[4]__feeder__LutOut ;
  1913. //wire \macro_inst|cfg_reg_inst|adc_clk_div [5];
  1914. wire \macro_inst|cfg_reg_inst|adc_clk_div[5]__feeder__LutOut ;
  1915. //wire \macro_inst|cfg_reg_inst|adc_clk_div [6];
  1916. wire \macro_inst|cfg_reg_inst|adc_clk_div[6]__feeder__LutOut ;
  1917. //wire \macro_inst|cfg_reg_inst|adc_clk_div [7];
  1918. wire \macro_inst|cfg_reg_inst|adc_clk_div[7]__feeder__LutOut ;
  1919. wire \macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout ;
  1920. wire \macro_inst|cfg_reg_inst|adc_en~0_combout ;
  1921. wire \macro_inst|cfg_reg_inst|adc_en~q ;
  1922. wire \macro_inst|cfg_reg_inst|adc_en~q__SyncReset_X61_Y10_INV ;
  1923. wire \macro_inst|cfg_reg_inst|adc_restart__feeder__LutOut ;
  1924. wire \macro_inst|cfg_reg_inst|adc_restart~q ;
  1925. wire \macro_inst|cfg_reg_inst|adc_run~0_combout ;
  1926. wire \macro_inst|cfg_reg_inst|adc_run~q ;
  1927. wire \macro_inst|cfg_reg_inst|always0~0_combout ;
  1928. wire \macro_inst|cfg_reg_inst|always1~2_combout ;
  1929. wire \macro_inst|cfg_reg_inst|dac_en~2_combout ;
  1930. wire \macro_inst|cfg_reg_inst|dac_en~_wirecell_combout ;
  1931. wire \macro_inst|cfg_reg_inst|dac_en~q ;
  1932. wire \macro_inst|cfg_reg_inst|dac_run__feeder__LutOut ;
  1933. wire \macro_inst|cfg_reg_inst|dac_run~q ;
  1934. wire [7:0] \macro_inst|cfg_reg_inst|duty_cycle ;
  1935. //wire \macro_inst|cfg_reg_inst|duty_cycle [0];
  1936. wire \macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout ;
  1937. //wire \macro_inst|cfg_reg_inst|duty_cycle [1];
  1938. wire \macro_inst|cfg_reg_inst|duty_cycle[1]~1_combout ;
  1939. //wire \macro_inst|cfg_reg_inst|duty_cycle [2];
  1940. //wire \macro_inst|cfg_reg_inst|duty_cycle [3];
  1941. //wire \macro_inst|cfg_reg_inst|duty_cycle [4];
  1942. wire \macro_inst|cfg_reg_inst|duty_cycle[4]~2_combout ;
  1943. //wire \macro_inst|cfg_reg_inst|duty_cycle [5];
  1944. wire \macro_inst|cfg_reg_inst|duty_cycle[5]~3_combout ;
  1945. //wire \macro_inst|cfg_reg_inst|duty_cycle [6];
  1946. //wire \macro_inst|cfg_reg_inst|duty_cycle [7];
  1947. wire [31:0] \macro_inst|cfg_reg_inst|frequency ;
  1948. //wire \macro_inst|cfg_reg_inst|frequency [0];
  1949. wire \macro_inst|cfg_reg_inst|frequency[0]__feeder__LutOut ;
  1950. //wire \macro_inst|cfg_reg_inst|frequency [10];
  1951. wire \macro_inst|cfg_reg_inst|frequency[10]__feeder__LutOut ;
  1952. //wire \macro_inst|cfg_reg_inst|frequency [11];
  1953. wire \macro_inst|cfg_reg_inst|frequency[11]__feeder__LutOut ;
  1954. //wire \macro_inst|cfg_reg_inst|frequency [12];
  1955. wire \macro_inst|cfg_reg_inst|frequency[12]__feeder__LutOut ;
  1956. //wire \macro_inst|cfg_reg_inst|frequency [13];
  1957. wire \macro_inst|cfg_reg_inst|frequency[13]__feeder__LutOut ;
  1958. //wire \macro_inst|cfg_reg_inst|frequency [14];
  1959. wire \macro_inst|cfg_reg_inst|frequency[14]__feeder__LutOut ;
  1960. //wire \macro_inst|cfg_reg_inst|frequency [15];
  1961. wire \macro_inst|cfg_reg_inst|frequency[15]__feeder__LutOut ;
  1962. //wire \macro_inst|cfg_reg_inst|frequency [16];
  1963. wire \macro_inst|cfg_reg_inst|frequency[16]__feeder__LutOut ;
  1964. //wire \macro_inst|cfg_reg_inst|frequency [17];
  1965. wire \macro_inst|cfg_reg_inst|frequency[17]__feeder__LutOut ;
  1966. //wire \macro_inst|cfg_reg_inst|frequency [18];
  1967. wire \macro_inst|cfg_reg_inst|frequency[18]__feeder__LutOut ;
  1968. //wire \macro_inst|cfg_reg_inst|frequency [19];
  1969. wire \macro_inst|cfg_reg_inst|frequency[19]__feeder__LutOut ;
  1970. //wire \macro_inst|cfg_reg_inst|frequency [1];
  1971. wire \macro_inst|cfg_reg_inst|frequency[1]__feeder__LutOut ;
  1972. //wire \macro_inst|cfg_reg_inst|frequency [20];
  1973. wire \macro_inst|cfg_reg_inst|frequency[20]__feeder__LutOut ;
  1974. //wire \macro_inst|cfg_reg_inst|frequency [21];
  1975. wire \macro_inst|cfg_reg_inst|frequency[21]__feeder__LutOut ;
  1976. //wire \macro_inst|cfg_reg_inst|frequency [22];
  1977. wire \macro_inst|cfg_reg_inst|frequency[22]__feeder__LutOut ;
  1978. //wire \macro_inst|cfg_reg_inst|frequency [23];
  1979. wire \macro_inst|cfg_reg_inst|frequency[23]__feeder__LutOut ;
  1980. //wire \macro_inst|cfg_reg_inst|frequency [24];
  1981. wire \macro_inst|cfg_reg_inst|frequency[24]__feeder__LutOut ;
  1982. //wire \macro_inst|cfg_reg_inst|frequency [25];
  1983. wire \macro_inst|cfg_reg_inst|frequency[25]__feeder__LutOut ;
  1984. //wire \macro_inst|cfg_reg_inst|frequency [26];
  1985. wire \macro_inst|cfg_reg_inst|frequency[26]__feeder__LutOut ;
  1986. //wire \macro_inst|cfg_reg_inst|frequency [27];
  1987. wire \macro_inst|cfg_reg_inst|frequency[27]__feeder__LutOut ;
  1988. //wire \macro_inst|cfg_reg_inst|frequency [28];
  1989. wire \macro_inst|cfg_reg_inst|frequency[28]__feeder__LutOut ;
  1990. //wire \macro_inst|cfg_reg_inst|frequency [29];
  1991. wire \macro_inst|cfg_reg_inst|frequency[29]__feeder__LutOut ;
  1992. //wire \macro_inst|cfg_reg_inst|frequency [2];
  1993. wire \macro_inst|cfg_reg_inst|frequency[2]__feeder__LutOut ;
  1994. //wire \macro_inst|cfg_reg_inst|frequency [30];
  1995. wire \macro_inst|cfg_reg_inst|frequency[30]__feeder__LutOut ;
  1996. //wire \macro_inst|cfg_reg_inst|frequency [31];
  1997. wire \macro_inst|cfg_reg_inst|frequency[31]__feeder__LutOut ;
  1998. wire \macro_inst|cfg_reg_inst|frequency[31]~0_combout ;
  1999. //wire \macro_inst|cfg_reg_inst|frequency [3];
  2000. wire \macro_inst|cfg_reg_inst|frequency[3]~6_combout ;
  2001. //wire \macro_inst|cfg_reg_inst|frequency [4];
  2002. wire \macro_inst|cfg_reg_inst|frequency[4]__feeder__LutOut ;
  2003. //wire \macro_inst|cfg_reg_inst|frequency [5];
  2004. wire \macro_inst|cfg_reg_inst|frequency[5]~5_combout ;
  2005. //wire \macro_inst|cfg_reg_inst|frequency [6];
  2006. wire \macro_inst|cfg_reg_inst|frequency[6]~4_combout ;
  2007. //wire \macro_inst|cfg_reg_inst|frequency [7];
  2008. wire \macro_inst|cfg_reg_inst|frequency[7]~3_combout ;
  2009. //wire \macro_inst|cfg_reg_inst|frequency [8];
  2010. wire \macro_inst|cfg_reg_inst|frequency[8]~2_combout ;
  2011. //wire \macro_inst|cfg_reg_inst|frequency [9];
  2012. wire \macro_inst|cfg_reg_inst|frequency[9]~1_combout ;
  2013. wire [9:0] \macro_inst|cfg_reg_inst|max_vol ;
  2014. //wire \macro_inst|cfg_reg_inst|max_vol [0];
  2015. //wire \macro_inst|cfg_reg_inst|max_vol [1];
  2016. wire \macro_inst|cfg_reg_inst|max_vol[1]__feeder__LutOut ;
  2017. //wire \macro_inst|cfg_reg_inst|max_vol [2];
  2018. wire \macro_inst|cfg_reg_inst|max_vol[2]~3_combout ;
  2019. //wire \macro_inst|cfg_reg_inst|max_vol [3];
  2020. //wire \macro_inst|cfg_reg_inst|max_vol [4];
  2021. //wire \macro_inst|cfg_reg_inst|max_vol [5];
  2022. //wire \macro_inst|cfg_reg_inst|max_vol [6];
  2023. //wire \macro_inst|cfg_reg_inst|max_vol [7];
  2024. wire \macro_inst|cfg_reg_inst|max_vol[7]~2_combout ;
  2025. //wire \macro_inst|cfg_reg_inst|max_vol [8];
  2026. wire \macro_inst|cfg_reg_inst|max_vol[8]~1_combout ;
  2027. //wire \macro_inst|cfg_reg_inst|max_vol [9];
  2028. wire \macro_inst|cfg_reg_inst|max_vol[9]~0_combout ;
  2029. wire [9:0] \macro_inst|cfg_reg_inst|min_vol ;
  2030. //wire \macro_inst|cfg_reg_inst|min_vol [0];
  2031. wire \macro_inst|cfg_reg_inst|min_vol[0]__feeder__LutOut ;
  2032. wire \macro_inst|cfg_reg_inst|min_vol[0]~0_combout ;
  2033. //wire \macro_inst|cfg_reg_inst|min_vol [1];
  2034. wire \macro_inst|cfg_reg_inst|min_vol[1]__feeder__LutOut ;
  2035. //wire \macro_inst|cfg_reg_inst|min_vol [2];
  2036. wire \macro_inst|cfg_reg_inst|min_vol[2]~1_combout ;
  2037. //wire \macro_inst|cfg_reg_inst|min_vol [3];
  2038. wire \macro_inst|cfg_reg_inst|min_vol[3]__feeder__LutOut ;
  2039. //wire \macro_inst|cfg_reg_inst|min_vol [4];
  2040. //wire \macro_inst|cfg_reg_inst|min_vol [5];
  2041. wire \macro_inst|cfg_reg_inst|min_vol[5]~2_combout ;
  2042. //wire \macro_inst|cfg_reg_inst|min_vol [6];
  2043. wire \macro_inst|cfg_reg_inst|min_vol[6]~3_combout ;
  2044. //wire \macro_inst|cfg_reg_inst|min_vol [7];
  2045. wire \macro_inst|cfg_reg_inst|min_vol[7]__feeder__LutOut ;
  2046. //wire \macro_inst|cfg_reg_inst|min_vol [8];
  2047. wire \macro_inst|cfg_reg_inst|min_vol[8]__feeder__LutOut ;
  2048. //wire \macro_inst|cfg_reg_inst|min_vol [9];
  2049. wire \macro_inst|cfg_reg_inst|min_vol[9]__feeder__LutOut ;
  2050. wire [31:0] \macro_inst|cfg_reg_inst|prdata ;
  2051. //wire \macro_inst|cfg_reg_inst|prdata [0];
  2052. //wire \macro_inst|cfg_reg_inst|prdata [10];
  2053. wire \macro_inst|cfg_reg_inst|prdata[10]~0_combout ;
  2054. wire \macro_inst|cfg_reg_inst|prdata[10]~1_combout ;
  2055. wire \macro_inst|cfg_reg_inst|prdata[10]~2_combout ;
  2056. //wire \macro_inst|cfg_reg_inst|prdata [11];
  2057. //wire \macro_inst|cfg_reg_inst|prdata [12];
  2058. //wire \macro_inst|cfg_reg_inst|prdata [13];
  2059. //wire \macro_inst|cfg_reg_inst|prdata [14];
  2060. //wire \macro_inst|cfg_reg_inst|prdata [15];
  2061. //wire \macro_inst|cfg_reg_inst|prdata [16];
  2062. //wire \macro_inst|cfg_reg_inst|prdata [17];
  2063. //wire \macro_inst|cfg_reg_inst|prdata [18];
  2064. //wire \macro_inst|cfg_reg_inst|prdata [19];
  2065. //wire \macro_inst|cfg_reg_inst|prdata [1];
  2066. //wire \macro_inst|cfg_reg_inst|prdata [20];
  2067. //wire \macro_inst|cfg_reg_inst|prdata [21];
  2068. //wire \macro_inst|cfg_reg_inst|prdata [22];
  2069. //wire \macro_inst|cfg_reg_inst|prdata [23];
  2070. //wire \macro_inst|cfg_reg_inst|prdata [24];
  2071. //wire \macro_inst|cfg_reg_inst|prdata [25];
  2072. //wire \macro_inst|cfg_reg_inst|prdata [26];
  2073. //wire \macro_inst|cfg_reg_inst|prdata [27];
  2074. //wire \macro_inst|cfg_reg_inst|prdata [28];
  2075. //wire \macro_inst|cfg_reg_inst|prdata [29];
  2076. //wire \macro_inst|cfg_reg_inst|prdata [2];
  2077. //wire \macro_inst|cfg_reg_inst|prdata [30];
  2078. //wire \macro_inst|cfg_reg_inst|prdata [31];
  2079. //wire \macro_inst|cfg_reg_inst|prdata [3];
  2080. //wire \macro_inst|cfg_reg_inst|prdata [4];
  2081. //wire \macro_inst|cfg_reg_inst|prdata [5];
  2082. //wire \macro_inst|cfg_reg_inst|prdata [6];
  2083. //wire \macro_inst|cfg_reg_inst|prdata [7];
  2084. //wire \macro_inst|cfg_reg_inst|prdata [8];
  2085. //wire \macro_inst|cfg_reg_inst|prdata [9];
  2086. wire \macro_inst|cfg_reg_inst|prdata~3_combout ;
  2087. wire \macro_inst|cfg_reg_inst|prdata~4_combout ;
  2088. wire \macro_inst|cfg_reg_inst|prdata~5_combout ;
  2089. wire \macro_inst|cfg_reg_inst|prdata~6_combout ;
  2090. wire \macro_inst|cfg_reg_inst|prdata~7_combout ;
  2091. wire \macro_inst|cfg_reg_inst|prdata~8_combout ;
  2092. wire [15:0] \macro_inst|cfg_reg_inst|trig_auto_timeout ;
  2093. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [0];
  2094. wire \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ;
  2095. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [10];
  2096. wire \macro_inst|cfg_reg_inst|trig_auto_timeout[10]~1_combout ;
  2097. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [11];
  2098. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [12];
  2099. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [13];
  2100. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [14];
  2101. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [15];
  2102. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [1];
  2103. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [2];
  2104. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [3];
  2105. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [4];
  2106. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [5];
  2107. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [6];
  2108. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [7];
  2109. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [8];
  2110. //wire \macro_inst|cfg_reg_inst|trig_auto_timeout [9];
  2111. wire [1:0] \macro_inst|cfg_reg_inst|trig_edge ;
  2112. //wire \macro_inst|cfg_reg_inst|trig_edge [0];
  2113. //wire \macro_inst|cfg_reg_inst|trig_edge [1];
  2114. wire [1:0] \macro_inst|cfg_reg_inst|trig_mode ;
  2115. //wire \macro_inst|cfg_reg_inst|trig_mode [0];
  2116. wire \macro_inst|cfg_reg_inst|trig_mode[0]__feeder__LutOut ;
  2117. //wire \macro_inst|cfg_reg_inst|trig_mode [1];
  2118. wire \macro_inst|cfg_reg_inst|trig_mode[1]__feeder__LutOut ;
  2119. wire \macro_inst|cfg_reg_inst|trig_mode[1]~0_combout ;
  2120. wire [15:0] \macro_inst|cfg_reg_inst|trig_pulse_width ;
  2121. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [0];
  2122. wire \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout ;
  2123. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [10];
  2124. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [11];
  2125. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [12];
  2126. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [13];
  2127. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [14];
  2128. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [15];
  2129. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [1];
  2130. wire \macro_inst|cfg_reg_inst|trig_pulse_width[1]~3_combout ;
  2131. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [2];
  2132. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [3];
  2133. wire \macro_inst|cfg_reg_inst|trig_pulse_width[3]~4_combout ;
  2134. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [4];
  2135. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [5];
  2136. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [6];
  2137. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [7];
  2138. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [8];
  2139. //wire \macro_inst|cfg_reg_inst|trig_pulse_width [9];
  2140. wire [11:0] \macro_inst|cfg_reg_inst|trig_threshold ;
  2141. //wire \macro_inst|cfg_reg_inst|trig_threshold [0];
  2142. wire \macro_inst|cfg_reg_inst|trig_threshold[0]__feeder__LutOut ;
  2143. //wire \macro_inst|cfg_reg_inst|trig_threshold [10];
  2144. //wire \macro_inst|cfg_reg_inst|trig_threshold [11];
  2145. wire \macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout ;
  2146. wire \macro_inst|cfg_reg_inst|trig_threshold[11]~1_combout ;
  2147. //wire \macro_inst|cfg_reg_inst|trig_threshold [1];
  2148. wire \macro_inst|cfg_reg_inst|trig_threshold[1]__feeder__LutOut ;
  2149. //wire \macro_inst|cfg_reg_inst|trig_threshold [2];
  2150. wire \macro_inst|cfg_reg_inst|trig_threshold[2]__feeder__LutOut ;
  2151. //wire \macro_inst|cfg_reg_inst|trig_threshold [3];
  2152. //wire \macro_inst|cfg_reg_inst|trig_threshold [4];
  2153. wire \macro_inst|cfg_reg_inst|trig_threshold[4]__feeder__LutOut ;
  2154. //wire \macro_inst|cfg_reg_inst|trig_threshold [5];
  2155. //wire \macro_inst|cfg_reg_inst|trig_threshold [6];
  2156. wire \macro_inst|cfg_reg_inst|trig_threshold[6]__feeder__LutOut ;
  2157. //wire \macro_inst|cfg_reg_inst|trig_threshold [7];
  2158. //wire \macro_inst|cfg_reg_inst|trig_threshold [8];
  2159. //wire \macro_inst|cfg_reg_inst|trig_threshold [9];
  2160. wire [4:0] \macro_inst|cfg_reg_inst|trig_time_slot ;
  2161. //wire \macro_inst|cfg_reg_inst|trig_time_slot [0];
  2162. wire \macro_inst|cfg_reg_inst|trig_time_slot[0]~0_combout ;
  2163. //wire \macro_inst|cfg_reg_inst|trig_time_slot [1];
  2164. wire \macro_inst|cfg_reg_inst|trig_time_slot[1]__feeder__LutOut ;
  2165. //wire \macro_inst|cfg_reg_inst|trig_time_slot [2];
  2166. wire \macro_inst|cfg_reg_inst|trig_time_slot[2]__feeder__LutOut ;
  2167. //wire \macro_inst|cfg_reg_inst|trig_time_slot [3];
  2168. wire \macro_inst|cfg_reg_inst|trig_time_slot[3]__feeder__LutOut ;
  2169. //wire \macro_inst|cfg_reg_inst|trig_time_slot [4];
  2170. wire \macro_inst|cfg_reg_inst|trig_time_slot[4]__feeder__LutOut ;
  2171. wire [1:0] \macro_inst|cfg_reg_inst|wave_type ;
  2172. //wire \macro_inst|cfg_reg_inst|wave_type [0];
  2173. wire \macro_inst|cfg_reg_inst|wave_type[0]__feeder__LutOut ;
  2174. //wire \macro_inst|cfg_reg_inst|wave_type [1];
  2175. wire \macro_inst|cfg_reg_inst|wave_type[1]__feeder__LutOut ;
  2176. wire \macro_inst|cfg_reg_inst|wave_type[1]~0_combout ;
  2177. wire \macro_inst|mem_apb_psel~0_combout ;
  2178. wire \macro_inst|mem_apb_psel~combout ;
  2179. wire \macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ;
  2180. wire \macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ;
  2181. wire [3:0] \macro_inst|pr_select ;
  2182. //wire \macro_inst|pr_select [0];
  2183. //wire \macro_inst|pr_select [1];
  2184. //wire \macro_inst|pr_select [2];
  2185. //wire \macro_inst|pr_select [3];
  2186. wire \macro_inst|trig_ctrl_inst|Add0~0_combout ;
  2187. wire \macro_inst|trig_ctrl_inst|Add0~1 ;
  2188. wire \macro_inst|trig_ctrl_inst|Add0~10_combout ;
  2189. wire \macro_inst|trig_ctrl_inst|Add0~11 ;
  2190. wire \macro_inst|trig_ctrl_inst|Add0~12_combout ;
  2191. wire \macro_inst|trig_ctrl_inst|Add0~13 ;
  2192. wire \macro_inst|trig_ctrl_inst|Add0~14_combout ;
  2193. wire \macro_inst|trig_ctrl_inst|Add0~15 ;
  2194. wire \macro_inst|trig_ctrl_inst|Add0~16_combout ;
  2195. wire \macro_inst|trig_ctrl_inst|Add0~17 ;
  2196. wire \macro_inst|trig_ctrl_inst|Add0~18_combout ;
  2197. wire \macro_inst|trig_ctrl_inst|Add0~19 ;
  2198. wire \macro_inst|trig_ctrl_inst|Add0~20_combout ;
  2199. wire \macro_inst|trig_ctrl_inst|Add0~21 ;
  2200. wire \macro_inst|trig_ctrl_inst|Add0~22_combout ;
  2201. wire \macro_inst|trig_ctrl_inst|Add0~23 ;
  2202. wire \macro_inst|trig_ctrl_inst|Add0~24_combout ;
  2203. wire \macro_inst|trig_ctrl_inst|Add0~25 ;
  2204. wire \macro_inst|trig_ctrl_inst|Add0~26_combout ;
  2205. wire \macro_inst|trig_ctrl_inst|Add0~27 ;
  2206. wire \macro_inst|trig_ctrl_inst|Add0~28_combout ;
  2207. wire \macro_inst|trig_ctrl_inst|Add0~29 ;
  2208. wire \macro_inst|trig_ctrl_inst|Add0~2_combout ;
  2209. wire \macro_inst|trig_ctrl_inst|Add0~3 ;
  2210. wire \macro_inst|trig_ctrl_inst|Add0~30_combout ;
  2211. wire \macro_inst|trig_ctrl_inst|Add0~31 ;
  2212. wire \macro_inst|trig_ctrl_inst|Add0~32_combout ;
  2213. wire \macro_inst|trig_ctrl_inst|Add0~4_combout ;
  2214. wire \macro_inst|trig_ctrl_inst|Add0~5 ;
  2215. wire \macro_inst|trig_ctrl_inst|Add0~6_combout ;
  2216. wire \macro_inst|trig_ctrl_inst|Add0~7 ;
  2217. wire \macro_inst|trig_ctrl_inst|Add0~8_combout ;
  2218. wire \macro_inst|trig_ctrl_inst|Add0~9 ;
  2219. wire \macro_inst|trig_ctrl_inst|Add3~0_combout ;
  2220. wire \macro_inst|trig_ctrl_inst|Add3~1 ;
  2221. wire \macro_inst|trig_ctrl_inst|Add3~10_combout ;
  2222. wire \macro_inst|trig_ctrl_inst|Add3~11 ;
  2223. wire \macro_inst|trig_ctrl_inst|Add3~12_combout ;
  2224. wire \macro_inst|trig_ctrl_inst|Add3~13 ;
  2225. wire \macro_inst|trig_ctrl_inst|Add3~14_combout ;
  2226. wire \macro_inst|trig_ctrl_inst|Add3~15 ;
  2227. wire \macro_inst|trig_ctrl_inst|Add3~16_combout ;
  2228. wire \macro_inst|trig_ctrl_inst|Add3~17 ;
  2229. wire \macro_inst|trig_ctrl_inst|Add3~18_combout ;
  2230. wire \macro_inst|trig_ctrl_inst|Add3~19 ;
  2231. wire \macro_inst|trig_ctrl_inst|Add3~20_combout ;
  2232. wire \macro_inst|trig_ctrl_inst|Add3~21 ;
  2233. wire \macro_inst|trig_ctrl_inst|Add3~22_combout ;
  2234. wire \macro_inst|trig_ctrl_inst|Add3~23 ;
  2235. wire \macro_inst|trig_ctrl_inst|Add3~24_combout ;
  2236. wire \macro_inst|trig_ctrl_inst|Add3~25 ;
  2237. wire \macro_inst|trig_ctrl_inst|Add3~26_combout ;
  2238. wire \macro_inst|trig_ctrl_inst|Add3~27 ;
  2239. wire \macro_inst|trig_ctrl_inst|Add3~28_combout ;
  2240. wire \macro_inst|trig_ctrl_inst|Add3~29 ;
  2241. wire \macro_inst|trig_ctrl_inst|Add3~2_combout ;
  2242. wire \macro_inst|trig_ctrl_inst|Add3~3 ;
  2243. wire \macro_inst|trig_ctrl_inst|Add3~30_combout ;
  2244. wire \macro_inst|trig_ctrl_inst|Add3~31 ;
  2245. wire \macro_inst|trig_ctrl_inst|Add3~32_combout ;
  2246. wire \macro_inst|trig_ctrl_inst|Add3~4_combout ;
  2247. wire \macro_inst|trig_ctrl_inst|Add3~5 ;
  2248. wire \macro_inst|trig_ctrl_inst|Add3~6_combout ;
  2249. wire \macro_inst|trig_ctrl_inst|Add3~7 ;
  2250. wire \macro_inst|trig_ctrl_inst|Add3~8_combout ;
  2251. wire \macro_inst|trig_ctrl_inst|Add3~9 ;
  2252. wire \macro_inst|trig_ctrl_inst|Decoder0~0_combout ;
  2253. wire \macro_inst|trig_ctrl_inst|Decoder0~1_combout ;
  2254. wire \macro_inst|trig_ctrl_inst|Decoder0~2_combout ;
  2255. wire \macro_inst|trig_ctrl_inst|Decoder1~0_combout ;
  2256. wire \macro_inst|trig_ctrl_inst|LessThan0~11_cout ;
  2257. wire \macro_inst|trig_ctrl_inst|LessThan0~13_cout ;
  2258. wire \macro_inst|trig_ctrl_inst|LessThan0~15_cout ;
  2259. wire \macro_inst|trig_ctrl_inst|LessThan0~17_cout ;
  2260. wire \macro_inst|trig_ctrl_inst|LessThan0~19_cout ;
  2261. wire \macro_inst|trig_ctrl_inst|LessThan0~1_cout ;
  2262. wire \macro_inst|trig_ctrl_inst|LessThan0~21_cout ;
  2263. wire \macro_inst|trig_ctrl_inst|LessThan0~23_cout ;
  2264. wire \macro_inst|trig_ctrl_inst|LessThan0~25_cout ;
  2265. wire \macro_inst|trig_ctrl_inst|LessThan0~27_cout ;
  2266. wire \macro_inst|trig_ctrl_inst|LessThan0~29_cout ;
  2267. wire \macro_inst|trig_ctrl_inst|LessThan0~30_combout ;
  2268. wire \macro_inst|trig_ctrl_inst|LessThan0~3_cout ;
  2269. wire \macro_inst|trig_ctrl_inst|LessThan0~5_cout ;
  2270. wire \macro_inst|trig_ctrl_inst|LessThan0~7_cout ;
  2271. wire \macro_inst|trig_ctrl_inst|LessThan0~9_cout ;
  2272. wire \macro_inst|trig_ctrl_inst|LessThan1~0_combout ;
  2273. wire \macro_inst|trig_ctrl_inst|LessThan1~1_combout ;
  2274. wire \macro_inst|trig_ctrl_inst|LessThan1~2_combout ;
  2275. wire \macro_inst|trig_ctrl_inst|LessThan2~11_cout ;
  2276. wire \macro_inst|trig_ctrl_inst|LessThan2~13_cout ;
  2277. wire \macro_inst|trig_ctrl_inst|LessThan2~15_cout ;
  2278. wire \macro_inst|trig_ctrl_inst|LessThan2~17_cout ;
  2279. wire \macro_inst|trig_ctrl_inst|LessThan2~19_cout ;
  2280. wire \macro_inst|trig_ctrl_inst|LessThan2~1_cout ;
  2281. wire \macro_inst|trig_ctrl_inst|LessThan2~21_cout ;
  2282. wire \macro_inst|trig_ctrl_inst|LessThan2~22_combout ;
  2283. wire \macro_inst|trig_ctrl_inst|LessThan2~3_cout ;
  2284. wire \macro_inst|trig_ctrl_inst|LessThan2~5_cout ;
  2285. wire \macro_inst|trig_ctrl_inst|LessThan2~7_cout ;
  2286. wire \macro_inst|trig_ctrl_inst|LessThan2~9_cout ;
  2287. wire \macro_inst|trig_ctrl_inst|LessThan3~11_cout ;
  2288. wire \macro_inst|trig_ctrl_inst|LessThan3~13_cout ;
  2289. wire \macro_inst|trig_ctrl_inst|LessThan3~15_cout ;
  2290. wire \macro_inst|trig_ctrl_inst|LessThan3~17_cout ;
  2291. wire \macro_inst|trig_ctrl_inst|LessThan3~19_cout ;
  2292. wire \macro_inst|trig_ctrl_inst|LessThan3~1_cout ;
  2293. wire \macro_inst|trig_ctrl_inst|LessThan3~21_cout ;
  2294. wire \macro_inst|trig_ctrl_inst|LessThan3~22_combout ;
  2295. wire \macro_inst|trig_ctrl_inst|LessThan3~3_cout ;
  2296. wire \macro_inst|trig_ctrl_inst|LessThan3~5_cout ;
  2297. wire \macro_inst|trig_ctrl_inst|LessThan3~7_cout ;
  2298. wire \macro_inst|trig_ctrl_inst|LessThan3~9_cout ;
  2299. wire \macro_inst|trig_ctrl_inst|LessThan4~11_cout ;
  2300. wire \macro_inst|trig_ctrl_inst|LessThan4~13_cout ;
  2301. wire \macro_inst|trig_ctrl_inst|LessThan4~15_cout ;
  2302. wire \macro_inst|trig_ctrl_inst|LessThan4~17_cout ;
  2303. wire \macro_inst|trig_ctrl_inst|LessThan4~19_cout ;
  2304. wire \macro_inst|trig_ctrl_inst|LessThan4~1_cout ;
  2305. wire \macro_inst|trig_ctrl_inst|LessThan4~21_cout ;
  2306. wire \macro_inst|trig_ctrl_inst|LessThan4~22_combout ;
  2307. wire \macro_inst|trig_ctrl_inst|LessThan4~3_cout ;
  2308. wire \macro_inst|trig_ctrl_inst|LessThan4~5_cout ;
  2309. wire \macro_inst|trig_ctrl_inst|LessThan4~7_cout ;
  2310. wire \macro_inst|trig_ctrl_inst|LessThan4~9_cout ;
  2311. wire \macro_inst|trig_ctrl_inst|LessThan5~11_cout ;
  2312. wire \macro_inst|trig_ctrl_inst|LessThan5~13_cout ;
  2313. wire \macro_inst|trig_ctrl_inst|LessThan5~15_cout ;
  2314. wire \macro_inst|trig_ctrl_inst|LessThan5~17_cout ;
  2315. wire \macro_inst|trig_ctrl_inst|LessThan5~19_cout ;
  2316. wire \macro_inst|trig_ctrl_inst|LessThan5~1_cout ;
  2317. wire \macro_inst|trig_ctrl_inst|LessThan5~21_cout ;
  2318. wire \macro_inst|trig_ctrl_inst|LessThan5~22_combout ;
  2319. wire \macro_inst|trig_ctrl_inst|LessThan5~3_cout ;
  2320. wire \macro_inst|trig_ctrl_inst|LessThan5~5_cout ;
  2321. wire \macro_inst|trig_ctrl_inst|LessThan5~7_cout ;
  2322. wire \macro_inst|trig_ctrl_inst|LessThan5~9_cout ;
  2323. wire \macro_inst|trig_ctrl_inst|LessThan6~11_cout ;
  2324. wire \macro_inst|trig_ctrl_inst|LessThan6~13_cout ;
  2325. wire \macro_inst|trig_ctrl_inst|LessThan6~15_cout ;
  2326. wire \macro_inst|trig_ctrl_inst|LessThan6~17_cout ;
  2327. wire \macro_inst|trig_ctrl_inst|LessThan6~19_cout ;
  2328. wire \macro_inst|trig_ctrl_inst|LessThan6~1_cout ;
  2329. wire \macro_inst|trig_ctrl_inst|LessThan6~21_cout ;
  2330. wire \macro_inst|trig_ctrl_inst|LessThan6~23_cout ;
  2331. wire \macro_inst|trig_ctrl_inst|LessThan6~25_cout ;
  2332. wire \macro_inst|trig_ctrl_inst|LessThan6~27_cout ;
  2333. wire \macro_inst|trig_ctrl_inst|LessThan6~29_cout ;
  2334. wire \macro_inst|trig_ctrl_inst|LessThan6~30_combout ;
  2335. wire \macro_inst|trig_ctrl_inst|LessThan6~3_cout ;
  2336. wire \macro_inst|trig_ctrl_inst|LessThan6~5_cout ;
  2337. wire \macro_inst|trig_ctrl_inst|LessThan6~7_cout ;
  2338. wire \macro_inst|trig_ctrl_inst|LessThan6~9_cout ;
  2339. wire \macro_inst|trig_ctrl_inst|LessThan7~0_combout ;
  2340. wire \macro_inst|trig_ctrl_inst|LessThan7~1_combout ;
  2341. wire \macro_inst|trig_ctrl_inst|LessThan7~2_combout ;
  2342. wire \macro_inst|trig_ctrl_inst|LessThan7~3_combout ;
  2343. wire \macro_inst|trig_ctrl_inst|Selector0~0_combout ;
  2344. wire \macro_inst|trig_ctrl_inst|Selector0~10_combout ;
  2345. wire \macro_inst|trig_ctrl_inst|Selector0~1_combout ;
  2346. wire \macro_inst|trig_ctrl_inst|Selector0~2_combout ;
  2347. wire \macro_inst|trig_ctrl_inst|Selector0~3_combout ;
  2348. wire \macro_inst|trig_ctrl_inst|Selector0~4_combout ;
  2349. wire \macro_inst|trig_ctrl_inst|Selector0~5_combout ;
  2350. wire \macro_inst|trig_ctrl_inst|Selector0~6_combout ;
  2351. wire \macro_inst|trig_ctrl_inst|Selector0~7_combout ;
  2352. wire \macro_inst|trig_ctrl_inst|Selector0~8_combout ;
  2353. wire \macro_inst|trig_ctrl_inst|Selector0~9_combout ;
  2354. wire \macro_inst|trig_ctrl_inst|Selector1~0_combout ;
  2355. wire \macro_inst|trig_ctrl_inst|Selector1~1_combout ;
  2356. wire \macro_inst|trig_ctrl_inst|Selector2~1_combout ;
  2357. wire \macro_inst|trig_ctrl_inst|Selector2~2_combout ;
  2358. wire \macro_inst|trig_ctrl_inst|Selector3~0_combout ;
  2359. wire \macro_inst|trig_ctrl_inst|Selector3~1_combout ;
  2360. wire \macro_inst|trig_ctrl_inst|Selector4~0_combout ;
  2361. wire \macro_inst|trig_ctrl_inst|Selector4~1_combout ;
  2362. wire \macro_inst|trig_ctrl_inst|Selector5~0_combout ;
  2363. wire \macro_inst|trig_ctrl_inst|WideOr0~0_combout ;
  2364. wire \macro_inst|trig_ctrl_inst|WideOr0~1_combout ;
  2365. wire \macro_inst|trig_ctrl_inst|WideOr1~0_combout ;
  2366. wire \macro_inst|trig_ctrl_inst|WideOr1~1_combout ;
  2367. wire \macro_inst|trig_ctrl_inst|WideOr2~0_combout ;
  2368. wire \macro_inst|trig_ctrl_inst|WideOr2~1_combout ;
  2369. wire \macro_inst|trig_ctrl_inst|WideOr3~0_combout ;
  2370. wire \macro_inst|trig_ctrl_inst|WideOr3~1_combout ;
  2371. wire \macro_inst|trig_ctrl_inst|WideOr4~0_combout ;
  2372. wire \macro_inst|trig_ctrl_inst|WideOr4~1_combout ;
  2373. wire \macro_inst|trig_ctrl_inst|WideOr5~0_combout ;
  2374. wire \macro_inst|trig_ctrl_inst|WideOr5~1_combout ;
  2375. wire \macro_inst|trig_ctrl_inst|WideOr6~0_combout ;
  2376. wire \macro_inst|trig_ctrl_inst|WideOr6~1_combout ;
  2377. wire \macro_inst|trig_ctrl_inst|WideOr7~0_combout ;
  2378. wire \macro_inst|trig_ctrl_inst|WideOr7~1_combout ;
  2379. wire \macro_inst|trig_ctrl_inst|WideOr8~0_combout ;
  2380. wire \macro_inst|trig_ctrl_inst|WideOr8~1_combout ;
  2381. wire [11:0] \macro_inst|trig_ctrl_inst|adc_data_prev ;
  2382. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [0];
  2383. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [10];
  2384. wire \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout ;
  2385. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [11];
  2386. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [1];
  2387. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [2];
  2388. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [3];
  2389. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [4];
  2390. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [5];
  2391. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [6];
  2392. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [7];
  2393. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [8];
  2394. //wire \macro_inst|trig_ctrl_inst|adc_data_prev [9];
  2395. wire \macro_inst|trig_ctrl_inst|adc_data_prev~0_combout ;
  2396. wire \macro_inst|trig_ctrl_inst|adc_data_prev~10_combout ;
  2397. wire \macro_inst|trig_ctrl_inst|adc_data_prev~11_combout ;
  2398. wire \macro_inst|trig_ctrl_inst|adc_data_prev~12_combout ;
  2399. wire \macro_inst|trig_ctrl_inst|adc_data_prev~2_combout ;
  2400. wire \macro_inst|trig_ctrl_inst|adc_data_prev~3_combout ;
  2401. wire \macro_inst|trig_ctrl_inst|adc_data_prev~4_combout ;
  2402. wire \macro_inst|trig_ctrl_inst|adc_data_prev~5_combout ;
  2403. wire \macro_inst|trig_ctrl_inst|adc_data_prev~6_combout ;
  2404. wire \macro_inst|trig_ctrl_inst|adc_data_prev~7_combout ;
  2405. wire \macro_inst|trig_ctrl_inst|adc_data_prev~8_combout ;
  2406. wire \macro_inst|trig_ctrl_inst|adc_data_prev~9_combout ;
  2407. wire \macro_inst|trig_ctrl_inst|adc_eoc_sync1~q ;
  2408. wire \macro_inst|trig_ctrl_inst|adc_eoc_sync2~q ;
  2409. wire \macro_inst|trig_ctrl_inst|adc_restart_ris~combout ;
  2410. wire \macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ;
  2411. wire \macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ;
  2412. wire \macro_inst|trig_ctrl_inst|adc_rst_sync1~q ;
  2413. wire \macro_inst|trig_ctrl_inst|adc_rst_sync2~q ;
  2414. wire \macro_inst|trig_ctrl_inst|adc_rst_sync3~q ;
  2415. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0_combout ;
  2416. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~1 ;
  2417. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2_combout ;
  2418. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~3 ;
  2419. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4_combout ;
  2420. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~5 ;
  2421. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6_combout ;
  2422. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~7 ;
  2423. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8_combout ;
  2424. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~9 ;
  2425. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10_combout ;
  2426. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~11 ;
  2427. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12_combout ;
  2428. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~13 ;
  2429. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14_combout ;
  2430. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~15 ;
  2431. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16_combout ;
  2432. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~17 ;
  2433. wire \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18_combout ;
  2434. wire \macro_inst|trig_ctrl_inst|always11~2_combout ;
  2435. wire \macro_inst|trig_ctrl_inst|always1~1_combout ;
  2436. wire \macro_inst|trig_ctrl_inst|always1~2_combout ;
  2437. wire \macro_inst|trig_ctrl_inst|always4~0_combout ;
  2438. wire \macro_inst|trig_ctrl_inst|always4~1_combout ;
  2439. wire \macro_inst|trig_ctrl_inst|always4~2_combout ;
  2440. wire \macro_inst|trig_ctrl_inst|always5~0_combout ;
  2441. wire \macro_inst|trig_ctrl_inst|always5~1_combout ;
  2442. wire \macro_inst|trig_ctrl_inst|always5~2_combout ;
  2443. wire \macro_inst|trig_ctrl_inst|always5~3_combout ;
  2444. wire \macro_inst|trig_ctrl_inst|always9~0_combout ;
  2445. wire [9:0] \macro_inst|trig_ctrl_inst|auto_wait_cnt ;
  2446. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [0];
  2447. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[0]~12_combout ;
  2448. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[0]~13 ;
  2449. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [1];
  2450. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[1]~14_combout ;
  2451. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[1]~15 ;
  2452. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [2];
  2453. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[2]~16_combout ;
  2454. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[2]~17 ;
  2455. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [3];
  2456. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[3]~18_combout ;
  2457. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[3]~19 ;
  2458. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [4];
  2459. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[4]~20_combout ;
  2460. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[4]~21 ;
  2461. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [5];
  2462. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[5]~22_combout ;
  2463. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[5]~23 ;
  2464. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [6];
  2465. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[6]~24_combout ;
  2466. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[6]~25 ;
  2467. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [7];
  2468. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~26_combout ;
  2469. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~27 ;
  2470. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32_combout ;
  2471. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33_combout ;
  2472. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34_combout ;
  2473. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout ;
  2474. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout ;
  2475. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ;
  2476. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [8];
  2477. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[8]~28_combout ;
  2478. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[8]~29 ;
  2479. //wire \macro_inst|trig_ctrl_inst|auto_wait_cnt [9];
  2480. wire \macro_inst|trig_ctrl_inst|auto_wait_cnt[9]~30_combout ;
  2481. wire \macro_inst|trig_ctrl_inst|curr_state.DONE~q ;
  2482. wire \macro_inst|trig_ctrl_inst|curr_state.IDLE~q ;
  2483. wire \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ;
  2484. wire \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ;
  2485. wire \macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ;
  2486. wire [15:0] \macro_inst|trig_ctrl_inst|decim_factor ;
  2487. //wire \macro_inst|trig_ctrl_inst|decim_factor [0];
  2488. //wire \macro_inst|trig_ctrl_inst|decim_factor [10];
  2489. //wire \macro_inst|trig_ctrl_inst|decim_factor [11];
  2490. //wire \macro_inst|trig_ctrl_inst|decim_factor [12];
  2491. //wire \macro_inst|trig_ctrl_inst|decim_factor [13];
  2492. //wire \macro_inst|trig_ctrl_inst|decim_factor [14];
  2493. //wire \macro_inst|trig_ctrl_inst|decim_factor [15];
  2494. //wire \macro_inst|trig_ctrl_inst|decim_factor [1];
  2495. //wire \macro_inst|trig_ctrl_inst|decim_factor [2];
  2496. //wire \macro_inst|trig_ctrl_inst|decim_factor [3];
  2497. //wire \macro_inst|trig_ctrl_inst|decim_factor [4];
  2498. //wire \macro_inst|trig_ctrl_inst|decim_factor [5];
  2499. //wire \macro_inst|trig_ctrl_inst|decim_factor [6];
  2500. //wire \macro_inst|trig_ctrl_inst|decim_factor [7];
  2501. //wire \macro_inst|trig_ctrl_inst|decim_factor [8];
  2502. //wire \macro_inst|trig_ctrl_inst|decim_factor [9];
  2503. wire \macro_inst|trig_ctrl_inst|decim_factor~0_combout ;
  2504. wire \macro_inst|trig_ctrl_inst|decim_factor~1_combout ;
  2505. wire \macro_inst|trig_ctrl_inst|decim_factor~2_combout ;
  2506. wire \macro_inst|trig_ctrl_inst|edge_trigger~0_combout ;
  2507. wire \macro_inst|trig_ctrl_inst|edge_trigger~1_combout ;
  2508. wire \macro_inst|trig_ctrl_inst|edge_trigger~2_combout ;
  2509. wire \macro_inst|trig_ctrl_inst|edge_trigger~3_combout ;
  2510. wire \macro_inst|trig_ctrl_inst|edge_trigger~4_combout ;
  2511. wire [15:0] \macro_inst|trig_ctrl_inst|eoc_cnt ;
  2512. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [0];
  2513. wire \macro_inst|trig_ctrl_inst|eoc_cnt[0]~18_combout ;
  2514. wire \macro_inst|trig_ctrl_inst|eoc_cnt[0]~19 ;
  2515. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [10];
  2516. wire \macro_inst|trig_ctrl_inst|eoc_cnt[10]~38_combout ;
  2517. wire \macro_inst|trig_ctrl_inst|eoc_cnt[10]~39 ;
  2518. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [11];
  2519. wire \macro_inst|trig_ctrl_inst|eoc_cnt[11]~40_combout ;
  2520. wire \macro_inst|trig_ctrl_inst|eoc_cnt[11]~41 ;
  2521. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [12];
  2522. wire \macro_inst|trig_ctrl_inst|eoc_cnt[12]~42_combout ;
  2523. wire \macro_inst|trig_ctrl_inst|eoc_cnt[12]~43 ;
  2524. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [13];
  2525. wire \macro_inst|trig_ctrl_inst|eoc_cnt[13]~44_combout ;
  2526. wire \macro_inst|trig_ctrl_inst|eoc_cnt[13]~45 ;
  2527. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [14];
  2528. wire \macro_inst|trig_ctrl_inst|eoc_cnt[14]~46_combout ;
  2529. wire \macro_inst|trig_ctrl_inst|eoc_cnt[14]~47 ;
  2530. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [15];
  2531. wire \macro_inst|trig_ctrl_inst|eoc_cnt[15]~48_combout ;
  2532. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [1];
  2533. wire \macro_inst|trig_ctrl_inst|eoc_cnt[1]~20_combout ;
  2534. wire \macro_inst|trig_ctrl_inst|eoc_cnt[1]~21 ;
  2535. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [2];
  2536. wire \macro_inst|trig_ctrl_inst|eoc_cnt[2]~22_combout ;
  2537. wire \macro_inst|trig_ctrl_inst|eoc_cnt[2]~23 ;
  2538. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [3];
  2539. wire \macro_inst|trig_ctrl_inst|eoc_cnt[3]~24_combout ;
  2540. wire \macro_inst|trig_ctrl_inst|eoc_cnt[3]~25 ;
  2541. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [4];
  2542. wire \macro_inst|trig_ctrl_inst|eoc_cnt[4]~26_combout ;
  2543. wire \macro_inst|trig_ctrl_inst|eoc_cnt[4]~27 ;
  2544. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [5];
  2545. wire \macro_inst|trig_ctrl_inst|eoc_cnt[5]~28_combout ;
  2546. wire \macro_inst|trig_ctrl_inst|eoc_cnt[5]~29 ;
  2547. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [6];
  2548. wire \macro_inst|trig_ctrl_inst|eoc_cnt[6]~30_combout ;
  2549. wire \macro_inst|trig_ctrl_inst|eoc_cnt[6]~31 ;
  2550. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [7];
  2551. wire \macro_inst|trig_ctrl_inst|eoc_cnt[7]~32_combout ;
  2552. wire \macro_inst|trig_ctrl_inst|eoc_cnt[7]~33 ;
  2553. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [8];
  2554. wire \macro_inst|trig_ctrl_inst|eoc_cnt[8]~34_combout ;
  2555. wire \macro_inst|trig_ctrl_inst|eoc_cnt[8]~35 ;
  2556. wire \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout ;
  2557. wire \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout ;
  2558. wire \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ;
  2559. //wire \macro_inst|trig_ctrl_inst|eoc_cnt [9];
  2560. wire \macro_inst|trig_ctrl_inst|eoc_cnt[9]~36_combout ;
  2561. wire \macro_inst|trig_ctrl_inst|eoc_cnt[9]~37 ;
  2562. wire [10:0] \macro_inst|trig_ctrl_inst|gap_cnt_auto ;
  2563. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [0];
  2564. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[0]~11_combout ;
  2565. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[0]~12 ;
  2566. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [10];
  2567. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[10]~36_combout ;
  2568. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [1];
  2569. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[1]~18_combout ;
  2570. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[1]~19 ;
  2571. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [2];
  2572. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13_combout ;
  2573. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14_combout ;
  2574. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout ;
  2575. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ;
  2576. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16_combout ;
  2577. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout ;
  2578. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~20_combout ;
  2579. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~21 ;
  2580. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [3];
  2581. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[3]~22_combout ;
  2582. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[3]~23 ;
  2583. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [4];
  2584. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[4]~24_combout ;
  2585. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[4]~25 ;
  2586. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [5];
  2587. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[5]~26_combout ;
  2588. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[5]~27 ;
  2589. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [6];
  2590. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[6]~28_combout ;
  2591. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[6]~29 ;
  2592. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [7];
  2593. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[7]~30_combout ;
  2594. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[7]~31 ;
  2595. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [8];
  2596. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[8]~32_combout ;
  2597. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[8]~33 ;
  2598. //wire \macro_inst|trig_ctrl_inst|gap_cnt_auto [9];
  2599. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[9]~34_combout ;
  2600. wire \macro_inst|trig_ctrl_inst|gap_cnt_auto[9]~35 ;
  2601. wire [9:0] \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge ;
  2602. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [0];
  2603. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [1];
  2604. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [2];
  2605. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [3];
  2606. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [4];
  2607. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [5];
  2608. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [6];
  2609. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [7];
  2610. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [8];
  2611. //wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [9];
  2612. wire \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge~0_combout ;
  2613. wire [8:0] \macro_inst|trig_ctrl_inst|post_trig_cnt ;
  2614. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [0];
  2615. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[0]~10 ;
  2616. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[0]~9_combout ;
  2617. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [1];
  2618. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[1]~12_combout ;
  2619. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[1]~13 ;
  2620. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [2];
  2621. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[2]~14_combout ;
  2622. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[2]~15 ;
  2623. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [3];
  2624. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[3]~16_combout ;
  2625. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[3]~17 ;
  2626. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [4];
  2627. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[4]~18_combout ;
  2628. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[4]~19 ;
  2629. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [5];
  2630. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[5]~20_combout ;
  2631. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[5]~21 ;
  2632. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [6];
  2633. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[6]~22_combout ;
  2634. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[6]~23 ;
  2635. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [7];
  2636. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[7]~24_combout ;
  2637. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[7]~25 ;
  2638. //wire \macro_inst|trig_ctrl_inst|post_trig_cnt [8];
  2639. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout ;
  2640. wire \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~26_combout ;
  2641. wire [31:0] \macro_inst|trig_ctrl_inst|prdata ;
  2642. //wire \macro_inst|trig_ctrl_inst|prdata [0];
  2643. //wire \macro_inst|trig_ctrl_inst|prdata [10];
  2644. //wire \macro_inst|trig_ctrl_inst|prdata [11];
  2645. //wire \macro_inst|trig_ctrl_inst|prdata [12];
  2646. //wire \macro_inst|trig_ctrl_inst|prdata [13];
  2647. //wire \macro_inst|trig_ctrl_inst|prdata [14];
  2648. //wire \macro_inst|trig_ctrl_inst|prdata [15];
  2649. //wire \macro_inst|trig_ctrl_inst|prdata [16];
  2650. //wire \macro_inst|trig_ctrl_inst|prdata [17];
  2651. //wire \macro_inst|trig_ctrl_inst|prdata [18];
  2652. //wire \macro_inst|trig_ctrl_inst|prdata [19];
  2653. //wire \macro_inst|trig_ctrl_inst|prdata [1];
  2654. //wire \macro_inst|trig_ctrl_inst|prdata [20];
  2655. //wire \macro_inst|trig_ctrl_inst|prdata [21];
  2656. //wire \macro_inst|trig_ctrl_inst|prdata [22];
  2657. //wire \macro_inst|trig_ctrl_inst|prdata [23];
  2658. //wire \macro_inst|trig_ctrl_inst|prdata [24];
  2659. //wire \macro_inst|trig_ctrl_inst|prdata [25];
  2660. //wire \macro_inst|trig_ctrl_inst|prdata [26];
  2661. //wire \macro_inst|trig_ctrl_inst|prdata [27];
  2662. //wire \macro_inst|trig_ctrl_inst|prdata [28];
  2663. //wire \macro_inst|trig_ctrl_inst|prdata [29];
  2664. //wire \macro_inst|trig_ctrl_inst|prdata [2];
  2665. //wire \macro_inst|trig_ctrl_inst|prdata [30];
  2666. //wire \macro_inst|trig_ctrl_inst|prdata [31];
  2667. //wire \macro_inst|trig_ctrl_inst|prdata [3];
  2668. //wire \macro_inst|trig_ctrl_inst|prdata [4];
  2669. //wire \macro_inst|trig_ctrl_inst|prdata [5];
  2670. //wire \macro_inst|trig_ctrl_inst|prdata [6];
  2671. //wire \macro_inst|trig_ctrl_inst|prdata [7];
  2672. //wire \macro_inst|trig_ctrl_inst|prdata [8];
  2673. //wire \macro_inst|trig_ctrl_inst|prdata [9];
  2674. wire \macro_inst|trig_ctrl_inst|prdata~0_combout ;
  2675. wire \macro_inst|trig_ctrl_inst|prdata~1_combout ;
  2676. wire \macro_inst|trig_ctrl_inst|prdata~2_combout ;
  2677. wire \macro_inst|trig_ctrl_inst|prdata~3_combout ;
  2678. wire \macro_inst|trig_ctrl_inst|prdata~4_combout ;
  2679. wire \macro_inst|trig_ctrl_inst|prdata~5_combout ;
  2680. wire \macro_inst|trig_ctrl_inst|prdata~6_combout ;
  2681. wire \macro_inst|trig_ctrl_inst|prdata~7_combout ;
  2682. wire \macro_inst|trig_ctrl_inst|prdata~8_combout ;
  2683. wire \macro_inst|trig_ctrl_inst|pulse_active~0_combout ;
  2684. wire \macro_inst|trig_ctrl_inst|pulse_active~1_combout ;
  2685. wire \macro_inst|trig_ctrl_inst|pulse_active~2_combout ;
  2686. wire \macro_inst|trig_ctrl_inst|pulse_active~3_combout ;
  2687. wire \macro_inst|trig_ctrl_inst|pulse_active~q ;
  2688. wire [15:0] \macro_inst|trig_ctrl_inst|pulse_cnt ;
  2689. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [0];
  2690. wire \macro_inst|trig_ctrl_inst|pulse_cnt[0]~19_combout ;
  2691. wire \macro_inst|trig_ctrl_inst|pulse_cnt[0]~20 ;
  2692. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [10];
  2693. wire \macro_inst|trig_ctrl_inst|pulse_cnt[10]~39_combout ;
  2694. wire \macro_inst|trig_ctrl_inst|pulse_cnt[10]~40 ;
  2695. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [11];
  2696. wire \macro_inst|trig_ctrl_inst|pulse_cnt[11]~41_combout ;
  2697. wire \macro_inst|trig_ctrl_inst|pulse_cnt[11]~42 ;
  2698. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [12];
  2699. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18_combout ;
  2700. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~43_combout ;
  2701. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~44 ;
  2702. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout ;
  2703. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ;
  2704. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52_combout ;
  2705. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53_combout ;
  2706. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout ;
  2707. wire \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55_combout ;
  2708. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [13];
  2709. wire \macro_inst|trig_ctrl_inst|pulse_cnt[13]~45_combout ;
  2710. wire \macro_inst|trig_ctrl_inst|pulse_cnt[13]~46 ;
  2711. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [14];
  2712. wire \macro_inst|trig_ctrl_inst|pulse_cnt[14]~47_combout ;
  2713. wire \macro_inst|trig_ctrl_inst|pulse_cnt[14]~48 ;
  2714. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [15];
  2715. wire \macro_inst|trig_ctrl_inst|pulse_cnt[15]~49_combout ;
  2716. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [1];
  2717. wire \macro_inst|trig_ctrl_inst|pulse_cnt[1]~21_combout ;
  2718. wire \macro_inst|trig_ctrl_inst|pulse_cnt[1]~22 ;
  2719. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [2];
  2720. wire \macro_inst|trig_ctrl_inst|pulse_cnt[2]~23_combout ;
  2721. wire \macro_inst|trig_ctrl_inst|pulse_cnt[2]~24 ;
  2722. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [3];
  2723. wire \macro_inst|trig_ctrl_inst|pulse_cnt[3]~25_combout ;
  2724. wire \macro_inst|trig_ctrl_inst|pulse_cnt[3]~26 ;
  2725. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [4];
  2726. wire \macro_inst|trig_ctrl_inst|pulse_cnt[4]~27_combout ;
  2727. wire \macro_inst|trig_ctrl_inst|pulse_cnt[4]~28 ;
  2728. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [5];
  2729. wire \macro_inst|trig_ctrl_inst|pulse_cnt[5]~29_combout ;
  2730. wire \macro_inst|trig_ctrl_inst|pulse_cnt[5]~30 ;
  2731. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [6];
  2732. wire \macro_inst|trig_ctrl_inst|pulse_cnt[6]~31_combout ;
  2733. wire \macro_inst|trig_ctrl_inst|pulse_cnt[6]~32 ;
  2734. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [7];
  2735. wire \macro_inst|trig_ctrl_inst|pulse_cnt[7]~33_combout ;
  2736. wire \macro_inst|trig_ctrl_inst|pulse_cnt[7]~34 ;
  2737. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [8];
  2738. wire \macro_inst|trig_ctrl_inst|pulse_cnt[8]~35_combout ;
  2739. wire \macro_inst|trig_ctrl_inst|pulse_cnt[8]~36 ;
  2740. //wire \macro_inst|trig_ctrl_inst|pulse_cnt [9];
  2741. wire \macro_inst|trig_ctrl_inst|pulse_cnt[9]~37_combout ;
  2742. wire \macro_inst|trig_ctrl_inst|pulse_cnt[9]~38 ;
  2743. wire \macro_inst|trig_ctrl_inst|pulse_level~2_combout ;
  2744. wire \macro_inst|trig_ctrl_inst|pulse_level~3_combout ;
  2745. wire \macro_inst|trig_ctrl_inst|pulse_level~4_combout ;
  2746. wire \macro_inst|trig_ctrl_inst|pulse_level~q ;
  2747. wire \macro_inst|trig_ctrl_inst|pulse_trigger~0_combout ;
  2748. wire \macro_inst|trig_ctrl_inst|pulse_trigger~q ;
  2749. wire [9:0] \macro_inst|trig_ctrl_inst|ram_wr_addr ;
  2750. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [0];
  2751. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[0]~10_combout ;
  2752. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[0]~11 ;
  2753. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [1];
  2754. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[1]~13_combout ;
  2755. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[1]~14 ;
  2756. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [2];
  2757. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[2]~15_combout ;
  2758. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[2]~16 ;
  2759. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [3];
  2760. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[3]~17_combout ;
  2761. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[3]~18 ;
  2762. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [4];
  2763. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[4]~19_combout ;
  2764. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[4]~20 ;
  2765. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [5];
  2766. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[5]~21_combout ;
  2767. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[5]~22 ;
  2768. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [6];
  2769. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout ;
  2770. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[6]~23_combout ;
  2771. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[6]~24 ;
  2772. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [7];
  2773. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[7]~25_combout ;
  2774. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[7]~26 ;
  2775. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [8];
  2776. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[8]~27_combout ;
  2777. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[8]~28 ;
  2778. //wire \macro_inst|trig_ctrl_inst|ram_wr_addr [9];
  2779. wire \macro_inst|trig_ctrl_inst|ram_wr_addr[9]~29_combout ;
  2780. wire [15:0] \macro_inst|trig_ctrl_inst|ram_wr_data_b ;
  2781. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [0];
  2782. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[0]~feeder_combout ;
  2783. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [10];
  2784. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[10]~feeder_combout ;
  2785. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [11];
  2786. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[11]~feeder_combout ;
  2787. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [12];
  2788. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [13];
  2789. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [14];
  2790. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [15];
  2791. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [1];
  2792. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[1]~feeder_combout ;
  2793. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [2];
  2794. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[2]~feeder_combout ;
  2795. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [3];
  2796. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[3]~feeder_combout ;
  2797. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [4];
  2798. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[4]~feeder_combout ;
  2799. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [5];
  2800. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[5]~feeder_combout ;
  2801. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [6];
  2802. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[6]~feeder_combout ;
  2803. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [7];
  2804. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[7]~feeder_combout ;
  2805. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [8];
  2806. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[8]~feeder_combout ;
  2807. //wire \macro_inst|trig_ctrl_inst|ram_wr_data_b [9];
  2808. wire \macro_inst|trig_ctrl_inst|ram_wr_data_b[9]~feeder_combout ;
  2809. wire \macro_inst|trig_ctrl_inst|ram_wren_b~0_combout ;
  2810. wire \macro_inst|trig_ctrl_inst|ram_wren_b~feeder_combout ;
  2811. wire \macro_inst|trig_ctrl_inst|ram_wren_b~q ;
  2812. wire \macro_inst|trig_ctrl_inst|sample_valid~combout ;
  2813. wire \macro_inst|trig_ctrl_inst|single_shot_lock~2_combout ;
  2814. wire \macro_inst|trig_ctrl_inst|single_shot_lock~3_combout ;
  2815. wire \macro_inst|trig_ctrl_inst|single_shot_lock~q ;
  2816. wire \macro_inst|trig_ctrl_inst|trig_done~0_combout ;
  2817. wire \macro_inst|trig_ctrl_inst|trig_done~q ;
  2818. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~0_combout ;
  2819. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~1_combout ;
  2820. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~2_combout ;
  2821. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ;
  2822. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~4_combout ;
  2823. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ;
  2824. wire \macro_inst|trig_ctrl_inst|trig_hit_comb~6_combout ;
  2825. wire \macro_inst|trig_ctrl_inst|trig_hit_reg~q ;
  2826. wire [9:0] \macro_inst|trig_ctrl_inst|trigger_ptr ;
  2827. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [0];
  2828. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [1];
  2829. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [2];
  2830. wire \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1_combout ;
  2831. wire \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout ;
  2832. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [3];
  2833. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [4];
  2834. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [5];
  2835. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [6];
  2836. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [7];
  2837. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [8];
  2838. //wire \macro_inst|trig_ctrl_inst|trigger_ptr [9];
  2839. wire \macro_inst|trig_ctrl_inst|trigger_ptr~0_combout ;
  2840. wire \macro_inst|trig_ctrl_inst|trigger_ptr~10_combout ;
  2841. wire \macro_inst|trig_ctrl_inst|trigger_ptr~11_combout ;
  2842. wire \macro_inst|trig_ctrl_inst|trigger_ptr~3_combout ;
  2843. wire \macro_inst|trig_ctrl_inst|trigger_ptr~4_combout ;
  2844. wire \macro_inst|trig_ctrl_inst|trigger_ptr~5_combout ;
  2845. wire \macro_inst|trig_ctrl_inst|trigger_ptr~6_combout ;
  2846. wire \macro_inst|trig_ctrl_inst|trigger_ptr~7_combout ;
  2847. wire \macro_inst|trig_ctrl_inst|trigger_ptr~8_combout ;
  2848. wire \macro_inst|trig_ctrl_inst|trigger_ptr~9_combout ;
  2849. wire \macro_inst|trig_ctrl_inst|write_strobe~0_combout ;
  2850. wire \macro_inst|trig_ctrl_inst|write_strobe~q ;
  2851. wire \macro_inst|u_apb2ram|ram_rden~0_combout ;
  2852. wire \macro_inst|u_apb2ram|ram_wren~0_combout ;
  2853. wire [15:0] \macro_inst|u_dual_port_ram|auto_generated|q_a ;
  2854. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [0];
  2855. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [10];
  2856. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [11];
  2857. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [12];
  2858. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [13];
  2859. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [14];
  2860. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [15];
  2861. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [1];
  2862. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [2];
  2863. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [3];
  2864. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [4];
  2865. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [5];
  2866. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [6];
  2867. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [7];
  2868. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [8];
  2869. //wire \macro_inst|u_dual_port_ram|auto_generated|q_a [9];
  2870. wire [8:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus ;
  2871. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [0];
  2872. wire [17:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA ;
  2873. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [9];
  2874. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [1];
  2875. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [10];
  2876. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [2];
  2877. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [11];
  2878. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [3];
  2879. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [12];
  2880. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [4];
  2881. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [13];
  2882. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [5];
  2883. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [14];
  2884. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [6];
  2885. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [15];
  2886. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [7];
  2887. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [16];
  2888. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0_PORTADATAOUT_bus [8];
  2889. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [7];
  2890. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [0];
  2891. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [17];
  2892. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [1];
  2893. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [2];
  2894. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [3];
  2895. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [4];
  2896. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [5];
  2897. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [6];
  2898. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [8];
  2899. wire [17:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB ;
  2900. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [0];
  2901. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [10];
  2902. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [11];
  2903. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [12];
  2904. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [13];
  2905. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [14];
  2906. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [15];
  2907. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [16];
  2908. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [17];
  2909. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [1];
  2910. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [2];
  2911. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [3];
  2912. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [4];
  2913. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [5];
  2914. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [6];
  2915. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [7];
  2916. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [8];
  2917. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [9];
  2918. wire [8:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus ;
  2919. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [0];
  2920. wire [17:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA ;
  2921. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [9];
  2922. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [1];
  2923. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [10];
  2924. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [2];
  2925. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [11];
  2926. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [3];
  2927. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [12];
  2928. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [4];
  2929. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [13];
  2930. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [5];
  2931. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [14];
  2932. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [6];
  2933. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [15];
  2934. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [7];
  2935. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [16];
  2936. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9_PORTADATAOUT_bus [8];
  2937. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [7];
  2938. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [0];
  2939. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [17];
  2940. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [1];
  2941. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [2];
  2942. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [3];
  2943. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [4];
  2944. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [5];
  2945. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [6];
  2946. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [8];
  2947. wire [17:0] \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB ;
  2948. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [0];
  2949. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [10];
  2950. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [11];
  2951. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [12];
  2952. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [13];
  2953. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [14];
  2954. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [15];
  2955. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [16];
  2956. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [17];
  2957. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [1];
  2958. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [2];
  2959. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [3];
  2960. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [4];
  2961. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [5];
  2962. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [6];
  2963. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [7];
  2964. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [8];
  2965. //wire \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [9];
  2966. wire [4:0] \pll_inst|auto_generated|clk ;
  2967. //wire \pll_inst|auto_generated|clk [0];
  2968. //wire \pll_inst|auto_generated|clk [1];
  2969. //wire \pll_inst|auto_generated|clk [2];
  2970. //wire \pll_inst|auto_generated|clk [3];
  2971. //wire \pll_inst|auto_generated|clk [4];
  2972. wire [4:0] \pll_inst|auto_generated|pll1_CLK_bus ;
  2973. //wire \pll_inst|auto_generated|pll1_CLK_bus [0];
  2974. //wire \pll_inst|auto_generated|pll1_CLK_bus [1];
  2975. //wire \pll_inst|auto_generated|pll1_CLK_bus [2];
  2976. //wire \pll_inst|auto_generated|pll1_CLK_bus [3];
  2977. //wire \pll_inst|auto_generated|pll1_CLK_bus [4];
  2978. wire \pll_inst|auto_generated|pll1~FBOUT ;
  2979. wire \pll_inst|auto_generated|pll_lock_sync~feeder_combout ;
  2980. wire \pll_inst|auto_generated|pll_lock_sync~q ;
  2981. wire \rv32.dmactive ;
  2982. wire \rv32.ext_dma_DMACCLR[0] ;
  2983. wire \rv32.ext_dma_DMACCLR[1] ;
  2984. wire \rv32.ext_dma_DMACCLR[2] ;
  2985. wire \rv32.ext_dma_DMACCLR[3] ;
  2986. wire \rv32.ext_dma_DMACTC[0] ;
  2987. wire \rv32.ext_dma_DMACTC[1] ;
  2988. wire \rv32.ext_dma_DMACTC[2] ;
  2989. wire \rv32.ext_dma_DMACTC[3] ;
  2990. wire \rv32.gpio0_io_out_data[0] ;
  2991. wire \rv32.gpio0_io_out_data[1] ;
  2992. wire \rv32.gpio0_io_out_data[2] ;
  2993. wire \rv32.gpio0_io_out_data[3] ;
  2994. wire \rv32.gpio0_io_out_data[4] ;
  2995. wire \rv32.gpio0_io_out_data[5] ;
  2996. wire \rv32.gpio0_io_out_data[6] ;
  2997. wire \rv32.gpio0_io_out_data[7] ;
  2998. wire \rv32.gpio0_io_out_en[0] ;
  2999. wire \rv32.gpio0_io_out_en[1] ;
  3000. wire \rv32.gpio0_io_out_en[2] ;
  3001. wire \rv32.gpio0_io_out_en[3] ;
  3002. wire \rv32.gpio0_io_out_en[4] ;
  3003. wire \rv32.gpio0_io_out_en[5] ;
  3004. wire \rv32.gpio0_io_out_en[6] ;
  3005. wire \rv32.gpio0_io_out_en[7] ;
  3006. wire \rv32.gpio1_io_out_data[0] ;
  3007. wire \rv32.gpio1_io_out_data[1] ;
  3008. wire \rv32.gpio1_io_out_data[2] ;
  3009. wire \rv32.gpio1_io_out_data[3] ;
  3010. wire \rv32.gpio1_io_out_data[4] ;
  3011. wire \rv32.gpio1_io_out_data[5] ;
  3012. wire \rv32.gpio1_io_out_data[6] ;
  3013. wire \rv32.gpio1_io_out_data[7] ;
  3014. wire \rv32.gpio1_io_out_en[0] ;
  3015. wire \rv32.gpio1_io_out_en[1] ;
  3016. wire \rv32.gpio1_io_out_en[2] ;
  3017. wire \rv32.gpio1_io_out_en[3] ;
  3018. wire \rv32.gpio1_io_out_en[4] ;
  3019. wire \rv32.gpio1_io_out_en[5] ;
  3020. wire \rv32.gpio1_io_out_en[6] ;
  3021. wire \rv32.gpio1_io_out_en[7] ;
  3022. wire \rv32.gpio2_io_out_data[0] ;
  3023. wire \rv32.gpio2_io_out_data[1] ;
  3024. wire \rv32.gpio2_io_out_data[2] ;
  3025. wire \rv32.gpio2_io_out_data[3] ;
  3026. wire \rv32.gpio2_io_out_data[4] ;
  3027. wire \rv32.gpio2_io_out_data[5] ;
  3028. wire \rv32.gpio2_io_out_data[6] ;
  3029. wire \rv32.gpio2_io_out_data[7] ;
  3030. wire \rv32.gpio2_io_out_en[0] ;
  3031. wire \rv32.gpio2_io_out_en[1] ;
  3032. wire \rv32.gpio2_io_out_en[2] ;
  3033. wire \rv32.gpio2_io_out_en[3] ;
  3034. wire \rv32.gpio2_io_out_en[4] ;
  3035. wire \rv32.gpio2_io_out_en[5] ;
  3036. wire \rv32.gpio2_io_out_en[6] ;
  3037. wire \rv32.gpio2_io_out_en[7] ;
  3038. wire \rv32.gpio3_io_out_data[0] ;
  3039. wire \rv32.gpio3_io_out_data[1] ;
  3040. wire \rv32.gpio3_io_out_data[2] ;
  3041. wire \rv32.gpio3_io_out_data[3] ;
  3042. wire \rv32.gpio3_io_out_data[4] ;
  3043. wire \rv32.gpio3_io_out_data[5] ;
  3044. wire \rv32.gpio3_io_out_data[6] ;
  3045. wire \rv32.gpio3_io_out_data[7] ;
  3046. wire \rv32.gpio3_io_out_en[0] ;
  3047. wire \rv32.gpio3_io_out_en[1] ;
  3048. wire \rv32.gpio3_io_out_en[2] ;
  3049. wire \rv32.gpio3_io_out_en[3] ;
  3050. wire \rv32.gpio3_io_out_en[4] ;
  3051. wire \rv32.gpio3_io_out_en[5] ;
  3052. wire \rv32.gpio3_io_out_en[6] ;
  3053. wire \rv32.gpio3_io_out_en[7] ;
  3054. wire \rv32.gpio4_io_out_data[0] ;
  3055. wire \rv32.gpio4_io_out_data[1] ;
  3056. wire \rv32.gpio4_io_out_data[2] ;
  3057. wire \rv32.gpio4_io_out_data[3] ;
  3058. wire \rv32.gpio4_io_out_data[4] ;
  3059. wire \rv32.gpio4_io_out_data[5] ;
  3060. wire \rv32.gpio4_io_out_data[6] ;
  3061. wire \rv32.gpio4_io_out_data[7] ;
  3062. wire \rv32.gpio4_io_out_en[0] ;
  3063. wire \rv32.gpio4_io_out_en[1] ;
  3064. wire \rv32.gpio4_io_out_en[2] ;
  3065. wire \rv32.gpio4_io_out_en[3] ;
  3066. wire \rv32.gpio4_io_out_en[4] ;
  3067. wire \rv32.gpio4_io_out_en[5] ;
  3068. wire \rv32.gpio4_io_out_en[6] ;
  3069. wire \rv32.gpio4_io_out_en[7] ;
  3070. wire \rv32.gpio5_io_out_data[0] ;
  3071. wire \rv32.gpio5_io_out_data[1] ;
  3072. wire \rv32.gpio5_io_out_data[2] ;
  3073. wire \rv32.gpio5_io_out_data[3] ;
  3074. wire \rv32.gpio5_io_out_data[4] ;
  3075. wire \rv32.gpio5_io_out_data[5] ;
  3076. wire \rv32.gpio5_io_out_data[6] ;
  3077. wire \rv32.gpio5_io_out_data[7] ;
  3078. wire \rv32.gpio5_io_out_en[0] ;
  3079. wire \rv32.gpio5_io_out_en[1] ;
  3080. wire \rv32.gpio5_io_out_en[2] ;
  3081. wire \rv32.gpio5_io_out_en[3] ;
  3082. wire \rv32.gpio5_io_out_en[4] ;
  3083. wire \rv32.gpio5_io_out_en[5] ;
  3084. wire \rv32.gpio5_io_out_en[6] ;
  3085. wire \rv32.gpio5_io_out_en[7] ;
  3086. wire \rv32.gpio6_io_out_data[0] ;
  3087. wire \rv32.gpio6_io_out_data[1] ;
  3088. wire \rv32.gpio6_io_out_data[2] ;
  3089. wire \rv32.gpio6_io_out_data[3] ;
  3090. wire \rv32.gpio6_io_out_data[4] ;
  3091. wire \rv32.gpio6_io_out_data[5] ;
  3092. wire \rv32.gpio6_io_out_data[6] ;
  3093. wire \rv32.gpio6_io_out_data[7] ;
  3094. wire \rv32.gpio6_io_out_en[0] ;
  3095. wire \rv32.gpio6_io_out_en[1] ;
  3096. wire \rv32.gpio6_io_out_en[2] ;
  3097. wire \rv32.gpio6_io_out_en[3] ;
  3098. wire \rv32.gpio6_io_out_en[4] ;
  3099. wire \rv32.gpio6_io_out_en[5] ;
  3100. wire \rv32.gpio6_io_out_en[6] ;
  3101. wire \rv32.gpio6_io_out_en[7] ;
  3102. wire \rv32.gpio7_io_out_data[0] ;
  3103. wire \rv32.gpio7_io_out_data[1] ;
  3104. wire \rv32.gpio7_io_out_data[2] ;
  3105. wire \rv32.gpio7_io_out_data[3] ;
  3106. wire \rv32.gpio7_io_out_data[4] ;
  3107. wire \rv32.gpio7_io_out_data[5] ;
  3108. wire \rv32.gpio7_io_out_data[6] ;
  3109. wire \rv32.gpio7_io_out_data[7] ;
  3110. wire \rv32.gpio7_io_out_en[0] ;
  3111. wire \rv32.gpio7_io_out_en[1] ;
  3112. wire \rv32.gpio7_io_out_en[2] ;
  3113. wire \rv32.gpio7_io_out_en[3] ;
  3114. wire \rv32.gpio7_io_out_en[4] ;
  3115. wire \rv32.gpio7_io_out_en[5] ;
  3116. wire \rv32.gpio7_io_out_en[6] ;
  3117. wire \rv32.gpio7_io_out_en[7] ;
  3118. wire \rv32.gpio8_io_out_data[0] ;
  3119. wire \rv32.gpio8_io_out_data[1] ;
  3120. wire \rv32.gpio8_io_out_data[2] ;
  3121. wire \rv32.gpio8_io_out_data[3] ;
  3122. wire \rv32.gpio8_io_out_data[4] ;
  3123. wire \rv32.gpio8_io_out_data[5] ;
  3124. wire \rv32.gpio8_io_out_data[6] ;
  3125. wire \rv32.gpio8_io_out_data[7] ;
  3126. wire \rv32.gpio8_io_out_en[0] ;
  3127. wire \rv32.gpio8_io_out_en[1] ;
  3128. wire \rv32.gpio8_io_out_en[2] ;
  3129. wire \rv32.gpio8_io_out_en[3] ;
  3130. wire \rv32.gpio8_io_out_en[4] ;
  3131. wire \rv32.gpio8_io_out_en[5] ;
  3132. wire \rv32.gpio8_io_out_en[6] ;
  3133. wire \rv32.gpio8_io_out_en[7] ;
  3134. wire \rv32.gpio9_io_out_data[0] ;
  3135. wire \rv32.gpio9_io_out_data[1] ;
  3136. wire \rv32.gpio9_io_out_data[2] ;
  3137. wire \rv32.gpio9_io_out_data[3] ;
  3138. wire \rv32.gpio9_io_out_data[4] ;
  3139. wire \rv32.gpio9_io_out_data[5] ;
  3140. wire \rv32.gpio9_io_out_data[6] ;
  3141. wire \rv32.gpio9_io_out_data[7] ;
  3142. wire \rv32.gpio9_io_out_en[0] ;
  3143. wire \rv32.gpio9_io_out_en[1] ;
  3144. wire \rv32.gpio9_io_out_en[2] ;
  3145. wire \rv32.gpio9_io_out_en[3] ;
  3146. wire \rv32.gpio9_io_out_en[4] ;
  3147. wire \rv32.gpio9_io_out_en[5] ;
  3148. wire \rv32.gpio9_io_out_en[6] ;
  3149. wire \rv32.gpio9_io_out_en[7] ;
  3150. wire \rv32.mem_ahb_haddr[0] ;
  3151. wire \rv32.mem_ahb_haddr[10] ;
  3152. wire \rv32.mem_ahb_haddr[11] ;
  3153. wire \rv32.mem_ahb_haddr[12] ;
  3154. wire \rv32.mem_ahb_haddr[13] ;
  3155. wire \rv32.mem_ahb_haddr[14] ;
  3156. wire \rv32.mem_ahb_haddr[15] ;
  3157. wire \rv32.mem_ahb_haddr[16] ;
  3158. wire \rv32.mem_ahb_haddr[17] ;
  3159. wire \rv32.mem_ahb_haddr[18] ;
  3160. wire \rv32.mem_ahb_haddr[19] ;
  3161. wire \rv32.mem_ahb_haddr[1] ;
  3162. wire \rv32.mem_ahb_haddr[20] ;
  3163. wire \rv32.mem_ahb_haddr[21] ;
  3164. wire \rv32.mem_ahb_haddr[22] ;
  3165. wire \rv32.mem_ahb_haddr[23] ;
  3166. wire \rv32.mem_ahb_haddr[24] ;
  3167. wire \rv32.mem_ahb_haddr[25] ;
  3168. wire \rv32.mem_ahb_haddr[26] ;
  3169. wire \rv32.mem_ahb_haddr[27] ;
  3170. wire \rv32.mem_ahb_haddr[28] ;
  3171. wire \rv32.mem_ahb_haddr[29] ;
  3172. wire \rv32.mem_ahb_haddr[2] ;
  3173. wire \rv32.mem_ahb_haddr[30] ;
  3174. wire \rv32.mem_ahb_haddr[31] ;
  3175. wire \rv32.mem_ahb_haddr[3] ;
  3176. wire \rv32.mem_ahb_haddr[4] ;
  3177. wire \rv32.mem_ahb_haddr[5] ;
  3178. wire \rv32.mem_ahb_haddr[6] ;
  3179. wire \rv32.mem_ahb_haddr[7] ;
  3180. wire \rv32.mem_ahb_haddr[8] ;
  3181. wire \rv32.mem_ahb_haddr[9] ;
  3182. wire \rv32.mem_ahb_hburst[0] ;
  3183. wire \rv32.mem_ahb_hburst[1] ;
  3184. wire \rv32.mem_ahb_hburst[2] ;
  3185. wire \rv32.mem_ahb_hready ;
  3186. wire \rv32.mem_ahb_hsize[0] ;
  3187. wire \rv32.mem_ahb_hsize[1] ;
  3188. wire \rv32.mem_ahb_hsize[2] ;
  3189. wire \rv32.mem_ahb_htrans[0] ;
  3190. wire \rv32.mem_ahb_htrans[1] ;
  3191. wire \rv32.mem_ahb_hwdata[0] ;
  3192. wire \rv32.mem_ahb_hwdata[10] ;
  3193. wire \rv32.mem_ahb_hwdata[11] ;
  3194. wire \rv32.mem_ahb_hwdata[12] ;
  3195. wire \rv32.mem_ahb_hwdata[13] ;
  3196. wire \rv32.mem_ahb_hwdata[14] ;
  3197. wire \rv32.mem_ahb_hwdata[15] ;
  3198. wire \rv32.mem_ahb_hwdata[16] ;
  3199. wire \rv32.mem_ahb_hwdata[17] ;
  3200. wire \rv32.mem_ahb_hwdata[18] ;
  3201. wire \rv32.mem_ahb_hwdata[19] ;
  3202. wire \rv32.mem_ahb_hwdata[1] ;
  3203. wire \rv32.mem_ahb_hwdata[20] ;
  3204. wire \rv32.mem_ahb_hwdata[21] ;
  3205. wire \rv32.mem_ahb_hwdata[22] ;
  3206. wire \rv32.mem_ahb_hwdata[23] ;
  3207. wire \rv32.mem_ahb_hwdata[24] ;
  3208. wire \rv32.mem_ahb_hwdata[25] ;
  3209. wire \rv32.mem_ahb_hwdata[26] ;
  3210. wire \rv32.mem_ahb_hwdata[27] ;
  3211. wire \rv32.mem_ahb_hwdata[28] ;
  3212. wire \rv32.mem_ahb_hwdata[29] ;
  3213. wire \rv32.mem_ahb_hwdata[2] ;
  3214. wire \rv32.mem_ahb_hwdata[30] ;
  3215. wire \rv32.mem_ahb_hwdata[31] ;
  3216. wire \rv32.mem_ahb_hwdata[3] ;
  3217. wire \rv32.mem_ahb_hwdata[4] ;
  3218. wire \rv32.mem_ahb_hwdata[5] ;
  3219. wire \rv32.mem_ahb_hwdata[6] ;
  3220. wire \rv32.mem_ahb_hwdata[7] ;
  3221. wire \rv32.mem_ahb_hwdata[8] ;
  3222. wire \rv32.mem_ahb_hwdata[9] ;
  3223. wire \rv32.mem_ahb_hwrite ;
  3224. wire \rv32.resetn_out ;
  3225. wire \rv32.slave_ahb_hrdata[0] ;
  3226. wire \rv32.slave_ahb_hrdata[10] ;
  3227. wire \rv32.slave_ahb_hrdata[11] ;
  3228. wire \rv32.slave_ahb_hrdata[12] ;
  3229. wire \rv32.slave_ahb_hrdata[13] ;
  3230. wire \rv32.slave_ahb_hrdata[14] ;
  3231. wire \rv32.slave_ahb_hrdata[15] ;
  3232. wire \rv32.slave_ahb_hrdata[16] ;
  3233. wire \rv32.slave_ahb_hrdata[17] ;
  3234. wire \rv32.slave_ahb_hrdata[18] ;
  3235. wire \rv32.slave_ahb_hrdata[19] ;
  3236. wire \rv32.slave_ahb_hrdata[1] ;
  3237. wire \rv32.slave_ahb_hrdata[20] ;
  3238. wire \rv32.slave_ahb_hrdata[21] ;
  3239. wire \rv32.slave_ahb_hrdata[22] ;
  3240. wire \rv32.slave_ahb_hrdata[23] ;
  3241. wire \rv32.slave_ahb_hrdata[24] ;
  3242. wire \rv32.slave_ahb_hrdata[25] ;
  3243. wire \rv32.slave_ahb_hrdata[26] ;
  3244. wire \rv32.slave_ahb_hrdata[27] ;
  3245. wire \rv32.slave_ahb_hrdata[28] ;
  3246. wire \rv32.slave_ahb_hrdata[29] ;
  3247. wire \rv32.slave_ahb_hrdata[2] ;
  3248. wire \rv32.slave_ahb_hrdata[30] ;
  3249. wire \rv32.slave_ahb_hrdata[31] ;
  3250. wire \rv32.slave_ahb_hrdata[3] ;
  3251. wire \rv32.slave_ahb_hrdata[4] ;
  3252. wire \rv32.slave_ahb_hrdata[5] ;
  3253. wire \rv32.slave_ahb_hrdata[6] ;
  3254. wire \rv32.slave_ahb_hrdata[7] ;
  3255. wire \rv32.slave_ahb_hrdata[8] ;
  3256. wire \rv32.slave_ahb_hrdata[9] ;
  3257. wire \rv32.slave_ahb_hreadyout ;
  3258. wire \rv32.slave_ahb_hresp ;
  3259. wire \rv32.swj_JTAGIR[0] ;
  3260. wire \rv32.swj_JTAGIR[1] ;
  3261. wire \rv32.swj_JTAGIR[2] ;
  3262. wire \rv32.swj_JTAGIR[3] ;
  3263. wire \rv32.swj_JTAGNSW ;
  3264. wire \rv32.swj_JTAGSTATE[0] ;
  3265. wire \rv32.swj_JTAGSTATE[1] ;
  3266. wire \rv32.swj_JTAGSTATE[2] ;
  3267. wire \rv32.swj_JTAGSTATE[3] ;
  3268. wire \rv32.sys_ctrl_clkSource[0] ;
  3269. wire \rv32.sys_ctrl_clkSource[1] ;
  3270. wire \rv32.sys_ctrl_hseBypass ;
  3271. wire \rv32.sys_ctrl_hseEnable ;
  3272. wire \rv32.sys_ctrl_pllEnable ;
  3273. wire \rv32.sys_ctrl_sleep ;
  3274. wire \rv32.sys_ctrl_standby ;
  3275. wire \rv32.sys_ctrl_stop ;
  3276. wire \so_io1~input_o ;
  3277. wire \sys_resetn~clkctrl_outclk ;
  3278. wire \sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ;
  3279. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ;
  3280. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ;
  3281. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ;
  3282. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ;
  3283. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ;
  3284. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ;
  3285. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ;
  3286. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ;
  3287. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ;
  3288. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ;
  3289. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ;
  3290. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ;
  3291. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ;
  3292. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ;
  3293. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ;
  3294. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ;
  3295. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ;
  3296. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ;
  3297. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ;
  3298. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ;
  3299. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ;
  3300. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ;
  3301. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ;
  3302. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ;
  3303. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ;
  3304. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ;
  3305. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ;
  3306. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ;
  3307. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ;
  3308. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ;
  3309. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ;
  3310. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ;
  3311. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ;
  3312. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ;
  3313. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ;
  3314. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ;
  3315. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ;
  3316. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ;
  3317. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ;
  3318. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ;
  3319. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ;
  3320. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ;
  3321. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ;
  3322. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ;
  3323. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ;
  3324. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ;
  3325. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ;
  3326. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ;
  3327. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ;
  3328. wire \sys_resetn~combout ;
  3329. wire \~GND~combout ;
  3330. wire \~VCC~combout ;
  3331. wire vcc;
  3332. wire gnd;
  3333. assign vcc = 1'b1;
  3334. assign gnd = 1'b0;
  3335. wire unknown;
  3336. assign unknown = 1'bx;
  3337. alta_rio \BAUD_RATE~output (
  3338. .padio(BAUD_RATE),
  3339. .datain(gnd),
  3340. .oe(gnd),
  3341. .outclk(gnd),
  3342. .outclkena(vcc),
  3343. .inclk(gnd),
  3344. .inclkena(vcc),
  3345. .areset(gnd),
  3346. .sreset(gnd),
  3347. .combout(\BAUD_RATE~input_o ),
  3348. .regout());
  3349. defparam \BAUD_RATE~output .coord_x = 0;
  3350. defparam \BAUD_RATE~output .coord_y = 4;
  3351. defparam \BAUD_RATE~output .coord_z = 2;
  3352. defparam \BAUD_RATE~output .IN_ASYNC_MODE = 1'b0;
  3353. defparam \BAUD_RATE~output .IN_SYNC_MODE = 1'b0;
  3354. defparam \BAUD_RATE~output .IN_POWERUP = 1'b0;
  3355. defparam \BAUD_RATE~output .OUT_REG_MODE = 1'b0;
  3356. defparam \BAUD_RATE~output .OUT_ASYNC_MODE = 1'b0;
  3357. defparam \BAUD_RATE~output .OUT_SYNC_MODE = 1'b0;
  3358. defparam \BAUD_RATE~output .OUT_POWERUP = 1'b0;
  3359. defparam \BAUD_RATE~output .OE_REG_MODE = 1'b0;
  3360. defparam \BAUD_RATE~output .OE_ASYNC_MODE = 1'b0;
  3361. defparam \BAUD_RATE~output .OE_SYNC_MODE = 1'b0;
  3362. defparam \BAUD_RATE~output .OE_POWERUP = 1'b0;
  3363. defparam \BAUD_RATE~output .CFG_TRI_INPUT = 1'b0;
  3364. defparam \BAUD_RATE~output .CFG_INPUT_EN = 1'b0;
  3365. defparam \BAUD_RATE~output .CFG_PULL_UP = 1'b0;
  3366. defparam \BAUD_RATE~output .CFG_SLR = 1'b0;
  3367. defparam \BAUD_RATE~output .CFG_OPEN_DRAIN = 1'b0;
  3368. defparam \BAUD_RATE~output .CFG_PDRCTRL = 4'b0100;
  3369. defparam \BAUD_RATE~output .CFG_KEEP = 2'b00;
  3370. defparam \BAUD_RATE~output .CFG_LVDS_OUT_EN = 1'b0;
  3371. defparam \BAUD_RATE~output .CFG_LVDS_SEL_CUA = 2'b00;
  3372. defparam \BAUD_RATE~output .CFG_LVDS_IREF = 10'b0110000000;
  3373. defparam \BAUD_RATE~output .CFG_LVDS_IN_EN = 1'b0;
  3374. defparam \BAUD_RATE~output .DPCLK_DELAY = 4'b0000;
  3375. defparam \BAUD_RATE~output .OUT_DELAY = 1'b0;
  3376. defparam \BAUD_RATE~output .IN_DATA_DELAY = 3'b000;
  3377. defparam \BAUD_RATE~output .IN_REG_DELAY = 3'b000;
  3378. alta_rio \GPIO4_1~output (
  3379. .padio(GPIO4_1),
  3380. .datain(\rv32.gpio4_io_out_data[1] ),
  3381. .oe(\rv32.gpio4_io_out_en[1] ),
  3382. .outclk(gnd),
  3383. .outclkena(vcc),
  3384. .inclk(gnd),
  3385. .inclkena(vcc),
  3386. .areset(gnd),
  3387. .sreset(gnd),
  3388. .combout(\GPIO4_1~input_o ),
  3389. .regout());
  3390. defparam \GPIO4_1~output .coord_x = 17;
  3391. defparam \GPIO4_1~output .coord_y = 0;
  3392. defparam \GPIO4_1~output .coord_z = 2;
  3393. defparam \GPIO4_1~output .IN_ASYNC_MODE = 1'b0;
  3394. defparam \GPIO4_1~output .IN_SYNC_MODE = 1'b0;
  3395. defparam \GPIO4_1~output .IN_POWERUP = 1'b0;
  3396. defparam \GPIO4_1~output .OUT_REG_MODE = 1'b0;
  3397. defparam \GPIO4_1~output .OUT_ASYNC_MODE = 1'b0;
  3398. defparam \GPIO4_1~output .OUT_SYNC_MODE = 1'b0;
  3399. defparam \GPIO4_1~output .OUT_POWERUP = 1'b0;
  3400. defparam \GPIO4_1~output .OE_REG_MODE = 1'b0;
  3401. defparam \GPIO4_1~output .OE_ASYNC_MODE = 1'b0;
  3402. defparam \GPIO4_1~output .OE_SYNC_MODE = 1'b0;
  3403. defparam \GPIO4_1~output .OE_POWERUP = 1'b0;
  3404. defparam \GPIO4_1~output .CFG_TRI_INPUT = 1'b0;
  3405. defparam \GPIO4_1~output .CFG_INPUT_EN = 1'b1;
  3406. defparam \GPIO4_1~output .CFG_PULL_UP = 1'b0;
  3407. defparam \GPIO4_1~output .CFG_SLR = 1'b0;
  3408. defparam \GPIO4_1~output .CFG_OPEN_DRAIN = 1'b0;
  3409. defparam \GPIO4_1~output .CFG_PDRCTRL = 4'b0100;
  3410. defparam \GPIO4_1~output .CFG_KEEP = 2'b00;
  3411. defparam \GPIO4_1~output .CFG_LVDS_OUT_EN = 1'b0;
  3412. defparam \GPIO4_1~output .CFG_LVDS_SEL_CUA = 2'b00;
  3413. defparam \GPIO4_1~output .CFG_LVDS_IREF = 10'b0110000000;
  3414. defparam \GPIO4_1~output .CFG_LVDS_IN_EN = 1'b0;
  3415. defparam \GPIO4_1~output .DPCLK_DELAY = 4'b0000;
  3416. defparam \GPIO4_1~output .OUT_DELAY = 1'b0;
  3417. defparam \GPIO4_1~output .IN_DATA_DELAY = 3'b000;
  3418. defparam \GPIO4_1~output .IN_REG_DELAY = 3'b000;
  3419. alta_rio \GPIO4_2~output (
  3420. .padio(GPIO4_2),
  3421. .datain(\rv32.gpio4_io_out_data[2] ),
  3422. .oe(\rv32.gpio4_io_out_en[2] ),
  3423. .outclk(gnd),
  3424. .outclkena(vcc),
  3425. .inclk(gnd),
  3426. .inclkena(vcc),
  3427. .areset(gnd),
  3428. .sreset(gnd),
  3429. .combout(\GPIO4_2~input_o ),
  3430. .regout());
  3431. defparam \GPIO4_2~output .coord_x = 19;
  3432. defparam \GPIO4_2~output .coord_y = 13;
  3433. defparam \GPIO4_2~output .coord_z = 3;
  3434. defparam \GPIO4_2~output .IN_ASYNC_MODE = 1'b0;
  3435. defparam \GPIO4_2~output .IN_SYNC_MODE = 1'b0;
  3436. defparam \GPIO4_2~output .IN_POWERUP = 1'b0;
  3437. defparam \GPIO4_2~output .OUT_REG_MODE = 1'b0;
  3438. defparam \GPIO4_2~output .OUT_ASYNC_MODE = 1'b0;
  3439. defparam \GPIO4_2~output .OUT_SYNC_MODE = 1'b0;
  3440. defparam \GPIO4_2~output .OUT_POWERUP = 1'b0;
  3441. defparam \GPIO4_2~output .OE_REG_MODE = 1'b0;
  3442. defparam \GPIO4_2~output .OE_ASYNC_MODE = 1'b0;
  3443. defparam \GPIO4_2~output .OE_SYNC_MODE = 1'b0;
  3444. defparam \GPIO4_2~output .OE_POWERUP = 1'b0;
  3445. defparam \GPIO4_2~output .CFG_TRI_INPUT = 1'b0;
  3446. defparam \GPIO4_2~output .CFG_INPUT_EN = 1'b1;
  3447. defparam \GPIO4_2~output .CFG_PULL_UP = 1'b0;
  3448. defparam \GPIO4_2~output .CFG_SLR = 1'b0;
  3449. defparam \GPIO4_2~output .CFG_OPEN_DRAIN = 1'b0;
  3450. defparam \GPIO4_2~output .CFG_PDRCTRL = 4'b0100;
  3451. defparam \GPIO4_2~output .CFG_KEEP = 2'b00;
  3452. defparam \GPIO4_2~output .CFG_LVDS_OUT_EN = 1'b0;
  3453. defparam \GPIO4_2~output .CFG_LVDS_SEL_CUA = 2'b00;
  3454. defparam \GPIO4_2~output .CFG_LVDS_IREF = 10'b0110000000;
  3455. defparam \GPIO4_2~output .CFG_LVDS_IN_EN = 1'b0;
  3456. defparam \GPIO4_2~output .DPCLK_DELAY = 4'b0000;
  3457. defparam \GPIO4_2~output .OUT_DELAY = 1'b0;
  3458. defparam \GPIO4_2~output .IN_DATA_DELAY = 3'b000;
  3459. defparam \GPIO4_2~output .IN_REG_DELAY = 3'b000;
  3460. alta_rio \PIN_HSE~input (
  3461. .padio(PIN_HSE),
  3462. .datain(gnd),
  3463. .oe(gnd),
  3464. .outclk(gnd),
  3465. .outclkena(vcc),
  3466. .inclk(gnd),
  3467. .inclkena(vcc),
  3468. .areset(gnd),
  3469. .sreset(gnd),
  3470. .combout(\PIN_HSE~input_o ),
  3471. .regout());
  3472. defparam \PIN_HSE~input .coord_x = 22;
  3473. defparam \PIN_HSE~input .coord_y = 4;
  3474. defparam \PIN_HSE~input .coord_z = 1;
  3475. defparam \PIN_HSE~input .IN_ASYNC_MODE = 1'b0;
  3476. defparam \PIN_HSE~input .IN_SYNC_MODE = 1'b0;
  3477. defparam \PIN_HSE~input .IN_POWERUP = 1'b0;
  3478. defparam \PIN_HSE~input .OUT_REG_MODE = 1'b0;
  3479. defparam \PIN_HSE~input .OUT_ASYNC_MODE = 1'b0;
  3480. defparam \PIN_HSE~input .OUT_SYNC_MODE = 1'b0;
  3481. defparam \PIN_HSE~input .OUT_POWERUP = 1'b0;
  3482. defparam \PIN_HSE~input .OE_REG_MODE = 1'b0;
  3483. defparam \PIN_HSE~input .OE_ASYNC_MODE = 1'b0;
  3484. defparam \PIN_HSE~input .OE_SYNC_MODE = 1'b0;
  3485. defparam \PIN_HSE~input .OE_POWERUP = 1'b0;
  3486. defparam \PIN_HSE~input .CFG_TRI_INPUT = 1'b0;
  3487. defparam \PIN_HSE~input .CFG_PULL_UP = 1'b0;
  3488. defparam \PIN_HSE~input .CFG_SLR = 1'b0;
  3489. defparam \PIN_HSE~input .CFG_OPEN_DRAIN = 1'b0;
  3490. defparam \PIN_HSE~input .CFG_PDRCTRL = 4'b0010;
  3491. defparam \PIN_HSE~input .CFG_KEEP = 2'b00;
  3492. defparam \PIN_HSE~input .CFG_LVDS_OUT_EN = 1'b0;
  3493. defparam \PIN_HSE~input .CFG_LVDS_SEL_CUA = 2'b00;
  3494. defparam \PIN_HSE~input .CFG_LVDS_IREF = 10'b0110000000;
  3495. defparam \PIN_HSE~input .CFG_LVDS_IN_EN = 1'b0;
  3496. defparam \PIN_HSE~input .DPCLK_DELAY = 4'b0000;
  3497. defparam \PIN_HSE~input .OUT_DELAY = 1'b0;
  3498. defparam \PIN_HSE~input .IN_DATA_DELAY = 3'b000;
  3499. defparam \PIN_HSE~input .IN_REG_DELAY = 3'b000;
  3500. alta_rio \PIN_HSI~input (
  3501. .padio(PIN_HSI),
  3502. .datain(gnd),
  3503. .oe(gnd),
  3504. .outclk(gnd),
  3505. .outclkena(vcc),
  3506. .inclk(gnd),
  3507. .inclkena(vcc),
  3508. .areset(gnd),
  3509. .sreset(gnd),
  3510. .combout(\PIN_HSI~input_o ),
  3511. .regout());
  3512. defparam \PIN_HSI~input .coord_x = 22;
  3513. defparam \PIN_HSI~input .coord_y = 4;
  3514. defparam \PIN_HSI~input .coord_z = 0;
  3515. defparam \PIN_HSI~input .IN_ASYNC_MODE = 1'b0;
  3516. defparam \PIN_HSI~input .IN_SYNC_MODE = 1'b0;
  3517. defparam \PIN_HSI~input .IN_POWERUP = 1'b0;
  3518. defparam \PIN_HSI~input .OUT_REG_MODE = 1'b0;
  3519. defparam \PIN_HSI~input .OUT_ASYNC_MODE = 1'b0;
  3520. defparam \PIN_HSI~input .OUT_SYNC_MODE = 1'b0;
  3521. defparam \PIN_HSI~input .OUT_POWERUP = 1'b0;
  3522. defparam \PIN_HSI~input .OE_REG_MODE = 1'b0;
  3523. defparam \PIN_HSI~input .OE_ASYNC_MODE = 1'b0;
  3524. defparam \PIN_HSI~input .OE_SYNC_MODE = 1'b0;
  3525. defparam \PIN_HSI~input .OE_POWERUP = 1'b0;
  3526. defparam \PIN_HSI~input .CFG_TRI_INPUT = 1'b0;
  3527. defparam \PIN_HSI~input .CFG_PULL_UP = 1'b0;
  3528. defparam \PIN_HSI~input .CFG_SLR = 1'b0;
  3529. defparam \PIN_HSI~input .CFG_OPEN_DRAIN = 1'b0;
  3530. defparam \PIN_HSI~input .CFG_PDRCTRL = 4'b0010;
  3531. defparam \PIN_HSI~input .CFG_KEEP = 2'b00;
  3532. defparam \PIN_HSI~input .CFG_LVDS_OUT_EN = 1'b0;
  3533. defparam \PIN_HSI~input .CFG_LVDS_SEL_CUA = 2'b00;
  3534. defparam \PIN_HSI~input .CFG_LVDS_IREF = 10'b0110000000;
  3535. defparam \PIN_HSI~input .CFG_LVDS_IN_EN = 1'b0;
  3536. defparam \PIN_HSI~input .DPCLK_DELAY = 4'b0000;
  3537. defparam \PIN_HSI~input .OUT_DELAY = 1'b0;
  3538. defparam \PIN_HSI~input .IN_DATA_DELAY = 3'b000;
  3539. defparam \PIN_HSI~input .IN_REG_DELAY = 3'b000;
  3540. alta_rio \PLL_CLKIN~input (
  3541. .padio(PLL_CLKIN),
  3542. .datain(gnd),
  3543. .oe(gnd),
  3544. .outclk(gnd),
  3545. .outclkena(vcc),
  3546. .inclk(gnd),
  3547. .inclkena(vcc),
  3548. .areset(gnd),
  3549. .sreset(gnd),
  3550. .combout(\PLL_CLKIN~input_o ),
  3551. .regout());
  3552. defparam \PLL_CLKIN~input .coord_x = 22;
  3553. defparam \PLL_CLKIN~input .coord_y = 4;
  3554. defparam \PLL_CLKIN~input .coord_z = 2;
  3555. defparam \PLL_CLKIN~input .IN_ASYNC_MODE = 1'b0;
  3556. defparam \PLL_CLKIN~input .IN_SYNC_MODE = 1'b0;
  3557. defparam \PLL_CLKIN~input .IN_POWERUP = 1'b0;
  3558. defparam \PLL_CLKIN~input .OUT_REG_MODE = 1'b0;
  3559. defparam \PLL_CLKIN~input .OUT_ASYNC_MODE = 1'b0;
  3560. defparam \PLL_CLKIN~input .OUT_SYNC_MODE = 1'b0;
  3561. defparam \PLL_CLKIN~input .OUT_POWERUP = 1'b0;
  3562. defparam \PLL_CLKIN~input .OE_REG_MODE = 1'b0;
  3563. defparam \PLL_CLKIN~input .OE_ASYNC_MODE = 1'b0;
  3564. defparam \PLL_CLKIN~input .OE_SYNC_MODE = 1'b0;
  3565. defparam \PLL_CLKIN~input .OE_POWERUP = 1'b0;
  3566. defparam \PLL_CLKIN~input .CFG_TRI_INPUT = 1'b0;
  3567. defparam \PLL_CLKIN~input .CFG_PULL_UP = 1'b0;
  3568. defparam \PLL_CLKIN~input .CFG_SLR = 1'b0;
  3569. defparam \PLL_CLKIN~input .CFG_OPEN_DRAIN = 1'b0;
  3570. defparam \PLL_CLKIN~input .CFG_PDRCTRL = 4'b0010;
  3571. defparam \PLL_CLKIN~input .CFG_KEEP = 2'b00;
  3572. defparam \PLL_CLKIN~input .CFG_LVDS_OUT_EN = 1'b0;
  3573. defparam \PLL_CLKIN~input .CFG_LVDS_SEL_CUA = 2'b00;
  3574. defparam \PLL_CLKIN~input .CFG_LVDS_IREF = 10'b0110000000;
  3575. defparam \PLL_CLKIN~input .CFG_LVDS_IN_EN = 1'b0;
  3576. defparam \PLL_CLKIN~input .DPCLK_DELAY = 4'b0000;
  3577. defparam \PLL_CLKIN~input .OUT_DELAY = 1'b0;
  3578. defparam \PLL_CLKIN~input .IN_DATA_DELAY = 3'b000;
  3579. defparam \PLL_CLKIN~input .IN_REG_DELAY = 3'b000;
  3580. alta_slice PLL_ENABLE(
  3581. .A(vcc),
  3582. .B(vcc),
  3583. .C(vcc),
  3584. .D(\rv32.sys_ctrl_pllEnable ),
  3585. .Cin(),
  3586. .Qin(),
  3587. .Clk(),
  3588. .AsyncReset(),
  3589. .SyncReset(),
  3590. .ShiftData(),
  3591. .SyncLoad(),
  3592. .LutOut(\PLL_ENABLE~combout ),
  3593. .Cout(),
  3594. .Q());
  3595. defparam PLL_ENABLE.coord_x = 20;
  3596. defparam PLL_ENABLE.coord_y = 3;
  3597. defparam PLL_ENABLE.coord_z = 5;
  3598. defparam PLL_ENABLE.mask = 16'h00FF;
  3599. defparam PLL_ENABLE.modeMux = 1'b0;
  3600. defparam PLL_ENABLE.FeedbackMux = 1'b0;
  3601. defparam PLL_ENABLE.ShiftMux = 1'b0;
  3602. defparam PLL_ENABLE.BypassEn = 1'b0;
  3603. defparam PLL_ENABLE.CarryEnb = 1'b1;
  3604. alta_io_gclk \PLL_ENABLE~clkctrl (
  3605. .inclk(\PLL_ENABLE~combout ),
  3606. .outclk(\PLL_ENABLE~clkctrl_outclk ));
  3607. defparam \PLL_ENABLE~clkctrl .coord_x = 22;
  3608. defparam \PLL_ENABLE~clkctrl .coord_y = 4;
  3609. defparam \PLL_ENABLE~clkctrl .coord_z = 4;
  3610. alta_slice PLL_LOCK(
  3611. .A(vcc),
  3612. .B(vcc),
  3613. .C(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp ),
  3614. .D(\pll_inst|auto_generated|pll_lock_sync~q ),
  3615. .Cin(),
  3616. .Qin(),
  3617. .Clk(),
  3618. .AsyncReset(),
  3619. .SyncReset(),
  3620. .ShiftData(),
  3621. .SyncLoad(),
  3622. .LutOut(\PLL_LOCK~combout ),
  3623. .Cout(),
  3624. .Q());
  3625. defparam PLL_LOCK.coord_x = 20;
  3626. defparam PLL_LOCK.coord_y = 3;
  3627. defparam PLL_LOCK.coord_z = 10;
  3628. defparam PLL_LOCK.mask = 16'hF000;
  3629. defparam PLL_LOCK.modeMux = 1'b0;
  3630. defparam PLL_LOCK.FeedbackMux = 1'b0;
  3631. defparam PLL_LOCK.ShiftMux = 1'b0;
  3632. defparam PLL_LOCK.BypassEn = 1'b0;
  3633. defparam PLL_LOCK.CarryEnb = 1'b1;
  3634. alta_rio \SPI0_CSN~output (
  3635. .padio(SPI0_CSN),
  3636. .datain(\rv32.gpio4_io_out_data[6] ),
  3637. .oe(\rv32.gpio4_io_out_en[6] ),
  3638. .outclk(gnd),
  3639. .outclkena(vcc),
  3640. .inclk(gnd),
  3641. .inclkena(vcc),
  3642. .areset(gnd),
  3643. .sreset(gnd),
  3644. .combout(),
  3645. .regout());
  3646. defparam \SPI0_CSN~output .coord_x = 22;
  3647. defparam \SPI0_CSN~output .coord_y = 3;
  3648. defparam \SPI0_CSN~output .coord_z = 3;
  3649. defparam \SPI0_CSN~output .IN_ASYNC_MODE = 1'b0;
  3650. defparam \SPI0_CSN~output .IN_SYNC_MODE = 1'b0;
  3651. defparam \SPI0_CSN~output .IN_POWERUP = 1'b0;
  3652. defparam \SPI0_CSN~output .OUT_REG_MODE = 1'b0;
  3653. defparam \SPI0_CSN~output .OUT_ASYNC_MODE = 1'b0;
  3654. defparam \SPI0_CSN~output .OUT_SYNC_MODE = 1'b0;
  3655. defparam \SPI0_CSN~output .OUT_POWERUP = 1'b0;
  3656. defparam \SPI0_CSN~output .OE_REG_MODE = 1'b0;
  3657. defparam \SPI0_CSN~output .OE_ASYNC_MODE = 1'b0;
  3658. defparam \SPI0_CSN~output .OE_SYNC_MODE = 1'b0;
  3659. defparam \SPI0_CSN~output .OE_POWERUP = 1'b0;
  3660. defparam \SPI0_CSN~output .CFG_TRI_INPUT = 1'b0;
  3661. defparam \SPI0_CSN~output .CFG_INPUT_EN = 1'b0;
  3662. defparam \SPI0_CSN~output .CFG_PULL_UP = 1'b0;
  3663. defparam \SPI0_CSN~output .CFG_SLR = 1'b0;
  3664. defparam \SPI0_CSN~output .CFG_OPEN_DRAIN = 1'b0;
  3665. defparam \SPI0_CSN~output .CFG_PDRCTRL = 4'b0100;
  3666. defparam \SPI0_CSN~output .CFG_KEEP = 2'b00;
  3667. defparam \SPI0_CSN~output .CFG_LVDS_OUT_EN = 1'b0;
  3668. defparam \SPI0_CSN~output .CFG_LVDS_SEL_CUA = 2'b00;
  3669. defparam \SPI0_CSN~output .CFG_LVDS_IREF = 10'b0110000000;
  3670. defparam \SPI0_CSN~output .CFG_LVDS_IN_EN = 1'b0;
  3671. defparam \SPI0_CSN~output .DPCLK_DELAY = 4'b0000;
  3672. defparam \SPI0_CSN~output .OUT_DELAY = 1'b0;
  3673. defparam \SPI0_CSN~output .IN_DATA_DELAY = 3'b000;
  3674. defparam \SPI0_CSN~output .IN_REG_DELAY = 3'b000;
  3675. alta_rio \SPI0_SCK~output (
  3676. .padio(SPI0_SCK),
  3677. .datain(\rv32.gpio4_io_out_data[5] ),
  3678. .oe(\rv32.gpio4_io_out_en[5] ),
  3679. .outclk(gnd),
  3680. .outclkena(vcc),
  3681. .inclk(gnd),
  3682. .inclkena(vcc),
  3683. .areset(gnd),
  3684. .sreset(gnd),
  3685. .combout(),
  3686. .regout());
  3687. defparam \SPI0_SCK~output .coord_x = 22;
  3688. defparam \SPI0_SCK~output .coord_y = 3;
  3689. defparam \SPI0_SCK~output .coord_z = 0;
  3690. defparam \SPI0_SCK~output .IN_ASYNC_MODE = 1'b0;
  3691. defparam \SPI0_SCK~output .IN_SYNC_MODE = 1'b0;
  3692. defparam \SPI0_SCK~output .IN_POWERUP = 1'b0;
  3693. defparam \SPI0_SCK~output .OUT_REG_MODE = 1'b0;
  3694. defparam \SPI0_SCK~output .OUT_ASYNC_MODE = 1'b0;
  3695. defparam \SPI0_SCK~output .OUT_SYNC_MODE = 1'b0;
  3696. defparam \SPI0_SCK~output .OUT_POWERUP = 1'b0;
  3697. defparam \SPI0_SCK~output .OE_REG_MODE = 1'b0;
  3698. defparam \SPI0_SCK~output .OE_ASYNC_MODE = 1'b0;
  3699. defparam \SPI0_SCK~output .OE_SYNC_MODE = 1'b0;
  3700. defparam \SPI0_SCK~output .OE_POWERUP = 1'b0;
  3701. defparam \SPI0_SCK~output .CFG_TRI_INPUT = 1'b0;
  3702. defparam \SPI0_SCK~output .CFG_INPUT_EN = 1'b0;
  3703. defparam \SPI0_SCK~output .CFG_PULL_UP = 1'b0;
  3704. defparam \SPI0_SCK~output .CFG_SLR = 1'b0;
  3705. defparam \SPI0_SCK~output .CFG_OPEN_DRAIN = 1'b0;
  3706. defparam \SPI0_SCK~output .CFG_PDRCTRL = 4'b0100;
  3707. defparam \SPI0_SCK~output .CFG_KEEP = 2'b00;
  3708. defparam \SPI0_SCK~output .CFG_LVDS_OUT_EN = 1'b0;
  3709. defparam \SPI0_SCK~output .CFG_LVDS_SEL_CUA = 2'b00;
  3710. defparam \SPI0_SCK~output .CFG_LVDS_IREF = 10'b0110000000;
  3711. defparam \SPI0_SCK~output .CFG_LVDS_IN_EN = 1'b0;
  3712. defparam \SPI0_SCK~output .DPCLK_DELAY = 4'b0000;
  3713. defparam \SPI0_SCK~output .OUT_DELAY = 1'b0;
  3714. defparam \SPI0_SCK~output .IN_DATA_DELAY = 3'b000;
  3715. defparam \SPI0_SCK~output .IN_REG_DELAY = 3'b000;
  3716. alta_rio \SPI0_SI_IO0~output (
  3717. .padio(SPI0_SI_IO0),
  3718. .datain(\rv32.gpio0_io_out_data[0] ),
  3719. .oe(\rv32.gpio0_io_out_en[0] ),
  3720. .outclk(gnd),
  3721. .outclkena(vcc),
  3722. .inclk(gnd),
  3723. .inclkena(vcc),
  3724. .areset(gnd),
  3725. .sreset(gnd),
  3726. .combout(\SPI0_SI_IO0~input_o ),
  3727. .regout());
  3728. defparam \SPI0_SI_IO0~output .coord_x = 19;
  3729. defparam \SPI0_SI_IO0~output .coord_y = 0;
  3730. defparam \SPI0_SI_IO0~output .coord_z = 3;
  3731. defparam \SPI0_SI_IO0~output .IN_ASYNC_MODE = 1'b0;
  3732. defparam \SPI0_SI_IO0~output .IN_SYNC_MODE = 1'b0;
  3733. defparam \SPI0_SI_IO0~output .IN_POWERUP = 1'b0;
  3734. defparam \SPI0_SI_IO0~output .OUT_REG_MODE = 1'b0;
  3735. defparam \SPI0_SI_IO0~output .OUT_ASYNC_MODE = 1'b0;
  3736. defparam \SPI0_SI_IO0~output .OUT_SYNC_MODE = 1'b0;
  3737. defparam \SPI0_SI_IO0~output .OUT_POWERUP = 1'b0;
  3738. defparam \SPI0_SI_IO0~output .OE_REG_MODE = 1'b0;
  3739. defparam \SPI0_SI_IO0~output .OE_ASYNC_MODE = 1'b0;
  3740. defparam \SPI0_SI_IO0~output .OE_SYNC_MODE = 1'b0;
  3741. defparam \SPI0_SI_IO0~output .OE_POWERUP = 1'b0;
  3742. defparam \SPI0_SI_IO0~output .CFG_TRI_INPUT = 1'b0;
  3743. defparam \SPI0_SI_IO0~output .CFG_INPUT_EN = 1'b1;
  3744. defparam \SPI0_SI_IO0~output .CFG_PULL_UP = 1'b0;
  3745. defparam \SPI0_SI_IO0~output .CFG_SLR = 1'b0;
  3746. defparam \SPI0_SI_IO0~output .CFG_OPEN_DRAIN = 1'b0;
  3747. defparam \SPI0_SI_IO0~output .CFG_PDRCTRL = 4'b0100;
  3748. defparam \SPI0_SI_IO0~output .CFG_KEEP = 2'b00;
  3749. defparam \SPI0_SI_IO0~output .CFG_LVDS_OUT_EN = 1'b0;
  3750. defparam \SPI0_SI_IO0~output .CFG_LVDS_SEL_CUA = 2'b00;
  3751. defparam \SPI0_SI_IO0~output .CFG_LVDS_IREF = 10'b0110000000;
  3752. defparam \SPI0_SI_IO0~output .CFG_LVDS_IN_EN = 1'b0;
  3753. defparam \SPI0_SI_IO0~output .DPCLK_DELAY = 4'b0000;
  3754. defparam \SPI0_SI_IO0~output .OUT_DELAY = 1'b0;
  3755. defparam \SPI0_SI_IO0~output .IN_DATA_DELAY = 3'b000;
  3756. defparam \SPI0_SI_IO0~output .IN_REG_DELAY = 3'b000;
  3757. alta_rio \TEST_SINGLE~output (
  3758. .padio(TEST_SINGLE),
  3759. .datain(gnd),
  3760. .oe(gnd),
  3761. .outclk(gnd),
  3762. .outclkena(vcc),
  3763. .inclk(gnd),
  3764. .inclkena(vcc),
  3765. .areset(gnd),
  3766. .sreset(gnd),
  3767. .combout(\TEST_SINGLE~input_o ),
  3768. .regout());
  3769. defparam \TEST_SINGLE~output .coord_x = 19;
  3770. defparam \TEST_SINGLE~output .coord_y = 13;
  3771. defparam \TEST_SINGLE~output .coord_z = 0;
  3772. defparam \TEST_SINGLE~output .IN_ASYNC_MODE = 1'b0;
  3773. defparam \TEST_SINGLE~output .IN_SYNC_MODE = 1'b0;
  3774. defparam \TEST_SINGLE~output .IN_POWERUP = 1'b0;
  3775. defparam \TEST_SINGLE~output .OUT_REG_MODE = 1'b0;
  3776. defparam \TEST_SINGLE~output .OUT_ASYNC_MODE = 1'b0;
  3777. defparam \TEST_SINGLE~output .OUT_SYNC_MODE = 1'b0;
  3778. defparam \TEST_SINGLE~output .OUT_POWERUP = 1'b0;
  3779. defparam \TEST_SINGLE~output .OE_REG_MODE = 1'b0;
  3780. defparam \TEST_SINGLE~output .OE_ASYNC_MODE = 1'b0;
  3781. defparam \TEST_SINGLE~output .OE_SYNC_MODE = 1'b0;
  3782. defparam \TEST_SINGLE~output .OE_POWERUP = 1'b0;
  3783. defparam \TEST_SINGLE~output .CFG_TRI_INPUT = 1'b0;
  3784. defparam \TEST_SINGLE~output .CFG_INPUT_EN = 1'b0;
  3785. defparam \TEST_SINGLE~output .CFG_PULL_UP = 1'b0;
  3786. defparam \TEST_SINGLE~output .CFG_SLR = 1'b0;
  3787. defparam \TEST_SINGLE~output .CFG_OPEN_DRAIN = 1'b0;
  3788. defparam \TEST_SINGLE~output .CFG_PDRCTRL = 4'b0100;
  3789. defparam \TEST_SINGLE~output .CFG_KEEP = 2'b00;
  3790. defparam \TEST_SINGLE~output .CFG_LVDS_OUT_EN = 1'b0;
  3791. defparam \TEST_SINGLE~output .CFG_LVDS_SEL_CUA = 2'b00;
  3792. defparam \TEST_SINGLE~output .CFG_LVDS_IREF = 10'b0110000000;
  3793. defparam \TEST_SINGLE~output .CFG_LVDS_IN_EN = 1'b0;
  3794. defparam \TEST_SINGLE~output .DPCLK_DELAY = 4'b0000;
  3795. defparam \TEST_SINGLE~output .OUT_DELAY = 1'b0;
  3796. defparam \TEST_SINGLE~output .IN_DATA_DELAY = 3'b000;
  3797. defparam \TEST_SINGLE~output .IN_REG_DELAY = 3'b000;
  3798. alta_rio \UART0_UARTRXD~input (
  3799. .padio(UART0_UARTRXD),
  3800. .datain(gnd),
  3801. .oe(gnd),
  3802. .outclk(gnd),
  3803. .outclkena(vcc),
  3804. .inclk(gnd),
  3805. .inclkena(vcc),
  3806. .areset(gnd),
  3807. .sreset(gnd),
  3808. .combout(\UART0_UARTRXD~input_o ),
  3809. .regout());
  3810. defparam \UART0_UARTRXD~input .coord_x = 0;
  3811. defparam \UART0_UARTRXD~input .coord_y = 1;
  3812. defparam \UART0_UARTRXD~input .coord_z = 0;
  3813. defparam \UART0_UARTRXD~input .IN_ASYNC_MODE = 1'b0;
  3814. defparam \UART0_UARTRXD~input .IN_SYNC_MODE = 1'b0;
  3815. defparam \UART0_UARTRXD~input .IN_POWERUP = 1'b0;
  3816. defparam \UART0_UARTRXD~input .OUT_REG_MODE = 1'b0;
  3817. defparam \UART0_UARTRXD~input .OUT_ASYNC_MODE = 1'b0;
  3818. defparam \UART0_UARTRXD~input .OUT_SYNC_MODE = 1'b0;
  3819. defparam \UART0_UARTRXD~input .OUT_POWERUP = 1'b0;
  3820. defparam \UART0_UARTRXD~input .OE_REG_MODE = 1'b0;
  3821. defparam \UART0_UARTRXD~input .OE_ASYNC_MODE = 1'b0;
  3822. defparam \UART0_UARTRXD~input .OE_SYNC_MODE = 1'b0;
  3823. defparam \UART0_UARTRXD~input .OE_POWERUP = 1'b0;
  3824. defparam \UART0_UARTRXD~input .CFG_TRI_INPUT = 1'b0;
  3825. defparam \UART0_UARTRXD~input .CFG_INPUT_EN = 1'b1;
  3826. defparam \UART0_UARTRXD~input .CFG_PULL_UP = 1'b0;
  3827. defparam \UART0_UARTRXD~input .CFG_SLR = 1'b0;
  3828. defparam \UART0_UARTRXD~input .CFG_OPEN_DRAIN = 1'b0;
  3829. defparam \UART0_UARTRXD~input .CFG_PDRCTRL = 4'b0100;
  3830. defparam \UART0_UARTRXD~input .CFG_KEEP = 2'b00;
  3831. defparam \UART0_UARTRXD~input .CFG_LVDS_OUT_EN = 1'b0;
  3832. defparam \UART0_UARTRXD~input .CFG_LVDS_SEL_CUA = 2'b00;
  3833. defparam \UART0_UARTRXD~input .CFG_LVDS_IREF = 10'b0110000000;
  3834. defparam \UART0_UARTRXD~input .CFG_LVDS_IN_EN = 1'b0;
  3835. defparam \UART0_UARTRXD~input .DPCLK_DELAY = 4'b0000;
  3836. defparam \UART0_UARTRXD~input .OUT_DELAY = 1'b0;
  3837. defparam \UART0_UARTRXD~input .IN_DATA_DELAY = 3'b000;
  3838. defparam \UART0_UARTRXD~input .IN_REG_DELAY = 3'b000;
  3839. alta_rio \UART0_UARTTXD~output (
  3840. .padio(UART0_UARTTXD),
  3841. .datain(\rv32.gpio7_io_out_data[6] ),
  3842. .oe(\rv32.gpio7_io_out_en[6] ),
  3843. .outclk(gnd),
  3844. .outclkena(vcc),
  3845. .inclk(gnd),
  3846. .inclkena(vcc),
  3847. .areset(gnd),
  3848. .sreset(gnd),
  3849. .combout(),
  3850. .regout());
  3851. defparam \UART0_UARTTXD~output .coord_x = 0;
  3852. defparam \UART0_UARTTXD~output .coord_y = 2;
  3853. defparam \UART0_UARTTXD~output .coord_z = 5;
  3854. defparam \UART0_UARTTXD~output .IN_ASYNC_MODE = 1'b0;
  3855. defparam \UART0_UARTTXD~output .IN_SYNC_MODE = 1'b0;
  3856. defparam \UART0_UARTTXD~output .IN_POWERUP = 1'b0;
  3857. defparam \UART0_UARTTXD~output .OUT_REG_MODE = 1'b0;
  3858. defparam \UART0_UARTTXD~output .OUT_ASYNC_MODE = 1'b0;
  3859. defparam \UART0_UARTTXD~output .OUT_SYNC_MODE = 1'b0;
  3860. defparam \UART0_UARTTXD~output .OUT_POWERUP = 1'b0;
  3861. defparam \UART0_UARTTXD~output .OE_REG_MODE = 1'b0;
  3862. defparam \UART0_UARTTXD~output .OE_ASYNC_MODE = 1'b0;
  3863. defparam \UART0_UARTTXD~output .OE_SYNC_MODE = 1'b0;
  3864. defparam \UART0_UARTTXD~output .OE_POWERUP = 1'b0;
  3865. defparam \UART0_UARTTXD~output .CFG_TRI_INPUT = 1'b0;
  3866. defparam \UART0_UARTTXD~output .CFG_INPUT_EN = 1'b0;
  3867. defparam \UART0_UARTTXD~output .CFG_PULL_UP = 1'b0;
  3868. defparam \UART0_UARTTXD~output .CFG_SLR = 1'b0;
  3869. defparam \UART0_UARTTXD~output .CFG_OPEN_DRAIN = 1'b0;
  3870. defparam \UART0_UARTTXD~output .CFG_PDRCTRL = 4'b0100;
  3871. defparam \UART0_UARTTXD~output .CFG_KEEP = 2'b00;
  3872. defparam \UART0_UARTTXD~output .CFG_LVDS_OUT_EN = 1'b0;
  3873. defparam \UART0_UARTTXD~output .CFG_LVDS_SEL_CUA = 2'b00;
  3874. defparam \UART0_UARTTXD~output .CFG_LVDS_IREF = 10'b0110000000;
  3875. defparam \UART0_UARTTXD~output .CFG_LVDS_IN_EN = 1'b0;
  3876. defparam \UART0_UARTTXD~output .DPCLK_DELAY = 4'b0000;
  3877. defparam \UART0_UARTTXD~output .OUT_DELAY = 1'b0;
  3878. defparam \UART0_UARTTXD~output .IN_DATA_DELAY = 3'b000;
  3879. defparam \UART0_UARTTXD~output .IN_REG_DELAY = 3'b000;
  3880. alta_rio \UART1_RX~output (
  3881. .padio(UART1_RX),
  3882. .datain(gnd),
  3883. .oe(gnd),
  3884. .outclk(gnd),
  3885. .outclkena(vcc),
  3886. .inclk(gnd),
  3887. .inclkena(vcc),
  3888. .areset(gnd),
  3889. .sreset(gnd),
  3890. .combout(\UART1_RX~input_o ),
  3891. .regout());
  3892. defparam \UART1_RX~output .coord_x = 20;
  3893. defparam \UART1_RX~output .coord_y = 13;
  3894. defparam \UART1_RX~output .coord_z = 3;
  3895. defparam \UART1_RX~output .IN_ASYNC_MODE = 1'b0;
  3896. defparam \UART1_RX~output .IN_SYNC_MODE = 1'b0;
  3897. defparam \UART1_RX~output .IN_POWERUP = 1'b0;
  3898. defparam \UART1_RX~output .OUT_REG_MODE = 1'b0;
  3899. defparam \UART1_RX~output .OUT_ASYNC_MODE = 1'b0;
  3900. defparam \UART1_RX~output .OUT_SYNC_MODE = 1'b0;
  3901. defparam \UART1_RX~output .OUT_POWERUP = 1'b0;
  3902. defparam \UART1_RX~output .OE_REG_MODE = 1'b0;
  3903. defparam \UART1_RX~output .OE_ASYNC_MODE = 1'b0;
  3904. defparam \UART1_RX~output .OE_SYNC_MODE = 1'b0;
  3905. defparam \UART1_RX~output .OE_POWERUP = 1'b0;
  3906. defparam \UART1_RX~output .CFG_TRI_INPUT = 1'b0;
  3907. defparam \UART1_RX~output .CFG_INPUT_EN = 1'b1;
  3908. defparam \UART1_RX~output .CFG_PULL_UP = 1'b0;
  3909. defparam \UART1_RX~output .CFG_SLR = 1'b0;
  3910. defparam \UART1_RX~output .CFG_OPEN_DRAIN = 1'b0;
  3911. defparam \UART1_RX~output .CFG_PDRCTRL = 4'b0100;
  3912. defparam \UART1_RX~output .CFG_KEEP = 2'b00;
  3913. defparam \UART1_RX~output .CFG_LVDS_OUT_EN = 1'b0;
  3914. defparam \UART1_RX~output .CFG_LVDS_SEL_CUA = 2'b00;
  3915. defparam \UART1_RX~output .CFG_LVDS_IREF = 10'b0110000000;
  3916. defparam \UART1_RX~output .CFG_LVDS_IN_EN = 1'b0;
  3917. defparam \UART1_RX~output .DPCLK_DELAY = 4'b0000;
  3918. defparam \UART1_RX~output .OUT_DELAY = 1'b0;
  3919. defparam \UART1_RX~output .IN_DATA_DELAY = 3'b000;
  3920. defparam \UART1_RX~output .IN_REG_DELAY = 3'b000;
  3921. alta_rio \UART1_TX~output (
  3922. .padio(UART1_TX),
  3923. .datain(\rv32.gpio8_io_out_data[0] ),
  3924. .oe(\rv32.gpio8_io_out_en[0] ),
  3925. .outclk(gnd),
  3926. .outclkena(vcc),
  3927. .inclk(gnd),
  3928. .inclkena(vcc),
  3929. .areset(gnd),
  3930. .sreset(gnd),
  3931. .combout(\UART1_TX~input_o ),
  3932. .regout());
  3933. defparam \UART1_TX~output .coord_x = 20;
  3934. defparam \UART1_TX~output .coord_y = 13;
  3935. defparam \UART1_TX~output .coord_z = 2;
  3936. defparam \UART1_TX~output .IN_ASYNC_MODE = 1'b0;
  3937. defparam \UART1_TX~output .IN_SYNC_MODE = 1'b0;
  3938. defparam \UART1_TX~output .IN_POWERUP = 1'b0;
  3939. defparam \UART1_TX~output .OUT_REG_MODE = 1'b0;
  3940. defparam \UART1_TX~output .OUT_ASYNC_MODE = 1'b0;
  3941. defparam \UART1_TX~output .OUT_SYNC_MODE = 1'b0;
  3942. defparam \UART1_TX~output .OUT_POWERUP = 1'b0;
  3943. defparam \UART1_TX~output .OE_REG_MODE = 1'b0;
  3944. defparam \UART1_TX~output .OE_ASYNC_MODE = 1'b0;
  3945. defparam \UART1_TX~output .OE_SYNC_MODE = 1'b0;
  3946. defparam \UART1_TX~output .OE_POWERUP = 1'b0;
  3947. defparam \UART1_TX~output .CFG_TRI_INPUT = 1'b0;
  3948. defparam \UART1_TX~output .CFG_INPUT_EN = 1'b0;
  3949. defparam \UART1_TX~output .CFG_PULL_UP = 1'b0;
  3950. defparam \UART1_TX~output .CFG_SLR = 1'b0;
  3951. defparam \UART1_TX~output .CFG_OPEN_DRAIN = 1'b0;
  3952. defparam \UART1_TX~output .CFG_PDRCTRL = 4'b0100;
  3953. defparam \UART1_TX~output .CFG_KEEP = 2'b00;
  3954. defparam \UART1_TX~output .CFG_LVDS_OUT_EN = 1'b0;
  3955. defparam \UART1_TX~output .CFG_LVDS_SEL_CUA = 2'b00;
  3956. defparam \UART1_TX~output .CFG_LVDS_IREF = 10'b0110000000;
  3957. defparam \UART1_TX~output .CFG_LVDS_IN_EN = 1'b0;
  3958. defparam \UART1_TX~output .DPCLK_DELAY = 4'b0000;
  3959. defparam \UART1_TX~output .OUT_DELAY = 1'b0;
  3960. defparam \UART1_TX~output .IN_DATA_DELAY = 3'b000;
  3961. defparam \UART1_TX~output .IN_REG_DELAY = 3'b000;
  3962. alta_asyncctrl asyncreset_ctrl_X46_Y1_N0(
  3963. .Din(\PLL_ENABLE~clkctrl_outclk ),
  3964. .Dout(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X46_Y1_SIG ));
  3965. defparam asyncreset_ctrl_X46_Y1_N0.coord_x = 20;
  3966. defparam asyncreset_ctrl_X46_Y1_N0.coord_y = 3;
  3967. defparam asyncreset_ctrl_X46_Y1_N0.coord_z = 0;
  3968. defparam asyncreset_ctrl_X46_Y1_N0.AsyncCtrlMux = 2'b10;
  3969. alta_asyncctrl asyncreset_ctrl_X54_Y4_N0(
  3970. .Din(\sys_resetn~clkctrl_outclk ),
  3971. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ));
  3972. defparam asyncreset_ctrl_X54_Y4_N0.coord_x = 14;
  3973. defparam asyncreset_ctrl_X54_Y4_N0.coord_y = 4;
  3974. defparam asyncreset_ctrl_X54_Y4_N0.coord_z = 0;
  3975. defparam asyncreset_ctrl_X54_Y4_N0.AsyncCtrlMux = 2'b10;
  3976. alta_asyncctrl asyncreset_ctrl_X56_Y10_N0(
  3977. .Din(\sys_resetn~clkctrl_outclk ),
  3978. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ));
  3979. defparam asyncreset_ctrl_X56_Y10_N0.coord_x = 14;
  3980. defparam asyncreset_ctrl_X56_Y10_N0.coord_y = 11;
  3981. defparam asyncreset_ctrl_X56_Y10_N0.coord_z = 0;
  3982. defparam asyncreset_ctrl_X56_Y10_N0.AsyncCtrlMux = 2'b10;
  3983. alta_asyncctrl asyncreset_ctrl_X56_Y11_N0(
  3984. .Din(\sys_resetn~clkctrl_outclk ),
  3985. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ));
  3986. defparam asyncreset_ctrl_X56_Y11_N0.coord_x = 15;
  3987. defparam asyncreset_ctrl_X56_Y11_N0.coord_y = 11;
  3988. defparam asyncreset_ctrl_X56_Y11_N0.coord_z = 0;
  3989. defparam asyncreset_ctrl_X56_Y11_N0.AsyncCtrlMux = 2'b10;
  3990. alta_asyncctrl asyncreset_ctrl_X56_Y12_N0(
  3991. .Din(\sys_resetn~clkctrl_outclk ),
  3992. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ));
  3993. defparam asyncreset_ctrl_X56_Y12_N0.coord_x = 14;
  3994. defparam asyncreset_ctrl_X56_Y12_N0.coord_y = 8;
  3995. defparam asyncreset_ctrl_X56_Y12_N0.coord_z = 0;
  3996. defparam asyncreset_ctrl_X56_Y12_N0.AsyncCtrlMux = 2'b10;
  3997. alta_asyncctrl asyncreset_ctrl_X56_Y4_N0(
  3998. .Din(\sys_resetn~clkctrl_outclk ),
  3999. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ));
  4000. defparam asyncreset_ctrl_X56_Y4_N0.coord_x = 20;
  4001. defparam asyncreset_ctrl_X56_Y4_N0.coord_y = 5;
  4002. defparam asyncreset_ctrl_X56_Y4_N0.coord_z = 0;
  4003. defparam asyncreset_ctrl_X56_Y4_N0.AsyncCtrlMux = 2'b10;
  4004. alta_asyncctrl asyncreset_ctrl_X56_Y8_N0(
  4005. .Din(),
  4006. .Dout(AsyncReset_X56_Y8_GND));
  4007. defparam asyncreset_ctrl_X56_Y8_N0.coord_x = 15;
  4008. defparam asyncreset_ctrl_X56_Y8_N0.coord_y = 6;
  4009. defparam asyncreset_ctrl_X56_Y8_N0.coord_z = 0;
  4010. defparam asyncreset_ctrl_X56_Y8_N0.AsyncCtrlMux = 2'b00;
  4011. alta_asyncctrl asyncreset_ctrl_X57_Y10_N0(
  4012. .Din(\sys_resetn~clkctrl_outclk ),
  4013. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ));
  4014. defparam asyncreset_ctrl_X57_Y10_N0.coord_x = 14;
  4015. defparam asyncreset_ctrl_X57_Y10_N0.coord_y = 9;
  4016. defparam asyncreset_ctrl_X57_Y10_N0.coord_z = 0;
  4017. defparam asyncreset_ctrl_X57_Y10_N0.AsyncCtrlMux = 2'b10;
  4018. alta_asyncctrl asyncreset_ctrl_X57_Y11_N0(
  4019. .Din(\sys_resetn~clkctrl_outclk ),
  4020. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ));
  4021. defparam asyncreset_ctrl_X57_Y11_N0.coord_x = 16;
  4022. defparam asyncreset_ctrl_X57_Y11_N0.coord_y = 11;
  4023. defparam asyncreset_ctrl_X57_Y11_N0.coord_z = 0;
  4024. defparam asyncreset_ctrl_X57_Y11_N0.AsyncCtrlMux = 2'b10;
  4025. alta_asyncctrl asyncreset_ctrl_X57_Y12_N0(
  4026. .Din(\sys_resetn~clkctrl_outclk ),
  4027. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ));
  4028. defparam asyncreset_ctrl_X57_Y12_N0.coord_x = 16;
  4029. defparam asyncreset_ctrl_X57_Y12_N0.coord_y = 9;
  4030. defparam asyncreset_ctrl_X57_Y12_N0.coord_z = 0;
  4031. defparam asyncreset_ctrl_X57_Y12_N0.AsyncCtrlMux = 2'b10;
  4032. alta_asyncctrl asyncreset_ctrl_X57_Y3_N0(
  4033. .Din(),
  4034. .Dout(AsyncReset_X57_Y3_GND));
  4035. defparam asyncreset_ctrl_X57_Y3_N0.coord_x = 17;
  4036. defparam asyncreset_ctrl_X57_Y3_N0.coord_y = 2;
  4037. defparam asyncreset_ctrl_X57_Y3_N0.coord_z = 0;
  4038. defparam asyncreset_ctrl_X57_Y3_N0.AsyncCtrlMux = 2'b00;
  4039. alta_asyncctrl asyncreset_ctrl_X57_Y4_N0(
  4040. .Din(\sys_resetn~clkctrl_outclk ),
  4041. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ));
  4042. defparam asyncreset_ctrl_X57_Y4_N0.coord_x = 19;
  4043. defparam asyncreset_ctrl_X57_Y4_N0.coord_y = 5;
  4044. defparam asyncreset_ctrl_X57_Y4_N0.coord_z = 0;
  4045. defparam asyncreset_ctrl_X57_Y4_N0.AsyncCtrlMux = 2'b10;
  4046. alta_asyncctrl asyncreset_ctrl_X57_Y6_N0(
  4047. .Din(),
  4048. .Dout(AsyncReset_X57_Y6_GND));
  4049. defparam asyncreset_ctrl_X57_Y6_N0.coord_x = 14;
  4050. defparam asyncreset_ctrl_X57_Y6_N0.coord_y = 5;
  4051. defparam asyncreset_ctrl_X57_Y6_N0.coord_z = 0;
  4052. defparam asyncreset_ctrl_X57_Y6_N0.AsyncCtrlMux = 2'b00;
  4053. alta_asyncctrl asyncreset_ctrl_X57_Y7_N0(
  4054. .Din(\sys_resetn~clkctrl_outclk ),
  4055. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ));
  4056. defparam asyncreset_ctrl_X57_Y7_N0.coord_x = 16;
  4057. defparam asyncreset_ctrl_X57_Y7_N0.coord_y = 8;
  4058. defparam asyncreset_ctrl_X57_Y7_N0.coord_z = 0;
  4059. defparam asyncreset_ctrl_X57_Y7_N0.AsyncCtrlMux = 2'b10;
  4060. alta_asyncctrl asyncreset_ctrl_X57_Y7_N1(
  4061. .Din(),
  4062. .Dout(AsyncReset_X57_Y7_GND));
  4063. defparam asyncreset_ctrl_X57_Y7_N1.coord_x = 16;
  4064. defparam asyncreset_ctrl_X57_Y7_N1.coord_y = 8;
  4065. defparam asyncreset_ctrl_X57_Y7_N1.coord_z = 1;
  4066. defparam asyncreset_ctrl_X57_Y7_N1.AsyncCtrlMux = 2'b00;
  4067. alta_asyncctrl asyncreset_ctrl_X57_Y8_N0(
  4068. .Din(),
  4069. .Dout(AsyncReset_X57_Y8_GND));
  4070. defparam asyncreset_ctrl_X57_Y8_N0.coord_x = 15;
  4071. defparam asyncreset_ctrl_X57_Y8_N0.coord_y = 8;
  4072. defparam asyncreset_ctrl_X57_Y8_N0.coord_z = 0;
  4073. defparam asyncreset_ctrl_X57_Y8_N0.AsyncCtrlMux = 2'b00;
  4074. alta_asyncctrl asyncreset_ctrl_X57_Y8_N1(
  4075. .Din(\sys_resetn~clkctrl_outclk ),
  4076. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ));
  4077. defparam asyncreset_ctrl_X57_Y8_N1.coord_x = 15;
  4078. defparam asyncreset_ctrl_X57_Y8_N1.coord_y = 8;
  4079. defparam asyncreset_ctrl_X57_Y8_N1.coord_z = 1;
  4080. defparam asyncreset_ctrl_X57_Y8_N1.AsyncCtrlMux = 2'b10;
  4081. alta_asyncctrl asyncreset_ctrl_X57_Y9_N0(
  4082. .Din(),
  4083. .Dout(AsyncReset_X57_Y9_GND));
  4084. defparam asyncreset_ctrl_X57_Y9_N0.coord_x = 14;
  4085. defparam asyncreset_ctrl_X57_Y9_N0.coord_y = 6;
  4086. defparam asyncreset_ctrl_X57_Y9_N0.coord_z = 0;
  4087. defparam asyncreset_ctrl_X57_Y9_N0.AsyncCtrlMux = 2'b00;
  4088. alta_asyncctrl asyncreset_ctrl_X57_Y9_N1(
  4089. .Din(\sys_resetn~clkctrl_outclk ),
  4090. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ));
  4091. defparam asyncreset_ctrl_X57_Y9_N1.coord_x = 14;
  4092. defparam asyncreset_ctrl_X57_Y9_N1.coord_y = 6;
  4093. defparam asyncreset_ctrl_X57_Y9_N1.coord_z = 1;
  4094. defparam asyncreset_ctrl_X57_Y9_N1.AsyncCtrlMux = 2'b10;
  4095. alta_asyncctrl asyncreset_ctrl_X58_Y10_N0(
  4096. .Din(\sys_resetn~clkctrl_outclk ),
  4097. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ));
  4098. defparam asyncreset_ctrl_X58_Y10_N0.coord_x = 15;
  4099. defparam asyncreset_ctrl_X58_Y10_N0.coord_y = 9;
  4100. defparam asyncreset_ctrl_X58_Y10_N0.coord_z = 0;
  4101. defparam asyncreset_ctrl_X58_Y10_N0.AsyncCtrlMux = 2'b10;
  4102. alta_asyncctrl asyncreset_ctrl_X58_Y11_N0(
  4103. .Din(\sys_resetn~clkctrl_outclk ),
  4104. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ));
  4105. defparam asyncreset_ctrl_X58_Y11_N0.coord_x = 15;
  4106. defparam asyncreset_ctrl_X58_Y11_N0.coord_y = 10;
  4107. defparam asyncreset_ctrl_X58_Y11_N0.coord_z = 0;
  4108. defparam asyncreset_ctrl_X58_Y11_N0.AsyncCtrlMux = 2'b10;
  4109. alta_asyncctrl asyncreset_ctrl_X58_Y12_N0(
  4110. .Din(\sys_resetn~clkctrl_outclk ),
  4111. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ));
  4112. defparam asyncreset_ctrl_X58_Y12_N0.coord_x = 15;
  4113. defparam asyncreset_ctrl_X58_Y12_N0.coord_y = 12;
  4114. defparam asyncreset_ctrl_X58_Y12_N0.coord_z = 0;
  4115. defparam asyncreset_ctrl_X58_Y12_N0.AsyncCtrlMux = 2'b10;
  4116. alta_asyncctrl asyncreset_ctrl_X58_Y4_N0(
  4117. .Din(\sys_resetn~clkctrl_outclk ),
  4118. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ));
  4119. defparam asyncreset_ctrl_X58_Y4_N0.coord_x = 19;
  4120. defparam asyncreset_ctrl_X58_Y4_N0.coord_y = 4;
  4121. defparam asyncreset_ctrl_X58_Y4_N0.coord_z = 0;
  4122. defparam asyncreset_ctrl_X58_Y4_N0.AsyncCtrlMux = 2'b10;
  4123. alta_asyncctrl asyncreset_ctrl_X58_Y6_N1(
  4124. .Din(\sys_resetn~clkctrl_outclk ),
  4125. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ));
  4126. defparam asyncreset_ctrl_X58_Y6_N1.coord_x = 20;
  4127. defparam asyncreset_ctrl_X58_Y6_N1.coord_y = 8;
  4128. defparam asyncreset_ctrl_X58_Y6_N1.coord_z = 1;
  4129. defparam asyncreset_ctrl_X58_Y6_N1.AsyncCtrlMux = 2'b10;
  4130. alta_asyncctrl asyncreset_ctrl_X58_Y7_N1(
  4131. .Din(\sys_resetn~clkctrl_outclk ),
  4132. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ));
  4133. defparam asyncreset_ctrl_X58_Y7_N1.coord_x = 20;
  4134. defparam asyncreset_ctrl_X58_Y7_N1.coord_y = 10;
  4135. defparam asyncreset_ctrl_X58_Y7_N1.coord_z = 1;
  4136. defparam asyncreset_ctrl_X58_Y7_N1.AsyncCtrlMux = 2'b10;
  4137. alta_asyncctrl asyncreset_ctrl_X58_Y8_N0(
  4138. .Din(\sys_resetn~clkctrl_outclk ),
  4139. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ));
  4140. defparam asyncreset_ctrl_X58_Y8_N0.coord_x = 16;
  4141. defparam asyncreset_ctrl_X58_Y8_N0.coord_y = 6;
  4142. defparam asyncreset_ctrl_X58_Y8_N0.coord_z = 0;
  4143. defparam asyncreset_ctrl_X58_Y8_N0.AsyncCtrlMux = 2'b10;
  4144. alta_asyncctrl asyncreset_ctrl_X58_Y9_N0(
  4145. .Din(\sys_resetn~clkctrl_outclk ),
  4146. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ));
  4147. defparam asyncreset_ctrl_X58_Y9_N0.coord_x = 16;
  4148. defparam asyncreset_ctrl_X58_Y9_N0.coord_y = 10;
  4149. defparam asyncreset_ctrl_X58_Y9_N0.coord_z = 0;
  4150. defparam asyncreset_ctrl_X58_Y9_N0.AsyncCtrlMux = 2'b10;
  4151. alta_asyncctrl asyncreset_ctrl_X59_Y10_N0(
  4152. .Din(\sys_resetn~clkctrl_outclk ),
  4153. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ));
  4154. defparam asyncreset_ctrl_X59_Y10_N0.coord_x = 14;
  4155. defparam asyncreset_ctrl_X59_Y10_N0.coord_y = 12;
  4156. defparam asyncreset_ctrl_X59_Y10_N0.coord_z = 0;
  4157. defparam asyncreset_ctrl_X59_Y10_N0.AsyncCtrlMux = 2'b10;
  4158. alta_asyncctrl asyncreset_ctrl_X59_Y11_N0(
  4159. .Din(\sys_resetn~clkctrl_outclk ),
  4160. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ));
  4161. defparam asyncreset_ctrl_X59_Y11_N0.coord_x = 18;
  4162. defparam asyncreset_ctrl_X59_Y11_N0.coord_y = 10;
  4163. defparam asyncreset_ctrl_X59_Y11_N0.coord_z = 0;
  4164. defparam asyncreset_ctrl_X59_Y11_N0.AsyncCtrlMux = 2'b10;
  4165. alta_asyncctrl asyncreset_ctrl_X59_Y12_N0(
  4166. .Din(\sys_resetn~clkctrl_outclk ),
  4167. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ));
  4168. defparam asyncreset_ctrl_X59_Y12_N0.coord_x = 16;
  4169. defparam asyncreset_ctrl_X59_Y12_N0.coord_y = 12;
  4170. defparam asyncreset_ctrl_X59_Y12_N0.coord_z = 0;
  4171. defparam asyncreset_ctrl_X59_Y12_N0.AsyncCtrlMux = 2'b10;
  4172. alta_asyncctrl asyncreset_ctrl_X59_Y3_N1(
  4173. .Din(\sys_resetn~clkctrl_outclk ),
  4174. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ));
  4175. defparam asyncreset_ctrl_X59_Y3_N1.coord_x = 15;
  4176. defparam asyncreset_ctrl_X59_Y3_N1.coord_y = 7;
  4177. defparam asyncreset_ctrl_X59_Y3_N1.coord_z = 1;
  4178. defparam asyncreset_ctrl_X59_Y3_N1.AsyncCtrlMux = 2'b10;
  4179. alta_asyncctrl asyncreset_ctrl_X59_Y4_N0(
  4180. .Din(\sys_resetn~clkctrl_outclk ),
  4181. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ));
  4182. defparam asyncreset_ctrl_X59_Y4_N0.coord_x = 20;
  4183. defparam asyncreset_ctrl_X59_Y4_N0.coord_y = 4;
  4184. defparam asyncreset_ctrl_X59_Y4_N0.coord_z = 0;
  4185. defparam asyncreset_ctrl_X59_Y4_N0.AsyncCtrlMux = 2'b10;
  4186. alta_asyncctrl asyncreset_ctrl_X59_Y5_N1(
  4187. .Din(\sys_resetn~clkctrl_outclk ),
  4188. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ));
  4189. defparam asyncreset_ctrl_X59_Y5_N1.coord_x = 19;
  4190. defparam asyncreset_ctrl_X59_Y5_N1.coord_y = 6;
  4191. defparam asyncreset_ctrl_X59_Y5_N1.coord_z = 1;
  4192. defparam asyncreset_ctrl_X59_Y5_N1.AsyncCtrlMux = 2'b10;
  4193. alta_asyncctrl asyncreset_ctrl_X59_Y6_N0(
  4194. .Din(\sys_resetn~clkctrl_outclk ),
  4195. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ));
  4196. defparam asyncreset_ctrl_X59_Y6_N0.coord_x = 18;
  4197. defparam asyncreset_ctrl_X59_Y6_N0.coord_y = 8;
  4198. defparam asyncreset_ctrl_X59_Y6_N0.coord_z = 0;
  4199. defparam asyncreset_ctrl_X59_Y6_N0.AsyncCtrlMux = 2'b10;
  4200. alta_asyncctrl asyncreset_ctrl_X59_Y7_N0(
  4201. .Din(\sys_resetn~clkctrl_outclk ),
  4202. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ));
  4203. defparam asyncreset_ctrl_X59_Y7_N0.coord_x = 20;
  4204. defparam asyncreset_ctrl_X59_Y7_N0.coord_y = 6;
  4205. defparam asyncreset_ctrl_X59_Y7_N0.coord_z = 0;
  4206. defparam asyncreset_ctrl_X59_Y7_N0.AsyncCtrlMux = 2'b10;
  4207. alta_asyncctrl asyncreset_ctrl_X59_Y8_N0(
  4208. .Din(\sys_resetn~clkctrl_outclk ),
  4209. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ));
  4210. defparam asyncreset_ctrl_X59_Y8_N0.coord_x = 17;
  4211. defparam asyncreset_ctrl_X59_Y8_N0.coord_y = 11;
  4212. defparam asyncreset_ctrl_X59_Y8_N0.coord_z = 0;
  4213. defparam asyncreset_ctrl_X59_Y8_N0.AsyncCtrlMux = 2'b10;
  4214. alta_asyncctrl asyncreset_ctrl_X59_Y9_N0(
  4215. .Din(\sys_resetn~clkctrl_outclk ),
  4216. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ));
  4217. defparam asyncreset_ctrl_X59_Y9_N0.coord_x = 17;
  4218. defparam asyncreset_ctrl_X59_Y9_N0.coord_y = 10;
  4219. defparam asyncreset_ctrl_X59_Y9_N0.coord_z = 0;
  4220. defparam asyncreset_ctrl_X59_Y9_N0.AsyncCtrlMux = 2'b10;
  4221. alta_asyncctrl asyncreset_ctrl_X60_Y10_N0(
  4222. .Din(\sys_resetn~clkctrl_outclk ),
  4223. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ));
  4224. defparam asyncreset_ctrl_X60_Y10_N0.coord_x = 17;
  4225. defparam asyncreset_ctrl_X60_Y10_N0.coord_y = 12;
  4226. defparam asyncreset_ctrl_X60_Y10_N0.coord_z = 0;
  4227. defparam asyncreset_ctrl_X60_Y10_N0.AsyncCtrlMux = 2'b10;
  4228. alta_asyncctrl asyncreset_ctrl_X60_Y11_N0(
  4229. .Din(\sys_resetn~clkctrl_outclk ),
  4230. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ));
  4231. defparam asyncreset_ctrl_X60_Y11_N0.coord_x = 17;
  4232. defparam asyncreset_ctrl_X60_Y11_N0.coord_y = 9;
  4233. defparam asyncreset_ctrl_X60_Y11_N0.coord_z = 0;
  4234. defparam asyncreset_ctrl_X60_Y11_N0.AsyncCtrlMux = 2'b10;
  4235. alta_asyncctrl asyncreset_ctrl_X60_Y12_N0(
  4236. .Din(\sys_resetn~clkctrl_outclk ),
  4237. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ));
  4238. defparam asyncreset_ctrl_X60_Y12_N0.coord_x = 18;
  4239. defparam asyncreset_ctrl_X60_Y12_N0.coord_y = 12;
  4240. defparam asyncreset_ctrl_X60_Y12_N0.coord_z = 0;
  4241. defparam asyncreset_ctrl_X60_Y12_N0.AsyncCtrlMux = 2'b10;
  4242. alta_asyncctrl asyncreset_ctrl_X60_Y3_N0(
  4243. .Din(\sys_resetn~clkctrl_outclk ),
  4244. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ));
  4245. defparam asyncreset_ctrl_X60_Y3_N0.coord_x = 18;
  4246. defparam asyncreset_ctrl_X60_Y3_N0.coord_y = 6;
  4247. defparam asyncreset_ctrl_X60_Y3_N0.coord_z = 0;
  4248. defparam asyncreset_ctrl_X60_Y3_N0.AsyncCtrlMux = 2'b10;
  4249. alta_asyncctrl asyncreset_ctrl_X60_Y4_N0(
  4250. .Din(\sys_resetn~clkctrl_outclk ),
  4251. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ));
  4252. defparam asyncreset_ctrl_X60_Y4_N0.coord_x = 18;
  4253. defparam asyncreset_ctrl_X60_Y4_N0.coord_y = 4;
  4254. defparam asyncreset_ctrl_X60_Y4_N0.coord_z = 0;
  4255. defparam asyncreset_ctrl_X60_Y4_N0.AsyncCtrlMux = 2'b10;
  4256. alta_asyncctrl asyncreset_ctrl_X60_Y5_N0(
  4257. .Din(\sys_resetn~clkctrl_outclk ),
  4258. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ));
  4259. defparam asyncreset_ctrl_X60_Y5_N0.coord_x = 20;
  4260. defparam asyncreset_ctrl_X60_Y5_N0.coord_y = 7;
  4261. defparam asyncreset_ctrl_X60_Y5_N0.coord_z = 0;
  4262. defparam asyncreset_ctrl_X60_Y5_N0.AsyncCtrlMux = 2'b10;
  4263. alta_asyncctrl asyncreset_ctrl_X60_Y6_N0(
  4264. .Din(\sys_resetn~clkctrl_outclk ),
  4265. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ));
  4266. defparam asyncreset_ctrl_X60_Y6_N0.coord_x = 19;
  4267. defparam asyncreset_ctrl_X60_Y6_N0.coord_y = 8;
  4268. defparam asyncreset_ctrl_X60_Y6_N0.coord_z = 0;
  4269. defparam asyncreset_ctrl_X60_Y6_N0.AsyncCtrlMux = 2'b10;
  4270. alta_asyncctrl asyncreset_ctrl_X60_Y7_N0(
  4271. .Din(\sys_resetn~clkctrl_outclk ),
  4272. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ));
  4273. defparam asyncreset_ctrl_X60_Y7_N0.coord_x = 19;
  4274. defparam asyncreset_ctrl_X60_Y7_N0.coord_y = 9;
  4275. defparam asyncreset_ctrl_X60_Y7_N0.coord_z = 0;
  4276. defparam asyncreset_ctrl_X60_Y7_N0.AsyncCtrlMux = 2'b10;
  4277. alta_asyncctrl asyncreset_ctrl_X60_Y8_N0(
  4278. .Din(\sys_resetn~clkctrl_outclk ),
  4279. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ));
  4280. defparam asyncreset_ctrl_X60_Y8_N0.coord_x = 19;
  4281. defparam asyncreset_ctrl_X60_Y8_N0.coord_y = 10;
  4282. defparam asyncreset_ctrl_X60_Y8_N0.coord_z = 0;
  4283. defparam asyncreset_ctrl_X60_Y8_N0.AsyncCtrlMux = 2'b10;
  4284. alta_asyncctrl asyncreset_ctrl_X60_Y9_N0(
  4285. .Din(\sys_resetn~clkctrl_outclk ),
  4286. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ));
  4287. defparam asyncreset_ctrl_X60_Y9_N0.coord_x = 18;
  4288. defparam asyncreset_ctrl_X60_Y9_N0.coord_y = 9;
  4289. defparam asyncreset_ctrl_X60_Y9_N0.coord_z = 0;
  4290. defparam asyncreset_ctrl_X60_Y9_N0.AsyncCtrlMux = 2'b10;
  4291. alta_asyncctrl asyncreset_ctrl_X61_Y10_N1(
  4292. .Din(\sys_resetn~clkctrl_outclk ),
  4293. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ));
  4294. defparam asyncreset_ctrl_X61_Y10_N1.coord_x = 19;
  4295. defparam asyncreset_ctrl_X61_Y10_N1.coord_y = 11;
  4296. defparam asyncreset_ctrl_X61_Y10_N1.coord_z = 1;
  4297. defparam asyncreset_ctrl_X61_Y10_N1.AsyncCtrlMux = 2'b10;
  4298. alta_asyncctrl asyncreset_ctrl_X61_Y5_N0(
  4299. .Din(\sys_resetn~clkctrl_outclk ),
  4300. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ));
  4301. defparam asyncreset_ctrl_X61_Y5_N0.coord_x = 19;
  4302. defparam asyncreset_ctrl_X61_Y5_N0.coord_y = 7;
  4303. defparam asyncreset_ctrl_X61_Y5_N0.coord_z = 0;
  4304. defparam asyncreset_ctrl_X61_Y5_N0.AsyncCtrlMux = 2'b10;
  4305. alta_asyncctrl asyncreset_ctrl_X61_Y6_N0(
  4306. .Din(\sys_resetn~clkctrl_outclk ),
  4307. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ));
  4308. defparam asyncreset_ctrl_X61_Y6_N0.coord_x = 17;
  4309. defparam asyncreset_ctrl_X61_Y6_N0.coord_y = 6;
  4310. defparam asyncreset_ctrl_X61_Y6_N0.coord_z = 0;
  4311. defparam asyncreset_ctrl_X61_Y6_N0.AsyncCtrlMux = 2'b10;
  4312. alta_asyncctrl asyncreset_ctrl_X61_Y8_N0(
  4313. .Din(\sys_resetn~clkctrl_outclk ),
  4314. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ));
  4315. defparam asyncreset_ctrl_X61_Y8_N0.coord_x = 18;
  4316. defparam asyncreset_ctrl_X61_Y8_N0.coord_y = 11;
  4317. defparam asyncreset_ctrl_X61_Y8_N0.coord_z = 0;
  4318. defparam asyncreset_ctrl_X61_Y8_N0.AsyncCtrlMux = 2'b10;
  4319. alta_asyncctrl asyncreset_ctrl_X61_Y9_N0(
  4320. .Din(\sys_resetn~clkctrl_outclk ),
  4321. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ));
  4322. defparam asyncreset_ctrl_X61_Y9_N0.coord_x = 19;
  4323. defparam asyncreset_ctrl_X61_Y9_N0.coord_y = 12;
  4324. defparam asyncreset_ctrl_X61_Y9_N0.coord_z = 0;
  4325. defparam asyncreset_ctrl_X61_Y9_N0.AsyncCtrlMux = 2'b10;
  4326. alta_asyncctrl asyncreset_ctrl_X62_Y10_N0(
  4327. .Din(\sys_resetn~clkctrl_outclk ),
  4328. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ));
  4329. defparam asyncreset_ctrl_X62_Y10_N0.coord_x = 20;
  4330. defparam asyncreset_ctrl_X62_Y10_N0.coord_y = 11;
  4331. defparam asyncreset_ctrl_X62_Y10_N0.coord_z = 0;
  4332. defparam asyncreset_ctrl_X62_Y10_N0.AsyncCtrlMux = 2'b10;
  4333. alta_asyncctrl asyncreset_ctrl_X62_Y3_N0(
  4334. .Din(\sys_resetn~clkctrl_outclk ),
  4335. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ));
  4336. defparam asyncreset_ctrl_X62_Y3_N0.coord_x = 17;
  4337. defparam asyncreset_ctrl_X62_Y3_N0.coord_y = 7;
  4338. defparam asyncreset_ctrl_X62_Y3_N0.coord_z = 0;
  4339. defparam asyncreset_ctrl_X62_Y3_N0.AsyncCtrlMux = 2'b10;
  4340. alta_asyncctrl asyncreset_ctrl_X62_Y4_N0(
  4341. .Din(\sys_resetn~clkctrl_outclk ),
  4342. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ));
  4343. defparam asyncreset_ctrl_X62_Y4_N0.coord_x = 17;
  4344. defparam asyncreset_ctrl_X62_Y4_N0.coord_y = 8;
  4345. defparam asyncreset_ctrl_X62_Y4_N0.coord_z = 0;
  4346. defparam asyncreset_ctrl_X62_Y4_N0.AsyncCtrlMux = 2'b10;
  4347. alta_asyncctrl asyncreset_ctrl_X62_Y5_N1(
  4348. .Din(\sys_resetn~clkctrl_outclk ),
  4349. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ));
  4350. defparam asyncreset_ctrl_X62_Y5_N1.coord_x = 18;
  4351. defparam asyncreset_ctrl_X62_Y5_N1.coord_y = 7;
  4352. defparam asyncreset_ctrl_X62_Y5_N1.coord_z = 1;
  4353. defparam asyncreset_ctrl_X62_Y5_N1.AsyncCtrlMux = 2'b10;
  4354. alta_asyncctrl asyncreset_ctrl_X62_Y6_N1(
  4355. .Din(\sys_resetn~clkctrl_outclk ),
  4356. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ));
  4357. defparam asyncreset_ctrl_X62_Y6_N1.coord_x = 17;
  4358. defparam asyncreset_ctrl_X62_Y6_N1.coord_y = 4;
  4359. defparam asyncreset_ctrl_X62_Y6_N1.coord_z = 1;
  4360. defparam asyncreset_ctrl_X62_Y6_N1.AsyncCtrlMux = 2'b10;
  4361. alta_asyncctrl asyncreset_ctrl_X62_Y9_N0(
  4362. .Din(),
  4363. .Dout(AsyncReset_X62_Y9_GND));
  4364. defparam asyncreset_ctrl_X62_Y9_N0.coord_x = 17;
  4365. defparam asyncreset_ctrl_X62_Y9_N0.coord_y = 5;
  4366. defparam asyncreset_ctrl_X62_Y9_N0.coord_z = 0;
  4367. defparam asyncreset_ctrl_X62_Y9_N0.AsyncCtrlMux = 2'b00;
  4368. alta_clkenctrl clken_ctrl_X46_Y1_N0(
  4369. .ClkIn(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp ),
  4370. .ClkEn(),
  4371. .ClkOut(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp_X46_Y1_SIG_VCC ));
  4372. defparam clken_ctrl_X46_Y1_N0.coord_x = 20;
  4373. defparam clken_ctrl_X46_Y1_N0.coord_y = 3;
  4374. defparam clken_ctrl_X46_Y1_N0.coord_z = 0;
  4375. defparam clken_ctrl_X46_Y1_N0.ClkMux = 2'b10;
  4376. defparam clken_ctrl_X46_Y1_N0.ClkEnMux = 2'b01;
  4377. alta_clkenctrl clken_ctrl_X54_Y4_N0(
  4378. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4379. .ClkEn(\macro_inst|trig_ctrl_inst|ram_wren_b~0_combout ),
  4380. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ));
  4381. defparam clken_ctrl_X54_Y4_N0.coord_x = 14;
  4382. defparam clken_ctrl_X54_Y4_N0.coord_y = 4;
  4383. defparam clken_ctrl_X54_Y4_N0.coord_z = 0;
  4384. defparam clken_ctrl_X54_Y4_N0.ClkMux = 2'b10;
  4385. defparam clken_ctrl_X54_Y4_N0.ClkEnMux = 2'b10;
  4386. alta_clkenctrl clken_ctrl_X54_Y4_N1(
  4387. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4388. .ClkEn(),
  4389. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X54_Y4_SIG_VCC ));
  4390. defparam clken_ctrl_X54_Y4_N1.coord_x = 14;
  4391. defparam clken_ctrl_X54_Y4_N1.coord_y = 4;
  4392. defparam clken_ctrl_X54_Y4_N1.coord_z = 1;
  4393. defparam clken_ctrl_X54_Y4_N1.ClkMux = 2'b10;
  4394. defparam clken_ctrl_X54_Y4_N1.ClkEnMux = 2'b01;
  4395. alta_clkenctrl clken_ctrl_X56_Y10_N0(
  4396. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4397. .ClkEn(\macro_inst|ahb2apb_inst|comb~0_combout ),
  4398. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ));
  4399. defparam clken_ctrl_X56_Y10_N0.coord_x = 14;
  4400. defparam clken_ctrl_X56_Y10_N0.coord_y = 11;
  4401. defparam clken_ctrl_X56_Y10_N0.coord_z = 0;
  4402. defparam clken_ctrl_X56_Y10_N0.ClkMux = 2'b10;
  4403. defparam clken_ctrl_X56_Y10_N0.ClkEnMux = 2'b10;
  4404. alta_clkenctrl clken_ctrl_X56_Y10_N1(
  4405. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4406. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4407. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X56_Y10_SIG_SIG ));
  4408. defparam clken_ctrl_X56_Y10_N1.coord_x = 14;
  4409. defparam clken_ctrl_X56_Y10_N1.coord_y = 11;
  4410. defparam clken_ctrl_X56_Y10_N1.coord_z = 1;
  4411. defparam clken_ctrl_X56_Y10_N1.ClkMux = 2'b10;
  4412. defparam clken_ctrl_X56_Y10_N1.ClkEnMux = 2'b10;
  4413. alta_clkenctrl clken_ctrl_X56_Y11_N0(
  4414. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4415. .ClkEn(\macro_inst|ahb2apb_inst|comb~0_combout ),
  4416. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ));
  4417. defparam clken_ctrl_X56_Y11_N0.coord_x = 15;
  4418. defparam clken_ctrl_X56_Y11_N0.coord_y = 11;
  4419. defparam clken_ctrl_X56_Y11_N0.coord_z = 0;
  4420. defparam clken_ctrl_X56_Y11_N0.ClkMux = 2'b10;
  4421. defparam clken_ctrl_X56_Y11_N0.ClkEnMux = 2'b10;
  4422. alta_clkenctrl clken_ctrl_X56_Y11_N1(
  4423. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4424. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4425. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ));
  4426. defparam clken_ctrl_X56_Y11_N1.coord_x = 15;
  4427. defparam clken_ctrl_X56_Y11_N1.coord_y = 11;
  4428. defparam clken_ctrl_X56_Y11_N1.coord_z = 1;
  4429. defparam clken_ctrl_X56_Y11_N1.ClkMux = 2'b10;
  4430. defparam clken_ctrl_X56_Y11_N1.ClkEnMux = 2'b10;
  4431. alta_clkenctrl clken_ctrl_X56_Y12_N0(
  4432. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4433. .ClkEn(\macro_inst|ahb2apb_inst|comb~0_combout ),
  4434. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y12_SIG_SIG ));
  4435. defparam clken_ctrl_X56_Y12_N0.coord_x = 14;
  4436. defparam clken_ctrl_X56_Y12_N0.coord_y = 8;
  4437. defparam clken_ctrl_X56_Y12_N0.coord_z = 0;
  4438. defparam clken_ctrl_X56_Y12_N0.ClkMux = 2'b10;
  4439. defparam clken_ctrl_X56_Y12_N0.ClkEnMux = 2'b10;
  4440. alta_clkenctrl clken_ctrl_X56_Y4_N0(
  4441. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4442. .ClkEn(\macro_inst|apb_adc0_inst|always1~0_combout ),
  4443. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ));
  4444. defparam clken_ctrl_X56_Y4_N0.coord_x = 20;
  4445. defparam clken_ctrl_X56_Y4_N0.coord_y = 5;
  4446. defparam clken_ctrl_X56_Y4_N0.coord_z = 0;
  4447. defparam clken_ctrl_X56_Y4_N0.ClkMux = 2'b10;
  4448. defparam clken_ctrl_X56_Y4_N0.ClkEnMux = 2'b10;
  4449. alta_clkenctrl clken_ctrl_X56_Y4_N1(
  4450. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4451. .ClkEn(),
  4452. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y4_SIG_VCC ));
  4453. defparam clken_ctrl_X56_Y4_N1.coord_x = 20;
  4454. defparam clken_ctrl_X56_Y4_N1.coord_y = 5;
  4455. defparam clken_ctrl_X56_Y4_N1.coord_z = 1;
  4456. defparam clken_ctrl_X56_Y4_N1.ClkMux = 2'b10;
  4457. defparam clken_ctrl_X56_Y4_N1.ClkEnMux = 2'b01;
  4458. alta_clkenctrl clken_ctrl_X56_Y8_N0(
  4459. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4460. .ClkEn(),
  4461. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ));
  4462. defparam clken_ctrl_X56_Y8_N0.coord_x = 15;
  4463. defparam clken_ctrl_X56_Y8_N0.coord_y = 6;
  4464. defparam clken_ctrl_X56_Y8_N0.coord_z = 0;
  4465. defparam clken_ctrl_X56_Y8_N0.ClkMux = 2'b10;
  4466. defparam clken_ctrl_X56_Y8_N0.ClkEnMux = 2'b01;
  4467. alta_clkenctrl clken_ctrl_X57_Y10_N0(
  4468. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4469. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4470. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ));
  4471. defparam clken_ctrl_X57_Y10_N0.coord_x = 14;
  4472. defparam clken_ctrl_X57_Y10_N0.coord_y = 9;
  4473. defparam clken_ctrl_X57_Y10_N0.coord_z = 0;
  4474. defparam clken_ctrl_X57_Y10_N0.ClkMux = 2'b10;
  4475. defparam clken_ctrl_X57_Y10_N0.ClkEnMux = 2'b10;
  4476. alta_clkenctrl clken_ctrl_X57_Y10_N1(
  4477. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4478. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4479. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ));
  4480. defparam clken_ctrl_X57_Y10_N1.coord_x = 14;
  4481. defparam clken_ctrl_X57_Y10_N1.coord_y = 9;
  4482. defparam clken_ctrl_X57_Y10_N1.coord_z = 1;
  4483. defparam clken_ctrl_X57_Y10_N1.ClkMux = 2'b10;
  4484. defparam clken_ctrl_X57_Y10_N1.ClkEnMux = 2'b10;
  4485. alta_clkenctrl clken_ctrl_X57_Y11_N0(
  4486. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4487. .ClkEn(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  4488. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ));
  4489. defparam clken_ctrl_X57_Y11_N0.coord_x = 16;
  4490. defparam clken_ctrl_X57_Y11_N0.coord_y = 11;
  4491. defparam clken_ctrl_X57_Y11_N0.coord_z = 0;
  4492. defparam clken_ctrl_X57_Y11_N0.ClkMux = 2'b10;
  4493. defparam clken_ctrl_X57_Y11_N0.ClkEnMux = 2'b10;
  4494. alta_clkenctrl clken_ctrl_X57_Y11_N1(
  4495. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4496. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4497. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ));
  4498. defparam clken_ctrl_X57_Y11_N1.coord_x = 16;
  4499. defparam clken_ctrl_X57_Y11_N1.coord_y = 11;
  4500. defparam clken_ctrl_X57_Y11_N1.coord_z = 1;
  4501. defparam clken_ctrl_X57_Y11_N1.ClkMux = 2'b10;
  4502. defparam clken_ctrl_X57_Y11_N1.ClkEnMux = 2'b10;
  4503. alta_clkenctrl clken_ctrl_X57_Y12_N0(
  4504. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4505. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4506. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ));
  4507. defparam clken_ctrl_X57_Y12_N0.coord_x = 16;
  4508. defparam clken_ctrl_X57_Y12_N0.coord_y = 9;
  4509. defparam clken_ctrl_X57_Y12_N0.coord_z = 0;
  4510. defparam clken_ctrl_X57_Y12_N0.ClkMux = 2'b10;
  4511. defparam clken_ctrl_X57_Y12_N0.ClkEnMux = 2'b10;
  4512. alta_clkenctrl clken_ctrl_X57_Y12_N1(
  4513. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4514. .ClkEn(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  4515. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y12_SIG_SIG ));
  4516. defparam clken_ctrl_X57_Y12_N1.coord_x = 16;
  4517. defparam clken_ctrl_X57_Y12_N1.coord_y = 9;
  4518. defparam clken_ctrl_X57_Y12_N1.coord_z = 1;
  4519. defparam clken_ctrl_X57_Y12_N1.ClkMux = 2'b10;
  4520. defparam clken_ctrl_X57_Y12_N1.ClkEnMux = 2'b10;
  4521. alta_clkenctrl clken_ctrl_X57_Y3_N0(
  4522. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4523. .ClkEn(),
  4524. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y3_SIG_VCC ));
  4525. defparam clken_ctrl_X57_Y3_N0.coord_x = 17;
  4526. defparam clken_ctrl_X57_Y3_N0.coord_y = 2;
  4527. defparam clken_ctrl_X57_Y3_N0.coord_z = 0;
  4528. defparam clken_ctrl_X57_Y3_N0.ClkMux = 2'b10;
  4529. defparam clken_ctrl_X57_Y3_N0.ClkEnMux = 2'b01;
  4530. alta_clkenctrl clken_ctrl_X57_Y4_N0(
  4531. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4532. .ClkEn(\macro_inst|apb_adc0_inst|always1~0_combout ),
  4533. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ));
  4534. defparam clken_ctrl_X57_Y4_N0.coord_x = 19;
  4535. defparam clken_ctrl_X57_Y4_N0.coord_y = 5;
  4536. defparam clken_ctrl_X57_Y4_N0.coord_z = 0;
  4537. defparam clken_ctrl_X57_Y4_N0.ClkMux = 2'b10;
  4538. defparam clken_ctrl_X57_Y4_N0.ClkEnMux = 2'b10;
  4539. alta_clkenctrl clken_ctrl_X57_Y4_N1(
  4540. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4541. .ClkEn(\macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout ),
  4542. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ));
  4543. defparam clken_ctrl_X57_Y4_N1.coord_x = 19;
  4544. defparam clken_ctrl_X57_Y4_N1.coord_y = 5;
  4545. defparam clken_ctrl_X57_Y4_N1.coord_z = 1;
  4546. defparam clken_ctrl_X57_Y4_N1.ClkMux = 2'b10;
  4547. defparam clken_ctrl_X57_Y4_N1.ClkEnMux = 2'b10;
  4548. alta_clkenctrl clken_ctrl_X57_Y6_N0(
  4549. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4550. .ClkEn(),
  4551. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y6_SIG_VCC ));
  4552. defparam clken_ctrl_X57_Y6_N0.coord_x = 14;
  4553. defparam clken_ctrl_X57_Y6_N0.coord_y = 5;
  4554. defparam clken_ctrl_X57_Y6_N0.coord_z = 0;
  4555. defparam clken_ctrl_X57_Y6_N0.ClkMux = 2'b10;
  4556. defparam clken_ctrl_X57_Y6_N0.ClkEnMux = 2'b01;
  4557. alta_clkenctrl clken_ctrl_X57_Y7_N0(
  4558. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4559. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4560. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y7_SIG_SIG ));
  4561. defparam clken_ctrl_X57_Y7_N0.coord_x = 16;
  4562. defparam clken_ctrl_X57_Y7_N0.coord_y = 8;
  4563. defparam clken_ctrl_X57_Y7_N0.coord_z = 0;
  4564. defparam clken_ctrl_X57_Y7_N0.ClkMux = 2'b10;
  4565. defparam clken_ctrl_X57_Y7_N0.ClkEnMux = 2'b10;
  4566. alta_clkenctrl clken_ctrl_X57_Y7_N1(
  4567. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4568. .ClkEn(),
  4569. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y7_SIG_VCC ));
  4570. defparam clken_ctrl_X57_Y7_N1.coord_x = 16;
  4571. defparam clken_ctrl_X57_Y7_N1.coord_y = 8;
  4572. defparam clken_ctrl_X57_Y7_N1.coord_z = 1;
  4573. defparam clken_ctrl_X57_Y7_N1.ClkMux = 2'b10;
  4574. defparam clken_ctrl_X57_Y7_N1.ClkEnMux = 2'b01;
  4575. alta_clkenctrl clken_ctrl_X57_Y8_N0(
  4576. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4577. .ClkEn(),
  4578. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ));
  4579. defparam clken_ctrl_X57_Y8_N0.coord_x = 15;
  4580. defparam clken_ctrl_X57_Y8_N0.coord_y = 8;
  4581. defparam clken_ctrl_X57_Y8_N0.coord_z = 0;
  4582. defparam clken_ctrl_X57_Y8_N0.ClkMux = 2'b10;
  4583. defparam clken_ctrl_X57_Y8_N0.ClkEnMux = 2'b01;
  4584. alta_clkenctrl clken_ctrl_X57_Y8_N1(
  4585. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4586. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4587. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y8_SIG_SIG ));
  4588. defparam clken_ctrl_X57_Y8_N1.coord_x = 15;
  4589. defparam clken_ctrl_X57_Y8_N1.coord_y = 8;
  4590. defparam clken_ctrl_X57_Y8_N1.coord_z = 1;
  4591. defparam clken_ctrl_X57_Y8_N1.ClkMux = 2'b10;
  4592. defparam clken_ctrl_X57_Y8_N1.ClkEnMux = 2'b10;
  4593. alta_clkenctrl clken_ctrl_X57_Y9_N0(
  4594. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4595. .ClkEn(),
  4596. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ));
  4597. defparam clken_ctrl_X57_Y9_N0.coord_x = 14;
  4598. defparam clken_ctrl_X57_Y9_N0.coord_y = 6;
  4599. defparam clken_ctrl_X57_Y9_N0.coord_z = 0;
  4600. defparam clken_ctrl_X57_Y9_N0.ClkMux = 2'b10;
  4601. defparam clken_ctrl_X57_Y9_N0.ClkEnMux = 2'b01;
  4602. alta_clkenctrl clken_ctrl_X57_Y9_N1(
  4603. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4604. .ClkEn(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  4605. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y9_SIG_SIG ));
  4606. defparam clken_ctrl_X57_Y9_N1.coord_x = 14;
  4607. defparam clken_ctrl_X57_Y9_N1.coord_y = 6;
  4608. defparam clken_ctrl_X57_Y9_N1.coord_z = 1;
  4609. defparam clken_ctrl_X57_Y9_N1.ClkMux = 2'b10;
  4610. defparam clken_ctrl_X57_Y9_N1.ClkEnMux = 2'b10;
  4611. alta_clkenctrl clken_ctrl_X58_Y10_N0(
  4612. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4613. .ClkEn(),
  4614. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ));
  4615. defparam clken_ctrl_X58_Y10_N0.coord_x = 15;
  4616. defparam clken_ctrl_X58_Y10_N0.coord_y = 9;
  4617. defparam clken_ctrl_X58_Y10_N0.coord_z = 0;
  4618. defparam clken_ctrl_X58_Y10_N0.ClkMux = 2'b10;
  4619. defparam clken_ctrl_X58_Y10_N0.ClkEnMux = 2'b01;
  4620. alta_clkenctrl clken_ctrl_X58_Y11_N0(
  4621. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4622. .ClkEn(),
  4623. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ));
  4624. defparam clken_ctrl_X58_Y11_N0.coord_x = 15;
  4625. defparam clken_ctrl_X58_Y11_N0.coord_y = 10;
  4626. defparam clken_ctrl_X58_Y11_N0.coord_z = 0;
  4627. defparam clken_ctrl_X58_Y11_N0.ClkMux = 2'b10;
  4628. defparam clken_ctrl_X58_Y11_N0.ClkEnMux = 2'b01;
  4629. alta_clkenctrl clken_ctrl_X58_Y12_N0(
  4630. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4631. .ClkEn(),
  4632. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ));
  4633. defparam clken_ctrl_X58_Y12_N0.coord_x = 15;
  4634. defparam clken_ctrl_X58_Y12_N0.coord_y = 12;
  4635. defparam clken_ctrl_X58_Y12_N0.coord_z = 0;
  4636. defparam clken_ctrl_X58_Y12_N0.ClkMux = 2'b10;
  4637. defparam clken_ctrl_X58_Y12_N0.ClkEnMux = 2'b01;
  4638. alta_clkenctrl clken_ctrl_X58_Y12_N1(
  4639. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4640. .ClkEn(\macro_inst|always0~0_combout ),
  4641. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ));
  4642. defparam clken_ctrl_X58_Y12_N1.coord_x = 15;
  4643. defparam clken_ctrl_X58_Y12_N1.coord_y = 12;
  4644. defparam clken_ctrl_X58_Y12_N1.coord_z = 1;
  4645. defparam clken_ctrl_X58_Y12_N1.ClkMux = 2'b10;
  4646. defparam clken_ctrl_X58_Y12_N1.ClkEnMux = 2'b10;
  4647. alta_clkenctrl clken_ctrl_X58_Y4_N0(
  4648. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4649. .ClkEn(\macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout ),
  4650. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ));
  4651. defparam clken_ctrl_X58_Y4_N0.coord_x = 19;
  4652. defparam clken_ctrl_X58_Y4_N0.coord_y = 4;
  4653. defparam clken_ctrl_X58_Y4_N0.coord_z = 0;
  4654. defparam clken_ctrl_X58_Y4_N0.ClkMux = 2'b10;
  4655. defparam clken_ctrl_X58_Y4_N0.ClkEnMux = 2'b10;
  4656. alta_clkenctrl clken_ctrl_X58_Y4_N1(
  4657. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4658. .ClkEn(\macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout ),
  4659. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ));
  4660. defparam clken_ctrl_X58_Y4_N1.coord_x = 19;
  4661. defparam clken_ctrl_X58_Y4_N1.coord_y = 4;
  4662. defparam clken_ctrl_X58_Y4_N1.coord_z = 1;
  4663. defparam clken_ctrl_X58_Y4_N1.ClkMux = 2'b10;
  4664. defparam clken_ctrl_X58_Y4_N1.ClkEnMux = 2'b10;
  4665. alta_clkenctrl clken_ctrl_X58_Y6_N1(
  4666. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4667. .ClkEn(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout ),
  4668. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ));
  4669. defparam clken_ctrl_X58_Y6_N1.coord_x = 20;
  4670. defparam clken_ctrl_X58_Y6_N1.coord_y = 8;
  4671. defparam clken_ctrl_X58_Y6_N1.coord_z = 1;
  4672. defparam clken_ctrl_X58_Y6_N1.ClkMux = 2'b10;
  4673. defparam clken_ctrl_X58_Y6_N1.ClkEnMux = 2'b10;
  4674. alta_clkenctrl clken_ctrl_X58_Y7_N1(
  4675. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4676. .ClkEn(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout ),
  4677. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ));
  4678. defparam clken_ctrl_X58_Y7_N1.coord_x = 20;
  4679. defparam clken_ctrl_X58_Y7_N1.coord_y = 10;
  4680. defparam clken_ctrl_X58_Y7_N1.coord_z = 1;
  4681. defparam clken_ctrl_X58_Y7_N1.ClkMux = 2'b10;
  4682. defparam clken_ctrl_X58_Y7_N1.ClkEnMux = 2'b10;
  4683. alta_clkenctrl clken_ctrl_X58_Y8_N0(
  4684. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4685. .ClkEn(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  4686. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X58_Y8_SIG_SIG ));
  4687. defparam clken_ctrl_X58_Y8_N0.coord_x = 16;
  4688. defparam clken_ctrl_X58_Y8_N0.coord_y = 6;
  4689. defparam clken_ctrl_X58_Y8_N0.coord_z = 0;
  4690. defparam clken_ctrl_X58_Y8_N0.ClkMux = 2'b10;
  4691. defparam clken_ctrl_X58_Y8_N0.ClkEnMux = 2'b10;
  4692. alta_clkenctrl clken_ctrl_X58_Y8_N1(
  4693. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4694. .ClkEn(\macro_inst|cfg_reg_inst|wave_type[1]~0_combout ),
  4695. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|wave_type[1]~0_combout_X58_Y8_SIG_SIG ));
  4696. defparam clken_ctrl_X58_Y8_N1.coord_x = 16;
  4697. defparam clken_ctrl_X58_Y8_N1.coord_y = 6;
  4698. defparam clken_ctrl_X58_Y8_N1.coord_z = 1;
  4699. defparam clken_ctrl_X58_Y8_N1.ClkMux = 2'b10;
  4700. defparam clken_ctrl_X58_Y8_N1.ClkEnMux = 2'b10;
  4701. alta_clkenctrl clken_ctrl_X58_Y9_N0(
  4702. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4703. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4704. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ));
  4705. defparam clken_ctrl_X58_Y9_N0.coord_x = 16;
  4706. defparam clken_ctrl_X58_Y9_N0.coord_y = 10;
  4707. defparam clken_ctrl_X58_Y9_N0.coord_z = 0;
  4708. defparam clken_ctrl_X58_Y9_N0.ClkMux = 2'b10;
  4709. defparam clken_ctrl_X58_Y9_N0.ClkEnMux = 2'b10;
  4710. alta_clkenctrl clken_ctrl_X58_Y9_N1(
  4711. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4712. .ClkEn(\macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ),
  4713. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ));
  4714. defparam clken_ctrl_X58_Y9_N1.coord_x = 16;
  4715. defparam clken_ctrl_X58_Y9_N1.coord_y = 10;
  4716. defparam clken_ctrl_X58_Y9_N1.coord_z = 1;
  4717. defparam clken_ctrl_X58_Y9_N1.ClkMux = 2'b10;
  4718. defparam clken_ctrl_X58_Y9_N1.ClkEnMux = 2'b10;
  4719. alta_clkenctrl clken_ctrl_X59_Y10_N0(
  4720. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4721. .ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
  4722. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ));
  4723. defparam clken_ctrl_X59_Y10_N0.coord_x = 14;
  4724. defparam clken_ctrl_X59_Y10_N0.coord_y = 12;
  4725. defparam clken_ctrl_X59_Y10_N0.coord_z = 0;
  4726. defparam clken_ctrl_X59_Y10_N0.ClkMux = 2'b10;
  4727. defparam clken_ctrl_X59_Y10_N0.ClkEnMux = 2'b10;
  4728. alta_clkenctrl clken_ctrl_X59_Y10_N1(
  4729. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4730. .ClkEn(\macro_inst|ahb2apb_inst|paddr[7]~0_combout ),
  4731. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ));
  4732. defparam clken_ctrl_X59_Y10_N1.coord_x = 14;
  4733. defparam clken_ctrl_X59_Y10_N1.coord_y = 12;
  4734. defparam clken_ctrl_X59_Y10_N1.coord_z = 1;
  4735. defparam clken_ctrl_X59_Y10_N1.ClkMux = 2'b10;
  4736. defparam clken_ctrl_X59_Y10_N1.ClkEnMux = 2'b10;
  4737. alta_clkenctrl clken_ctrl_X59_Y11_N0(
  4738. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4739. .ClkEn(\macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout ),
  4740. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ));
  4741. defparam clken_ctrl_X59_Y11_N0.coord_x = 18;
  4742. defparam clken_ctrl_X59_Y11_N0.coord_y = 10;
  4743. defparam clken_ctrl_X59_Y11_N0.coord_z = 0;
  4744. defparam clken_ctrl_X59_Y11_N0.ClkMux = 2'b10;
  4745. defparam clken_ctrl_X59_Y11_N0.ClkEnMux = 2'b10;
  4746. alta_clkenctrl clken_ctrl_X59_Y11_N1(
  4747. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4748. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4749. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ));
  4750. defparam clken_ctrl_X59_Y11_N1.coord_x = 18;
  4751. defparam clken_ctrl_X59_Y11_N1.coord_y = 10;
  4752. defparam clken_ctrl_X59_Y11_N1.coord_z = 1;
  4753. defparam clken_ctrl_X59_Y11_N1.ClkMux = 2'b10;
  4754. defparam clken_ctrl_X59_Y11_N1.ClkEnMux = 2'b10;
  4755. alta_clkenctrl clken_ctrl_X59_Y12_N0(
  4756. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4757. .ClkEn(\macro_inst|ahb2apb_inst|paddr[7]~0_combout ),
  4758. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ));
  4759. defparam clken_ctrl_X59_Y12_N0.coord_x = 16;
  4760. defparam clken_ctrl_X59_Y12_N0.coord_y = 12;
  4761. defparam clken_ctrl_X59_Y12_N0.coord_z = 0;
  4762. defparam clken_ctrl_X59_Y12_N0.ClkMux = 2'b10;
  4763. defparam clken_ctrl_X59_Y12_N0.ClkEnMux = 2'b10;
  4764. alta_clkenctrl clken_ctrl_X59_Y12_N1(
  4765. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4766. .ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
  4767. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ));
  4768. defparam clken_ctrl_X59_Y12_N1.coord_x = 16;
  4769. defparam clken_ctrl_X59_Y12_N1.coord_y = 12;
  4770. defparam clken_ctrl_X59_Y12_N1.coord_z = 1;
  4771. defparam clken_ctrl_X59_Y12_N1.ClkMux = 2'b10;
  4772. defparam clken_ctrl_X59_Y12_N1.ClkEnMux = 2'b10;
  4773. alta_clkenctrl clken_ctrl_X59_Y3_N1(
  4774. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4775. .ClkEn(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout ),
  4776. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ));
  4777. defparam clken_ctrl_X59_Y3_N1.coord_x = 15;
  4778. defparam clken_ctrl_X59_Y3_N1.coord_y = 7;
  4779. defparam clken_ctrl_X59_Y3_N1.coord_z = 1;
  4780. defparam clken_ctrl_X59_Y3_N1.ClkMux = 2'b10;
  4781. defparam clken_ctrl_X59_Y3_N1.ClkEnMux = 2'b10;
  4782. alta_clkenctrl clken_ctrl_X59_Y4_N0(
  4783. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4784. .ClkEn(\macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout ),
  4785. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X59_Y4_SIG_SIG ));
  4786. defparam clken_ctrl_X59_Y4_N0.coord_x = 20;
  4787. defparam clken_ctrl_X59_Y4_N0.coord_y = 4;
  4788. defparam clken_ctrl_X59_Y4_N0.coord_z = 0;
  4789. defparam clken_ctrl_X59_Y4_N0.ClkMux = 2'b10;
  4790. defparam clken_ctrl_X59_Y4_N0.ClkEnMux = 2'b10;
  4791. alta_clkenctrl clken_ctrl_X59_Y5_N1(
  4792. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4793. .ClkEn(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout ),
  4794. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ));
  4795. defparam clken_ctrl_X59_Y5_N1.coord_x = 19;
  4796. defparam clken_ctrl_X59_Y5_N1.coord_y = 6;
  4797. defparam clken_ctrl_X59_Y5_N1.coord_z = 1;
  4798. defparam clken_ctrl_X59_Y5_N1.ClkMux = 2'b10;
  4799. defparam clken_ctrl_X59_Y5_N1.ClkEnMux = 2'b10;
  4800. alta_clkenctrl clken_ctrl_X59_Y6_N0(
  4801. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4802. .ClkEn(\macro_inst|cfg_reg_inst|trig_mode[1]~0_combout ),
  4803. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ));
  4804. defparam clken_ctrl_X59_Y6_N0.coord_x = 18;
  4805. defparam clken_ctrl_X59_Y6_N0.coord_y = 8;
  4806. defparam clken_ctrl_X59_Y6_N0.coord_z = 0;
  4807. defparam clken_ctrl_X59_Y6_N0.ClkMux = 2'b10;
  4808. defparam clken_ctrl_X59_Y6_N0.ClkEnMux = 2'b10;
  4809. alta_clkenctrl clken_ctrl_X59_Y6_N1(
  4810. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4811. .ClkEn(\macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ),
  4812. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X59_Y6_SIG_SIG ));
  4813. defparam clken_ctrl_X59_Y6_N1.coord_x = 18;
  4814. defparam clken_ctrl_X59_Y6_N1.coord_y = 8;
  4815. defparam clken_ctrl_X59_Y6_N1.coord_z = 1;
  4816. defparam clken_ctrl_X59_Y6_N1.ClkMux = 2'b10;
  4817. defparam clken_ctrl_X59_Y6_N1.ClkEnMux = 2'b10;
  4818. alta_clkenctrl clken_ctrl_X59_Y7_N0(
  4819. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4820. .ClkEn(),
  4821. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ));
  4822. defparam clken_ctrl_X59_Y7_N0.coord_x = 20;
  4823. defparam clken_ctrl_X59_Y7_N0.coord_y = 6;
  4824. defparam clken_ctrl_X59_Y7_N0.coord_z = 0;
  4825. defparam clken_ctrl_X59_Y7_N0.ClkMux = 2'b10;
  4826. defparam clken_ctrl_X59_Y7_N0.ClkEnMux = 2'b01;
  4827. alta_clkenctrl clken_ctrl_X59_Y8_N0(
  4828. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4829. .ClkEn(\macro_inst|trig_ctrl_inst|always11~2_combout ),
  4830. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ));
  4831. defparam clken_ctrl_X59_Y8_N0.coord_x = 17;
  4832. defparam clken_ctrl_X59_Y8_N0.coord_y = 11;
  4833. defparam clken_ctrl_X59_Y8_N0.coord_z = 0;
  4834. defparam clken_ctrl_X59_Y8_N0.ClkMux = 2'b10;
  4835. defparam clken_ctrl_X59_Y8_N0.ClkEnMux = 2'b10;
  4836. alta_clkenctrl clken_ctrl_X59_Y8_N1(
  4837. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4838. .ClkEn(\macro_inst|ahb2apb_inst|comb~0_combout ),
  4839. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ));
  4840. defparam clken_ctrl_X59_Y8_N1.coord_x = 17;
  4841. defparam clken_ctrl_X59_Y8_N1.coord_y = 11;
  4842. defparam clken_ctrl_X59_Y8_N1.coord_z = 1;
  4843. defparam clken_ctrl_X59_Y8_N1.ClkMux = 2'b10;
  4844. defparam clken_ctrl_X59_Y8_N1.ClkEnMux = 2'b10;
  4845. alta_clkenctrl clken_ctrl_X59_Y9_N0(
  4846. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4847. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4848. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ));
  4849. defparam clken_ctrl_X59_Y9_N0.coord_x = 17;
  4850. defparam clken_ctrl_X59_Y9_N0.coord_y = 10;
  4851. defparam clken_ctrl_X59_Y9_N0.coord_z = 0;
  4852. defparam clken_ctrl_X59_Y9_N0.ClkMux = 2'b10;
  4853. defparam clken_ctrl_X59_Y9_N0.ClkEnMux = 2'b10;
  4854. alta_clkenctrl clken_ctrl_X59_Y9_N1(
  4855. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4856. .ClkEn(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  4857. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y9_SIG_SIG ));
  4858. defparam clken_ctrl_X59_Y9_N1.coord_x = 17;
  4859. defparam clken_ctrl_X59_Y9_N1.coord_y = 10;
  4860. defparam clken_ctrl_X59_Y9_N1.coord_z = 1;
  4861. defparam clken_ctrl_X59_Y9_N1.ClkMux = 2'b10;
  4862. defparam clken_ctrl_X59_Y9_N1.ClkEnMux = 2'b10;
  4863. alta_clkenctrl clken_ctrl_X60_Y10_N0(
  4864. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4865. .ClkEn(\macro_inst|ahb2apb_inst|paddr[7]~0_combout ),
  4866. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ));
  4867. defparam clken_ctrl_X60_Y10_N0.coord_x = 17;
  4868. defparam clken_ctrl_X60_Y10_N0.coord_y = 12;
  4869. defparam clken_ctrl_X60_Y10_N0.coord_z = 0;
  4870. defparam clken_ctrl_X60_Y10_N0.ClkMux = 2'b10;
  4871. defparam clken_ctrl_X60_Y10_N0.ClkEnMux = 2'b10;
  4872. alta_clkenctrl clken_ctrl_X60_Y10_N1(
  4873. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4874. .ClkEn(\macro_inst|ahb2apb_inst|always0~0_combout ),
  4875. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ));
  4876. defparam clken_ctrl_X60_Y10_N1.coord_x = 17;
  4877. defparam clken_ctrl_X60_Y10_N1.coord_y = 12;
  4878. defparam clken_ctrl_X60_Y10_N1.coord_z = 1;
  4879. defparam clken_ctrl_X60_Y10_N1.ClkMux = 2'b10;
  4880. defparam clken_ctrl_X60_Y10_N1.ClkEnMux = 2'b10;
  4881. alta_clkenctrl clken_ctrl_X60_Y11_N0(
  4882. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4883. .ClkEn(\macro_inst|cfg_reg_inst|adc_en~0_combout ),
  4884. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y11_SIG_SIG ));
  4885. defparam clken_ctrl_X60_Y11_N0.coord_x = 17;
  4886. defparam clken_ctrl_X60_Y11_N0.coord_y = 9;
  4887. defparam clken_ctrl_X60_Y11_N0.coord_z = 0;
  4888. defparam clken_ctrl_X60_Y11_N0.ClkMux = 2'b10;
  4889. defparam clken_ctrl_X60_Y11_N0.ClkEnMux = 2'b10;
  4890. alta_clkenctrl clken_ctrl_X60_Y11_N1(
  4891. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4892. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  4893. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X60_Y11_SIG_SIG ));
  4894. defparam clken_ctrl_X60_Y11_N1.coord_x = 17;
  4895. defparam clken_ctrl_X60_Y11_N1.coord_y = 9;
  4896. defparam clken_ctrl_X60_Y11_N1.coord_z = 1;
  4897. defparam clken_ctrl_X60_Y11_N1.ClkMux = 2'b10;
  4898. defparam clken_ctrl_X60_Y11_N1.ClkEnMux = 2'b10;
  4899. alta_clkenctrl clken_ctrl_X60_Y12_N0(
  4900. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4901. .ClkEn(\macro_inst|ahb2apb_inst|paddr[7]~0_combout ),
  4902. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y12_SIG_SIG ));
  4903. defparam clken_ctrl_X60_Y12_N0.coord_x = 18;
  4904. defparam clken_ctrl_X60_Y12_N0.coord_y = 12;
  4905. defparam clken_ctrl_X60_Y12_N0.coord_z = 0;
  4906. defparam clken_ctrl_X60_Y12_N0.ClkMux = 2'b10;
  4907. defparam clken_ctrl_X60_Y12_N0.ClkEnMux = 2'b10;
  4908. alta_clkenctrl clken_ctrl_X60_Y3_N0(
  4909. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4910. .ClkEn(),
  4911. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ));
  4912. defparam clken_ctrl_X60_Y3_N0.coord_x = 18;
  4913. defparam clken_ctrl_X60_Y3_N0.coord_y = 6;
  4914. defparam clken_ctrl_X60_Y3_N0.coord_z = 0;
  4915. defparam clken_ctrl_X60_Y3_N0.ClkMux = 2'b10;
  4916. defparam clken_ctrl_X60_Y3_N0.ClkEnMux = 2'b01;
  4917. alta_clkenctrl clken_ctrl_X60_Y3_N1(
  4918. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4919. .ClkEn(\macro_inst|cfg_reg_inst|adc_en~0_combout ),
  4920. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y3_SIG_SIG ));
  4921. defparam clken_ctrl_X60_Y3_N1.coord_x = 18;
  4922. defparam clken_ctrl_X60_Y3_N1.coord_y = 6;
  4923. defparam clken_ctrl_X60_Y3_N1.coord_z = 1;
  4924. defparam clken_ctrl_X60_Y3_N1.ClkMux = 2'b10;
  4925. defparam clken_ctrl_X60_Y3_N1.ClkEnMux = 2'b10;
  4926. alta_clkenctrl clken_ctrl_X60_Y4_N0(
  4927. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4928. .ClkEn(\macro_inst|cfg_reg_inst|trig_mode[1]~0_combout ),
  4929. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y4_SIG_SIG ));
  4930. defparam clken_ctrl_X60_Y4_N0.coord_x = 18;
  4931. defparam clken_ctrl_X60_Y4_N0.coord_y = 4;
  4932. defparam clken_ctrl_X60_Y4_N0.coord_z = 0;
  4933. defparam clken_ctrl_X60_Y4_N0.ClkMux = 2'b10;
  4934. defparam clken_ctrl_X60_Y4_N0.ClkEnMux = 2'b10;
  4935. alta_clkenctrl clken_ctrl_X60_Y5_N0(
  4936. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4937. .ClkEn(\macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout ),
  4938. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ));
  4939. defparam clken_ctrl_X60_Y5_N0.coord_x = 20;
  4940. defparam clken_ctrl_X60_Y5_N0.coord_y = 7;
  4941. defparam clken_ctrl_X60_Y5_N0.coord_z = 0;
  4942. defparam clken_ctrl_X60_Y5_N0.ClkMux = 2'b10;
  4943. defparam clken_ctrl_X60_Y5_N0.ClkEnMux = 2'b10;
  4944. alta_clkenctrl clken_ctrl_X60_Y5_N1(
  4945. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4946. .ClkEn(),
  4947. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y5_SIG_VCC ));
  4948. defparam clken_ctrl_X60_Y5_N1.coord_x = 20;
  4949. defparam clken_ctrl_X60_Y5_N1.coord_y = 7;
  4950. defparam clken_ctrl_X60_Y5_N1.coord_z = 1;
  4951. defparam clken_ctrl_X60_Y5_N1.ClkMux = 2'b10;
  4952. defparam clken_ctrl_X60_Y5_N1.ClkEnMux = 2'b01;
  4953. alta_clkenctrl clken_ctrl_X60_Y6_N0(
  4954. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4955. .ClkEn(\macro_inst|cfg_reg_inst|trig_mode[1]~0_combout ),
  4956. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y6_SIG_SIG ));
  4957. defparam clken_ctrl_X60_Y6_N0.coord_x = 19;
  4958. defparam clken_ctrl_X60_Y6_N0.coord_y = 8;
  4959. defparam clken_ctrl_X60_Y6_N0.coord_z = 0;
  4960. defparam clken_ctrl_X60_Y6_N0.ClkMux = 2'b10;
  4961. defparam clken_ctrl_X60_Y6_N0.ClkEnMux = 2'b10;
  4962. alta_clkenctrl clken_ctrl_X60_Y6_N1(
  4963. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4964. .ClkEn(\macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ),
  4965. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y6_SIG_SIG ));
  4966. defparam clken_ctrl_X60_Y6_N1.coord_x = 19;
  4967. defparam clken_ctrl_X60_Y6_N1.coord_y = 8;
  4968. defparam clken_ctrl_X60_Y6_N1.coord_z = 1;
  4969. defparam clken_ctrl_X60_Y6_N1.ClkMux = 2'b10;
  4970. defparam clken_ctrl_X60_Y6_N1.ClkEnMux = 2'b10;
  4971. alta_clkenctrl clken_ctrl_X60_Y7_N0(
  4972. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4973. .ClkEn(\macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout ),
  4974. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ));
  4975. defparam clken_ctrl_X60_Y7_N0.coord_x = 19;
  4976. defparam clken_ctrl_X60_Y7_N0.coord_y = 9;
  4977. defparam clken_ctrl_X60_Y7_N0.coord_z = 0;
  4978. defparam clken_ctrl_X60_Y7_N0.ClkMux = 2'b10;
  4979. defparam clken_ctrl_X60_Y7_N0.ClkEnMux = 2'b10;
  4980. alta_clkenctrl clken_ctrl_X60_Y7_N1(
  4981. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4982. .ClkEn(\macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ),
  4983. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ));
  4984. defparam clken_ctrl_X60_Y7_N1.coord_x = 19;
  4985. defparam clken_ctrl_X60_Y7_N1.coord_y = 9;
  4986. defparam clken_ctrl_X60_Y7_N1.coord_z = 1;
  4987. defparam clken_ctrl_X60_Y7_N1.ClkMux = 2'b10;
  4988. defparam clken_ctrl_X60_Y7_N1.ClkEnMux = 2'b10;
  4989. alta_clkenctrl clken_ctrl_X60_Y8_N0(
  4990. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  4991. .ClkEn(\macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout ),
  4992. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ));
  4993. defparam clken_ctrl_X60_Y8_N0.coord_x = 19;
  4994. defparam clken_ctrl_X60_Y8_N0.coord_y = 10;
  4995. defparam clken_ctrl_X60_Y8_N0.coord_z = 0;
  4996. defparam clken_ctrl_X60_Y8_N0.ClkMux = 2'b10;
  4997. defparam clken_ctrl_X60_Y8_N0.ClkEnMux = 2'b10;
  4998. alta_clkenctrl clken_ctrl_X60_Y8_N1(
  4999. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5000. .ClkEn(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  5001. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ));
  5002. defparam clken_ctrl_X60_Y8_N1.coord_x = 19;
  5003. defparam clken_ctrl_X60_Y8_N1.coord_y = 10;
  5004. defparam clken_ctrl_X60_Y8_N1.coord_z = 1;
  5005. defparam clken_ctrl_X60_Y8_N1.ClkMux = 2'b10;
  5006. defparam clken_ctrl_X60_Y8_N1.ClkEnMux = 2'b10;
  5007. alta_clkenctrl clken_ctrl_X60_Y9_N0(
  5008. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5009. .ClkEn(\macro_inst|cfg_reg_inst|adc_en~0_combout ),
  5010. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y9_SIG_SIG ));
  5011. defparam clken_ctrl_X60_Y9_N0.coord_x = 18;
  5012. defparam clken_ctrl_X60_Y9_N0.coord_y = 9;
  5013. defparam clken_ctrl_X60_Y9_N0.coord_z = 0;
  5014. defparam clken_ctrl_X60_Y9_N0.ClkMux = 2'b10;
  5015. defparam clken_ctrl_X60_Y9_N0.ClkEnMux = 2'b10;
  5016. alta_clkenctrl clken_ctrl_X60_Y9_N1(
  5017. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5018. .ClkEn(\macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout ),
  5019. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ));
  5020. defparam clken_ctrl_X60_Y9_N1.coord_x = 18;
  5021. defparam clken_ctrl_X60_Y9_N1.coord_y = 9;
  5022. defparam clken_ctrl_X60_Y9_N1.coord_z = 1;
  5023. defparam clken_ctrl_X60_Y9_N1.ClkMux = 2'b10;
  5024. defparam clken_ctrl_X60_Y9_N1.ClkEnMux = 2'b10;
  5025. alta_clkenctrl clken_ctrl_X61_Y10_N0(
  5026. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5027. .ClkEn(),
  5028. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y10_SIG_VCC ));
  5029. defparam clken_ctrl_X61_Y10_N0.coord_x = 19;
  5030. defparam clken_ctrl_X61_Y10_N0.coord_y = 11;
  5031. defparam clken_ctrl_X61_Y10_N0.coord_z = 0;
  5032. defparam clken_ctrl_X61_Y10_N0.ClkMux = 2'b10;
  5033. defparam clken_ctrl_X61_Y10_N0.ClkEnMux = 2'b01;
  5034. alta_clkenctrl clken_ctrl_X61_Y10_N1(
  5035. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5036. .ClkEn(\macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout ),
  5037. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X61_Y10_SIG_SIG ));
  5038. defparam clken_ctrl_X61_Y10_N1.coord_x = 19;
  5039. defparam clken_ctrl_X61_Y10_N1.coord_y = 11;
  5040. defparam clken_ctrl_X61_Y10_N1.coord_z = 1;
  5041. defparam clken_ctrl_X61_Y10_N1.ClkMux = 2'b10;
  5042. defparam clken_ctrl_X61_Y10_N1.ClkEnMux = 2'b10;
  5043. alta_clkenctrl clken_ctrl_X61_Y5_N0(
  5044. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5045. .ClkEn(\macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout ),
  5046. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X61_Y5_SIG_SIG ));
  5047. defparam clken_ctrl_X61_Y5_N0.coord_x = 19;
  5048. defparam clken_ctrl_X61_Y5_N0.coord_y = 7;
  5049. defparam clken_ctrl_X61_Y5_N0.coord_z = 0;
  5050. defparam clken_ctrl_X61_Y5_N0.ClkMux = 2'b10;
  5051. defparam clken_ctrl_X61_Y5_N0.ClkEnMux = 2'b10;
  5052. alta_clkenctrl clken_ctrl_X61_Y6_N0(
  5053. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5054. .ClkEn(),
  5055. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ));
  5056. defparam clken_ctrl_X61_Y6_N0.coord_x = 17;
  5057. defparam clken_ctrl_X61_Y6_N0.coord_y = 6;
  5058. defparam clken_ctrl_X61_Y6_N0.coord_z = 0;
  5059. defparam clken_ctrl_X61_Y6_N0.ClkMux = 2'b10;
  5060. defparam clken_ctrl_X61_Y6_N0.ClkEnMux = 2'b01;
  5061. alta_clkenctrl clken_ctrl_X61_Y6_N1(
  5062. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5063. .ClkEn(\macro_inst|cfg_reg_inst|adc_run~0_combout ),
  5064. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y6_SIG_SIG ));
  5065. defparam clken_ctrl_X61_Y6_N1.coord_x = 17;
  5066. defparam clken_ctrl_X61_Y6_N1.coord_y = 6;
  5067. defparam clken_ctrl_X61_Y6_N1.coord_z = 1;
  5068. defparam clken_ctrl_X61_Y6_N1.ClkMux = 2'b10;
  5069. defparam clken_ctrl_X61_Y6_N1.ClkEnMux = 2'b10;
  5070. alta_clkenctrl clken_ctrl_X61_Y8_N0(
  5071. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5072. .ClkEn(\macro_inst|cfg_reg_inst|always1~2_combout ),
  5073. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X61_Y8_SIG_SIG ));
  5074. defparam clken_ctrl_X61_Y8_N0.coord_x = 18;
  5075. defparam clken_ctrl_X61_Y8_N0.coord_y = 11;
  5076. defparam clken_ctrl_X61_Y8_N0.coord_z = 0;
  5077. defparam clken_ctrl_X61_Y8_N0.ClkMux = 2'b10;
  5078. defparam clken_ctrl_X61_Y8_N0.ClkEnMux = 2'b10;
  5079. alta_clkenctrl clken_ctrl_X61_Y8_N1(
  5080. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5081. .ClkEn(\macro_inst|trig_ctrl_inst|always11~2_combout ),
  5082. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ));
  5083. defparam clken_ctrl_X61_Y8_N1.coord_x = 18;
  5084. defparam clken_ctrl_X61_Y8_N1.coord_y = 11;
  5085. defparam clken_ctrl_X61_Y8_N1.coord_z = 1;
  5086. defparam clken_ctrl_X61_Y8_N1.ClkMux = 2'b10;
  5087. defparam clken_ctrl_X61_Y8_N1.ClkEnMux = 2'b10;
  5088. alta_clkenctrl clken_ctrl_X61_Y9_N0(
  5089. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5090. .ClkEn(\macro_inst|cfg_reg_inst|dac_en~2_combout ),
  5091. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|dac_en~2_combout_X61_Y9_SIG_SIG ));
  5092. defparam clken_ctrl_X61_Y9_N0.coord_x = 19;
  5093. defparam clken_ctrl_X61_Y9_N0.coord_y = 12;
  5094. defparam clken_ctrl_X61_Y9_N0.coord_z = 0;
  5095. defparam clken_ctrl_X61_Y9_N0.ClkMux = 2'b10;
  5096. defparam clken_ctrl_X61_Y9_N0.ClkEnMux = 2'b10;
  5097. alta_clkenctrl clken_ctrl_X61_Y9_N1(
  5098. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5099. .ClkEn(\macro_inst|cfg_reg_inst|adc_run~0_combout ),
  5100. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y9_SIG_SIG ));
  5101. defparam clken_ctrl_X61_Y9_N1.coord_x = 19;
  5102. defparam clken_ctrl_X61_Y9_N1.coord_y = 12;
  5103. defparam clken_ctrl_X61_Y9_N1.coord_z = 1;
  5104. defparam clken_ctrl_X61_Y9_N1.ClkMux = 2'b10;
  5105. defparam clken_ctrl_X61_Y9_N1.ClkEnMux = 2'b10;
  5106. alta_clkenctrl clken_ctrl_X62_Y10_N0(
  5107. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5108. .ClkEn(),
  5109. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ));
  5110. defparam clken_ctrl_X62_Y10_N0.coord_x = 20;
  5111. defparam clken_ctrl_X62_Y10_N0.coord_y = 11;
  5112. defparam clken_ctrl_X62_Y10_N0.coord_z = 0;
  5113. defparam clken_ctrl_X62_Y10_N0.ClkMux = 2'b10;
  5114. defparam clken_ctrl_X62_Y10_N0.ClkEnMux = 2'b01;
  5115. alta_clkenctrl clken_ctrl_X62_Y3_N0(
  5116. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5117. .ClkEn(),
  5118. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ));
  5119. defparam clken_ctrl_X62_Y3_N0.coord_x = 17;
  5120. defparam clken_ctrl_X62_Y3_N0.coord_y = 7;
  5121. defparam clken_ctrl_X62_Y3_N0.coord_z = 0;
  5122. defparam clken_ctrl_X62_Y3_N0.ClkMux = 2'b10;
  5123. defparam clken_ctrl_X62_Y3_N0.ClkEnMux = 2'b01;
  5124. alta_clkenctrl clken_ctrl_X62_Y4_N0(
  5125. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5126. .ClkEn(),
  5127. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ));
  5128. defparam clken_ctrl_X62_Y4_N0.coord_x = 17;
  5129. defparam clken_ctrl_X62_Y4_N0.coord_y = 8;
  5130. defparam clken_ctrl_X62_Y4_N0.coord_z = 0;
  5131. defparam clken_ctrl_X62_Y4_N0.ClkMux = 2'b10;
  5132. defparam clken_ctrl_X62_Y4_N0.ClkEnMux = 2'b01;
  5133. alta_clkenctrl clken_ctrl_X62_Y5_N1(
  5134. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5135. .ClkEn(\macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout ),
  5136. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ));
  5137. defparam clken_ctrl_X62_Y5_N1.coord_x = 18;
  5138. defparam clken_ctrl_X62_Y5_N1.coord_y = 7;
  5139. defparam clken_ctrl_X62_Y5_N1.coord_z = 1;
  5140. defparam clken_ctrl_X62_Y5_N1.ClkMux = 2'b10;
  5141. defparam clken_ctrl_X62_Y5_N1.ClkEnMux = 2'b10;
  5142. alta_clkenctrl clken_ctrl_X62_Y6_N1(
  5143. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5144. .ClkEn(\macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout ),
  5145. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ));
  5146. defparam clken_ctrl_X62_Y6_N1.coord_x = 17;
  5147. defparam clken_ctrl_X62_Y6_N1.coord_y = 4;
  5148. defparam clken_ctrl_X62_Y6_N1.coord_z = 1;
  5149. defparam clken_ctrl_X62_Y6_N1.ClkMux = 2'b10;
  5150. defparam clken_ctrl_X62_Y6_N1.ClkEnMux = 2'b10;
  5151. alta_clkenctrl clken_ctrl_X62_Y9_N0(
  5152. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  5153. .ClkEn(),
  5154. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y9_SIG_VCC ));
  5155. defparam clken_ctrl_X62_Y9_N0.coord_x = 17;
  5156. defparam clken_ctrl_X62_Y9_N0.coord_y = 5;
  5157. defparam clken_ctrl_X62_Y9_N0.coord_z = 0;
  5158. defparam clken_ctrl_X62_Y9_N0.ClkMux = 2'b10;
  5159. defparam clken_ctrl_X62_Y9_N0.ClkEnMux = 2'b01;
  5160. alta_io_gclk \gclksw_inst|gclk_switch (
  5161. .inclk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
  5162. .outclk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ));
  5163. defparam \gclksw_inst|gclk_switch .coord_x = 22;
  5164. defparam \gclksw_inst|gclk_switch .coord_y = 4;
  5165. defparam \gclksw_inst|gclk_switch .coord_z = 5;
  5166. alta_gclksw \gclksw_inst|gclk_switch__alta_gclksw (
  5167. .resetn(\rv32.resetn_out ),
  5168. .clkin0(\PIN_HSI~input_o ),
  5169. .clkin1(\PIN_HSE~input_o ),
  5170. .clkin2(\pll_inst|auto_generated|pll1_CLK_bus [0]),
  5171. .clkin3(1'bx),
  5172. .select({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
  5173. .clkout(\gclksw_inst|gclk_switch__alta_gclksw__clkout ));
  5174. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_x = 22;
  5175. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_y = 4;
  5176. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_z = 0;
  5177. alta_slice \macro_inst|ShiftLeft0~0 (
  5178. .A(\macro_inst|ahb2apb_inst|paddr [13]),
  5179. .B(\macro_inst|ahb2apb_inst|paddr [14]),
  5180. .C(\macro_inst|ahb2apb_inst|paddr [12]),
  5181. .D(\macro_inst|ahb2apb_inst|paddr [15]),
  5182. .Cin(),
  5183. .Qin(),
  5184. .Clk(),
  5185. .AsyncReset(),
  5186. .SyncReset(),
  5187. .ShiftData(),
  5188. .SyncLoad(),
  5189. .LutOut(\macro_inst|ShiftLeft0~0_combout ),
  5190. .Cout(),
  5191. .Q());
  5192. defparam \macro_inst|ShiftLeft0~0 .coord_x = 16;
  5193. defparam \macro_inst|ShiftLeft0~0 .coord_y = 12;
  5194. defparam \macro_inst|ShiftLeft0~0 .coord_z = 9;
  5195. defparam \macro_inst|ShiftLeft0~0 .mask = 16'h0010;
  5196. defparam \macro_inst|ShiftLeft0~0 .modeMux = 1'b0;
  5197. defparam \macro_inst|ShiftLeft0~0 .FeedbackMux = 1'b0;
  5198. defparam \macro_inst|ShiftLeft0~0 .ShiftMux = 1'b0;
  5199. defparam \macro_inst|ShiftLeft0~0 .BypassEn = 1'b0;
  5200. defparam \macro_inst|ShiftLeft0~0 .CarryEnb = 1'b1;
  5201. alta_slice \macro_inst|ShiftLeft0~1 (
  5202. .A(\macro_inst|ahb2apb_inst|paddr [12]),
  5203. .B(\macro_inst|ahb2apb_inst|paddr [15]),
  5204. .C(\macro_inst|ahb2apb_inst|paddr [13]),
  5205. .D(\macro_inst|ahb2apb_inst|paddr [14]),
  5206. .Cin(),
  5207. .Qin(),
  5208. .Clk(),
  5209. .AsyncReset(),
  5210. .SyncReset(),
  5211. .ShiftData(),
  5212. .SyncLoad(),
  5213. .LutOut(\macro_inst|ShiftLeft0~1_combout ),
  5214. .Cout(),
  5215. .Q());
  5216. defparam \macro_inst|ShiftLeft0~1 .coord_x = 16;
  5217. defparam \macro_inst|ShiftLeft0~1 .coord_y = 12;
  5218. defparam \macro_inst|ShiftLeft0~1 .coord_z = 6;
  5219. defparam \macro_inst|ShiftLeft0~1 .mask = 16'h0010;
  5220. defparam \macro_inst|ShiftLeft0~1 .modeMux = 1'b0;
  5221. defparam \macro_inst|ShiftLeft0~1 .FeedbackMux = 1'b0;
  5222. defparam \macro_inst|ShiftLeft0~1 .ShiftMux = 1'b0;
  5223. defparam \macro_inst|ShiftLeft0~1 .BypassEn = 1'b0;
  5224. defparam \macro_inst|ShiftLeft0~1 .CarryEnb = 1'b1;
  5225. alta_slice \macro_inst|ahb2apb_inst|always0~0 (
  5226. .A(vcc),
  5227. .B(vcc),
  5228. .C(\rv32.mem_ahb_htrans[1] ),
  5229. .D(\macro_inst|ahb2apb_inst|hreadyout~q ),
  5230. .Cin(),
  5231. .Qin(),
  5232. .Clk(),
  5233. .AsyncReset(),
  5234. .SyncReset(),
  5235. .ShiftData(),
  5236. .SyncLoad(),
  5237. .LutOut(\macro_inst|ahb2apb_inst|always0~0_combout ),
  5238. .Cout(),
  5239. .Q());
  5240. defparam \macro_inst|ahb2apb_inst|always0~0 .coord_x = 16;
  5241. defparam \macro_inst|ahb2apb_inst|always0~0 .coord_y = 12;
  5242. defparam \macro_inst|ahb2apb_inst|always0~0 .coord_z = 13;
  5243. defparam \macro_inst|ahb2apb_inst|always0~0 .mask = 16'h00F0;
  5244. defparam \macro_inst|ahb2apb_inst|always0~0 .modeMux = 1'b0;
  5245. defparam \macro_inst|ahb2apb_inst|always0~0 .FeedbackMux = 1'b0;
  5246. defparam \macro_inst|ahb2apb_inst|always0~0 .ShiftMux = 1'b0;
  5247. defparam \macro_inst|ahb2apb_inst|always0~0 .BypassEn = 1'b0;
  5248. defparam \macro_inst|ahb2apb_inst|always0~0 .CarryEnb = 1'b1;
  5249. alta_slice \macro_inst|ahb2apb_inst|apbState.apbIdle (
  5250. .A(vcc),
  5251. .B(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
  5252. .C(vcc),
  5253. .D(\macro_inst|ahb2apb_inst|pvalid~q ),
  5254. .Cin(),
  5255. .Qin(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
  5256. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  5257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  5258. .SyncReset(),
  5259. .ShiftData(),
  5260. .SyncLoad(),
  5261. .LutOut(\macro_inst|ahb2apb_inst|Selector0~0_combout ),
  5262. .Cout(),
  5263. .Q(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ));
  5264. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_x = 15;
  5265. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_y = 12;
  5266. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .coord_z = 8;
  5267. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .mask = 16'hFFCC;
  5268. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .modeMux = 1'b0;
  5269. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .FeedbackMux = 1'b0;
  5270. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .ShiftMux = 1'b0;
  5271. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .BypassEn = 1'b0;
  5272. defparam \macro_inst|ahb2apb_inst|apbState.apbIdle .CarryEnb = 1'b1;
  5273. alta_slice \macro_inst|ahb2apb_inst|apbState.apbSetup (
  5274. .A(vcc),
  5275. .B(vcc),
  5276. .C(vcc),
  5277. .D(\macro_inst|ahb2apb_inst|pvalid~q ),
  5278. .Cin(),
  5279. .Qin(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
  5280. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  5281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  5282. .SyncReset(),
  5283. .ShiftData(),
  5284. .SyncLoad(),
  5285. .LutOut(\macro_inst|ahb2apb_inst|paddr[7]~0_combout ),
  5286. .Cout(),
  5287. .Q(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ));
  5288. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_x = 15;
  5289. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_y = 12;
  5290. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .coord_z = 13;
  5291. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .mask = 16'h0F00;
  5292. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .modeMux = 1'b0;
  5293. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .FeedbackMux = 1'b1;
  5294. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .ShiftMux = 1'b0;
  5295. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .BypassEn = 1'b0;
  5296. defparam \macro_inst|ahb2apb_inst|apbState.apbSetup .CarryEnb = 1'b1;
  5297. alta_slice \macro_inst|ahb2apb_inst|comb~0 (
  5298. .A(vcc),
  5299. .B(vcc),
  5300. .C(\macro_inst|ahb2apb_inst|psel~q ),
  5301. .D(\macro_inst|ahb2apb_inst|penable~q ),
  5302. .Cin(),
  5303. .Qin(),
  5304. .Clk(),
  5305. .AsyncReset(),
  5306. .SyncReset(),
  5307. .ShiftData(),
  5308. .SyncLoad(),
  5309. .LutOut(\macro_inst|ahb2apb_inst|comb~0_combout ),
  5310. .Cout(),
  5311. .Q());
  5312. defparam \macro_inst|ahb2apb_inst|comb~0 .coord_x = 15;
  5313. defparam \macro_inst|ahb2apb_inst|comb~0 .coord_y = 12;
  5314. defparam \macro_inst|ahb2apb_inst|comb~0 .coord_z = 4;
  5315. defparam \macro_inst|ahb2apb_inst|comb~0 .mask = 16'hF000;
  5316. defparam \macro_inst|ahb2apb_inst|comb~0 .modeMux = 1'b0;
  5317. defparam \macro_inst|ahb2apb_inst|comb~0 .FeedbackMux = 1'b0;
  5318. defparam \macro_inst|ahb2apb_inst|comb~0 .ShiftMux = 1'b0;
  5319. defparam \macro_inst|ahb2apb_inst|comb~0 .BypassEn = 1'b0;
  5320. defparam \macro_inst|ahb2apb_inst|comb~0 .CarryEnb = 1'b1;
  5321. alta_slice \macro_inst|ahb2apb_inst|haddr[0] (
  5322. .A(),
  5323. .B(),
  5324. .C(vcc),
  5325. .D(\rv32.mem_ahb_haddr[0] ),
  5326. .Cin(),
  5327. .Qin(\macro_inst|ahb2apb_inst|haddr [0]),
  5328. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5330. .SyncReset(),
  5331. .ShiftData(),
  5332. .SyncLoad(),
  5333. .LutOut(\macro_inst|ahb2apb_inst|haddr[0]__feeder__LutOut ),
  5334. .Cout(),
  5335. .Q(\macro_inst|ahb2apb_inst|haddr [0]));
  5336. defparam \macro_inst|ahb2apb_inst|haddr[0] .coord_x = 14;
  5337. defparam \macro_inst|ahb2apb_inst|haddr[0] .coord_y = 12;
  5338. defparam \macro_inst|ahb2apb_inst|haddr[0] .coord_z = 4;
  5339. defparam \macro_inst|ahb2apb_inst|haddr[0] .mask = 16'hFF00;
  5340. defparam \macro_inst|ahb2apb_inst|haddr[0] .modeMux = 1'b1;
  5341. defparam \macro_inst|ahb2apb_inst|haddr[0] .FeedbackMux = 1'b0;
  5342. defparam \macro_inst|ahb2apb_inst|haddr[0] .ShiftMux = 1'b0;
  5343. defparam \macro_inst|ahb2apb_inst|haddr[0] .BypassEn = 1'b0;
  5344. defparam \macro_inst|ahb2apb_inst|haddr[0] .CarryEnb = 1'b1;
  5345. alta_slice \macro_inst|ahb2apb_inst|haddr[10] (
  5346. .A(),
  5347. .B(),
  5348. .C(vcc),
  5349. .D(\rv32.mem_ahb_haddr[10] ),
  5350. .Cin(),
  5351. .Qin(\macro_inst|ahb2apb_inst|haddr [10]),
  5352. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5354. .SyncReset(),
  5355. .ShiftData(),
  5356. .SyncLoad(),
  5357. .LutOut(\macro_inst|ahb2apb_inst|haddr[10]__feeder__LutOut ),
  5358. .Cout(),
  5359. .Q(\macro_inst|ahb2apb_inst|haddr [10]));
  5360. defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_x = 14;
  5361. defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_y = 12;
  5362. defparam \macro_inst|ahb2apb_inst|haddr[10] .coord_z = 10;
  5363. defparam \macro_inst|ahb2apb_inst|haddr[10] .mask = 16'hFF00;
  5364. defparam \macro_inst|ahb2apb_inst|haddr[10] .modeMux = 1'b1;
  5365. defparam \macro_inst|ahb2apb_inst|haddr[10] .FeedbackMux = 1'b0;
  5366. defparam \macro_inst|ahb2apb_inst|haddr[10] .ShiftMux = 1'b0;
  5367. defparam \macro_inst|ahb2apb_inst|haddr[10] .BypassEn = 1'b0;
  5368. defparam \macro_inst|ahb2apb_inst|haddr[10] .CarryEnb = 1'b1;
  5369. alta_slice \macro_inst|ahb2apb_inst|haddr[11] (
  5370. .A(),
  5371. .B(),
  5372. .C(vcc),
  5373. .D(\rv32.mem_ahb_haddr[11] ),
  5374. .Cin(),
  5375. .Qin(\macro_inst|ahb2apb_inst|haddr [11]),
  5376. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5378. .SyncReset(),
  5379. .ShiftData(),
  5380. .SyncLoad(),
  5381. .LutOut(\macro_inst|ahb2apb_inst|haddr[11]__feeder__LutOut ),
  5382. .Cout(),
  5383. .Q(\macro_inst|ahb2apb_inst|haddr [11]));
  5384. defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_x = 14;
  5385. defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_y = 12;
  5386. defparam \macro_inst|ahb2apb_inst|haddr[11] .coord_z = 2;
  5387. defparam \macro_inst|ahb2apb_inst|haddr[11] .mask = 16'hFF00;
  5388. defparam \macro_inst|ahb2apb_inst|haddr[11] .modeMux = 1'b1;
  5389. defparam \macro_inst|ahb2apb_inst|haddr[11] .FeedbackMux = 1'b0;
  5390. defparam \macro_inst|ahb2apb_inst|haddr[11] .ShiftMux = 1'b0;
  5391. defparam \macro_inst|ahb2apb_inst|haddr[11] .BypassEn = 1'b0;
  5392. defparam \macro_inst|ahb2apb_inst|haddr[11] .CarryEnb = 1'b1;
  5393. alta_slice \macro_inst|ahb2apb_inst|haddr[12] (
  5394. .A(),
  5395. .B(),
  5396. .C(vcc),
  5397. .D(\rv32.mem_ahb_haddr[12] ),
  5398. .Cin(),
  5399. .Qin(\macro_inst|ahb2apb_inst|haddr [12]),
  5400. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ),
  5401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5402. .SyncReset(),
  5403. .ShiftData(),
  5404. .SyncLoad(),
  5405. .LutOut(\macro_inst|ahb2apb_inst|haddr[12]__feeder__LutOut ),
  5406. .Cout(),
  5407. .Q(\macro_inst|ahb2apb_inst|haddr [12]));
  5408. defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_x = 16;
  5409. defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_y = 12;
  5410. defparam \macro_inst|ahb2apb_inst|haddr[12] .coord_z = 1;
  5411. defparam \macro_inst|ahb2apb_inst|haddr[12] .mask = 16'hFF00;
  5412. defparam \macro_inst|ahb2apb_inst|haddr[12] .modeMux = 1'b1;
  5413. defparam \macro_inst|ahb2apb_inst|haddr[12] .FeedbackMux = 1'b0;
  5414. defparam \macro_inst|ahb2apb_inst|haddr[12] .ShiftMux = 1'b0;
  5415. defparam \macro_inst|ahb2apb_inst|haddr[12] .BypassEn = 1'b0;
  5416. defparam \macro_inst|ahb2apb_inst|haddr[12] .CarryEnb = 1'b1;
  5417. alta_slice \macro_inst|ahb2apb_inst|haddr[13] (
  5418. .A(),
  5419. .B(),
  5420. .C(vcc),
  5421. .D(\rv32.mem_ahb_haddr[13] ),
  5422. .Cin(),
  5423. .Qin(\macro_inst|ahb2apb_inst|haddr [13]),
  5424. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ),
  5425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5426. .SyncReset(),
  5427. .ShiftData(),
  5428. .SyncLoad(),
  5429. .LutOut(\macro_inst|ahb2apb_inst|haddr[13]__feeder__LutOut ),
  5430. .Cout(),
  5431. .Q(\macro_inst|ahb2apb_inst|haddr [13]));
  5432. defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_x = 16;
  5433. defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_y = 12;
  5434. defparam \macro_inst|ahb2apb_inst|haddr[13] .coord_z = 14;
  5435. defparam \macro_inst|ahb2apb_inst|haddr[13] .mask = 16'hFF00;
  5436. defparam \macro_inst|ahb2apb_inst|haddr[13] .modeMux = 1'b1;
  5437. defparam \macro_inst|ahb2apb_inst|haddr[13] .FeedbackMux = 1'b0;
  5438. defparam \macro_inst|ahb2apb_inst|haddr[13] .ShiftMux = 1'b0;
  5439. defparam \macro_inst|ahb2apb_inst|haddr[13] .BypassEn = 1'b0;
  5440. defparam \macro_inst|ahb2apb_inst|haddr[13] .CarryEnb = 1'b1;
  5441. alta_slice \macro_inst|ahb2apb_inst|haddr[14] (
  5442. .A(\macro_inst|ahb2apb_inst|paddr [4]),
  5443. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  5444. .C(\rv32.mem_ahb_haddr[14] ),
  5445. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  5446. .Cin(),
  5447. .Qin(\macro_inst|ahb2apb_inst|haddr [14]),
  5448. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ),
  5449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5450. .SyncReset(SyncReset_X60_Y10_GND),
  5451. .ShiftData(),
  5452. .SyncLoad(SyncLoad_X60_Y10_VCC),
  5453. .LutOut(\macro_inst|cfg_reg_inst|Equal4~1_combout ),
  5454. .Cout(),
  5455. .Q(\macro_inst|ahb2apb_inst|haddr [14]));
  5456. defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_x = 17;
  5457. defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_y = 12;
  5458. defparam \macro_inst|ahb2apb_inst|haddr[14] .coord_z = 6;
  5459. defparam \macro_inst|ahb2apb_inst|haddr[14] .mask = 16'h0022;
  5460. defparam \macro_inst|ahb2apb_inst|haddr[14] .modeMux = 1'b0;
  5461. defparam \macro_inst|ahb2apb_inst|haddr[14] .FeedbackMux = 1'b0;
  5462. defparam \macro_inst|ahb2apb_inst|haddr[14] .ShiftMux = 1'b0;
  5463. defparam \macro_inst|ahb2apb_inst|haddr[14] .BypassEn = 1'b1;
  5464. defparam \macro_inst|ahb2apb_inst|haddr[14] .CarryEnb = 1'b1;
  5465. alta_slice \macro_inst|ahb2apb_inst|haddr[15] (
  5466. .A(),
  5467. .B(),
  5468. .C(vcc),
  5469. .D(\rv32.mem_ahb_haddr[15] ),
  5470. .Cin(),
  5471. .Qin(\macro_inst|ahb2apb_inst|haddr [15]),
  5472. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ),
  5473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5474. .SyncReset(),
  5475. .ShiftData(),
  5476. .SyncLoad(),
  5477. .LutOut(\macro_inst|ahb2apb_inst|haddr[15]__feeder__LutOut ),
  5478. .Cout(),
  5479. .Q(\macro_inst|ahb2apb_inst|haddr [15]));
  5480. defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_x = 16;
  5481. defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_y = 12;
  5482. defparam \macro_inst|ahb2apb_inst|haddr[15] .coord_z = 15;
  5483. defparam \macro_inst|ahb2apb_inst|haddr[15] .mask = 16'hFF00;
  5484. defparam \macro_inst|ahb2apb_inst|haddr[15] .modeMux = 1'b1;
  5485. defparam \macro_inst|ahb2apb_inst|haddr[15] .FeedbackMux = 1'b0;
  5486. defparam \macro_inst|ahb2apb_inst|haddr[15] .ShiftMux = 1'b0;
  5487. defparam \macro_inst|ahb2apb_inst|haddr[15] .BypassEn = 1'b0;
  5488. defparam \macro_inst|ahb2apb_inst|haddr[15] .CarryEnb = 1'b1;
  5489. alta_slice \macro_inst|ahb2apb_inst|haddr[1] (
  5490. .A(),
  5491. .B(),
  5492. .C(vcc),
  5493. .D(\rv32.mem_ahb_haddr[1] ),
  5494. .Cin(),
  5495. .Qin(\macro_inst|ahb2apb_inst|haddr [1]),
  5496. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5498. .SyncReset(),
  5499. .ShiftData(),
  5500. .SyncLoad(),
  5501. .LutOut(\macro_inst|ahb2apb_inst|haddr[1]__feeder__LutOut ),
  5502. .Cout(),
  5503. .Q(\macro_inst|ahb2apb_inst|haddr [1]));
  5504. defparam \macro_inst|ahb2apb_inst|haddr[1] .coord_x = 14;
  5505. defparam \macro_inst|ahb2apb_inst|haddr[1] .coord_y = 12;
  5506. defparam \macro_inst|ahb2apb_inst|haddr[1] .coord_z = 1;
  5507. defparam \macro_inst|ahb2apb_inst|haddr[1] .mask = 16'hFF00;
  5508. defparam \macro_inst|ahb2apb_inst|haddr[1] .modeMux = 1'b1;
  5509. defparam \macro_inst|ahb2apb_inst|haddr[1] .FeedbackMux = 1'b0;
  5510. defparam \macro_inst|ahb2apb_inst|haddr[1] .ShiftMux = 1'b0;
  5511. defparam \macro_inst|ahb2apb_inst|haddr[1] .BypassEn = 1'b0;
  5512. defparam \macro_inst|ahb2apb_inst|haddr[1] .CarryEnb = 1'b1;
  5513. alta_slice \macro_inst|ahb2apb_inst|haddr[2] (
  5514. .A(\macro_inst|ahb2apb_inst|paddr [5]),
  5515. .B(\macro_inst|ahb2apb_inst|paddr [4]),
  5516. .C(\rv32.mem_ahb_haddr[2] ),
  5517. .D(\macro_inst|ahb2apb_inst|paddr [3]),
  5518. .Cin(),
  5519. .Qin(\macro_inst|ahb2apb_inst|haddr [2]),
  5520. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ),
  5521. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5522. .SyncReset(SyncReset_X60_Y10_GND),
  5523. .ShiftData(),
  5524. .SyncLoad(SyncLoad_X60_Y10_VCC),
  5525. .LutOut(\macro_inst|cfg_reg_inst|Equal2~0_combout ),
  5526. .Cout(),
  5527. .Q(\macro_inst|ahb2apb_inst|haddr [2]));
  5528. defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_x = 17;
  5529. defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_y = 12;
  5530. defparam \macro_inst|ahb2apb_inst|haddr[2] .coord_z = 8;
  5531. defparam \macro_inst|ahb2apb_inst|haddr[2] .mask = 16'h1100;
  5532. defparam \macro_inst|ahb2apb_inst|haddr[2] .modeMux = 1'b0;
  5533. defparam \macro_inst|ahb2apb_inst|haddr[2] .FeedbackMux = 1'b0;
  5534. defparam \macro_inst|ahb2apb_inst|haddr[2] .ShiftMux = 1'b0;
  5535. defparam \macro_inst|ahb2apb_inst|haddr[2] .BypassEn = 1'b1;
  5536. defparam \macro_inst|ahb2apb_inst|haddr[2] .CarryEnb = 1'b1;
  5537. alta_slice \macro_inst|ahb2apb_inst|haddr[3] (
  5538. .A(\macro_inst|ahb2apb_inst|paddr [5]),
  5539. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  5540. .C(\rv32.mem_ahb_haddr[3] ),
  5541. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  5542. .Cin(),
  5543. .Qin(\macro_inst|ahb2apb_inst|haddr [3]),
  5544. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ),
  5545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5546. .SyncReset(SyncReset_X60_Y10_GND),
  5547. .ShiftData(),
  5548. .SyncLoad(SyncLoad_X60_Y10_VCC),
  5549. .LutOut(\macro_inst|cfg_reg_inst|Equal1~0_combout ),
  5550. .Cout(),
  5551. .Q(\macro_inst|ahb2apb_inst|haddr [3]));
  5552. defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_x = 17;
  5553. defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_y = 12;
  5554. defparam \macro_inst|ahb2apb_inst|haddr[3] .coord_z = 15;
  5555. defparam \macro_inst|ahb2apb_inst|haddr[3] .mask = 16'h1100;
  5556. defparam \macro_inst|ahb2apb_inst|haddr[3] .modeMux = 1'b0;
  5557. defparam \macro_inst|ahb2apb_inst|haddr[3] .FeedbackMux = 1'b0;
  5558. defparam \macro_inst|ahb2apb_inst|haddr[3] .ShiftMux = 1'b0;
  5559. defparam \macro_inst|ahb2apb_inst|haddr[3] .BypassEn = 1'b1;
  5560. defparam \macro_inst|ahb2apb_inst|haddr[3] .CarryEnb = 1'b1;
  5561. alta_slice \macro_inst|ahb2apb_inst|haddr[4] (
  5562. .A(\macro_inst|ahb2apb_inst|paddr [5]),
  5563. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  5564. .C(\rv32.mem_ahb_haddr[4] ),
  5565. .D(\macro_inst|ahb2apb_inst|paddr [4]),
  5566. .Cin(),
  5567. .Qin(\macro_inst|ahb2apb_inst|haddr [4]),
  5568. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ),
  5569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5570. .SyncReset(SyncReset_X60_Y10_GND),
  5571. .ShiftData(),
  5572. .SyncLoad(SyncLoad_X60_Y10_VCC),
  5573. .LutOut(\macro_inst|cfg_reg_inst|Selector24~2_combout ),
  5574. .Cout(),
  5575. .Q(\macro_inst|ahb2apb_inst|haddr [4]));
  5576. defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_x = 17;
  5577. defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_y = 12;
  5578. defparam \macro_inst|ahb2apb_inst|haddr[4] .coord_z = 5;
  5579. defparam \macro_inst|ahb2apb_inst|haddr[4] .mask = 16'h4400;
  5580. defparam \macro_inst|ahb2apb_inst|haddr[4] .modeMux = 1'b0;
  5581. defparam \macro_inst|ahb2apb_inst|haddr[4] .FeedbackMux = 1'b0;
  5582. defparam \macro_inst|ahb2apb_inst|haddr[4] .ShiftMux = 1'b0;
  5583. defparam \macro_inst|ahb2apb_inst|haddr[4] .BypassEn = 1'b1;
  5584. defparam \macro_inst|ahb2apb_inst|haddr[4] .CarryEnb = 1'b1;
  5585. alta_slice \macro_inst|ahb2apb_inst|haddr[5] (
  5586. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  5587. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  5588. .C(\rv32.mem_ahb_haddr[5] ),
  5589. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  5590. .Cin(),
  5591. .Qin(\macro_inst|ahb2apb_inst|haddr [5]),
  5592. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X60_Y10_SIG_SIG ),
  5593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5594. .SyncReset(SyncReset_X60_Y10_GND),
  5595. .ShiftData(),
  5596. .SyncLoad(SyncLoad_X60_Y10_VCC),
  5597. .LutOut(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  5598. .Cout(),
  5599. .Q(\macro_inst|ahb2apb_inst|haddr [5]));
  5600. defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_x = 17;
  5601. defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_y = 12;
  5602. defparam \macro_inst|ahb2apb_inst|haddr[5] .coord_z = 12;
  5603. defparam \macro_inst|ahb2apb_inst|haddr[5] .mask = 16'h0022;
  5604. defparam \macro_inst|ahb2apb_inst|haddr[5] .modeMux = 1'b0;
  5605. defparam \macro_inst|ahb2apb_inst|haddr[5] .FeedbackMux = 1'b0;
  5606. defparam \macro_inst|ahb2apb_inst|haddr[5] .ShiftMux = 1'b0;
  5607. defparam \macro_inst|ahb2apb_inst|haddr[5] .BypassEn = 1'b1;
  5608. defparam \macro_inst|ahb2apb_inst|haddr[5] .CarryEnb = 1'b1;
  5609. alta_slice \macro_inst|ahb2apb_inst|haddr[6] (
  5610. .A(),
  5611. .B(),
  5612. .C(vcc),
  5613. .D(\rv32.mem_ahb_haddr[6] ),
  5614. .Cin(),
  5615. .Qin(\macro_inst|ahb2apb_inst|haddr [6]),
  5616. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5618. .SyncReset(),
  5619. .ShiftData(),
  5620. .SyncLoad(),
  5621. .LutOut(\macro_inst|ahb2apb_inst|haddr[6]__feeder__LutOut ),
  5622. .Cout(),
  5623. .Q(\macro_inst|ahb2apb_inst|haddr [6]));
  5624. defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_x = 14;
  5625. defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_y = 12;
  5626. defparam \macro_inst|ahb2apb_inst|haddr[6] .coord_z = 3;
  5627. defparam \macro_inst|ahb2apb_inst|haddr[6] .mask = 16'hFF00;
  5628. defparam \macro_inst|ahb2apb_inst|haddr[6] .modeMux = 1'b1;
  5629. defparam \macro_inst|ahb2apb_inst|haddr[6] .FeedbackMux = 1'b0;
  5630. defparam \macro_inst|ahb2apb_inst|haddr[6] .ShiftMux = 1'b0;
  5631. defparam \macro_inst|ahb2apb_inst|haddr[6] .BypassEn = 1'b0;
  5632. defparam \macro_inst|ahb2apb_inst|haddr[6] .CarryEnb = 1'b1;
  5633. alta_slice \macro_inst|ahb2apb_inst|haddr[7] (
  5634. .A(),
  5635. .B(),
  5636. .C(vcc),
  5637. .D(\rv32.mem_ahb_haddr[7] ),
  5638. .Cin(),
  5639. .Qin(\macro_inst|ahb2apb_inst|haddr [7]),
  5640. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5642. .SyncReset(),
  5643. .ShiftData(),
  5644. .SyncLoad(),
  5645. .LutOut(\macro_inst|ahb2apb_inst|haddr[7]__feeder__LutOut ),
  5646. .Cout(),
  5647. .Q(\macro_inst|ahb2apb_inst|haddr [7]));
  5648. defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_x = 14;
  5649. defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_y = 12;
  5650. defparam \macro_inst|ahb2apb_inst|haddr[7] .coord_z = 15;
  5651. defparam \macro_inst|ahb2apb_inst|haddr[7] .mask = 16'hFF00;
  5652. defparam \macro_inst|ahb2apb_inst|haddr[7] .modeMux = 1'b1;
  5653. defparam \macro_inst|ahb2apb_inst|haddr[7] .FeedbackMux = 1'b0;
  5654. defparam \macro_inst|ahb2apb_inst|haddr[7] .ShiftMux = 1'b0;
  5655. defparam \macro_inst|ahb2apb_inst|haddr[7] .BypassEn = 1'b0;
  5656. defparam \macro_inst|ahb2apb_inst|haddr[7] .CarryEnb = 1'b1;
  5657. alta_slice \macro_inst|ahb2apb_inst|haddr[8] (
  5658. .A(),
  5659. .B(),
  5660. .C(vcc),
  5661. .D(\rv32.mem_ahb_haddr[8] ),
  5662. .Cin(),
  5663. .Qin(\macro_inst|ahb2apb_inst|haddr [8]),
  5664. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5666. .SyncReset(),
  5667. .ShiftData(),
  5668. .SyncLoad(),
  5669. .LutOut(\macro_inst|ahb2apb_inst|haddr[8]__feeder__LutOut ),
  5670. .Cout(),
  5671. .Q(\macro_inst|ahb2apb_inst|haddr [8]));
  5672. defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_x = 14;
  5673. defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_y = 12;
  5674. defparam \macro_inst|ahb2apb_inst|haddr[8] .coord_z = 11;
  5675. defparam \macro_inst|ahb2apb_inst|haddr[8] .mask = 16'hFF00;
  5676. defparam \macro_inst|ahb2apb_inst|haddr[8] .modeMux = 1'b1;
  5677. defparam \macro_inst|ahb2apb_inst|haddr[8] .FeedbackMux = 1'b0;
  5678. defparam \macro_inst|ahb2apb_inst|haddr[8] .ShiftMux = 1'b0;
  5679. defparam \macro_inst|ahb2apb_inst|haddr[8] .BypassEn = 1'b0;
  5680. defparam \macro_inst|ahb2apb_inst|haddr[8] .CarryEnb = 1'b1;
  5681. alta_slice \macro_inst|ahb2apb_inst|haddr[9] (
  5682. .A(),
  5683. .B(),
  5684. .C(vcc),
  5685. .D(\rv32.mem_ahb_haddr[9] ),
  5686. .Cin(),
  5687. .Qin(\macro_inst|ahb2apb_inst|haddr [9]),
  5688. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y10_SIG_SIG ),
  5689. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5690. .SyncReset(),
  5691. .ShiftData(),
  5692. .SyncLoad(),
  5693. .LutOut(\macro_inst|ahb2apb_inst|haddr[9]__feeder__LutOut ),
  5694. .Cout(),
  5695. .Q(\macro_inst|ahb2apb_inst|haddr [9]));
  5696. defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_x = 14;
  5697. defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_y = 12;
  5698. defparam \macro_inst|ahb2apb_inst|haddr[9] .coord_z = 0;
  5699. defparam \macro_inst|ahb2apb_inst|haddr[9] .mask = 16'hFF00;
  5700. defparam \macro_inst|ahb2apb_inst|haddr[9] .modeMux = 1'b1;
  5701. defparam \macro_inst|ahb2apb_inst|haddr[9] .FeedbackMux = 1'b0;
  5702. defparam \macro_inst|ahb2apb_inst|haddr[9] .ShiftMux = 1'b0;
  5703. defparam \macro_inst|ahb2apb_inst|haddr[9] .BypassEn = 1'b0;
  5704. defparam \macro_inst|ahb2apb_inst|haddr[9] .CarryEnb = 1'b1;
  5705. alta_slice \macro_inst|ahb2apb_inst|hdone (
  5706. .A(vcc),
  5707. .B(\macro_inst|ahb2apb_inst|pvalid~q ),
  5708. .C(vcc),
  5709. .D(\macro_inst|ahb2apb_inst|hreadyout~q ),
  5710. .Cin(),
  5711. .Qin(\macro_inst|ahb2apb_inst|hdone~q ),
  5712. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  5713. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  5714. .SyncReset(),
  5715. .ShiftData(),
  5716. .SyncLoad(),
  5717. .LutOut(\macro_inst|ahb2apb_inst|hdone~0_combout ),
  5718. .Cout(),
  5719. .Q(\macro_inst|ahb2apb_inst|hdone~q ));
  5720. defparam \macro_inst|ahb2apb_inst|hdone .coord_x = 15;
  5721. defparam \macro_inst|ahb2apb_inst|hdone .coord_y = 12;
  5722. defparam \macro_inst|ahb2apb_inst|hdone .coord_z = 1;
  5723. defparam \macro_inst|ahb2apb_inst|hdone .mask = 16'hFC00;
  5724. defparam \macro_inst|ahb2apb_inst|hdone .modeMux = 1'b0;
  5725. defparam \macro_inst|ahb2apb_inst|hdone .FeedbackMux = 1'b1;
  5726. defparam \macro_inst|ahb2apb_inst|hdone .ShiftMux = 1'b0;
  5727. defparam \macro_inst|ahb2apb_inst|hdone .BypassEn = 1'b0;
  5728. defparam \macro_inst|ahb2apb_inst|hdone .CarryEnb = 1'b1;
  5729. alta_slice \macro_inst|ahb2apb_inst|hreadyout (
  5730. .A(\macro_inst|ahb2apb_inst|hdone~q ),
  5731. .B(\macro_inst|ahb2apb_inst|pdone~q ),
  5732. .C(vcc),
  5733. .D(\rv32.mem_ahb_htrans[1] ),
  5734. .Cin(),
  5735. .Qin(\macro_inst|ahb2apb_inst|hreadyout~q ),
  5736. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  5737. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  5738. .SyncReset(),
  5739. .ShiftData(),
  5740. .SyncLoad(),
  5741. .LutOut(\macro_inst|ahb2apb_inst|hreadyout~0_combout ),
  5742. .Cout(),
  5743. .Q(\macro_inst|ahb2apb_inst|hreadyout~q ));
  5744. defparam \macro_inst|ahb2apb_inst|hreadyout .coord_x = 15;
  5745. defparam \macro_inst|ahb2apb_inst|hreadyout .coord_y = 12;
  5746. defparam \macro_inst|ahb2apb_inst|hreadyout .coord_z = 0;
  5747. defparam \macro_inst|ahb2apb_inst|hreadyout .mask = 16'h7F70;
  5748. defparam \macro_inst|ahb2apb_inst|hreadyout .modeMux = 1'b0;
  5749. defparam \macro_inst|ahb2apb_inst|hreadyout .FeedbackMux = 1'b1;
  5750. defparam \macro_inst|ahb2apb_inst|hreadyout .ShiftMux = 1'b0;
  5751. defparam \macro_inst|ahb2apb_inst|hreadyout .BypassEn = 1'b0;
  5752. defparam \macro_inst|ahb2apb_inst|hreadyout .CarryEnb = 1'b1;
  5753. alta_slice \macro_inst|ahb2apb_inst|hwrite (
  5754. .A(),
  5755. .B(),
  5756. .C(\rv32.mem_ahb_hwrite ),
  5757. .D(),
  5758. .Cin(),
  5759. .Qin(\macro_inst|ahb2apb_inst|hwrite~q ),
  5760. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|always0~0_combout_X59_Y12_SIG_SIG ),
  5761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5762. .SyncReset(SyncReset_X59_Y12_GND),
  5763. .ShiftData(),
  5764. .SyncLoad(SyncLoad_X59_Y12_VCC),
  5765. .LutOut(),
  5766. .Cout(),
  5767. .Q(\macro_inst|ahb2apb_inst|hwrite~q ));
  5768. defparam \macro_inst|ahb2apb_inst|hwrite .coord_x = 16;
  5769. defparam \macro_inst|ahb2apb_inst|hwrite .coord_y = 12;
  5770. defparam \macro_inst|ahb2apb_inst|hwrite .coord_z = 12;
  5771. defparam \macro_inst|ahb2apb_inst|hwrite .mask = 16'hFFFF;
  5772. defparam \macro_inst|ahb2apb_inst|hwrite .modeMux = 1'b1;
  5773. defparam \macro_inst|ahb2apb_inst|hwrite .FeedbackMux = 1'b0;
  5774. defparam \macro_inst|ahb2apb_inst|hwrite .ShiftMux = 1'b0;
  5775. defparam \macro_inst|ahb2apb_inst|hwrite .BypassEn = 1'b1;
  5776. defparam \macro_inst|ahb2apb_inst|hwrite .CarryEnb = 1'b1;
  5777. alta_slice \macro_inst|ahb2apb_inst|paddr[0] (
  5778. .A(\macro_inst|ahb2apb_inst|paddr [7]),
  5779. .B(\macro_inst|ahb2apb_inst|paddr [1]),
  5780. .C(\macro_inst|ahb2apb_inst|haddr [0]),
  5781. .D(\macro_inst|ahb2apb_inst|paddr [6]),
  5782. .Cin(),
  5783. .Qin(\macro_inst|ahb2apb_inst|paddr [0]),
  5784. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  5785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5786. .SyncReset(SyncReset_X59_Y10_GND),
  5787. .ShiftData(),
  5788. .SyncLoad(SyncLoad_X59_Y10_VCC),
  5789. .LutOut(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  5790. .Cout(),
  5791. .Q(\macro_inst|ahb2apb_inst|paddr [0]));
  5792. defparam \macro_inst|ahb2apb_inst|paddr[0] .coord_x = 14;
  5793. defparam \macro_inst|ahb2apb_inst|paddr[0] .coord_y = 12;
  5794. defparam \macro_inst|ahb2apb_inst|paddr[0] .coord_z = 8;
  5795. defparam \macro_inst|ahb2apb_inst|paddr[0] .mask = 16'h0001;
  5796. defparam \macro_inst|ahb2apb_inst|paddr[0] .modeMux = 1'b0;
  5797. defparam \macro_inst|ahb2apb_inst|paddr[0] .FeedbackMux = 1'b1;
  5798. defparam \macro_inst|ahb2apb_inst|paddr[0] .ShiftMux = 1'b0;
  5799. defparam \macro_inst|ahb2apb_inst|paddr[0] .BypassEn = 1'b1;
  5800. defparam \macro_inst|ahb2apb_inst|paddr[0] .CarryEnb = 1'b1;
  5801. alta_slice \macro_inst|ahb2apb_inst|paddr[10] (
  5802. .A(),
  5803. .B(),
  5804. .C(\macro_inst|ahb2apb_inst|haddr [10]),
  5805. .D(),
  5806. .Cin(),
  5807. .Qin(\macro_inst|ahb2apb_inst|paddr [10]),
  5808. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  5809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5810. .SyncReset(SyncReset_X59_Y10_GND),
  5811. .ShiftData(),
  5812. .SyncLoad(SyncLoad_X59_Y10_VCC),
  5813. .LutOut(),
  5814. .Cout(),
  5815. .Q(\macro_inst|ahb2apb_inst|paddr [10]));
  5816. defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_x = 14;
  5817. defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_y = 12;
  5818. defparam \macro_inst|ahb2apb_inst|paddr[10] .coord_z = 7;
  5819. defparam \macro_inst|ahb2apb_inst|paddr[10] .mask = 16'hFFFF;
  5820. defparam \macro_inst|ahb2apb_inst|paddr[10] .modeMux = 1'b1;
  5821. defparam \macro_inst|ahb2apb_inst|paddr[10] .FeedbackMux = 1'b0;
  5822. defparam \macro_inst|ahb2apb_inst|paddr[10] .ShiftMux = 1'b0;
  5823. defparam \macro_inst|ahb2apb_inst|paddr[10] .BypassEn = 1'b1;
  5824. defparam \macro_inst|ahb2apb_inst|paddr[10] .CarryEnb = 1'b1;
  5825. alta_slice \macro_inst|ahb2apb_inst|paddr[11] (
  5826. .A(\macro_inst|ahb2apb_inst|paddr [9]),
  5827. .B(\macro_inst|ahb2apb_inst|paddr [10]),
  5828. .C(\macro_inst|ahb2apb_inst|haddr [11]),
  5829. .D(\macro_inst|ahb2apb_inst|paddr [8]),
  5830. .Cin(),
  5831. .Qin(\macro_inst|ahb2apb_inst|paddr [11]),
  5832. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  5833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5834. .SyncReset(SyncReset_X59_Y10_GND),
  5835. .ShiftData(),
  5836. .SyncLoad(SyncLoad_X59_Y10_VCC),
  5837. .LutOut(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  5838. .Cout(),
  5839. .Q(\macro_inst|ahb2apb_inst|paddr [11]));
  5840. defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_x = 14;
  5841. defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_y = 12;
  5842. defparam \macro_inst|ahb2apb_inst|paddr[11] .coord_z = 12;
  5843. defparam \macro_inst|ahb2apb_inst|paddr[11] .mask = 16'h0001;
  5844. defparam \macro_inst|ahb2apb_inst|paddr[11] .modeMux = 1'b0;
  5845. defparam \macro_inst|ahb2apb_inst|paddr[11] .FeedbackMux = 1'b1;
  5846. defparam \macro_inst|ahb2apb_inst|paddr[11] .ShiftMux = 1'b0;
  5847. defparam \macro_inst|ahb2apb_inst|paddr[11] .BypassEn = 1'b1;
  5848. defparam \macro_inst|ahb2apb_inst|paddr[11] .CarryEnb = 1'b1;
  5849. alta_slice \macro_inst|ahb2apb_inst|paddr[12] (
  5850. .A(vcc),
  5851. .B(vcc),
  5852. .C(vcc),
  5853. .D(\macro_inst|ahb2apb_inst|haddr [12]),
  5854. .Cin(),
  5855. .Qin(\macro_inst|ahb2apb_inst|paddr [12]),
  5856. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ),
  5857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5858. .SyncReset(),
  5859. .ShiftData(),
  5860. .SyncLoad(),
  5861. .LutOut(\macro_inst|ahb2apb_inst|paddr[12]~feeder_combout ),
  5862. .Cout(),
  5863. .Q(\macro_inst|ahb2apb_inst|paddr [12]));
  5864. defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_x = 16;
  5865. defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_y = 12;
  5866. defparam \macro_inst|ahb2apb_inst|paddr[12] .coord_z = 8;
  5867. defparam \macro_inst|ahb2apb_inst|paddr[12] .mask = 16'hFF00;
  5868. defparam \macro_inst|ahb2apb_inst|paddr[12] .modeMux = 1'b0;
  5869. defparam \macro_inst|ahb2apb_inst|paddr[12] .FeedbackMux = 1'b0;
  5870. defparam \macro_inst|ahb2apb_inst|paddr[12] .ShiftMux = 1'b0;
  5871. defparam \macro_inst|ahb2apb_inst|paddr[12] .BypassEn = 1'b0;
  5872. defparam \macro_inst|ahb2apb_inst|paddr[12] .CarryEnb = 1'b1;
  5873. alta_slice \macro_inst|ahb2apb_inst|paddr[13] (
  5874. .A(),
  5875. .B(),
  5876. .C(\macro_inst|ahb2apb_inst|haddr [13]),
  5877. .D(),
  5878. .Cin(),
  5879. .Qin(\macro_inst|ahb2apb_inst|paddr [13]),
  5880. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ),
  5881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5882. .SyncReset(SyncReset_X59_Y12_GND),
  5883. .ShiftData(),
  5884. .SyncLoad(SyncLoad_X59_Y12_VCC),
  5885. .LutOut(),
  5886. .Cout(),
  5887. .Q(\macro_inst|ahb2apb_inst|paddr [13]));
  5888. defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_x = 16;
  5889. defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_y = 12;
  5890. defparam \macro_inst|ahb2apb_inst|paddr[13] .coord_z = 10;
  5891. defparam \macro_inst|ahb2apb_inst|paddr[13] .mask = 16'hFFFF;
  5892. defparam \macro_inst|ahb2apb_inst|paddr[13] .modeMux = 1'b1;
  5893. defparam \macro_inst|ahb2apb_inst|paddr[13] .FeedbackMux = 1'b0;
  5894. defparam \macro_inst|ahb2apb_inst|paddr[13] .ShiftMux = 1'b0;
  5895. defparam \macro_inst|ahb2apb_inst|paddr[13] .BypassEn = 1'b1;
  5896. defparam \macro_inst|ahb2apb_inst|paddr[13] .CarryEnb = 1'b1;
  5897. alta_slice \macro_inst|ahb2apb_inst|paddr[14] (
  5898. .A(vcc),
  5899. .B(vcc),
  5900. .C(vcc),
  5901. .D(\macro_inst|ahb2apb_inst|haddr [14]),
  5902. .Cin(),
  5903. .Qin(\macro_inst|ahb2apb_inst|paddr [14]),
  5904. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y12_SIG_SIG ),
  5905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  5906. .SyncReset(),
  5907. .ShiftData(),
  5908. .SyncLoad(),
  5909. .LutOut(\macro_inst|ahb2apb_inst|paddr[14]~feeder_combout ),
  5910. .Cout(),
  5911. .Q(\macro_inst|ahb2apb_inst|paddr [14]));
  5912. defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_x = 18;
  5913. defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_y = 12;
  5914. defparam \macro_inst|ahb2apb_inst|paddr[14] .coord_z = 12;
  5915. defparam \macro_inst|ahb2apb_inst|paddr[14] .mask = 16'hFF00;
  5916. defparam \macro_inst|ahb2apb_inst|paddr[14] .modeMux = 1'b0;
  5917. defparam \macro_inst|ahb2apb_inst|paddr[14] .FeedbackMux = 1'b0;
  5918. defparam \macro_inst|ahb2apb_inst|paddr[14] .ShiftMux = 1'b0;
  5919. defparam \macro_inst|ahb2apb_inst|paddr[14] .BypassEn = 1'b0;
  5920. defparam \macro_inst|ahb2apb_inst|paddr[14] .CarryEnb = 1'b1;
  5921. alta_slice \macro_inst|ahb2apb_inst|paddr[15] (
  5922. .A(vcc),
  5923. .B(vcc),
  5924. .C(vcc),
  5925. .D(\macro_inst|ahb2apb_inst|haddr [15]),
  5926. .Cin(),
  5927. .Qin(\macro_inst|ahb2apb_inst|paddr [15]),
  5928. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ),
  5929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  5930. .SyncReset(),
  5931. .ShiftData(),
  5932. .SyncLoad(),
  5933. .LutOut(\macro_inst|ahb2apb_inst|paddr[15]~feeder_combout ),
  5934. .Cout(),
  5935. .Q(\macro_inst|ahb2apb_inst|paddr [15]));
  5936. defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_x = 16;
  5937. defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_y = 12;
  5938. defparam \macro_inst|ahb2apb_inst|paddr[15] .coord_z = 7;
  5939. defparam \macro_inst|ahb2apb_inst|paddr[15] .mask = 16'hFF00;
  5940. defparam \macro_inst|ahb2apb_inst|paddr[15] .modeMux = 1'b0;
  5941. defparam \macro_inst|ahb2apb_inst|paddr[15] .FeedbackMux = 1'b0;
  5942. defparam \macro_inst|ahb2apb_inst|paddr[15] .ShiftMux = 1'b0;
  5943. defparam \macro_inst|ahb2apb_inst|paddr[15] .BypassEn = 1'b0;
  5944. defparam \macro_inst|ahb2apb_inst|paddr[15] .CarryEnb = 1'b1;
  5945. alta_slice \macro_inst|ahb2apb_inst|paddr[1] (
  5946. .A(vcc),
  5947. .B(vcc),
  5948. .C(vcc),
  5949. .D(\macro_inst|ahb2apb_inst|haddr [1]),
  5950. .Cin(),
  5951. .Qin(\macro_inst|ahb2apb_inst|paddr [1]),
  5952. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  5953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  5954. .SyncReset(),
  5955. .ShiftData(),
  5956. .SyncLoad(),
  5957. .LutOut(\macro_inst|ahb2apb_inst|paddr[1]~feeder_combout ),
  5958. .Cout(),
  5959. .Q(\macro_inst|ahb2apb_inst|paddr [1]));
  5960. defparam \macro_inst|ahb2apb_inst|paddr[1] .coord_x = 14;
  5961. defparam \macro_inst|ahb2apb_inst|paddr[1] .coord_y = 12;
  5962. defparam \macro_inst|ahb2apb_inst|paddr[1] .coord_z = 5;
  5963. defparam \macro_inst|ahb2apb_inst|paddr[1] .mask = 16'hFF00;
  5964. defparam \macro_inst|ahb2apb_inst|paddr[1] .modeMux = 1'b0;
  5965. defparam \macro_inst|ahb2apb_inst|paddr[1] .FeedbackMux = 1'b0;
  5966. defparam \macro_inst|ahb2apb_inst|paddr[1] .ShiftMux = 1'b0;
  5967. defparam \macro_inst|ahb2apb_inst|paddr[1] .BypassEn = 1'b0;
  5968. defparam \macro_inst|ahb2apb_inst|paddr[1] .CarryEnb = 1'b1;
  5969. alta_slice \macro_inst|ahb2apb_inst|paddr[2] (
  5970. .A(vcc),
  5971. .B(vcc),
  5972. .C(vcc),
  5973. .D(\macro_inst|ahb2apb_inst|haddr [2]),
  5974. .Cin(),
  5975. .Qin(\macro_inst|ahb2apb_inst|paddr [2]),
  5976. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ),
  5977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  5978. .SyncReset(),
  5979. .ShiftData(),
  5980. .SyncLoad(),
  5981. .LutOut(\macro_inst|ahb2apb_inst|paddr[2]~feeder_combout ),
  5982. .Cout(),
  5983. .Q(\macro_inst|ahb2apb_inst|paddr [2]));
  5984. defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_x = 17;
  5985. defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_y = 12;
  5986. defparam \macro_inst|ahb2apb_inst|paddr[2] .coord_z = 9;
  5987. defparam \macro_inst|ahb2apb_inst|paddr[2] .mask = 16'hFF00;
  5988. defparam \macro_inst|ahb2apb_inst|paddr[2] .modeMux = 1'b0;
  5989. defparam \macro_inst|ahb2apb_inst|paddr[2] .FeedbackMux = 1'b0;
  5990. defparam \macro_inst|ahb2apb_inst|paddr[2] .ShiftMux = 1'b0;
  5991. defparam \macro_inst|ahb2apb_inst|paddr[2] .BypassEn = 1'b0;
  5992. defparam \macro_inst|ahb2apb_inst|paddr[2] .CarryEnb = 1'b1;
  5993. alta_slice \macro_inst|ahb2apb_inst|paddr[3] (
  5994. .A(\macro_inst|ahb2apb_inst|paddr [5]),
  5995. .B(vcc),
  5996. .C(\macro_inst|ahb2apb_inst|haddr [3]),
  5997. .D(\macro_inst|ahb2apb_inst|paddr [4]),
  5998. .Cin(),
  5999. .Qin(\macro_inst|ahb2apb_inst|paddr [3]),
  6000. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ),
  6001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  6002. .SyncReset(SyncReset_X60_Y10_GND),
  6003. .ShiftData(),
  6004. .SyncLoad(SyncLoad_X60_Y10_VCC),
  6005. .LutOut(\macro_inst|cfg_reg_inst|Equal10~1_combout ),
  6006. .Cout(),
  6007. .Q(\macro_inst|ahb2apb_inst|paddr [3]));
  6008. defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_x = 17;
  6009. defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_y = 12;
  6010. defparam \macro_inst|ahb2apb_inst|paddr[3] .coord_z = 4;
  6011. defparam \macro_inst|ahb2apb_inst|paddr[3] .mask = 16'h00A0;
  6012. defparam \macro_inst|ahb2apb_inst|paddr[3] .modeMux = 1'b0;
  6013. defparam \macro_inst|ahb2apb_inst|paddr[3] .FeedbackMux = 1'b1;
  6014. defparam \macro_inst|ahb2apb_inst|paddr[3] .ShiftMux = 1'b0;
  6015. defparam \macro_inst|ahb2apb_inst|paddr[3] .BypassEn = 1'b1;
  6016. defparam \macro_inst|ahb2apb_inst|paddr[3] .CarryEnb = 1'b1;
  6017. alta_slice \macro_inst|ahb2apb_inst|paddr[4] (
  6018. .A(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  6019. .B(\macro_inst|ahb2apb_inst|paddr [5]),
  6020. .C(\macro_inst|ahb2apb_inst|haddr [4]),
  6021. .D(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  6022. .Cin(),
  6023. .Qin(\macro_inst|ahb2apb_inst|paddr [4]),
  6024. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ),
  6025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  6026. .SyncReset(SyncReset_X60_Y10_GND),
  6027. .ShiftData(),
  6028. .SyncLoad(SyncLoad_X60_Y10_VCC),
  6029. .LutOut(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  6030. .Cout(),
  6031. .Q(\macro_inst|ahb2apb_inst|paddr [4]));
  6032. defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_x = 17;
  6033. defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_y = 12;
  6034. defparam \macro_inst|ahb2apb_inst|paddr[4] .coord_z = 14;
  6035. defparam \macro_inst|ahb2apb_inst|paddr[4] .mask = 16'h0200;
  6036. defparam \macro_inst|ahb2apb_inst|paddr[4] .modeMux = 1'b0;
  6037. defparam \macro_inst|ahb2apb_inst|paddr[4] .FeedbackMux = 1'b1;
  6038. defparam \macro_inst|ahb2apb_inst|paddr[4] .ShiftMux = 1'b0;
  6039. defparam \macro_inst|ahb2apb_inst|paddr[4] .BypassEn = 1'b1;
  6040. defparam \macro_inst|ahb2apb_inst|paddr[4] .CarryEnb = 1'b1;
  6041. alta_slice \macro_inst|ahb2apb_inst|paddr[5] (
  6042. .A(),
  6043. .B(),
  6044. .C(\macro_inst|ahb2apb_inst|haddr [5]),
  6045. .D(),
  6046. .Cin(),
  6047. .Qin(\macro_inst|ahb2apb_inst|paddr [5]),
  6048. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X60_Y10_SIG_SIG ),
  6049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  6050. .SyncReset(SyncReset_X60_Y10_GND),
  6051. .ShiftData(),
  6052. .SyncLoad(SyncLoad_X60_Y10_VCC),
  6053. .LutOut(),
  6054. .Cout(),
  6055. .Q(\macro_inst|ahb2apb_inst|paddr [5]));
  6056. defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_x = 17;
  6057. defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_y = 12;
  6058. defparam \macro_inst|ahb2apb_inst|paddr[5] .coord_z = 1;
  6059. defparam \macro_inst|ahb2apb_inst|paddr[5] .mask = 16'hFFFF;
  6060. defparam \macro_inst|ahb2apb_inst|paddr[5] .modeMux = 1'b1;
  6061. defparam \macro_inst|ahb2apb_inst|paddr[5] .FeedbackMux = 1'b0;
  6062. defparam \macro_inst|ahb2apb_inst|paddr[5] .ShiftMux = 1'b0;
  6063. defparam \macro_inst|ahb2apb_inst|paddr[5] .BypassEn = 1'b1;
  6064. defparam \macro_inst|ahb2apb_inst|paddr[5] .CarryEnb = 1'b1;
  6065. alta_slice \macro_inst|ahb2apb_inst|paddr[6] (
  6066. .A(vcc),
  6067. .B(vcc),
  6068. .C(vcc),
  6069. .D(\macro_inst|ahb2apb_inst|haddr [6]),
  6070. .Cin(),
  6071. .Qin(\macro_inst|ahb2apb_inst|paddr [6]),
  6072. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  6073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  6074. .SyncReset(),
  6075. .ShiftData(),
  6076. .SyncLoad(),
  6077. .LutOut(\macro_inst|ahb2apb_inst|paddr[6]~feeder_combout ),
  6078. .Cout(),
  6079. .Q(\macro_inst|ahb2apb_inst|paddr [6]));
  6080. defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_x = 14;
  6081. defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_y = 12;
  6082. defparam \macro_inst|ahb2apb_inst|paddr[6] .coord_z = 13;
  6083. defparam \macro_inst|ahb2apb_inst|paddr[6] .mask = 16'hFF00;
  6084. defparam \macro_inst|ahb2apb_inst|paddr[6] .modeMux = 1'b0;
  6085. defparam \macro_inst|ahb2apb_inst|paddr[6] .FeedbackMux = 1'b0;
  6086. defparam \macro_inst|ahb2apb_inst|paddr[6] .ShiftMux = 1'b0;
  6087. defparam \macro_inst|ahb2apb_inst|paddr[6] .BypassEn = 1'b0;
  6088. defparam \macro_inst|ahb2apb_inst|paddr[6] .CarryEnb = 1'b1;
  6089. alta_slice \macro_inst|ahb2apb_inst|paddr[7] (
  6090. .A(),
  6091. .B(),
  6092. .C(\macro_inst|ahb2apb_inst|haddr [7]),
  6093. .D(),
  6094. .Cin(),
  6095. .Qin(\macro_inst|ahb2apb_inst|paddr [7]),
  6096. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  6097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  6098. .SyncReset(SyncReset_X59_Y10_GND),
  6099. .ShiftData(),
  6100. .SyncLoad(SyncLoad_X59_Y10_VCC),
  6101. .LutOut(),
  6102. .Cout(),
  6103. .Q(\macro_inst|ahb2apb_inst|paddr [7]));
  6104. defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_x = 14;
  6105. defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_y = 12;
  6106. defparam \macro_inst|ahb2apb_inst|paddr[7] .coord_z = 14;
  6107. defparam \macro_inst|ahb2apb_inst|paddr[7] .mask = 16'hFFFF;
  6108. defparam \macro_inst|ahb2apb_inst|paddr[7] .modeMux = 1'b1;
  6109. defparam \macro_inst|ahb2apb_inst|paddr[7] .FeedbackMux = 1'b0;
  6110. defparam \macro_inst|ahb2apb_inst|paddr[7] .ShiftMux = 1'b0;
  6111. defparam \macro_inst|ahb2apb_inst|paddr[7] .BypassEn = 1'b1;
  6112. defparam \macro_inst|ahb2apb_inst|paddr[7] .CarryEnb = 1'b1;
  6113. alta_slice \macro_inst|ahb2apb_inst|paddr[8] (
  6114. .A(vcc),
  6115. .B(vcc),
  6116. .C(vcc),
  6117. .D(\macro_inst|ahb2apb_inst|haddr [8]),
  6118. .Cin(),
  6119. .Qin(\macro_inst|ahb2apb_inst|paddr [8]),
  6120. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  6121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  6122. .SyncReset(),
  6123. .ShiftData(),
  6124. .SyncLoad(),
  6125. .LutOut(\macro_inst|ahb2apb_inst|paddr[8]~feeder_combout ),
  6126. .Cout(),
  6127. .Q(\macro_inst|ahb2apb_inst|paddr [8]));
  6128. defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_x = 14;
  6129. defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_y = 12;
  6130. defparam \macro_inst|ahb2apb_inst|paddr[8] .coord_z = 9;
  6131. defparam \macro_inst|ahb2apb_inst|paddr[8] .mask = 16'hFF00;
  6132. defparam \macro_inst|ahb2apb_inst|paddr[8] .modeMux = 1'b0;
  6133. defparam \macro_inst|ahb2apb_inst|paddr[8] .FeedbackMux = 1'b0;
  6134. defparam \macro_inst|ahb2apb_inst|paddr[8] .ShiftMux = 1'b0;
  6135. defparam \macro_inst|ahb2apb_inst|paddr[8] .BypassEn = 1'b0;
  6136. defparam \macro_inst|ahb2apb_inst|paddr[8] .CarryEnb = 1'b1;
  6137. alta_slice \macro_inst|ahb2apb_inst|paddr[9] (
  6138. .A(),
  6139. .B(),
  6140. .C(\macro_inst|ahb2apb_inst|haddr [9]),
  6141. .D(),
  6142. .Cin(),
  6143. .Qin(\macro_inst|ahb2apb_inst|paddr [9]),
  6144. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y10_SIG_SIG ),
  6145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  6146. .SyncReset(SyncReset_X59_Y10_GND),
  6147. .ShiftData(),
  6148. .SyncLoad(SyncLoad_X59_Y10_VCC),
  6149. .LutOut(),
  6150. .Cout(),
  6151. .Q(\macro_inst|ahb2apb_inst|paddr [9]));
  6152. defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_x = 14;
  6153. defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_y = 12;
  6154. defparam \macro_inst|ahb2apb_inst|paddr[9] .coord_z = 6;
  6155. defparam \macro_inst|ahb2apb_inst|paddr[9] .mask = 16'hFFFF;
  6156. defparam \macro_inst|ahb2apb_inst|paddr[9] .modeMux = 1'b1;
  6157. defparam \macro_inst|ahb2apb_inst|paddr[9] .FeedbackMux = 1'b0;
  6158. defparam \macro_inst|ahb2apb_inst|paddr[9] .ShiftMux = 1'b0;
  6159. defparam \macro_inst|ahb2apb_inst|paddr[9] .BypassEn = 1'b1;
  6160. defparam \macro_inst|ahb2apb_inst|paddr[9] .CarryEnb = 1'b1;
  6161. alta_slice \macro_inst|ahb2apb_inst|pdone (
  6162. .A(\macro_inst|ahb2apb_inst|psel~q ),
  6163. .B(vcc),
  6164. .C(vcc),
  6165. .D(\macro_inst|ahb2apb_inst|penable~q ),
  6166. .Cin(),
  6167. .Qin(\macro_inst|ahb2apb_inst|pdone~q ),
  6168. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  6169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  6170. .SyncReset(),
  6171. .ShiftData(),
  6172. .SyncLoad(),
  6173. .LutOut(\macro_inst|ahb2apb_inst|pdone~0_combout ),
  6174. .Cout(),
  6175. .Q(\macro_inst|ahb2apb_inst|pdone~q ));
  6176. defparam \macro_inst|ahb2apb_inst|pdone .coord_x = 15;
  6177. defparam \macro_inst|ahb2apb_inst|pdone .coord_y = 12;
  6178. defparam \macro_inst|ahb2apb_inst|pdone .coord_z = 3;
  6179. defparam \macro_inst|ahb2apb_inst|pdone .mask = 16'h0A00;
  6180. defparam \macro_inst|ahb2apb_inst|pdone .modeMux = 1'b0;
  6181. defparam \macro_inst|ahb2apb_inst|pdone .FeedbackMux = 1'b1;
  6182. defparam \macro_inst|ahb2apb_inst|pdone .ShiftMux = 1'b0;
  6183. defparam \macro_inst|ahb2apb_inst|pdone .BypassEn = 1'b0;
  6184. defparam \macro_inst|ahb2apb_inst|pdone .CarryEnb = 1'b1;
  6185. alta_slice \macro_inst|ahb2apb_inst|penable (
  6186. .A(vcc),
  6187. .B(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
  6188. .C(vcc),
  6189. .D(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
  6190. .Cin(),
  6191. .Qin(\macro_inst|ahb2apb_inst|penable~q ),
  6192. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  6193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  6194. .SyncReset(),
  6195. .ShiftData(),
  6196. .SyncLoad(),
  6197. .LutOut(\macro_inst|ahb2apb_inst|Selector25~0_combout ),
  6198. .Cout(),
  6199. .Q(\macro_inst|ahb2apb_inst|penable~q ));
  6200. defparam \macro_inst|ahb2apb_inst|penable .coord_x = 15;
  6201. defparam \macro_inst|ahb2apb_inst|penable .coord_y = 12;
  6202. defparam \macro_inst|ahb2apb_inst|penable .coord_z = 9;
  6203. defparam \macro_inst|ahb2apb_inst|penable .mask = 16'hFF30;
  6204. defparam \macro_inst|ahb2apb_inst|penable .modeMux = 1'b0;
  6205. defparam \macro_inst|ahb2apb_inst|penable .FeedbackMux = 1'b1;
  6206. defparam \macro_inst|ahb2apb_inst|penable .ShiftMux = 1'b0;
  6207. defparam \macro_inst|ahb2apb_inst|penable .BypassEn = 1'b0;
  6208. defparam \macro_inst|ahb2apb_inst|penable .CarryEnb = 1'b1;
  6209. alta_slice \macro_inst|ahb2apb_inst|prdata[0] (
  6210. .A(\macro_inst|pr_select [2]),
  6211. .B(\macro_inst|trig_ctrl_inst|prdata [0]),
  6212. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [9]),
  6213. .D(\macro_inst|cfg_reg_inst|prdata [0]),
  6214. .Cin(),
  6215. .Qin(\macro_inst|ahb2apb_inst|prdata [0]),
  6216. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6218. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6219. .ShiftData(),
  6220. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6221. .LutOut(\macro_inst|ahb2apb_inst|prdata[0]~0_combout ),
  6222. .Cout(),
  6223. .Q(\macro_inst|ahb2apb_inst|prdata [0]));
  6224. defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_x = 17;
  6225. defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_y = 11;
  6226. defparam \macro_inst|ahb2apb_inst|prdata[0] .coord_z = 3;
  6227. defparam \macro_inst|ahb2apb_inst|prdata[0] .mask = 16'hDD88;
  6228. defparam \macro_inst|ahb2apb_inst|prdata[0] .modeMux = 1'b0;
  6229. defparam \macro_inst|ahb2apb_inst|prdata[0] .FeedbackMux = 1'b0;
  6230. defparam \macro_inst|ahb2apb_inst|prdata[0] .ShiftMux = 1'b0;
  6231. defparam \macro_inst|ahb2apb_inst|prdata[0] .BypassEn = 1'b1;
  6232. defparam \macro_inst|ahb2apb_inst|prdata[0] .CarryEnb = 1'b1;
  6233. alta_slice \macro_inst|ahb2apb_inst|prdata[10] (
  6234. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [10]),
  6235. .B(\macro_inst|cfg_reg_inst|prdata [10]),
  6236. .C(\macro_inst|apb_prdata[10]~0_combout ),
  6237. .D(\macro_inst|mem_apb_psel~combout ),
  6238. .Cin(),
  6239. .Qin(\macro_inst|ahb2apb_inst|prdata [10]),
  6240. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6242. .SyncReset(),
  6243. .ShiftData(),
  6244. .SyncLoad(),
  6245. .LutOut(\macro_inst|apb_prdata[10]~1_combout ),
  6246. .Cout(),
  6247. .Q(\macro_inst|ahb2apb_inst|prdata [10]));
  6248. defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_x = 14;
  6249. defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_y = 11;
  6250. defparam \macro_inst|ahb2apb_inst|prdata[10] .coord_z = 15;
  6251. defparam \macro_inst|ahb2apb_inst|prdata[10] .mask = 16'hA0C0;
  6252. defparam \macro_inst|ahb2apb_inst|prdata[10] .modeMux = 1'b0;
  6253. defparam \macro_inst|ahb2apb_inst|prdata[10] .FeedbackMux = 1'b0;
  6254. defparam \macro_inst|ahb2apb_inst|prdata[10] .ShiftMux = 1'b0;
  6255. defparam \macro_inst|ahb2apb_inst|prdata[10] .BypassEn = 1'b0;
  6256. defparam \macro_inst|ahb2apb_inst|prdata[10] .CarryEnb = 1'b1;
  6257. alta_slice \macro_inst|ahb2apb_inst|prdata[11] (
  6258. .A(\macro_inst|cfg_reg_inst|prdata [11]),
  6259. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [11]),
  6260. .C(\macro_inst|apb_prdata[10]~0_combout ),
  6261. .D(\macro_inst|mem_apb_psel~combout ),
  6262. .Cin(),
  6263. .Qin(\macro_inst|ahb2apb_inst|prdata [11]),
  6264. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6266. .SyncReset(),
  6267. .ShiftData(),
  6268. .SyncLoad(),
  6269. .LutOut(\macro_inst|apb_prdata[11]~2_combout ),
  6270. .Cout(),
  6271. .Q(\macro_inst|ahb2apb_inst|prdata [11]));
  6272. defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_x = 14;
  6273. defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_y = 11;
  6274. defparam \macro_inst|ahb2apb_inst|prdata[11] .coord_z = 12;
  6275. defparam \macro_inst|ahb2apb_inst|prdata[11] .mask = 16'hC0A0;
  6276. defparam \macro_inst|ahb2apb_inst|prdata[11] .modeMux = 1'b0;
  6277. defparam \macro_inst|ahb2apb_inst|prdata[11] .FeedbackMux = 1'b0;
  6278. defparam \macro_inst|ahb2apb_inst|prdata[11] .ShiftMux = 1'b0;
  6279. defparam \macro_inst|ahb2apb_inst|prdata[11] .BypassEn = 1'b0;
  6280. defparam \macro_inst|ahb2apb_inst|prdata[11] .CarryEnb = 1'b1;
  6281. alta_slice \macro_inst|ahb2apb_inst|prdata[12] (
  6282. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [12]),
  6283. .B(\macro_inst|mem_apb_psel~combout ),
  6284. .C(\macro_inst|apb_prdata[10]~0_combout ),
  6285. .D(\macro_inst|cfg_reg_inst|prdata [12]),
  6286. .Cin(),
  6287. .Qin(\macro_inst|ahb2apb_inst|prdata [12]),
  6288. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6290. .SyncReset(),
  6291. .ShiftData(),
  6292. .SyncLoad(),
  6293. .LutOut(\macro_inst|apb_prdata[12]~3_combout ),
  6294. .Cout(),
  6295. .Q(\macro_inst|ahb2apb_inst|prdata [12]));
  6296. defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_x = 14;
  6297. defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_y = 11;
  6298. defparam \macro_inst|ahb2apb_inst|prdata[12] .coord_z = 3;
  6299. defparam \macro_inst|ahb2apb_inst|prdata[12] .mask = 16'hB080;
  6300. defparam \macro_inst|ahb2apb_inst|prdata[12] .modeMux = 1'b0;
  6301. defparam \macro_inst|ahb2apb_inst|prdata[12] .FeedbackMux = 1'b0;
  6302. defparam \macro_inst|ahb2apb_inst|prdata[12] .ShiftMux = 1'b0;
  6303. defparam \macro_inst|ahb2apb_inst|prdata[12] .BypassEn = 1'b0;
  6304. defparam \macro_inst|ahb2apb_inst|prdata[12] .CarryEnb = 1'b1;
  6305. alta_slice \macro_inst|ahb2apb_inst|prdata[13] (
  6306. .A(\macro_inst|apb_prdata[10]~0_combout ),
  6307. .B(\macro_inst|cfg_reg_inst|prdata [13]),
  6308. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [13]),
  6309. .D(\macro_inst|mem_apb_psel~combout ),
  6310. .Cin(),
  6311. .Qin(\macro_inst|ahb2apb_inst|prdata [13]),
  6312. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6314. .SyncReset(),
  6315. .ShiftData(),
  6316. .SyncLoad(),
  6317. .LutOut(\macro_inst|apb_prdata[13]~4_combout ),
  6318. .Cout(),
  6319. .Q(\macro_inst|ahb2apb_inst|prdata [13]));
  6320. defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_x = 14;
  6321. defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_y = 11;
  6322. defparam \macro_inst|ahb2apb_inst|prdata[13] .coord_z = 4;
  6323. defparam \macro_inst|ahb2apb_inst|prdata[13] .mask = 16'hA088;
  6324. defparam \macro_inst|ahb2apb_inst|prdata[13] .modeMux = 1'b0;
  6325. defparam \macro_inst|ahb2apb_inst|prdata[13] .FeedbackMux = 1'b0;
  6326. defparam \macro_inst|ahb2apb_inst|prdata[13] .ShiftMux = 1'b0;
  6327. defparam \macro_inst|ahb2apb_inst|prdata[13] .BypassEn = 1'b0;
  6328. defparam \macro_inst|ahb2apb_inst|prdata[13] .CarryEnb = 1'b1;
  6329. alta_slice \macro_inst|ahb2apb_inst|prdata[14] (
  6330. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [14]),
  6331. .B(\macro_inst|cfg_reg_inst|prdata [14]),
  6332. .C(\macro_inst|apb_prdata[10]~0_combout ),
  6333. .D(\macro_inst|mem_apb_psel~combout ),
  6334. .Cin(),
  6335. .Qin(\macro_inst|ahb2apb_inst|prdata [14]),
  6336. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6338. .SyncReset(),
  6339. .ShiftData(),
  6340. .SyncLoad(),
  6341. .LutOut(\macro_inst|apb_prdata[14]~5_combout ),
  6342. .Cout(),
  6343. .Q(\macro_inst|ahb2apb_inst|prdata [14]));
  6344. defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_x = 14;
  6345. defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_y = 11;
  6346. defparam \macro_inst|ahb2apb_inst|prdata[14] .coord_z = 8;
  6347. defparam \macro_inst|ahb2apb_inst|prdata[14] .mask = 16'hA0C0;
  6348. defparam \macro_inst|ahb2apb_inst|prdata[14] .modeMux = 1'b0;
  6349. defparam \macro_inst|ahb2apb_inst|prdata[14] .FeedbackMux = 1'b0;
  6350. defparam \macro_inst|ahb2apb_inst|prdata[14] .ShiftMux = 1'b0;
  6351. defparam \macro_inst|ahb2apb_inst|prdata[14] .BypassEn = 1'b0;
  6352. defparam \macro_inst|ahb2apb_inst|prdata[14] .CarryEnb = 1'b1;
  6353. alta_slice \macro_inst|ahb2apb_inst|prdata[14]~12 (
  6354. .A(\macro_inst|pr_select [1]),
  6355. .B(\macro_inst|pr_select [0]),
  6356. .C(\macro_inst|pr_select [2]),
  6357. .D(\macro_inst|pr_select [3]),
  6358. .Cin(),
  6359. .Qin(),
  6360. .Clk(),
  6361. .AsyncReset(),
  6362. .SyncReset(),
  6363. .ShiftData(),
  6364. .SyncLoad(),
  6365. .LutOut(\macro_inst|ahb2apb_inst|prdata[14]~12_combout ),
  6366. .Cout(),
  6367. .Q());
  6368. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .coord_x = 15;
  6369. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .coord_y = 12;
  6370. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .coord_z = 11;
  6371. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .mask = 16'hFFFD;
  6372. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .modeMux = 1'b0;
  6373. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .FeedbackMux = 1'b0;
  6374. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .ShiftMux = 1'b0;
  6375. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .BypassEn = 1'b0;
  6376. defparam \macro_inst|ahb2apb_inst|prdata[14]~12 .CarryEnb = 1'b1;
  6377. alta_slice \macro_inst|ahb2apb_inst|prdata[15] (
  6378. .A(\macro_inst|apb_prdata[10]~0_combout ),
  6379. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [15]),
  6380. .C(\macro_inst|cfg_reg_inst|prdata [15]),
  6381. .D(\macro_inst|mem_apb_psel~combout ),
  6382. .Cin(),
  6383. .Qin(\macro_inst|ahb2apb_inst|prdata [15]),
  6384. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6386. .SyncReset(),
  6387. .ShiftData(),
  6388. .SyncLoad(),
  6389. .LutOut(\macro_inst|apb_prdata[15]~6_combout ),
  6390. .Cout(),
  6391. .Q(\macro_inst|ahb2apb_inst|prdata [15]));
  6392. defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_x = 14;
  6393. defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_y = 11;
  6394. defparam \macro_inst|ahb2apb_inst|prdata[15] .coord_z = 5;
  6395. defparam \macro_inst|ahb2apb_inst|prdata[15] .mask = 16'h88A0;
  6396. defparam \macro_inst|ahb2apb_inst|prdata[15] .modeMux = 1'b0;
  6397. defparam \macro_inst|ahb2apb_inst|prdata[15] .FeedbackMux = 1'b0;
  6398. defparam \macro_inst|ahb2apb_inst|prdata[15] .ShiftMux = 1'b0;
  6399. defparam \macro_inst|ahb2apb_inst|prdata[15] .BypassEn = 1'b0;
  6400. defparam \macro_inst|ahb2apb_inst|prdata[15] .CarryEnb = 1'b1;
  6401. alta_slice \macro_inst|ahb2apb_inst|prdata[16] (
  6402. .A(\macro_inst|cfg_reg_inst|prdata [16]),
  6403. .B(\macro_inst|mem_apb_psel~combout ),
  6404. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [9]),
  6405. .D(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6406. .Cin(),
  6407. .Qin(\macro_inst|ahb2apb_inst|prdata [16]),
  6408. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6410. .SyncReset(),
  6411. .ShiftData(),
  6412. .SyncLoad(),
  6413. .LutOut(\macro_inst|apb_prdata[16]~7_combout ),
  6414. .Cout(),
  6415. .Q(\macro_inst|ahb2apb_inst|prdata [16]));
  6416. defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_x = 15;
  6417. defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_y = 11;
  6418. defparam \macro_inst|ahb2apb_inst|prdata[16] .coord_z = 4;
  6419. defparam \macro_inst|ahb2apb_inst|prdata[16] .mask = 16'h00E2;
  6420. defparam \macro_inst|ahb2apb_inst|prdata[16] .modeMux = 1'b0;
  6421. defparam \macro_inst|ahb2apb_inst|prdata[16] .FeedbackMux = 1'b0;
  6422. defparam \macro_inst|ahb2apb_inst|prdata[16] .ShiftMux = 1'b0;
  6423. defparam \macro_inst|ahb2apb_inst|prdata[16] .BypassEn = 1'b0;
  6424. defparam \macro_inst|ahb2apb_inst|prdata[16] .CarryEnb = 1'b1;
  6425. alta_slice \macro_inst|ahb2apb_inst|prdata[17] (
  6426. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [10]),
  6427. .B(\macro_inst|mem_apb_psel~combout ),
  6428. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6429. .D(\macro_inst|cfg_reg_inst|prdata [17]),
  6430. .Cin(),
  6431. .Qin(\macro_inst|ahb2apb_inst|prdata [17]),
  6432. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6434. .SyncReset(),
  6435. .ShiftData(),
  6436. .SyncLoad(),
  6437. .LutOut(\macro_inst|apb_prdata[17]~8_combout ),
  6438. .Cout(),
  6439. .Q(\macro_inst|ahb2apb_inst|prdata [17]));
  6440. defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_x = 17;
  6441. defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_y = 11;
  6442. defparam \macro_inst|ahb2apb_inst|prdata[17] .coord_z = 2;
  6443. defparam \macro_inst|ahb2apb_inst|prdata[17] .mask = 16'h0B08;
  6444. defparam \macro_inst|ahb2apb_inst|prdata[17] .modeMux = 1'b0;
  6445. defparam \macro_inst|ahb2apb_inst|prdata[17] .FeedbackMux = 1'b0;
  6446. defparam \macro_inst|ahb2apb_inst|prdata[17] .ShiftMux = 1'b0;
  6447. defparam \macro_inst|ahb2apb_inst|prdata[17] .BypassEn = 1'b0;
  6448. defparam \macro_inst|ahb2apb_inst|prdata[17] .CarryEnb = 1'b1;
  6449. alta_slice \macro_inst|ahb2apb_inst|prdata[18] (
  6450. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [11]),
  6451. .B(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6452. .C(\macro_inst|mem_apb_psel~combout ),
  6453. .D(\macro_inst|cfg_reg_inst|prdata [18]),
  6454. .Cin(),
  6455. .Qin(\macro_inst|ahb2apb_inst|prdata [18]),
  6456. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6458. .SyncReset(),
  6459. .ShiftData(),
  6460. .SyncLoad(),
  6461. .LutOut(\macro_inst|apb_prdata[18]~9_combout ),
  6462. .Cout(),
  6463. .Q(\macro_inst|ahb2apb_inst|prdata [18]));
  6464. defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_x = 15;
  6465. defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_y = 11;
  6466. defparam \macro_inst|ahb2apb_inst|prdata[18] .coord_z = 3;
  6467. defparam \macro_inst|ahb2apb_inst|prdata[18] .mask = 16'h2320;
  6468. defparam \macro_inst|ahb2apb_inst|prdata[18] .modeMux = 1'b0;
  6469. defparam \macro_inst|ahb2apb_inst|prdata[18] .FeedbackMux = 1'b0;
  6470. defparam \macro_inst|ahb2apb_inst|prdata[18] .ShiftMux = 1'b0;
  6471. defparam \macro_inst|ahb2apb_inst|prdata[18] .BypassEn = 1'b0;
  6472. defparam \macro_inst|ahb2apb_inst|prdata[18] .CarryEnb = 1'b1;
  6473. alta_slice \macro_inst|ahb2apb_inst|prdata[19] (
  6474. .A(\macro_inst|mem_apb_psel~combout ),
  6475. .B(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6476. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [12]),
  6477. .D(\macro_inst|cfg_reg_inst|prdata [19]),
  6478. .Cin(),
  6479. .Qin(\macro_inst|ahb2apb_inst|prdata [19]),
  6480. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6482. .SyncReset(),
  6483. .ShiftData(),
  6484. .SyncLoad(),
  6485. .LutOut(\macro_inst|apb_prdata[19]~10_combout ),
  6486. .Cout(),
  6487. .Q(\macro_inst|ahb2apb_inst|prdata [19]));
  6488. defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_x = 15;
  6489. defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_y = 11;
  6490. defparam \macro_inst|ahb2apb_inst|prdata[19] .coord_z = 0;
  6491. defparam \macro_inst|ahb2apb_inst|prdata[19] .mask = 16'h3120;
  6492. defparam \macro_inst|ahb2apb_inst|prdata[19] .modeMux = 1'b0;
  6493. defparam \macro_inst|ahb2apb_inst|prdata[19] .FeedbackMux = 1'b0;
  6494. defparam \macro_inst|ahb2apb_inst|prdata[19] .ShiftMux = 1'b0;
  6495. defparam \macro_inst|ahb2apb_inst|prdata[19] .BypassEn = 1'b0;
  6496. defparam \macro_inst|ahb2apb_inst|prdata[19] .CarryEnb = 1'b1;
  6497. alta_slice \macro_inst|ahb2apb_inst|prdata[1] (
  6498. .A(\macro_inst|pr_select [2]),
  6499. .B(\macro_inst|trig_ctrl_inst|prdata [1]),
  6500. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [10]),
  6501. .D(\macro_inst|cfg_reg_inst|prdata [1]),
  6502. .Cin(),
  6503. .Qin(\macro_inst|ahb2apb_inst|prdata [1]),
  6504. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6506. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6507. .ShiftData(),
  6508. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6509. .LutOut(\macro_inst|ahb2apb_inst|prdata[1]~1_combout ),
  6510. .Cout(),
  6511. .Q(\macro_inst|ahb2apb_inst|prdata [1]));
  6512. defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_x = 17;
  6513. defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_y = 11;
  6514. defparam \macro_inst|ahb2apb_inst|prdata[1] .coord_z = 6;
  6515. defparam \macro_inst|ahb2apb_inst|prdata[1] .mask = 16'hDD88;
  6516. defparam \macro_inst|ahb2apb_inst|prdata[1] .modeMux = 1'b0;
  6517. defparam \macro_inst|ahb2apb_inst|prdata[1] .FeedbackMux = 1'b0;
  6518. defparam \macro_inst|ahb2apb_inst|prdata[1] .ShiftMux = 1'b0;
  6519. defparam \macro_inst|ahb2apb_inst|prdata[1] .BypassEn = 1'b1;
  6520. defparam \macro_inst|ahb2apb_inst|prdata[1] .CarryEnb = 1'b1;
  6521. alta_slice \macro_inst|ahb2apb_inst|prdata[20] (
  6522. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [13]),
  6523. .B(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6524. .C(\macro_inst|mem_apb_psel~combout ),
  6525. .D(\macro_inst|cfg_reg_inst|prdata [20]),
  6526. .Cin(),
  6527. .Qin(\macro_inst|ahb2apb_inst|prdata [20]),
  6528. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6530. .SyncReset(),
  6531. .ShiftData(),
  6532. .SyncLoad(),
  6533. .LutOut(\macro_inst|apb_prdata[20]~11_combout ),
  6534. .Cout(),
  6535. .Q(\macro_inst|ahb2apb_inst|prdata [20]));
  6536. defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_x = 15;
  6537. defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_y = 11;
  6538. defparam \macro_inst|ahb2apb_inst|prdata[20] .coord_z = 13;
  6539. defparam \macro_inst|ahb2apb_inst|prdata[20] .mask = 16'h2320;
  6540. defparam \macro_inst|ahb2apb_inst|prdata[20] .modeMux = 1'b0;
  6541. defparam \macro_inst|ahb2apb_inst|prdata[20] .FeedbackMux = 1'b0;
  6542. defparam \macro_inst|ahb2apb_inst|prdata[20] .ShiftMux = 1'b0;
  6543. defparam \macro_inst|ahb2apb_inst|prdata[20] .BypassEn = 1'b0;
  6544. defparam \macro_inst|ahb2apb_inst|prdata[20] .CarryEnb = 1'b1;
  6545. alta_slice \macro_inst|ahb2apb_inst|prdata[21] (
  6546. .A(\macro_inst|cfg_reg_inst|prdata [21]),
  6547. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [14]),
  6548. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6549. .D(\macro_inst|mem_apb_psel~combout ),
  6550. .Cin(),
  6551. .Qin(\macro_inst|ahb2apb_inst|prdata [21]),
  6552. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6554. .SyncReset(),
  6555. .ShiftData(),
  6556. .SyncLoad(),
  6557. .LutOut(\macro_inst|apb_prdata[21]~12_combout ),
  6558. .Cout(),
  6559. .Q(\macro_inst|ahb2apb_inst|prdata [21]));
  6560. defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_x = 14;
  6561. defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_y = 11;
  6562. defparam \macro_inst|ahb2apb_inst|prdata[21] .coord_z = 2;
  6563. defparam \macro_inst|ahb2apb_inst|prdata[21] .mask = 16'h0C0A;
  6564. defparam \macro_inst|ahb2apb_inst|prdata[21] .modeMux = 1'b0;
  6565. defparam \macro_inst|ahb2apb_inst|prdata[21] .FeedbackMux = 1'b0;
  6566. defparam \macro_inst|ahb2apb_inst|prdata[21] .ShiftMux = 1'b0;
  6567. defparam \macro_inst|ahb2apb_inst|prdata[21] .BypassEn = 1'b0;
  6568. defparam \macro_inst|ahb2apb_inst|prdata[21] .CarryEnb = 1'b1;
  6569. alta_slice \macro_inst|ahb2apb_inst|prdata[22] (
  6570. .A(\macro_inst|cfg_reg_inst|prdata [22]),
  6571. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [15]),
  6572. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6573. .D(\macro_inst|mem_apb_psel~combout ),
  6574. .Cin(),
  6575. .Qin(\macro_inst|ahb2apb_inst|prdata [22]),
  6576. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6578. .SyncReset(),
  6579. .ShiftData(),
  6580. .SyncLoad(),
  6581. .LutOut(\macro_inst|apb_prdata[22]~13_combout ),
  6582. .Cout(),
  6583. .Q(\macro_inst|ahb2apb_inst|prdata [22]));
  6584. defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_x = 17;
  6585. defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_y = 11;
  6586. defparam \macro_inst|ahb2apb_inst|prdata[22] .coord_z = 9;
  6587. defparam \macro_inst|ahb2apb_inst|prdata[22] .mask = 16'h0C0A;
  6588. defparam \macro_inst|ahb2apb_inst|prdata[22] .modeMux = 1'b0;
  6589. defparam \macro_inst|ahb2apb_inst|prdata[22] .FeedbackMux = 1'b0;
  6590. defparam \macro_inst|ahb2apb_inst|prdata[22] .ShiftMux = 1'b0;
  6591. defparam \macro_inst|ahb2apb_inst|prdata[22] .BypassEn = 1'b0;
  6592. defparam \macro_inst|ahb2apb_inst|prdata[22] .CarryEnb = 1'b1;
  6593. alta_slice \macro_inst|ahb2apb_inst|prdata[23] (
  6594. .A(\macro_inst|cfg_reg_inst|prdata [23]),
  6595. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [16]),
  6596. .C(\macro_inst|mem_apb_psel~combout ),
  6597. .D(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6598. .Cin(),
  6599. .Qin(\macro_inst|ahb2apb_inst|prdata [23]),
  6600. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6602. .SyncReset(),
  6603. .ShiftData(),
  6604. .SyncLoad(),
  6605. .LutOut(\macro_inst|apb_prdata[23]~14_combout ),
  6606. .Cout(),
  6607. .Q(\macro_inst|ahb2apb_inst|prdata [23]));
  6608. defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_x = 15;
  6609. defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_y = 11;
  6610. defparam \macro_inst|ahb2apb_inst|prdata[23] .coord_z = 11;
  6611. defparam \macro_inst|ahb2apb_inst|prdata[23] .mask = 16'h00CA;
  6612. defparam \macro_inst|ahb2apb_inst|prdata[23] .modeMux = 1'b0;
  6613. defparam \macro_inst|ahb2apb_inst|prdata[23] .FeedbackMux = 1'b0;
  6614. defparam \macro_inst|ahb2apb_inst|prdata[23] .ShiftMux = 1'b0;
  6615. defparam \macro_inst|ahb2apb_inst|prdata[23] .BypassEn = 1'b0;
  6616. defparam \macro_inst|ahb2apb_inst|prdata[23] .CarryEnb = 1'b1;
  6617. alta_slice \macro_inst|ahb2apb_inst|prdata[24] (
  6618. .A(\macro_inst|cfg_reg_inst|prdata [24]),
  6619. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [7]),
  6620. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6621. .D(\macro_inst|mem_apb_psel~combout ),
  6622. .Cin(),
  6623. .Qin(\macro_inst|ahb2apb_inst|prdata [24]),
  6624. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y12_SIG_SIG ),
  6625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  6626. .SyncReset(),
  6627. .ShiftData(),
  6628. .SyncLoad(),
  6629. .LutOut(\macro_inst|apb_prdata[24]~15_combout ),
  6630. .Cout(),
  6631. .Q(\macro_inst|ahb2apb_inst|prdata [24]));
  6632. defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_x = 14;
  6633. defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_y = 8;
  6634. defparam \macro_inst|ahb2apb_inst|prdata[24] .coord_z = 7;
  6635. defparam \macro_inst|ahb2apb_inst|prdata[24] .mask = 16'h0C0A;
  6636. defparam \macro_inst|ahb2apb_inst|prdata[24] .modeMux = 1'b0;
  6637. defparam \macro_inst|ahb2apb_inst|prdata[24] .FeedbackMux = 1'b0;
  6638. defparam \macro_inst|ahb2apb_inst|prdata[24] .ShiftMux = 1'b0;
  6639. defparam \macro_inst|ahb2apb_inst|prdata[24] .BypassEn = 1'b0;
  6640. defparam \macro_inst|ahb2apb_inst|prdata[24] .CarryEnb = 1'b1;
  6641. alta_slice \macro_inst|ahb2apb_inst|prdata[25] (
  6642. .A(\macro_inst|mem_apb_psel~combout ),
  6643. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [9]),
  6644. .C(\macro_inst|cfg_reg_inst|prdata [25]),
  6645. .D(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6646. .Cin(),
  6647. .Qin(\macro_inst|ahb2apb_inst|prdata [25]),
  6648. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6650. .SyncReset(),
  6651. .ShiftData(),
  6652. .SyncLoad(),
  6653. .LutOut(\macro_inst|apb_prdata[25]~16_combout ),
  6654. .Cout(),
  6655. .Q(\macro_inst|ahb2apb_inst|prdata [25]));
  6656. defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_x = 15;
  6657. defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_y = 11;
  6658. defparam \macro_inst|ahb2apb_inst|prdata[25] .coord_z = 15;
  6659. defparam \macro_inst|ahb2apb_inst|prdata[25] .mask = 16'h00D8;
  6660. defparam \macro_inst|ahb2apb_inst|prdata[25] .modeMux = 1'b0;
  6661. defparam \macro_inst|ahb2apb_inst|prdata[25] .FeedbackMux = 1'b0;
  6662. defparam \macro_inst|ahb2apb_inst|prdata[25] .ShiftMux = 1'b0;
  6663. defparam \macro_inst|ahb2apb_inst|prdata[25] .BypassEn = 1'b0;
  6664. defparam \macro_inst|ahb2apb_inst|prdata[25] .CarryEnb = 1'b1;
  6665. alta_slice \macro_inst|ahb2apb_inst|prdata[26] (
  6666. .A(\macro_inst|cfg_reg_inst|prdata [26]),
  6667. .B(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6668. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [10]),
  6669. .D(\macro_inst|mem_apb_psel~combout ),
  6670. .Cin(),
  6671. .Qin(\macro_inst|ahb2apb_inst|prdata [26]),
  6672. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6674. .SyncReset(),
  6675. .ShiftData(),
  6676. .SyncLoad(),
  6677. .LutOut(\macro_inst|apb_prdata[26]~17_combout ),
  6678. .Cout(),
  6679. .Q(\macro_inst|ahb2apb_inst|prdata [26]));
  6680. defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_x = 14;
  6681. defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_y = 11;
  6682. defparam \macro_inst|ahb2apb_inst|prdata[26] .coord_z = 7;
  6683. defparam \macro_inst|ahb2apb_inst|prdata[26] .mask = 16'h3022;
  6684. defparam \macro_inst|ahb2apb_inst|prdata[26] .modeMux = 1'b0;
  6685. defparam \macro_inst|ahb2apb_inst|prdata[26] .FeedbackMux = 1'b0;
  6686. defparam \macro_inst|ahb2apb_inst|prdata[26] .ShiftMux = 1'b0;
  6687. defparam \macro_inst|ahb2apb_inst|prdata[26] .BypassEn = 1'b0;
  6688. defparam \macro_inst|ahb2apb_inst|prdata[26] .CarryEnb = 1'b1;
  6689. alta_slice \macro_inst|ahb2apb_inst|prdata[27] (
  6690. .A(\macro_inst|cfg_reg_inst|prdata [27]),
  6691. .B(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [11]),
  6692. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6693. .D(\macro_inst|mem_apb_psel~combout ),
  6694. .Cin(),
  6695. .Qin(\macro_inst|ahb2apb_inst|prdata [27]),
  6696. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6698. .SyncReset(),
  6699. .ShiftData(),
  6700. .SyncLoad(),
  6701. .LutOut(\macro_inst|apb_prdata[27]~18_combout ),
  6702. .Cout(),
  6703. .Q(\macro_inst|ahb2apb_inst|prdata [27]));
  6704. defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_x = 14;
  6705. defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_y = 11;
  6706. defparam \macro_inst|ahb2apb_inst|prdata[27] .coord_z = 11;
  6707. defparam \macro_inst|ahb2apb_inst|prdata[27] .mask = 16'h0C0A;
  6708. defparam \macro_inst|ahb2apb_inst|prdata[27] .modeMux = 1'b0;
  6709. defparam \macro_inst|ahb2apb_inst|prdata[27] .FeedbackMux = 1'b0;
  6710. defparam \macro_inst|ahb2apb_inst|prdata[27] .ShiftMux = 1'b0;
  6711. defparam \macro_inst|ahb2apb_inst|prdata[27] .BypassEn = 1'b0;
  6712. defparam \macro_inst|ahb2apb_inst|prdata[27] .CarryEnb = 1'b1;
  6713. alta_slice \macro_inst|ahb2apb_inst|prdata[28] (
  6714. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [12]),
  6715. .B(\macro_inst|cfg_reg_inst|prdata [28]),
  6716. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6717. .D(\macro_inst|mem_apb_psel~combout ),
  6718. .Cin(),
  6719. .Qin(\macro_inst|ahb2apb_inst|prdata [28]),
  6720. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6722. .SyncReset(),
  6723. .ShiftData(),
  6724. .SyncLoad(),
  6725. .LutOut(\macro_inst|apb_prdata[28]~19_combout ),
  6726. .Cout(),
  6727. .Q(\macro_inst|ahb2apb_inst|prdata [28]));
  6728. defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_x = 14;
  6729. defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_y = 11;
  6730. defparam \macro_inst|ahb2apb_inst|prdata[28] .coord_z = 6;
  6731. defparam \macro_inst|ahb2apb_inst|prdata[28] .mask = 16'h0A0C;
  6732. defparam \macro_inst|ahb2apb_inst|prdata[28] .modeMux = 1'b0;
  6733. defparam \macro_inst|ahb2apb_inst|prdata[28] .FeedbackMux = 1'b0;
  6734. defparam \macro_inst|ahb2apb_inst|prdata[28] .ShiftMux = 1'b0;
  6735. defparam \macro_inst|ahb2apb_inst|prdata[28] .BypassEn = 1'b0;
  6736. defparam \macro_inst|ahb2apb_inst|prdata[28] .CarryEnb = 1'b1;
  6737. alta_slice \macro_inst|ahb2apb_inst|prdata[29] (
  6738. .A(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6739. .B(\macro_inst|cfg_reg_inst|prdata [29]),
  6740. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [13]),
  6741. .D(\macro_inst|mem_apb_psel~combout ),
  6742. .Cin(),
  6743. .Qin(\macro_inst|ahb2apb_inst|prdata [29]),
  6744. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6746. .SyncReset(),
  6747. .ShiftData(),
  6748. .SyncLoad(),
  6749. .LutOut(\macro_inst|apb_prdata[29]~20_combout ),
  6750. .Cout(),
  6751. .Q(\macro_inst|ahb2apb_inst|prdata [29]));
  6752. defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_x = 14;
  6753. defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_y = 11;
  6754. defparam \macro_inst|ahb2apb_inst|prdata[29] .coord_z = 1;
  6755. defparam \macro_inst|ahb2apb_inst|prdata[29] .mask = 16'h5044;
  6756. defparam \macro_inst|ahb2apb_inst|prdata[29] .modeMux = 1'b0;
  6757. defparam \macro_inst|ahb2apb_inst|prdata[29] .FeedbackMux = 1'b0;
  6758. defparam \macro_inst|ahb2apb_inst|prdata[29] .ShiftMux = 1'b0;
  6759. defparam \macro_inst|ahb2apb_inst|prdata[29] .BypassEn = 1'b0;
  6760. defparam \macro_inst|ahb2apb_inst|prdata[29] .CarryEnb = 1'b1;
  6761. alta_slice \macro_inst|ahb2apb_inst|prdata[29]~13 (
  6762. .A(\macro_inst|ahb2apb_inst|prdata[14]~12_combout ),
  6763. .B(\macro_inst|mem_apb_psel~0_combout ),
  6764. .C(\macro_inst|ahb2apb_inst|paddr [1]),
  6765. .D(\macro_inst|ahb2apb_inst|paddr [14]),
  6766. .Cin(),
  6767. .Qin(),
  6768. .Clk(),
  6769. .AsyncReset(),
  6770. .SyncReset(),
  6771. .ShiftData(),
  6772. .SyncLoad(),
  6773. .LutOut(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6774. .Cout(),
  6775. .Q());
  6776. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .coord_x = 16;
  6777. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .coord_y = 9;
  6778. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .coord_z = 5;
  6779. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .mask = 16'h2EAA;
  6780. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .modeMux = 1'b0;
  6781. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .FeedbackMux = 1'b0;
  6782. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .ShiftMux = 1'b0;
  6783. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .BypassEn = 1'b0;
  6784. defparam \macro_inst|ahb2apb_inst|prdata[29]~13 .CarryEnb = 1'b1;
  6785. alta_slice \macro_inst|ahb2apb_inst|prdata[2] (
  6786. .A(\macro_inst|trig_ctrl_inst|prdata [2]),
  6787. .B(\macro_inst|cfg_reg_inst|prdata [2]),
  6788. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [11]),
  6789. .D(\macro_inst|pr_select [2]),
  6790. .Cin(),
  6791. .Qin(\macro_inst|ahb2apb_inst|prdata [2]),
  6792. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6794. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ),
  6795. .ShiftData(),
  6796. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ),
  6797. .LutOut(\macro_inst|ahb2apb_inst|prdata[2]~2_combout ),
  6798. .Cout(),
  6799. .Q(\macro_inst|ahb2apb_inst|prdata [2]));
  6800. defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_x = 15;
  6801. defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_y = 11;
  6802. defparam \macro_inst|ahb2apb_inst|prdata[2] .coord_z = 2;
  6803. defparam \macro_inst|ahb2apb_inst|prdata[2] .mask = 16'hAACC;
  6804. defparam \macro_inst|ahb2apb_inst|prdata[2] .modeMux = 1'b0;
  6805. defparam \macro_inst|ahb2apb_inst|prdata[2] .FeedbackMux = 1'b0;
  6806. defparam \macro_inst|ahb2apb_inst|prdata[2] .ShiftMux = 1'b0;
  6807. defparam \macro_inst|ahb2apb_inst|prdata[2] .BypassEn = 1'b1;
  6808. defparam \macro_inst|ahb2apb_inst|prdata[2] .CarryEnb = 1'b1;
  6809. alta_slice \macro_inst|ahb2apb_inst|prdata[30] (
  6810. .A(\macro_inst|cfg_reg_inst|prdata [30]),
  6811. .B(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6812. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [14]),
  6813. .D(\macro_inst|mem_apb_psel~combout ),
  6814. .Cin(),
  6815. .Qin(\macro_inst|ahb2apb_inst|prdata [30]),
  6816. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6818. .SyncReset(),
  6819. .ShiftData(),
  6820. .SyncLoad(),
  6821. .LutOut(\macro_inst|apb_prdata[30]~21_combout ),
  6822. .Cout(),
  6823. .Q(\macro_inst|ahb2apb_inst|prdata [30]));
  6824. defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_x = 14;
  6825. defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_y = 11;
  6826. defparam \macro_inst|ahb2apb_inst|prdata[30] .coord_z = 9;
  6827. defparam \macro_inst|ahb2apb_inst|prdata[30] .mask = 16'h3022;
  6828. defparam \macro_inst|ahb2apb_inst|prdata[30] .modeMux = 1'b0;
  6829. defparam \macro_inst|ahb2apb_inst|prdata[30] .FeedbackMux = 1'b0;
  6830. defparam \macro_inst|ahb2apb_inst|prdata[30] .ShiftMux = 1'b0;
  6831. defparam \macro_inst|ahb2apb_inst|prdata[30] .BypassEn = 1'b0;
  6832. defparam \macro_inst|ahb2apb_inst|prdata[30] .CarryEnb = 1'b1;
  6833. alta_slice \macro_inst|ahb2apb_inst|prdata[31] (
  6834. .A(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [15]),
  6835. .B(\macro_inst|cfg_reg_inst|prdata [31]),
  6836. .C(\macro_inst|ahb2apb_inst|prdata[29]~13_combout ),
  6837. .D(\macro_inst|mem_apb_psel~combout ),
  6838. .Cin(),
  6839. .Qin(\macro_inst|ahb2apb_inst|prdata [31]),
  6840. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y10_SIG_SIG ),
  6841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  6842. .SyncReset(),
  6843. .ShiftData(),
  6844. .SyncLoad(),
  6845. .LutOut(\macro_inst|apb_prdata[31]~22_combout ),
  6846. .Cout(),
  6847. .Q(\macro_inst|ahb2apb_inst|prdata [31]));
  6848. defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_x = 14;
  6849. defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_y = 11;
  6850. defparam \macro_inst|ahb2apb_inst|prdata[31] .coord_z = 13;
  6851. defparam \macro_inst|ahb2apb_inst|prdata[31] .mask = 16'h0A0C;
  6852. defparam \macro_inst|ahb2apb_inst|prdata[31] .modeMux = 1'b0;
  6853. defparam \macro_inst|ahb2apb_inst|prdata[31] .FeedbackMux = 1'b0;
  6854. defparam \macro_inst|ahb2apb_inst|prdata[31] .ShiftMux = 1'b0;
  6855. defparam \macro_inst|ahb2apb_inst|prdata[31] .BypassEn = 1'b0;
  6856. defparam \macro_inst|ahb2apb_inst|prdata[31] .CarryEnb = 1'b1;
  6857. alta_slice \macro_inst|ahb2apb_inst|prdata[3] (
  6858. .A(\macro_inst|cfg_reg_inst|prdata [3]),
  6859. .B(\macro_inst|pr_select [2]),
  6860. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [12]),
  6861. .D(\macro_inst|trig_ctrl_inst|prdata [3]),
  6862. .Cin(),
  6863. .Qin(\macro_inst|ahb2apb_inst|prdata [3]),
  6864. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6866. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ),
  6867. .ShiftData(),
  6868. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ),
  6869. .LutOut(\macro_inst|ahb2apb_inst|prdata[3]~3_combout ),
  6870. .Cout(),
  6871. .Q(\macro_inst|ahb2apb_inst|prdata [3]));
  6872. defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_x = 15;
  6873. defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_y = 11;
  6874. defparam \macro_inst|ahb2apb_inst|prdata[3] .coord_z = 14;
  6875. defparam \macro_inst|ahb2apb_inst|prdata[3] .mask = 16'hEE22;
  6876. defparam \macro_inst|ahb2apb_inst|prdata[3] .modeMux = 1'b0;
  6877. defparam \macro_inst|ahb2apb_inst|prdata[3] .FeedbackMux = 1'b0;
  6878. defparam \macro_inst|ahb2apb_inst|prdata[3] .ShiftMux = 1'b0;
  6879. defparam \macro_inst|ahb2apb_inst|prdata[3] .BypassEn = 1'b1;
  6880. defparam \macro_inst|ahb2apb_inst|prdata[3] .CarryEnb = 1'b1;
  6881. alta_slice \macro_inst|ahb2apb_inst|prdata[4] (
  6882. .A(\macro_inst|trig_ctrl_inst|prdata [4]),
  6883. .B(\macro_inst|pr_select [2]),
  6884. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [13]),
  6885. .D(\macro_inst|cfg_reg_inst|prdata [4]),
  6886. .Cin(),
  6887. .Qin(\macro_inst|ahb2apb_inst|prdata [4]),
  6888. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6890. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6891. .ShiftData(),
  6892. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6893. .LutOut(\macro_inst|ahb2apb_inst|prdata[4]~4_combout ),
  6894. .Cout(),
  6895. .Q(\macro_inst|ahb2apb_inst|prdata [4]));
  6896. defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_x = 17;
  6897. defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_y = 11;
  6898. defparam \macro_inst|ahb2apb_inst|prdata[4] .coord_z = 0;
  6899. defparam \macro_inst|ahb2apb_inst|prdata[4] .mask = 16'hBB88;
  6900. defparam \macro_inst|ahb2apb_inst|prdata[4] .modeMux = 1'b0;
  6901. defparam \macro_inst|ahb2apb_inst|prdata[4] .FeedbackMux = 1'b0;
  6902. defparam \macro_inst|ahb2apb_inst|prdata[4] .ShiftMux = 1'b0;
  6903. defparam \macro_inst|ahb2apb_inst|prdata[4] .BypassEn = 1'b1;
  6904. defparam \macro_inst|ahb2apb_inst|prdata[4] .CarryEnb = 1'b1;
  6905. alta_slice \macro_inst|ahb2apb_inst|prdata[5] (
  6906. .A(\macro_inst|pr_select [2]),
  6907. .B(\macro_inst|trig_ctrl_inst|prdata [5]),
  6908. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [14]),
  6909. .D(\macro_inst|cfg_reg_inst|prdata [5]),
  6910. .Cin(),
  6911. .Qin(\macro_inst|ahb2apb_inst|prdata [5]),
  6912. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6914. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6915. .ShiftData(),
  6916. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6917. .LutOut(\macro_inst|ahb2apb_inst|prdata[5]~5_combout ),
  6918. .Cout(),
  6919. .Q(\macro_inst|ahb2apb_inst|prdata [5]));
  6920. defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_x = 17;
  6921. defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_y = 11;
  6922. defparam \macro_inst|ahb2apb_inst|prdata[5] .coord_z = 1;
  6923. defparam \macro_inst|ahb2apb_inst|prdata[5] .mask = 16'hDD88;
  6924. defparam \macro_inst|ahb2apb_inst|prdata[5] .modeMux = 1'b0;
  6925. defparam \macro_inst|ahb2apb_inst|prdata[5] .FeedbackMux = 1'b0;
  6926. defparam \macro_inst|ahb2apb_inst|prdata[5] .ShiftMux = 1'b0;
  6927. defparam \macro_inst|ahb2apb_inst|prdata[5] .BypassEn = 1'b1;
  6928. defparam \macro_inst|ahb2apb_inst|prdata[5] .CarryEnb = 1'b1;
  6929. alta_slice \macro_inst|ahb2apb_inst|prdata[6] (
  6930. .A(\macro_inst|trig_ctrl_inst|prdata [6]),
  6931. .B(\macro_inst|pr_select [2]),
  6932. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [15]),
  6933. .D(\macro_inst|cfg_reg_inst|prdata [6]),
  6934. .Cin(),
  6935. .Qin(\macro_inst|ahb2apb_inst|prdata [6]),
  6936. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6938. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6939. .ShiftData(),
  6940. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6941. .LutOut(\macro_inst|ahb2apb_inst|prdata[6]~6_combout ),
  6942. .Cout(),
  6943. .Q(\macro_inst|ahb2apb_inst|prdata [6]));
  6944. defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_x = 17;
  6945. defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_y = 11;
  6946. defparam \macro_inst|ahb2apb_inst|prdata[6] .coord_z = 14;
  6947. defparam \macro_inst|ahb2apb_inst|prdata[6] .mask = 16'hBB88;
  6948. defparam \macro_inst|ahb2apb_inst|prdata[6] .modeMux = 1'b0;
  6949. defparam \macro_inst|ahb2apb_inst|prdata[6] .FeedbackMux = 1'b0;
  6950. defparam \macro_inst|ahb2apb_inst|prdata[6] .ShiftMux = 1'b0;
  6951. defparam \macro_inst|ahb2apb_inst|prdata[6] .BypassEn = 1'b1;
  6952. defparam \macro_inst|ahb2apb_inst|prdata[6] .CarryEnb = 1'b1;
  6953. alta_slice \macro_inst|ahb2apb_inst|prdata[7] (
  6954. .A(\macro_inst|cfg_reg_inst|prdata [7]),
  6955. .B(\macro_inst|trig_ctrl_inst|prdata [7]),
  6956. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [16]),
  6957. .D(\macro_inst|pr_select [2]),
  6958. .Cin(),
  6959. .Qin(\macro_inst|ahb2apb_inst|prdata [7]),
  6960. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  6961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  6962. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ),
  6963. .ShiftData(),
  6964. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ),
  6965. .LutOut(\macro_inst|ahb2apb_inst|prdata[7]~7_combout ),
  6966. .Cout(),
  6967. .Q(\macro_inst|ahb2apb_inst|prdata [7]));
  6968. defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_x = 15;
  6969. defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_y = 11;
  6970. defparam \macro_inst|ahb2apb_inst|prdata[7] .coord_z = 7;
  6971. defparam \macro_inst|ahb2apb_inst|prdata[7] .mask = 16'hCCAA;
  6972. defparam \macro_inst|ahb2apb_inst|prdata[7] .modeMux = 1'b0;
  6973. defparam \macro_inst|ahb2apb_inst|prdata[7] .FeedbackMux = 1'b0;
  6974. defparam \macro_inst|ahb2apb_inst|prdata[7] .ShiftMux = 1'b0;
  6975. defparam \macro_inst|ahb2apb_inst|prdata[7] .BypassEn = 1'b1;
  6976. defparam \macro_inst|ahb2apb_inst|prdata[7] .CarryEnb = 1'b1;
  6977. alta_slice \macro_inst|ahb2apb_inst|prdata[8] (
  6978. .A(\macro_inst|cfg_reg_inst|prdata [8]),
  6979. .B(\macro_inst|trig_ctrl_inst|prdata [8]),
  6980. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [7]),
  6981. .D(\macro_inst|pr_select [2]),
  6982. .Cin(),
  6983. .Qin(\macro_inst|ahb2apb_inst|prdata [8]),
  6984. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X59_Y8_SIG_SIG ),
  6985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  6986. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ),
  6987. .ShiftData(),
  6988. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ),
  6989. .LutOut(\macro_inst|ahb2apb_inst|prdata[8]~8_combout ),
  6990. .Cout(),
  6991. .Q(\macro_inst|ahb2apb_inst|prdata [8]));
  6992. defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_x = 17;
  6993. defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_y = 11;
  6994. defparam \macro_inst|ahb2apb_inst|prdata[8] .coord_z = 15;
  6995. defparam \macro_inst|ahb2apb_inst|prdata[8] .mask = 16'hCCAA;
  6996. defparam \macro_inst|ahb2apb_inst|prdata[8] .modeMux = 1'b0;
  6997. defparam \macro_inst|ahb2apb_inst|prdata[8] .FeedbackMux = 1'b0;
  6998. defparam \macro_inst|ahb2apb_inst|prdata[8] .ShiftMux = 1'b0;
  6999. defparam \macro_inst|ahb2apb_inst|prdata[8] .BypassEn = 1'b1;
  7000. defparam \macro_inst|ahb2apb_inst|prdata[8] .CarryEnb = 1'b1;
  7001. alta_slice \macro_inst|ahb2apb_inst|prdata[9] (
  7002. .A(\macro_inst|trig_ctrl_inst|prdata [9]),
  7003. .B(\macro_inst|cfg_reg_inst|prdata [9]),
  7004. .C(\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [9]),
  7005. .D(\macro_inst|pr_select [2]),
  7006. .Cin(),
  7007. .Qin(\macro_inst|ahb2apb_inst|prdata [9]),
  7008. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|comb~0_combout_X56_Y11_SIG_SIG ),
  7009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  7010. .SyncReset(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ),
  7011. .ShiftData(),
  7012. .SyncLoad(\macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ),
  7013. .LutOut(\macro_inst|ahb2apb_inst|prdata[9]~9_combout ),
  7014. .Cout(),
  7015. .Q(\macro_inst|ahb2apb_inst|prdata [9]));
  7016. defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_x = 15;
  7017. defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_y = 11;
  7018. defparam \macro_inst|ahb2apb_inst|prdata[9] .coord_z = 8;
  7019. defparam \macro_inst|ahb2apb_inst|prdata[9] .mask = 16'hAACC;
  7020. defparam \macro_inst|ahb2apb_inst|prdata[9] .modeMux = 1'b0;
  7021. defparam \macro_inst|ahb2apb_inst|prdata[9] .FeedbackMux = 1'b0;
  7022. defparam \macro_inst|ahb2apb_inst|prdata[9] .ShiftMux = 1'b0;
  7023. defparam \macro_inst|ahb2apb_inst|prdata[9] .BypassEn = 1'b1;
  7024. defparam \macro_inst|ahb2apb_inst|prdata[9] .CarryEnb = 1'b1;
  7025. alta_slice \macro_inst|ahb2apb_inst|prdata[9]~10 (
  7026. .A(\macro_inst|pr_select [1]),
  7027. .B(\macro_inst|pr_select [0]),
  7028. .C(\macro_inst|pr_select [2]),
  7029. .D(\macro_inst|pr_select [3]),
  7030. .Cin(),
  7031. .Qin(),
  7032. .Clk(),
  7033. .AsyncReset(),
  7034. .SyncReset(),
  7035. .ShiftData(),
  7036. .SyncLoad(),
  7037. .LutOut(\macro_inst|ahb2apb_inst|prdata[9]~10_combout ),
  7038. .Cout(),
  7039. .Q());
  7040. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .coord_x = 15;
  7041. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .coord_y = 12;
  7042. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .coord_z = 2;
  7043. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .mask = 16'hFFED;
  7044. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .modeMux = 1'b0;
  7045. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .FeedbackMux = 1'b0;
  7046. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .ShiftMux = 1'b0;
  7047. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .BypassEn = 1'b0;
  7048. defparam \macro_inst|ahb2apb_inst|prdata[9]~10 .CarryEnb = 1'b1;
  7049. alta_slice \macro_inst|ahb2apb_inst|prdata[9]~11 (
  7050. .A(\macro_inst|ahb2apb_inst|paddr [1]),
  7051. .B(\macro_inst|ahb2apb_inst|paddr [14]),
  7052. .C(\macro_inst|ahb2apb_inst|prdata[9]~10_combout ),
  7053. .D(\macro_inst|mem_apb_psel~0_combout ),
  7054. .Cin(),
  7055. .Qin(),
  7056. .Clk(),
  7057. .AsyncReset(),
  7058. .SyncReset(),
  7059. .ShiftData(),
  7060. .SyncLoad(),
  7061. .LutOut(\macro_inst|ahb2apb_inst|prdata[9]~11_combout ),
  7062. .Cout(),
  7063. .Q());
  7064. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .coord_x = 16;
  7065. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .coord_y = 9;
  7066. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .coord_z = 8;
  7067. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .mask = 16'hB8F0;
  7068. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .modeMux = 1'b0;
  7069. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .FeedbackMux = 1'b0;
  7070. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .ShiftMux = 1'b0;
  7071. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .BypassEn = 1'b0;
  7072. defparam \macro_inst|ahb2apb_inst|prdata[9]~11 .CarryEnb = 1'b1;
  7073. alta_slice \macro_inst|ahb2apb_inst|psel (
  7074. .A(\macro_inst|ahb2apb_inst|apbState.apbIdle~q ),
  7075. .B(\macro_inst|ahb2apb_inst|apbState.apbSetup~q ),
  7076. .C(vcc),
  7077. .D(\macro_inst|ahb2apb_inst|pvalid~q ),
  7078. .Cin(),
  7079. .Qin(\macro_inst|ahb2apb_inst|psel~q ),
  7080. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  7081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  7082. .SyncReset(),
  7083. .ShiftData(),
  7084. .SyncLoad(),
  7085. .LutOut(\macro_inst|ahb2apb_inst|psel~0_combout ),
  7086. .Cout(),
  7087. .Q(\macro_inst|ahb2apb_inst|psel~q ));
  7088. defparam \macro_inst|ahb2apb_inst|psel .coord_x = 15;
  7089. defparam \macro_inst|ahb2apb_inst|psel .coord_y = 12;
  7090. defparam \macro_inst|ahb2apb_inst|psel .coord_z = 6;
  7091. defparam \macro_inst|ahb2apb_inst|psel .mask = 16'hF7D0;
  7092. defparam \macro_inst|ahb2apb_inst|psel .modeMux = 1'b0;
  7093. defparam \macro_inst|ahb2apb_inst|psel .FeedbackMux = 1'b1;
  7094. defparam \macro_inst|ahb2apb_inst|psel .ShiftMux = 1'b0;
  7095. defparam \macro_inst|ahb2apb_inst|psel .BypassEn = 1'b0;
  7096. defparam \macro_inst|ahb2apb_inst|psel .CarryEnb = 1'b1;
  7097. alta_slice \macro_inst|ahb2apb_inst|pvalid (
  7098. .A(\macro_inst|ahb2apb_inst|hreadyout~q ),
  7099. .B(vcc),
  7100. .C(\macro_inst|ahb2apb_inst|psel~q ),
  7101. .D(\macro_inst|ahb2apb_inst|pdone~q ),
  7102. .Cin(),
  7103. .Qin(\macro_inst|ahb2apb_inst|pvalid~q ),
  7104. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y12_SIG_VCC ),
  7105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  7106. .SyncReset(),
  7107. .ShiftData(),
  7108. .SyncLoad(),
  7109. .LutOut(\macro_inst|ahb2apb_inst|always2~0_combout ),
  7110. .Cout(),
  7111. .Q(\macro_inst|ahb2apb_inst|pvalid~q ));
  7112. defparam \macro_inst|ahb2apb_inst|pvalid .coord_x = 15;
  7113. defparam \macro_inst|ahb2apb_inst|pvalid .coord_y = 12;
  7114. defparam \macro_inst|ahb2apb_inst|pvalid .coord_z = 5;
  7115. defparam \macro_inst|ahb2apb_inst|pvalid .mask = 16'h000A;
  7116. defparam \macro_inst|ahb2apb_inst|pvalid .modeMux = 1'b0;
  7117. defparam \macro_inst|ahb2apb_inst|pvalid .FeedbackMux = 1'b0;
  7118. defparam \macro_inst|ahb2apb_inst|pvalid .ShiftMux = 1'b0;
  7119. defparam \macro_inst|ahb2apb_inst|pvalid .BypassEn = 1'b0;
  7120. defparam \macro_inst|ahb2apb_inst|pvalid .CarryEnb = 1'b1;
  7121. alta_slice \macro_inst|ahb2apb_inst|pwrite (
  7122. .A(\macro_inst|ahb2apb_inst|penable~q ),
  7123. .B(\macro_inst|ahb2apb_inst|psel~q ),
  7124. .C(\macro_inst|ahb2apb_inst|hwrite~q ),
  7125. .D(\macro_inst|ShiftLeft0~0_combout ),
  7126. .Cin(),
  7127. .Qin(\macro_inst|ahb2apb_inst|pwrite~q ),
  7128. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|ahb2apb_inst|paddr[7]~0_combout_X59_Y12_SIG_SIG ),
  7129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  7130. .SyncReset(SyncReset_X59_Y12_GND),
  7131. .ShiftData(),
  7132. .SyncLoad(SyncLoad_X59_Y12_VCC),
  7133. .LutOut(\macro_inst|cfg_reg_inst|always0~0_combout ),
  7134. .Cout(),
  7135. .Q(\macro_inst|ahb2apb_inst|pwrite~q ));
  7136. defparam \macro_inst|ahb2apb_inst|pwrite .coord_x = 16;
  7137. defparam \macro_inst|ahb2apb_inst|pwrite .coord_y = 12;
  7138. defparam \macro_inst|ahb2apb_inst|pwrite .coord_z = 2;
  7139. defparam \macro_inst|ahb2apb_inst|pwrite .mask = 16'h8000;
  7140. defparam \macro_inst|ahb2apb_inst|pwrite .modeMux = 1'b0;
  7141. defparam \macro_inst|ahb2apb_inst|pwrite .FeedbackMux = 1'b1;
  7142. defparam \macro_inst|ahb2apb_inst|pwrite .ShiftMux = 1'b0;
  7143. defparam \macro_inst|ahb2apb_inst|pwrite .BypassEn = 1'b1;
  7144. defparam \macro_inst|ahb2apb_inst|pwrite .CarryEnb = 1'b1;
  7145. alta_slice \macro_inst|always0~0 (
  7146. .A(vcc),
  7147. .B(vcc),
  7148. .C(\macro_inst|ahb2apb_inst|psel~q ),
  7149. .D(\macro_inst|ahb2apb_inst|penable~q ),
  7150. .Cin(),
  7151. .Qin(),
  7152. .Clk(),
  7153. .AsyncReset(),
  7154. .SyncReset(),
  7155. .ShiftData(),
  7156. .SyncLoad(),
  7157. .LutOut(\macro_inst|always0~0_combout ),
  7158. .Cout(),
  7159. .Q());
  7160. defparam \macro_inst|always0~0 .coord_x = 15;
  7161. defparam \macro_inst|always0~0 .coord_y = 12;
  7162. defparam \macro_inst|always0~0 .coord_z = 10;
  7163. defparam \macro_inst|always0~0 .mask = 16'h00F0;
  7164. defparam \macro_inst|always0~0 .modeMux = 1'b0;
  7165. defparam \macro_inst|always0~0 .FeedbackMux = 1'b0;
  7166. defparam \macro_inst|always0~0 .ShiftMux = 1'b0;
  7167. defparam \macro_inst|always0~0 .BypassEn = 1'b0;
  7168. defparam \macro_inst|always0~0 .CarryEnb = 1'b1;
  7169. alta_slice \macro_inst|apb_adc0_inst|Equal0~0 (
  7170. .A(\macro_inst|apb_adc0_inst|sclk_counter [0]),
  7171. .B(\macro_inst|cfg_reg_inst|adc_clk_div [0]),
  7172. .C(\macro_inst|apb_adc0_inst|sclk_counter [1]),
  7173. .D(\macro_inst|cfg_reg_inst|adc_clk_div [1]),
  7174. .Cin(),
  7175. .Qin(),
  7176. .Clk(),
  7177. .AsyncReset(),
  7178. .SyncReset(),
  7179. .ShiftData(),
  7180. .SyncLoad(),
  7181. .LutOut(\macro_inst|apb_adc0_inst|Equal0~0_combout ),
  7182. .Cout(),
  7183. .Q());
  7184. defparam \macro_inst|apb_adc0_inst|Equal0~0 .coord_x = 19;
  7185. defparam \macro_inst|apb_adc0_inst|Equal0~0 .coord_y = 11;
  7186. defparam \macro_inst|apb_adc0_inst|Equal0~0 .coord_z = 7;
  7187. defparam \macro_inst|apb_adc0_inst|Equal0~0 .mask = 16'h0660;
  7188. defparam \macro_inst|apb_adc0_inst|Equal0~0 .modeMux = 1'b0;
  7189. defparam \macro_inst|apb_adc0_inst|Equal0~0 .FeedbackMux = 1'b0;
  7190. defparam \macro_inst|apb_adc0_inst|Equal0~0 .ShiftMux = 1'b0;
  7191. defparam \macro_inst|apb_adc0_inst|Equal0~0 .BypassEn = 1'b0;
  7192. defparam \macro_inst|apb_adc0_inst|Equal0~0 .CarryEnb = 1'b1;
  7193. alta_slice \macro_inst|apb_adc0_inst|Equal0~1 (
  7194. .A(\macro_inst|apb_adc0_inst|sclk_counter [3]),
  7195. .B(\macro_inst|apb_adc0_inst|sclk_counter [2]),
  7196. .C(\macro_inst|cfg_reg_inst|adc_clk_div [3]),
  7197. .D(\macro_inst|cfg_reg_inst|adc_clk_div [2]),
  7198. .Cin(),
  7199. .Qin(),
  7200. .Clk(),
  7201. .AsyncReset(),
  7202. .SyncReset(),
  7203. .ShiftData(),
  7204. .SyncLoad(),
  7205. .LutOut(\macro_inst|apb_adc0_inst|Equal0~1_combout ),
  7206. .Cout(),
  7207. .Q());
  7208. defparam \macro_inst|apb_adc0_inst|Equal0~1 .coord_x = 19;
  7209. defparam \macro_inst|apb_adc0_inst|Equal0~1 .coord_y = 11;
  7210. defparam \macro_inst|apb_adc0_inst|Equal0~1 .coord_z = 5;
  7211. defparam \macro_inst|apb_adc0_inst|Equal0~1 .mask = 16'h8421;
  7212. defparam \macro_inst|apb_adc0_inst|Equal0~1 .modeMux = 1'b0;
  7213. defparam \macro_inst|apb_adc0_inst|Equal0~1 .FeedbackMux = 1'b0;
  7214. defparam \macro_inst|apb_adc0_inst|Equal0~1 .ShiftMux = 1'b0;
  7215. defparam \macro_inst|apb_adc0_inst|Equal0~1 .BypassEn = 1'b0;
  7216. defparam \macro_inst|apb_adc0_inst|Equal0~1 .CarryEnb = 1'b1;
  7217. alta_slice \macro_inst|apb_adc0_inst|Equal0~2 (
  7218. .A(\macro_inst|apb_adc0_inst|sclk_counter [5]),
  7219. .B(\macro_inst|cfg_reg_inst|adc_clk_div [5]),
  7220. .C(\macro_inst|cfg_reg_inst|adc_clk_div [4]),
  7221. .D(\macro_inst|apb_adc0_inst|sclk_counter [4]),
  7222. .Cin(),
  7223. .Qin(),
  7224. .Clk(),
  7225. .AsyncReset(),
  7226. .SyncReset(),
  7227. .ShiftData(),
  7228. .SyncLoad(),
  7229. .LutOut(\macro_inst|apb_adc0_inst|Equal0~2_combout ),
  7230. .Cout(),
  7231. .Q());
  7232. defparam \macro_inst|apb_adc0_inst|Equal0~2 .coord_x = 19;
  7233. defparam \macro_inst|apb_adc0_inst|Equal0~2 .coord_y = 11;
  7234. defparam \macro_inst|apb_adc0_inst|Equal0~2 .coord_z = 6;
  7235. defparam \macro_inst|apb_adc0_inst|Equal0~2 .mask = 16'h9009;
  7236. defparam \macro_inst|apb_adc0_inst|Equal0~2 .modeMux = 1'b0;
  7237. defparam \macro_inst|apb_adc0_inst|Equal0~2 .FeedbackMux = 1'b0;
  7238. defparam \macro_inst|apb_adc0_inst|Equal0~2 .ShiftMux = 1'b0;
  7239. defparam \macro_inst|apb_adc0_inst|Equal0~2 .BypassEn = 1'b0;
  7240. defparam \macro_inst|apb_adc0_inst|Equal0~2 .CarryEnb = 1'b1;
  7241. alta_slice \macro_inst|apb_adc0_inst|Equal0~3 (
  7242. .A(\macro_inst|cfg_reg_inst|adc_clk_div [6]),
  7243. .B(\macro_inst|cfg_reg_inst|adc_clk_div [7]),
  7244. .C(\macro_inst|apb_adc0_inst|sclk_counter [6]),
  7245. .D(\macro_inst|apb_adc0_inst|sclk_counter [7]),
  7246. .Cin(),
  7247. .Qin(),
  7248. .Clk(),
  7249. .AsyncReset(),
  7250. .SyncReset(),
  7251. .ShiftData(),
  7252. .SyncLoad(),
  7253. .LutOut(\macro_inst|apb_adc0_inst|Equal0~3_combout ),
  7254. .Cout(),
  7255. .Q());
  7256. defparam \macro_inst|apb_adc0_inst|Equal0~3 .coord_x = 19;
  7257. defparam \macro_inst|apb_adc0_inst|Equal0~3 .coord_y = 11;
  7258. defparam \macro_inst|apb_adc0_inst|Equal0~3 .coord_z = 14;
  7259. defparam \macro_inst|apb_adc0_inst|Equal0~3 .mask = 16'h8421;
  7260. defparam \macro_inst|apb_adc0_inst|Equal0~3 .modeMux = 1'b0;
  7261. defparam \macro_inst|apb_adc0_inst|Equal0~3 .FeedbackMux = 1'b0;
  7262. defparam \macro_inst|apb_adc0_inst|Equal0~3 .ShiftMux = 1'b0;
  7263. defparam \macro_inst|apb_adc0_inst|Equal0~3 .BypassEn = 1'b0;
  7264. defparam \macro_inst|apb_adc0_inst|Equal0~3 .CarryEnb = 1'b1;
  7265. alta_slice \macro_inst|apb_adc0_inst|Equal0~4 (
  7266. .A(\macro_inst|apb_adc0_inst|Equal0~3_combout ),
  7267. .B(\macro_inst|apb_adc0_inst|Equal0~1_combout ),
  7268. .C(\macro_inst|apb_adc0_inst|Equal0~2_combout ),
  7269. .D(\macro_inst|apb_adc0_inst|Equal0~0_combout ),
  7270. .Cin(),
  7271. .Qin(),
  7272. .Clk(),
  7273. .AsyncReset(),
  7274. .SyncReset(),
  7275. .ShiftData(),
  7276. .SyncLoad(),
  7277. .LutOut(\macro_inst|apb_adc0_inst|Equal0~4_combout ),
  7278. .Cout(),
  7279. .Q());
  7280. defparam \macro_inst|apb_adc0_inst|Equal0~4 .coord_x = 19;
  7281. defparam \macro_inst|apb_adc0_inst|Equal0~4 .coord_y = 11;
  7282. defparam \macro_inst|apb_adc0_inst|Equal0~4 .coord_z = 15;
  7283. defparam \macro_inst|apb_adc0_inst|Equal0~4 .mask = 16'h8000;
  7284. defparam \macro_inst|apb_adc0_inst|Equal0~4 .modeMux = 1'b0;
  7285. defparam \macro_inst|apb_adc0_inst|Equal0~4 .FeedbackMux = 1'b0;
  7286. defparam \macro_inst|apb_adc0_inst|Equal0~4 .ShiftMux = 1'b0;
  7287. defparam \macro_inst|apb_adc0_inst|Equal0~4 .BypassEn = 1'b0;
  7288. defparam \macro_inst|apb_adc0_inst|Equal0~4 .CarryEnb = 1'b1;
  7289. alta_slice \macro_inst|apb_adc0_inst|Equal0~5 (
  7290. .A(\macro_inst|apb_adc0_inst|sclk_counter [10]),
  7291. .B(\macro_inst|apb_adc0_inst|sclk_counter [11]),
  7292. .C(\macro_inst|apb_adc0_inst|sclk_counter [8]),
  7293. .D(\macro_inst|apb_adc0_inst|sclk_counter [9]),
  7294. .Cin(),
  7295. .Qin(),
  7296. .Clk(),
  7297. .AsyncReset(),
  7298. .SyncReset(),
  7299. .ShiftData(),
  7300. .SyncLoad(),
  7301. .LutOut(\macro_inst|apb_adc0_inst|Equal0~5_combout ),
  7302. .Cout(),
  7303. .Q());
  7304. defparam \macro_inst|apb_adc0_inst|Equal0~5 .coord_x = 19;
  7305. defparam \macro_inst|apb_adc0_inst|Equal0~5 .coord_y = 11;
  7306. defparam \macro_inst|apb_adc0_inst|Equal0~5 .coord_z = 9;
  7307. defparam \macro_inst|apb_adc0_inst|Equal0~5 .mask = 16'h0001;
  7308. defparam \macro_inst|apb_adc0_inst|Equal0~5 .modeMux = 1'b0;
  7309. defparam \macro_inst|apb_adc0_inst|Equal0~5 .FeedbackMux = 1'b0;
  7310. defparam \macro_inst|apb_adc0_inst|Equal0~5 .ShiftMux = 1'b0;
  7311. defparam \macro_inst|apb_adc0_inst|Equal0~5 .BypassEn = 1'b0;
  7312. defparam \macro_inst|apb_adc0_inst|Equal0~5 .CarryEnb = 1'b1;
  7313. alta_slice \macro_inst|apb_adc0_inst|Equal0~6 (
  7314. .A(\macro_inst|apb_adc0_inst|sclk_counter [15]),
  7315. .B(\macro_inst|apb_adc0_inst|sclk_counter [13]),
  7316. .C(\macro_inst|apb_adc0_inst|sclk_counter [14]),
  7317. .D(\macro_inst|apb_adc0_inst|sclk_counter [12]),
  7318. .Cin(),
  7319. .Qin(),
  7320. .Clk(),
  7321. .AsyncReset(),
  7322. .SyncReset(),
  7323. .ShiftData(),
  7324. .SyncLoad(),
  7325. .LutOut(\macro_inst|apb_adc0_inst|Equal0~6_combout ),
  7326. .Cout(),
  7327. .Q());
  7328. defparam \macro_inst|apb_adc0_inst|Equal0~6 .coord_x = 19;
  7329. defparam \macro_inst|apb_adc0_inst|Equal0~6 .coord_y = 11;
  7330. defparam \macro_inst|apb_adc0_inst|Equal0~6 .coord_z = 12;
  7331. defparam \macro_inst|apb_adc0_inst|Equal0~6 .mask = 16'h0001;
  7332. defparam \macro_inst|apb_adc0_inst|Equal0~6 .modeMux = 1'b0;
  7333. defparam \macro_inst|apb_adc0_inst|Equal0~6 .FeedbackMux = 1'b0;
  7334. defparam \macro_inst|apb_adc0_inst|Equal0~6 .ShiftMux = 1'b0;
  7335. defparam \macro_inst|apb_adc0_inst|Equal0~6 .BypassEn = 1'b0;
  7336. defparam \macro_inst|apb_adc0_inst|Equal0~6 .CarryEnb = 1'b1;
  7337. alta_adc \macro_inst|apb_adc0_inst|adc_inst (
  7338. .enb(!\macro_inst|cfg_reg_inst|adc_en~q ),
  7339. .sclk(\macro_inst|apb_adc0_inst|sclk~q ),
  7340. .insel({gnd, !\macro_inst|cfg_reg_inst|adc_chnl_sel [3], !\macro_inst|cfg_reg_inst|adc_chnl_sel [2], \macro_inst|cfg_reg_inst|adc_chnl_sel [1], !\macro_inst|cfg_reg_inst|adc_chnl_sel [0]}),
  7341. .stop(\rv32.sys_ctrl_stop ),
  7342. .db({\macro_inst|apb_adc0_inst|adc_inst.db[11] , \macro_inst|apb_adc0_inst|adc_inst.db[10] , \macro_inst|apb_adc0_inst|adc_inst.db[9] , \macro_inst|apb_adc0_inst|adc_inst.db[8] , \macro_inst|apb_adc0_inst|adc_inst.db[7] , \macro_inst|apb_adc0_inst|adc_inst.db[6] , \macro_inst|apb_adc0_inst|adc_inst.db[5] , \macro_inst|apb_adc0_inst|adc_inst.db[4] , \macro_inst|apb_adc0_inst|adc_inst.db[3] , \macro_inst|apb_adc0_inst|adc_inst.db[2] , \macro_inst|apb_adc0_inst|adc_inst.db[1] , \macro_inst|apb_adc0_inst|adc_inst.db[0] }),
  7343. .eoc(\macro_inst|apb_adc0_inst|adc_inst.eoc ));
  7344. defparam \macro_inst|apb_adc0_inst|adc_inst .coord_x = 22;
  7345. defparam \macro_inst|apb_adc0_inst|adc_inst .coord_y = 7;
  7346. defparam \macro_inst|apb_adc0_inst|adc_inst .coord_z = 0;
  7347. alta_slice \macro_inst|apb_adc0_inst|apb_db[0] (
  7348. .A(),
  7349. .B(),
  7350. .C(vcc),
  7351. .D(\macro_inst|apb_adc0_inst|adc_inst.db[0] ),
  7352. .Cin(),
  7353. .Qin(\macro_inst|apb_adc0_inst|apb_db [0]),
  7354. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7355. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7356. .SyncReset(),
  7357. .ShiftData(),
  7358. .SyncLoad(),
  7359. .LutOut(\macro_inst|apb_adc0_inst|apb_db[0]__feeder__LutOut ),
  7360. .Cout(),
  7361. .Q(\macro_inst|apb_adc0_inst|apb_db [0]));
  7362. defparam \macro_inst|apb_adc0_inst|apb_db[0] .coord_x = 19;
  7363. defparam \macro_inst|apb_adc0_inst|apb_db[0] .coord_y = 5;
  7364. defparam \macro_inst|apb_adc0_inst|apb_db[0] .coord_z = 0;
  7365. defparam \macro_inst|apb_adc0_inst|apb_db[0] .mask = 16'hFF00;
  7366. defparam \macro_inst|apb_adc0_inst|apb_db[0] .modeMux = 1'b1;
  7367. defparam \macro_inst|apb_adc0_inst|apb_db[0] .FeedbackMux = 1'b0;
  7368. defparam \macro_inst|apb_adc0_inst|apb_db[0] .ShiftMux = 1'b0;
  7369. defparam \macro_inst|apb_adc0_inst|apb_db[0] .BypassEn = 1'b0;
  7370. defparam \macro_inst|apb_adc0_inst|apb_db[0] .CarryEnb = 1'b1;
  7371. alta_slice \macro_inst|apb_adc0_inst|apb_db[10] (
  7372. .A(\macro_inst|apb_adc0_inst|apb_db [10]),
  7373. .B(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  7374. .C(\macro_inst|apb_adc0_inst|adc_inst.db[10] ),
  7375. .D(vcc),
  7376. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~19_cout ),
  7377. .Qin(\macro_inst|apb_adc0_inst|apb_db [10]),
  7378. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7379. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7380. .SyncReset(SyncReset_X57_Y4_GND),
  7381. .ShiftData(),
  7382. .SyncLoad(SyncLoad_X57_Y4_VCC),
  7383. .LutOut(),
  7384. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~21_cout ),
  7385. .Q(\macro_inst|apb_adc0_inst|apb_db [10]));
  7386. defparam \macro_inst|apb_adc0_inst|apb_db[10] .coord_x = 19;
  7387. defparam \macro_inst|apb_adc0_inst|apb_db[10] .coord_y = 5;
  7388. defparam \macro_inst|apb_adc0_inst|apb_db[10] .coord_z = 13;
  7389. defparam \macro_inst|apb_adc0_inst|apb_db[10] .mask = 16'h004D;
  7390. defparam \macro_inst|apb_adc0_inst|apb_db[10] .modeMux = 1'b1;
  7391. defparam \macro_inst|apb_adc0_inst|apb_db[10] .FeedbackMux = 1'b0;
  7392. defparam \macro_inst|apb_adc0_inst|apb_db[10] .ShiftMux = 1'b0;
  7393. defparam \macro_inst|apb_adc0_inst|apb_db[10] .BypassEn = 1'b1;
  7394. defparam \macro_inst|apb_adc0_inst|apb_db[10] .CarryEnb = 1'b0;
  7395. alta_slice \macro_inst|apb_adc0_inst|apb_db[11] (
  7396. .A(vcc),
  7397. .B(\macro_inst|apb_adc0_inst|apb_db [11]),
  7398. .C(\macro_inst|apb_adc0_inst|adc_inst.db[11] ),
  7399. .D(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  7400. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~21_cout ),
  7401. .Qin(\macro_inst|apb_adc0_inst|apb_db [11]),
  7402. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7403. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7404. .SyncReset(SyncReset_X57_Y4_GND),
  7405. .ShiftData(),
  7406. .SyncLoad(SyncLoad_X57_Y4_VCC),
  7407. .LutOut(\macro_inst|trig_ctrl_inst|LessThan3~22_combout ),
  7408. .Cout(),
  7409. .Q(\macro_inst|apb_adc0_inst|apb_db [11]));
  7410. defparam \macro_inst|apb_adc0_inst|apb_db[11] .coord_x = 19;
  7411. defparam \macro_inst|apb_adc0_inst|apb_db[11] .coord_y = 5;
  7412. defparam \macro_inst|apb_adc0_inst|apb_db[11] .coord_z = 14;
  7413. defparam \macro_inst|apb_adc0_inst|apb_db[11] .mask = 16'h30F3;
  7414. defparam \macro_inst|apb_adc0_inst|apb_db[11] .modeMux = 1'b1;
  7415. defparam \macro_inst|apb_adc0_inst|apb_db[11] .FeedbackMux = 1'b0;
  7416. defparam \macro_inst|apb_adc0_inst|apb_db[11] .ShiftMux = 1'b0;
  7417. defparam \macro_inst|apb_adc0_inst|apb_db[11] .BypassEn = 1'b1;
  7418. defparam \macro_inst|apb_adc0_inst|apb_db[11] .CarryEnb = 1'b1;
  7419. alta_slice \macro_inst|apb_adc0_inst|apb_db[1] (
  7420. .A(\macro_inst|trig_ctrl_inst|pulse_level~q ),
  7421. .B(\macro_inst|trig_ctrl_inst|LessThan5~22_combout ),
  7422. .C(\macro_inst|apb_adc0_inst|adc_inst.db[1] ),
  7423. .D(\macro_inst|trig_ctrl_inst|LessThan3~22_combout ),
  7424. .Cin(),
  7425. .Qin(\macro_inst|apb_adc0_inst|apb_db [1]),
  7426. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ),
  7427. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7428. .SyncReset(SyncReset_X56_Y4_GND),
  7429. .ShiftData(),
  7430. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7431. .LutOut(\macro_inst|trig_ctrl_inst|always4~2_combout ),
  7432. .Cout(),
  7433. .Q(\macro_inst|apb_adc0_inst|apb_db [1]));
  7434. defparam \macro_inst|apb_adc0_inst|apb_db[1] .coord_x = 20;
  7435. defparam \macro_inst|apb_adc0_inst|apb_db[1] .coord_y = 5;
  7436. defparam \macro_inst|apb_adc0_inst|apb_db[1] .coord_z = 14;
  7437. defparam \macro_inst|apb_adc0_inst|apb_db[1] .mask = 16'hEE44;
  7438. defparam \macro_inst|apb_adc0_inst|apb_db[1] .modeMux = 1'b0;
  7439. defparam \macro_inst|apb_adc0_inst|apb_db[1] .FeedbackMux = 1'b0;
  7440. defparam \macro_inst|apb_adc0_inst|apb_db[1] .ShiftMux = 1'b0;
  7441. defparam \macro_inst|apb_adc0_inst|apb_db[1] .BypassEn = 1'b1;
  7442. defparam \macro_inst|apb_adc0_inst|apb_db[1] .CarryEnb = 1'b1;
  7443. alta_slice \macro_inst|apb_adc0_inst|apb_db[2] (
  7444. .A(),
  7445. .B(),
  7446. .C(vcc),
  7447. .D(\macro_inst|apb_adc0_inst|adc_inst.db[2] ),
  7448. .Cin(),
  7449. .Qin(\macro_inst|apb_adc0_inst|apb_db [2]),
  7450. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7451. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7452. .SyncReset(),
  7453. .ShiftData(),
  7454. .SyncLoad(),
  7455. .LutOut(\macro_inst|apb_adc0_inst|apb_db[2]__feeder__LutOut ),
  7456. .Cout(),
  7457. .Q(\macro_inst|apb_adc0_inst|apb_db [2]));
  7458. defparam \macro_inst|apb_adc0_inst|apb_db[2] .coord_x = 19;
  7459. defparam \macro_inst|apb_adc0_inst|apb_db[2] .coord_y = 5;
  7460. defparam \macro_inst|apb_adc0_inst|apb_db[2] .coord_z = 2;
  7461. defparam \macro_inst|apb_adc0_inst|apb_db[2] .mask = 16'hFF00;
  7462. defparam \macro_inst|apb_adc0_inst|apb_db[2] .modeMux = 1'b1;
  7463. defparam \macro_inst|apb_adc0_inst|apb_db[2] .FeedbackMux = 1'b0;
  7464. defparam \macro_inst|apb_adc0_inst|apb_db[2] .ShiftMux = 1'b0;
  7465. defparam \macro_inst|apb_adc0_inst|apb_db[2] .BypassEn = 1'b0;
  7466. defparam \macro_inst|apb_adc0_inst|apb_db[2] .CarryEnb = 1'b1;
  7467. alta_slice \macro_inst|apb_adc0_inst|apb_db[3] (
  7468. .A(\macro_inst|apb_adc0_inst|adc_inst.eoc ),
  7469. .B(\macro_inst|apb_adc0_inst|apb_eoc~q ),
  7470. .C(\macro_inst|apb_adc0_inst|adc_inst.db[3] ),
  7471. .D(\macro_inst|cfg_reg_inst|adc_en~q ),
  7472. .Cin(),
  7473. .Qin(\macro_inst|apb_adc0_inst|apb_db [3]),
  7474. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ),
  7475. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7476. .SyncReset(SyncReset_X56_Y4_GND),
  7477. .ShiftData(),
  7478. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7479. .LutOut(\macro_inst|apb_adc0_inst|always1~0_combout ),
  7480. .Cout(),
  7481. .Q(\macro_inst|apb_adc0_inst|apb_db [3]));
  7482. defparam \macro_inst|apb_adc0_inst|apb_db[3] .coord_x = 20;
  7483. defparam \macro_inst|apb_adc0_inst|apb_db[3] .coord_y = 5;
  7484. defparam \macro_inst|apb_adc0_inst|apb_db[3] .coord_z = 15;
  7485. defparam \macro_inst|apb_adc0_inst|apb_db[3] .mask = 16'h4400;
  7486. defparam \macro_inst|apb_adc0_inst|apb_db[3] .modeMux = 1'b0;
  7487. defparam \macro_inst|apb_adc0_inst|apb_db[3] .FeedbackMux = 1'b0;
  7488. defparam \macro_inst|apb_adc0_inst|apb_db[3] .ShiftMux = 1'b0;
  7489. defparam \macro_inst|apb_adc0_inst|apb_db[3] .BypassEn = 1'b1;
  7490. defparam \macro_inst|apb_adc0_inst|apb_db[3] .CarryEnb = 1'b1;
  7491. alta_slice \macro_inst|apb_adc0_inst|apb_db[4] (
  7492. .A(\macro_inst|apb_adc0_inst|apb_db [4]),
  7493. .B(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  7494. .C(\macro_inst|apb_adc0_inst|adc_inst.db[4] ),
  7495. .D(vcc),
  7496. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~7_cout ),
  7497. .Qin(\macro_inst|apb_adc0_inst|apb_db [4]),
  7498. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7499. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7500. .SyncReset(SyncReset_X57_Y4_GND),
  7501. .ShiftData(),
  7502. .SyncLoad(SyncLoad_X57_Y4_VCC),
  7503. .LutOut(),
  7504. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~9_cout ),
  7505. .Q(\macro_inst|apb_adc0_inst|apb_db [4]));
  7506. defparam \macro_inst|apb_adc0_inst|apb_db[4] .coord_x = 19;
  7507. defparam \macro_inst|apb_adc0_inst|apb_db[4] .coord_y = 5;
  7508. defparam \macro_inst|apb_adc0_inst|apb_db[4] .coord_z = 7;
  7509. defparam \macro_inst|apb_adc0_inst|apb_db[4] .mask = 16'h004D;
  7510. defparam \macro_inst|apb_adc0_inst|apb_db[4] .modeMux = 1'b1;
  7511. defparam \macro_inst|apb_adc0_inst|apb_db[4] .FeedbackMux = 1'b0;
  7512. defparam \macro_inst|apb_adc0_inst|apb_db[4] .ShiftMux = 1'b0;
  7513. defparam \macro_inst|apb_adc0_inst|apb_db[4] .BypassEn = 1'b1;
  7514. defparam \macro_inst|apb_adc0_inst|apb_db[4] .CarryEnb = 1'b0;
  7515. alta_slice \macro_inst|apb_adc0_inst|apb_db[5] (
  7516. .A(),
  7517. .B(),
  7518. .C(\macro_inst|apb_adc0_inst|adc_inst.db[5] ),
  7519. .D(),
  7520. .Cin(),
  7521. .Qin(\macro_inst|apb_adc0_inst|apb_db [5]),
  7522. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ),
  7523. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7524. .SyncReset(SyncReset_X56_Y4_GND),
  7525. .ShiftData(),
  7526. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7527. .LutOut(),
  7528. .Cout(),
  7529. .Q(\macro_inst|apb_adc0_inst|apb_db [5]));
  7530. defparam \macro_inst|apb_adc0_inst|apb_db[5] .coord_x = 20;
  7531. defparam \macro_inst|apb_adc0_inst|apb_db[5] .coord_y = 5;
  7532. defparam \macro_inst|apb_adc0_inst|apb_db[5] .coord_z = 12;
  7533. defparam \macro_inst|apb_adc0_inst|apb_db[5] .mask = 16'hFFFF;
  7534. defparam \macro_inst|apb_adc0_inst|apb_db[5] .modeMux = 1'b1;
  7535. defparam \macro_inst|apb_adc0_inst|apb_db[5] .FeedbackMux = 1'b0;
  7536. defparam \macro_inst|apb_adc0_inst|apb_db[5] .ShiftMux = 1'b0;
  7537. defparam \macro_inst|apb_adc0_inst|apb_db[5] .BypassEn = 1'b1;
  7538. defparam \macro_inst|apb_adc0_inst|apb_db[5] .CarryEnb = 1'b1;
  7539. alta_slice \macro_inst|apb_adc0_inst|apb_db[6] (
  7540. .A(\macro_inst|apb_adc0_inst|apb_db [6]),
  7541. .B(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  7542. .C(\macro_inst|apb_adc0_inst|adc_inst.db[6] ),
  7543. .D(vcc),
  7544. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~11_cout ),
  7545. .Qin(\macro_inst|apb_adc0_inst|apb_db [6]),
  7546. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7547. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7548. .SyncReset(SyncReset_X57_Y4_GND),
  7549. .ShiftData(),
  7550. .SyncLoad(SyncLoad_X57_Y4_VCC),
  7551. .LutOut(),
  7552. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~13_cout ),
  7553. .Q(\macro_inst|apb_adc0_inst|apb_db [6]));
  7554. defparam \macro_inst|apb_adc0_inst|apb_db[6] .coord_x = 19;
  7555. defparam \macro_inst|apb_adc0_inst|apb_db[6] .coord_y = 5;
  7556. defparam \macro_inst|apb_adc0_inst|apb_db[6] .coord_z = 9;
  7557. defparam \macro_inst|apb_adc0_inst|apb_db[6] .mask = 16'h004D;
  7558. defparam \macro_inst|apb_adc0_inst|apb_db[6] .modeMux = 1'b1;
  7559. defparam \macro_inst|apb_adc0_inst|apb_db[6] .FeedbackMux = 1'b0;
  7560. defparam \macro_inst|apb_adc0_inst|apb_db[6] .ShiftMux = 1'b0;
  7561. defparam \macro_inst|apb_adc0_inst|apb_db[6] .BypassEn = 1'b1;
  7562. defparam \macro_inst|apb_adc0_inst|apb_db[6] .CarryEnb = 1'b0;
  7563. alta_slice \macro_inst|apb_adc0_inst|apb_db[7] (
  7564. .A(\macro_inst|apb_adc0_inst|apb_db [7]),
  7565. .B(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  7566. .C(\macro_inst|apb_adc0_inst|adc_inst.db[7] ),
  7567. .D(vcc),
  7568. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~13_cout ),
  7569. .Qin(\macro_inst|apb_adc0_inst|apb_db [7]),
  7570. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ),
  7571. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7572. .SyncReset(SyncReset_X56_Y4_GND),
  7573. .ShiftData(),
  7574. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7575. .LutOut(),
  7576. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~15_cout ),
  7577. .Q(\macro_inst|apb_adc0_inst|apb_db [7]));
  7578. defparam \macro_inst|apb_adc0_inst|apb_db[7] .coord_x = 20;
  7579. defparam \macro_inst|apb_adc0_inst|apb_db[7] .coord_y = 5;
  7580. defparam \macro_inst|apb_adc0_inst|apb_db[7] .coord_z = 7;
  7581. defparam \macro_inst|apb_adc0_inst|apb_db[7] .mask = 16'h004D;
  7582. defparam \macro_inst|apb_adc0_inst|apb_db[7] .modeMux = 1'b1;
  7583. defparam \macro_inst|apb_adc0_inst|apb_db[7] .FeedbackMux = 1'b0;
  7584. defparam \macro_inst|apb_adc0_inst|apb_db[7] .ShiftMux = 1'b0;
  7585. defparam \macro_inst|apb_adc0_inst|apb_db[7] .BypassEn = 1'b1;
  7586. defparam \macro_inst|apb_adc0_inst|apb_db[7] .CarryEnb = 1'b0;
  7587. alta_slice \macro_inst|apb_adc0_inst|apb_db[8] (
  7588. .A(\macro_inst|apb_adc0_inst|apb_db [8]),
  7589. .B(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  7590. .C(\macro_inst|apb_adc0_inst|adc_inst.db[8] ),
  7591. .D(vcc),
  7592. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~15_cout ),
  7593. .Qin(\macro_inst|apb_adc0_inst|apb_db [8]),
  7594. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X57_Y4_SIG_SIG ),
  7595. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  7596. .SyncReset(SyncReset_X57_Y4_GND),
  7597. .ShiftData(),
  7598. .SyncLoad(SyncLoad_X57_Y4_VCC),
  7599. .LutOut(),
  7600. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~17_cout ),
  7601. .Q(\macro_inst|apb_adc0_inst|apb_db [8]));
  7602. defparam \macro_inst|apb_adc0_inst|apb_db[8] .coord_x = 19;
  7603. defparam \macro_inst|apb_adc0_inst|apb_db[8] .coord_y = 5;
  7604. defparam \macro_inst|apb_adc0_inst|apb_db[8] .coord_z = 11;
  7605. defparam \macro_inst|apb_adc0_inst|apb_db[8] .mask = 16'h004D;
  7606. defparam \macro_inst|apb_adc0_inst|apb_db[8] .modeMux = 1'b1;
  7607. defparam \macro_inst|apb_adc0_inst|apb_db[8] .FeedbackMux = 1'b0;
  7608. defparam \macro_inst|apb_adc0_inst|apb_db[8] .ShiftMux = 1'b0;
  7609. defparam \macro_inst|apb_adc0_inst|apb_db[8] .BypassEn = 1'b1;
  7610. defparam \macro_inst|apb_adc0_inst|apb_db[8] .CarryEnb = 1'b0;
  7611. alta_slice \macro_inst|apb_adc0_inst|apb_db[9] (
  7612. .A(\macro_inst|apb_adc0_inst|apb_db [9]),
  7613. .B(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  7614. .C(\macro_inst|apb_adc0_inst|adc_inst.db[9] ),
  7615. .D(vcc),
  7616. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~17_cout ),
  7617. .Qin(\macro_inst|apb_adc0_inst|apb_db [9]),
  7618. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|apb_adc0_inst|always1~0_combout_X56_Y4_SIG_SIG ),
  7619. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7620. .SyncReset(SyncReset_X56_Y4_GND),
  7621. .ShiftData(),
  7622. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7623. .LutOut(),
  7624. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~19_cout ),
  7625. .Q(\macro_inst|apb_adc0_inst|apb_db [9]));
  7626. defparam \macro_inst|apb_adc0_inst|apb_db[9] .coord_x = 20;
  7627. defparam \macro_inst|apb_adc0_inst|apb_db[9] .coord_y = 5;
  7628. defparam \macro_inst|apb_adc0_inst|apb_db[9] .coord_z = 9;
  7629. defparam \macro_inst|apb_adc0_inst|apb_db[9] .mask = 16'h004D;
  7630. defparam \macro_inst|apb_adc0_inst|apb_db[9] .modeMux = 1'b1;
  7631. defparam \macro_inst|apb_adc0_inst|apb_db[9] .FeedbackMux = 1'b0;
  7632. defparam \macro_inst|apb_adc0_inst|apb_db[9] .ShiftMux = 1'b0;
  7633. defparam \macro_inst|apb_adc0_inst|apb_db[9] .BypassEn = 1'b1;
  7634. defparam \macro_inst|apb_adc0_inst|apb_db[9] .CarryEnb = 1'b0;
  7635. alta_slice \macro_inst|apb_adc0_inst|apb_eoc (
  7636. .A(\macro_inst|apb_adc0_inst|apb_db [1]),
  7637. .B(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  7638. .C(\macro_inst|apb_adc0_inst|adc_inst.eoc ),
  7639. .D(vcc),
  7640. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~1_cout ),
  7641. .Qin(\macro_inst|apb_adc0_inst|apb_eoc~q ),
  7642. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y4_SIG_VCC ),
  7643. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  7644. .SyncReset(SyncReset_X56_Y4_GND),
  7645. .ShiftData(),
  7646. .SyncLoad(SyncLoad_X56_Y4_VCC),
  7647. .LutOut(),
  7648. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~3_cout ),
  7649. .Q(\macro_inst|apb_adc0_inst|apb_eoc~q ));
  7650. defparam \macro_inst|apb_adc0_inst|apb_eoc .coord_x = 20;
  7651. defparam \macro_inst|apb_adc0_inst|apb_eoc .coord_y = 5;
  7652. defparam \macro_inst|apb_adc0_inst|apb_eoc .coord_z = 1;
  7653. defparam \macro_inst|apb_adc0_inst|apb_eoc .mask = 16'h004D;
  7654. defparam \macro_inst|apb_adc0_inst|apb_eoc .modeMux = 1'b1;
  7655. defparam \macro_inst|apb_adc0_inst|apb_eoc .FeedbackMux = 1'b0;
  7656. defparam \macro_inst|apb_adc0_inst|apb_eoc .ShiftMux = 1'b0;
  7657. defparam \macro_inst|apb_adc0_inst|apb_eoc .BypassEn = 1'b1;
  7658. defparam \macro_inst|apb_adc0_inst|apb_eoc .CarryEnb = 1'b0;
  7659. alta_slice \macro_inst|apb_adc0_inst|sclk (
  7660. .A(\macro_inst|apb_adc0_inst|Equal0~6_combout ),
  7661. .B(\macro_inst|apb_adc0_inst|Equal0~5_combout ),
  7662. .C(vcc),
  7663. .D(\macro_inst|apb_adc0_inst|Equal0~4_combout ),
  7664. .Cin(),
  7665. .Qin(\macro_inst|apb_adc0_inst|sclk~q ),
  7666. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y10_SIG_VCC ),
  7667. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  7668. .SyncReset(\macro_inst|cfg_reg_inst|adc_en~q__SyncReset_X61_Y10_INV ),
  7669. .ShiftData(),
  7670. .SyncLoad(SyncLoad_X61_Y10_GND),
  7671. .LutOut(\macro_inst|apb_adc0_inst|sclk~0_combout ),
  7672. .Cout(),
  7673. .Q(\macro_inst|apb_adc0_inst|sclk~q ));
  7674. defparam \macro_inst|apb_adc0_inst|sclk .coord_x = 19;
  7675. defparam \macro_inst|apb_adc0_inst|sclk .coord_y = 11;
  7676. defparam \macro_inst|apb_adc0_inst|sclk .coord_z = 3;
  7677. defparam \macro_inst|apb_adc0_inst|sclk .mask = 16'h78F0;
  7678. defparam \macro_inst|apb_adc0_inst|sclk .modeMux = 1'b0;
  7679. defparam \macro_inst|apb_adc0_inst|sclk .FeedbackMux = 1'b1;
  7680. defparam \macro_inst|apb_adc0_inst|sclk .ShiftMux = 1'b0;
  7681. defparam \macro_inst|apb_adc0_inst|sclk .BypassEn = 1'b1;
  7682. defparam \macro_inst|apb_adc0_inst|sclk .CarryEnb = 1'b1;
  7683. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[0] (
  7684. .A(vcc),
  7685. .B(\macro_inst|apb_adc0_inst|sclk_counter [0]),
  7686. .C(vcc),
  7687. .D(vcc),
  7688. .Cin(),
  7689. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [0]),
  7690. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7691. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7692. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7693. .ShiftData(),
  7694. .SyncLoad(SyncLoad_X62_Y10_GND),
  7695. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[0]~16_combout ),
  7696. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[0]~17 ),
  7697. .Q(\macro_inst|apb_adc0_inst|sclk_counter [0]));
  7698. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .coord_x = 20;
  7699. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .coord_y = 11;
  7700. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .coord_z = 0;
  7701. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .mask = 16'h33CC;
  7702. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .modeMux = 1'b0;
  7703. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .FeedbackMux = 1'b0;
  7704. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .ShiftMux = 1'b0;
  7705. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .BypassEn = 1'b1;
  7706. defparam \macro_inst|apb_adc0_inst|sclk_counter[0] .CarryEnb = 1'b0;
  7707. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[10] (
  7708. .A(vcc),
  7709. .B(\macro_inst|apb_adc0_inst|sclk_counter [10]),
  7710. .C(vcc),
  7711. .D(vcc),
  7712. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[9]~36 ),
  7713. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [10]),
  7714. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7715. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7716. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7717. .ShiftData(),
  7718. .SyncLoad(SyncLoad_X62_Y10_GND),
  7719. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[10]~37_combout ),
  7720. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[10]~38 ),
  7721. .Q(\macro_inst|apb_adc0_inst|sclk_counter [10]));
  7722. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .coord_x = 20;
  7723. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .coord_y = 11;
  7724. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .coord_z = 10;
  7725. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .mask = 16'hC30C;
  7726. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .modeMux = 1'b1;
  7727. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .FeedbackMux = 1'b0;
  7728. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .ShiftMux = 1'b0;
  7729. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .BypassEn = 1'b1;
  7730. defparam \macro_inst|apb_adc0_inst|sclk_counter[10] .CarryEnb = 1'b0;
  7731. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[11] (
  7732. .A(vcc),
  7733. .B(\macro_inst|apb_adc0_inst|sclk_counter [11]),
  7734. .C(vcc),
  7735. .D(vcc),
  7736. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[10]~38 ),
  7737. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [11]),
  7738. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7739. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7740. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7741. .ShiftData(),
  7742. .SyncLoad(SyncLoad_X62_Y10_GND),
  7743. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[11]~39_combout ),
  7744. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[11]~40 ),
  7745. .Q(\macro_inst|apb_adc0_inst|sclk_counter [11]));
  7746. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .coord_x = 20;
  7747. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .coord_y = 11;
  7748. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .coord_z = 11;
  7749. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .mask = 16'h3C3F;
  7750. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .modeMux = 1'b1;
  7751. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .FeedbackMux = 1'b0;
  7752. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .ShiftMux = 1'b0;
  7753. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .BypassEn = 1'b1;
  7754. defparam \macro_inst|apb_adc0_inst|sclk_counter[11] .CarryEnb = 1'b0;
  7755. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[12] (
  7756. .A(vcc),
  7757. .B(\macro_inst|apb_adc0_inst|sclk_counter [12]),
  7758. .C(vcc),
  7759. .D(vcc),
  7760. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[11]~40 ),
  7761. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [12]),
  7762. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7763. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7764. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7765. .ShiftData(),
  7766. .SyncLoad(SyncLoad_X62_Y10_GND),
  7767. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[12]~41_combout ),
  7768. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[12]~42 ),
  7769. .Q(\macro_inst|apb_adc0_inst|sclk_counter [12]));
  7770. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .coord_x = 20;
  7771. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .coord_y = 11;
  7772. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .coord_z = 12;
  7773. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .mask = 16'hC30C;
  7774. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .modeMux = 1'b1;
  7775. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .FeedbackMux = 1'b0;
  7776. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .ShiftMux = 1'b0;
  7777. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .BypassEn = 1'b1;
  7778. defparam \macro_inst|apb_adc0_inst|sclk_counter[12] .CarryEnb = 1'b0;
  7779. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[13] (
  7780. .A(vcc),
  7781. .B(\macro_inst|apb_adc0_inst|sclk_counter [13]),
  7782. .C(vcc),
  7783. .D(vcc),
  7784. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[12]~42 ),
  7785. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [13]),
  7786. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7787. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7788. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7789. .ShiftData(),
  7790. .SyncLoad(SyncLoad_X62_Y10_GND),
  7791. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[13]~43_combout ),
  7792. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[13]~44 ),
  7793. .Q(\macro_inst|apb_adc0_inst|sclk_counter [13]));
  7794. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .coord_x = 20;
  7795. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .coord_y = 11;
  7796. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .coord_z = 13;
  7797. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .mask = 16'h3C3F;
  7798. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .modeMux = 1'b1;
  7799. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .FeedbackMux = 1'b0;
  7800. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .ShiftMux = 1'b0;
  7801. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .BypassEn = 1'b1;
  7802. defparam \macro_inst|apb_adc0_inst|sclk_counter[13] .CarryEnb = 1'b0;
  7803. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[14] (
  7804. .A(vcc),
  7805. .B(\macro_inst|apb_adc0_inst|sclk_counter [14]),
  7806. .C(vcc),
  7807. .D(vcc),
  7808. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[13]~44 ),
  7809. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [14]),
  7810. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7811. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7812. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7813. .ShiftData(),
  7814. .SyncLoad(SyncLoad_X62_Y10_GND),
  7815. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[14]~45_combout ),
  7816. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[14]~46 ),
  7817. .Q(\macro_inst|apb_adc0_inst|sclk_counter [14]));
  7818. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .coord_x = 20;
  7819. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .coord_y = 11;
  7820. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .coord_z = 14;
  7821. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .mask = 16'hC30C;
  7822. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .modeMux = 1'b1;
  7823. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .FeedbackMux = 1'b0;
  7824. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .ShiftMux = 1'b0;
  7825. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .BypassEn = 1'b1;
  7826. defparam \macro_inst|apb_adc0_inst|sclk_counter[14] .CarryEnb = 1'b0;
  7827. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[15] (
  7828. .A(vcc),
  7829. .B(\macro_inst|apb_adc0_inst|sclk_counter [15]),
  7830. .C(vcc),
  7831. .D(vcc),
  7832. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[14]~46 ),
  7833. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [15]),
  7834. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7835. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7836. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7837. .ShiftData(),
  7838. .SyncLoad(SyncLoad_X62_Y10_GND),
  7839. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[15]~47_combout ),
  7840. .Cout(),
  7841. .Q(\macro_inst|apb_adc0_inst|sclk_counter [15]));
  7842. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .coord_x = 20;
  7843. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .coord_y = 11;
  7844. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .coord_z = 15;
  7845. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .mask = 16'h3C3C;
  7846. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .modeMux = 1'b1;
  7847. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .FeedbackMux = 1'b0;
  7848. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .ShiftMux = 1'b0;
  7849. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .BypassEn = 1'b1;
  7850. defparam \macro_inst|apb_adc0_inst|sclk_counter[15] .CarryEnb = 1'b1;
  7851. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[1] (
  7852. .A(vcc),
  7853. .B(\macro_inst|apb_adc0_inst|sclk_counter [1]),
  7854. .C(vcc),
  7855. .D(vcc),
  7856. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[0]~17 ),
  7857. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [1]),
  7858. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7859. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7860. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7861. .ShiftData(),
  7862. .SyncLoad(SyncLoad_X62_Y10_GND),
  7863. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[1]~19_combout ),
  7864. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[1]~20 ),
  7865. .Q(\macro_inst|apb_adc0_inst|sclk_counter [1]));
  7866. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .coord_x = 20;
  7867. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .coord_y = 11;
  7868. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .coord_z = 1;
  7869. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .mask = 16'h3C3F;
  7870. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .modeMux = 1'b1;
  7871. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .FeedbackMux = 1'b0;
  7872. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .ShiftMux = 1'b0;
  7873. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .BypassEn = 1'b1;
  7874. defparam \macro_inst|apb_adc0_inst|sclk_counter[1] .CarryEnb = 1'b0;
  7875. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[2] (
  7876. .A(vcc),
  7877. .B(\macro_inst|apb_adc0_inst|sclk_counter [2]),
  7878. .C(vcc),
  7879. .D(vcc),
  7880. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[1]~20 ),
  7881. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [2]),
  7882. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7883. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7884. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7885. .ShiftData(),
  7886. .SyncLoad(SyncLoad_X62_Y10_GND),
  7887. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[2]~21_combout ),
  7888. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[2]~22 ),
  7889. .Q(\macro_inst|apb_adc0_inst|sclk_counter [2]));
  7890. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .coord_x = 20;
  7891. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .coord_y = 11;
  7892. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .coord_z = 2;
  7893. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .mask = 16'hC30C;
  7894. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .modeMux = 1'b1;
  7895. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .FeedbackMux = 1'b0;
  7896. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .ShiftMux = 1'b0;
  7897. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .BypassEn = 1'b1;
  7898. defparam \macro_inst|apb_adc0_inst|sclk_counter[2] .CarryEnb = 1'b0;
  7899. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[3] (
  7900. .A(vcc),
  7901. .B(\macro_inst|apb_adc0_inst|sclk_counter [3]),
  7902. .C(vcc),
  7903. .D(vcc),
  7904. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[2]~22 ),
  7905. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [3]),
  7906. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7907. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7908. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7909. .ShiftData(),
  7910. .SyncLoad(SyncLoad_X62_Y10_GND),
  7911. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[3]~23_combout ),
  7912. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[3]~24 ),
  7913. .Q(\macro_inst|apb_adc0_inst|sclk_counter [3]));
  7914. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .coord_x = 20;
  7915. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .coord_y = 11;
  7916. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .coord_z = 3;
  7917. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .mask = 16'h3C3F;
  7918. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .modeMux = 1'b1;
  7919. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .FeedbackMux = 1'b0;
  7920. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .ShiftMux = 1'b0;
  7921. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .BypassEn = 1'b1;
  7922. defparam \macro_inst|apb_adc0_inst|sclk_counter[3] .CarryEnb = 1'b0;
  7923. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[4] (
  7924. .A(vcc),
  7925. .B(\macro_inst|apb_adc0_inst|sclk_counter [4]),
  7926. .C(vcc),
  7927. .D(vcc),
  7928. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[3]~24 ),
  7929. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [4]),
  7930. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7931. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7932. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7933. .ShiftData(),
  7934. .SyncLoad(SyncLoad_X62_Y10_GND),
  7935. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[4]~25_combout ),
  7936. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[4]~26 ),
  7937. .Q(\macro_inst|apb_adc0_inst|sclk_counter [4]));
  7938. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .coord_x = 20;
  7939. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .coord_y = 11;
  7940. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .coord_z = 4;
  7941. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .mask = 16'hC30C;
  7942. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .modeMux = 1'b1;
  7943. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .FeedbackMux = 1'b0;
  7944. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .ShiftMux = 1'b0;
  7945. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .BypassEn = 1'b1;
  7946. defparam \macro_inst|apb_adc0_inst|sclk_counter[4] .CarryEnb = 1'b0;
  7947. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[5] (
  7948. .A(vcc),
  7949. .B(\macro_inst|apb_adc0_inst|sclk_counter [5]),
  7950. .C(vcc),
  7951. .D(vcc),
  7952. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[4]~26 ),
  7953. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [5]),
  7954. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7955. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7956. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7957. .ShiftData(),
  7958. .SyncLoad(SyncLoad_X62_Y10_GND),
  7959. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[5]~27_combout ),
  7960. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[5]~28 ),
  7961. .Q(\macro_inst|apb_adc0_inst|sclk_counter [5]));
  7962. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .coord_x = 20;
  7963. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .coord_y = 11;
  7964. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .coord_z = 5;
  7965. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .mask = 16'h3C3F;
  7966. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .modeMux = 1'b1;
  7967. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .FeedbackMux = 1'b0;
  7968. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .ShiftMux = 1'b0;
  7969. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .BypassEn = 1'b1;
  7970. defparam \macro_inst|apb_adc0_inst|sclk_counter[5] .CarryEnb = 1'b0;
  7971. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[6] (
  7972. .A(vcc),
  7973. .B(\macro_inst|apb_adc0_inst|sclk_counter [6]),
  7974. .C(vcc),
  7975. .D(vcc),
  7976. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[5]~28 ),
  7977. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [6]),
  7978. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  7979. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  7980. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  7981. .ShiftData(),
  7982. .SyncLoad(SyncLoad_X62_Y10_GND),
  7983. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[6]~29_combout ),
  7984. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[6]~30 ),
  7985. .Q(\macro_inst|apb_adc0_inst|sclk_counter [6]));
  7986. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .coord_x = 20;
  7987. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .coord_y = 11;
  7988. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .coord_z = 6;
  7989. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .mask = 16'hC30C;
  7990. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .modeMux = 1'b1;
  7991. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .FeedbackMux = 1'b0;
  7992. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .ShiftMux = 1'b0;
  7993. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .BypassEn = 1'b1;
  7994. defparam \macro_inst|apb_adc0_inst|sclk_counter[6] .CarryEnb = 1'b0;
  7995. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[7] (
  7996. .A(vcc),
  7997. .B(\macro_inst|apb_adc0_inst|sclk_counter [7]),
  7998. .C(vcc),
  7999. .D(vcc),
  8000. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[6]~30 ),
  8001. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [7]),
  8002. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  8003. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  8004. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  8005. .ShiftData(),
  8006. .SyncLoad(SyncLoad_X62_Y10_GND),
  8007. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[7]~31_combout ),
  8008. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[7]~32 ),
  8009. .Q(\macro_inst|apb_adc0_inst|sclk_counter [7]));
  8010. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .coord_x = 20;
  8011. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .coord_y = 11;
  8012. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .coord_z = 7;
  8013. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .mask = 16'h3C3F;
  8014. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .modeMux = 1'b1;
  8015. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .FeedbackMux = 1'b0;
  8016. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .ShiftMux = 1'b0;
  8017. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .BypassEn = 1'b1;
  8018. defparam \macro_inst|apb_adc0_inst|sclk_counter[7] .CarryEnb = 1'b0;
  8019. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[7]~18 (
  8020. .A(\macro_inst|apb_adc0_inst|Equal0~5_combout ),
  8021. .B(\macro_inst|apb_adc0_inst|Equal0~4_combout ),
  8022. .C(\macro_inst|apb_adc0_inst|Equal0~6_combout ),
  8023. .D(\macro_inst|cfg_reg_inst|adc_en~q ),
  8024. .Cin(),
  8025. .Qin(),
  8026. .Clk(),
  8027. .AsyncReset(),
  8028. .SyncReset(),
  8029. .ShiftData(),
  8030. .SyncLoad(),
  8031. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout ),
  8032. .Cout(),
  8033. .Q());
  8034. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .coord_x = 19;
  8035. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .coord_y = 11;
  8036. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .coord_z = 8;
  8037. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .mask = 16'h80FF;
  8038. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .modeMux = 1'b0;
  8039. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .FeedbackMux = 1'b0;
  8040. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .ShiftMux = 1'b0;
  8041. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .BypassEn = 1'b0;
  8042. defparam \macro_inst|apb_adc0_inst|sclk_counter[7]~18 .CarryEnb = 1'b1;
  8043. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[8] (
  8044. .A(vcc),
  8045. .B(\macro_inst|apb_adc0_inst|sclk_counter [8]),
  8046. .C(vcc),
  8047. .D(vcc),
  8048. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[7]~32 ),
  8049. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [8]),
  8050. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  8051. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  8052. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  8053. .ShiftData(),
  8054. .SyncLoad(SyncLoad_X62_Y10_GND),
  8055. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[8]~33_combout ),
  8056. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[8]~34 ),
  8057. .Q(\macro_inst|apb_adc0_inst|sclk_counter [8]));
  8058. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .coord_x = 20;
  8059. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .coord_y = 11;
  8060. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .coord_z = 8;
  8061. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .mask = 16'hC30C;
  8062. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .modeMux = 1'b1;
  8063. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .FeedbackMux = 1'b0;
  8064. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .ShiftMux = 1'b0;
  8065. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .BypassEn = 1'b1;
  8066. defparam \macro_inst|apb_adc0_inst|sclk_counter[8] .CarryEnb = 1'b0;
  8067. alta_slice \macro_inst|apb_adc0_inst|sclk_counter[9] (
  8068. .A(vcc),
  8069. .B(\macro_inst|apb_adc0_inst|sclk_counter [9]),
  8070. .C(vcc),
  8071. .D(vcc),
  8072. .Cin(\macro_inst|apb_adc0_inst|sclk_counter[8]~34 ),
  8073. .Qin(\macro_inst|apb_adc0_inst|sclk_counter [9]),
  8074. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y10_SIG_VCC ),
  8075. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  8076. .SyncReset(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ),
  8077. .ShiftData(),
  8078. .SyncLoad(SyncLoad_X62_Y10_GND),
  8079. .LutOut(\macro_inst|apb_adc0_inst|sclk_counter[9]~35_combout ),
  8080. .Cout(\macro_inst|apb_adc0_inst|sclk_counter[9]~36 ),
  8081. .Q(\macro_inst|apb_adc0_inst|sclk_counter [9]));
  8082. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .coord_x = 20;
  8083. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .coord_y = 11;
  8084. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .coord_z = 9;
  8085. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .mask = 16'h3C3F;
  8086. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .modeMux = 1'b1;
  8087. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .FeedbackMux = 1'b0;
  8088. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .ShiftMux = 1'b0;
  8089. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .BypassEn = 1'b1;
  8090. defparam \macro_inst|apb_adc0_inst|sclk_counter[9] .CarryEnb = 1'b0;
  8091. alta_slice \macro_inst|apb_dac0_inst|Add2~20 (
  8092. .A(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8093. .B(\macro_inst|apb_dac0_inst|Mux9~1_combout ),
  8094. .C(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8095. .D(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  8096. .Cin(),
  8097. .Qin(),
  8098. .Clk(),
  8099. .AsyncReset(),
  8100. .SyncReset(),
  8101. .ShiftData(),
  8102. .SyncLoad(),
  8103. .LutOut(\macro_inst|apb_dac0_inst|Add2~20_combout ),
  8104. .Cout(),
  8105. .Q());
  8106. defparam \macro_inst|apb_dac0_inst|Add2~20 .coord_x = 16;
  8107. defparam \macro_inst|apb_dac0_inst|Add2~20 .coord_y = 6;
  8108. defparam \macro_inst|apb_dac0_inst|Add2~20 .coord_z = 0;
  8109. defparam \macro_inst|apb_dac0_inst|Add2~20 .mask = 16'hF404;
  8110. defparam \macro_inst|apb_dac0_inst|Add2~20 .modeMux = 1'b0;
  8111. defparam \macro_inst|apb_dac0_inst|Add2~20 .FeedbackMux = 1'b0;
  8112. defparam \macro_inst|apb_dac0_inst|Add2~20 .ShiftMux = 1'b0;
  8113. defparam \macro_inst|apb_dac0_inst|Add2~20 .BypassEn = 1'b0;
  8114. defparam \macro_inst|apb_dac0_inst|Add2~20 .CarryEnb = 1'b1;
  8115. alta_slice \macro_inst|apb_dac0_inst|Add2~21 (
  8116. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  8117. .B(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  8118. .C(vcc),
  8119. .D(vcc),
  8120. .Cin(),
  8121. .Qin(),
  8122. .Clk(),
  8123. .AsyncReset(),
  8124. .SyncReset(),
  8125. .ShiftData(),
  8126. .SyncLoad(),
  8127. .LutOut(\macro_inst|apb_dac0_inst|Add2~21_combout ),
  8128. .Cout(\macro_inst|apb_dac0_inst|Add2~22 ),
  8129. .Q());
  8130. defparam \macro_inst|apb_dac0_inst|Add2~21 .coord_x = 16;
  8131. defparam \macro_inst|apb_dac0_inst|Add2~21 .coord_y = 5;
  8132. defparam \macro_inst|apb_dac0_inst|Add2~21 .coord_z = 2;
  8133. defparam \macro_inst|apb_dac0_inst|Add2~21 .mask = 16'h6688;
  8134. defparam \macro_inst|apb_dac0_inst|Add2~21 .modeMux = 1'b0;
  8135. defparam \macro_inst|apb_dac0_inst|Add2~21 .FeedbackMux = 1'b0;
  8136. defparam \macro_inst|apb_dac0_inst|Add2~21 .ShiftMux = 1'b0;
  8137. defparam \macro_inst|apb_dac0_inst|Add2~21 .BypassEn = 1'b0;
  8138. defparam \macro_inst|apb_dac0_inst|Add2~21 .CarryEnb = 1'b0;
  8139. alta_slice \macro_inst|apb_dac0_inst|Add2~23 (
  8140. .A(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  8141. .B(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8142. .C(\macro_inst|apb_dac0_inst|Mux8~1_combout ),
  8143. .D(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8144. .Cin(),
  8145. .Qin(),
  8146. .Clk(),
  8147. .AsyncReset(),
  8148. .SyncReset(),
  8149. .ShiftData(),
  8150. .SyncLoad(),
  8151. .LutOut(\macro_inst|apb_dac0_inst|Add2~23_combout ),
  8152. .Cout(),
  8153. .Q());
  8154. defparam \macro_inst|apb_dac0_inst|Add2~23 .coord_x = 15;
  8155. defparam \macro_inst|apb_dac0_inst|Add2~23 .coord_y = 5;
  8156. defparam \macro_inst|apb_dac0_inst|Add2~23 .coord_z = 9;
  8157. defparam \macro_inst|apb_dac0_inst|Add2~23 .mask = 16'hAA30;
  8158. defparam \macro_inst|apb_dac0_inst|Add2~23 .modeMux = 1'b0;
  8159. defparam \macro_inst|apb_dac0_inst|Add2~23 .FeedbackMux = 1'b0;
  8160. defparam \macro_inst|apb_dac0_inst|Add2~23 .ShiftMux = 1'b0;
  8161. defparam \macro_inst|apb_dac0_inst|Add2~23 .BypassEn = 1'b0;
  8162. defparam \macro_inst|apb_dac0_inst|Add2~23 .CarryEnb = 1'b1;
  8163. alta_slice \macro_inst|apb_dac0_inst|Add2~24 (
  8164. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  8165. .B(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  8166. .C(vcc),
  8167. .D(vcc),
  8168. .Cin(\macro_inst|apb_dac0_inst|Add2~22 ),
  8169. .Qin(),
  8170. .Clk(),
  8171. .AsyncReset(),
  8172. .SyncReset(),
  8173. .ShiftData(),
  8174. .SyncLoad(),
  8175. .LutOut(\macro_inst|apb_dac0_inst|Add2~24_combout ),
  8176. .Cout(\macro_inst|apb_dac0_inst|Add2~25 ),
  8177. .Q());
  8178. defparam \macro_inst|apb_dac0_inst|Add2~24 .coord_x = 16;
  8179. defparam \macro_inst|apb_dac0_inst|Add2~24 .coord_y = 5;
  8180. defparam \macro_inst|apb_dac0_inst|Add2~24 .coord_z = 3;
  8181. defparam \macro_inst|apb_dac0_inst|Add2~24 .mask = 16'h9617;
  8182. defparam \macro_inst|apb_dac0_inst|Add2~24 .modeMux = 1'b1;
  8183. defparam \macro_inst|apb_dac0_inst|Add2~24 .FeedbackMux = 1'b0;
  8184. defparam \macro_inst|apb_dac0_inst|Add2~24 .ShiftMux = 1'b0;
  8185. defparam \macro_inst|apb_dac0_inst|Add2~24 .BypassEn = 1'b0;
  8186. defparam \macro_inst|apb_dac0_inst|Add2~24 .CarryEnb = 1'b0;
  8187. alta_slice \macro_inst|apb_dac0_inst|Add2~26 (
  8188. .A(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8189. .B(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  8190. .C(\macro_inst|apb_dac0_inst|Mux7~5_combout ),
  8191. .D(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8192. .Cin(),
  8193. .Qin(),
  8194. .Clk(),
  8195. .AsyncReset(),
  8196. .SyncReset(),
  8197. .ShiftData(),
  8198. .SyncLoad(),
  8199. .LutOut(\macro_inst|apb_dac0_inst|Add2~26_combout ),
  8200. .Cout(),
  8201. .Q());
  8202. defparam \macro_inst|apb_dac0_inst|Add2~26 .coord_x = 16;
  8203. defparam \macro_inst|apb_dac0_inst|Add2~26 .coord_y = 5;
  8204. defparam \macro_inst|apb_dac0_inst|Add2~26 .coord_z = 13;
  8205. defparam \macro_inst|apb_dac0_inst|Add2~26 .mask = 16'hCC50;
  8206. defparam \macro_inst|apb_dac0_inst|Add2~26 .modeMux = 1'b0;
  8207. defparam \macro_inst|apb_dac0_inst|Add2~26 .FeedbackMux = 1'b0;
  8208. defparam \macro_inst|apb_dac0_inst|Add2~26 .ShiftMux = 1'b0;
  8209. defparam \macro_inst|apb_dac0_inst|Add2~26 .BypassEn = 1'b0;
  8210. defparam \macro_inst|apb_dac0_inst|Add2~26 .CarryEnb = 1'b1;
  8211. alta_slice \macro_inst|apb_dac0_inst|Add2~27 (
  8212. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  8213. .B(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  8214. .C(vcc),
  8215. .D(vcc),
  8216. .Cin(\macro_inst|apb_dac0_inst|Add2~25 ),
  8217. .Qin(),
  8218. .Clk(),
  8219. .AsyncReset(),
  8220. .SyncReset(),
  8221. .ShiftData(),
  8222. .SyncLoad(),
  8223. .LutOut(\macro_inst|apb_dac0_inst|Add2~27_combout ),
  8224. .Cout(\macro_inst|apb_dac0_inst|Add2~28 ),
  8225. .Q());
  8226. defparam \macro_inst|apb_dac0_inst|Add2~27 .coord_x = 16;
  8227. defparam \macro_inst|apb_dac0_inst|Add2~27 .coord_y = 5;
  8228. defparam \macro_inst|apb_dac0_inst|Add2~27 .coord_z = 4;
  8229. defparam \macro_inst|apb_dac0_inst|Add2~27 .mask = 16'h698E;
  8230. defparam \macro_inst|apb_dac0_inst|Add2~27 .modeMux = 1'b1;
  8231. defparam \macro_inst|apb_dac0_inst|Add2~27 .FeedbackMux = 1'b0;
  8232. defparam \macro_inst|apb_dac0_inst|Add2~27 .ShiftMux = 1'b0;
  8233. defparam \macro_inst|apb_dac0_inst|Add2~27 .BypassEn = 1'b0;
  8234. defparam \macro_inst|apb_dac0_inst|Add2~27 .CarryEnb = 1'b0;
  8235. alta_slice \macro_inst|apb_dac0_inst|Add2~29 (
  8236. .A(\macro_inst|apb_dac0_inst|Mux6~1_combout ),
  8237. .B(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8238. .C(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  8239. .D(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8240. .Cin(),
  8241. .Qin(),
  8242. .Clk(),
  8243. .AsyncReset(),
  8244. .SyncReset(),
  8245. .ShiftData(),
  8246. .SyncLoad(),
  8247. .LutOut(\macro_inst|apb_dac0_inst|Add2~29_combout ),
  8248. .Cout(),
  8249. .Q());
  8250. defparam \macro_inst|apb_dac0_inst|Add2~29 .coord_x = 15;
  8251. defparam \macro_inst|apb_dac0_inst|Add2~29 .coord_y = 5;
  8252. defparam \macro_inst|apb_dac0_inst|Add2~29 .coord_z = 10;
  8253. defparam \macro_inst|apb_dac0_inst|Add2~29 .mask = 16'hC0E2;
  8254. defparam \macro_inst|apb_dac0_inst|Add2~29 .modeMux = 1'b0;
  8255. defparam \macro_inst|apb_dac0_inst|Add2~29 .FeedbackMux = 1'b0;
  8256. defparam \macro_inst|apb_dac0_inst|Add2~29 .ShiftMux = 1'b0;
  8257. defparam \macro_inst|apb_dac0_inst|Add2~29 .BypassEn = 1'b0;
  8258. defparam \macro_inst|apb_dac0_inst|Add2~29 .CarryEnb = 1'b1;
  8259. alta_slice \macro_inst|apb_dac0_inst|Add2~30 (
  8260. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  8261. .B(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  8262. .C(vcc),
  8263. .D(vcc),
  8264. .Cin(\macro_inst|apb_dac0_inst|Add2~28 ),
  8265. .Qin(),
  8266. .Clk(),
  8267. .AsyncReset(),
  8268. .SyncReset(),
  8269. .ShiftData(),
  8270. .SyncLoad(),
  8271. .LutOut(\macro_inst|apb_dac0_inst|Add2~30_combout ),
  8272. .Cout(\macro_inst|apb_dac0_inst|Add2~31 ),
  8273. .Q());
  8274. defparam \macro_inst|apb_dac0_inst|Add2~30 .coord_x = 16;
  8275. defparam \macro_inst|apb_dac0_inst|Add2~30 .coord_y = 5;
  8276. defparam \macro_inst|apb_dac0_inst|Add2~30 .coord_z = 5;
  8277. defparam \macro_inst|apb_dac0_inst|Add2~30 .mask = 16'h9617;
  8278. defparam \macro_inst|apb_dac0_inst|Add2~30 .modeMux = 1'b1;
  8279. defparam \macro_inst|apb_dac0_inst|Add2~30 .FeedbackMux = 1'b0;
  8280. defparam \macro_inst|apb_dac0_inst|Add2~30 .ShiftMux = 1'b0;
  8281. defparam \macro_inst|apb_dac0_inst|Add2~30 .BypassEn = 1'b0;
  8282. defparam \macro_inst|apb_dac0_inst|Add2~30 .CarryEnb = 1'b0;
  8283. alta_slice \macro_inst|apb_dac0_inst|Add2~32 (
  8284. .A(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8285. .B(\macro_inst|apb_dac0_inst|Mux5~1_combout ),
  8286. .C(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  8287. .D(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8288. .Cin(),
  8289. .Qin(),
  8290. .Clk(),
  8291. .AsyncReset(),
  8292. .SyncReset(),
  8293. .ShiftData(),
  8294. .SyncLoad(),
  8295. .LutOut(\macro_inst|apb_dac0_inst|Add2~32_combout ),
  8296. .Cout(),
  8297. .Q());
  8298. defparam \macro_inst|apb_dac0_inst|Add2~32 .coord_x = 16;
  8299. defparam \macro_inst|apb_dac0_inst|Add2~32 .coord_y = 8;
  8300. defparam \macro_inst|apb_dac0_inst|Add2~32 .coord_z = 2;
  8301. defparam \macro_inst|apb_dac0_inst|Add2~32 .mask = 16'hA0E4;
  8302. defparam \macro_inst|apb_dac0_inst|Add2~32 .modeMux = 1'b0;
  8303. defparam \macro_inst|apb_dac0_inst|Add2~32 .FeedbackMux = 1'b0;
  8304. defparam \macro_inst|apb_dac0_inst|Add2~32 .ShiftMux = 1'b0;
  8305. defparam \macro_inst|apb_dac0_inst|Add2~32 .BypassEn = 1'b0;
  8306. defparam \macro_inst|apb_dac0_inst|Add2~32 .CarryEnb = 1'b1;
  8307. alta_slice \macro_inst|apb_dac0_inst|Add2~33 (
  8308. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  8309. .B(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  8310. .C(vcc),
  8311. .D(vcc),
  8312. .Cin(\macro_inst|apb_dac0_inst|Add2~31 ),
  8313. .Qin(),
  8314. .Clk(),
  8315. .AsyncReset(),
  8316. .SyncReset(),
  8317. .ShiftData(),
  8318. .SyncLoad(),
  8319. .LutOut(\macro_inst|apb_dac0_inst|Add2~33_combout ),
  8320. .Cout(\macro_inst|apb_dac0_inst|Add2~34 ),
  8321. .Q());
  8322. defparam \macro_inst|apb_dac0_inst|Add2~33 .coord_x = 16;
  8323. defparam \macro_inst|apb_dac0_inst|Add2~33 .coord_y = 5;
  8324. defparam \macro_inst|apb_dac0_inst|Add2~33 .coord_z = 6;
  8325. defparam \macro_inst|apb_dac0_inst|Add2~33 .mask = 16'h698E;
  8326. defparam \macro_inst|apb_dac0_inst|Add2~33 .modeMux = 1'b1;
  8327. defparam \macro_inst|apb_dac0_inst|Add2~33 .FeedbackMux = 1'b0;
  8328. defparam \macro_inst|apb_dac0_inst|Add2~33 .ShiftMux = 1'b0;
  8329. defparam \macro_inst|apb_dac0_inst|Add2~33 .BypassEn = 1'b0;
  8330. defparam \macro_inst|apb_dac0_inst|Add2~33 .CarryEnb = 1'b0;
  8331. alta_slice \macro_inst|apb_dac0_inst|Add2~35 (
  8332. .A(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  8333. .B(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8334. .C(\macro_inst|apb_dac0_inst|Mux4~1_combout ),
  8335. .D(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8336. .Cin(),
  8337. .Qin(),
  8338. .Clk(),
  8339. .AsyncReset(),
  8340. .SyncReset(),
  8341. .ShiftData(),
  8342. .SyncLoad(),
  8343. .LutOut(\macro_inst|apb_dac0_inst|Add2~35_combout ),
  8344. .Cout(),
  8345. .Q());
  8346. defparam \macro_inst|apb_dac0_inst|Add2~35 .coord_x = 15;
  8347. defparam \macro_inst|apb_dac0_inst|Add2~35 .coord_y = 5;
  8348. defparam \macro_inst|apb_dac0_inst|Add2~35 .coord_z = 13;
  8349. defparam \macro_inst|apb_dac0_inst|Add2~35 .mask = 16'hAA30;
  8350. defparam \macro_inst|apb_dac0_inst|Add2~35 .modeMux = 1'b0;
  8351. defparam \macro_inst|apb_dac0_inst|Add2~35 .FeedbackMux = 1'b0;
  8352. defparam \macro_inst|apb_dac0_inst|Add2~35 .ShiftMux = 1'b0;
  8353. defparam \macro_inst|apb_dac0_inst|Add2~35 .BypassEn = 1'b0;
  8354. defparam \macro_inst|apb_dac0_inst|Add2~35 .CarryEnb = 1'b1;
  8355. alta_slice \macro_inst|apb_dac0_inst|Add2~36 (
  8356. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  8357. .B(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  8358. .C(vcc),
  8359. .D(vcc),
  8360. .Cin(\macro_inst|apb_dac0_inst|Add2~34 ),
  8361. .Qin(),
  8362. .Clk(),
  8363. .AsyncReset(),
  8364. .SyncReset(),
  8365. .ShiftData(),
  8366. .SyncLoad(),
  8367. .LutOut(\macro_inst|apb_dac0_inst|Add2~36_combout ),
  8368. .Cout(\macro_inst|apb_dac0_inst|Add2~37 ),
  8369. .Q());
  8370. defparam \macro_inst|apb_dac0_inst|Add2~36 .coord_x = 16;
  8371. defparam \macro_inst|apb_dac0_inst|Add2~36 .coord_y = 5;
  8372. defparam \macro_inst|apb_dac0_inst|Add2~36 .coord_z = 7;
  8373. defparam \macro_inst|apb_dac0_inst|Add2~36 .mask = 16'h9617;
  8374. defparam \macro_inst|apb_dac0_inst|Add2~36 .modeMux = 1'b1;
  8375. defparam \macro_inst|apb_dac0_inst|Add2~36 .FeedbackMux = 1'b0;
  8376. defparam \macro_inst|apb_dac0_inst|Add2~36 .ShiftMux = 1'b0;
  8377. defparam \macro_inst|apb_dac0_inst|Add2~36 .BypassEn = 1'b0;
  8378. defparam \macro_inst|apb_dac0_inst|Add2~36 .CarryEnb = 1'b0;
  8379. alta_slice \macro_inst|apb_dac0_inst|Add2~38 (
  8380. .A(\macro_inst|apb_dac0_inst|Mux3~1_combout ),
  8381. .B(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8382. .C(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  8383. .D(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8384. .Cin(),
  8385. .Qin(),
  8386. .Clk(),
  8387. .AsyncReset(),
  8388. .SyncReset(),
  8389. .ShiftData(),
  8390. .SyncLoad(),
  8391. .LutOut(\macro_inst|apb_dac0_inst|Add2~38_combout ),
  8392. .Cout(),
  8393. .Q());
  8394. defparam \macro_inst|apb_dac0_inst|Add2~38 .coord_x = 15;
  8395. defparam \macro_inst|apb_dac0_inst|Add2~38 .coord_y = 5;
  8396. defparam \macro_inst|apb_dac0_inst|Add2~38 .coord_z = 14;
  8397. defparam \macro_inst|apb_dac0_inst|Add2~38 .mask = 16'hC0E2;
  8398. defparam \macro_inst|apb_dac0_inst|Add2~38 .modeMux = 1'b0;
  8399. defparam \macro_inst|apb_dac0_inst|Add2~38 .FeedbackMux = 1'b0;
  8400. defparam \macro_inst|apb_dac0_inst|Add2~38 .ShiftMux = 1'b0;
  8401. defparam \macro_inst|apb_dac0_inst|Add2~38 .BypassEn = 1'b0;
  8402. defparam \macro_inst|apb_dac0_inst|Add2~38 .CarryEnb = 1'b1;
  8403. alta_slice \macro_inst|apb_dac0_inst|Add2~39 (
  8404. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  8405. .B(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  8406. .C(vcc),
  8407. .D(vcc),
  8408. .Cin(\macro_inst|apb_dac0_inst|Add2~37 ),
  8409. .Qin(),
  8410. .Clk(),
  8411. .AsyncReset(),
  8412. .SyncReset(),
  8413. .ShiftData(),
  8414. .SyncLoad(),
  8415. .LutOut(\macro_inst|apb_dac0_inst|Add2~39_combout ),
  8416. .Cout(\macro_inst|apb_dac0_inst|Add2~40 ),
  8417. .Q());
  8418. defparam \macro_inst|apb_dac0_inst|Add2~39 .coord_x = 16;
  8419. defparam \macro_inst|apb_dac0_inst|Add2~39 .coord_y = 5;
  8420. defparam \macro_inst|apb_dac0_inst|Add2~39 .coord_z = 8;
  8421. defparam \macro_inst|apb_dac0_inst|Add2~39 .mask = 16'h698E;
  8422. defparam \macro_inst|apb_dac0_inst|Add2~39 .modeMux = 1'b1;
  8423. defparam \macro_inst|apb_dac0_inst|Add2~39 .FeedbackMux = 1'b0;
  8424. defparam \macro_inst|apb_dac0_inst|Add2~39 .ShiftMux = 1'b0;
  8425. defparam \macro_inst|apb_dac0_inst|Add2~39 .BypassEn = 1'b0;
  8426. defparam \macro_inst|apb_dac0_inst|Add2~39 .CarryEnb = 1'b0;
  8427. alta_slice \macro_inst|apb_dac0_inst|Add2~41 (
  8428. .A(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  8429. .B(\macro_inst|apb_dac0_inst|Mux2~1_combout ),
  8430. .C(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8431. .D(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8432. .Cin(),
  8433. .Qin(),
  8434. .Clk(),
  8435. .AsyncReset(),
  8436. .SyncReset(),
  8437. .ShiftData(),
  8438. .SyncLoad(),
  8439. .LutOut(\macro_inst|apb_dac0_inst|Add2~41_combout ),
  8440. .Cout(),
  8441. .Q());
  8442. defparam \macro_inst|apb_dac0_inst|Add2~41 .coord_x = 16;
  8443. defparam \macro_inst|apb_dac0_inst|Add2~41 .coord_y = 4;
  8444. defparam \macro_inst|apb_dac0_inst|Add2~41 .coord_z = 4;
  8445. defparam \macro_inst|apb_dac0_inst|Add2~41 .mask = 16'hAA0C;
  8446. defparam \macro_inst|apb_dac0_inst|Add2~41 .modeMux = 1'b0;
  8447. defparam \macro_inst|apb_dac0_inst|Add2~41 .FeedbackMux = 1'b0;
  8448. defparam \macro_inst|apb_dac0_inst|Add2~41 .ShiftMux = 1'b0;
  8449. defparam \macro_inst|apb_dac0_inst|Add2~41 .BypassEn = 1'b0;
  8450. defparam \macro_inst|apb_dac0_inst|Add2~41 .CarryEnb = 1'b1;
  8451. alta_slice \macro_inst|apb_dac0_inst|Add2~42 (
  8452. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ),
  8453. .B(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  8454. .C(vcc),
  8455. .D(vcc),
  8456. .Cin(\macro_inst|apb_dac0_inst|Add2~40 ),
  8457. .Qin(),
  8458. .Clk(),
  8459. .AsyncReset(),
  8460. .SyncReset(),
  8461. .ShiftData(),
  8462. .SyncLoad(),
  8463. .LutOut(\macro_inst|apb_dac0_inst|Add2~42_combout ),
  8464. .Cout(\macro_inst|apb_dac0_inst|Add2~43 ),
  8465. .Q());
  8466. defparam \macro_inst|apb_dac0_inst|Add2~42 .coord_x = 16;
  8467. defparam \macro_inst|apb_dac0_inst|Add2~42 .coord_y = 5;
  8468. defparam \macro_inst|apb_dac0_inst|Add2~42 .coord_z = 9;
  8469. defparam \macro_inst|apb_dac0_inst|Add2~42 .mask = 16'h9617;
  8470. defparam \macro_inst|apb_dac0_inst|Add2~42 .modeMux = 1'b1;
  8471. defparam \macro_inst|apb_dac0_inst|Add2~42 .FeedbackMux = 1'b0;
  8472. defparam \macro_inst|apb_dac0_inst|Add2~42 .ShiftMux = 1'b0;
  8473. defparam \macro_inst|apb_dac0_inst|Add2~42 .BypassEn = 1'b0;
  8474. defparam \macro_inst|apb_dac0_inst|Add2~42 .CarryEnb = 1'b0;
  8475. alta_slice \macro_inst|apb_dac0_inst|Add2~44 (
  8476. .A(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8477. .B(\macro_inst|apb_dac0_inst|Mux1~1_combout ),
  8478. .C(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8479. .D(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  8480. .Cin(),
  8481. .Qin(),
  8482. .Clk(),
  8483. .AsyncReset(),
  8484. .SyncReset(),
  8485. .ShiftData(),
  8486. .SyncLoad(),
  8487. .LutOut(\macro_inst|apb_dac0_inst|Add2~44_combout ),
  8488. .Cout(),
  8489. .Q());
  8490. defparam \macro_inst|apb_dac0_inst|Add2~44 .coord_x = 16;
  8491. defparam \macro_inst|apb_dac0_inst|Add2~44 .coord_y = 6;
  8492. defparam \macro_inst|apb_dac0_inst|Add2~44 .coord_z = 10;
  8493. defparam \macro_inst|apb_dac0_inst|Add2~44 .mask = 16'hF404;
  8494. defparam \macro_inst|apb_dac0_inst|Add2~44 .modeMux = 1'b0;
  8495. defparam \macro_inst|apb_dac0_inst|Add2~44 .FeedbackMux = 1'b0;
  8496. defparam \macro_inst|apb_dac0_inst|Add2~44 .ShiftMux = 1'b0;
  8497. defparam \macro_inst|apb_dac0_inst|Add2~44 .BypassEn = 1'b0;
  8498. defparam \macro_inst|apb_dac0_inst|Add2~44 .CarryEnb = 1'b1;
  8499. alta_slice \macro_inst|apb_dac0_inst|Add2~45 (
  8500. .A(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  8501. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ),
  8502. .C(vcc),
  8503. .D(vcc),
  8504. .Cin(\macro_inst|apb_dac0_inst|Add2~43 ),
  8505. .Qin(),
  8506. .Clk(),
  8507. .AsyncReset(),
  8508. .SyncReset(),
  8509. .ShiftData(),
  8510. .SyncLoad(),
  8511. .LutOut(\macro_inst|apb_dac0_inst|Add2~45_combout ),
  8512. .Cout(\macro_inst|apb_dac0_inst|Add2~46 ),
  8513. .Q());
  8514. defparam \macro_inst|apb_dac0_inst|Add2~45 .coord_x = 16;
  8515. defparam \macro_inst|apb_dac0_inst|Add2~45 .coord_y = 5;
  8516. defparam \macro_inst|apb_dac0_inst|Add2~45 .coord_z = 10;
  8517. defparam \macro_inst|apb_dac0_inst|Add2~45 .mask = 16'h698E;
  8518. defparam \macro_inst|apb_dac0_inst|Add2~45 .modeMux = 1'b1;
  8519. defparam \macro_inst|apb_dac0_inst|Add2~45 .FeedbackMux = 1'b0;
  8520. defparam \macro_inst|apb_dac0_inst|Add2~45 .ShiftMux = 1'b0;
  8521. defparam \macro_inst|apb_dac0_inst|Add2~45 .BypassEn = 1'b0;
  8522. defparam \macro_inst|apb_dac0_inst|Add2~45 .CarryEnb = 1'b0;
  8523. alta_slice \macro_inst|apb_dac0_inst|Add2~47 (
  8524. .A(\macro_inst|apb_dac0_inst|Mux0~1_combout ),
  8525. .B(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  8526. .C(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  8527. .D(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  8528. .Cin(),
  8529. .Qin(),
  8530. .Clk(),
  8531. .AsyncReset(),
  8532. .SyncReset(),
  8533. .ShiftData(),
  8534. .SyncLoad(),
  8535. .LutOut(\macro_inst|apb_dac0_inst|Add2~47_combout ),
  8536. .Cout(),
  8537. .Q());
  8538. defparam \macro_inst|apb_dac0_inst|Add2~47 .coord_x = 15;
  8539. defparam \macro_inst|apb_dac0_inst|Add2~47 .coord_y = 5;
  8540. defparam \macro_inst|apb_dac0_inst|Add2~47 .coord_z = 5;
  8541. defparam \macro_inst|apb_dac0_inst|Add2~47 .mask = 16'hF022;
  8542. defparam \macro_inst|apb_dac0_inst|Add2~47 .modeMux = 1'b0;
  8543. defparam \macro_inst|apb_dac0_inst|Add2~47 .FeedbackMux = 1'b0;
  8544. defparam \macro_inst|apb_dac0_inst|Add2~47 .ShiftMux = 1'b0;
  8545. defparam \macro_inst|apb_dac0_inst|Add2~47 .BypassEn = 1'b0;
  8546. defparam \macro_inst|apb_dac0_inst|Add2~47 .CarryEnb = 1'b1;
  8547. alta_slice \macro_inst|apb_dac0_inst|Add2~48 (
  8548. .A(vcc),
  8549. .B(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  8550. .C(vcc),
  8551. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ),
  8552. .Cin(\macro_inst|apb_dac0_inst|Add2~46 ),
  8553. .Qin(),
  8554. .Clk(),
  8555. .AsyncReset(),
  8556. .SyncReset(),
  8557. .ShiftData(),
  8558. .SyncLoad(),
  8559. .LutOut(\macro_inst|apb_dac0_inst|Add2~48_combout ),
  8560. .Cout(),
  8561. .Q());
  8562. defparam \macro_inst|apb_dac0_inst|Add2~48 .coord_x = 16;
  8563. defparam \macro_inst|apb_dac0_inst|Add2~48 .coord_y = 5;
  8564. defparam \macro_inst|apb_dac0_inst|Add2~48 .coord_z = 11;
  8565. defparam \macro_inst|apb_dac0_inst|Add2~48 .mask = 16'hC33C;
  8566. defparam \macro_inst|apb_dac0_inst|Add2~48 .modeMux = 1'b1;
  8567. defparam \macro_inst|apb_dac0_inst|Add2~48 .FeedbackMux = 1'b0;
  8568. defparam \macro_inst|apb_dac0_inst|Add2~48 .ShiftMux = 1'b0;
  8569. defparam \macro_inst|apb_dac0_inst|Add2~48 .BypassEn = 1'b0;
  8570. defparam \macro_inst|apb_dac0_inst|Add2~48 .CarryEnb = 1'b1;
  8571. alta_slice \macro_inst|apb_dac0_inst|Add2~50 (
  8572. .A(\macro_inst|apb_dac0_inst|Add2~20_combout ),
  8573. .B(\macro_inst|cfg_reg_inst|wave_type [1]),
  8574. .C(\macro_inst|apb_dac0_inst|Add2~21_combout ),
  8575. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  8576. .Cin(),
  8577. .Qin(),
  8578. .Clk(),
  8579. .AsyncReset(),
  8580. .SyncReset(),
  8581. .ShiftData(),
  8582. .SyncLoad(),
  8583. .LutOut(\macro_inst|apb_dac0_inst|Add2~50_combout ),
  8584. .Cout(),
  8585. .Q());
  8586. defparam \macro_inst|apb_dac0_inst|Add2~50 .coord_x = 16;
  8587. defparam \macro_inst|apb_dac0_inst|Add2~50 .coord_y = 6;
  8588. defparam \macro_inst|apb_dac0_inst|Add2~50 .coord_z = 12;
  8589. defparam \macro_inst|apb_dac0_inst|Add2~50 .mask = 16'hBAAA;
  8590. defparam \macro_inst|apb_dac0_inst|Add2~50 .modeMux = 1'b0;
  8591. defparam \macro_inst|apb_dac0_inst|Add2~50 .FeedbackMux = 1'b0;
  8592. defparam \macro_inst|apb_dac0_inst|Add2~50 .ShiftMux = 1'b0;
  8593. defparam \macro_inst|apb_dac0_inst|Add2~50 .BypassEn = 1'b0;
  8594. defparam \macro_inst|apb_dac0_inst|Add2~50 .CarryEnb = 1'b1;
  8595. alta_slice \macro_inst|apb_dac0_inst|Add2~51 (
  8596. .A(\macro_inst|apb_dac0_inst|Add2~23_combout ),
  8597. .B(\macro_inst|apb_dac0_inst|Add2~24_combout ),
  8598. .C(\macro_inst|cfg_reg_inst|wave_type [0]),
  8599. .D(\macro_inst|cfg_reg_inst|wave_type [1]),
  8600. .Cin(),
  8601. .Qin(),
  8602. .Clk(),
  8603. .AsyncReset(),
  8604. .SyncReset(),
  8605. .ShiftData(),
  8606. .SyncLoad(),
  8607. .LutOut(\macro_inst|apb_dac0_inst|Add2~51_combout ),
  8608. .Cout(),
  8609. .Q());
  8610. defparam \macro_inst|apb_dac0_inst|Add2~51 .coord_x = 16;
  8611. defparam \macro_inst|apb_dac0_inst|Add2~51 .coord_y = 5;
  8612. defparam \macro_inst|apb_dac0_inst|Add2~51 .coord_z = 0;
  8613. defparam \macro_inst|apb_dac0_inst|Add2~51 .mask = 16'hAAEA;
  8614. defparam \macro_inst|apb_dac0_inst|Add2~51 .modeMux = 1'b0;
  8615. defparam \macro_inst|apb_dac0_inst|Add2~51 .FeedbackMux = 1'b0;
  8616. defparam \macro_inst|apb_dac0_inst|Add2~51 .ShiftMux = 1'b0;
  8617. defparam \macro_inst|apb_dac0_inst|Add2~51 .BypassEn = 1'b0;
  8618. defparam \macro_inst|apb_dac0_inst|Add2~51 .CarryEnb = 1'b1;
  8619. alta_slice \macro_inst|apb_dac0_inst|Add2~52 (
  8620. .A(\macro_inst|cfg_reg_inst|wave_type [0]),
  8621. .B(\macro_inst|apb_dac0_inst|Add2~26_combout ),
  8622. .C(\macro_inst|apb_dac0_inst|Add2~27_combout ),
  8623. .D(\macro_inst|cfg_reg_inst|wave_type [1]),
  8624. .Cin(),
  8625. .Qin(),
  8626. .Clk(),
  8627. .AsyncReset(),
  8628. .SyncReset(),
  8629. .ShiftData(),
  8630. .SyncLoad(),
  8631. .LutOut(\macro_inst|apb_dac0_inst|Add2~52_combout ),
  8632. .Cout(),
  8633. .Q());
  8634. defparam \macro_inst|apb_dac0_inst|Add2~52 .coord_x = 16;
  8635. defparam \macro_inst|apb_dac0_inst|Add2~52 .coord_y = 5;
  8636. defparam \macro_inst|apb_dac0_inst|Add2~52 .coord_z = 1;
  8637. defparam \macro_inst|apb_dac0_inst|Add2~52 .mask = 16'hCCEC;
  8638. defparam \macro_inst|apb_dac0_inst|Add2~52 .modeMux = 1'b0;
  8639. defparam \macro_inst|apb_dac0_inst|Add2~52 .FeedbackMux = 1'b0;
  8640. defparam \macro_inst|apb_dac0_inst|Add2~52 .ShiftMux = 1'b0;
  8641. defparam \macro_inst|apb_dac0_inst|Add2~52 .BypassEn = 1'b0;
  8642. defparam \macro_inst|apb_dac0_inst|Add2~52 .CarryEnb = 1'b1;
  8643. alta_slice \macro_inst|apb_dac0_inst|Add2~53 (
  8644. .A(\macro_inst|cfg_reg_inst|wave_type [1]),
  8645. .B(\macro_inst|apb_dac0_inst|Add2~29_combout ),
  8646. .C(\macro_inst|cfg_reg_inst|wave_type [0]),
  8647. .D(\macro_inst|apb_dac0_inst|Add2~30_combout ),
  8648. .Cin(),
  8649. .Qin(),
  8650. .Clk(),
  8651. .AsyncReset(),
  8652. .SyncReset(),
  8653. .ShiftData(),
  8654. .SyncLoad(),
  8655. .LutOut(\macro_inst|apb_dac0_inst|Add2~53_combout ),
  8656. .Cout(),
  8657. .Q());
  8658. defparam \macro_inst|apb_dac0_inst|Add2~53 .coord_x = 16;
  8659. defparam \macro_inst|apb_dac0_inst|Add2~53 .coord_y = 5;
  8660. defparam \macro_inst|apb_dac0_inst|Add2~53 .coord_z = 12;
  8661. defparam \macro_inst|apb_dac0_inst|Add2~53 .mask = 16'hDCCC;
  8662. defparam \macro_inst|apb_dac0_inst|Add2~53 .modeMux = 1'b0;
  8663. defparam \macro_inst|apb_dac0_inst|Add2~53 .FeedbackMux = 1'b0;
  8664. defparam \macro_inst|apb_dac0_inst|Add2~53 .ShiftMux = 1'b0;
  8665. defparam \macro_inst|apb_dac0_inst|Add2~53 .BypassEn = 1'b0;
  8666. defparam \macro_inst|apb_dac0_inst|Add2~53 .CarryEnb = 1'b1;
  8667. alta_slice \macro_inst|apb_dac0_inst|Add2~54 (
  8668. .A(\macro_inst|apb_dac0_inst|Add2~33_combout ),
  8669. .B(\macro_inst|cfg_reg_inst|wave_type [1]),
  8670. .C(\macro_inst|apb_dac0_inst|Add2~32_combout ),
  8671. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  8672. .Cin(),
  8673. .Qin(),
  8674. .Clk(),
  8675. .AsyncReset(),
  8676. .SyncReset(),
  8677. .ShiftData(),
  8678. .SyncLoad(),
  8679. .LutOut(\macro_inst|apb_dac0_inst|Add2~54_combout ),
  8680. .Cout(),
  8681. .Q());
  8682. defparam \macro_inst|apb_dac0_inst|Add2~54 .coord_x = 16;
  8683. defparam \macro_inst|apb_dac0_inst|Add2~54 .coord_y = 8;
  8684. defparam \macro_inst|apb_dac0_inst|Add2~54 .coord_z = 0;
  8685. defparam \macro_inst|apb_dac0_inst|Add2~54 .mask = 16'hF2F0;
  8686. defparam \macro_inst|apb_dac0_inst|Add2~54 .modeMux = 1'b0;
  8687. defparam \macro_inst|apb_dac0_inst|Add2~54 .FeedbackMux = 1'b0;
  8688. defparam \macro_inst|apb_dac0_inst|Add2~54 .ShiftMux = 1'b0;
  8689. defparam \macro_inst|apb_dac0_inst|Add2~54 .BypassEn = 1'b0;
  8690. defparam \macro_inst|apb_dac0_inst|Add2~54 .CarryEnb = 1'b1;
  8691. alta_slice \macro_inst|apb_dac0_inst|Add2~55 (
  8692. .A(\macro_inst|cfg_reg_inst|wave_type [0]),
  8693. .B(\macro_inst|cfg_reg_inst|wave_type [1]),
  8694. .C(\macro_inst|apb_dac0_inst|Add2~35_combout ),
  8695. .D(\macro_inst|apb_dac0_inst|Add2~36_combout ),
  8696. .Cin(),
  8697. .Qin(),
  8698. .Clk(),
  8699. .AsyncReset(),
  8700. .SyncReset(),
  8701. .ShiftData(),
  8702. .SyncLoad(),
  8703. .LutOut(\macro_inst|apb_dac0_inst|Add2~55_combout ),
  8704. .Cout(),
  8705. .Q());
  8706. defparam \macro_inst|apb_dac0_inst|Add2~55 .coord_x = 16;
  8707. defparam \macro_inst|apb_dac0_inst|Add2~55 .coord_y = 5;
  8708. defparam \macro_inst|apb_dac0_inst|Add2~55 .coord_z = 14;
  8709. defparam \macro_inst|apb_dac0_inst|Add2~55 .mask = 16'hF2F0;
  8710. defparam \macro_inst|apb_dac0_inst|Add2~55 .modeMux = 1'b0;
  8711. defparam \macro_inst|apb_dac0_inst|Add2~55 .FeedbackMux = 1'b0;
  8712. defparam \macro_inst|apb_dac0_inst|Add2~55 .ShiftMux = 1'b0;
  8713. defparam \macro_inst|apb_dac0_inst|Add2~55 .BypassEn = 1'b0;
  8714. defparam \macro_inst|apb_dac0_inst|Add2~55 .CarryEnb = 1'b1;
  8715. alta_slice \macro_inst|apb_dac0_inst|Add2~56 (
  8716. .A(\macro_inst|cfg_reg_inst|wave_type [1]),
  8717. .B(\macro_inst|cfg_reg_inst|wave_type [0]),
  8718. .C(\macro_inst|apb_dac0_inst|Add2~38_combout ),
  8719. .D(\macro_inst|apb_dac0_inst|Add2~39_combout ),
  8720. .Cin(),
  8721. .Qin(),
  8722. .Clk(),
  8723. .AsyncReset(),
  8724. .SyncReset(),
  8725. .ShiftData(),
  8726. .SyncLoad(),
  8727. .LutOut(\macro_inst|apb_dac0_inst|Add2~56_combout ),
  8728. .Cout(),
  8729. .Q());
  8730. defparam \macro_inst|apb_dac0_inst|Add2~56 .coord_x = 15;
  8731. defparam \macro_inst|apb_dac0_inst|Add2~56 .coord_y = 5;
  8732. defparam \macro_inst|apb_dac0_inst|Add2~56 .coord_z = 7;
  8733. defparam \macro_inst|apb_dac0_inst|Add2~56 .mask = 16'hF4F0;
  8734. defparam \macro_inst|apb_dac0_inst|Add2~56 .modeMux = 1'b0;
  8735. defparam \macro_inst|apb_dac0_inst|Add2~56 .FeedbackMux = 1'b0;
  8736. defparam \macro_inst|apb_dac0_inst|Add2~56 .ShiftMux = 1'b0;
  8737. defparam \macro_inst|apb_dac0_inst|Add2~56 .BypassEn = 1'b0;
  8738. defparam \macro_inst|apb_dac0_inst|Add2~56 .CarryEnb = 1'b1;
  8739. alta_slice \macro_inst|apb_dac0_inst|Add2~57 (
  8740. .A(\macro_inst|apb_dac0_inst|Add2~42_combout ),
  8741. .B(\macro_inst|cfg_reg_inst|wave_type [1]),
  8742. .C(\macro_inst|cfg_reg_inst|wave_type [0]),
  8743. .D(\macro_inst|apb_dac0_inst|Add2~41_combout ),
  8744. .Cin(),
  8745. .Qin(),
  8746. .Clk(),
  8747. .AsyncReset(),
  8748. .SyncReset(),
  8749. .ShiftData(),
  8750. .SyncLoad(),
  8751. .LutOut(\macro_inst|apb_dac0_inst|Add2~57_combout ),
  8752. .Cout(),
  8753. .Q());
  8754. defparam \macro_inst|apb_dac0_inst|Add2~57 .coord_x = 15;
  8755. defparam \macro_inst|apb_dac0_inst|Add2~57 .coord_y = 5;
  8756. defparam \macro_inst|apb_dac0_inst|Add2~57 .coord_z = 8;
  8757. defparam \macro_inst|apb_dac0_inst|Add2~57 .mask = 16'hFF20;
  8758. defparam \macro_inst|apb_dac0_inst|Add2~57 .modeMux = 1'b0;
  8759. defparam \macro_inst|apb_dac0_inst|Add2~57 .FeedbackMux = 1'b0;
  8760. defparam \macro_inst|apb_dac0_inst|Add2~57 .ShiftMux = 1'b0;
  8761. defparam \macro_inst|apb_dac0_inst|Add2~57 .BypassEn = 1'b0;
  8762. defparam \macro_inst|apb_dac0_inst|Add2~57 .CarryEnb = 1'b1;
  8763. alta_slice \macro_inst|apb_dac0_inst|Add2~58 (
  8764. .A(\macro_inst|apb_dac0_inst|Add2~45_combout ),
  8765. .B(\macro_inst|apb_dac0_inst|Add2~44_combout ),
  8766. .C(\macro_inst|cfg_reg_inst|wave_type [1]),
  8767. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  8768. .Cin(),
  8769. .Qin(),
  8770. .Clk(),
  8771. .AsyncReset(),
  8772. .SyncReset(),
  8773. .ShiftData(),
  8774. .SyncLoad(),
  8775. .LutOut(\macro_inst|apb_dac0_inst|Add2~58_combout ),
  8776. .Cout(),
  8777. .Q());
  8778. defparam \macro_inst|apb_dac0_inst|Add2~58 .coord_x = 16;
  8779. defparam \macro_inst|apb_dac0_inst|Add2~58 .coord_y = 6;
  8780. defparam \macro_inst|apb_dac0_inst|Add2~58 .coord_z = 11;
  8781. defparam \macro_inst|apb_dac0_inst|Add2~58 .mask = 16'hCECC;
  8782. defparam \macro_inst|apb_dac0_inst|Add2~58 .modeMux = 1'b0;
  8783. defparam \macro_inst|apb_dac0_inst|Add2~58 .FeedbackMux = 1'b0;
  8784. defparam \macro_inst|apb_dac0_inst|Add2~58 .ShiftMux = 1'b0;
  8785. defparam \macro_inst|apb_dac0_inst|Add2~58 .BypassEn = 1'b0;
  8786. defparam \macro_inst|apb_dac0_inst|Add2~58 .CarryEnb = 1'b1;
  8787. alta_slice \macro_inst|apb_dac0_inst|Add2~59 (
  8788. .A(\macro_inst|cfg_reg_inst|wave_type [0]),
  8789. .B(\macro_inst|apb_dac0_inst|Add2~48_combout ),
  8790. .C(\macro_inst|apb_dac0_inst|Add2~47_combout ),
  8791. .D(\macro_inst|cfg_reg_inst|wave_type [1]),
  8792. .Cin(),
  8793. .Qin(),
  8794. .Clk(),
  8795. .AsyncReset(),
  8796. .SyncReset(),
  8797. .ShiftData(),
  8798. .SyncLoad(),
  8799. .LutOut(\macro_inst|apb_dac0_inst|Add2~59_combout ),
  8800. .Cout(),
  8801. .Q());
  8802. defparam \macro_inst|apb_dac0_inst|Add2~59 .coord_x = 16;
  8803. defparam \macro_inst|apb_dac0_inst|Add2~59 .coord_y = 5;
  8804. defparam \macro_inst|apb_dac0_inst|Add2~59 .coord_z = 15;
  8805. defparam \macro_inst|apb_dac0_inst|Add2~59 .mask = 16'hF0F8;
  8806. defparam \macro_inst|apb_dac0_inst|Add2~59 .modeMux = 1'b0;
  8807. defparam \macro_inst|apb_dac0_inst|Add2~59 .FeedbackMux = 1'b0;
  8808. defparam \macro_inst|apb_dac0_inst|Add2~59 .ShiftMux = 1'b0;
  8809. defparam \macro_inst|apb_dac0_inst|Add2~59 .BypassEn = 1'b0;
  8810. defparam \macro_inst|apb_dac0_inst|Add2~59 .CarryEnb = 1'b1;
  8811. alta_slice \macro_inst|apb_dac0_inst|Add3~10 (
  8812. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28_combout ),
  8813. .B(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  8814. .C(vcc),
  8815. .D(vcc),
  8816. .Cin(\macro_inst|apb_dac0_inst|Add3~9 ),
  8817. .Qin(),
  8818. .Clk(),
  8819. .AsyncReset(),
  8820. .SyncReset(),
  8821. .ShiftData(),
  8822. .SyncLoad(),
  8823. .LutOut(\macro_inst|apb_dac0_inst|Add3~10_combout ),
  8824. .Cout(\macro_inst|apb_dac0_inst|Add3~11 ),
  8825. .Q());
  8826. defparam \macro_inst|apb_dac0_inst|Add3~10 .coord_x = 15;
  8827. defparam \macro_inst|apb_dac0_inst|Add3~10 .coord_y = 8;
  8828. defparam \macro_inst|apb_dac0_inst|Add3~10 .coord_z = 5;
  8829. defparam \macro_inst|apb_dac0_inst|Add3~10 .mask = 16'h9617;
  8830. defparam \macro_inst|apb_dac0_inst|Add3~10 .modeMux = 1'b1;
  8831. defparam \macro_inst|apb_dac0_inst|Add3~10 .FeedbackMux = 1'b0;
  8832. defparam \macro_inst|apb_dac0_inst|Add3~10 .ShiftMux = 1'b0;
  8833. defparam \macro_inst|apb_dac0_inst|Add3~10 .BypassEn = 1'b0;
  8834. defparam \macro_inst|apb_dac0_inst|Add3~10 .CarryEnb = 1'b0;
  8835. alta_slice \macro_inst|apb_dac0_inst|Add3~12 (
  8836. .A(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  8837. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30_combout ),
  8838. .C(vcc),
  8839. .D(vcc),
  8840. .Cin(\macro_inst|apb_dac0_inst|Add3~11 ),
  8841. .Qin(),
  8842. .Clk(),
  8843. .AsyncReset(),
  8844. .SyncReset(),
  8845. .ShiftData(),
  8846. .SyncLoad(),
  8847. .LutOut(\macro_inst|apb_dac0_inst|Add3~12_combout ),
  8848. .Cout(\macro_inst|apb_dac0_inst|Add3~13 ),
  8849. .Q());
  8850. defparam \macro_inst|apb_dac0_inst|Add3~12 .coord_x = 15;
  8851. defparam \macro_inst|apb_dac0_inst|Add3~12 .coord_y = 8;
  8852. defparam \macro_inst|apb_dac0_inst|Add3~12 .coord_z = 6;
  8853. defparam \macro_inst|apb_dac0_inst|Add3~12 .mask = 16'h698E;
  8854. defparam \macro_inst|apb_dac0_inst|Add3~12 .modeMux = 1'b1;
  8855. defparam \macro_inst|apb_dac0_inst|Add3~12 .FeedbackMux = 1'b0;
  8856. defparam \macro_inst|apb_dac0_inst|Add3~12 .ShiftMux = 1'b0;
  8857. defparam \macro_inst|apb_dac0_inst|Add3~12 .BypassEn = 1'b0;
  8858. defparam \macro_inst|apb_dac0_inst|Add3~12 .CarryEnb = 1'b0;
  8859. alta_slice \macro_inst|apb_dac0_inst|Add3~4 (
  8860. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22_combout ),
  8861. .B(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  8862. .C(vcc),
  8863. .D(vcc),
  8864. .Cin(\macro_inst|apb_dac0_inst|Add3~3 ),
  8865. .Qin(),
  8866. .Clk(),
  8867. .AsyncReset(),
  8868. .SyncReset(),
  8869. .ShiftData(),
  8870. .SyncLoad(),
  8871. .LutOut(\macro_inst|apb_dac0_inst|Add3~4_combout ),
  8872. .Cout(\macro_inst|apb_dac0_inst|Add3~5 ),
  8873. .Q());
  8874. defparam \macro_inst|apb_dac0_inst|Add3~4 .coord_x = 15;
  8875. defparam \macro_inst|apb_dac0_inst|Add3~4 .coord_y = 8;
  8876. defparam \macro_inst|apb_dac0_inst|Add3~4 .coord_z = 2;
  8877. defparam \macro_inst|apb_dac0_inst|Add3~4 .mask = 16'h698E;
  8878. defparam \macro_inst|apb_dac0_inst|Add3~4 .modeMux = 1'b1;
  8879. defparam \macro_inst|apb_dac0_inst|Add3~4 .FeedbackMux = 1'b0;
  8880. defparam \macro_inst|apb_dac0_inst|Add3~4 .ShiftMux = 1'b0;
  8881. defparam \macro_inst|apb_dac0_inst|Add3~4 .BypassEn = 1'b0;
  8882. defparam \macro_inst|apb_dac0_inst|Add3~4 .CarryEnb = 1'b0;
  8883. alta_slice \macro_inst|apb_dac0_inst|Add4~0 (
  8884. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18_combout ),
  8885. .B(\macro_inst|apb_dac0_inst|max_vol_r [0]),
  8886. .C(vcc),
  8887. .D(vcc),
  8888. .Cin(),
  8889. .Qin(),
  8890. .Clk(),
  8891. .AsyncReset(),
  8892. .SyncReset(),
  8893. .ShiftData(),
  8894. .SyncLoad(),
  8895. .LutOut(\macro_inst|apb_dac0_inst|Add4~0_combout ),
  8896. .Cout(\macro_inst|apb_dac0_inst|Add4~1 ),
  8897. .Q());
  8898. defparam \macro_inst|apb_dac0_inst|Add4~0 .coord_x = 15;
  8899. defparam \macro_inst|apb_dac0_inst|Add4~0 .coord_y = 6;
  8900. defparam \macro_inst|apb_dac0_inst|Add4~0 .coord_z = 2;
  8901. defparam \macro_inst|apb_dac0_inst|Add4~0 .mask = 16'h66DD;
  8902. defparam \macro_inst|apb_dac0_inst|Add4~0 .modeMux = 1'b0;
  8903. defparam \macro_inst|apb_dac0_inst|Add4~0 .FeedbackMux = 1'b0;
  8904. defparam \macro_inst|apb_dac0_inst|Add4~0 .ShiftMux = 1'b0;
  8905. defparam \macro_inst|apb_dac0_inst|Add4~0 .BypassEn = 1'b0;
  8906. defparam \macro_inst|apb_dac0_inst|Add4~0 .CarryEnb = 1'b0;
  8907. alta_slice \macro_inst|apb_dac0_inst|Add4~14 (
  8908. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32_combout ),
  8909. .B(\macro_inst|apb_dac0_inst|max_vol_r [7]),
  8910. .C(vcc),
  8911. .D(vcc),
  8912. .Cin(\macro_inst|apb_dac0_inst|Add4~13 ),
  8913. .Qin(),
  8914. .Clk(),
  8915. .AsyncReset(),
  8916. .SyncReset(),
  8917. .ShiftData(),
  8918. .SyncLoad(),
  8919. .LutOut(\macro_inst|apb_dac0_inst|Add4~14_combout ),
  8920. .Cout(\macro_inst|apb_dac0_inst|Add4~15 ),
  8921. .Q());
  8922. defparam \macro_inst|apb_dac0_inst|Add4~14 .coord_x = 15;
  8923. defparam \macro_inst|apb_dac0_inst|Add4~14 .coord_y = 6;
  8924. defparam \macro_inst|apb_dac0_inst|Add4~14 .coord_z = 9;
  8925. defparam \macro_inst|apb_dac0_inst|Add4~14 .mask = 16'h692B;
  8926. defparam \macro_inst|apb_dac0_inst|Add4~14 .modeMux = 1'b1;
  8927. defparam \macro_inst|apb_dac0_inst|Add4~14 .FeedbackMux = 1'b0;
  8928. defparam \macro_inst|apb_dac0_inst|Add4~14 .ShiftMux = 1'b0;
  8929. defparam \macro_inst|apb_dac0_inst|Add4~14 .BypassEn = 1'b0;
  8930. defparam \macro_inst|apb_dac0_inst|Add4~14 .CarryEnb = 1'b0;
  8931. alta_slice \macro_inst|apb_dac0_inst|Add4~16 (
  8932. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34_combout ),
  8933. .B(\macro_inst|apb_dac0_inst|max_vol_r [8]),
  8934. .C(vcc),
  8935. .D(vcc),
  8936. .Cin(\macro_inst|apb_dac0_inst|Add4~15 ),
  8937. .Qin(),
  8938. .Clk(),
  8939. .AsyncReset(),
  8940. .SyncReset(),
  8941. .ShiftData(),
  8942. .SyncLoad(),
  8943. .LutOut(\macro_inst|apb_dac0_inst|Add4~16_combout ),
  8944. .Cout(\macro_inst|apb_dac0_inst|Add4~17 ),
  8945. .Q());
  8946. defparam \macro_inst|apb_dac0_inst|Add4~16 .coord_x = 15;
  8947. defparam \macro_inst|apb_dac0_inst|Add4~16 .coord_y = 6;
  8948. defparam \macro_inst|apb_dac0_inst|Add4~16 .coord_z = 10;
  8949. defparam \macro_inst|apb_dac0_inst|Add4~16 .mask = 16'h964D;
  8950. defparam \macro_inst|apb_dac0_inst|Add4~16 .modeMux = 1'b1;
  8951. defparam \macro_inst|apb_dac0_inst|Add4~16 .FeedbackMux = 1'b0;
  8952. defparam \macro_inst|apb_dac0_inst|Add4~16 .ShiftMux = 1'b0;
  8953. defparam \macro_inst|apb_dac0_inst|Add4~16 .BypassEn = 1'b0;
  8954. defparam \macro_inst|apb_dac0_inst|Add4~16 .CarryEnb = 1'b0;
  8955. alta_slice \macro_inst|apb_dac0_inst|Add4~2 (
  8956. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20_combout ),
  8957. .B(\macro_inst|apb_dac0_inst|max_vol_r [1]),
  8958. .C(vcc),
  8959. .D(vcc),
  8960. .Cin(\macro_inst|apb_dac0_inst|Add4~1 ),
  8961. .Qin(),
  8962. .Clk(),
  8963. .AsyncReset(),
  8964. .SyncReset(),
  8965. .ShiftData(),
  8966. .SyncLoad(),
  8967. .LutOut(\macro_inst|apb_dac0_inst|Add4~2_combout ),
  8968. .Cout(\macro_inst|apb_dac0_inst|Add4~3 ),
  8969. .Q());
  8970. defparam \macro_inst|apb_dac0_inst|Add4~2 .coord_x = 15;
  8971. defparam \macro_inst|apb_dac0_inst|Add4~2 .coord_y = 6;
  8972. defparam \macro_inst|apb_dac0_inst|Add4~2 .coord_z = 3;
  8973. defparam \macro_inst|apb_dac0_inst|Add4~2 .mask = 16'h692B;
  8974. defparam \macro_inst|apb_dac0_inst|Add4~2 .modeMux = 1'b1;
  8975. defparam \macro_inst|apb_dac0_inst|Add4~2 .FeedbackMux = 1'b0;
  8976. defparam \macro_inst|apb_dac0_inst|Add4~2 .ShiftMux = 1'b0;
  8977. defparam \macro_inst|apb_dac0_inst|Add4~2 .BypassEn = 1'b0;
  8978. defparam \macro_inst|apb_dac0_inst|Add4~2 .CarryEnb = 1'b0;
  8979. alta_slice \macro_inst|apb_dac0_inst|Add4~4 (
  8980. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22_combout ),
  8981. .B(\macro_inst|apb_dac0_inst|max_vol_r [2]),
  8982. .C(vcc),
  8983. .D(vcc),
  8984. .Cin(\macro_inst|apb_dac0_inst|Add4~3 ),
  8985. .Qin(),
  8986. .Clk(),
  8987. .AsyncReset(),
  8988. .SyncReset(),
  8989. .ShiftData(),
  8990. .SyncLoad(),
  8991. .LutOut(\macro_inst|apb_dac0_inst|Add4~4_combout ),
  8992. .Cout(\macro_inst|apb_dac0_inst|Add4~5 ),
  8993. .Q());
  8994. defparam \macro_inst|apb_dac0_inst|Add4~4 .coord_x = 15;
  8995. defparam \macro_inst|apb_dac0_inst|Add4~4 .coord_y = 6;
  8996. defparam \macro_inst|apb_dac0_inst|Add4~4 .coord_z = 4;
  8997. defparam \macro_inst|apb_dac0_inst|Add4~4 .mask = 16'h964D;
  8998. defparam \macro_inst|apb_dac0_inst|Add4~4 .modeMux = 1'b1;
  8999. defparam \macro_inst|apb_dac0_inst|Add4~4 .FeedbackMux = 1'b0;
  9000. defparam \macro_inst|apb_dac0_inst|Add4~4 .ShiftMux = 1'b0;
  9001. defparam \macro_inst|apb_dac0_inst|Add4~4 .BypassEn = 1'b0;
  9002. defparam \macro_inst|apb_dac0_inst|Add4~4 .CarryEnb = 1'b0;
  9003. alta_slice \macro_inst|apb_dac0_inst|Add4~6 (
  9004. .A(\macro_inst|apb_dac0_inst|max_vol_r [3]),
  9005. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24_combout ),
  9006. .C(vcc),
  9007. .D(vcc),
  9008. .Cin(\macro_inst|apb_dac0_inst|Add4~5 ),
  9009. .Qin(),
  9010. .Clk(),
  9011. .AsyncReset(),
  9012. .SyncReset(),
  9013. .ShiftData(),
  9014. .SyncLoad(),
  9015. .LutOut(\macro_inst|apb_dac0_inst|Add4~6_combout ),
  9016. .Cout(\macro_inst|apb_dac0_inst|Add4~7 ),
  9017. .Q());
  9018. defparam \macro_inst|apb_dac0_inst|Add4~6 .coord_x = 15;
  9019. defparam \macro_inst|apb_dac0_inst|Add4~6 .coord_y = 6;
  9020. defparam \macro_inst|apb_dac0_inst|Add4~6 .coord_z = 5;
  9021. defparam \macro_inst|apb_dac0_inst|Add4~6 .mask = 16'h694D;
  9022. defparam \macro_inst|apb_dac0_inst|Add4~6 .modeMux = 1'b1;
  9023. defparam \macro_inst|apb_dac0_inst|Add4~6 .FeedbackMux = 1'b0;
  9024. defparam \macro_inst|apb_dac0_inst|Add4~6 .ShiftMux = 1'b0;
  9025. defparam \macro_inst|apb_dac0_inst|Add4~6 .BypassEn = 1'b0;
  9026. defparam \macro_inst|apb_dac0_inst|Add4~6 .CarryEnb = 1'b0;
  9027. alta_slice \macro_inst|apb_dac0_inst|Add4~8 (
  9028. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26_combout ),
  9029. .B(\macro_inst|apb_dac0_inst|max_vol_r [4]),
  9030. .C(vcc),
  9031. .D(vcc),
  9032. .Cin(\macro_inst|apb_dac0_inst|Add4~7 ),
  9033. .Qin(),
  9034. .Clk(),
  9035. .AsyncReset(),
  9036. .SyncReset(),
  9037. .ShiftData(),
  9038. .SyncLoad(),
  9039. .LutOut(\macro_inst|apb_dac0_inst|Add4~8_combout ),
  9040. .Cout(\macro_inst|apb_dac0_inst|Add4~9 ),
  9041. .Q());
  9042. defparam \macro_inst|apb_dac0_inst|Add4~8 .coord_x = 15;
  9043. defparam \macro_inst|apb_dac0_inst|Add4~8 .coord_y = 6;
  9044. defparam \macro_inst|apb_dac0_inst|Add4~8 .coord_z = 6;
  9045. defparam \macro_inst|apb_dac0_inst|Add4~8 .mask = 16'h964D;
  9046. defparam \macro_inst|apb_dac0_inst|Add4~8 .modeMux = 1'b1;
  9047. defparam \macro_inst|apb_dac0_inst|Add4~8 .FeedbackMux = 1'b0;
  9048. defparam \macro_inst|apb_dac0_inst|Add4~8 .ShiftMux = 1'b0;
  9049. defparam \macro_inst|apb_dac0_inst|Add4~8 .BypassEn = 1'b0;
  9050. defparam \macro_inst|apb_dac0_inst|Add4~8 .CarryEnb = 1'b0;
  9051. alta_slice \macro_inst|apb_dac0_inst|Add5~0 (
  9052. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  9053. .B(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  9054. .C(vcc),
  9055. .D(vcc),
  9056. .Cin(),
  9057. .Qin(),
  9058. .Clk(),
  9059. .AsyncReset(),
  9060. .SyncReset(),
  9061. .ShiftData(),
  9062. .SyncLoad(),
  9063. .LutOut(\macro_inst|apb_dac0_inst|Add5~0_combout ),
  9064. .Cout(\macro_inst|apb_dac0_inst|Add5~1 ),
  9065. .Q());
  9066. defparam \macro_inst|apb_dac0_inst|Add5~0 .coord_x = 16;
  9067. defparam \macro_inst|apb_dac0_inst|Add5~0 .coord_y = 4;
  9068. defparam \macro_inst|apb_dac0_inst|Add5~0 .coord_z = 6;
  9069. defparam \macro_inst|apb_dac0_inst|Add5~0 .mask = 16'h6688;
  9070. defparam \macro_inst|apb_dac0_inst|Add5~0 .modeMux = 1'b0;
  9071. defparam \macro_inst|apb_dac0_inst|Add5~0 .FeedbackMux = 1'b0;
  9072. defparam \macro_inst|apb_dac0_inst|Add5~0 .ShiftMux = 1'b0;
  9073. defparam \macro_inst|apb_dac0_inst|Add5~0 .BypassEn = 1'b0;
  9074. defparam \macro_inst|apb_dac0_inst|Add5~0 .CarryEnb = 1'b0;
  9075. alta_slice \macro_inst|apb_dac0_inst|Add5~10 (
  9076. .A(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  9077. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  9078. .C(vcc),
  9079. .D(vcc),
  9080. .Cin(\macro_inst|apb_dac0_inst|Add5~9 ),
  9081. .Qin(),
  9082. .Clk(),
  9083. .AsyncReset(),
  9084. .SyncReset(),
  9085. .ShiftData(),
  9086. .SyncLoad(),
  9087. .LutOut(\macro_inst|apb_dac0_inst|Add5~10_combout ),
  9088. .Cout(\macro_inst|apb_dac0_inst|Add5~11 ),
  9089. .Q());
  9090. defparam \macro_inst|apb_dac0_inst|Add5~10 .coord_x = 16;
  9091. defparam \macro_inst|apb_dac0_inst|Add5~10 .coord_y = 4;
  9092. defparam \macro_inst|apb_dac0_inst|Add5~10 .coord_z = 11;
  9093. defparam \macro_inst|apb_dac0_inst|Add5~10 .mask = 16'h9617;
  9094. defparam \macro_inst|apb_dac0_inst|Add5~10 .modeMux = 1'b1;
  9095. defparam \macro_inst|apb_dac0_inst|Add5~10 .FeedbackMux = 1'b0;
  9096. defparam \macro_inst|apb_dac0_inst|Add5~10 .ShiftMux = 1'b0;
  9097. defparam \macro_inst|apb_dac0_inst|Add5~10 .BypassEn = 1'b0;
  9098. defparam \macro_inst|apb_dac0_inst|Add5~10 .CarryEnb = 1'b0;
  9099. alta_slice \macro_inst|apb_dac0_inst|Add5~12 (
  9100. .A(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  9101. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  9102. .C(vcc),
  9103. .D(vcc),
  9104. .Cin(\macro_inst|apb_dac0_inst|Add5~11 ),
  9105. .Qin(),
  9106. .Clk(),
  9107. .AsyncReset(),
  9108. .SyncReset(),
  9109. .ShiftData(),
  9110. .SyncLoad(),
  9111. .LutOut(\macro_inst|apb_dac0_inst|Add5~12_combout ),
  9112. .Cout(\macro_inst|apb_dac0_inst|Add5~13 ),
  9113. .Q());
  9114. defparam \macro_inst|apb_dac0_inst|Add5~12 .coord_x = 16;
  9115. defparam \macro_inst|apb_dac0_inst|Add5~12 .coord_y = 4;
  9116. defparam \macro_inst|apb_dac0_inst|Add5~12 .coord_z = 12;
  9117. defparam \macro_inst|apb_dac0_inst|Add5~12 .mask = 16'h698E;
  9118. defparam \macro_inst|apb_dac0_inst|Add5~12 .modeMux = 1'b1;
  9119. defparam \macro_inst|apb_dac0_inst|Add5~12 .FeedbackMux = 1'b0;
  9120. defparam \macro_inst|apb_dac0_inst|Add5~12 .ShiftMux = 1'b0;
  9121. defparam \macro_inst|apb_dac0_inst|Add5~12 .BypassEn = 1'b0;
  9122. defparam \macro_inst|apb_dac0_inst|Add5~12 .CarryEnb = 1'b0;
  9123. alta_slice \macro_inst|apb_dac0_inst|Add5~14 (
  9124. .A(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  9125. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ),
  9126. .C(vcc),
  9127. .D(vcc),
  9128. .Cin(\macro_inst|apb_dac0_inst|Add5~13 ),
  9129. .Qin(),
  9130. .Clk(),
  9131. .AsyncReset(),
  9132. .SyncReset(),
  9133. .ShiftData(),
  9134. .SyncLoad(),
  9135. .LutOut(\macro_inst|apb_dac0_inst|Add5~14_combout ),
  9136. .Cout(\macro_inst|apb_dac0_inst|Add5~15 ),
  9137. .Q());
  9138. defparam \macro_inst|apb_dac0_inst|Add5~14 .coord_x = 16;
  9139. defparam \macro_inst|apb_dac0_inst|Add5~14 .coord_y = 4;
  9140. defparam \macro_inst|apb_dac0_inst|Add5~14 .coord_z = 13;
  9141. defparam \macro_inst|apb_dac0_inst|Add5~14 .mask = 16'h9617;
  9142. defparam \macro_inst|apb_dac0_inst|Add5~14 .modeMux = 1'b1;
  9143. defparam \macro_inst|apb_dac0_inst|Add5~14 .FeedbackMux = 1'b0;
  9144. defparam \macro_inst|apb_dac0_inst|Add5~14 .ShiftMux = 1'b0;
  9145. defparam \macro_inst|apb_dac0_inst|Add5~14 .BypassEn = 1'b0;
  9146. defparam \macro_inst|apb_dac0_inst|Add5~14 .CarryEnb = 1'b0;
  9147. alta_slice \macro_inst|apb_dac0_inst|Add5~16 (
  9148. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ),
  9149. .B(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  9150. .C(vcc),
  9151. .D(vcc),
  9152. .Cin(\macro_inst|apb_dac0_inst|Add5~15 ),
  9153. .Qin(),
  9154. .Clk(),
  9155. .AsyncReset(),
  9156. .SyncReset(),
  9157. .ShiftData(),
  9158. .SyncLoad(),
  9159. .LutOut(\macro_inst|apb_dac0_inst|Add5~16_combout ),
  9160. .Cout(\macro_inst|apb_dac0_inst|Add5~17 ),
  9161. .Q());
  9162. defparam \macro_inst|apb_dac0_inst|Add5~16 .coord_x = 16;
  9163. defparam \macro_inst|apb_dac0_inst|Add5~16 .coord_y = 4;
  9164. defparam \macro_inst|apb_dac0_inst|Add5~16 .coord_z = 14;
  9165. defparam \macro_inst|apb_dac0_inst|Add5~16 .mask = 16'h698E;
  9166. defparam \macro_inst|apb_dac0_inst|Add5~16 .modeMux = 1'b1;
  9167. defparam \macro_inst|apb_dac0_inst|Add5~16 .FeedbackMux = 1'b0;
  9168. defparam \macro_inst|apb_dac0_inst|Add5~16 .ShiftMux = 1'b0;
  9169. defparam \macro_inst|apb_dac0_inst|Add5~16 .BypassEn = 1'b0;
  9170. defparam \macro_inst|apb_dac0_inst|Add5~16 .CarryEnb = 1'b0;
  9171. alta_slice \macro_inst|apb_dac0_inst|Add5~18 (
  9172. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ),
  9173. .B(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  9174. .C(vcc),
  9175. .D(vcc),
  9176. .Cin(\macro_inst|apb_dac0_inst|Add5~17 ),
  9177. .Qin(),
  9178. .Clk(),
  9179. .AsyncReset(),
  9180. .SyncReset(),
  9181. .ShiftData(),
  9182. .SyncLoad(),
  9183. .LutOut(\macro_inst|apb_dac0_inst|Add5~18_combout ),
  9184. .Cout(),
  9185. .Q());
  9186. defparam \macro_inst|apb_dac0_inst|Add5~18 .coord_x = 16;
  9187. defparam \macro_inst|apb_dac0_inst|Add5~18 .coord_y = 4;
  9188. defparam \macro_inst|apb_dac0_inst|Add5~18 .coord_z = 15;
  9189. defparam \macro_inst|apb_dac0_inst|Add5~18 .mask = 16'h9696;
  9190. defparam \macro_inst|apb_dac0_inst|Add5~18 .modeMux = 1'b1;
  9191. defparam \macro_inst|apb_dac0_inst|Add5~18 .FeedbackMux = 1'b0;
  9192. defparam \macro_inst|apb_dac0_inst|Add5~18 .ShiftMux = 1'b0;
  9193. defparam \macro_inst|apb_dac0_inst|Add5~18 .BypassEn = 1'b0;
  9194. defparam \macro_inst|apb_dac0_inst|Add5~18 .CarryEnb = 1'b1;
  9195. alta_slice \macro_inst|apb_dac0_inst|Add5~2 (
  9196. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  9197. .B(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  9198. .C(vcc),
  9199. .D(vcc),
  9200. .Cin(\macro_inst|apb_dac0_inst|Add5~1 ),
  9201. .Qin(),
  9202. .Clk(),
  9203. .AsyncReset(),
  9204. .SyncReset(),
  9205. .ShiftData(),
  9206. .SyncLoad(),
  9207. .LutOut(\macro_inst|apb_dac0_inst|Add5~2_combout ),
  9208. .Cout(\macro_inst|apb_dac0_inst|Add5~3 ),
  9209. .Q());
  9210. defparam \macro_inst|apb_dac0_inst|Add5~2 .coord_x = 16;
  9211. defparam \macro_inst|apb_dac0_inst|Add5~2 .coord_y = 4;
  9212. defparam \macro_inst|apb_dac0_inst|Add5~2 .coord_z = 7;
  9213. defparam \macro_inst|apb_dac0_inst|Add5~2 .mask = 16'h9617;
  9214. defparam \macro_inst|apb_dac0_inst|Add5~2 .modeMux = 1'b1;
  9215. defparam \macro_inst|apb_dac0_inst|Add5~2 .FeedbackMux = 1'b0;
  9216. defparam \macro_inst|apb_dac0_inst|Add5~2 .ShiftMux = 1'b0;
  9217. defparam \macro_inst|apb_dac0_inst|Add5~2 .BypassEn = 1'b0;
  9218. defparam \macro_inst|apb_dac0_inst|Add5~2 .CarryEnb = 1'b0;
  9219. alta_slice \macro_inst|apb_dac0_inst|Add5~4 (
  9220. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  9221. .B(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  9222. .C(vcc),
  9223. .D(vcc),
  9224. .Cin(\macro_inst|apb_dac0_inst|Add5~3 ),
  9225. .Qin(),
  9226. .Clk(),
  9227. .AsyncReset(),
  9228. .SyncReset(),
  9229. .ShiftData(),
  9230. .SyncLoad(),
  9231. .LutOut(\macro_inst|apb_dac0_inst|Add5~4_combout ),
  9232. .Cout(\macro_inst|apb_dac0_inst|Add5~5 ),
  9233. .Q());
  9234. defparam \macro_inst|apb_dac0_inst|Add5~4 .coord_x = 16;
  9235. defparam \macro_inst|apb_dac0_inst|Add5~4 .coord_y = 4;
  9236. defparam \macro_inst|apb_dac0_inst|Add5~4 .coord_z = 8;
  9237. defparam \macro_inst|apb_dac0_inst|Add5~4 .mask = 16'h698E;
  9238. defparam \macro_inst|apb_dac0_inst|Add5~4 .modeMux = 1'b1;
  9239. defparam \macro_inst|apb_dac0_inst|Add5~4 .FeedbackMux = 1'b0;
  9240. defparam \macro_inst|apb_dac0_inst|Add5~4 .ShiftMux = 1'b0;
  9241. defparam \macro_inst|apb_dac0_inst|Add5~4 .BypassEn = 1'b0;
  9242. defparam \macro_inst|apb_dac0_inst|Add5~4 .CarryEnb = 1'b0;
  9243. alta_slice \macro_inst|apb_dac0_inst|Add5~6 (
  9244. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  9245. .B(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  9246. .C(vcc),
  9247. .D(vcc),
  9248. .Cin(\macro_inst|apb_dac0_inst|Add5~5 ),
  9249. .Qin(),
  9250. .Clk(),
  9251. .AsyncReset(),
  9252. .SyncReset(),
  9253. .ShiftData(),
  9254. .SyncLoad(),
  9255. .LutOut(\macro_inst|apb_dac0_inst|Add5~6_combout ),
  9256. .Cout(\macro_inst|apb_dac0_inst|Add5~7 ),
  9257. .Q());
  9258. defparam \macro_inst|apb_dac0_inst|Add5~6 .coord_x = 16;
  9259. defparam \macro_inst|apb_dac0_inst|Add5~6 .coord_y = 4;
  9260. defparam \macro_inst|apb_dac0_inst|Add5~6 .coord_z = 9;
  9261. defparam \macro_inst|apb_dac0_inst|Add5~6 .mask = 16'h9617;
  9262. defparam \macro_inst|apb_dac0_inst|Add5~6 .modeMux = 1'b1;
  9263. defparam \macro_inst|apb_dac0_inst|Add5~6 .FeedbackMux = 1'b0;
  9264. defparam \macro_inst|apb_dac0_inst|Add5~6 .ShiftMux = 1'b0;
  9265. defparam \macro_inst|apb_dac0_inst|Add5~6 .BypassEn = 1'b0;
  9266. defparam \macro_inst|apb_dac0_inst|Add5~6 .CarryEnb = 1'b0;
  9267. alta_slice \macro_inst|apb_dac0_inst|Add5~8 (
  9268. .A(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  9269. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  9270. .C(vcc),
  9271. .D(vcc),
  9272. .Cin(\macro_inst|apb_dac0_inst|Add5~7 ),
  9273. .Qin(),
  9274. .Clk(),
  9275. .AsyncReset(),
  9276. .SyncReset(),
  9277. .ShiftData(),
  9278. .SyncLoad(),
  9279. .LutOut(\macro_inst|apb_dac0_inst|Add5~8_combout ),
  9280. .Cout(\macro_inst|apb_dac0_inst|Add5~9 ),
  9281. .Q());
  9282. defparam \macro_inst|apb_dac0_inst|Add5~8 .coord_x = 16;
  9283. defparam \macro_inst|apb_dac0_inst|Add5~8 .coord_y = 4;
  9284. defparam \macro_inst|apb_dac0_inst|Add5~8 .coord_z = 10;
  9285. defparam \macro_inst|apb_dac0_inst|Add5~8 .mask = 16'h698E;
  9286. defparam \macro_inst|apb_dac0_inst|Add5~8 .modeMux = 1'b1;
  9287. defparam \macro_inst|apb_dac0_inst|Add5~8 .FeedbackMux = 1'b0;
  9288. defparam \macro_inst|apb_dac0_inst|Add5~8 .ShiftMux = 1'b0;
  9289. defparam \macro_inst|apb_dac0_inst|Add5~8 .BypassEn = 1'b0;
  9290. defparam \macro_inst|apb_dac0_inst|Add5~8 .CarryEnb = 1'b0;
  9291. alta_slice \macro_inst|apb_dac0_inst|LessThan0~1 (
  9292. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18_combout ),
  9293. .B(\macro_inst|apb_dac0_inst|max_vol_r [0]),
  9294. .C(vcc),
  9295. .D(vcc),
  9296. .Cin(),
  9297. .Qin(),
  9298. .Clk(),
  9299. .AsyncReset(),
  9300. .SyncReset(),
  9301. .ShiftData(),
  9302. .SyncLoad(),
  9303. .LutOut(),
  9304. .Cout(\macro_inst|apb_dac0_inst|LessThan0~1_cout ),
  9305. .Q());
  9306. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .coord_x = 14;
  9307. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .coord_y = 6;
  9308. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .coord_z = 4;
  9309. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .mask = 16'h0044;
  9310. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .modeMux = 1'b1;
  9311. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .FeedbackMux = 1'b0;
  9312. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .ShiftMux = 1'b0;
  9313. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .BypassEn = 1'b0;
  9314. defparam \macro_inst|apb_dac0_inst|LessThan0~1 .CarryEnb = 1'b0;
  9315. alta_slice \macro_inst|apb_dac0_inst|LessThan0~3 (
  9316. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20_combout ),
  9317. .B(\macro_inst|apb_dac0_inst|max_vol_r [1]),
  9318. .C(vcc),
  9319. .D(vcc),
  9320. .Cin(\macro_inst|apb_dac0_inst|LessThan0~1_cout ),
  9321. .Qin(),
  9322. .Clk(),
  9323. .AsyncReset(),
  9324. .SyncReset(),
  9325. .ShiftData(),
  9326. .SyncLoad(),
  9327. .LutOut(),
  9328. .Cout(\macro_inst|apb_dac0_inst|LessThan0~3_cout ),
  9329. .Q());
  9330. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .coord_x = 14;
  9331. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .coord_y = 6;
  9332. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .coord_z = 5;
  9333. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .mask = 16'h002B;
  9334. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .modeMux = 1'b1;
  9335. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .FeedbackMux = 1'b0;
  9336. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .ShiftMux = 1'b0;
  9337. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .BypassEn = 1'b0;
  9338. defparam \macro_inst|apb_dac0_inst|LessThan0~3 .CarryEnb = 1'b0;
  9339. alta_slice \macro_inst|apb_dac0_inst|LessThan0~5 (
  9340. .A(\macro_inst|apb_dac0_inst|max_vol_r [2]),
  9341. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22_combout ),
  9342. .C(vcc),
  9343. .D(vcc),
  9344. .Cin(\macro_inst|apb_dac0_inst|LessThan0~3_cout ),
  9345. .Qin(),
  9346. .Clk(),
  9347. .AsyncReset(),
  9348. .SyncReset(),
  9349. .ShiftData(),
  9350. .SyncLoad(),
  9351. .LutOut(),
  9352. .Cout(\macro_inst|apb_dac0_inst|LessThan0~5_cout ),
  9353. .Q());
  9354. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .coord_x = 14;
  9355. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .coord_y = 6;
  9356. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .coord_z = 6;
  9357. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .mask = 16'h002B;
  9358. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .modeMux = 1'b1;
  9359. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .FeedbackMux = 1'b0;
  9360. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .ShiftMux = 1'b0;
  9361. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .BypassEn = 1'b0;
  9362. defparam \macro_inst|apb_dac0_inst|LessThan0~5 .CarryEnb = 1'b0;
  9363. alta_slice \macro_inst|apb_dac0_inst|LessThan0~7 (
  9364. .A(\macro_inst|apb_dac0_inst|max_vol_r [3]),
  9365. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24_combout ),
  9366. .C(vcc),
  9367. .D(vcc),
  9368. .Cin(\macro_inst|apb_dac0_inst|LessThan0~5_cout ),
  9369. .Qin(),
  9370. .Clk(),
  9371. .AsyncReset(),
  9372. .SyncReset(),
  9373. .ShiftData(),
  9374. .SyncLoad(),
  9375. .LutOut(),
  9376. .Cout(\macro_inst|apb_dac0_inst|LessThan0~7_cout ),
  9377. .Q());
  9378. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .coord_x = 14;
  9379. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .coord_y = 6;
  9380. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .coord_z = 7;
  9381. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .mask = 16'h004D;
  9382. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .modeMux = 1'b1;
  9383. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .FeedbackMux = 1'b0;
  9384. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .ShiftMux = 1'b0;
  9385. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .BypassEn = 1'b0;
  9386. defparam \macro_inst|apb_dac0_inst|LessThan0~7 .CarryEnb = 1'b0;
  9387. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 (
  9388. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  9389. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  9390. .C(vcc),
  9391. .D(vcc),
  9392. .Cin(),
  9393. .Qin(),
  9394. .Clk(),
  9395. .AsyncReset(),
  9396. .SyncReset(),
  9397. .ShiftData(),
  9398. .SyncLoad(),
  9399. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ),
  9400. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ),
  9401. .Q());
  9402. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_x = 17;
  9403. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_y = 3;
  9404. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_z = 0;
  9405. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .mask = 16'h6688;
  9406. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .modeMux = 1'b0;
  9407. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .FeedbackMux = 1'b0;
  9408. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .ShiftMux = 1'b0;
  9409. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .BypassEn = 1'b0;
  9410. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .CarryEnb = 1'b0;
  9411. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 (
  9412. .A(vcc),
  9413. .B(vcc),
  9414. .C(vcc),
  9415. .D(vcc),
  9416. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ),
  9417. .Qin(),
  9418. .Clk(),
  9419. .AsyncReset(),
  9420. .SyncReset(),
  9421. .ShiftData(),
  9422. .SyncLoad(),
  9423. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ),
  9424. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ),
  9425. .Q());
  9426. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_x = 17;
  9427. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_y = 3;
  9428. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_z = 10;
  9429. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .mask = 16'hF00F;
  9430. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .modeMux = 1'b1;
  9431. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .FeedbackMux = 1'b0;
  9432. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .ShiftMux = 1'b0;
  9433. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .BypassEn = 1'b0;
  9434. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .CarryEnb = 1'b0;
  9435. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 (
  9436. .A(vcc),
  9437. .B(vcc),
  9438. .C(vcc),
  9439. .D(vcc),
  9440. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ),
  9441. .Qin(),
  9442. .Clk(),
  9443. .AsyncReset(),
  9444. .SyncReset(),
  9445. .ShiftData(),
  9446. .SyncLoad(),
  9447. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ),
  9448. .Cout(),
  9449. .Q());
  9450. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_x = 17;
  9451. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_y = 3;
  9452. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_z = 11;
  9453. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .mask = 16'hF0F0;
  9454. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .modeMux = 1'b1;
  9455. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .FeedbackMux = 1'b0;
  9456. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .ShiftMux = 1'b0;
  9457. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .BypassEn = 1'b0;
  9458. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .CarryEnb = 1'b1;
  9459. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 (
  9460. .A(vcc),
  9461. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  9462. .C(vcc),
  9463. .D(vcc),
  9464. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ),
  9465. .Qin(),
  9466. .Clk(),
  9467. .AsyncReset(),
  9468. .SyncReset(),
  9469. .ShiftData(),
  9470. .SyncLoad(),
  9471. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ),
  9472. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ),
  9473. .Q());
  9474. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_x = 17;
  9475. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_y = 3;
  9476. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_z = 1;
  9477. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .mask = 16'h3C3F;
  9478. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .modeMux = 1'b1;
  9479. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .FeedbackMux = 1'b0;
  9480. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .ShiftMux = 1'b0;
  9481. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .BypassEn = 1'b0;
  9482. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .CarryEnb = 1'b0;
  9483. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 (
  9484. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  9485. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  9486. .C(vcc),
  9487. .D(vcc),
  9488. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ),
  9489. .Qin(),
  9490. .Clk(),
  9491. .AsyncReset(),
  9492. .SyncReset(),
  9493. .ShiftData(),
  9494. .SyncLoad(),
  9495. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ),
  9496. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ),
  9497. .Q());
  9498. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_x = 17;
  9499. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_y = 3;
  9500. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_z = 2;
  9501. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .mask = 16'h698E;
  9502. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .modeMux = 1'b1;
  9503. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .FeedbackMux = 1'b0;
  9504. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .ShiftMux = 1'b0;
  9505. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .BypassEn = 1'b0;
  9506. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .CarryEnb = 1'b0;
  9507. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 (
  9508. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  9509. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  9510. .C(vcc),
  9511. .D(vcc),
  9512. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ),
  9513. .Qin(),
  9514. .Clk(),
  9515. .AsyncReset(),
  9516. .SyncReset(),
  9517. .ShiftData(),
  9518. .SyncLoad(),
  9519. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ),
  9520. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ),
  9521. .Q());
  9522. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_x = 17;
  9523. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_y = 3;
  9524. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_z = 3;
  9525. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .mask = 16'h9617;
  9526. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .modeMux = 1'b1;
  9527. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .FeedbackMux = 1'b0;
  9528. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .ShiftMux = 1'b0;
  9529. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .BypassEn = 1'b0;
  9530. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .CarryEnb = 1'b0;
  9531. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 (
  9532. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  9533. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  9534. .C(vcc),
  9535. .D(vcc),
  9536. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ),
  9537. .Qin(),
  9538. .Clk(),
  9539. .AsyncReset(),
  9540. .SyncReset(),
  9541. .ShiftData(),
  9542. .SyncLoad(),
  9543. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ),
  9544. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ),
  9545. .Q());
  9546. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_x = 17;
  9547. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_y = 3;
  9548. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_z = 4;
  9549. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .mask = 16'h698E;
  9550. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .modeMux = 1'b1;
  9551. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .FeedbackMux = 1'b0;
  9552. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .ShiftMux = 1'b0;
  9553. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .BypassEn = 1'b0;
  9554. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .CarryEnb = 1'b0;
  9555. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 (
  9556. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  9557. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  9558. .C(vcc),
  9559. .D(vcc),
  9560. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ),
  9561. .Qin(),
  9562. .Clk(),
  9563. .AsyncReset(),
  9564. .SyncReset(),
  9565. .ShiftData(),
  9566. .SyncLoad(),
  9567. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ),
  9568. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ),
  9569. .Q());
  9570. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_x = 17;
  9571. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_y = 3;
  9572. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_z = 5;
  9573. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .mask = 16'h9617;
  9574. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .modeMux = 1'b1;
  9575. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .FeedbackMux = 1'b0;
  9576. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .ShiftMux = 1'b0;
  9577. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .BypassEn = 1'b0;
  9578. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .CarryEnb = 1'b0;
  9579. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 (
  9580. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  9581. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  9582. .C(vcc),
  9583. .D(vcc),
  9584. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ),
  9585. .Qin(),
  9586. .Clk(),
  9587. .AsyncReset(),
  9588. .SyncReset(),
  9589. .ShiftData(),
  9590. .SyncLoad(),
  9591. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ),
  9592. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ),
  9593. .Q());
  9594. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_x = 17;
  9595. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_y = 3;
  9596. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_z = 6;
  9597. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .mask = 16'h698E;
  9598. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .modeMux = 1'b1;
  9599. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .FeedbackMux = 1'b0;
  9600. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .ShiftMux = 1'b0;
  9601. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .BypassEn = 1'b0;
  9602. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .CarryEnb = 1'b0;
  9603. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 (
  9604. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  9605. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  9606. .C(vcc),
  9607. .D(vcc),
  9608. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ),
  9609. .Qin(),
  9610. .Clk(),
  9611. .AsyncReset(),
  9612. .SyncReset(),
  9613. .ShiftData(),
  9614. .SyncLoad(),
  9615. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ),
  9616. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ),
  9617. .Q());
  9618. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_x = 17;
  9619. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_y = 3;
  9620. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_z = 7;
  9621. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .mask = 16'h9617;
  9622. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .modeMux = 1'b1;
  9623. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .FeedbackMux = 1'b0;
  9624. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .ShiftMux = 1'b0;
  9625. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .BypassEn = 1'b0;
  9626. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .CarryEnb = 1'b0;
  9627. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 (
  9628. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  9629. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  9630. .C(vcc),
  9631. .D(vcc),
  9632. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ),
  9633. .Qin(),
  9634. .Clk(),
  9635. .AsyncReset(),
  9636. .SyncReset(),
  9637. .ShiftData(),
  9638. .SyncLoad(),
  9639. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ),
  9640. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ),
  9641. .Q());
  9642. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_x = 17;
  9643. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_y = 3;
  9644. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_z = 8;
  9645. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .mask = 16'h698E;
  9646. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .modeMux = 1'b1;
  9647. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .FeedbackMux = 1'b0;
  9648. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .ShiftMux = 1'b0;
  9649. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .BypassEn = 1'b0;
  9650. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .CarryEnb = 1'b0;
  9651. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 (
  9652. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  9653. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  9654. .C(vcc),
  9655. .D(vcc),
  9656. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ),
  9657. .Qin(),
  9658. .Clk(),
  9659. .AsyncReset(),
  9660. .SyncReset(),
  9661. .ShiftData(),
  9662. .SyncLoad(),
  9663. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ),
  9664. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ),
  9665. .Q());
  9666. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_x = 17;
  9667. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_y = 3;
  9668. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_z = 9;
  9669. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .mask = 16'h694D;
  9670. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .modeMux = 1'b1;
  9671. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .FeedbackMux = 1'b0;
  9672. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .ShiftMux = 1'b0;
  9673. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .BypassEn = 1'b0;
  9674. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .CarryEnb = 1'b0;
  9675. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 (
  9676. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  9677. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  9678. .C(vcc),
  9679. .D(vcc),
  9680. .Cin(),
  9681. .Qin(),
  9682. .Clk(),
  9683. .AsyncReset(),
  9684. .SyncReset(),
  9685. .ShiftData(),
  9686. .SyncLoad(),
  9687. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ),
  9688. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ),
  9689. .Q());
  9690. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_x = 14;
  9691. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_y = 2;
  9692. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_z = 0;
  9693. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .mask = 16'h6688;
  9694. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .modeMux = 1'b0;
  9695. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .FeedbackMux = 1'b0;
  9696. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .ShiftMux = 1'b0;
  9697. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .BypassEn = 1'b0;
  9698. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .CarryEnb = 1'b0;
  9699. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 (
  9700. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  9701. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  9702. .C(vcc),
  9703. .D(vcc),
  9704. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ),
  9705. .Qin(),
  9706. .Clk(),
  9707. .AsyncReset(),
  9708. .SyncReset(),
  9709. .ShiftData(),
  9710. .SyncLoad(),
  9711. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ),
  9712. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ),
  9713. .Q());
  9714. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_x = 14;
  9715. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_y = 2;
  9716. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_z = 1;
  9717. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .mask = 16'h9617;
  9718. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .modeMux = 1'b1;
  9719. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .FeedbackMux = 1'b0;
  9720. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .ShiftMux = 1'b0;
  9721. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .BypassEn = 1'b0;
  9722. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .CarryEnb = 1'b0;
  9723. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 (
  9724. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  9725. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  9726. .C(vcc),
  9727. .D(vcc),
  9728. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ),
  9729. .Qin(),
  9730. .Clk(),
  9731. .AsyncReset(),
  9732. .SyncReset(),
  9733. .ShiftData(),
  9734. .SyncLoad(),
  9735. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ),
  9736. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ),
  9737. .Q());
  9738. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_x = 14;
  9739. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_y = 2;
  9740. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_z = 2;
  9741. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .mask = 16'h698E;
  9742. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .modeMux = 1'b1;
  9743. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .FeedbackMux = 1'b0;
  9744. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .ShiftMux = 1'b0;
  9745. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .BypassEn = 1'b0;
  9746. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .CarryEnb = 1'b0;
  9747. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 (
  9748. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  9749. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  9750. .C(vcc),
  9751. .D(vcc),
  9752. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ),
  9753. .Qin(),
  9754. .Clk(),
  9755. .AsyncReset(),
  9756. .SyncReset(),
  9757. .ShiftData(),
  9758. .SyncLoad(),
  9759. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ),
  9760. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ),
  9761. .Q());
  9762. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_x = 14;
  9763. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_y = 2;
  9764. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_z = 3;
  9765. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .mask = 16'h9617;
  9766. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .modeMux = 1'b1;
  9767. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .FeedbackMux = 1'b0;
  9768. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .ShiftMux = 1'b0;
  9769. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .BypassEn = 1'b0;
  9770. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .CarryEnb = 1'b0;
  9771. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 (
  9772. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  9773. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  9774. .C(vcc),
  9775. .D(vcc),
  9776. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ),
  9777. .Qin(),
  9778. .Clk(),
  9779. .AsyncReset(),
  9780. .SyncReset(),
  9781. .ShiftData(),
  9782. .SyncLoad(),
  9783. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ),
  9784. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ),
  9785. .Q());
  9786. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_x = 14;
  9787. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_y = 2;
  9788. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_z = 4;
  9789. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .mask = 16'h964D;
  9790. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .modeMux = 1'b1;
  9791. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .FeedbackMux = 1'b0;
  9792. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .ShiftMux = 1'b0;
  9793. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .BypassEn = 1'b0;
  9794. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .CarryEnb = 1'b0;
  9795. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 (
  9796. .A(vcc),
  9797. .B(vcc),
  9798. .C(vcc),
  9799. .D(vcc),
  9800. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ),
  9801. .Qin(),
  9802. .Clk(),
  9803. .AsyncReset(),
  9804. .SyncReset(),
  9805. .ShiftData(),
  9806. .SyncLoad(),
  9807. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ),
  9808. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ),
  9809. .Q());
  9810. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_x = 14;
  9811. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_y = 2;
  9812. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_z = 5;
  9813. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .mask = 16'h0F0F;
  9814. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .modeMux = 1'b1;
  9815. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .FeedbackMux = 1'b0;
  9816. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .ShiftMux = 1'b0;
  9817. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .BypassEn = 1'b0;
  9818. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .CarryEnb = 1'b0;
  9819. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 (
  9820. .A(vcc),
  9821. .B(vcc),
  9822. .C(vcc),
  9823. .D(vcc),
  9824. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ),
  9825. .Qin(),
  9826. .Clk(),
  9827. .AsyncReset(),
  9828. .SyncReset(),
  9829. .ShiftData(),
  9830. .SyncLoad(),
  9831. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ),
  9832. .Cout(),
  9833. .Q());
  9834. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_x = 14;
  9835. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_y = 2;
  9836. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_z = 6;
  9837. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .mask = 16'h0F0F;
  9838. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .modeMux = 1'b1;
  9839. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .FeedbackMux = 1'b0;
  9840. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .ShiftMux = 1'b0;
  9841. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .BypassEn = 1'b0;
  9842. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .CarryEnb = 1'b1;
  9843. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 (
  9844. .A(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  9845. .B(\macro_inst|apb_dac0_inst|sine_rom~123_combout ),
  9846. .C(\macro_inst|apb_dac0_inst|sine_rom~103_combout ),
  9847. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  9848. .Cin(),
  9849. .Qin(),
  9850. .Clk(),
  9851. .AsyncReset(),
  9852. .SyncReset(),
  9853. .ShiftData(),
  9854. .SyncLoad(),
  9855. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  9856. .Cout(),
  9857. .Q());
  9858. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_x = 17;
  9859. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_y = 2;
  9860. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_z = 1;
  9861. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .mask = 16'hFEFC;
  9862. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .modeMux = 1'b0;
  9863. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .FeedbackMux = 1'b0;
  9864. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .ShiftMux = 1'b0;
  9865. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .BypassEn = 1'b0;
  9866. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .CarryEnb = 1'b1;
  9867. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 (
  9868. .A(\macro_inst|apb_dac0_inst|sine_rom~18_combout ),
  9869. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  9870. .C(\macro_inst|apb_dac0_inst|sine_rom~38_combout ),
  9871. .D(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  9872. .Cin(),
  9873. .Qin(),
  9874. .Clk(),
  9875. .AsyncReset(),
  9876. .SyncReset(),
  9877. .ShiftData(),
  9878. .SyncLoad(),
  9879. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2_combout ),
  9880. .Cout(),
  9881. .Q());
  9882. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .coord_x = 17;
  9883. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .coord_y = 2;
  9884. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .coord_z = 10;
  9885. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .mask = 16'hFEFA;
  9886. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .modeMux = 1'b0;
  9887. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .FeedbackMux = 1'b0;
  9888. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .ShiftMux = 1'b0;
  9889. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .BypassEn = 1'b0;
  9890. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2 .CarryEnb = 1'b1;
  9891. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 (
  9892. .A(\macro_inst|apb_dac0_inst|sine_rom~260_combout ),
  9893. .B(\macro_inst|apb_dac0_inst|sine_rom~254_combout ),
  9894. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2_combout ),
  9895. .D(\macro_inst|apb_dac0_inst|sine_rom~273_combout ),
  9896. .Cin(),
  9897. .Qin(),
  9898. .Clk(),
  9899. .AsyncReset(),
  9900. .SyncReset(),
  9901. .ShiftData(),
  9902. .SyncLoad(),
  9903. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  9904. .Cout(),
  9905. .Q());
  9906. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .coord_x = 17;
  9907. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .coord_y = 2;
  9908. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .coord_z = 7;
  9909. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .mask = 16'hFFE0;
  9910. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .modeMux = 1'b0;
  9911. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .FeedbackMux = 1'b0;
  9912. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .ShiftMux = 1'b0;
  9913. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .BypassEn = 1'b0;
  9914. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5 .CarryEnb = 1'b1;
  9915. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 (
  9916. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  9917. .B(vcc),
  9918. .C(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  9919. .D(vcc),
  9920. .Cin(),
  9921. .Qin(),
  9922. .Clk(),
  9923. .AsyncReset(),
  9924. .SyncReset(),
  9925. .ShiftData(),
  9926. .SyncLoad(),
  9927. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  9928. .Cout(),
  9929. .Q());
  9930. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .coord_x = 15;
  9931. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .coord_y = 2;
  9932. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .coord_z = 0;
  9933. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .mask = 16'h5A5A;
  9934. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .modeMux = 1'b0;
  9935. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .FeedbackMux = 1'b0;
  9936. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .ShiftMux = 1'b0;
  9937. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .BypassEn = 1'b0;
  9938. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0 .CarryEnb = 1'b1;
  9939. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 (
  9940. .A(vcc),
  9941. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  9942. .C(vcc),
  9943. .D(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  9944. .Cin(),
  9945. .Qin(),
  9946. .Clk(),
  9947. .AsyncReset(),
  9948. .SyncReset(),
  9949. .ShiftData(),
  9950. .SyncLoad(),
  9951. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  9952. .Cout(),
  9953. .Q());
  9954. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_x = 17;
  9955. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_y = 2;
  9956. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_z = 5;
  9957. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .mask = 16'h33CC;
  9958. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .modeMux = 1'b0;
  9959. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .FeedbackMux = 1'b0;
  9960. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .ShiftMux = 1'b0;
  9961. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .BypassEn = 1'b0;
  9962. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .CarryEnb = 1'b1;
  9963. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 (
  9964. .A(\macro_inst|apb_dac0_inst|sine_rom~260_combout ),
  9965. .B(vcc),
  9966. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2_combout ),
  9967. .D(\macro_inst|apb_dac0_inst|sine_rom~254_combout ),
  9968. .Cin(),
  9969. .Qin(),
  9970. .Clk(),
  9971. .AsyncReset(),
  9972. .SyncReset(),
  9973. .ShiftData(),
  9974. .SyncLoad(),
  9975. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  9976. .Cout(),
  9977. .Q());
  9978. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .coord_x = 17;
  9979. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .coord_y = 2;
  9980. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .coord_z = 8;
  9981. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .mask = 16'h0F5A;
  9982. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .modeMux = 1'b0;
  9983. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .FeedbackMux = 1'b0;
  9984. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .ShiftMux = 1'b0;
  9985. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .BypassEn = 1'b0;
  9986. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2 .CarryEnb = 1'b1;
  9987. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] (
  9988. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  9989. .B(vcc),
  9990. .C(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  9991. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  9992. .Cin(),
  9993. .Qin(),
  9994. .Clk(),
  9995. .AsyncReset(),
  9996. .SyncReset(),
  9997. .ShiftData(),
  9998. .SyncLoad(),
  9999. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  10000. .Cout(),
  10001. .Q());
  10002. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_x = 15;
  10003. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_y = 2;
  10004. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_z = 2;
  10005. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .mask = 16'h5AAA;
  10006. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .modeMux = 1'b0;
  10007. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .FeedbackMux = 1'b0;
  10008. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .ShiftMux = 1'b0;
  10009. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .BypassEn = 1'b0;
  10010. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .CarryEnb = 1'b1;
  10011. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] (
  10012. .A(vcc),
  10013. .B(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10014. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10015. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10016. .Cin(),
  10017. .Qin(),
  10018. .Clk(),
  10019. .AsyncReset(),
  10020. .SyncReset(),
  10021. .ShiftData(),
  10022. .SyncLoad(),
  10023. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  10024. .Cout(),
  10025. .Q());
  10026. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_x = 14;
  10027. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_y = 2;
  10028. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_z = 8;
  10029. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .mask = 16'hC0F0;
  10030. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .modeMux = 1'b0;
  10031. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .FeedbackMux = 1'b0;
  10032. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .ShiftMux = 1'b0;
  10033. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .BypassEn = 1'b0;
  10034. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .CarryEnb = 1'b1;
  10035. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] (
  10036. .A(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10037. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10038. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10039. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10040. .Cin(),
  10041. .Qin(),
  10042. .Clk(),
  10043. .AsyncReset(),
  10044. .SyncReset(),
  10045. .ShiftData(),
  10046. .SyncLoad(),
  10047. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  10048. .Cout(),
  10049. .Q());
  10050. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_x = 15;
  10051. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_y = 2;
  10052. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_z = 3;
  10053. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .mask = 16'h286C;
  10054. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .modeMux = 1'b0;
  10055. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .FeedbackMux = 1'b0;
  10056. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .ShiftMux = 1'b0;
  10057. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .BypassEn = 1'b0;
  10058. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .CarryEnb = 1'b1;
  10059. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] (
  10060. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10061. .B(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10062. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10063. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10064. .Cin(),
  10065. .Qin(),
  10066. .Clk(),
  10067. .AsyncReset(),
  10068. .SyncReset(),
  10069. .ShiftData(),
  10070. .SyncLoad(),
  10071. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  10072. .Cout(),
  10073. .Q());
  10074. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_x = 16;
  10075. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_y = 2;
  10076. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_z = 1;
  10077. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .mask = 16'h468A;
  10078. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .modeMux = 1'b0;
  10079. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .FeedbackMux = 1'b0;
  10080. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .ShiftMux = 1'b0;
  10081. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .BypassEn = 1'b0;
  10082. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .CarryEnb = 1'b1;
  10083. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] (
  10084. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10085. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10086. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10087. .D(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10088. .Cin(),
  10089. .Qin(),
  10090. .Clk(),
  10091. .AsyncReset(),
  10092. .SyncReset(),
  10093. .ShiftData(),
  10094. .SyncLoad(),
  10095. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  10096. .Cout(),
  10097. .Q());
  10098. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_x = 16;
  10099. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_y = 2;
  10100. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_z = 6;
  10101. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .mask = 16'h5A22;
  10102. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .modeMux = 1'b0;
  10103. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .FeedbackMux = 1'b0;
  10104. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .ShiftMux = 1'b0;
  10105. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .BypassEn = 1'b0;
  10106. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .CarryEnb = 1'b1;
  10107. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] (
  10108. .A(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10109. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10110. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10111. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10112. .Cin(),
  10113. .Qin(),
  10114. .Clk(),
  10115. .AsyncReset(),
  10116. .SyncReset(),
  10117. .ShiftData(),
  10118. .SyncLoad(),
  10119. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  10120. .Cout(),
  10121. .Q());
  10122. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_x = 14;
  10123. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_y = 3;
  10124. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_z = 7;
  10125. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .mask = 16'h286C;
  10126. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .modeMux = 1'b0;
  10127. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .FeedbackMux = 1'b0;
  10128. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .ShiftMux = 1'b0;
  10129. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .BypassEn = 1'b0;
  10130. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .CarryEnb = 1'b1;
  10131. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] (
  10132. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10133. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10134. .C(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10135. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10136. .Cin(),
  10137. .Qin(),
  10138. .Clk(),
  10139. .AsyncReset(),
  10140. .SyncReset(),
  10141. .ShiftData(),
  10142. .SyncLoad(),
  10143. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  10144. .Cout(),
  10145. .Q());
  10146. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_x = 14;
  10147. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_y = 3;
  10148. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_z = 11;
  10149. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .mask = 16'h34C4;
  10150. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .modeMux = 1'b0;
  10151. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .FeedbackMux = 1'b0;
  10152. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .ShiftMux = 1'b0;
  10153. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .BypassEn = 1'b0;
  10154. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .CarryEnb = 1'b1;
  10155. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] (
  10156. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10157. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10158. .C(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10159. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10160. .Cin(),
  10161. .Qin(),
  10162. .Clk(),
  10163. .AsyncReset(),
  10164. .SyncReset(),
  10165. .ShiftData(),
  10166. .SyncLoad(),
  10167. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  10168. .Cout(),
  10169. .Q());
  10170. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_x = 14;
  10171. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_y = 3;
  10172. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_z = 14;
  10173. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .mask = 16'h34C4;
  10174. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .modeMux = 1'b0;
  10175. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .FeedbackMux = 1'b0;
  10176. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .ShiftMux = 1'b0;
  10177. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .BypassEn = 1'b0;
  10178. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .CarryEnb = 1'b1;
  10179. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] (
  10180. .A(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10181. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10182. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10183. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10184. .Cin(),
  10185. .Qin(),
  10186. .Clk(),
  10187. .AsyncReset(),
  10188. .SyncReset(),
  10189. .ShiftData(),
  10190. .SyncLoad(),
  10191. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  10192. .Cout(),
  10193. .Q());
  10194. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_x = 14;
  10195. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_y = 3;
  10196. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_z = 13;
  10197. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .mask = 16'h1AB0;
  10198. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .modeMux = 1'b0;
  10199. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .FeedbackMux = 1'b0;
  10200. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .ShiftMux = 1'b0;
  10201. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .BypassEn = 1'b0;
  10202. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .CarryEnb = 1'b1;
  10203. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] (
  10204. .A(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10205. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10206. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10207. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10208. .Cin(),
  10209. .Qin(),
  10210. .Clk(),
  10211. .AsyncReset(),
  10212. .SyncReset(),
  10213. .ShiftData(),
  10214. .SyncLoad(),
  10215. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  10216. .Cout(),
  10217. .Q());
  10218. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_x = 14;
  10219. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_y = 3;
  10220. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_z = 6;
  10221. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .mask = 16'h2878;
  10222. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .modeMux = 1'b0;
  10223. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .FeedbackMux = 1'b0;
  10224. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .ShiftMux = 1'b0;
  10225. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .BypassEn = 1'b0;
  10226. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .CarryEnb = 1'b1;
  10227. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] (
  10228. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10229. .B(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  10230. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10231. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10232. .Cin(),
  10233. .Qin(),
  10234. .Clk(),
  10235. .AsyncReset(),
  10236. .SyncReset(),
  10237. .ShiftData(),
  10238. .SyncLoad(),
  10239. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  10240. .Cout(),
  10241. .Q());
  10242. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_x = 14;
  10243. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_y = 2;
  10244. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_z = 10;
  10245. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .mask = 16'h1CD0;
  10246. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .modeMux = 1'b0;
  10247. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .FeedbackMux = 1'b0;
  10248. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .ShiftMux = 1'b0;
  10249. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .BypassEn = 1'b0;
  10250. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .CarryEnb = 1'b1;
  10251. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] (
  10252. .A(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  10253. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10254. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10255. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10256. .Cin(),
  10257. .Qin(),
  10258. .Clk(),
  10259. .AsyncReset(),
  10260. .SyncReset(),
  10261. .ShiftData(),
  10262. .SyncLoad(),
  10263. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  10264. .Cout(),
  10265. .Q());
  10266. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_x = 15;
  10267. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_y = 2;
  10268. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_z = 4;
  10269. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .mask = 16'h96CC;
  10270. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .modeMux = 1'b0;
  10271. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .FeedbackMux = 1'b0;
  10272. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .ShiftMux = 1'b0;
  10273. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .BypassEn = 1'b0;
  10274. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .CarryEnb = 1'b1;
  10275. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] (
  10276. .A(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  10277. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10278. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10279. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10280. .Cin(),
  10281. .Qin(),
  10282. .Clk(),
  10283. .AsyncReset(),
  10284. .SyncReset(),
  10285. .ShiftData(),
  10286. .SyncLoad(),
  10287. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  10288. .Cout(),
  10289. .Q());
  10290. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_x = 14;
  10291. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_y = 2;
  10292. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_z = 12;
  10293. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .mask = 16'h48CC;
  10294. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .modeMux = 1'b0;
  10295. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .FeedbackMux = 1'b0;
  10296. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .ShiftMux = 1'b0;
  10297. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .BypassEn = 1'b0;
  10298. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .CarryEnb = 1'b1;
  10299. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] (
  10300. .A(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  10301. .B(\macro_inst|apb_dac0_inst|sine_rom~123_combout ),
  10302. .C(\macro_inst|apb_dac0_inst|sine_rom~103_combout ),
  10303. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  10304. .Cin(),
  10305. .Qin(),
  10306. .Clk(),
  10307. .AsyncReset(),
  10308. .SyncReset(),
  10309. .ShiftData(),
  10310. .SyncLoad(),
  10311. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10312. .Cout(),
  10313. .Q());
  10314. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_x = 17;
  10315. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_y = 2;
  10316. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_z = 12;
  10317. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .mask = 16'h56FC;
  10318. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .modeMux = 1'b0;
  10319. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .FeedbackMux = 1'b0;
  10320. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .ShiftMux = 1'b0;
  10321. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .BypassEn = 1'b0;
  10322. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .CarryEnb = 1'b1;
  10323. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] (
  10324. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10325. .B(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10326. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10327. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10328. .Cin(),
  10329. .Qin(),
  10330. .Clk(),
  10331. .AsyncReset(),
  10332. .SyncReset(),
  10333. .ShiftData(),
  10334. .SyncLoad(),
  10335. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  10336. .Cout(),
  10337. .Q());
  10338. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_x = 15;
  10339. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_y = 2;
  10340. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_z = 5;
  10341. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .mask = 16'h52A2;
  10342. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .modeMux = 1'b0;
  10343. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .FeedbackMux = 1'b0;
  10344. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .ShiftMux = 1'b0;
  10345. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .BypassEn = 1'b0;
  10346. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .CarryEnb = 1'b1;
  10347. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] (
  10348. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10349. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10350. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10351. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10352. .Cin(),
  10353. .Qin(),
  10354. .Clk(),
  10355. .AsyncReset(),
  10356. .SyncReset(),
  10357. .ShiftData(),
  10358. .SyncLoad(),
  10359. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  10360. .Cout(),
  10361. .Q());
  10362. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_x = 16;
  10363. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_y = 2;
  10364. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_z = 3;
  10365. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .mask = 16'h268C;
  10366. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .modeMux = 1'b0;
  10367. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .FeedbackMux = 1'b0;
  10368. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .ShiftMux = 1'b0;
  10369. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .BypassEn = 1'b0;
  10370. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .CarryEnb = 1'b1;
  10371. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] (
  10372. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10373. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10374. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10375. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10376. .Cin(),
  10377. .Qin(),
  10378. .Clk(),
  10379. .AsyncReset(),
  10380. .SyncReset(),
  10381. .ShiftData(),
  10382. .SyncLoad(),
  10383. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  10384. .Cout(),
  10385. .Q());
  10386. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_x = 16;
  10387. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_y = 2;
  10388. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_z = 4;
  10389. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .mask = 16'h286C;
  10390. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .modeMux = 1'b0;
  10391. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .FeedbackMux = 1'b0;
  10392. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .ShiftMux = 1'b0;
  10393. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .BypassEn = 1'b0;
  10394. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .CarryEnb = 1'b1;
  10395. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] (
  10396. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10397. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10398. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10399. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10400. .Cin(),
  10401. .Qin(),
  10402. .Clk(),
  10403. .AsyncReset(),
  10404. .SyncReset(),
  10405. .ShiftData(),
  10406. .SyncLoad(),
  10407. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  10408. .Cout(),
  10409. .Q());
  10410. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_x = 14;
  10411. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_y = 3;
  10412. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_z = 3;
  10413. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .mask = 16'h4878;
  10414. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .modeMux = 1'b0;
  10415. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .FeedbackMux = 1'b0;
  10416. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .ShiftMux = 1'b0;
  10417. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .BypassEn = 1'b0;
  10418. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .CarryEnb = 1'b1;
  10419. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] (
  10420. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10421. .B(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10422. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10423. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10424. .Cin(),
  10425. .Qin(),
  10426. .Clk(),
  10427. .AsyncReset(),
  10428. .SyncReset(),
  10429. .ShiftData(),
  10430. .SyncLoad(),
  10431. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  10432. .Cout(),
  10433. .Q());
  10434. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_x = 14;
  10435. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_y = 3;
  10436. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_z = 8;
  10437. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .mask = 16'h660A;
  10438. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .modeMux = 1'b0;
  10439. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .FeedbackMux = 1'b0;
  10440. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .ShiftMux = 1'b0;
  10441. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .BypassEn = 1'b0;
  10442. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .CarryEnb = 1'b1;
  10443. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] (
  10444. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10445. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10446. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10447. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10448. .Cin(),
  10449. .Qin(),
  10450. .Clk(),
  10451. .AsyncReset(),
  10452. .SyncReset(),
  10453. .ShiftData(),
  10454. .SyncLoad(),
  10455. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  10456. .Cout(),
  10457. .Q());
  10458. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_x = 17;
  10459. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_y = 3;
  10460. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_z = 13;
  10461. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .mask = 16'h34C4;
  10462. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .modeMux = 1'b0;
  10463. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .FeedbackMux = 1'b0;
  10464. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .ShiftMux = 1'b0;
  10465. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .BypassEn = 1'b0;
  10466. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .CarryEnb = 1'b1;
  10467. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] (
  10468. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10469. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10470. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10471. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10472. .Cin(),
  10473. .Qin(),
  10474. .Clk(),
  10475. .AsyncReset(),
  10476. .SyncReset(),
  10477. .ShiftData(),
  10478. .SyncLoad(),
  10479. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  10480. .Cout(),
  10481. .Q());
  10482. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_x = 14;
  10483. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_y = 2;
  10484. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_z = 14;
  10485. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .mask = 16'h468A;
  10486. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .modeMux = 1'b0;
  10487. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .FeedbackMux = 1'b0;
  10488. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .ShiftMux = 1'b0;
  10489. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .BypassEn = 1'b0;
  10490. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .CarryEnb = 1'b1;
  10491. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] (
  10492. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10493. .B(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10494. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10495. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10496. .Cin(),
  10497. .Qin(),
  10498. .Clk(),
  10499. .AsyncReset(),
  10500. .SyncReset(),
  10501. .ShiftData(),
  10502. .SyncLoad(),
  10503. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  10504. .Cout(),
  10505. .Q());
  10506. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_x = 14;
  10507. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_y = 2;
  10508. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_z = 15;
  10509. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .mask = 16'h53A0;
  10510. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .modeMux = 1'b0;
  10511. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .FeedbackMux = 1'b0;
  10512. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .ShiftMux = 1'b0;
  10513. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .BypassEn = 1'b0;
  10514. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .CarryEnb = 1'b1;
  10515. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] (
  10516. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  10517. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10518. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~0_combout ),
  10519. .D(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10520. .Cin(),
  10521. .Qin(),
  10522. .Clk(),
  10523. .AsyncReset(),
  10524. .SyncReset(),
  10525. .ShiftData(),
  10526. .SyncLoad(),
  10527. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  10528. .Cout(),
  10529. .Q());
  10530. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_x = 14;
  10531. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_y = 2;
  10532. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_z = 9;
  10533. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .mask = 16'h606A;
  10534. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .modeMux = 1'b0;
  10535. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .FeedbackMux = 1'b0;
  10536. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .ShiftMux = 1'b0;
  10537. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .BypassEn = 1'b0;
  10538. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .CarryEnb = 1'b1;
  10539. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] (
  10540. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10541. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  10542. .C(\macro_inst|apb_dac0_inst|sine_rom~339_combout ),
  10543. .D(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  10544. .Cin(),
  10545. .Qin(),
  10546. .Clk(),
  10547. .AsyncReset(),
  10548. .SyncReset(),
  10549. .ShiftData(),
  10550. .SyncLoad(),
  10551. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  10552. .Cout(),
  10553. .Q());
  10554. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_x = 17;
  10555. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_y = 2;
  10556. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_z = 15;
  10557. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .mask = 16'h1E78;
  10558. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .modeMux = 1'b0;
  10559. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .FeedbackMux = 1'b0;
  10560. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .ShiftMux = 1'b0;
  10561. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .BypassEn = 1'b0;
  10562. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .CarryEnb = 1'b1;
  10563. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] (
  10564. .A(\macro_inst|apb_dac0_inst|sine_rom~339_combout ),
  10565. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  10566. .C(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10567. .D(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  10568. .Cin(),
  10569. .Qin(),
  10570. .Clk(),
  10571. .AsyncReset(),
  10572. .SyncReset(),
  10573. .ShiftData(),
  10574. .SyncLoad(),
  10575. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  10576. .Cout(),
  10577. .Q());
  10578. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_x = 17;
  10579. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_y = 2;
  10580. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_z = 11;
  10581. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .mask = 16'h268A;
  10582. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .modeMux = 1'b0;
  10583. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .FeedbackMux = 1'b0;
  10584. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .ShiftMux = 1'b0;
  10585. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .BypassEn = 1'b0;
  10586. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .CarryEnb = 1'b1;
  10587. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] (
  10588. .A(\macro_inst|apb_dac0_inst|sine_rom~18_combout ),
  10589. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  10590. .C(\macro_inst|apb_dac0_inst|sine_rom~38_combout ),
  10591. .D(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  10592. .Cin(),
  10593. .Qin(),
  10594. .Clk(),
  10595. .AsyncReset(),
  10596. .SyncReset(),
  10597. .ShiftData(),
  10598. .SyncLoad(),
  10599. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10600. .Cout(),
  10601. .Q());
  10602. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_x = 17;
  10603. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_y = 2;
  10604. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_z = 3;
  10605. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .mask = 16'h36FA;
  10606. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .modeMux = 1'b0;
  10607. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .FeedbackMux = 1'b0;
  10608. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .ShiftMux = 1'b0;
  10609. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .BypassEn = 1'b0;
  10610. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .CarryEnb = 1'b1;
  10611. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] (
  10612. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10613. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10614. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10615. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10616. .Cin(),
  10617. .Qin(),
  10618. .Clk(),
  10619. .AsyncReset(),
  10620. .SyncReset(),
  10621. .ShiftData(),
  10622. .SyncLoad(),
  10623. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  10624. .Cout(),
  10625. .Q());
  10626. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_x = 16;
  10627. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_y = 2;
  10628. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_z = 5;
  10629. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .mask = 16'h286C;
  10630. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .modeMux = 1'b0;
  10631. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .FeedbackMux = 1'b0;
  10632. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .ShiftMux = 1'b0;
  10633. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .BypassEn = 1'b0;
  10634. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .CarryEnb = 1'b1;
  10635. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] (
  10636. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10637. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10638. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10639. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10640. .Cin(),
  10641. .Qin(),
  10642. .Clk(),
  10643. .AsyncReset(),
  10644. .SyncReset(),
  10645. .ShiftData(),
  10646. .SyncLoad(),
  10647. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  10648. .Cout(),
  10649. .Q());
  10650. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_x = 14;
  10651. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_y = 3;
  10652. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_z = 2;
  10653. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .mask = 16'h2878;
  10654. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .modeMux = 1'b0;
  10655. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .FeedbackMux = 1'b0;
  10656. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .ShiftMux = 1'b0;
  10657. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .BypassEn = 1'b0;
  10658. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .CarryEnb = 1'b1;
  10659. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] (
  10660. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10661. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10662. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10663. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10664. .Cin(),
  10665. .Qin(),
  10666. .Clk(),
  10667. .AsyncReset(),
  10668. .SyncReset(),
  10669. .ShiftData(),
  10670. .SyncLoad(),
  10671. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  10672. .Cout(),
  10673. .Q());
  10674. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_x = 14;
  10675. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_y = 3;
  10676. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_z = 5;
  10677. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .mask = 16'h52A2;
  10678. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .modeMux = 1'b0;
  10679. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .FeedbackMux = 1'b0;
  10680. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .ShiftMux = 1'b0;
  10681. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .BypassEn = 1'b0;
  10682. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .CarryEnb = 1'b1;
  10683. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] (
  10684. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10685. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10686. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10687. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10688. .Cin(),
  10689. .Qin(),
  10690. .Clk(),
  10691. .AsyncReset(),
  10692. .SyncReset(),
  10693. .ShiftData(),
  10694. .SyncLoad(),
  10695. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  10696. .Cout(),
  10697. .Q());
  10698. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_x = 14;
  10699. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_y = 3;
  10700. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_z = 15;
  10701. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .mask = 16'h606A;
  10702. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .modeMux = 1'b0;
  10703. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .FeedbackMux = 1'b0;
  10704. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .ShiftMux = 1'b0;
  10705. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .BypassEn = 1'b0;
  10706. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .CarryEnb = 1'b1;
  10707. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] (
  10708. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10709. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10710. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10711. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10712. .Cin(),
  10713. .Qin(),
  10714. .Clk(),
  10715. .AsyncReset(),
  10716. .SyncReset(),
  10717. .ShiftData(),
  10718. .SyncLoad(),
  10719. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  10720. .Cout(),
  10721. .Q());
  10722. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_x = 17;
  10723. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_y = 3;
  10724. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_z = 12;
  10725. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .mask = 16'h286C;
  10726. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .modeMux = 1'b0;
  10727. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .FeedbackMux = 1'b0;
  10728. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .ShiftMux = 1'b0;
  10729. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .BypassEn = 1'b0;
  10730. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .CarryEnb = 1'b1;
  10731. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] (
  10732. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10733. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10734. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10735. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10736. .Cin(),
  10737. .Qin(),
  10738. .Clk(),
  10739. .AsyncReset(),
  10740. .SyncReset(),
  10741. .ShiftData(),
  10742. .SyncLoad(),
  10743. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  10744. .Cout(),
  10745. .Q());
  10746. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_x = 17;
  10747. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_y = 3;
  10748. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_z = 15;
  10749. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .mask = 16'h268C;
  10750. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .modeMux = 1'b0;
  10751. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .FeedbackMux = 1'b0;
  10752. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .ShiftMux = 1'b0;
  10753. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .BypassEn = 1'b0;
  10754. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .CarryEnb = 1'b1;
  10755. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] (
  10756. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10757. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10758. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  10759. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10760. .Cin(),
  10761. .Qin(),
  10762. .Clk(),
  10763. .AsyncReset(),
  10764. .SyncReset(),
  10765. .ShiftData(),
  10766. .SyncLoad(),
  10767. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  10768. .Cout(),
  10769. .Q());
  10770. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_x = 14;
  10771. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_y = 2;
  10772. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_z = 11;
  10773. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .mask = 16'h268C;
  10774. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .modeMux = 1'b0;
  10775. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .FeedbackMux = 1'b0;
  10776. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .ShiftMux = 1'b0;
  10777. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .BypassEn = 1'b0;
  10778. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .CarryEnb = 1'b1;
  10779. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] (
  10780. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10781. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10782. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10783. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  10784. .Cin(),
  10785. .Qin(),
  10786. .Clk(),
  10787. .AsyncReset(),
  10788. .SyncReset(),
  10789. .ShiftData(),
  10790. .SyncLoad(),
  10791. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  10792. .Cout(),
  10793. .Q());
  10794. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_x = 14;
  10795. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_y = 2;
  10796. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_z = 13;
  10797. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .mask = 16'h606C;
  10798. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .modeMux = 1'b0;
  10799. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .FeedbackMux = 1'b0;
  10800. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .ShiftMux = 1'b0;
  10801. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .BypassEn = 1'b0;
  10802. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .CarryEnb = 1'b1;
  10803. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] (
  10804. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10805. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  10806. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  10807. .D(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  10808. .Cin(),
  10809. .Qin(),
  10810. .Clk(),
  10811. .AsyncReset(),
  10812. .SyncReset(),
  10813. .ShiftData(),
  10814. .SyncLoad(),
  10815. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  10816. .Cout(),
  10817. .Q());
  10818. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_x = 14;
  10819. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_y = 2;
  10820. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_z = 7;
  10821. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .mask = 16'h606C;
  10822. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .modeMux = 1'b0;
  10823. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .FeedbackMux = 1'b0;
  10824. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .ShiftMux = 1'b0;
  10825. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .BypassEn = 1'b0;
  10826. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .CarryEnb = 1'b1;
  10827. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] (
  10828. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10829. .B(vcc),
  10830. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10831. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10832. .Cin(),
  10833. .Qin(),
  10834. .Clk(),
  10835. .AsyncReset(),
  10836. .SyncReset(),
  10837. .ShiftData(),
  10838. .SyncLoad(),
  10839. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  10840. .Cout(),
  10841. .Q());
  10842. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_x = 16;
  10843. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_y = 2;
  10844. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_z = 0;
  10845. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .mask = 16'h5AF0;
  10846. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .modeMux = 1'b0;
  10847. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .FeedbackMux = 1'b0;
  10848. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .ShiftMux = 1'b0;
  10849. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .BypassEn = 1'b0;
  10850. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .CarryEnb = 1'b1;
  10851. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] (
  10852. .A(vcc),
  10853. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10854. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10855. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  10856. .Cin(),
  10857. .Qin(),
  10858. .Clk(),
  10859. .AsyncReset(),
  10860. .SyncReset(),
  10861. .ShiftData(),
  10862. .SyncLoad(),
  10863. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  10864. .Cout(),
  10865. .Q());
  10866. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_x = 14;
  10867. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_y = 3;
  10868. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_z = 4;
  10869. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .mask = 16'hC0CC;
  10870. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .modeMux = 1'b0;
  10871. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .FeedbackMux = 1'b0;
  10872. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .ShiftMux = 1'b0;
  10873. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .BypassEn = 1'b0;
  10874. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .CarryEnb = 1'b1;
  10875. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] (
  10876. .A(\macro_inst|apb_dac0_inst|sine_rom~260_combout ),
  10877. .B(\macro_inst|apb_dac0_inst|sine_rom~273_combout ),
  10878. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~2_combout ),
  10879. .D(\macro_inst|apb_dac0_inst|sine_rom~254_combout ),
  10880. .Cin(),
  10881. .Qin(),
  10882. .Clk(),
  10883. .AsyncReset(),
  10884. .SyncReset(),
  10885. .ShiftData(),
  10886. .SyncLoad(),
  10887. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10888. .Cout(),
  10889. .Q());
  10890. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_x = 17;
  10891. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_y = 2;
  10892. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_z = 4;
  10893. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .mask = 16'h3C6C;
  10894. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .modeMux = 1'b0;
  10895. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .FeedbackMux = 1'b0;
  10896. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .ShiftMux = 1'b0;
  10897. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .BypassEn = 1'b0;
  10898. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .CarryEnb = 1'b1;
  10899. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] (
  10900. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10901. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10902. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  10903. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10904. .Cin(),
  10905. .Qin(),
  10906. .Clk(),
  10907. .AsyncReset(),
  10908. .SyncReset(),
  10909. .ShiftData(),
  10910. .SyncLoad(),
  10911. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  10912. .Cout(),
  10913. .Q());
  10914. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_x = 17;
  10915. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_y = 2;
  10916. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_z = 9;
  10917. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .mask = 16'h468A;
  10918. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .modeMux = 1'b0;
  10919. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .FeedbackMux = 1'b0;
  10920. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .ShiftMux = 1'b0;
  10921. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .BypassEn = 1'b0;
  10922. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .CarryEnb = 1'b1;
  10923. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] (
  10924. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10925. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10926. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10927. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  10928. .Cin(),
  10929. .Qin(),
  10930. .Clk(),
  10931. .AsyncReset(),
  10932. .SyncReset(),
  10933. .ShiftData(),
  10934. .SyncLoad(),
  10935. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  10936. .Cout(),
  10937. .Q());
  10938. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_x = 14;
  10939. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_y = 3;
  10940. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_z = 0;
  10941. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .mask = 16'h606A;
  10942. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .modeMux = 1'b0;
  10943. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .FeedbackMux = 1'b0;
  10944. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .ShiftMux = 1'b0;
  10945. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .BypassEn = 1'b0;
  10946. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .CarryEnb = 1'b1;
  10947. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] (
  10948. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  10949. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10950. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10951. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10952. .Cin(),
  10953. .Qin(),
  10954. .Clk(),
  10955. .AsyncReset(),
  10956. .SyncReset(),
  10957. .ShiftData(),
  10958. .SyncLoad(),
  10959. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  10960. .Cout(),
  10961. .Q());
  10962. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_x = 16;
  10963. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_y = 3;
  10964. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_z = 8;
  10965. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .mask = 16'h3C44;
  10966. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .modeMux = 1'b0;
  10967. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .FeedbackMux = 1'b0;
  10968. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .ShiftMux = 1'b0;
  10969. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .BypassEn = 1'b0;
  10970. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .CarryEnb = 1'b1;
  10971. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] (
  10972. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10973. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  10974. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  10975. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10976. .Cin(),
  10977. .Qin(),
  10978. .Clk(),
  10979. .AsyncReset(),
  10980. .SyncReset(),
  10981. .ShiftData(),
  10982. .SyncLoad(),
  10983. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  10984. .Cout(),
  10985. .Q());
  10986. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_x = 16;
  10987. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_y = 3;
  10988. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_z = 10;
  10989. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .mask = 16'h660C;
  10990. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .modeMux = 1'b0;
  10991. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .FeedbackMux = 1'b0;
  10992. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .ShiftMux = 1'b0;
  10993. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .BypassEn = 1'b0;
  10994. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .CarryEnb = 1'b1;
  10995. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] (
  10996. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  10997. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  10998. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  10999. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  11000. .Cin(),
  11001. .Qin(),
  11002. .Clk(),
  11003. .AsyncReset(),
  11004. .SyncReset(),
  11005. .ShiftData(),
  11006. .SyncLoad(),
  11007. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  11008. .Cout(),
  11009. .Q());
  11010. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_x = 17;
  11011. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_y = 3;
  11012. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_z = 14;
  11013. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .mask = 16'h1BA0;
  11014. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .modeMux = 1'b0;
  11015. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .FeedbackMux = 1'b0;
  11016. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .ShiftMux = 1'b0;
  11017. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .BypassEn = 1'b0;
  11018. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .CarryEnb = 1'b1;
  11019. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] (
  11020. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  11021. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  11022. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  11023. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  11024. .Cin(),
  11025. .Qin(),
  11026. .Clk(),
  11027. .AsyncReset(),
  11028. .SyncReset(),
  11029. .ShiftData(),
  11030. .SyncLoad(),
  11031. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  11032. .Cout(),
  11033. .Q());
  11034. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_x = 16;
  11035. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_y = 3;
  11036. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_z = 3;
  11037. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .mask = 16'h286C;
  11038. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .modeMux = 1'b0;
  11039. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .FeedbackMux = 1'b0;
  11040. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .ShiftMux = 1'b0;
  11041. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .BypassEn = 1'b0;
  11042. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .CarryEnb = 1'b1;
  11043. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] (
  11044. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  11045. .B(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  11046. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  11047. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  11048. .Cin(),
  11049. .Qin(),
  11050. .Clk(),
  11051. .AsyncReset(),
  11052. .SyncReset(),
  11053. .ShiftData(),
  11054. .SyncLoad(),
  11055. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  11056. .Cout(),
  11057. .Q());
  11058. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_x = 16;
  11059. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_y = 3;
  11060. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_z = 11;
  11061. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .mask = 16'h2788;
  11062. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .modeMux = 1'b0;
  11063. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .FeedbackMux = 1'b0;
  11064. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .ShiftMux = 1'b0;
  11065. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .BypassEn = 1'b0;
  11066. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .CarryEnb = 1'b1;
  11067. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] (
  11068. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  11069. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  11070. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  11071. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  11072. .Cin(),
  11073. .Qin(),
  11074. .Clk(),
  11075. .AsyncReset(),
  11076. .SyncReset(),
  11077. .ShiftData(),
  11078. .SyncLoad(),
  11079. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  11080. .Cout(),
  11081. .Q());
  11082. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_x = 14;
  11083. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_y = 3;
  11084. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_z = 9;
  11085. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .mask = 16'h606A;
  11086. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .modeMux = 1'b0;
  11087. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .FeedbackMux = 1'b0;
  11088. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .ShiftMux = 1'b0;
  11089. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .BypassEn = 1'b0;
  11090. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .CarryEnb = 1'b1;
  11091. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] (
  11092. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~2_combout ),
  11093. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  11094. .C(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  11095. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  11096. .Cin(),
  11097. .Qin(),
  11098. .Clk(),
  11099. .AsyncReset(),
  11100. .SyncReset(),
  11101. .ShiftData(),
  11102. .SyncLoad(),
  11103. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  11104. .Cout(),
  11105. .Q());
  11106. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_x = 14;
  11107. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_y = 3;
  11108. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_z = 12;
  11109. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .mask = 16'h1AB0;
  11110. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .modeMux = 1'b0;
  11111. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .FeedbackMux = 1'b0;
  11112. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .ShiftMux = 1'b0;
  11113. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .BypassEn = 1'b0;
  11114. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .CarryEnb = 1'b1;
  11115. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] (
  11116. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  11117. .B(vcc),
  11118. .C(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11119. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11120. .Cin(),
  11121. .Qin(),
  11122. .Clk(),
  11123. .AsyncReset(),
  11124. .SyncReset(),
  11125. .ShiftData(),
  11126. .SyncLoad(),
  11127. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  11128. .Cout(),
  11129. .Q());
  11130. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_x = 17;
  11131. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_y = 2;
  11132. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_z = 6;
  11133. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .mask = 16'h0AA0;
  11134. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .modeMux = 1'b0;
  11135. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .FeedbackMux = 1'b0;
  11136. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .ShiftMux = 1'b0;
  11137. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .BypassEn = 1'b0;
  11138. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .CarryEnb = 1'b1;
  11139. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] (
  11140. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11141. .B(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11142. .C(vcc),
  11143. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  11144. .Cin(),
  11145. .Qin(),
  11146. .Clk(),
  11147. .AsyncReset(),
  11148. .SyncReset(),
  11149. .ShiftData(),
  11150. .SyncLoad(),
  11151. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  11152. .Cout(),
  11153. .Q());
  11154. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_x = 16;
  11155. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_y = 1;
  11156. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_z = 10;
  11157. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .mask = 16'h8800;
  11158. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .modeMux = 1'b0;
  11159. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .FeedbackMux = 1'b0;
  11160. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .ShiftMux = 1'b0;
  11161. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .BypassEn = 1'b0;
  11162. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .CarryEnb = 1'b1;
  11163. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] (
  11164. .A(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11165. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11166. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  11167. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  11168. .Cin(),
  11169. .Qin(),
  11170. .Clk(),
  11171. .AsyncReset(),
  11172. .SyncReset(),
  11173. .ShiftData(),
  11174. .SyncLoad(),
  11175. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  11176. .Cout(),
  11177. .Q());
  11178. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_x = 16;
  11179. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_y = 3;
  11180. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_z = 2;
  11181. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .mask = 16'hE680;
  11182. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .modeMux = 1'b0;
  11183. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .FeedbackMux = 1'b0;
  11184. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .ShiftMux = 1'b0;
  11185. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .BypassEn = 1'b0;
  11186. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .CarryEnb = 1'b1;
  11187. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] (
  11188. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  11189. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11190. .C(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11191. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  11192. .Cin(),
  11193. .Qin(),
  11194. .Clk(),
  11195. .AsyncReset(),
  11196. .SyncReset(),
  11197. .ShiftData(),
  11198. .SyncLoad(),
  11199. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  11200. .Cout(),
  11201. .Q());
  11202. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_x = 16;
  11203. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_y = 3;
  11204. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_z = 6;
  11205. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .mask = 16'hE828;
  11206. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .modeMux = 1'b0;
  11207. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .FeedbackMux = 1'b0;
  11208. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .ShiftMux = 1'b0;
  11209. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .BypassEn = 1'b0;
  11210. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .CarryEnb = 1'b1;
  11211. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] (
  11212. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  11213. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  11214. .C(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11215. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11216. .Cin(),
  11217. .Qin(),
  11218. .Clk(),
  11219. .AsyncReset(),
  11220. .SyncReset(),
  11221. .ShiftData(),
  11222. .SyncLoad(),
  11223. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  11224. .Cout(),
  11225. .Q());
  11226. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_x = 16;
  11227. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_y = 3;
  11228. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_z = 7;
  11229. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .mask = 16'hCAA0;
  11230. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .modeMux = 1'b0;
  11231. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .FeedbackMux = 1'b0;
  11232. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .ShiftMux = 1'b0;
  11233. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .BypassEn = 1'b0;
  11234. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .CarryEnb = 1'b1;
  11235. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] (
  11236. .A(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11237. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  11238. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  11239. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11240. .Cin(),
  11241. .Qin(),
  11242. .Clk(),
  11243. .AsyncReset(),
  11244. .SyncReset(),
  11245. .ShiftData(),
  11246. .SyncLoad(),
  11247. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  11248. .Cout(),
  11249. .Q());
  11250. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_x = 16;
  11251. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_y = 3;
  11252. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_z = 1;
  11253. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .mask = 16'hD8A0;
  11254. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .modeMux = 1'b0;
  11255. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .FeedbackMux = 1'b0;
  11256. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .ShiftMux = 1'b0;
  11257. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .BypassEn = 1'b0;
  11258. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .CarryEnb = 1'b1;
  11259. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] (
  11260. .A(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11261. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11262. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  11263. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  11264. .Cin(),
  11265. .Qin(),
  11266. .Clk(),
  11267. .AsyncReset(),
  11268. .SyncReset(),
  11269. .ShiftData(),
  11270. .SyncLoad(),
  11271. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  11272. .Cout(),
  11273. .Q());
  11274. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_x = 16;
  11275. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_y = 3;
  11276. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_z = 14;
  11277. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .mask = 16'hE680;
  11278. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .modeMux = 1'b0;
  11279. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .FeedbackMux = 1'b0;
  11280. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .ShiftMux = 1'b0;
  11281. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .BypassEn = 1'b0;
  11282. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .CarryEnb = 1'b1;
  11283. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] (
  11284. .A(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11285. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11286. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  11287. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  11288. .Cin(),
  11289. .Qin(),
  11290. .Clk(),
  11291. .AsyncReset(),
  11292. .SyncReset(),
  11293. .ShiftData(),
  11294. .SyncLoad(),
  11295. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  11296. .Cout(),
  11297. .Q());
  11298. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_x = 16;
  11299. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_y = 3;
  11300. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_z = 5;
  11301. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .mask = 16'hE860;
  11302. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .modeMux = 1'b0;
  11303. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .FeedbackMux = 1'b0;
  11304. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .ShiftMux = 1'b0;
  11305. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .BypassEn = 1'b0;
  11306. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .CarryEnb = 1'b1;
  11307. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] (
  11308. .A(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  11309. .B(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  11310. .C(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11311. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11312. .Cin(),
  11313. .Qin(),
  11314. .Clk(),
  11315. .AsyncReset(),
  11316. .SyncReset(),
  11317. .ShiftData(),
  11318. .SyncLoad(),
  11319. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  11320. .Cout(),
  11321. .Q());
  11322. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_x = 16;
  11323. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_y = 3;
  11324. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_z = 13;
  11325. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .mask = 16'hACC0;
  11326. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .modeMux = 1'b0;
  11327. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .FeedbackMux = 1'b0;
  11328. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .ShiftMux = 1'b0;
  11329. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .BypassEn = 1'b0;
  11330. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .CarryEnb = 1'b1;
  11331. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] (
  11332. .A(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11333. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11334. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  11335. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  11336. .Cin(),
  11337. .Qin(),
  11338. .Clk(),
  11339. .AsyncReset(),
  11340. .SyncReset(),
  11341. .ShiftData(),
  11342. .SyncLoad(),
  11343. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  11344. .Cout(),
  11345. .Q());
  11346. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_x = 16;
  11347. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_y = 3;
  11348. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_z = 9;
  11349. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .mask = 16'hE860;
  11350. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .modeMux = 1'b0;
  11351. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .FeedbackMux = 1'b0;
  11352. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .ShiftMux = 1'b0;
  11353. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .BypassEn = 1'b0;
  11354. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .CarryEnb = 1'b1;
  11355. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] (
  11356. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|cs2a[3]~5_combout ),
  11357. .B(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  11358. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  11359. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  11360. .Cin(),
  11361. .Qin(),
  11362. .Clk(),
  11363. .AsyncReset(),
  11364. .SyncReset(),
  11365. .ShiftData(),
  11366. .SyncLoad(),
  11367. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  11368. .Cout(),
  11369. .Q());
  11370. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_x = 16;
  11371. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_y = 1;
  11372. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_z = 14;
  11373. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .mask = 16'hE680;
  11374. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .modeMux = 1'b0;
  11375. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .FeedbackMux = 1'b0;
  11376. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .ShiftMux = 1'b0;
  11377. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .BypassEn = 1'b0;
  11378. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .CarryEnb = 1'b1;
  11379. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] (
  11380. .A(vcc),
  11381. .B(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11382. .C(vcc),
  11383. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  11384. .Cin(),
  11385. .Qin(),
  11386. .Clk(),
  11387. .AsyncReset(),
  11388. .SyncReset(),
  11389. .ShiftData(),
  11390. .SyncLoad(),
  11391. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [0]),
  11392. .Cout(),
  11393. .Q());
  11394. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_x = 16;
  11395. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_y = 1;
  11396. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_z = 12;
  11397. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .mask = 16'hCC00;
  11398. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .modeMux = 1'b0;
  11399. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .FeedbackMux = 1'b0;
  11400. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .ShiftMux = 1'b0;
  11401. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .BypassEn = 1'b0;
  11402. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .CarryEnb = 1'b1;
  11403. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] (
  11404. .A(vcc),
  11405. .B(vcc),
  11406. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  11407. .D(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11408. .Cin(),
  11409. .Qin(),
  11410. .Clk(),
  11411. .AsyncReset(),
  11412. .SyncReset(),
  11413. .ShiftData(),
  11414. .SyncLoad(),
  11415. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [1]),
  11416. .Cout(),
  11417. .Q());
  11418. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_x = 16;
  11419. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_y = 2;
  11420. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_z = 2;
  11421. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .mask = 16'hF000;
  11422. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .modeMux = 1'b0;
  11423. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .FeedbackMux = 1'b0;
  11424. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .ShiftMux = 1'b0;
  11425. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .BypassEn = 1'b0;
  11426. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .CarryEnb = 1'b1;
  11427. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] (
  11428. .A(vcc),
  11429. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  11430. .C(vcc),
  11431. .D(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11432. .Cin(),
  11433. .Qin(),
  11434. .Clk(),
  11435. .AsyncReset(),
  11436. .SyncReset(),
  11437. .ShiftData(),
  11438. .SyncLoad(),
  11439. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [2]),
  11440. .Cout(),
  11441. .Q());
  11442. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_x = 14;
  11443. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_y = 3;
  11444. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_z = 10;
  11445. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .mask = 16'hCC00;
  11446. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .modeMux = 1'b0;
  11447. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .FeedbackMux = 1'b0;
  11448. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .ShiftMux = 1'b0;
  11449. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .BypassEn = 1'b0;
  11450. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .CarryEnb = 1'b1;
  11451. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] (
  11452. .A(vcc),
  11453. .B(vcc),
  11454. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11455. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  11456. .Cin(),
  11457. .Qin(),
  11458. .Clk(),
  11459. .AsyncReset(),
  11460. .SyncReset(),
  11461. .ShiftData(),
  11462. .SyncLoad(),
  11463. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [3]),
  11464. .Cout(),
  11465. .Q());
  11466. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_x = 16;
  11467. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_y = 4;
  11468. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_z = 0;
  11469. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .mask = 16'hF000;
  11470. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .modeMux = 1'b0;
  11471. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .FeedbackMux = 1'b0;
  11472. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .ShiftMux = 1'b0;
  11473. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .BypassEn = 1'b0;
  11474. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .CarryEnb = 1'b1;
  11475. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] (
  11476. .A(vcc),
  11477. .B(vcc),
  11478. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11479. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  11480. .Cin(),
  11481. .Qin(),
  11482. .Clk(),
  11483. .AsyncReset(),
  11484. .SyncReset(),
  11485. .ShiftData(),
  11486. .SyncLoad(),
  11487. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [4]),
  11488. .Cout(),
  11489. .Q());
  11490. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_x = 16;
  11491. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_y = 1;
  11492. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_z = 9;
  11493. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .mask = 16'hF000;
  11494. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .modeMux = 1'b0;
  11495. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .FeedbackMux = 1'b0;
  11496. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .ShiftMux = 1'b0;
  11497. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .BypassEn = 1'b0;
  11498. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .CarryEnb = 1'b1;
  11499. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] (
  11500. .A(vcc),
  11501. .B(vcc),
  11502. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11503. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  11504. .Cin(),
  11505. .Qin(),
  11506. .Clk(),
  11507. .AsyncReset(),
  11508. .SyncReset(),
  11509. .ShiftData(),
  11510. .SyncLoad(),
  11511. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [5]),
  11512. .Cout(),
  11513. .Q());
  11514. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_x = 16;
  11515. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_y = 1;
  11516. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_z = 15;
  11517. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .mask = 16'hF000;
  11518. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .modeMux = 1'b0;
  11519. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .FeedbackMux = 1'b0;
  11520. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .ShiftMux = 1'b0;
  11521. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .BypassEn = 1'b0;
  11522. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .CarryEnb = 1'b1;
  11523. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] (
  11524. .A(vcc),
  11525. .B(vcc),
  11526. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11527. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  11528. .Cin(),
  11529. .Qin(),
  11530. .Clk(),
  11531. .AsyncReset(),
  11532. .SyncReset(),
  11533. .ShiftData(),
  11534. .SyncLoad(),
  11535. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [6]),
  11536. .Cout(),
  11537. .Q());
  11538. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_x = 16;
  11539. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_y = 4;
  11540. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_z = 1;
  11541. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .mask = 16'hF000;
  11542. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .modeMux = 1'b0;
  11543. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .FeedbackMux = 1'b0;
  11544. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .ShiftMux = 1'b0;
  11545. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .BypassEn = 1'b0;
  11546. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .CarryEnb = 1'b1;
  11547. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] (
  11548. .A(vcc),
  11549. .B(vcc),
  11550. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11551. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  11552. .Cin(),
  11553. .Qin(),
  11554. .Clk(),
  11555. .AsyncReset(),
  11556. .SyncReset(),
  11557. .ShiftData(),
  11558. .SyncLoad(),
  11559. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [7]),
  11560. .Cout(),
  11561. .Q());
  11562. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_x = 16;
  11563. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_y = 4;
  11564. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_z = 2;
  11565. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .mask = 16'hF000;
  11566. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .modeMux = 1'b0;
  11567. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .FeedbackMux = 1'b0;
  11568. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .ShiftMux = 1'b0;
  11569. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .BypassEn = 1'b0;
  11570. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .CarryEnb = 1'b1;
  11571. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] (
  11572. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  11573. .B(vcc),
  11574. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11575. .D(vcc),
  11576. .Cin(),
  11577. .Qin(),
  11578. .Clk(),
  11579. .AsyncReset(),
  11580. .SyncReset(),
  11581. .ShiftData(),
  11582. .SyncLoad(),
  11583. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [8]),
  11584. .Cout(),
  11585. .Q());
  11586. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_x = 16;
  11587. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_y = 1;
  11588. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_z = 13;
  11589. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .mask = 16'hA0A0;
  11590. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .modeMux = 1'b0;
  11591. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .FeedbackMux = 1'b0;
  11592. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .ShiftMux = 1'b0;
  11593. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .BypassEn = 1'b0;
  11594. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .CarryEnb = 1'b1;
  11595. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] (
  11596. .A(vcc),
  11597. .B(vcc),
  11598. .C(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  11599. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  11600. .Cin(),
  11601. .Qin(),
  11602. .Clk(),
  11603. .AsyncReset(),
  11604. .SyncReset(),
  11605. .ShiftData(),
  11606. .SyncLoad(),
  11607. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [9]),
  11608. .Cout(),
  11609. .Q());
  11610. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_x = 16;
  11611. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_y = 1;
  11612. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_z = 11;
  11613. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .mask = 16'hF000;
  11614. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .modeMux = 1'b0;
  11615. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .FeedbackMux = 1'b0;
  11616. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .ShiftMux = 1'b0;
  11617. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .BypassEn = 1'b0;
  11618. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .CarryEnb = 1'b1;
  11619. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 (
  11620. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  11621. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  11622. .C(vcc),
  11623. .D(vcc),
  11624. .Cin(),
  11625. .Qin(),
  11626. .Clk(),
  11627. .AsyncReset(),
  11628. .SyncReset(),
  11629. .ShiftData(),
  11630. .SyncLoad(),
  11631. .LutOut(),
  11632. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ),
  11633. .Q());
  11634. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_x = 15;
  11635. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_y = 2;
  11636. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_z = 6;
  11637. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .mask = 16'h0088;
  11638. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .modeMux = 1'b0;
  11639. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .FeedbackMux = 1'b0;
  11640. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .ShiftMux = 1'b0;
  11641. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .BypassEn = 1'b0;
  11642. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .CarryEnb = 1'b0;
  11643. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 (
  11644. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ),
  11645. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ),
  11646. .C(vcc),
  11647. .D(vcc),
  11648. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ),
  11649. .Qin(),
  11650. .Clk(),
  11651. .AsyncReset(),
  11652. .SyncReset(),
  11653. .ShiftData(),
  11654. .SyncLoad(),
  11655. .LutOut(),
  11656. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ),
  11657. .Q());
  11658. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_x = 15;
  11659. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_y = 2;
  11660. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_z = 11;
  11661. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .mask = 16'h0017;
  11662. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .modeMux = 1'b1;
  11663. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .FeedbackMux = 1'b0;
  11664. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .ShiftMux = 1'b0;
  11665. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .BypassEn = 1'b0;
  11666. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .CarryEnb = 1'b0;
  11667. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 (
  11668. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ),
  11669. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ),
  11670. .C(vcc),
  11671. .D(vcc),
  11672. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ),
  11673. .Qin(),
  11674. .Clk(),
  11675. .AsyncReset(),
  11676. .SyncReset(),
  11677. .ShiftData(),
  11678. .SyncLoad(),
  11679. .LutOut(),
  11680. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ),
  11681. .Q());
  11682. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_x = 15;
  11683. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_y = 2;
  11684. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_z = 12;
  11685. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .mask = 16'h008E;
  11686. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .modeMux = 1'b1;
  11687. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .FeedbackMux = 1'b0;
  11688. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .ShiftMux = 1'b0;
  11689. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .BypassEn = 1'b0;
  11690. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .CarryEnb = 1'b0;
  11691. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 (
  11692. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ),
  11693. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ),
  11694. .C(vcc),
  11695. .D(vcc),
  11696. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ),
  11697. .Qin(),
  11698. .Clk(),
  11699. .AsyncReset(),
  11700. .SyncReset(),
  11701. .ShiftData(),
  11702. .SyncLoad(),
  11703. .LutOut(),
  11704. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ),
  11705. .Q());
  11706. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_x = 15;
  11707. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_y = 2;
  11708. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_z = 13;
  11709. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .mask = 16'h0017;
  11710. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .modeMux = 1'b1;
  11711. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .FeedbackMux = 1'b0;
  11712. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .ShiftMux = 1'b0;
  11713. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .BypassEn = 1'b0;
  11714. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .CarryEnb = 1'b0;
  11715. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 (
  11716. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ),
  11717. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ),
  11718. .C(vcc),
  11719. .D(vcc),
  11720. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ),
  11721. .Qin(),
  11722. .Clk(),
  11723. .AsyncReset(),
  11724. .SyncReset(),
  11725. .ShiftData(),
  11726. .SyncLoad(),
  11727. .LutOut(),
  11728. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ),
  11729. .Q());
  11730. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_x = 15;
  11731. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_y = 2;
  11732. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_z = 14;
  11733. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .mask = 16'h008E;
  11734. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .modeMux = 1'b1;
  11735. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .FeedbackMux = 1'b0;
  11736. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .ShiftMux = 1'b0;
  11737. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .BypassEn = 1'b0;
  11738. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .CarryEnb = 1'b0;
  11739. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 (
  11740. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ),
  11741. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ),
  11742. .C(vcc),
  11743. .D(vcc),
  11744. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ),
  11745. .Qin(),
  11746. .Clk(),
  11747. .AsyncReset(),
  11748. .SyncReset(),
  11749. .ShiftData(),
  11750. .SyncLoad(),
  11751. .LutOut(),
  11752. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ),
  11753. .Q());
  11754. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_x = 15;
  11755. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_y = 2;
  11756. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_z = 15;
  11757. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .mask = 16'h0017;
  11758. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .modeMux = 1'b1;
  11759. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .FeedbackMux = 1'b0;
  11760. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .ShiftMux = 1'b0;
  11761. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .BypassEn = 1'b0;
  11762. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .CarryEnb = 1'b0;
  11763. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 (
  11764. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ),
  11765. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ),
  11766. .C(vcc),
  11767. .D(vcc),
  11768. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ),
  11769. .Qin(),
  11770. .Clk(),
  11771. .AsyncReset(),
  11772. .SyncReset(),
  11773. .ShiftData(),
  11774. .SyncLoad(),
  11775. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  11776. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  11777. .Q());
  11778. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_x = 15;
  11779. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_y = 1;
  11780. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_z = 0;
  11781. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .mask = 16'h698E;
  11782. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .modeMux = 1'b1;
  11783. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .FeedbackMux = 1'b0;
  11784. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .ShiftMux = 1'b0;
  11785. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .BypassEn = 1'b0;
  11786. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .CarryEnb = 1'b0;
  11787. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 (
  11788. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ),
  11789. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ),
  11790. .C(vcc),
  11791. .D(vcc),
  11792. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  11793. .Qin(),
  11794. .Clk(),
  11795. .AsyncReset(),
  11796. .SyncReset(),
  11797. .ShiftData(),
  11798. .SyncLoad(),
  11799. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  11800. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  11801. .Q());
  11802. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_x = 15;
  11803. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_y = 1;
  11804. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_z = 1;
  11805. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .mask = 16'h9617;
  11806. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .modeMux = 1'b1;
  11807. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .FeedbackMux = 1'b0;
  11808. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .ShiftMux = 1'b0;
  11809. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .BypassEn = 1'b0;
  11810. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .CarryEnb = 1'b0;
  11811. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 (
  11812. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ),
  11813. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ),
  11814. .C(vcc),
  11815. .D(vcc),
  11816. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  11817. .Qin(),
  11818. .Clk(),
  11819. .AsyncReset(),
  11820. .SyncReset(),
  11821. .ShiftData(),
  11822. .SyncLoad(),
  11823. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  11824. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  11825. .Q());
  11826. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_x = 15;
  11827. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_y = 1;
  11828. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_z = 2;
  11829. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .mask = 16'h698E;
  11830. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .modeMux = 1'b1;
  11831. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .FeedbackMux = 1'b0;
  11832. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .ShiftMux = 1'b0;
  11833. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .BypassEn = 1'b0;
  11834. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .CarryEnb = 1'b0;
  11835. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 (
  11836. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ),
  11837. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ),
  11838. .C(vcc),
  11839. .D(vcc),
  11840. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  11841. .Qin(),
  11842. .Clk(),
  11843. .AsyncReset(),
  11844. .SyncReset(),
  11845. .ShiftData(),
  11846. .SyncLoad(),
  11847. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  11848. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  11849. .Q());
  11850. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_x = 15;
  11851. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_y = 1;
  11852. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_z = 3;
  11853. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .mask = 16'h9617;
  11854. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .modeMux = 1'b1;
  11855. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .FeedbackMux = 1'b0;
  11856. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .ShiftMux = 1'b0;
  11857. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .BypassEn = 1'b0;
  11858. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .CarryEnb = 1'b0;
  11859. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 (
  11860. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ),
  11861. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ),
  11862. .C(vcc),
  11863. .D(vcc),
  11864. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  11865. .Qin(),
  11866. .Clk(),
  11867. .AsyncReset(),
  11868. .SyncReset(),
  11869. .ShiftData(),
  11870. .SyncLoad(),
  11871. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  11872. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  11873. .Q());
  11874. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_x = 15;
  11875. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_y = 1;
  11876. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_z = 4;
  11877. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .mask = 16'h698E;
  11878. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .modeMux = 1'b1;
  11879. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .FeedbackMux = 1'b0;
  11880. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .ShiftMux = 1'b0;
  11881. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .BypassEn = 1'b0;
  11882. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .CarryEnb = 1'b0;
  11883. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 (
  11884. .A(vcc),
  11885. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  11886. .C(vcc),
  11887. .D(vcc),
  11888. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ),
  11889. .Qin(),
  11890. .Clk(),
  11891. .AsyncReset(),
  11892. .SyncReset(),
  11893. .ShiftData(),
  11894. .SyncLoad(),
  11895. .LutOut(),
  11896. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ),
  11897. .Q());
  11898. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_x = 15;
  11899. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_y = 2;
  11900. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_z = 7;
  11901. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .mask = 16'h003F;
  11902. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .modeMux = 1'b1;
  11903. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .FeedbackMux = 1'b0;
  11904. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .ShiftMux = 1'b0;
  11905. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .BypassEn = 1'b0;
  11906. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .CarryEnb = 1'b0;
  11907. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 (
  11908. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ),
  11909. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ),
  11910. .C(vcc),
  11911. .D(vcc),
  11912. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  11913. .Qin(),
  11914. .Clk(),
  11915. .AsyncReset(),
  11916. .SyncReset(),
  11917. .ShiftData(),
  11918. .SyncLoad(),
  11919. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  11920. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  11921. .Q());
  11922. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_x = 15;
  11923. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_y = 1;
  11924. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_z = 5;
  11925. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .mask = 16'h9617;
  11926. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .modeMux = 1'b1;
  11927. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .FeedbackMux = 1'b0;
  11928. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .ShiftMux = 1'b0;
  11929. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .BypassEn = 1'b0;
  11930. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .CarryEnb = 1'b0;
  11931. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 (
  11932. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ),
  11933. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ),
  11934. .C(vcc),
  11935. .D(vcc),
  11936. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  11937. .Qin(),
  11938. .Clk(),
  11939. .AsyncReset(),
  11940. .SyncReset(),
  11941. .ShiftData(),
  11942. .SyncLoad(),
  11943. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  11944. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ),
  11945. .Q());
  11946. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_x = 15;
  11947. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_y = 1;
  11948. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_z = 6;
  11949. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .mask = 16'h698E;
  11950. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .modeMux = 1'b1;
  11951. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .FeedbackMux = 1'b0;
  11952. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .ShiftMux = 1'b0;
  11953. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .BypassEn = 1'b0;
  11954. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .CarryEnb = 1'b0;
  11955. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 (
  11956. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ),
  11957. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ),
  11958. .C(vcc),
  11959. .D(vcc),
  11960. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ),
  11961. .Qin(),
  11962. .Clk(),
  11963. .AsyncReset(),
  11964. .SyncReset(),
  11965. .ShiftData(),
  11966. .SyncLoad(),
  11967. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ),
  11968. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ),
  11969. .Q());
  11970. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_x = 15;
  11971. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_y = 1;
  11972. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_z = 7;
  11973. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .mask = 16'h9617;
  11974. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .modeMux = 1'b1;
  11975. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .FeedbackMux = 1'b0;
  11976. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .ShiftMux = 1'b0;
  11977. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .BypassEn = 1'b0;
  11978. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .CarryEnb = 1'b0;
  11979. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 (
  11980. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ),
  11981. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ),
  11982. .C(vcc),
  11983. .D(vcc),
  11984. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ),
  11985. .Qin(),
  11986. .Clk(),
  11987. .AsyncReset(),
  11988. .SyncReset(),
  11989. .ShiftData(),
  11990. .SyncLoad(),
  11991. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ),
  11992. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ),
  11993. .Q());
  11994. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_x = 15;
  11995. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_y = 1;
  11996. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_z = 8;
  11997. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .mask = 16'h698E;
  11998. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .modeMux = 1'b1;
  11999. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .FeedbackMux = 1'b0;
  12000. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .ShiftMux = 1'b0;
  12001. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .BypassEn = 1'b0;
  12002. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .CarryEnb = 1'b0;
  12003. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 (
  12004. .A(vcc),
  12005. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ),
  12006. .C(vcc),
  12007. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ),
  12008. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ),
  12009. .Qin(),
  12010. .Clk(),
  12011. .AsyncReset(),
  12012. .SyncReset(),
  12013. .ShiftData(),
  12014. .SyncLoad(),
  12015. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ),
  12016. .Cout(),
  12017. .Q());
  12018. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_x = 15;
  12019. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_y = 1;
  12020. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_z = 9;
  12021. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .mask = 16'hC33C;
  12022. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .modeMux = 1'b1;
  12023. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .FeedbackMux = 1'b0;
  12024. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .ShiftMux = 1'b0;
  12025. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .BypassEn = 1'b0;
  12026. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .CarryEnb = 1'b1;
  12027. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 (
  12028. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  12029. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ),
  12030. .C(vcc),
  12031. .D(vcc),
  12032. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ),
  12033. .Qin(),
  12034. .Clk(),
  12035. .AsyncReset(),
  12036. .SyncReset(),
  12037. .ShiftData(),
  12038. .SyncLoad(),
  12039. .LutOut(),
  12040. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ),
  12041. .Q());
  12042. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_x = 15;
  12043. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_y = 2;
  12044. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_z = 8;
  12045. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .mask = 16'h008E;
  12046. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .modeMux = 1'b1;
  12047. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .FeedbackMux = 1'b0;
  12048. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .ShiftMux = 1'b0;
  12049. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .BypassEn = 1'b0;
  12050. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .CarryEnb = 1'b0;
  12051. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 (
  12052. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ),
  12053. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  12054. .C(vcc),
  12055. .D(vcc),
  12056. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ),
  12057. .Qin(),
  12058. .Clk(),
  12059. .AsyncReset(),
  12060. .SyncReset(),
  12061. .ShiftData(),
  12062. .SyncLoad(),
  12063. .LutOut(),
  12064. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ),
  12065. .Q());
  12066. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_x = 15;
  12067. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_y = 2;
  12068. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_z = 9;
  12069. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .mask = 16'h0017;
  12070. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .modeMux = 1'b1;
  12071. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .FeedbackMux = 1'b0;
  12072. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .ShiftMux = 1'b0;
  12073. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .BypassEn = 1'b0;
  12074. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .CarryEnb = 1'b0;
  12075. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 (
  12076. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ),
  12077. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ),
  12078. .C(vcc),
  12079. .D(vcc),
  12080. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ),
  12081. .Qin(),
  12082. .Clk(),
  12083. .AsyncReset(),
  12084. .SyncReset(),
  12085. .ShiftData(),
  12086. .SyncLoad(),
  12087. .LutOut(),
  12088. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ),
  12089. .Q());
  12090. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_x = 15;
  12091. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_y = 2;
  12092. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_z = 10;
  12093. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .mask = 16'h008E;
  12094. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .modeMux = 1'b1;
  12095. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .FeedbackMux = 1'b0;
  12096. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .ShiftMux = 1'b0;
  12097. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .BypassEn = 1'b0;
  12098. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .CarryEnb = 1'b0;
  12099. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 (
  12100. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  12101. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  12102. .C(vcc),
  12103. .D(vcc),
  12104. .Cin(),
  12105. .Qin(),
  12106. .Clk(),
  12107. .AsyncReset(),
  12108. .SyncReset(),
  12109. .ShiftData(),
  12110. .SyncLoad(),
  12111. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ),
  12112. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ),
  12113. .Q());
  12114. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_x = 16;
  12115. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_y = 2;
  12116. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_z = 7;
  12117. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .mask = 16'h6688;
  12118. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .modeMux = 1'b0;
  12119. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .FeedbackMux = 1'b0;
  12120. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .ShiftMux = 1'b0;
  12121. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .BypassEn = 1'b0;
  12122. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .CarryEnb = 1'b0;
  12123. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 (
  12124. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ),
  12125. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  12126. .C(vcc),
  12127. .D(vcc),
  12128. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ),
  12129. .Qin(),
  12130. .Clk(),
  12131. .AsyncReset(),
  12132. .SyncReset(),
  12133. .ShiftData(),
  12134. .SyncLoad(),
  12135. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ),
  12136. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ),
  12137. .Q());
  12138. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_x = 16;
  12139. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_y = 2;
  12140. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_z = 12;
  12141. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .mask = 16'h9617;
  12142. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .modeMux = 1'b1;
  12143. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .FeedbackMux = 1'b0;
  12144. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .ShiftMux = 1'b0;
  12145. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .BypassEn = 1'b0;
  12146. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .CarryEnb = 1'b0;
  12147. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 (
  12148. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  12149. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ),
  12150. .C(vcc),
  12151. .D(vcc),
  12152. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ),
  12153. .Qin(),
  12154. .Clk(),
  12155. .AsyncReset(),
  12156. .SyncReset(),
  12157. .ShiftData(),
  12158. .SyncLoad(),
  12159. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ),
  12160. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ),
  12161. .Q());
  12162. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_x = 16;
  12163. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_y = 2;
  12164. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_z = 13;
  12165. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .mask = 16'h698E;
  12166. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .modeMux = 1'b1;
  12167. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .FeedbackMux = 1'b0;
  12168. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .ShiftMux = 1'b0;
  12169. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .BypassEn = 1'b0;
  12170. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .CarryEnb = 1'b0;
  12171. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 (
  12172. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ),
  12173. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [0]),
  12174. .C(vcc),
  12175. .D(vcc),
  12176. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ),
  12177. .Qin(),
  12178. .Clk(),
  12179. .AsyncReset(),
  12180. .SyncReset(),
  12181. .ShiftData(),
  12182. .SyncLoad(),
  12183. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ),
  12184. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ),
  12185. .Q());
  12186. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_x = 16;
  12187. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_y = 2;
  12188. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_z = 14;
  12189. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .mask = 16'h9617;
  12190. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .modeMux = 1'b1;
  12191. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .FeedbackMux = 1'b0;
  12192. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .ShiftMux = 1'b0;
  12193. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .BypassEn = 1'b0;
  12194. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .CarryEnb = 1'b0;
  12195. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 (
  12196. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [1]),
  12197. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ),
  12198. .C(vcc),
  12199. .D(vcc),
  12200. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ),
  12201. .Qin(),
  12202. .Clk(),
  12203. .AsyncReset(),
  12204. .SyncReset(),
  12205. .ShiftData(),
  12206. .SyncLoad(),
  12207. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ),
  12208. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ),
  12209. .Q());
  12210. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_x = 16;
  12211. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_y = 2;
  12212. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_z = 15;
  12213. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .mask = 16'h698E;
  12214. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .modeMux = 1'b1;
  12215. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .FeedbackMux = 1'b0;
  12216. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .ShiftMux = 1'b0;
  12217. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .BypassEn = 1'b0;
  12218. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .CarryEnb = 1'b0;
  12219. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 (
  12220. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ),
  12221. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ),
  12222. .C(vcc),
  12223. .D(vcc),
  12224. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ),
  12225. .Qin(),
  12226. .Clk(),
  12227. .AsyncReset(),
  12228. .SyncReset(),
  12229. .ShiftData(),
  12230. .SyncLoad(),
  12231. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ),
  12232. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ),
  12233. .Q());
  12234. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_x = 16;
  12235. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_y = 1;
  12236. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_z = 0;
  12237. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .mask = 16'h9617;
  12238. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .modeMux = 1'b1;
  12239. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .FeedbackMux = 1'b0;
  12240. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .ShiftMux = 1'b0;
  12241. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .BypassEn = 1'b0;
  12242. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .CarryEnb = 1'b0;
  12243. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 (
  12244. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  12245. .B(vcc),
  12246. .C(vcc),
  12247. .D(vcc),
  12248. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ),
  12249. .Qin(),
  12250. .Clk(),
  12251. .AsyncReset(),
  12252. .SyncReset(),
  12253. .ShiftData(),
  12254. .SyncLoad(),
  12255. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ),
  12256. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ),
  12257. .Q());
  12258. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_x = 16;
  12259. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_y = 2;
  12260. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_z = 8;
  12261. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .mask = 16'h5A5F;
  12262. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .modeMux = 1'b1;
  12263. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .FeedbackMux = 1'b0;
  12264. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .ShiftMux = 1'b0;
  12265. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .BypassEn = 1'b0;
  12266. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .CarryEnb = 1'b0;
  12267. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 (
  12268. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ),
  12269. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [3]),
  12270. .C(vcc),
  12271. .D(vcc),
  12272. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ),
  12273. .Qin(),
  12274. .Clk(),
  12275. .AsyncReset(),
  12276. .SyncReset(),
  12277. .ShiftData(),
  12278. .SyncLoad(),
  12279. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ),
  12280. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ),
  12281. .Q());
  12282. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_x = 16;
  12283. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_y = 1;
  12284. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_z = 1;
  12285. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .mask = 16'h698E;
  12286. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .modeMux = 1'b1;
  12287. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .FeedbackMux = 1'b0;
  12288. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .ShiftMux = 1'b0;
  12289. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .BypassEn = 1'b0;
  12290. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .CarryEnb = 1'b0;
  12291. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 (
  12292. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ),
  12293. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [4]),
  12294. .C(vcc),
  12295. .D(vcc),
  12296. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ),
  12297. .Qin(),
  12298. .Clk(),
  12299. .AsyncReset(),
  12300. .SyncReset(),
  12301. .ShiftData(),
  12302. .SyncLoad(),
  12303. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ),
  12304. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ),
  12305. .Q());
  12306. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_x = 16;
  12307. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_y = 1;
  12308. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_z = 2;
  12309. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .mask = 16'h9617;
  12310. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .modeMux = 1'b1;
  12311. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .FeedbackMux = 1'b0;
  12312. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .ShiftMux = 1'b0;
  12313. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .BypassEn = 1'b0;
  12314. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .CarryEnb = 1'b0;
  12315. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 (
  12316. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ),
  12317. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [5]),
  12318. .C(vcc),
  12319. .D(vcc),
  12320. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ),
  12321. .Qin(),
  12322. .Clk(),
  12323. .AsyncReset(),
  12324. .SyncReset(),
  12325. .ShiftData(),
  12326. .SyncLoad(),
  12327. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ),
  12328. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ),
  12329. .Q());
  12330. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_x = 16;
  12331. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_y = 1;
  12332. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_z = 3;
  12333. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .mask = 16'h698E;
  12334. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .modeMux = 1'b1;
  12335. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .FeedbackMux = 1'b0;
  12336. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .ShiftMux = 1'b0;
  12337. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .BypassEn = 1'b0;
  12338. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .CarryEnb = 1'b0;
  12339. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 (
  12340. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [6]),
  12341. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ),
  12342. .C(vcc),
  12343. .D(vcc),
  12344. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ),
  12345. .Qin(),
  12346. .Clk(),
  12347. .AsyncReset(),
  12348. .SyncReset(),
  12349. .ShiftData(),
  12350. .SyncLoad(),
  12351. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ),
  12352. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ),
  12353. .Q());
  12354. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_x = 16;
  12355. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_y = 1;
  12356. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_z = 4;
  12357. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .mask = 16'h9617;
  12358. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .modeMux = 1'b1;
  12359. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .FeedbackMux = 1'b0;
  12360. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .ShiftMux = 1'b0;
  12361. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .BypassEn = 1'b0;
  12362. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .CarryEnb = 1'b0;
  12363. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 (
  12364. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ),
  12365. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [7]),
  12366. .C(vcc),
  12367. .D(vcc),
  12368. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ),
  12369. .Qin(),
  12370. .Clk(),
  12371. .AsyncReset(),
  12372. .SyncReset(),
  12373. .ShiftData(),
  12374. .SyncLoad(),
  12375. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ),
  12376. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ),
  12377. .Q());
  12378. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_x = 16;
  12379. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_y = 1;
  12380. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_z = 5;
  12381. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .mask = 16'h698E;
  12382. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .modeMux = 1'b1;
  12383. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .FeedbackMux = 1'b0;
  12384. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .ShiftMux = 1'b0;
  12385. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .BypassEn = 1'b0;
  12386. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .CarryEnb = 1'b0;
  12387. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 (
  12388. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  12389. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [8]),
  12390. .C(vcc),
  12391. .D(vcc),
  12392. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ),
  12393. .Qin(),
  12394. .Clk(),
  12395. .AsyncReset(),
  12396. .SyncReset(),
  12397. .ShiftData(),
  12398. .SyncLoad(),
  12399. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ),
  12400. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ),
  12401. .Q());
  12402. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_x = 16;
  12403. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_y = 1;
  12404. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_z = 6;
  12405. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .mask = 16'h9617;
  12406. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .modeMux = 1'b1;
  12407. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .FeedbackMux = 1'b0;
  12408. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .ShiftMux = 1'b0;
  12409. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .BypassEn = 1'b0;
  12410. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .CarryEnb = 1'b0;
  12411. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 (
  12412. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  12413. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [9]),
  12414. .C(vcc),
  12415. .D(vcc),
  12416. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ),
  12417. .Qin(),
  12418. .Clk(),
  12419. .AsyncReset(),
  12420. .SyncReset(),
  12421. .ShiftData(),
  12422. .SyncLoad(),
  12423. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ),
  12424. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ),
  12425. .Q());
  12426. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_x = 16;
  12427. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_y = 1;
  12428. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_z = 7;
  12429. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .mask = 16'h698E;
  12430. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .modeMux = 1'b1;
  12431. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .FeedbackMux = 1'b0;
  12432. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .ShiftMux = 1'b0;
  12433. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .BypassEn = 1'b0;
  12434. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .CarryEnb = 1'b0;
  12435. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 (
  12436. .A(vcc),
  12437. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ),
  12438. .C(vcc),
  12439. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ),
  12440. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ),
  12441. .Qin(),
  12442. .Clk(),
  12443. .AsyncReset(),
  12444. .SyncReset(),
  12445. .ShiftData(),
  12446. .SyncLoad(),
  12447. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ),
  12448. .Cout(),
  12449. .Q());
  12450. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_x = 16;
  12451. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_y = 1;
  12452. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_z = 8;
  12453. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .mask = 16'hC33C;
  12454. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .modeMux = 1'b1;
  12455. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .FeedbackMux = 1'b0;
  12456. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .ShiftMux = 1'b0;
  12457. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .BypassEn = 1'b0;
  12458. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .CarryEnb = 1'b1;
  12459. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 (
  12460. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  12461. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  12462. .C(vcc),
  12463. .D(vcc),
  12464. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ),
  12465. .Qin(),
  12466. .Clk(),
  12467. .AsyncReset(),
  12468. .SyncReset(),
  12469. .ShiftData(),
  12470. .SyncLoad(),
  12471. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ),
  12472. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ),
  12473. .Q());
  12474. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_x = 16;
  12475. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_y = 2;
  12476. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_z = 9;
  12477. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .mask = 16'h698E;
  12478. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .modeMux = 1'b1;
  12479. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .FeedbackMux = 1'b0;
  12480. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .ShiftMux = 1'b0;
  12481. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .BypassEn = 1'b0;
  12482. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .CarryEnb = 1'b0;
  12483. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 (
  12484. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  12485. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  12486. .C(vcc),
  12487. .D(vcc),
  12488. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ),
  12489. .Qin(),
  12490. .Clk(),
  12491. .AsyncReset(),
  12492. .SyncReset(),
  12493. .ShiftData(),
  12494. .SyncLoad(),
  12495. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ),
  12496. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ),
  12497. .Q());
  12498. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_x = 16;
  12499. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_y = 2;
  12500. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_z = 10;
  12501. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .mask = 16'h9617;
  12502. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .modeMux = 1'b1;
  12503. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .FeedbackMux = 1'b0;
  12504. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .ShiftMux = 1'b0;
  12505. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .BypassEn = 1'b0;
  12506. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .CarryEnb = 1'b0;
  12507. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 (
  12508. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  12509. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ),
  12510. .C(vcc),
  12511. .D(vcc),
  12512. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ),
  12513. .Qin(),
  12514. .Clk(),
  12515. .AsyncReset(),
  12516. .SyncReset(),
  12517. .ShiftData(),
  12518. .SyncLoad(),
  12519. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ),
  12520. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ),
  12521. .Q());
  12522. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_x = 16;
  12523. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_y = 2;
  12524. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_z = 11;
  12525. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .mask = 16'h698E;
  12526. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .modeMux = 1'b1;
  12527. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .FeedbackMux = 1'b0;
  12528. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .ShiftMux = 1'b0;
  12529. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .BypassEn = 1'b0;
  12530. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .CarryEnb = 1'b0;
  12531. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 (
  12532. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  12533. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  12534. .C(vcc),
  12535. .D(vcc),
  12536. .Cin(),
  12537. .Qin(),
  12538. .Clk(),
  12539. .AsyncReset(),
  12540. .SyncReset(),
  12541. .ShiftData(),
  12542. .SyncLoad(),
  12543. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ),
  12544. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ),
  12545. .Q());
  12546. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_x = 15;
  12547. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_y = 3;
  12548. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_z = 0;
  12549. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .mask = 16'h6688;
  12550. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .modeMux = 1'b0;
  12551. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .FeedbackMux = 1'b0;
  12552. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .ShiftMux = 1'b0;
  12553. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .BypassEn = 1'b0;
  12554. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .CarryEnb = 1'b0;
  12555. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 (
  12556. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  12557. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ),
  12558. .C(vcc),
  12559. .D(vcc),
  12560. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ),
  12561. .Qin(),
  12562. .Clk(),
  12563. .AsyncReset(),
  12564. .SyncReset(),
  12565. .ShiftData(),
  12566. .SyncLoad(),
  12567. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ),
  12568. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ),
  12569. .Q());
  12570. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_x = 15;
  12571. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_y = 3;
  12572. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_z = 5;
  12573. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .mask = 16'h9617;
  12574. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .modeMux = 1'b1;
  12575. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .FeedbackMux = 1'b0;
  12576. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .ShiftMux = 1'b0;
  12577. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .BypassEn = 1'b0;
  12578. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .CarryEnb = 1'b0;
  12579. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 (
  12580. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  12581. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ),
  12582. .C(vcc),
  12583. .D(vcc),
  12584. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ),
  12585. .Qin(),
  12586. .Clk(),
  12587. .AsyncReset(),
  12588. .SyncReset(),
  12589. .ShiftData(),
  12590. .SyncLoad(),
  12591. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ),
  12592. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ),
  12593. .Q());
  12594. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_x = 15;
  12595. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_y = 3;
  12596. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_z = 6;
  12597. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .mask = 16'h698E;
  12598. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .modeMux = 1'b1;
  12599. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .FeedbackMux = 1'b0;
  12600. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .ShiftMux = 1'b0;
  12601. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .BypassEn = 1'b0;
  12602. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .CarryEnb = 1'b0;
  12603. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 (
  12604. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le9a [2]),
  12605. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  12606. .C(vcc),
  12607. .D(vcc),
  12608. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ),
  12609. .Qin(),
  12610. .Clk(),
  12611. .AsyncReset(),
  12612. .SyncReset(),
  12613. .ShiftData(),
  12614. .SyncLoad(),
  12615. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ),
  12616. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ),
  12617. .Q());
  12618. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_x = 15;
  12619. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_y = 3;
  12620. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_z = 7;
  12621. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .mask = 16'h9617;
  12622. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .modeMux = 1'b1;
  12623. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .FeedbackMux = 1'b0;
  12624. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .ShiftMux = 1'b0;
  12625. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .BypassEn = 1'b0;
  12626. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .CarryEnb = 1'b0;
  12627. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 (
  12628. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ),
  12629. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  12630. .C(vcc),
  12631. .D(vcc),
  12632. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ),
  12633. .Qin(),
  12634. .Clk(),
  12635. .AsyncReset(),
  12636. .SyncReset(),
  12637. .ShiftData(),
  12638. .SyncLoad(),
  12639. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ),
  12640. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ),
  12641. .Q());
  12642. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_x = 15;
  12643. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_y = 3;
  12644. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_z = 8;
  12645. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .mask = 16'h698E;
  12646. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .modeMux = 1'b1;
  12647. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .FeedbackMux = 1'b0;
  12648. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .ShiftMux = 1'b0;
  12649. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .BypassEn = 1'b0;
  12650. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .CarryEnb = 1'b0;
  12651. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 (
  12652. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ),
  12653. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  12654. .C(vcc),
  12655. .D(vcc),
  12656. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ),
  12657. .Qin(),
  12658. .Clk(),
  12659. .AsyncReset(),
  12660. .SyncReset(),
  12661. .ShiftData(),
  12662. .SyncLoad(),
  12663. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ),
  12664. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ),
  12665. .Q());
  12666. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_x = 15;
  12667. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_y = 3;
  12668. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_z = 9;
  12669. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .mask = 16'h694D;
  12670. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .modeMux = 1'b1;
  12671. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .FeedbackMux = 1'b0;
  12672. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .ShiftMux = 1'b0;
  12673. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .BypassEn = 1'b0;
  12674. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .CarryEnb = 1'b0;
  12675. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 (
  12676. .A(vcc),
  12677. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  12678. .C(vcc),
  12679. .D(vcc),
  12680. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ),
  12681. .Qin(),
  12682. .Clk(),
  12683. .AsyncReset(),
  12684. .SyncReset(),
  12685. .ShiftData(),
  12686. .SyncLoad(),
  12687. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ),
  12688. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ),
  12689. .Q());
  12690. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_x = 15;
  12691. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_y = 3;
  12692. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_z = 1;
  12693. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .mask = 16'h3C3F;
  12694. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .modeMux = 1'b1;
  12695. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .FeedbackMux = 1'b0;
  12696. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .ShiftMux = 1'b0;
  12697. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .BypassEn = 1'b0;
  12698. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .CarryEnb = 1'b0;
  12699. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 (
  12700. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  12701. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ),
  12702. .C(vcc),
  12703. .D(vcc),
  12704. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ),
  12705. .Qin(),
  12706. .Clk(),
  12707. .AsyncReset(),
  12708. .SyncReset(),
  12709. .ShiftData(),
  12710. .SyncLoad(),
  12711. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ),
  12712. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ),
  12713. .Q());
  12714. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_x = 15;
  12715. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_y = 3;
  12716. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_z = 10;
  12717. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .mask = 16'h698E;
  12718. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .modeMux = 1'b1;
  12719. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .FeedbackMux = 1'b0;
  12720. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .ShiftMux = 1'b0;
  12721. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .BypassEn = 1'b0;
  12722. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .CarryEnb = 1'b0;
  12723. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 (
  12724. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  12725. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ),
  12726. .C(vcc),
  12727. .D(vcc),
  12728. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ),
  12729. .Qin(),
  12730. .Clk(),
  12731. .AsyncReset(),
  12732. .SyncReset(),
  12733. .ShiftData(),
  12734. .SyncLoad(),
  12735. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ),
  12736. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ),
  12737. .Q());
  12738. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_x = 15;
  12739. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_y = 3;
  12740. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_z = 11;
  12741. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .mask = 16'h9617;
  12742. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .modeMux = 1'b1;
  12743. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .FeedbackMux = 1'b0;
  12744. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .ShiftMux = 1'b0;
  12745. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .BypassEn = 1'b0;
  12746. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .CarryEnb = 1'b0;
  12747. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 (
  12748. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  12749. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  12750. .C(vcc),
  12751. .D(vcc),
  12752. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ),
  12753. .Qin(),
  12754. .Clk(),
  12755. .AsyncReset(),
  12756. .SyncReset(),
  12757. .ShiftData(),
  12758. .SyncLoad(),
  12759. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ),
  12760. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ),
  12761. .Q());
  12762. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_x = 15;
  12763. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_y = 3;
  12764. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_z = 12;
  12765. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .mask = 16'h698E;
  12766. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .modeMux = 1'b1;
  12767. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .FeedbackMux = 1'b0;
  12768. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .ShiftMux = 1'b0;
  12769. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .BypassEn = 1'b0;
  12770. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .CarryEnb = 1'b0;
  12771. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 (
  12772. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ),
  12773. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  12774. .C(vcc),
  12775. .D(vcc),
  12776. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ),
  12777. .Qin(),
  12778. .Clk(),
  12779. .AsyncReset(),
  12780. .SyncReset(),
  12781. .ShiftData(),
  12782. .SyncLoad(),
  12783. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ),
  12784. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ),
  12785. .Q());
  12786. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_x = 15;
  12787. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_y = 3;
  12788. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_z = 13;
  12789. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .mask = 16'h694D;
  12790. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .modeMux = 1'b1;
  12791. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .FeedbackMux = 1'b0;
  12792. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .ShiftMux = 1'b0;
  12793. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .BypassEn = 1'b0;
  12794. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .CarryEnb = 1'b0;
  12795. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 (
  12796. .A(vcc),
  12797. .B(vcc),
  12798. .C(vcc),
  12799. .D(vcc),
  12800. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ),
  12801. .Qin(),
  12802. .Clk(),
  12803. .AsyncReset(),
  12804. .SyncReset(),
  12805. .ShiftData(),
  12806. .SyncLoad(),
  12807. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ),
  12808. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ),
  12809. .Q());
  12810. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_x = 15;
  12811. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_y = 3;
  12812. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_z = 14;
  12813. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .mask = 16'hF00F;
  12814. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .modeMux = 1'b1;
  12815. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .FeedbackMux = 1'b0;
  12816. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .ShiftMux = 1'b0;
  12817. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .BypassEn = 1'b0;
  12818. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .CarryEnb = 1'b0;
  12819. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 (
  12820. .A(vcc),
  12821. .B(vcc),
  12822. .C(vcc),
  12823. .D(vcc),
  12824. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ),
  12825. .Qin(),
  12826. .Clk(),
  12827. .AsyncReset(),
  12828. .SyncReset(),
  12829. .ShiftData(),
  12830. .SyncLoad(),
  12831. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ),
  12832. .Cout(),
  12833. .Q());
  12834. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_x = 15;
  12835. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_y = 3;
  12836. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_z = 15;
  12837. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .mask = 16'h0F0F;
  12838. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .modeMux = 1'b1;
  12839. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .FeedbackMux = 1'b0;
  12840. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .ShiftMux = 1'b0;
  12841. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .BypassEn = 1'b0;
  12842. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .CarryEnb = 1'b1;
  12843. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 (
  12844. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  12845. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  12846. .C(vcc),
  12847. .D(vcc),
  12848. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ),
  12849. .Qin(),
  12850. .Clk(),
  12851. .AsyncReset(),
  12852. .SyncReset(),
  12853. .ShiftData(),
  12854. .SyncLoad(),
  12855. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ),
  12856. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ),
  12857. .Q());
  12858. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_x = 15;
  12859. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_y = 3;
  12860. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_z = 2;
  12861. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .mask = 16'h698E;
  12862. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .modeMux = 1'b1;
  12863. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .FeedbackMux = 1'b0;
  12864. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .ShiftMux = 1'b0;
  12865. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .BypassEn = 1'b0;
  12866. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .CarryEnb = 1'b0;
  12867. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 (
  12868. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  12869. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  12870. .C(vcc),
  12871. .D(vcc),
  12872. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ),
  12873. .Qin(),
  12874. .Clk(),
  12875. .AsyncReset(),
  12876. .SyncReset(),
  12877. .ShiftData(),
  12878. .SyncLoad(),
  12879. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ),
  12880. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ),
  12881. .Q());
  12882. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_x = 15;
  12883. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_y = 3;
  12884. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_z = 3;
  12885. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .mask = 16'h9617;
  12886. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .modeMux = 1'b1;
  12887. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .FeedbackMux = 1'b0;
  12888. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .ShiftMux = 1'b0;
  12889. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .BypassEn = 1'b0;
  12890. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .CarryEnb = 1'b0;
  12891. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 (
  12892. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  12893. .B(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  12894. .C(vcc),
  12895. .D(vcc),
  12896. .Cin(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ),
  12897. .Qin(),
  12898. .Clk(),
  12899. .AsyncReset(),
  12900. .SyncReset(),
  12901. .ShiftData(),
  12902. .SyncLoad(),
  12903. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ),
  12904. .Cout(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ),
  12905. .Q());
  12906. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_x = 15;
  12907. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_y = 3;
  12908. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_z = 4;
  12909. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .mask = 16'h698E;
  12910. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .modeMux = 1'b1;
  12911. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .FeedbackMux = 1'b0;
  12912. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .ShiftMux = 1'b0;
  12913. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .BypassEn = 1'b0;
  12914. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .CarryEnb = 1'b0;
  12915. alta_slice \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I (
  12916. .A(vcc),
  12917. .B(vcc),
  12918. .C(vcc),
  12919. .D(vcc),
  12920. .Cin(),
  12921. .Qin(),
  12922. .Clk(),
  12923. .AsyncReset(),
  12924. .SyncReset(),
  12925. .ShiftData(),
  12926. .SyncLoad(),
  12927. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ),
  12928. .Cout(),
  12929. .Q());
  12930. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .coord_x = 15;
  12931. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .coord_y = 4;
  12932. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .coord_z = 2;
  12933. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .mask = 16'h0000;
  12934. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .modeMux = 1'b0;
  12935. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .FeedbackMux = 1'b0;
  12936. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .ShiftMux = 1'b0;
  12937. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .BypassEn = 1'b0;
  12938. defparam \macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I .CarryEnb = 1'b1;
  12939. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 (
  12940. .A(vcc),
  12941. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  12942. .C(vcc),
  12943. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  12944. .Cin(),
  12945. .Qin(),
  12946. .Clk(),
  12947. .AsyncReset(),
  12948. .SyncReset(),
  12949. .ShiftData(),
  12950. .SyncLoad(),
  12951. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8_combout ),
  12952. .Cout(),
  12953. .Q());
  12954. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .coord_x = 9;
  12955. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .coord_y = 1;
  12956. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .coord_z = 4;
  12957. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .mask = 16'h33FF;
  12958. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .modeMux = 1'b0;
  12959. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .FeedbackMux = 1'b0;
  12960. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .ShiftMux = 1'b0;
  12961. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .BypassEn = 1'b0;
  12962. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8 .CarryEnb = 1'b1;
  12963. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 (
  12964. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  12965. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  12966. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  12967. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  12968. .Cin(),
  12969. .Qin(),
  12970. .Clk(),
  12971. .AsyncReset(),
  12972. .SyncReset(),
  12973. .ShiftData(),
  12974. .SyncLoad(),
  12975. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  12976. .Cout(),
  12977. .Q());
  12978. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .coord_x = 12;
  12979. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .coord_y = 4;
  12980. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .coord_z = 12;
  12981. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .mask = 16'h363C;
  12982. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .modeMux = 1'b0;
  12983. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .FeedbackMux = 1'b0;
  12984. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .ShiftMux = 1'b0;
  12985. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .BypassEn = 1'b0;
  12986. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9 .CarryEnb = 1'b1;
  12987. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 (
  12988. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  12989. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  12990. .C(vcc),
  12991. .D(vcc),
  12992. .Cin(),
  12993. .Qin(),
  12994. .Clk(),
  12995. .AsyncReset(),
  12996. .SyncReset(),
  12997. .ShiftData(),
  12998. .SyncLoad(),
  12999. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0_combout ),
  13000. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~1 ),
  13001. .Q());
  13002. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .coord_x = 5;
  13003. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .coord_y = 1;
  13004. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .coord_z = 2;
  13005. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .mask = 16'h6688;
  13006. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .modeMux = 1'b0;
  13007. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .FeedbackMux = 1'b0;
  13008. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .ShiftMux = 1'b0;
  13009. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .BypassEn = 1'b0;
  13010. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0 .CarryEnb = 1'b0;
  13011. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 (
  13012. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  13013. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  13014. .C(vcc),
  13015. .D(vcc),
  13016. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~19 ),
  13017. .Qin(),
  13018. .Clk(),
  13019. .AsyncReset(),
  13020. .SyncReset(),
  13021. .ShiftData(),
  13022. .SyncLoad(),
  13023. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20_combout ),
  13024. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~21 ),
  13025. .Q());
  13026. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .coord_x = 5;
  13027. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .coord_y = 1;
  13028. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .coord_z = 12;
  13029. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .mask = 16'h698E;
  13030. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .modeMux = 1'b1;
  13031. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .FeedbackMux = 1'b0;
  13032. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .ShiftMux = 1'b0;
  13033. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .BypassEn = 1'b0;
  13034. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20 .CarryEnb = 1'b0;
  13035. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 (
  13036. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18_combout ),
  13037. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  13038. .C(vcc),
  13039. .D(vcc),
  13040. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~21 ),
  13041. .Qin(),
  13042. .Clk(),
  13043. .AsyncReset(),
  13044. .SyncReset(),
  13045. .ShiftData(),
  13046. .SyncLoad(),
  13047. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22_combout ),
  13048. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~23 ),
  13049. .Q());
  13050. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .coord_x = 5;
  13051. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .coord_y = 1;
  13052. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .coord_z = 13;
  13053. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .mask = 16'h694D;
  13054. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .modeMux = 1'b1;
  13055. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .FeedbackMux = 1'b0;
  13056. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .ShiftMux = 1'b0;
  13057. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .BypassEn = 1'b0;
  13058. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22 .CarryEnb = 1'b0;
  13059. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 (
  13060. .A(vcc),
  13061. .B(vcc),
  13062. .C(vcc),
  13063. .D(vcc),
  13064. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~23 ),
  13065. .Qin(),
  13066. .Clk(),
  13067. .AsyncReset(),
  13068. .SyncReset(),
  13069. .ShiftData(),
  13070. .SyncLoad(),
  13071. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24_combout ),
  13072. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~25 ),
  13073. .Q());
  13074. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .coord_x = 5;
  13075. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .coord_y = 1;
  13076. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .coord_z = 14;
  13077. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .mask = 16'hF00F;
  13078. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .modeMux = 1'b1;
  13079. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .FeedbackMux = 1'b0;
  13080. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .ShiftMux = 1'b0;
  13081. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .BypassEn = 1'b0;
  13082. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24 .CarryEnb = 1'b0;
  13083. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 (
  13084. .A(vcc),
  13085. .B(vcc),
  13086. .C(vcc),
  13087. .D(vcc),
  13088. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~25 ),
  13089. .Qin(),
  13090. .Clk(),
  13091. .AsyncReset(),
  13092. .SyncReset(),
  13093. .ShiftData(),
  13094. .SyncLoad(),
  13095. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26_combout ),
  13096. .Cout(),
  13097. .Q());
  13098. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .coord_x = 5;
  13099. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .coord_y = 1;
  13100. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .coord_z = 15;
  13101. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .mask = 16'hF0F0;
  13102. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .modeMux = 1'b1;
  13103. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .FeedbackMux = 1'b0;
  13104. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .ShiftMux = 1'b0;
  13105. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .BypassEn = 1'b0;
  13106. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26 .CarryEnb = 1'b1;
  13107. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 (
  13108. .A(vcc),
  13109. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  13110. .C(vcc),
  13111. .D(vcc),
  13112. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~1 ),
  13113. .Qin(),
  13114. .Clk(),
  13115. .AsyncReset(),
  13116. .SyncReset(),
  13117. .ShiftData(),
  13118. .SyncLoad(),
  13119. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2_combout ),
  13120. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~3 ),
  13121. .Q());
  13122. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .coord_x = 5;
  13123. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .coord_y = 1;
  13124. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .coord_z = 3;
  13125. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .mask = 16'h3C3F;
  13126. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .modeMux = 1'b1;
  13127. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .FeedbackMux = 1'b0;
  13128. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .ShiftMux = 1'b0;
  13129. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .BypassEn = 1'b0;
  13130. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2 .CarryEnb = 1'b0;
  13131. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 (
  13132. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  13133. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  13134. .C(vcc),
  13135. .D(vcc),
  13136. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~3 ),
  13137. .Qin(),
  13138. .Clk(),
  13139. .AsyncReset(),
  13140. .SyncReset(),
  13141. .ShiftData(),
  13142. .SyncLoad(),
  13143. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4_combout ),
  13144. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~5 ),
  13145. .Q());
  13146. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .coord_x = 5;
  13147. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .coord_y = 1;
  13148. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .coord_z = 4;
  13149. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .mask = 16'h698E;
  13150. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .modeMux = 1'b1;
  13151. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .FeedbackMux = 1'b0;
  13152. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .ShiftMux = 1'b0;
  13153. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .BypassEn = 1'b0;
  13154. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4 .CarryEnb = 1'b0;
  13155. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 (
  13156. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  13157. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  13158. .C(vcc),
  13159. .D(vcc),
  13160. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~5 ),
  13161. .Qin(),
  13162. .Clk(),
  13163. .AsyncReset(),
  13164. .SyncReset(),
  13165. .ShiftData(),
  13166. .SyncLoad(),
  13167. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6_combout ),
  13168. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~7 ),
  13169. .Q());
  13170. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .coord_x = 5;
  13171. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .coord_y = 1;
  13172. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .coord_z = 5;
  13173. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .mask = 16'h9617;
  13174. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .modeMux = 1'b1;
  13175. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .FeedbackMux = 1'b0;
  13176. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .ShiftMux = 1'b0;
  13177. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .BypassEn = 1'b0;
  13178. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6 .CarryEnb = 1'b0;
  13179. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 (
  13180. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  13181. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  13182. .C(vcc),
  13183. .D(vcc),
  13184. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~7 ),
  13185. .Qin(),
  13186. .Clk(),
  13187. .AsyncReset(),
  13188. .SyncReset(),
  13189. .ShiftData(),
  13190. .SyncLoad(),
  13191. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8_combout ),
  13192. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~9 ),
  13193. .Q());
  13194. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .coord_x = 5;
  13195. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .coord_y = 1;
  13196. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .coord_z = 6;
  13197. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .mask = 16'h698E;
  13198. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .modeMux = 1'b1;
  13199. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .FeedbackMux = 1'b0;
  13200. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .ShiftMux = 1'b0;
  13201. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .BypassEn = 1'b0;
  13202. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8 .CarryEnb = 1'b0;
  13203. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 (
  13204. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  13205. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  13206. .C(vcc),
  13207. .D(vcc),
  13208. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~9 ),
  13209. .Qin(),
  13210. .Clk(),
  13211. .AsyncReset(),
  13212. .SyncReset(),
  13213. .ShiftData(),
  13214. .SyncLoad(),
  13215. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10_combout ),
  13216. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~11 ),
  13217. .Q());
  13218. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .coord_x = 5;
  13219. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .coord_y = 1;
  13220. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .coord_z = 7;
  13221. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .mask = 16'h9617;
  13222. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .modeMux = 1'b1;
  13223. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .FeedbackMux = 1'b0;
  13224. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .ShiftMux = 1'b0;
  13225. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .BypassEn = 1'b0;
  13226. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10 .CarryEnb = 1'b0;
  13227. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 (
  13228. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  13229. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  13230. .C(vcc),
  13231. .D(vcc),
  13232. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~11 ),
  13233. .Qin(),
  13234. .Clk(),
  13235. .AsyncReset(),
  13236. .SyncReset(),
  13237. .ShiftData(),
  13238. .SyncLoad(),
  13239. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12_combout ),
  13240. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~13 ),
  13241. .Q());
  13242. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .coord_x = 5;
  13243. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .coord_y = 1;
  13244. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .coord_z = 8;
  13245. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .mask = 16'h698E;
  13246. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .modeMux = 1'b1;
  13247. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .FeedbackMux = 1'b0;
  13248. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .ShiftMux = 1'b0;
  13249. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .BypassEn = 1'b0;
  13250. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12 .CarryEnb = 1'b0;
  13251. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 (
  13252. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  13253. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13254. .C(vcc),
  13255. .D(vcc),
  13256. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~13 ),
  13257. .Qin(),
  13258. .Clk(),
  13259. .AsyncReset(),
  13260. .SyncReset(),
  13261. .ShiftData(),
  13262. .SyncLoad(),
  13263. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14_combout ),
  13264. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~15 ),
  13265. .Q());
  13266. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .coord_x = 5;
  13267. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .coord_y = 1;
  13268. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .coord_z = 9;
  13269. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .mask = 16'h9617;
  13270. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .modeMux = 1'b1;
  13271. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .FeedbackMux = 1'b0;
  13272. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .ShiftMux = 1'b0;
  13273. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .BypassEn = 1'b0;
  13274. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14 .CarryEnb = 1'b0;
  13275. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 (
  13276. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  13277. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13278. .C(vcc),
  13279. .D(vcc),
  13280. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~15 ),
  13281. .Qin(),
  13282. .Clk(),
  13283. .AsyncReset(),
  13284. .SyncReset(),
  13285. .ShiftData(),
  13286. .SyncLoad(),
  13287. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16_combout ),
  13288. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~17 ),
  13289. .Q());
  13290. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .coord_x = 5;
  13291. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .coord_y = 1;
  13292. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .coord_z = 10;
  13293. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .mask = 16'h698E;
  13294. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .modeMux = 1'b1;
  13295. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .FeedbackMux = 1'b0;
  13296. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .ShiftMux = 1'b0;
  13297. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .BypassEn = 1'b0;
  13298. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16 .CarryEnb = 1'b0;
  13299. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 (
  13300. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  13301. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13302. .C(vcc),
  13303. .D(vcc),
  13304. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~17 ),
  13305. .Qin(),
  13306. .Clk(),
  13307. .AsyncReset(),
  13308. .SyncReset(),
  13309. .ShiftData(),
  13310. .SyncLoad(),
  13311. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18_combout ),
  13312. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~19 ),
  13313. .Q());
  13314. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .coord_x = 5;
  13315. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .coord_y = 1;
  13316. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .coord_z = 11;
  13317. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .mask = 16'h694D;
  13318. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .modeMux = 1'b1;
  13319. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .FeedbackMux = 1'b0;
  13320. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .ShiftMux = 1'b0;
  13321. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .BypassEn = 1'b0;
  13322. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18 .CarryEnb = 1'b0;
  13323. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 (
  13324. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  13325. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  13326. .C(vcc),
  13327. .D(vcc),
  13328. .Cin(),
  13329. .Qin(),
  13330. .Clk(),
  13331. .AsyncReset(),
  13332. .SyncReset(),
  13333. .ShiftData(),
  13334. .SyncLoad(),
  13335. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0_combout ),
  13336. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~1 ),
  13337. .Q());
  13338. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .coord_x = 7;
  13339. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .coord_y = 4;
  13340. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .coord_z = 3;
  13341. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .mask = 16'h6688;
  13342. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .modeMux = 1'b0;
  13343. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .FeedbackMux = 1'b0;
  13344. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .ShiftMux = 1'b0;
  13345. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .BypassEn = 1'b0;
  13346. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0 .CarryEnb = 1'b0;
  13347. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 (
  13348. .A(vcc),
  13349. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  13350. .C(vcc),
  13351. .D(vcc),
  13352. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~1 ),
  13353. .Qin(),
  13354. .Clk(),
  13355. .AsyncReset(),
  13356. .SyncReset(),
  13357. .ShiftData(),
  13358. .SyncLoad(),
  13359. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2_combout ),
  13360. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~3 ),
  13361. .Q());
  13362. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .coord_x = 7;
  13363. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .coord_y = 4;
  13364. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .coord_z = 4;
  13365. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .mask = 16'h3C3F;
  13366. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .modeMux = 1'b1;
  13367. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .FeedbackMux = 1'b0;
  13368. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .ShiftMux = 1'b0;
  13369. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .BypassEn = 1'b0;
  13370. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2 .CarryEnb = 1'b0;
  13371. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 (
  13372. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  13373. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  13374. .C(vcc),
  13375. .D(vcc),
  13376. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~3 ),
  13377. .Qin(),
  13378. .Clk(),
  13379. .AsyncReset(),
  13380. .SyncReset(),
  13381. .ShiftData(),
  13382. .SyncLoad(),
  13383. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4_combout ),
  13384. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~5 ),
  13385. .Q());
  13386. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .coord_x = 7;
  13387. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .coord_y = 4;
  13388. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .coord_z = 5;
  13389. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .mask = 16'h698E;
  13390. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .modeMux = 1'b1;
  13391. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .FeedbackMux = 1'b0;
  13392. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .ShiftMux = 1'b0;
  13393. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .BypassEn = 1'b0;
  13394. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4 .CarryEnb = 1'b0;
  13395. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 (
  13396. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  13397. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  13398. .C(vcc),
  13399. .D(vcc),
  13400. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~5 ),
  13401. .Qin(),
  13402. .Clk(),
  13403. .AsyncReset(),
  13404. .SyncReset(),
  13405. .ShiftData(),
  13406. .SyncLoad(),
  13407. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6_combout ),
  13408. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~7 ),
  13409. .Q());
  13410. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .coord_x = 7;
  13411. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .coord_y = 4;
  13412. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .coord_z = 6;
  13413. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .mask = 16'h9617;
  13414. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .modeMux = 1'b1;
  13415. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .FeedbackMux = 1'b0;
  13416. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .ShiftMux = 1'b0;
  13417. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .BypassEn = 1'b0;
  13418. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6 .CarryEnb = 1'b0;
  13419. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 (
  13420. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  13421. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  13422. .C(vcc),
  13423. .D(vcc),
  13424. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~7 ),
  13425. .Qin(),
  13426. .Clk(),
  13427. .AsyncReset(),
  13428. .SyncReset(),
  13429. .ShiftData(),
  13430. .SyncLoad(),
  13431. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8_combout ),
  13432. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~9 ),
  13433. .Q());
  13434. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .coord_x = 7;
  13435. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .coord_y = 4;
  13436. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .coord_z = 7;
  13437. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .mask = 16'h698E;
  13438. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .modeMux = 1'b1;
  13439. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .FeedbackMux = 1'b0;
  13440. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .ShiftMux = 1'b0;
  13441. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .BypassEn = 1'b0;
  13442. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8 .CarryEnb = 1'b0;
  13443. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 (
  13444. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  13445. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  13446. .C(vcc),
  13447. .D(vcc),
  13448. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~9 ),
  13449. .Qin(),
  13450. .Clk(),
  13451. .AsyncReset(),
  13452. .SyncReset(),
  13453. .ShiftData(),
  13454. .SyncLoad(),
  13455. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10_combout ),
  13456. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~11 ),
  13457. .Q());
  13458. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .coord_x = 7;
  13459. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .coord_y = 4;
  13460. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .coord_z = 8;
  13461. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .mask = 16'h9617;
  13462. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .modeMux = 1'b1;
  13463. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .FeedbackMux = 1'b0;
  13464. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .ShiftMux = 1'b0;
  13465. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .BypassEn = 1'b0;
  13466. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10 .CarryEnb = 1'b0;
  13467. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 (
  13468. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  13469. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  13470. .C(vcc),
  13471. .D(vcc),
  13472. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~11 ),
  13473. .Qin(),
  13474. .Clk(),
  13475. .AsyncReset(),
  13476. .SyncReset(),
  13477. .ShiftData(),
  13478. .SyncLoad(),
  13479. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12_combout ),
  13480. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~13 ),
  13481. .Q());
  13482. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .coord_x = 7;
  13483. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .coord_y = 4;
  13484. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .coord_z = 9;
  13485. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .mask = 16'h698E;
  13486. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .modeMux = 1'b1;
  13487. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .FeedbackMux = 1'b0;
  13488. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .ShiftMux = 1'b0;
  13489. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .BypassEn = 1'b0;
  13490. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12 .CarryEnb = 1'b0;
  13491. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 (
  13492. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  13493. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  13494. .C(vcc),
  13495. .D(vcc),
  13496. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~13 ),
  13497. .Qin(),
  13498. .Clk(),
  13499. .AsyncReset(),
  13500. .SyncReset(),
  13501. .ShiftData(),
  13502. .SyncLoad(),
  13503. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14_combout ),
  13504. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~15 ),
  13505. .Q());
  13506. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .coord_x = 7;
  13507. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .coord_y = 4;
  13508. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .coord_z = 10;
  13509. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .mask = 16'h692B;
  13510. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .modeMux = 1'b1;
  13511. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .FeedbackMux = 1'b0;
  13512. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .ShiftMux = 1'b0;
  13513. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .BypassEn = 1'b0;
  13514. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14 .CarryEnb = 1'b0;
  13515. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 (
  13516. .A(vcc),
  13517. .B(vcc),
  13518. .C(vcc),
  13519. .D(vcc),
  13520. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~15 ),
  13521. .Qin(),
  13522. .Clk(),
  13523. .AsyncReset(),
  13524. .SyncReset(),
  13525. .ShiftData(),
  13526. .SyncLoad(),
  13527. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16_combout ),
  13528. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~17 ),
  13529. .Q());
  13530. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .coord_x = 7;
  13531. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .coord_y = 4;
  13532. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .coord_z = 11;
  13533. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .mask = 16'hF00F;
  13534. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .modeMux = 1'b1;
  13535. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .FeedbackMux = 1'b0;
  13536. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .ShiftMux = 1'b0;
  13537. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .BypassEn = 1'b0;
  13538. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16 .CarryEnb = 1'b0;
  13539. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 (
  13540. .A(vcc),
  13541. .B(vcc),
  13542. .C(vcc),
  13543. .D(vcc),
  13544. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~17 ),
  13545. .Qin(),
  13546. .Clk(),
  13547. .AsyncReset(),
  13548. .SyncReset(),
  13549. .ShiftData(),
  13550. .SyncLoad(),
  13551. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18_combout ),
  13552. .Cout(),
  13553. .Q());
  13554. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .coord_x = 7;
  13555. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .coord_y = 4;
  13556. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .coord_z = 12;
  13557. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .mask = 16'hF0F0;
  13558. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .modeMux = 1'b1;
  13559. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .FeedbackMux = 1'b0;
  13560. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .ShiftMux = 1'b0;
  13561. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .BypassEn = 1'b0;
  13562. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[9]~18 .CarryEnb = 1'b1;
  13563. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 (
  13564. .A(vcc),
  13565. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13566. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  13567. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  13568. .Cin(),
  13569. .Qin(),
  13570. .Clk(),
  13571. .AsyncReset(),
  13572. .SyncReset(),
  13573. .ShiftData(),
  13574. .SyncLoad(),
  13575. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  13576. .Cout(),
  13577. .Q());
  13578. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_x = 10;
  13579. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_y = 1;
  13580. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .coord_z = 5;
  13581. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .mask = 16'hFFC0;
  13582. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .modeMux = 1'b0;
  13583. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .FeedbackMux = 1'b0;
  13584. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .ShiftMux = 1'b0;
  13585. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .BypassEn = 1'b0;
  13586. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0 .CarryEnb = 1'b1;
  13587. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 (
  13588. .A(vcc),
  13589. .B(vcc),
  13590. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  13591. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13592. .Cin(),
  13593. .Qin(),
  13594. .Clk(),
  13595. .AsyncReset(),
  13596. .SyncReset(),
  13597. .ShiftData(),
  13598. .SyncLoad(),
  13599. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  13600. .Cout(),
  13601. .Q());
  13602. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .coord_x = 6;
  13603. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .coord_y = 4;
  13604. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .coord_z = 4;
  13605. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .mask = 16'h0FF0;
  13606. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .modeMux = 1'b0;
  13607. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .FeedbackMux = 1'b0;
  13608. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .ShiftMux = 1'b0;
  13609. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .BypassEn = 1'b0;
  13610. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2 .CarryEnb = 1'b1;
  13611. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 (
  13612. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  13613. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  13614. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  13615. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13616. .Cin(),
  13617. .Qin(),
  13618. .Clk(),
  13619. .AsyncReset(),
  13620. .SyncReset(),
  13621. .ShiftData(),
  13622. .SyncLoad(),
  13623. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  13624. .Cout(),
  13625. .Q());
  13626. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_x = 10;
  13627. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_y = 4;
  13628. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .coord_z = 10;
  13629. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .mask = 16'h565A;
  13630. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .modeMux = 1'b0;
  13631. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .FeedbackMux = 1'b0;
  13632. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .ShiftMux = 1'b0;
  13633. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .BypassEn = 1'b0;
  13634. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1 .CarryEnb = 1'b1;
  13635. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 (
  13636. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  13637. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  13638. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  13639. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  13640. .Cin(),
  13641. .Qin(),
  13642. .Clk(),
  13643. .AsyncReset(),
  13644. .SyncReset(),
  13645. .ShiftData(),
  13646. .SyncLoad(),
  13647. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  13648. .Cout(),
  13649. .Q());
  13650. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .coord_x = 12;
  13651. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .coord_y = 4;
  13652. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .coord_z = 8;
  13653. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .mask = 16'h07F8;
  13654. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .modeMux = 1'b0;
  13655. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .FeedbackMux = 1'b0;
  13656. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .ShiftMux = 1'b0;
  13657. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .BypassEn = 1'b0;
  13658. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0 .CarryEnb = 1'b1;
  13659. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] (
  13660. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  13661. .B(vcc),
  13662. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  13663. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13664. .Cin(),
  13665. .Qin(),
  13666. .Clk(),
  13667. .AsyncReset(),
  13668. .SyncReset(),
  13669. .ShiftData(),
  13670. .SyncLoad(),
  13671. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  13672. .Cout(),
  13673. .Q());
  13674. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_x = 6;
  13675. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_y = 2;
  13676. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_z = 5;
  13677. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .mask = 16'h5FA0;
  13678. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .modeMux = 1'b0;
  13679. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .FeedbackMux = 1'b0;
  13680. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .ShiftMux = 1'b0;
  13681. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .BypassEn = 1'b0;
  13682. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .CarryEnb = 1'b1;
  13683. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] (
  13684. .A(vcc),
  13685. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  13686. .C(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  13687. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13688. .Cin(),
  13689. .Qin(),
  13690. .Clk(),
  13691. .AsyncReset(),
  13692. .SyncReset(),
  13693. .ShiftData(),
  13694. .SyncLoad(),
  13695. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  13696. .Cout(),
  13697. .Q());
  13698. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_x = 6;
  13699. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_y = 4;
  13700. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_z = 10;
  13701. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .mask = 16'hCF00;
  13702. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .modeMux = 1'b0;
  13703. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .FeedbackMux = 1'b0;
  13704. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .ShiftMux = 1'b0;
  13705. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .BypassEn = 1'b0;
  13706. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .CarryEnb = 1'b1;
  13707. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] (
  13708. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  13709. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13710. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  13711. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  13712. .Cin(),
  13713. .Qin(),
  13714. .Clk(),
  13715. .AsyncReset(),
  13716. .SyncReset(),
  13717. .ShiftData(),
  13718. .SyncLoad(),
  13719. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  13720. .Cout(),
  13721. .Q());
  13722. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_x = 6;
  13723. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_y = 2;
  13724. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_z = 2;
  13725. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .mask = 16'h3C44;
  13726. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .modeMux = 1'b0;
  13727. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .FeedbackMux = 1'b0;
  13728. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .ShiftMux = 1'b0;
  13729. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .BypassEn = 1'b0;
  13730. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .CarryEnb = 1'b1;
  13731. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] (
  13732. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  13733. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  13734. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  13735. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  13736. .Cin(),
  13737. .Qin(),
  13738. .Clk(),
  13739. .AsyncReset(),
  13740. .SyncReset(),
  13741. .ShiftData(),
  13742. .SyncLoad(),
  13743. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  13744. .Cout(),
  13745. .Q());
  13746. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_x = 7;
  13747. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_y = 2;
  13748. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_z = 5;
  13749. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .mask = 16'h606A;
  13750. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .modeMux = 1'b0;
  13751. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .FeedbackMux = 1'b0;
  13752. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .ShiftMux = 1'b0;
  13753. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .BypassEn = 1'b0;
  13754. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .CarryEnb = 1'b1;
  13755. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] (
  13756. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  13757. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  13758. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  13759. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  13760. .Cin(),
  13761. .Qin(),
  13762. .Clk(),
  13763. .AsyncReset(),
  13764. .SyncReset(),
  13765. .ShiftData(),
  13766. .SyncLoad(),
  13767. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  13768. .Cout(),
  13769. .Q());
  13770. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_x = 7;
  13771. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_y = 2;
  13772. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_z = 4;
  13773. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .mask = 16'h606A;
  13774. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .modeMux = 1'b0;
  13775. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .FeedbackMux = 1'b0;
  13776. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .ShiftMux = 1'b0;
  13777. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .BypassEn = 1'b0;
  13778. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .CarryEnb = 1'b1;
  13779. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] (
  13780. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  13781. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13782. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  13783. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  13784. .Cin(),
  13785. .Qin(),
  13786. .Clk(),
  13787. .AsyncReset(),
  13788. .SyncReset(),
  13789. .ShiftData(),
  13790. .SyncLoad(),
  13791. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  13792. .Cout(),
  13793. .Q());
  13794. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_x = 6;
  13795. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_y = 4;
  13796. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_z = 13;
  13797. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .mask = 16'h660C;
  13798. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .modeMux = 1'b0;
  13799. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .FeedbackMux = 1'b0;
  13800. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .ShiftMux = 1'b0;
  13801. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .BypassEn = 1'b0;
  13802. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .CarryEnb = 1'b1;
  13803. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] (
  13804. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  13805. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  13806. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  13807. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  13808. .Cin(),
  13809. .Qin(),
  13810. .Clk(),
  13811. .AsyncReset(),
  13812. .SyncReset(),
  13813. .ShiftData(),
  13814. .SyncLoad(),
  13815. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  13816. .Cout(),
  13817. .Q());
  13818. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_x = 10;
  13819. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_y = 1;
  13820. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_z = 0;
  13821. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .mask = 16'h286C;
  13822. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .modeMux = 1'b0;
  13823. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .FeedbackMux = 1'b0;
  13824. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .ShiftMux = 1'b0;
  13825. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .BypassEn = 1'b0;
  13826. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .CarryEnb = 1'b1;
  13827. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] (
  13828. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  13829. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  13830. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  13831. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  13832. .Cin(),
  13833. .Qin(),
  13834. .Clk(),
  13835. .AsyncReset(),
  13836. .SyncReset(),
  13837. .ShiftData(),
  13838. .SyncLoad(),
  13839. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  13840. .Cout(),
  13841. .Q());
  13842. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_x = 7;
  13843. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_y = 3;
  13844. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_z = 13;
  13845. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .mask = 16'h2878;
  13846. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .modeMux = 1'b0;
  13847. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .FeedbackMux = 1'b0;
  13848. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .ShiftMux = 1'b0;
  13849. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .BypassEn = 1'b0;
  13850. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .CarryEnb = 1'b1;
  13851. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] (
  13852. .A(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  13853. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  13854. .C(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  13855. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13856. .Cin(),
  13857. .Qin(),
  13858. .Clk(),
  13859. .AsyncReset(),
  13860. .SyncReset(),
  13861. .ShiftData(),
  13862. .SyncLoad(),
  13863. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  13864. .Cout(),
  13865. .Q());
  13866. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_x = 6;
  13867. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_y = 4;
  13868. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_z = 9;
  13869. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .mask = 16'h1DC0;
  13870. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .modeMux = 1'b0;
  13871. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .FeedbackMux = 1'b0;
  13872. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .ShiftMux = 1'b0;
  13873. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .BypassEn = 1'b0;
  13874. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .CarryEnb = 1'b1;
  13875. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] (
  13876. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  13877. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  13878. .C(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  13879. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  13880. .Cin(),
  13881. .Qin(),
  13882. .Clk(),
  13883. .AsyncReset(),
  13884. .SyncReset(),
  13885. .ShiftData(),
  13886. .SyncLoad(),
  13887. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  13888. .Cout(),
  13889. .Q());
  13890. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_x = 6;
  13891. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_y = 4;
  13892. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_z = 3;
  13893. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .mask = 16'h660A;
  13894. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .modeMux = 1'b0;
  13895. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .FeedbackMux = 1'b0;
  13896. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .ShiftMux = 1'b0;
  13897. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .BypassEn = 1'b0;
  13898. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .CarryEnb = 1'b1;
  13899. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] (
  13900. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  13901. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  13902. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  13903. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13904. .Cin(),
  13905. .Qin(),
  13906. .Clk(),
  13907. .AsyncReset(),
  13908. .SyncReset(),
  13909. .ShiftData(),
  13910. .SyncLoad(),
  13911. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  13912. .Cout(),
  13913. .Q());
  13914. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_x = 6;
  13915. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_y = 4;
  13916. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_z = 2;
  13917. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .mask = 16'h35C0;
  13918. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .modeMux = 1'b0;
  13919. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .FeedbackMux = 1'b0;
  13920. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .ShiftMux = 1'b0;
  13921. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .BypassEn = 1'b0;
  13922. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .CarryEnb = 1'b1;
  13923. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] (
  13924. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  13925. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  13926. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  13927. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13928. .Cin(),
  13929. .Qin(),
  13930. .Clk(),
  13931. .AsyncReset(),
  13932. .SyncReset(),
  13933. .ShiftData(),
  13934. .SyncLoad(),
  13935. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  13936. .Cout(),
  13937. .Q());
  13938. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_x = 6;
  13939. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_y = 2;
  13940. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_z = 4;
  13941. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .mask = 16'h1E78;
  13942. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .modeMux = 1'b0;
  13943. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .FeedbackMux = 1'b0;
  13944. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .ShiftMux = 1'b0;
  13945. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .BypassEn = 1'b0;
  13946. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .CarryEnb = 1'b1;
  13947. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] (
  13948. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  13949. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  13950. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  13951. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13952. .Cin(),
  13953. .Qin(),
  13954. .Clk(),
  13955. .AsyncReset(),
  13956. .SyncReset(),
  13957. .ShiftData(),
  13958. .SyncLoad(),
  13959. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  13960. .Cout(),
  13961. .Q());
  13962. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_x = 6;
  13963. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_y = 4;
  13964. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_z = 6;
  13965. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .mask = 16'h52B0;
  13966. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .modeMux = 1'b0;
  13967. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .FeedbackMux = 1'b0;
  13968. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .ShiftMux = 1'b0;
  13969. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .BypassEn = 1'b0;
  13970. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .CarryEnb = 1'b1;
  13971. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] (
  13972. .A(vcc),
  13973. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  13974. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  13975. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  13976. .Cin(),
  13977. .Qin(),
  13978. .Clk(),
  13979. .AsyncReset(),
  13980. .SyncReset(),
  13981. .ShiftData(),
  13982. .SyncLoad(),
  13983. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  13984. .Cout(),
  13985. .Q());
  13986. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_x = 10;
  13987. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_y = 3;
  13988. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_z = 13;
  13989. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .mask = 16'h3CF0;
  13990. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .modeMux = 1'b0;
  13991. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .FeedbackMux = 1'b0;
  13992. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .ShiftMux = 1'b0;
  13993. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .BypassEn = 1'b0;
  13994. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .CarryEnb = 1'b1;
  13995. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] (
  13996. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  13997. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  13998. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  13999. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14000. .Cin(),
  14001. .Qin(),
  14002. .Clk(),
  14003. .AsyncReset(),
  14004. .SyncReset(),
  14005. .ShiftData(),
  14006. .SyncLoad(),
  14007. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  14008. .Cout(),
  14009. .Q());
  14010. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_x = 6;
  14011. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_y = 2;
  14012. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_z = 6;
  14013. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .mask = 16'h1DC0;
  14014. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .modeMux = 1'b0;
  14015. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .FeedbackMux = 1'b0;
  14016. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .ShiftMux = 1'b0;
  14017. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .BypassEn = 1'b0;
  14018. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .CarryEnb = 1'b1;
  14019. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] (
  14020. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14021. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14022. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14023. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14024. .Cin(),
  14025. .Qin(),
  14026. .Clk(),
  14027. .AsyncReset(),
  14028. .SyncReset(),
  14029. .ShiftData(),
  14030. .SyncLoad(),
  14031. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  14032. .Cout(),
  14033. .Q());
  14034. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_x = 7;
  14035. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_y = 2;
  14036. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_z = 0;
  14037. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .mask = 16'h268C;
  14038. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .modeMux = 1'b0;
  14039. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .FeedbackMux = 1'b0;
  14040. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .ShiftMux = 1'b0;
  14041. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .BypassEn = 1'b0;
  14042. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .CarryEnb = 1'b1;
  14043. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] (
  14044. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14045. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14046. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14047. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14048. .Cin(),
  14049. .Qin(),
  14050. .Clk(),
  14051. .AsyncReset(),
  14052. .SyncReset(),
  14053. .ShiftData(),
  14054. .SyncLoad(),
  14055. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  14056. .Cout(),
  14057. .Q());
  14058. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_x = 7;
  14059. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_y = 2;
  14060. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_z = 1;
  14061. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .mask = 16'h606C;
  14062. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .modeMux = 1'b0;
  14063. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .FeedbackMux = 1'b0;
  14064. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .ShiftMux = 1'b0;
  14065. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .BypassEn = 1'b0;
  14066. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .CarryEnb = 1'b1;
  14067. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] (
  14068. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14069. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14070. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14071. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14072. .Cin(),
  14073. .Qin(),
  14074. .Clk(),
  14075. .AsyncReset(),
  14076. .SyncReset(),
  14077. .ShiftData(),
  14078. .SyncLoad(),
  14079. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  14080. .Cout(),
  14081. .Q());
  14082. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_x = 6;
  14083. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_y = 4;
  14084. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_z = 15;
  14085. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .mask = 16'h35C0;
  14086. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .modeMux = 1'b0;
  14087. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .FeedbackMux = 1'b0;
  14088. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .ShiftMux = 1'b0;
  14089. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .BypassEn = 1'b0;
  14090. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .CarryEnb = 1'b1;
  14091. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] (
  14092. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14093. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14094. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14095. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14096. .Cin(),
  14097. .Qin(),
  14098. .Clk(),
  14099. .AsyncReset(),
  14100. .SyncReset(),
  14101. .ShiftData(),
  14102. .SyncLoad(),
  14103. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  14104. .Cout(),
  14105. .Q());
  14106. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_x = 6;
  14107. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_y = 4;
  14108. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_z = 7;
  14109. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .mask = 16'h53A0;
  14110. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .modeMux = 1'b0;
  14111. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .FeedbackMux = 1'b0;
  14112. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .ShiftMux = 1'b0;
  14113. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .BypassEn = 1'b0;
  14114. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .CarryEnb = 1'b1;
  14115. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] (
  14116. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14117. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14118. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14119. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14120. .Cin(),
  14121. .Qin(),
  14122. .Clk(),
  14123. .AsyncReset(),
  14124. .SyncReset(),
  14125. .ShiftData(),
  14126. .SyncLoad(),
  14127. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  14128. .Cout(),
  14129. .Q());
  14130. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_x = 6;
  14131. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_y = 4;
  14132. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_z = 12;
  14133. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .mask = 16'h34C4;
  14134. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .modeMux = 1'b0;
  14135. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .FeedbackMux = 1'b0;
  14136. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .ShiftMux = 1'b0;
  14137. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .BypassEn = 1'b0;
  14138. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .CarryEnb = 1'b1;
  14139. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] (
  14140. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14141. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14142. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14143. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14144. .Cin(),
  14145. .Qin(),
  14146. .Clk(),
  14147. .AsyncReset(),
  14148. .SyncReset(),
  14149. .ShiftData(),
  14150. .SyncLoad(),
  14151. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  14152. .Cout(),
  14153. .Q());
  14154. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_x = 7;
  14155. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_y = 4;
  14156. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_z = 1;
  14157. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .mask = 16'h4878;
  14158. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .modeMux = 1'b0;
  14159. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .FeedbackMux = 1'b0;
  14160. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .ShiftMux = 1'b0;
  14161. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .BypassEn = 1'b0;
  14162. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .CarryEnb = 1'b1;
  14163. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] (
  14164. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14165. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14166. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14167. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14168. .Cin(),
  14169. .Qin(),
  14170. .Clk(),
  14171. .AsyncReset(),
  14172. .SyncReset(),
  14173. .ShiftData(),
  14174. .SyncLoad(),
  14175. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  14176. .Cout(),
  14177. .Q());
  14178. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_x = 7;
  14179. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_y = 4;
  14180. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_z = 2;
  14181. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .mask = 16'h3C50;
  14182. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .modeMux = 1'b0;
  14183. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .FeedbackMux = 1'b0;
  14184. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .ShiftMux = 1'b0;
  14185. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .BypassEn = 1'b0;
  14186. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .CarryEnb = 1'b1;
  14187. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] (
  14188. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  14189. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14190. .C(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14191. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  14192. .Cin(),
  14193. .Qin(),
  14194. .Clk(),
  14195. .AsyncReset(),
  14196. .SyncReset(),
  14197. .ShiftData(),
  14198. .SyncLoad(),
  14199. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  14200. .Cout(),
  14201. .Q());
  14202. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_x = 7;
  14203. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_y = 4;
  14204. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_z = 0;
  14205. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .mask = 16'h5A22;
  14206. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .modeMux = 1'b0;
  14207. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .FeedbackMux = 1'b0;
  14208. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .ShiftMux = 1'b0;
  14209. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .BypassEn = 1'b0;
  14210. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .CarryEnb = 1'b1;
  14211. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] (
  14212. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  14213. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  14214. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  14215. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14216. .Cin(),
  14217. .Qin(),
  14218. .Clk(),
  14219. .AsyncReset(),
  14220. .SyncReset(),
  14221. .ShiftData(),
  14222. .SyncLoad(),
  14223. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  14224. .Cout(),
  14225. .Q());
  14226. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_x = 10;
  14227. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_y = 1;
  14228. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_z = 11;
  14229. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .mask = 16'h1E78;
  14230. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .modeMux = 1'b0;
  14231. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .FeedbackMux = 1'b0;
  14232. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .ShiftMux = 1'b0;
  14233. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .BypassEn = 1'b0;
  14234. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .CarryEnb = 1'b1;
  14235. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] (
  14236. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  14237. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  14238. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  14239. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14240. .Cin(),
  14241. .Qin(),
  14242. .Clk(),
  14243. .AsyncReset(),
  14244. .SyncReset(),
  14245. .ShiftData(),
  14246. .SyncLoad(),
  14247. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  14248. .Cout(),
  14249. .Q());
  14250. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_x = 8;
  14251. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_y = 3;
  14252. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_z = 5;
  14253. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .mask = 16'h486C;
  14254. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .modeMux = 1'b0;
  14255. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .FeedbackMux = 1'b0;
  14256. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .ShiftMux = 1'b0;
  14257. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .BypassEn = 1'b0;
  14258. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .CarryEnb = 1'b1;
  14259. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] (
  14260. .A(vcc),
  14261. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  14262. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  14263. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  14264. .Cin(),
  14265. .Qin(),
  14266. .Clk(),
  14267. .AsyncReset(),
  14268. .SyncReset(),
  14269. .ShiftData(),
  14270. .SyncLoad(),
  14271. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14272. .Cout(),
  14273. .Q());
  14274. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_x = 12;
  14275. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_y = 3;
  14276. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_z = 12;
  14277. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .mask = 16'h3CF0;
  14278. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .modeMux = 1'b0;
  14279. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .FeedbackMux = 1'b0;
  14280. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .ShiftMux = 1'b0;
  14281. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .BypassEn = 1'b0;
  14282. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .CarryEnb = 1'b1;
  14283. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] (
  14284. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14285. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14286. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14287. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14288. .Cin(),
  14289. .Qin(),
  14290. .Clk(),
  14291. .AsyncReset(),
  14292. .SyncReset(),
  14293. .ShiftData(),
  14294. .SyncLoad(),
  14295. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  14296. .Cout(),
  14297. .Q());
  14298. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_x = 7;
  14299. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_y = 2;
  14300. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_z = 3;
  14301. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .mask = 16'h1CD0;
  14302. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .modeMux = 1'b0;
  14303. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .FeedbackMux = 1'b0;
  14304. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .ShiftMux = 1'b0;
  14305. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .BypassEn = 1'b0;
  14306. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .CarryEnb = 1'b1;
  14307. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] (
  14308. .A(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14309. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14310. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14311. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14312. .Cin(),
  14313. .Qin(),
  14314. .Clk(),
  14315. .AsyncReset(),
  14316. .SyncReset(),
  14317. .ShiftData(),
  14318. .SyncLoad(),
  14319. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  14320. .Cout(),
  14321. .Q());
  14322. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_x = 5;
  14323. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_y = 1;
  14324. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_z = 0;
  14325. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .mask = 16'h34C4;
  14326. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .modeMux = 1'b0;
  14327. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .FeedbackMux = 1'b0;
  14328. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .ShiftMux = 1'b0;
  14329. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .BypassEn = 1'b0;
  14330. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .CarryEnb = 1'b1;
  14331. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] (
  14332. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14333. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14334. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14335. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14336. .Cin(),
  14337. .Qin(),
  14338. .Clk(),
  14339. .AsyncReset(),
  14340. .SyncReset(),
  14341. .ShiftData(),
  14342. .SyncLoad(),
  14343. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  14344. .Cout(),
  14345. .Q());
  14346. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_x = 5;
  14347. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_y = 1;
  14348. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_z = 1;
  14349. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .mask = 16'h34C4;
  14350. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .modeMux = 1'b0;
  14351. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .FeedbackMux = 1'b0;
  14352. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .ShiftMux = 1'b0;
  14353. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .BypassEn = 1'b0;
  14354. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .CarryEnb = 1'b1;
  14355. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] (
  14356. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14357. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14358. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14359. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14360. .Cin(),
  14361. .Qin(),
  14362. .Clk(),
  14363. .AsyncReset(),
  14364. .SyncReset(),
  14365. .ShiftData(),
  14366. .SyncLoad(),
  14367. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  14368. .Cout(),
  14369. .Q());
  14370. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_x = 10;
  14371. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_y = 1;
  14372. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_z = 8;
  14373. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .mask = 16'h2878;
  14374. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .modeMux = 1'b0;
  14375. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .FeedbackMux = 1'b0;
  14376. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .ShiftMux = 1'b0;
  14377. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .BypassEn = 1'b0;
  14378. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .CarryEnb = 1'b1;
  14379. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] (
  14380. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14381. .B(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14382. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14383. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14384. .Cin(),
  14385. .Qin(),
  14386. .Clk(),
  14387. .AsyncReset(),
  14388. .SyncReset(),
  14389. .ShiftData(),
  14390. .SyncLoad(),
  14391. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  14392. .Cout(),
  14393. .Q());
  14394. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_x = 10;
  14395. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_y = 1;
  14396. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_z = 13;
  14397. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .mask = 16'h606A;
  14398. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .modeMux = 1'b0;
  14399. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .FeedbackMux = 1'b0;
  14400. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .ShiftMux = 1'b0;
  14401. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .BypassEn = 1'b0;
  14402. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .CarryEnb = 1'b1;
  14403. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] (
  14404. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14405. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14406. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14407. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14408. .Cin(),
  14409. .Qin(),
  14410. .Clk(),
  14411. .AsyncReset(),
  14412. .SyncReset(),
  14413. .ShiftData(),
  14414. .SyncLoad(),
  14415. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  14416. .Cout(),
  14417. .Q());
  14418. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_x = 11;
  14419. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_y = 1;
  14420. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_z = 12;
  14421. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .mask = 16'h486A;
  14422. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .modeMux = 1'b0;
  14423. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .FeedbackMux = 1'b0;
  14424. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .ShiftMux = 1'b0;
  14425. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .BypassEn = 1'b0;
  14426. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .CarryEnb = 1'b1;
  14427. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] (
  14428. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14429. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14430. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14431. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14432. .Cin(),
  14433. .Qin(),
  14434. .Clk(),
  14435. .AsyncReset(),
  14436. .SyncReset(),
  14437. .ShiftData(),
  14438. .SyncLoad(),
  14439. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  14440. .Cout(),
  14441. .Q());
  14442. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_x = 7;
  14443. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_y = 4;
  14444. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_z = 14;
  14445. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .mask = 16'h606C;
  14446. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .modeMux = 1'b0;
  14447. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .FeedbackMux = 1'b0;
  14448. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .ShiftMux = 1'b0;
  14449. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .BypassEn = 1'b0;
  14450. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .CarryEnb = 1'b1;
  14451. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] (
  14452. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14453. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14454. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14455. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14456. .Cin(),
  14457. .Qin(),
  14458. .Clk(),
  14459. .AsyncReset(),
  14460. .SyncReset(),
  14461. .ShiftData(),
  14462. .SyncLoad(),
  14463. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  14464. .Cout(),
  14465. .Q());
  14466. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_x = 7;
  14467. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_y = 4;
  14468. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_z = 15;
  14469. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .mask = 16'h35C0;
  14470. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .modeMux = 1'b0;
  14471. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .FeedbackMux = 1'b0;
  14472. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .ShiftMux = 1'b0;
  14473. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .BypassEn = 1'b0;
  14474. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .CarryEnb = 1'b1;
  14475. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] (
  14476. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14477. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14478. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  14479. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  14480. .Cin(),
  14481. .Qin(),
  14482. .Clk(),
  14483. .AsyncReset(),
  14484. .SyncReset(),
  14485. .ShiftData(),
  14486. .SyncLoad(),
  14487. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  14488. .Cout(),
  14489. .Q());
  14490. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_x = 7;
  14491. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_y = 4;
  14492. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_z = 13;
  14493. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .mask = 16'h53A0;
  14494. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .modeMux = 1'b0;
  14495. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .FeedbackMux = 1'b0;
  14496. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .ShiftMux = 1'b0;
  14497. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .BypassEn = 1'b0;
  14498. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .CarryEnb = 1'b1;
  14499. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] (
  14500. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  14501. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  14502. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14503. .D(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  14504. .Cin(),
  14505. .Qin(),
  14506. .Clk(),
  14507. .AsyncReset(),
  14508. .SyncReset(),
  14509. .ShiftData(),
  14510. .SyncLoad(),
  14511. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  14512. .Cout(),
  14513. .Q());
  14514. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_x = 7;
  14515. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_y = 3;
  14516. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_z = 14;
  14517. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .mask = 16'h366C;
  14518. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .modeMux = 1'b0;
  14519. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .FeedbackMux = 1'b0;
  14520. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .ShiftMux = 1'b0;
  14521. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .BypassEn = 1'b0;
  14522. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .CarryEnb = 1'b1;
  14523. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] (
  14524. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  14525. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14526. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  14527. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  14528. .Cin(),
  14529. .Qin(),
  14530. .Clk(),
  14531. .AsyncReset(),
  14532. .SyncReset(),
  14533. .ShiftData(),
  14534. .SyncLoad(),
  14535. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  14536. .Cout(),
  14537. .Q());
  14538. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_x = 12;
  14539. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_y = 4;
  14540. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_z = 9;
  14541. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .mask = 16'h5B20;
  14542. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .modeMux = 1'b0;
  14543. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .FeedbackMux = 1'b0;
  14544. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .ShiftMux = 1'b0;
  14545. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .BypassEn = 1'b0;
  14546. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .CarryEnb = 1'b1;
  14547. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] (
  14548. .A(vcc),
  14549. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  14550. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  14551. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  14552. .Cin(),
  14553. .Qin(),
  14554. .Clk(),
  14555. .AsyncReset(),
  14556. .SyncReset(),
  14557. .ShiftData(),
  14558. .SyncLoad(),
  14559. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14560. .Cout(),
  14561. .Q());
  14562. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_x = 12;
  14563. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_y = 4;
  14564. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_z = 5;
  14565. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .mask = 16'h3FC0;
  14566. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .modeMux = 1'b0;
  14567. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .FeedbackMux = 1'b0;
  14568. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .ShiftMux = 1'b0;
  14569. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .BypassEn = 1'b0;
  14570. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .CarryEnb = 1'b1;
  14571. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] (
  14572. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14573. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14574. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14575. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14576. .Cin(),
  14577. .Qin(),
  14578. .Clk(),
  14579. .AsyncReset(),
  14580. .SyncReset(),
  14581. .ShiftData(),
  14582. .SyncLoad(),
  14583. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  14584. .Cout(),
  14585. .Q());
  14586. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_x = 6;
  14587. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_y = 1;
  14588. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_z = 12;
  14589. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .mask = 16'h268C;
  14590. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .modeMux = 1'b0;
  14591. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .FeedbackMux = 1'b0;
  14592. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .ShiftMux = 1'b0;
  14593. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .BypassEn = 1'b0;
  14594. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .CarryEnb = 1'b1;
  14595. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] (
  14596. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14597. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14598. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14599. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14600. .Cin(),
  14601. .Qin(),
  14602. .Clk(),
  14603. .AsyncReset(),
  14604. .SyncReset(),
  14605. .ShiftData(),
  14606. .SyncLoad(),
  14607. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  14608. .Cout(),
  14609. .Q());
  14610. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_x = 6;
  14611. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_y = 1;
  14612. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_z = 11;
  14613. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .mask = 16'h606C;
  14614. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .modeMux = 1'b0;
  14615. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .FeedbackMux = 1'b0;
  14616. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .ShiftMux = 1'b0;
  14617. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .BypassEn = 1'b0;
  14618. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .CarryEnb = 1'b1;
  14619. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] (
  14620. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14621. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14622. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14623. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14624. .Cin(),
  14625. .Qin(),
  14626. .Clk(),
  14627. .AsyncReset(),
  14628. .SyncReset(),
  14629. .ShiftData(),
  14630. .SyncLoad(),
  14631. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  14632. .Cout(),
  14633. .Q());
  14634. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_x = 6;
  14635. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_y = 1;
  14636. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_z = 14;
  14637. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .mask = 16'h34C4;
  14638. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .modeMux = 1'b0;
  14639. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .FeedbackMux = 1'b0;
  14640. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .ShiftMux = 1'b0;
  14641. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .BypassEn = 1'b0;
  14642. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .CarryEnb = 1'b1;
  14643. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] (
  14644. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14645. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14646. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14647. .D(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14648. .Cin(),
  14649. .Qin(),
  14650. .Clk(),
  14651. .AsyncReset(),
  14652. .SyncReset(),
  14653. .ShiftData(),
  14654. .SyncLoad(),
  14655. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  14656. .Cout(),
  14657. .Q());
  14658. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_x = 6;
  14659. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_y = 1;
  14660. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_z = 15;
  14661. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .mask = 16'h606C;
  14662. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .modeMux = 1'b0;
  14663. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .FeedbackMux = 1'b0;
  14664. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .ShiftMux = 1'b0;
  14665. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .BypassEn = 1'b0;
  14666. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .CarryEnb = 1'b1;
  14667. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] (
  14668. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14669. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14670. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14671. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14672. .Cin(),
  14673. .Qin(),
  14674. .Clk(),
  14675. .AsyncReset(),
  14676. .SyncReset(),
  14677. .ShiftData(),
  14678. .SyncLoad(),
  14679. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  14680. .Cout(),
  14681. .Q());
  14682. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_x = 6;
  14683. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_y = 1;
  14684. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_z = 10;
  14685. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .mask = 16'h34C4;
  14686. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .modeMux = 1'b0;
  14687. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .FeedbackMux = 1'b0;
  14688. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .ShiftMux = 1'b0;
  14689. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .BypassEn = 1'b0;
  14690. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .CarryEnb = 1'b1;
  14691. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] (
  14692. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14693. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14694. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14695. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14696. .Cin(),
  14697. .Qin(),
  14698. .Clk(),
  14699. .AsyncReset(),
  14700. .SyncReset(),
  14701. .ShiftData(),
  14702. .SyncLoad(),
  14703. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  14704. .Cout(),
  14705. .Q());
  14706. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_x = 6;
  14707. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_y = 1;
  14708. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_z = 13;
  14709. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .mask = 16'h34C4;
  14710. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .modeMux = 1'b0;
  14711. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .FeedbackMux = 1'b0;
  14712. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .ShiftMux = 1'b0;
  14713. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .BypassEn = 1'b0;
  14714. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .CarryEnb = 1'b1;
  14715. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] (
  14716. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14717. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14718. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14719. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14720. .Cin(),
  14721. .Qin(),
  14722. .Clk(),
  14723. .AsyncReset(),
  14724. .SyncReset(),
  14725. .ShiftData(),
  14726. .SyncLoad(),
  14727. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  14728. .Cout(),
  14729. .Q());
  14730. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_x = 6;
  14731. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_y = 4;
  14732. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_z = 5;
  14733. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .mask = 16'h4878;
  14734. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .modeMux = 1'b0;
  14735. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .FeedbackMux = 1'b0;
  14736. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .ShiftMux = 1'b0;
  14737. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .BypassEn = 1'b0;
  14738. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .CarryEnb = 1'b1;
  14739. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] (
  14740. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14741. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14742. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14743. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14744. .Cin(),
  14745. .Qin(),
  14746. .Clk(),
  14747. .AsyncReset(),
  14748. .SyncReset(),
  14749. .ShiftData(),
  14750. .SyncLoad(),
  14751. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  14752. .Cout(),
  14753. .Q());
  14754. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_x = 6;
  14755. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_y = 4;
  14756. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_z = 11;
  14757. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .mask = 16'h3C50;
  14758. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .modeMux = 1'b0;
  14759. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .FeedbackMux = 1'b0;
  14760. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .ShiftMux = 1'b0;
  14761. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .BypassEn = 1'b0;
  14762. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .CarryEnb = 1'b1;
  14763. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] (
  14764. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14765. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  14766. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  14767. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  14768. .Cin(),
  14769. .Qin(),
  14770. .Clk(),
  14771. .AsyncReset(),
  14772. .SyncReset(),
  14773. .ShiftData(),
  14774. .SyncLoad(),
  14775. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  14776. .Cout(),
  14777. .Q());
  14778. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_x = 7;
  14779. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_y = 1;
  14780. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_z = 9;
  14781. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .mask = 16'h5A30;
  14782. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .modeMux = 1'b0;
  14783. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .FeedbackMux = 1'b0;
  14784. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .ShiftMux = 1'b0;
  14785. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .BypassEn = 1'b0;
  14786. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .CarryEnb = 1'b1;
  14787. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] (
  14788. .A(vcc),
  14789. .B(vcc),
  14790. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14791. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14792. .Cin(),
  14793. .Qin(),
  14794. .Clk(),
  14795. .AsyncReset(),
  14796. .SyncReset(),
  14797. .ShiftData(),
  14798. .SyncLoad(),
  14799. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  14800. .Cout(),
  14801. .Q());
  14802. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_x = 7;
  14803. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_y = 2;
  14804. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_z = 2;
  14805. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .mask = 16'hF000;
  14806. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .modeMux = 1'b0;
  14807. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .FeedbackMux = 1'b0;
  14808. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .ShiftMux = 1'b0;
  14809. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .BypassEn = 1'b0;
  14810. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .CarryEnb = 1'b1;
  14811. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] (
  14812. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14813. .B(vcc),
  14814. .C(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  14815. .D(vcc),
  14816. .Cin(),
  14817. .Qin(),
  14818. .Clk(),
  14819. .AsyncReset(),
  14820. .SyncReset(),
  14821. .ShiftData(),
  14822. .SyncLoad(),
  14823. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  14824. .Cout(),
  14825. .Q());
  14826. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_x = 7;
  14827. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_y = 1;
  14828. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_z = 10;
  14829. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .mask = 16'hA0A0;
  14830. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .modeMux = 1'b0;
  14831. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .FeedbackMux = 1'b0;
  14832. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .ShiftMux = 1'b0;
  14833. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .BypassEn = 1'b0;
  14834. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .CarryEnb = 1'b1;
  14835. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] (
  14836. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14837. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14838. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  14839. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14840. .Cin(),
  14841. .Qin(),
  14842. .Clk(),
  14843. .AsyncReset(),
  14844. .SyncReset(),
  14845. .ShiftData(),
  14846. .SyncLoad(),
  14847. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  14848. .Cout(),
  14849. .Q());
  14850. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_x = 7;
  14851. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_y = 2;
  14852. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_z = 7;
  14853. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .mask = 16'hECA0;
  14854. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .modeMux = 1'b0;
  14855. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .FeedbackMux = 1'b0;
  14856. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .ShiftMux = 1'b0;
  14857. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .BypassEn = 1'b0;
  14858. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .CarryEnb = 1'b1;
  14859. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] (
  14860. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14861. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14862. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14863. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  14864. .Cin(),
  14865. .Qin(),
  14866. .Clk(),
  14867. .AsyncReset(),
  14868. .SyncReset(),
  14869. .ShiftData(),
  14870. .SyncLoad(),
  14871. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  14872. .Cout(),
  14873. .Q());
  14874. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_x = 7;
  14875. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_y = 3;
  14876. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_z = 0;
  14877. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .mask = 16'hF888;
  14878. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .modeMux = 1'b0;
  14879. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .FeedbackMux = 1'b0;
  14880. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .ShiftMux = 1'b0;
  14881. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .BypassEn = 1'b0;
  14882. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .CarryEnb = 1'b1;
  14883. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] (
  14884. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  14885. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14886. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14887. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14888. .Cin(),
  14889. .Qin(),
  14890. .Clk(),
  14891. .AsyncReset(),
  14892. .SyncReset(),
  14893. .ShiftData(),
  14894. .SyncLoad(),
  14895. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  14896. .Cout(),
  14897. .Q());
  14898. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_x = 11;
  14899. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_y = 1;
  14900. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_z = 13;
  14901. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .mask = 16'hECA0;
  14902. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .modeMux = 1'b0;
  14903. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .FeedbackMux = 1'b0;
  14904. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .ShiftMux = 1'b0;
  14905. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .BypassEn = 1'b0;
  14906. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .CarryEnb = 1'b1;
  14907. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] (
  14908. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14909. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  14910. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14911. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14912. .Cin(),
  14913. .Qin(),
  14914. .Clk(),
  14915. .AsyncReset(),
  14916. .SyncReset(),
  14917. .ShiftData(),
  14918. .SyncLoad(),
  14919. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  14920. .Cout(),
  14921. .Q());
  14922. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_x = 7;
  14923. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_y = 1;
  14924. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_z = 11;
  14925. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .mask = 16'hF888;
  14926. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .modeMux = 1'b0;
  14927. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .FeedbackMux = 1'b0;
  14928. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .ShiftMux = 1'b0;
  14929. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .BypassEn = 1'b0;
  14930. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .CarryEnb = 1'b1;
  14931. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] (
  14932. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14933. .B(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  14934. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14935. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14936. .Cin(),
  14937. .Qin(),
  14938. .Clk(),
  14939. .AsyncReset(),
  14940. .SyncReset(),
  14941. .ShiftData(),
  14942. .SyncLoad(),
  14943. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  14944. .Cout(),
  14945. .Q());
  14946. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_x = 7;
  14947. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_y = 1;
  14948. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_z = 15;
  14949. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .mask = 16'hEAC0;
  14950. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .modeMux = 1'b0;
  14951. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .FeedbackMux = 1'b0;
  14952. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .ShiftMux = 1'b0;
  14953. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .BypassEn = 1'b0;
  14954. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .CarryEnb = 1'b1;
  14955. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] (
  14956. .A(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14957. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14958. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14959. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  14960. .Cin(),
  14961. .Qin(),
  14962. .Clk(),
  14963. .AsyncReset(),
  14964. .SyncReset(),
  14965. .ShiftData(),
  14966. .SyncLoad(),
  14967. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  14968. .Cout(),
  14969. .Q());
  14970. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_x = 11;
  14971. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_y = 1;
  14972. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_z = 10;
  14973. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .mask = 16'hF888;
  14974. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .modeMux = 1'b0;
  14975. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .FeedbackMux = 1'b0;
  14976. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .ShiftMux = 1'b0;
  14977. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .BypassEn = 1'b0;
  14978. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .CarryEnb = 1'b1;
  14979. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] (
  14980. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  14981. .B(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  14982. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  14983. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  14984. .Cin(),
  14985. .Qin(),
  14986. .Clk(),
  14987. .AsyncReset(),
  14988. .SyncReset(),
  14989. .ShiftData(),
  14990. .SyncLoad(),
  14991. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  14992. .Cout(),
  14993. .Q());
  14994. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_x = 7;
  14995. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_y = 3;
  14996. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_z = 1;
  14997. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .mask = 16'hF888;
  14998. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .modeMux = 1'b0;
  14999. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .FeedbackMux = 1'b0;
  15000. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .ShiftMux = 1'b0;
  15001. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .BypassEn = 1'b0;
  15002. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .CarryEnb = 1'b1;
  15003. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] (
  15004. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  15005. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  15006. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  15007. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  15008. .Cin(),
  15009. .Qin(),
  15010. .Clk(),
  15011. .AsyncReset(),
  15012. .SyncReset(),
  15013. .ShiftData(),
  15014. .SyncLoad(),
  15015. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  15016. .Cout(),
  15017. .Q());
  15018. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_x = 7;
  15019. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_y = 3;
  15020. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_z = 12;
  15021. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .mask = 16'hF888;
  15022. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .modeMux = 1'b0;
  15023. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .FeedbackMux = 1'b0;
  15024. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .ShiftMux = 1'b0;
  15025. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .BypassEn = 1'b0;
  15026. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .CarryEnb = 1'b1;
  15027. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] (
  15028. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  15029. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  15030. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  15031. .D(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  15032. .Cin(),
  15033. .Qin(),
  15034. .Clk(),
  15035. .AsyncReset(),
  15036. .SyncReset(),
  15037. .ShiftData(),
  15038. .SyncLoad(),
  15039. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  15040. .Cout(),
  15041. .Q());
  15042. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_x = 7;
  15043. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_y = 1;
  15044. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_z = 12;
  15045. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .mask = 16'hEAC0;
  15046. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .modeMux = 1'b0;
  15047. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .FeedbackMux = 1'b0;
  15048. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .ShiftMux = 1'b0;
  15049. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .BypassEn = 1'b0;
  15050. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .CarryEnb = 1'b1;
  15051. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 (
  15052. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  15053. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  15054. .C(vcc),
  15055. .D(vcc),
  15056. .Cin(),
  15057. .Qin(),
  15058. .Clk(),
  15059. .AsyncReset(),
  15060. .SyncReset(),
  15061. .ShiftData(),
  15062. .SyncLoad(),
  15063. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0_combout ),
  15064. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 ),
  15065. .Q());
  15066. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .coord_x = 7;
  15067. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .coord_y = 2;
  15068. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .coord_z = 8;
  15069. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .mask = 16'h6688;
  15070. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .modeMux = 1'b0;
  15071. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .FeedbackMux = 1'b0;
  15072. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .ShiftMux = 1'b0;
  15073. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .BypassEn = 1'b0;
  15074. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0 .CarryEnb = 1'b0;
  15075. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 (
  15076. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[1]~2_combout ),
  15077. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  15078. .C(vcc),
  15079. .D(vcc),
  15080. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 ),
  15081. .Qin(),
  15082. .Clk(),
  15083. .AsyncReset(),
  15084. .SyncReset(),
  15085. .ShiftData(),
  15086. .SyncLoad(),
  15087. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10_combout ),
  15088. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 ),
  15089. .Q());
  15090. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .coord_x = 7;
  15091. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .coord_y = 2;
  15092. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .coord_z = 13;
  15093. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .mask = 16'h9617;
  15094. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .modeMux = 1'b1;
  15095. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .FeedbackMux = 1'b0;
  15096. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .ShiftMux = 1'b0;
  15097. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .BypassEn = 1'b0;
  15098. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10 .CarryEnb = 1'b0;
  15099. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 (
  15100. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  15101. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[2]~4_combout ),
  15102. .C(vcc),
  15103. .D(vcc),
  15104. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 ),
  15105. .Qin(),
  15106. .Clk(),
  15107. .AsyncReset(),
  15108. .SyncReset(),
  15109. .ShiftData(),
  15110. .SyncLoad(),
  15111. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12_combout ),
  15112. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 ),
  15113. .Q());
  15114. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .coord_x = 7;
  15115. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .coord_y = 2;
  15116. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .coord_z = 14;
  15117. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .mask = 16'h698E;
  15118. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .modeMux = 1'b1;
  15119. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .FeedbackMux = 1'b0;
  15120. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .ShiftMux = 1'b0;
  15121. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .BypassEn = 1'b0;
  15122. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12 .CarryEnb = 1'b0;
  15123. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 (
  15124. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  15125. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[3]~6_combout ),
  15126. .C(vcc),
  15127. .D(vcc),
  15128. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 ),
  15129. .Qin(),
  15130. .Clk(),
  15131. .AsyncReset(),
  15132. .SyncReset(),
  15133. .ShiftData(),
  15134. .SyncLoad(),
  15135. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14_combout ),
  15136. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 ),
  15137. .Q());
  15138. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .coord_x = 7;
  15139. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .coord_y = 2;
  15140. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .coord_z = 15;
  15141. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .mask = 16'h9617;
  15142. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .modeMux = 1'b1;
  15143. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .FeedbackMux = 1'b0;
  15144. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .ShiftMux = 1'b0;
  15145. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .BypassEn = 1'b0;
  15146. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14 .CarryEnb = 1'b0;
  15147. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 (
  15148. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[4]~8_combout ),
  15149. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  15150. .C(vcc),
  15151. .D(vcc),
  15152. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 ),
  15153. .Qin(),
  15154. .Clk(),
  15155. .AsyncReset(),
  15156. .SyncReset(),
  15157. .ShiftData(),
  15158. .SyncLoad(),
  15159. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16_combout ),
  15160. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 ),
  15161. .Q());
  15162. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .coord_x = 7;
  15163. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .coord_y = 1;
  15164. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .coord_z = 0;
  15165. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .mask = 16'h698E;
  15166. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .modeMux = 1'b1;
  15167. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .FeedbackMux = 1'b0;
  15168. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .ShiftMux = 1'b0;
  15169. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .BypassEn = 1'b0;
  15170. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16 .CarryEnb = 1'b0;
  15171. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 (
  15172. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[5]~10_combout ),
  15173. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  15174. .C(vcc),
  15175. .D(vcc),
  15176. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 ),
  15177. .Qin(),
  15178. .Clk(),
  15179. .AsyncReset(),
  15180. .SyncReset(),
  15181. .ShiftData(),
  15182. .SyncLoad(),
  15183. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18_combout ),
  15184. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 ),
  15185. .Q());
  15186. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .coord_x = 7;
  15187. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .coord_y = 1;
  15188. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .coord_z = 1;
  15189. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .mask = 16'h9617;
  15190. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .modeMux = 1'b1;
  15191. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .FeedbackMux = 1'b0;
  15192. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .ShiftMux = 1'b0;
  15193. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .BypassEn = 1'b0;
  15194. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18 .CarryEnb = 1'b0;
  15195. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 (
  15196. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  15197. .B(vcc),
  15198. .C(vcc),
  15199. .D(vcc),
  15200. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 ),
  15201. .Qin(),
  15202. .Clk(),
  15203. .AsyncReset(),
  15204. .SyncReset(),
  15205. .ShiftData(),
  15206. .SyncLoad(),
  15207. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2_combout ),
  15208. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 ),
  15209. .Q());
  15210. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .coord_x = 7;
  15211. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .coord_y = 2;
  15212. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .coord_z = 9;
  15213. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .mask = 16'h5A5F;
  15214. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .modeMux = 1'b1;
  15215. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .FeedbackMux = 1'b0;
  15216. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .ShiftMux = 1'b0;
  15217. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .BypassEn = 1'b0;
  15218. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2 .CarryEnb = 1'b0;
  15219. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 (
  15220. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[6]~12_combout ),
  15221. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  15222. .C(vcc),
  15223. .D(vcc),
  15224. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 ),
  15225. .Qin(),
  15226. .Clk(),
  15227. .AsyncReset(),
  15228. .SyncReset(),
  15229. .ShiftData(),
  15230. .SyncLoad(),
  15231. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  15232. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  15233. .Q());
  15234. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_x = 7;
  15235. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_y = 1;
  15236. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_z = 2;
  15237. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .mask = 16'h698E;
  15238. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .modeMux = 1'b1;
  15239. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .FeedbackMux = 1'b0;
  15240. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .ShiftMux = 1'b0;
  15241. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .BypassEn = 1'b0;
  15242. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .CarryEnb = 1'b0;
  15243. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 (
  15244. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[7]~14_combout ),
  15245. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  15246. .C(vcc),
  15247. .D(vcc),
  15248. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  15249. .Qin(),
  15250. .Clk(),
  15251. .AsyncReset(),
  15252. .SyncReset(),
  15253. .ShiftData(),
  15254. .SyncLoad(),
  15255. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  15256. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  15257. .Q());
  15258. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_x = 7;
  15259. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_y = 1;
  15260. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_z = 3;
  15261. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .mask = 16'h9617;
  15262. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .modeMux = 1'b1;
  15263. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .FeedbackMux = 1'b0;
  15264. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .ShiftMux = 1'b0;
  15265. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .BypassEn = 1'b0;
  15266. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .CarryEnb = 1'b0;
  15267. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 (
  15268. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[8]~16_combout ),
  15269. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  15270. .C(vcc),
  15271. .D(vcc),
  15272. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  15273. .Qin(),
  15274. .Clk(),
  15275. .AsyncReset(),
  15276. .SyncReset(),
  15277. .ShiftData(),
  15278. .SyncLoad(),
  15279. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  15280. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  15281. .Q());
  15282. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_x = 7;
  15283. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_y = 1;
  15284. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_z = 4;
  15285. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .mask = 16'h698E;
  15286. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .modeMux = 1'b1;
  15287. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .FeedbackMux = 1'b0;
  15288. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .ShiftMux = 1'b0;
  15289. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .BypassEn = 1'b0;
  15290. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .CarryEnb = 1'b0;
  15291. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 (
  15292. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  15293. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  15294. .C(vcc),
  15295. .D(vcc),
  15296. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  15297. .Qin(),
  15298. .Clk(),
  15299. .AsyncReset(),
  15300. .SyncReset(),
  15301. .ShiftData(),
  15302. .SyncLoad(),
  15303. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  15304. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  15305. .Q());
  15306. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_x = 7;
  15307. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_y = 1;
  15308. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_z = 5;
  15309. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .mask = 16'h9617;
  15310. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .modeMux = 1'b1;
  15311. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .FeedbackMux = 1'b0;
  15312. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .ShiftMux = 1'b0;
  15313. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .BypassEn = 1'b0;
  15314. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .CarryEnb = 1'b0;
  15315. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 (
  15316. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  15317. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  15318. .C(vcc),
  15319. .D(vcc),
  15320. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  15321. .Qin(),
  15322. .Clk(),
  15323. .AsyncReset(),
  15324. .SyncReset(),
  15325. .ShiftData(),
  15326. .SyncLoad(),
  15327. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  15328. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  15329. .Q());
  15330. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_x = 7;
  15331. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_y = 1;
  15332. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_z = 6;
  15333. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .mask = 16'h698E;
  15334. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .modeMux = 1'b1;
  15335. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .FeedbackMux = 1'b0;
  15336. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .ShiftMux = 1'b0;
  15337. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .BypassEn = 1'b0;
  15338. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .CarryEnb = 1'b0;
  15339. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 (
  15340. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  15341. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  15342. .C(vcc),
  15343. .D(vcc),
  15344. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  15345. .Qin(),
  15346. .Clk(),
  15347. .AsyncReset(),
  15348. .SyncReset(),
  15349. .ShiftData(),
  15350. .SyncLoad(),
  15351. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  15352. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  15353. .Q());
  15354. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_x = 7;
  15355. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_y = 1;
  15356. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_z = 7;
  15357. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .mask = 16'h694D;
  15358. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .modeMux = 1'b1;
  15359. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .FeedbackMux = 1'b0;
  15360. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .ShiftMux = 1'b0;
  15361. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .BypassEn = 1'b0;
  15362. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .CarryEnb = 1'b0;
  15363. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 (
  15364. .A(vcc),
  15365. .B(vcc),
  15366. .C(vcc),
  15367. .D(vcc),
  15368. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  15369. .Qin(),
  15370. .Clk(),
  15371. .AsyncReset(),
  15372. .SyncReset(),
  15373. .ShiftData(),
  15374. .SyncLoad(),
  15375. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  15376. .Cout(),
  15377. .Q());
  15378. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_x = 7;
  15379. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_y = 1;
  15380. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_z = 8;
  15381. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .mask = 16'hF0F0;
  15382. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .modeMux = 1'b1;
  15383. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .FeedbackMux = 1'b0;
  15384. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .ShiftMux = 1'b0;
  15385. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .BypassEn = 1'b0;
  15386. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .CarryEnb = 1'b1;
  15387. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 (
  15388. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  15389. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  15390. .C(vcc),
  15391. .D(vcc),
  15392. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 ),
  15393. .Qin(),
  15394. .Clk(),
  15395. .AsyncReset(),
  15396. .SyncReset(),
  15397. .ShiftData(),
  15398. .SyncLoad(),
  15399. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4_combout ),
  15400. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 ),
  15401. .Q());
  15402. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .coord_x = 7;
  15403. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .coord_y = 2;
  15404. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .coord_z = 10;
  15405. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .mask = 16'h698E;
  15406. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .modeMux = 1'b1;
  15407. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .FeedbackMux = 1'b0;
  15408. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .ShiftMux = 1'b0;
  15409. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .BypassEn = 1'b0;
  15410. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4 .CarryEnb = 1'b0;
  15411. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 (
  15412. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  15413. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  15414. .C(vcc),
  15415. .D(vcc),
  15416. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 ),
  15417. .Qin(),
  15418. .Clk(),
  15419. .AsyncReset(),
  15420. .SyncReset(),
  15421. .ShiftData(),
  15422. .SyncLoad(),
  15423. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6_combout ),
  15424. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 ),
  15425. .Q());
  15426. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .coord_x = 7;
  15427. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .coord_y = 2;
  15428. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .coord_z = 11;
  15429. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .mask = 16'h9617;
  15430. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .modeMux = 1'b1;
  15431. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .FeedbackMux = 1'b0;
  15432. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .ShiftMux = 1'b0;
  15433. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .BypassEn = 1'b0;
  15434. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6 .CarryEnb = 1'b0;
  15435. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 (
  15436. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  15437. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add21_result[0]~0_combout ),
  15438. .C(vcc),
  15439. .D(vcc),
  15440. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 ),
  15441. .Qin(),
  15442. .Clk(),
  15443. .AsyncReset(),
  15444. .SyncReset(),
  15445. .ShiftData(),
  15446. .SyncLoad(),
  15447. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8_combout ),
  15448. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 ),
  15449. .Q());
  15450. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .coord_x = 7;
  15451. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .coord_y = 2;
  15452. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .coord_z = 12;
  15453. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .mask = 16'h698E;
  15454. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .modeMux = 1'b1;
  15455. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .FeedbackMux = 1'b0;
  15456. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .ShiftMux = 1'b0;
  15457. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .BypassEn = 1'b0;
  15458. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8 .CarryEnb = 1'b0;
  15459. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 (
  15460. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  15461. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  15462. .C(vcc),
  15463. .D(vcc),
  15464. .Cin(),
  15465. .Qin(),
  15466. .Clk(),
  15467. .AsyncReset(),
  15468. .SyncReset(),
  15469. .ShiftData(),
  15470. .SyncLoad(),
  15471. .LutOut(),
  15472. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1_cout ),
  15473. .Q());
  15474. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .coord_x = 6;
  15475. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .coord_y = 2;
  15476. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .coord_z = 7;
  15477. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .mask = 16'h0088;
  15478. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .modeMux = 1'b0;
  15479. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .FeedbackMux = 1'b0;
  15480. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .ShiftMux = 1'b0;
  15481. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .BypassEn = 1'b0;
  15482. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1 .CarryEnb = 1'b0;
  15483. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 (
  15484. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~6_combout ),
  15485. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[1]~2_combout ),
  15486. .C(vcc),
  15487. .D(vcc),
  15488. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9_cout ),
  15489. .Qin(),
  15490. .Clk(),
  15491. .AsyncReset(),
  15492. .SyncReset(),
  15493. .ShiftData(),
  15494. .SyncLoad(),
  15495. .LutOut(),
  15496. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11_cout ),
  15497. .Q());
  15498. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .coord_x = 6;
  15499. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .coord_y = 2;
  15500. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .coord_z = 12;
  15501. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .mask = 16'h0017;
  15502. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .modeMux = 1'b1;
  15503. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .FeedbackMux = 1'b0;
  15504. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .ShiftMux = 1'b0;
  15505. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .BypassEn = 1'b0;
  15506. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11 .CarryEnb = 1'b0;
  15507. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 (
  15508. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[2]~4_combout ),
  15509. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~8_combout ),
  15510. .C(vcc),
  15511. .D(vcc),
  15512. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~11_cout ),
  15513. .Qin(),
  15514. .Clk(),
  15515. .AsyncReset(),
  15516. .SyncReset(),
  15517. .ShiftData(),
  15518. .SyncLoad(),
  15519. .LutOut(),
  15520. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13_cout ),
  15521. .Q());
  15522. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .coord_x = 6;
  15523. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .coord_y = 2;
  15524. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .coord_z = 13;
  15525. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .mask = 16'h008E;
  15526. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .modeMux = 1'b1;
  15527. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .FeedbackMux = 1'b0;
  15528. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .ShiftMux = 1'b0;
  15529. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .BypassEn = 1'b0;
  15530. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13 .CarryEnb = 1'b0;
  15531. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 (
  15532. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~10_combout ),
  15533. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[3]~6_combout ),
  15534. .C(vcc),
  15535. .D(vcc),
  15536. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~13_cout ),
  15537. .Qin(),
  15538. .Clk(),
  15539. .AsyncReset(),
  15540. .SyncReset(),
  15541. .ShiftData(),
  15542. .SyncLoad(),
  15543. .LutOut(),
  15544. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15_cout ),
  15545. .Q());
  15546. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .coord_x = 6;
  15547. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .coord_y = 2;
  15548. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .coord_z = 14;
  15549. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .mask = 16'h0017;
  15550. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .modeMux = 1'b1;
  15551. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .FeedbackMux = 1'b0;
  15552. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .ShiftMux = 1'b0;
  15553. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .BypassEn = 1'b0;
  15554. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15 .CarryEnb = 1'b0;
  15555. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 (
  15556. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~12_combout ),
  15557. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[4]~8_combout ),
  15558. .C(vcc),
  15559. .D(vcc),
  15560. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~15_cout ),
  15561. .Qin(),
  15562. .Clk(),
  15563. .AsyncReset(),
  15564. .SyncReset(),
  15565. .ShiftData(),
  15566. .SyncLoad(),
  15567. .LutOut(),
  15568. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17_cout ),
  15569. .Q());
  15570. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .coord_x = 6;
  15571. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .coord_y = 2;
  15572. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .coord_z = 15;
  15573. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .mask = 16'h008E;
  15574. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .modeMux = 1'b1;
  15575. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .FeedbackMux = 1'b0;
  15576. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .ShiftMux = 1'b0;
  15577. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .BypassEn = 1'b0;
  15578. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17 .CarryEnb = 1'b0;
  15579. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 (
  15580. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[5]~10_combout ),
  15581. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~14_combout ),
  15582. .C(vcc),
  15583. .D(vcc),
  15584. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~17_cout ),
  15585. .Qin(),
  15586. .Clk(),
  15587. .AsyncReset(),
  15588. .SyncReset(),
  15589. .ShiftData(),
  15590. .SyncLoad(),
  15591. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18_combout ),
  15592. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~19 ),
  15593. .Q());
  15594. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .coord_x = 6;
  15595. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .coord_y = 1;
  15596. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .coord_z = 0;
  15597. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .mask = 16'h9617;
  15598. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .modeMux = 1'b1;
  15599. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .FeedbackMux = 1'b0;
  15600. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .ShiftMux = 1'b0;
  15601. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .BypassEn = 1'b0;
  15602. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18 .CarryEnb = 1'b0;
  15603. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 (
  15604. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~16_combout ),
  15605. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[6]~12_combout ),
  15606. .C(vcc),
  15607. .D(vcc),
  15608. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~19 ),
  15609. .Qin(),
  15610. .Clk(),
  15611. .AsyncReset(),
  15612. .SyncReset(),
  15613. .ShiftData(),
  15614. .SyncLoad(),
  15615. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20_combout ),
  15616. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~21 ),
  15617. .Q());
  15618. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .coord_x = 6;
  15619. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .coord_y = 1;
  15620. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .coord_z = 1;
  15621. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .mask = 16'h698E;
  15622. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .modeMux = 1'b1;
  15623. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .FeedbackMux = 1'b0;
  15624. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .ShiftMux = 1'b0;
  15625. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .BypassEn = 1'b0;
  15626. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20 .CarryEnb = 1'b0;
  15627. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 (
  15628. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[7]~14_combout ),
  15629. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~18_combout ),
  15630. .C(vcc),
  15631. .D(vcc),
  15632. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~21 ),
  15633. .Qin(),
  15634. .Clk(),
  15635. .AsyncReset(),
  15636. .SyncReset(),
  15637. .ShiftData(),
  15638. .SyncLoad(),
  15639. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22_combout ),
  15640. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~23 ),
  15641. .Q());
  15642. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .coord_x = 6;
  15643. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .coord_y = 1;
  15644. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .coord_z = 2;
  15645. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .mask = 16'h9617;
  15646. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .modeMux = 1'b1;
  15647. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .FeedbackMux = 1'b0;
  15648. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .ShiftMux = 1'b0;
  15649. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .BypassEn = 1'b0;
  15650. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~22 .CarryEnb = 1'b0;
  15651. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 (
  15652. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[8]~16_combout ),
  15653. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  15654. .C(vcc),
  15655. .D(vcc),
  15656. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~23 ),
  15657. .Qin(),
  15658. .Clk(),
  15659. .AsyncReset(),
  15660. .SyncReset(),
  15661. .ShiftData(),
  15662. .SyncLoad(),
  15663. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24_combout ),
  15664. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~25 ),
  15665. .Q());
  15666. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .coord_x = 6;
  15667. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .coord_y = 1;
  15668. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .coord_z = 3;
  15669. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .mask = 16'h698E;
  15670. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .modeMux = 1'b1;
  15671. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .FeedbackMux = 1'b0;
  15672. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .ShiftMux = 1'b0;
  15673. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .BypassEn = 1'b0;
  15674. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24 .CarryEnb = 1'b0;
  15675. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 (
  15676. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[9]~18_combout ),
  15677. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  15678. .C(vcc),
  15679. .D(vcc),
  15680. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~25 ),
  15681. .Qin(),
  15682. .Clk(),
  15683. .AsyncReset(),
  15684. .SyncReset(),
  15685. .ShiftData(),
  15686. .SyncLoad(),
  15687. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26_combout ),
  15688. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~27 ),
  15689. .Q());
  15690. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .coord_x = 6;
  15691. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .coord_y = 1;
  15692. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .coord_z = 4;
  15693. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .mask = 16'h9617;
  15694. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .modeMux = 1'b1;
  15695. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .FeedbackMux = 1'b0;
  15696. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .ShiftMux = 1'b0;
  15697. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .BypassEn = 1'b0;
  15698. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26 .CarryEnb = 1'b0;
  15699. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 (
  15700. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  15701. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[10]~20_combout ),
  15702. .C(vcc),
  15703. .D(vcc),
  15704. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~27 ),
  15705. .Qin(),
  15706. .Clk(),
  15707. .AsyncReset(),
  15708. .SyncReset(),
  15709. .ShiftData(),
  15710. .SyncLoad(),
  15711. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28_combout ),
  15712. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~29 ),
  15713. .Q());
  15714. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .coord_x = 6;
  15715. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .coord_y = 1;
  15716. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .coord_z = 5;
  15717. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .mask = 16'h698E;
  15718. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .modeMux = 1'b1;
  15719. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .FeedbackMux = 1'b0;
  15720. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .ShiftMux = 1'b0;
  15721. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .BypassEn = 1'b0;
  15722. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28 .CarryEnb = 1'b0;
  15723. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 (
  15724. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  15725. .B(vcc),
  15726. .C(vcc),
  15727. .D(vcc),
  15728. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~1_cout ),
  15729. .Qin(),
  15730. .Clk(),
  15731. .AsyncReset(),
  15732. .SyncReset(),
  15733. .ShiftData(),
  15734. .SyncLoad(),
  15735. .LutOut(),
  15736. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3_cout ),
  15737. .Q());
  15738. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .coord_x = 6;
  15739. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .coord_y = 2;
  15740. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .coord_z = 8;
  15741. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .mask = 16'h005F;
  15742. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .modeMux = 1'b1;
  15743. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .FeedbackMux = 1'b0;
  15744. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .ShiftMux = 1'b0;
  15745. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .BypassEn = 1'b0;
  15746. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3 .CarryEnb = 1'b0;
  15747. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 (
  15748. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[11]~22_combout ),
  15749. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  15750. .C(vcc),
  15751. .D(vcc),
  15752. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~29 ),
  15753. .Qin(),
  15754. .Clk(),
  15755. .AsyncReset(),
  15756. .SyncReset(),
  15757. .ShiftData(),
  15758. .SyncLoad(),
  15759. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30_combout ),
  15760. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~31 ),
  15761. .Q());
  15762. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .coord_x = 6;
  15763. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .coord_y = 1;
  15764. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .coord_z = 6;
  15765. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .mask = 16'h9617;
  15766. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .modeMux = 1'b1;
  15767. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .FeedbackMux = 1'b0;
  15768. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .ShiftMux = 1'b0;
  15769. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .BypassEn = 1'b0;
  15770. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30 .CarryEnb = 1'b0;
  15771. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 (
  15772. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  15773. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[12]~24_combout ),
  15774. .C(vcc),
  15775. .D(vcc),
  15776. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~31 ),
  15777. .Qin(),
  15778. .Clk(),
  15779. .AsyncReset(),
  15780. .SyncReset(),
  15781. .ShiftData(),
  15782. .SyncLoad(),
  15783. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32_combout ),
  15784. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~33 ),
  15785. .Q());
  15786. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .coord_x = 6;
  15787. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .coord_y = 1;
  15788. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .coord_z = 7;
  15789. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .mask = 16'h698E;
  15790. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .modeMux = 1'b1;
  15791. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .FeedbackMux = 1'b0;
  15792. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .ShiftMux = 1'b0;
  15793. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .BypassEn = 1'b0;
  15794. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32 .CarryEnb = 1'b0;
  15795. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 (
  15796. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[13]~26_combout ),
  15797. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  15798. .C(vcc),
  15799. .D(vcc),
  15800. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~33 ),
  15801. .Qin(),
  15802. .Clk(),
  15803. .AsyncReset(),
  15804. .SyncReset(),
  15805. .ShiftData(),
  15806. .SyncLoad(),
  15807. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34_combout ),
  15808. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~35 ),
  15809. .Q());
  15810. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .coord_x = 6;
  15811. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .coord_y = 1;
  15812. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .coord_z = 8;
  15813. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .mask = 16'h9617;
  15814. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .modeMux = 1'b1;
  15815. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .FeedbackMux = 1'b0;
  15816. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .ShiftMux = 1'b0;
  15817. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .BypassEn = 1'b0;
  15818. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34 .CarryEnb = 1'b0;
  15819. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 (
  15820. .A(vcc),
  15821. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  15822. .C(vcc),
  15823. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  15824. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~35 ),
  15825. .Qin(),
  15826. .Clk(),
  15827. .AsyncReset(),
  15828. .SyncReset(),
  15829. .ShiftData(),
  15830. .SyncLoad(),
  15831. .LutOut(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36_combout ),
  15832. .Cout(),
  15833. .Q());
  15834. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .coord_x = 6;
  15835. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .coord_y = 1;
  15836. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .coord_z = 9;
  15837. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .mask = 16'h3CC3;
  15838. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .modeMux = 1'b1;
  15839. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .FeedbackMux = 1'b0;
  15840. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .ShiftMux = 1'b0;
  15841. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .BypassEn = 1'b0;
  15842. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36 .CarryEnb = 1'b1;
  15843. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 (
  15844. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  15845. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~0_combout ),
  15846. .C(vcc),
  15847. .D(vcc),
  15848. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~3_cout ),
  15849. .Qin(),
  15850. .Clk(),
  15851. .AsyncReset(),
  15852. .SyncReset(),
  15853. .ShiftData(),
  15854. .SyncLoad(),
  15855. .LutOut(),
  15856. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5_cout ),
  15857. .Q());
  15858. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .coord_x = 6;
  15859. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .coord_y = 2;
  15860. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .coord_z = 9;
  15861. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .mask = 16'h008E;
  15862. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .modeMux = 1'b1;
  15863. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .FeedbackMux = 1'b0;
  15864. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .ShiftMux = 1'b0;
  15865. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .BypassEn = 1'b0;
  15866. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5 .CarryEnb = 1'b0;
  15867. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 (
  15868. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  15869. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~2_combout ),
  15870. .C(vcc),
  15871. .D(vcc),
  15872. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~5_cout ),
  15873. .Qin(),
  15874. .Clk(),
  15875. .AsyncReset(),
  15876. .SyncReset(),
  15877. .ShiftData(),
  15878. .SyncLoad(),
  15879. .LutOut(),
  15880. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7_cout ),
  15881. .Q());
  15882. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .coord_x = 6;
  15883. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .coord_y = 2;
  15884. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .coord_z = 10;
  15885. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .mask = 16'h0017;
  15886. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .modeMux = 1'b1;
  15887. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .FeedbackMux = 1'b0;
  15888. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .ShiftMux = 1'b0;
  15889. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .BypassEn = 1'b0;
  15890. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7 .CarryEnb = 1'b0;
  15891. alta_slice \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 (
  15892. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_1~4_combout ),
  15893. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|add17_result[0]~0_combout ),
  15894. .C(vcc),
  15895. .D(vcc),
  15896. .Cin(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~7_cout ),
  15897. .Qin(),
  15898. .Clk(),
  15899. .AsyncReset(),
  15900. .SyncReset(),
  15901. .ShiftData(),
  15902. .SyncLoad(),
  15903. .LutOut(),
  15904. .Cout(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9_cout ),
  15905. .Q());
  15906. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .coord_x = 6;
  15907. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .coord_y = 2;
  15908. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .coord_z = 11;
  15909. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .mask = 16'h008E;
  15910. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .modeMux = 1'b1;
  15911. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .FeedbackMux = 1'b0;
  15912. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .ShiftMux = 1'b0;
  15913. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .BypassEn = 1'b0;
  15914. defparam \macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~9 .CarryEnb = 1'b0;
  15915. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 (
  15916. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  15917. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  15918. .C(vcc),
  15919. .D(vcc),
  15920. .Cin(),
  15921. .Qin(),
  15922. .Clk(),
  15923. .AsyncReset(),
  15924. .SyncReset(),
  15925. .ShiftData(),
  15926. .SyncLoad(),
  15927. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ),
  15928. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ),
  15929. .Q());
  15930. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_x = 12;
  15931. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_y = 3;
  15932. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .coord_z = 0;
  15933. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .mask = 16'h6688;
  15934. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .modeMux = 1'b0;
  15935. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .FeedbackMux = 1'b0;
  15936. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .ShiftMux = 1'b0;
  15937. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .BypassEn = 1'b0;
  15938. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0 .CarryEnb = 1'b0;
  15939. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 (
  15940. .A(vcc),
  15941. .B(vcc),
  15942. .C(vcc),
  15943. .D(vcc),
  15944. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ),
  15945. .Qin(),
  15946. .Clk(),
  15947. .AsyncReset(),
  15948. .SyncReset(),
  15949. .ShiftData(),
  15950. .SyncLoad(),
  15951. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ),
  15952. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ),
  15953. .Q());
  15954. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_x = 12;
  15955. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_y = 3;
  15956. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .coord_z = 10;
  15957. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .mask = 16'hF00F;
  15958. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .modeMux = 1'b1;
  15959. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .FeedbackMux = 1'b0;
  15960. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .ShiftMux = 1'b0;
  15961. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .BypassEn = 1'b0;
  15962. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20 .CarryEnb = 1'b0;
  15963. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 (
  15964. .A(vcc),
  15965. .B(vcc),
  15966. .C(vcc),
  15967. .D(vcc),
  15968. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~21 ),
  15969. .Qin(),
  15970. .Clk(),
  15971. .AsyncReset(),
  15972. .SyncReset(),
  15973. .ShiftData(),
  15974. .SyncLoad(),
  15975. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ),
  15976. .Cout(),
  15977. .Q());
  15978. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_x = 12;
  15979. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_y = 3;
  15980. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .coord_z = 11;
  15981. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .mask = 16'hF0F0;
  15982. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .modeMux = 1'b1;
  15983. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .FeedbackMux = 1'b0;
  15984. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .ShiftMux = 1'b0;
  15985. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .BypassEn = 1'b0;
  15986. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22 .CarryEnb = 1'b1;
  15987. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 (
  15988. .A(vcc),
  15989. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  15990. .C(vcc),
  15991. .D(vcc),
  15992. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~1 ),
  15993. .Qin(),
  15994. .Clk(),
  15995. .AsyncReset(),
  15996. .SyncReset(),
  15997. .ShiftData(),
  15998. .SyncLoad(),
  15999. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ),
  16000. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ),
  16001. .Q());
  16002. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_x = 12;
  16003. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_y = 3;
  16004. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .coord_z = 1;
  16005. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .mask = 16'h3C3F;
  16006. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .modeMux = 1'b1;
  16007. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .FeedbackMux = 1'b0;
  16008. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .ShiftMux = 1'b0;
  16009. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .BypassEn = 1'b0;
  16010. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2 .CarryEnb = 1'b0;
  16011. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 (
  16012. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  16013. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  16014. .C(vcc),
  16015. .D(vcc),
  16016. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~3 ),
  16017. .Qin(),
  16018. .Clk(),
  16019. .AsyncReset(),
  16020. .SyncReset(),
  16021. .ShiftData(),
  16022. .SyncLoad(),
  16023. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ),
  16024. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ),
  16025. .Q());
  16026. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_x = 12;
  16027. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_y = 3;
  16028. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .coord_z = 2;
  16029. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .mask = 16'h698E;
  16030. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .modeMux = 1'b1;
  16031. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .FeedbackMux = 1'b0;
  16032. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .ShiftMux = 1'b0;
  16033. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .BypassEn = 1'b0;
  16034. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4 .CarryEnb = 1'b0;
  16035. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 (
  16036. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  16037. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  16038. .C(vcc),
  16039. .D(vcc),
  16040. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~5 ),
  16041. .Qin(),
  16042. .Clk(),
  16043. .AsyncReset(),
  16044. .SyncReset(),
  16045. .ShiftData(),
  16046. .SyncLoad(),
  16047. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ),
  16048. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ),
  16049. .Q());
  16050. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_x = 12;
  16051. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_y = 3;
  16052. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .coord_z = 3;
  16053. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .mask = 16'h9617;
  16054. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .modeMux = 1'b1;
  16055. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .FeedbackMux = 1'b0;
  16056. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .ShiftMux = 1'b0;
  16057. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .BypassEn = 1'b0;
  16058. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6 .CarryEnb = 1'b0;
  16059. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 (
  16060. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  16061. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  16062. .C(vcc),
  16063. .D(vcc),
  16064. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~7 ),
  16065. .Qin(),
  16066. .Clk(),
  16067. .AsyncReset(),
  16068. .SyncReset(),
  16069. .ShiftData(),
  16070. .SyncLoad(),
  16071. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ),
  16072. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ),
  16073. .Q());
  16074. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_x = 12;
  16075. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_y = 3;
  16076. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .coord_z = 4;
  16077. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .mask = 16'h698E;
  16078. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .modeMux = 1'b1;
  16079. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .FeedbackMux = 1'b0;
  16080. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .ShiftMux = 1'b0;
  16081. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .BypassEn = 1'b0;
  16082. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8 .CarryEnb = 1'b0;
  16083. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 (
  16084. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  16085. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  16086. .C(vcc),
  16087. .D(vcc),
  16088. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~9 ),
  16089. .Qin(),
  16090. .Clk(),
  16091. .AsyncReset(),
  16092. .SyncReset(),
  16093. .ShiftData(),
  16094. .SyncLoad(),
  16095. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ),
  16096. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ),
  16097. .Q());
  16098. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_x = 12;
  16099. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_y = 3;
  16100. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .coord_z = 5;
  16101. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .mask = 16'h9617;
  16102. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .modeMux = 1'b1;
  16103. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .FeedbackMux = 1'b0;
  16104. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .ShiftMux = 1'b0;
  16105. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .BypassEn = 1'b0;
  16106. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10 .CarryEnb = 1'b0;
  16107. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 (
  16108. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  16109. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  16110. .C(vcc),
  16111. .D(vcc),
  16112. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~11 ),
  16113. .Qin(),
  16114. .Clk(),
  16115. .AsyncReset(),
  16116. .SyncReset(),
  16117. .ShiftData(),
  16118. .SyncLoad(),
  16119. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ),
  16120. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ),
  16121. .Q());
  16122. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_x = 12;
  16123. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_y = 3;
  16124. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .coord_z = 6;
  16125. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .mask = 16'h698E;
  16126. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .modeMux = 1'b1;
  16127. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .FeedbackMux = 1'b0;
  16128. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .ShiftMux = 1'b0;
  16129. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .BypassEn = 1'b0;
  16130. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12 .CarryEnb = 1'b0;
  16131. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 (
  16132. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  16133. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  16134. .C(vcc),
  16135. .D(vcc),
  16136. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~13 ),
  16137. .Qin(),
  16138. .Clk(),
  16139. .AsyncReset(),
  16140. .SyncReset(),
  16141. .ShiftData(),
  16142. .SyncLoad(),
  16143. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ),
  16144. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ),
  16145. .Q());
  16146. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_x = 12;
  16147. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_y = 3;
  16148. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .coord_z = 7;
  16149. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .mask = 16'h9617;
  16150. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .modeMux = 1'b1;
  16151. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .FeedbackMux = 1'b0;
  16152. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .ShiftMux = 1'b0;
  16153. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .BypassEn = 1'b0;
  16154. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14 .CarryEnb = 1'b0;
  16155. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 (
  16156. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  16157. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  16158. .C(vcc),
  16159. .D(vcc),
  16160. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~15 ),
  16161. .Qin(),
  16162. .Clk(),
  16163. .AsyncReset(),
  16164. .SyncReset(),
  16165. .ShiftData(),
  16166. .SyncLoad(),
  16167. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ),
  16168. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ),
  16169. .Q());
  16170. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_x = 12;
  16171. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_y = 3;
  16172. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .coord_z = 8;
  16173. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .mask = 16'h698E;
  16174. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .modeMux = 1'b1;
  16175. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .FeedbackMux = 1'b0;
  16176. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .ShiftMux = 1'b0;
  16177. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .BypassEn = 1'b0;
  16178. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16 .CarryEnb = 1'b0;
  16179. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 (
  16180. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  16181. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  16182. .C(vcc),
  16183. .D(vcc),
  16184. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~17 ),
  16185. .Qin(),
  16186. .Clk(),
  16187. .AsyncReset(),
  16188. .SyncReset(),
  16189. .ShiftData(),
  16190. .SyncLoad(),
  16191. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ),
  16192. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~19 ),
  16193. .Q());
  16194. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_x = 12;
  16195. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_y = 3;
  16196. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .coord_z = 9;
  16197. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .mask = 16'h694D;
  16198. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .modeMux = 1'b1;
  16199. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .FeedbackMux = 1'b0;
  16200. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .ShiftMux = 1'b0;
  16201. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .BypassEn = 1'b0;
  16202. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18 .CarryEnb = 1'b0;
  16203. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 (
  16204. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  16205. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  16206. .C(vcc),
  16207. .D(vcc),
  16208. .Cin(),
  16209. .Qin(),
  16210. .Clk(),
  16211. .AsyncReset(),
  16212. .SyncReset(),
  16213. .ShiftData(),
  16214. .SyncLoad(),
  16215. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ),
  16216. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ),
  16217. .Q());
  16218. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_x = 10;
  16219. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_y = 4;
  16220. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .coord_z = 2;
  16221. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .mask = 16'h6688;
  16222. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .modeMux = 1'b0;
  16223. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .FeedbackMux = 1'b0;
  16224. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .ShiftMux = 1'b0;
  16225. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .BypassEn = 1'b0;
  16226. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0 .CarryEnb = 1'b0;
  16227. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 (
  16228. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  16229. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  16230. .C(vcc),
  16231. .D(vcc),
  16232. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~1 ),
  16233. .Qin(),
  16234. .Clk(),
  16235. .AsyncReset(),
  16236. .SyncReset(),
  16237. .ShiftData(),
  16238. .SyncLoad(),
  16239. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ),
  16240. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ),
  16241. .Q());
  16242. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_x = 10;
  16243. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_y = 4;
  16244. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .coord_z = 3;
  16245. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .mask = 16'h9617;
  16246. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .modeMux = 1'b1;
  16247. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .FeedbackMux = 1'b0;
  16248. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .ShiftMux = 1'b0;
  16249. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .BypassEn = 1'b0;
  16250. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2 .CarryEnb = 1'b0;
  16251. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 (
  16252. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  16253. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  16254. .C(vcc),
  16255. .D(vcc),
  16256. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~3 ),
  16257. .Qin(),
  16258. .Clk(),
  16259. .AsyncReset(),
  16260. .SyncReset(),
  16261. .ShiftData(),
  16262. .SyncLoad(),
  16263. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ),
  16264. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ),
  16265. .Q());
  16266. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_x = 10;
  16267. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_y = 4;
  16268. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .coord_z = 4;
  16269. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .mask = 16'h698E;
  16270. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .modeMux = 1'b1;
  16271. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .FeedbackMux = 1'b0;
  16272. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .ShiftMux = 1'b0;
  16273. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .BypassEn = 1'b0;
  16274. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4 .CarryEnb = 1'b0;
  16275. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 (
  16276. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  16277. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  16278. .C(vcc),
  16279. .D(vcc),
  16280. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~5 ),
  16281. .Qin(),
  16282. .Clk(),
  16283. .AsyncReset(),
  16284. .SyncReset(),
  16285. .ShiftData(),
  16286. .SyncLoad(),
  16287. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ),
  16288. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ),
  16289. .Q());
  16290. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_x = 10;
  16291. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_y = 4;
  16292. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .coord_z = 5;
  16293. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .mask = 16'h9617;
  16294. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .modeMux = 1'b1;
  16295. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .FeedbackMux = 1'b0;
  16296. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .ShiftMux = 1'b0;
  16297. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .BypassEn = 1'b0;
  16298. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6 .CarryEnb = 1'b0;
  16299. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 (
  16300. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  16301. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16302. .C(vcc),
  16303. .D(vcc),
  16304. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~7 ),
  16305. .Qin(),
  16306. .Clk(),
  16307. .AsyncReset(),
  16308. .SyncReset(),
  16309. .ShiftData(),
  16310. .SyncLoad(),
  16311. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ),
  16312. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ),
  16313. .Q());
  16314. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_x = 10;
  16315. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_y = 4;
  16316. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .coord_z = 6;
  16317. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .mask = 16'h962B;
  16318. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .modeMux = 1'b1;
  16319. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .FeedbackMux = 1'b0;
  16320. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .ShiftMux = 1'b0;
  16321. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .BypassEn = 1'b0;
  16322. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8 .CarryEnb = 1'b0;
  16323. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 (
  16324. .A(vcc),
  16325. .B(vcc),
  16326. .C(vcc),
  16327. .D(vcc),
  16328. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~9 ),
  16329. .Qin(),
  16330. .Clk(),
  16331. .AsyncReset(),
  16332. .SyncReset(),
  16333. .ShiftData(),
  16334. .SyncLoad(),
  16335. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ),
  16336. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ),
  16337. .Q());
  16338. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_x = 10;
  16339. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_y = 4;
  16340. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .coord_z = 7;
  16341. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .mask = 16'h0F0F;
  16342. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .modeMux = 1'b1;
  16343. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .FeedbackMux = 1'b0;
  16344. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .ShiftMux = 1'b0;
  16345. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .BypassEn = 1'b0;
  16346. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10 .CarryEnb = 1'b0;
  16347. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 (
  16348. .A(vcc),
  16349. .B(vcc),
  16350. .C(vcc),
  16351. .D(vcc),
  16352. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~11 ),
  16353. .Qin(),
  16354. .Clk(),
  16355. .AsyncReset(),
  16356. .SyncReset(),
  16357. .ShiftData(),
  16358. .SyncLoad(),
  16359. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ),
  16360. .Cout(),
  16361. .Q());
  16362. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_x = 10;
  16363. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_y = 4;
  16364. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .coord_z = 8;
  16365. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .mask = 16'h0F0F;
  16366. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .modeMux = 1'b1;
  16367. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .FeedbackMux = 1'b0;
  16368. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .ShiftMux = 1'b0;
  16369. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .BypassEn = 1'b0;
  16370. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12 .CarryEnb = 1'b1;
  16371. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 (
  16372. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  16373. .B(vcc),
  16374. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  16375. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  16376. .Cin(),
  16377. .Qin(),
  16378. .Clk(),
  16379. .AsyncReset(),
  16380. .SyncReset(),
  16381. .ShiftData(),
  16382. .SyncLoad(),
  16383. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  16384. .Cout(),
  16385. .Q());
  16386. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .coord_x = 12;
  16387. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .coord_y = 4;
  16388. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .coord_z = 4;
  16389. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .mask = 16'hFAF0;
  16390. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .modeMux = 1'b0;
  16391. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .FeedbackMux = 1'b0;
  16392. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .ShiftMux = 1'b0;
  16393. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .BypassEn = 1'b0;
  16394. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0 .CarryEnb = 1'b1;
  16395. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 (
  16396. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  16397. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  16398. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  16399. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  16400. .Cin(),
  16401. .Qin(),
  16402. .Clk(),
  16403. .AsyncReset(),
  16404. .SyncReset(),
  16405. .ShiftData(),
  16406. .SyncLoad(),
  16407. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  16408. .Cout(),
  16409. .Q());
  16410. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .coord_x = 12;
  16411. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .coord_y = 4;
  16412. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .coord_z = 0;
  16413. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .mask = 16'hCC80;
  16414. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .modeMux = 1'b0;
  16415. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .FeedbackMux = 1'b0;
  16416. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .ShiftMux = 1'b0;
  16417. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .BypassEn = 1'b0;
  16418. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2 .CarryEnb = 1'b1;
  16419. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] (
  16420. .A(vcc),
  16421. .B(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  16422. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16423. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16424. .Cin(),
  16425. .Qin(),
  16426. .Clk(),
  16427. .AsyncReset(),
  16428. .SyncReset(),
  16429. .ShiftData(),
  16430. .SyncLoad(),
  16431. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  16432. .Cout(),
  16433. .Q());
  16434. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_x = 11;
  16435. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_y = 2;
  16436. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .coord_z = 2;
  16437. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .mask = 16'h3FC0;
  16438. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .modeMux = 1'b0;
  16439. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .FeedbackMux = 1'b0;
  16440. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .ShiftMux = 1'b0;
  16441. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .BypassEn = 1'b0;
  16442. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[0] .CarryEnb = 1'b1;
  16443. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] (
  16444. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  16445. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  16446. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16447. .D(vcc),
  16448. .Cin(),
  16449. .Qin(),
  16450. .Clk(),
  16451. .AsyncReset(),
  16452. .SyncReset(),
  16453. .ShiftData(),
  16454. .SyncLoad(),
  16455. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [10]),
  16456. .Cout(),
  16457. .Q());
  16458. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_x = 10;
  16459. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_y = 4;
  16460. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .coord_z = 1;
  16461. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .mask = 16'hC4C4;
  16462. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .modeMux = 1'b0;
  16463. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .FeedbackMux = 1'b0;
  16464. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .ShiftMux = 1'b0;
  16465. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .BypassEn = 1'b0;
  16466. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[10] .CarryEnb = 1'b1;
  16467. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] (
  16468. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  16469. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  16470. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  16471. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  16472. .Cin(),
  16473. .Qin(),
  16474. .Clk(),
  16475. .AsyncReset(),
  16476. .SyncReset(),
  16477. .ShiftData(),
  16478. .SyncLoad(),
  16479. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  16480. .Cout(),
  16481. .Q());
  16482. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_x = 11;
  16483. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_y = 2;
  16484. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .coord_z = 3;
  16485. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .mask = 16'h286C;
  16486. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .modeMux = 1'b0;
  16487. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .FeedbackMux = 1'b0;
  16488. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .ShiftMux = 1'b0;
  16489. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .BypassEn = 1'b0;
  16490. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[1] .CarryEnb = 1'b1;
  16491. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] (
  16492. .A(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  16493. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  16494. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16495. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16496. .Cin(),
  16497. .Qin(),
  16498. .Clk(),
  16499. .AsyncReset(),
  16500. .SyncReset(),
  16501. .ShiftData(),
  16502. .SyncLoad(),
  16503. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  16504. .Cout(),
  16505. .Q());
  16506. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_x = 12;
  16507. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_y = 2;
  16508. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .coord_z = 1;
  16509. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .mask = 16'h35C0;
  16510. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .modeMux = 1'b0;
  16511. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .FeedbackMux = 1'b0;
  16512. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .ShiftMux = 1'b0;
  16513. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .BypassEn = 1'b0;
  16514. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[2] .CarryEnb = 1'b1;
  16515. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] (
  16516. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  16517. .B(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  16518. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16519. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16520. .Cin(),
  16521. .Qin(),
  16522. .Clk(),
  16523. .AsyncReset(),
  16524. .SyncReset(),
  16525. .ShiftData(),
  16526. .SyncLoad(),
  16527. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  16528. .Cout(),
  16529. .Q());
  16530. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_x = 12;
  16531. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_y = 2;
  16532. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .coord_z = 4;
  16533. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .mask = 16'h53A0;
  16534. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .modeMux = 1'b0;
  16535. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .FeedbackMux = 1'b0;
  16536. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .ShiftMux = 1'b0;
  16537. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .BypassEn = 1'b0;
  16538. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[3] .CarryEnb = 1'b1;
  16539. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] (
  16540. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  16541. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  16542. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  16543. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16544. .Cin(),
  16545. .Qin(),
  16546. .Clk(),
  16547. .AsyncReset(),
  16548. .SyncReset(),
  16549. .ShiftData(),
  16550. .SyncLoad(),
  16551. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  16552. .Cout(),
  16553. .Q());
  16554. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_x = 7;
  16555. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_y = 3;
  16556. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .coord_z = 6;
  16557. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .mask = 16'h4788;
  16558. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .modeMux = 1'b0;
  16559. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .FeedbackMux = 1'b0;
  16560. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .ShiftMux = 1'b0;
  16561. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .BypassEn = 1'b0;
  16562. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[4] .CarryEnb = 1'b1;
  16563. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] (
  16564. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  16565. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  16566. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  16567. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  16568. .Cin(),
  16569. .Qin(),
  16570. .Clk(),
  16571. .AsyncReset(),
  16572. .SyncReset(),
  16573. .ShiftData(),
  16574. .SyncLoad(),
  16575. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  16576. .Cout(),
  16577. .Q());
  16578. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_x = 7;
  16579. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_y = 3;
  16580. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .coord_z = 7;
  16581. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .mask = 16'h268C;
  16582. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .modeMux = 1'b0;
  16583. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .FeedbackMux = 1'b0;
  16584. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .ShiftMux = 1'b0;
  16585. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .BypassEn = 1'b0;
  16586. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[5] .CarryEnb = 1'b1;
  16587. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] (
  16588. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  16589. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  16590. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16591. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16592. .Cin(),
  16593. .Qin(),
  16594. .Clk(),
  16595. .AsyncReset(),
  16596. .SyncReset(),
  16597. .ShiftData(),
  16598. .SyncLoad(),
  16599. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [6]),
  16600. .Cout(),
  16601. .Q());
  16602. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_x = 11;
  16603. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_y = 3;
  16604. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .coord_z = 2;
  16605. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .mask = 16'h35C0;
  16606. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .modeMux = 1'b0;
  16607. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .FeedbackMux = 1'b0;
  16608. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .ShiftMux = 1'b0;
  16609. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .BypassEn = 1'b0;
  16610. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[6] .CarryEnb = 1'b1;
  16611. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] (
  16612. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  16613. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  16614. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16615. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16616. .Cin(),
  16617. .Qin(),
  16618. .Clk(),
  16619. .AsyncReset(),
  16620. .SyncReset(),
  16621. .ShiftData(),
  16622. .SyncLoad(),
  16623. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [7]),
  16624. .Cout(),
  16625. .Q());
  16626. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_x = 11;
  16627. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_y = 3;
  16628. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .coord_z = 6;
  16629. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .mask = 16'h53A0;
  16630. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .modeMux = 1'b0;
  16631. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .FeedbackMux = 1'b0;
  16632. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .ShiftMux = 1'b0;
  16633. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .BypassEn = 1'b0;
  16634. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[7] .CarryEnb = 1'b1;
  16635. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] (
  16636. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  16637. .B(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  16638. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  16639. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16640. .Cin(),
  16641. .Qin(),
  16642. .Clk(),
  16643. .AsyncReset(),
  16644. .SyncReset(),
  16645. .ShiftData(),
  16646. .SyncLoad(),
  16647. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [8]),
  16648. .Cout(),
  16649. .Q());
  16650. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_x = 11;
  16651. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_y = 3;
  16652. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .coord_z = 4;
  16653. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .mask = 16'h35C0;
  16654. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .modeMux = 1'b0;
  16655. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .FeedbackMux = 1'b0;
  16656. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .ShiftMux = 1'b0;
  16657. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .BypassEn = 1'b0;
  16658. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[8] .CarryEnb = 1'b1;
  16659. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] (
  16660. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  16661. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  16662. .C(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  16663. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  16664. .Cin(),
  16665. .Qin(),
  16666. .Clk(),
  16667. .AsyncReset(),
  16668. .SyncReset(),
  16669. .ShiftData(),
  16670. .SyncLoad(),
  16671. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [9]),
  16672. .Cout(),
  16673. .Q());
  16674. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_x = 10;
  16675. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_y = 4;
  16676. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .coord_z = 14;
  16677. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .mask = 16'h3C44;
  16678. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .modeMux = 1'b0;
  16679. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .FeedbackMux = 1'b0;
  16680. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .ShiftMux = 1'b0;
  16681. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .BypassEn = 1'b0;
  16682. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a[9] .CarryEnb = 1'b1;
  16683. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] (
  16684. .A(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  16685. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  16686. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  16687. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16688. .Cin(),
  16689. .Qin(),
  16690. .Clk(),
  16691. .AsyncReset(),
  16692. .SyncReset(),
  16693. .ShiftData(),
  16694. .SyncLoad(),
  16695. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  16696. .Cout(),
  16697. .Q());
  16698. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_x = 6;
  16699. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_y = 2;
  16700. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .coord_z = 3;
  16701. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .mask = 16'h366C;
  16702. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .modeMux = 1'b0;
  16703. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .FeedbackMux = 1'b0;
  16704. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .ShiftMux = 1'b0;
  16705. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .BypassEn = 1'b0;
  16706. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[0] .CarryEnb = 1'b1;
  16707. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] (
  16708. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  16709. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  16710. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  16711. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16712. .Cin(),
  16713. .Qin(),
  16714. .Clk(),
  16715. .AsyncReset(),
  16716. .SyncReset(),
  16717. .ShiftData(),
  16718. .SyncLoad(),
  16719. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [10]),
  16720. .Cout(),
  16721. .Q());
  16722. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_x = 10;
  16723. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_y = 4;
  16724. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .coord_z = 12;
  16725. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .mask = 16'h34D0;
  16726. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .modeMux = 1'b0;
  16727. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .FeedbackMux = 1'b0;
  16728. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .ShiftMux = 1'b0;
  16729. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .BypassEn = 1'b0;
  16730. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[10] .CarryEnb = 1'b1;
  16731. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] (
  16732. .A(vcc),
  16733. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  16734. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  16735. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  16736. .Cin(),
  16737. .Qin(),
  16738. .Clk(),
  16739. .AsyncReset(),
  16740. .SyncReset(),
  16741. .ShiftData(),
  16742. .SyncLoad(),
  16743. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16744. .Cout(),
  16745. .Q());
  16746. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_x = 10;
  16747. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_y = 4;
  16748. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .coord_z = 13;
  16749. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .mask = 16'h3CF0;
  16750. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .modeMux = 1'b0;
  16751. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .FeedbackMux = 1'b0;
  16752. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .ShiftMux = 1'b0;
  16753. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .BypassEn = 1'b0;
  16754. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[11] .CarryEnb = 1'b1;
  16755. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] (
  16756. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16757. .B(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  16758. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  16759. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16760. .Cin(),
  16761. .Qin(),
  16762. .Clk(),
  16763. .AsyncReset(),
  16764. .SyncReset(),
  16765. .ShiftData(),
  16766. .SyncLoad(),
  16767. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  16768. .Cout(),
  16769. .Q());
  16770. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_x = 7;
  16771. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_y = 2;
  16772. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .coord_z = 6;
  16773. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .mask = 16'h1BA0;
  16774. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .modeMux = 1'b0;
  16775. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .FeedbackMux = 1'b0;
  16776. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .ShiftMux = 1'b0;
  16777. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .BypassEn = 1'b0;
  16778. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[1] .CarryEnb = 1'b1;
  16779. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] (
  16780. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16781. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16782. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  16783. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  16784. .Cin(),
  16785. .Qin(),
  16786. .Clk(),
  16787. .AsyncReset(),
  16788. .SyncReset(),
  16789. .ShiftData(),
  16790. .SyncLoad(),
  16791. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  16792. .Cout(),
  16793. .Q());
  16794. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_x = 12;
  16795. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_y = 2;
  16796. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .coord_z = 2;
  16797. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .mask = 16'h268C;
  16798. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .modeMux = 1'b0;
  16799. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .FeedbackMux = 1'b0;
  16800. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .ShiftMux = 1'b0;
  16801. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .BypassEn = 1'b0;
  16802. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[2] .CarryEnb = 1'b1;
  16803. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] (
  16804. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16805. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16806. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  16807. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  16808. .Cin(),
  16809. .Qin(),
  16810. .Clk(),
  16811. .AsyncReset(),
  16812. .SyncReset(),
  16813. .ShiftData(),
  16814. .SyncLoad(),
  16815. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  16816. .Cout(),
  16817. .Q());
  16818. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_x = 12;
  16819. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_y = 2;
  16820. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .coord_z = 0;
  16821. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .mask = 16'h286C;
  16822. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .modeMux = 1'b0;
  16823. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .FeedbackMux = 1'b0;
  16824. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .ShiftMux = 1'b0;
  16825. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .BypassEn = 1'b0;
  16826. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[3] .CarryEnb = 1'b1;
  16827. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] (
  16828. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  16829. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16830. .C(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  16831. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16832. .Cin(),
  16833. .Qin(),
  16834. .Clk(),
  16835. .AsyncReset(),
  16836. .SyncReset(),
  16837. .ShiftData(),
  16838. .SyncLoad(),
  16839. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  16840. .Cout(),
  16841. .Q());
  16842. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_x = 7;
  16843. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_y = 3;
  16844. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .coord_z = 2;
  16845. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .mask = 16'h1DC0;
  16846. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .modeMux = 1'b0;
  16847. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .FeedbackMux = 1'b0;
  16848. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .ShiftMux = 1'b0;
  16849. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .BypassEn = 1'b0;
  16850. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[4] .CarryEnb = 1'b1;
  16851. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] (
  16852. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  16853. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16854. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  16855. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16856. .Cin(),
  16857. .Qin(),
  16858. .Clk(),
  16859. .AsyncReset(),
  16860. .SyncReset(),
  16861. .ShiftData(),
  16862. .SyncLoad(),
  16863. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  16864. .Cout(),
  16865. .Q());
  16866. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_x = 7;
  16867. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_y = 3;
  16868. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .coord_z = 5;
  16869. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .mask = 16'h1DC0;
  16870. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .modeMux = 1'b0;
  16871. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .FeedbackMux = 1'b0;
  16872. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .ShiftMux = 1'b0;
  16873. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .BypassEn = 1'b0;
  16874. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[5] .CarryEnb = 1'b1;
  16875. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] (
  16876. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16877. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  16878. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  16879. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16880. .Cin(),
  16881. .Qin(),
  16882. .Clk(),
  16883. .AsyncReset(),
  16884. .SyncReset(),
  16885. .ShiftData(),
  16886. .SyncLoad(),
  16887. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [6]),
  16888. .Cout(),
  16889. .Q());
  16890. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_x = 11;
  16891. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_y = 3;
  16892. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .coord_z = 10;
  16893. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .mask = 16'h2788;
  16894. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .modeMux = 1'b0;
  16895. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .FeedbackMux = 1'b0;
  16896. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .ShiftMux = 1'b0;
  16897. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .BypassEn = 1'b0;
  16898. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[6] .CarryEnb = 1'b1;
  16899. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] (
  16900. .A(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  16901. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16902. .C(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  16903. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16904. .Cin(),
  16905. .Qin(),
  16906. .Clk(),
  16907. .AsyncReset(),
  16908. .SyncReset(),
  16909. .ShiftData(),
  16910. .SyncLoad(),
  16911. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [7]),
  16912. .Cout(),
  16913. .Q());
  16914. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_x = 7;
  16915. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_y = 3;
  16916. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .coord_z = 4;
  16917. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .mask = 16'h3C44;
  16918. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .modeMux = 1'b0;
  16919. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .FeedbackMux = 1'b0;
  16920. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .ShiftMux = 1'b0;
  16921. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .BypassEn = 1'b0;
  16922. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[7] .CarryEnb = 1'b1;
  16923. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] (
  16924. .A(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  16925. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16926. .C(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  16927. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16928. .Cin(),
  16929. .Qin(),
  16930. .Clk(),
  16931. .AsyncReset(),
  16932. .SyncReset(),
  16933. .ShiftData(),
  16934. .SyncLoad(),
  16935. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [8]),
  16936. .Cout(),
  16937. .Q());
  16938. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_x = 10;
  16939. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_y = 4;
  16940. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .coord_z = 15;
  16941. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .mask = 16'h4788;
  16942. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .modeMux = 1'b0;
  16943. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .FeedbackMux = 1'b0;
  16944. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .ShiftMux = 1'b0;
  16945. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .BypassEn = 1'b0;
  16946. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[8] .CarryEnb = 1'b1;
  16947. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] (
  16948. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  16949. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  16950. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  16951. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[1]~2_combout ),
  16952. .Cin(),
  16953. .Qin(),
  16954. .Clk(),
  16955. .AsyncReset(),
  16956. .SyncReset(),
  16957. .ShiftData(),
  16958. .SyncLoad(),
  16959. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [9]),
  16960. .Cout(),
  16961. .Q());
  16962. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_x = 10;
  16963. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_y = 4;
  16964. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .coord_z = 0;
  16965. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .mask = 16'h660A;
  16966. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .modeMux = 1'b0;
  16967. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .FeedbackMux = 1'b0;
  16968. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .ShiftMux = 1'b0;
  16969. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .BypassEn = 1'b0;
  16970. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a[9] .CarryEnb = 1'b1;
  16971. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] (
  16972. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  16973. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  16974. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  16975. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  16976. .Cin(),
  16977. .Qin(),
  16978. .Clk(),
  16979. .AsyncReset(),
  16980. .SyncReset(),
  16981. .ShiftData(),
  16982. .SyncLoad(),
  16983. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  16984. .Cout(),
  16985. .Q());
  16986. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_x = 10;
  16987. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_y = 1;
  16988. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .coord_z = 4;
  16989. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .mask = 16'h1E78;
  16990. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .modeMux = 1'b0;
  16991. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .FeedbackMux = 1'b0;
  16992. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .ShiftMux = 1'b0;
  16993. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .BypassEn = 1'b0;
  16994. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[0] .CarryEnb = 1'b1;
  16995. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] (
  16996. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  16997. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  16998. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  16999. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  17000. .Cin(),
  17001. .Qin(),
  17002. .Clk(),
  17003. .AsyncReset(),
  17004. .SyncReset(),
  17005. .ShiftData(),
  17006. .SyncLoad(),
  17007. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [10]),
  17008. .Cout(),
  17009. .Q());
  17010. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_x = 12;
  17011. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_y = 3;
  17012. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .coord_z = 13;
  17013. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .mask = 16'h34D0;
  17014. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .modeMux = 1'b0;
  17015. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .FeedbackMux = 1'b0;
  17016. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .ShiftMux = 1'b0;
  17017. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .BypassEn = 1'b0;
  17018. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[10] .CarryEnb = 1'b1;
  17019. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] (
  17020. .A(vcc),
  17021. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  17022. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  17023. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  17024. .Cin(),
  17025. .Qin(),
  17026. .Clk(),
  17027. .AsyncReset(),
  17028. .SyncReset(),
  17029. .ShiftData(),
  17030. .SyncLoad(),
  17031. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17032. .Cout(),
  17033. .Q());
  17034. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_x = 12;
  17035. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_y = 3;
  17036. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .coord_z = 15;
  17037. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .mask = 16'h3CF0;
  17038. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .modeMux = 1'b0;
  17039. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .FeedbackMux = 1'b0;
  17040. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .ShiftMux = 1'b0;
  17041. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .BypassEn = 1'b0;
  17042. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[11] .CarryEnb = 1'b1;
  17043. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] (
  17044. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17045. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17046. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17047. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17048. .Cin(),
  17049. .Qin(),
  17050. .Clk(),
  17051. .AsyncReset(),
  17052. .SyncReset(),
  17053. .ShiftData(),
  17054. .SyncLoad(),
  17055. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  17056. .Cout(),
  17057. .Q());
  17058. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_x = 12;
  17059. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_y = 2;
  17060. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .coord_z = 6;
  17061. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .mask = 16'h486A;
  17062. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .modeMux = 1'b0;
  17063. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .FeedbackMux = 1'b0;
  17064. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .ShiftMux = 1'b0;
  17065. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .BypassEn = 1'b0;
  17066. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[1] .CarryEnb = 1'b1;
  17067. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] (
  17068. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17069. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17070. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17071. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17072. .Cin(),
  17073. .Qin(),
  17074. .Clk(),
  17075. .AsyncReset(),
  17076. .SyncReset(),
  17077. .ShiftData(),
  17078. .SyncLoad(),
  17079. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  17080. .Cout(),
  17081. .Q());
  17082. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_x = 12;
  17083. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_y = 4;
  17084. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .coord_z = 6;
  17085. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .mask = 16'h268C;
  17086. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .modeMux = 1'b0;
  17087. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .FeedbackMux = 1'b0;
  17088. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .ShiftMux = 1'b0;
  17089. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .BypassEn = 1'b0;
  17090. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[2] .CarryEnb = 1'b1;
  17091. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] (
  17092. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17093. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17094. .C(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17095. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17096. .Cin(),
  17097. .Qin(),
  17098. .Clk(),
  17099. .AsyncReset(),
  17100. .SyncReset(),
  17101. .ShiftData(),
  17102. .SyncLoad(),
  17103. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  17104. .Cout(),
  17105. .Q());
  17106. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_x = 12;
  17107. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_y = 4;
  17108. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .coord_z = 14;
  17109. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .mask = 16'h286C;
  17110. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .modeMux = 1'b0;
  17111. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .FeedbackMux = 1'b0;
  17112. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .ShiftMux = 1'b0;
  17113. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .BypassEn = 1'b0;
  17114. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[3] .CarryEnb = 1'b1;
  17115. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] (
  17116. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17117. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17118. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17119. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17120. .Cin(),
  17121. .Qin(),
  17122. .Clk(),
  17123. .AsyncReset(),
  17124. .SyncReset(),
  17125. .ShiftData(),
  17126. .SyncLoad(),
  17127. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  17128. .Cout(),
  17129. .Q());
  17130. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_x = 12;
  17131. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_y = 4;
  17132. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .coord_z = 3;
  17133. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .mask = 16'h34C4;
  17134. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .modeMux = 1'b0;
  17135. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .FeedbackMux = 1'b0;
  17136. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .ShiftMux = 1'b0;
  17137. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .BypassEn = 1'b0;
  17138. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[4] .CarryEnb = 1'b1;
  17139. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] (
  17140. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17141. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17142. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17143. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17144. .Cin(),
  17145. .Qin(),
  17146. .Clk(),
  17147. .AsyncReset(),
  17148. .SyncReset(),
  17149. .ShiftData(),
  17150. .SyncLoad(),
  17151. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [5]),
  17152. .Cout(),
  17153. .Q());
  17154. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_x = 11;
  17155. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_y = 3;
  17156. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .coord_z = 5;
  17157. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .mask = 16'h286C;
  17158. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .modeMux = 1'b0;
  17159. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .FeedbackMux = 1'b0;
  17160. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .ShiftMux = 1'b0;
  17161. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .BypassEn = 1'b0;
  17162. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[5] .CarryEnb = 1'b1;
  17163. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] (
  17164. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17165. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17166. .C(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17167. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17168. .Cin(),
  17169. .Qin(),
  17170. .Clk(),
  17171. .AsyncReset(),
  17172. .SyncReset(),
  17173. .ShiftData(),
  17174. .SyncLoad(),
  17175. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [6]),
  17176. .Cout(),
  17177. .Q());
  17178. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_x = 11;
  17179. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_y = 3;
  17180. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .coord_z = 7;
  17181. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .mask = 16'h268C;
  17182. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .modeMux = 1'b0;
  17183. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .FeedbackMux = 1'b0;
  17184. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .ShiftMux = 1'b0;
  17185. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .BypassEn = 1'b0;
  17186. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[6] .CarryEnb = 1'b1;
  17187. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] (
  17188. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17189. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17190. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17191. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17192. .Cin(),
  17193. .Qin(),
  17194. .Clk(),
  17195. .AsyncReset(),
  17196. .SyncReset(),
  17197. .ShiftData(),
  17198. .SyncLoad(),
  17199. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [7]),
  17200. .Cout(),
  17201. .Q());
  17202. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_x = 11;
  17203. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_y = 3;
  17204. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .coord_z = 12;
  17205. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .mask = 16'h606C;
  17206. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .modeMux = 1'b0;
  17207. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .FeedbackMux = 1'b0;
  17208. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .ShiftMux = 1'b0;
  17209. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .BypassEn = 1'b0;
  17210. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[7] .CarryEnb = 1'b1;
  17211. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] (
  17212. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17213. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17214. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17215. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17216. .Cin(),
  17217. .Qin(),
  17218. .Clk(),
  17219. .AsyncReset(),
  17220. .SyncReset(),
  17221. .ShiftData(),
  17222. .SyncLoad(),
  17223. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [8]),
  17224. .Cout(),
  17225. .Q());
  17226. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_x = 10;
  17227. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_y = 4;
  17228. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .coord_z = 11;
  17229. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .mask = 16'h1DC0;
  17230. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .modeMux = 1'b0;
  17231. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .FeedbackMux = 1'b0;
  17232. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .ShiftMux = 1'b0;
  17233. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .BypassEn = 1'b0;
  17234. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[8] .CarryEnb = 1'b1;
  17235. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] (
  17236. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[2]~1_combout ),
  17237. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  17238. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17239. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  17240. .Cin(),
  17241. .Qin(),
  17242. .Clk(),
  17243. .AsyncReset(),
  17244. .SyncReset(),
  17245. .ShiftData(),
  17246. .SyncLoad(),
  17247. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [9]),
  17248. .Cout(),
  17249. .Q());
  17250. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_x = 10;
  17251. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_y = 4;
  17252. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .coord_z = 9;
  17253. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .mask = 16'h2788;
  17254. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .modeMux = 1'b0;
  17255. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .FeedbackMux = 1'b0;
  17256. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .ShiftMux = 1'b0;
  17257. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .BypassEn = 1'b0;
  17258. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a[9] .CarryEnb = 1'b1;
  17259. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] (
  17260. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  17261. .B(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17262. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  17263. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  17264. .Cin(),
  17265. .Qin(),
  17266. .Clk(),
  17267. .AsyncReset(),
  17268. .SyncReset(),
  17269. .ShiftData(),
  17270. .SyncLoad(),
  17271. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  17272. .Cout(),
  17273. .Q());
  17274. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_x = 12;
  17275. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_y = 4;
  17276. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .coord_z = 15;
  17277. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .mask = 16'h17E8;
  17278. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .modeMux = 1'b0;
  17279. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .FeedbackMux = 1'b0;
  17280. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .ShiftMux = 1'b0;
  17281. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .BypassEn = 1'b0;
  17282. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[0] .CarryEnb = 1'b1;
  17283. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] (
  17284. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  17285. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  17286. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  17287. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  17288. .Cin(),
  17289. .Qin(),
  17290. .Clk(),
  17291. .AsyncReset(),
  17292. .SyncReset(),
  17293. .ShiftData(),
  17294. .SyncLoad(),
  17295. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  17296. .Cout(),
  17297. .Q());
  17298. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_x = 12;
  17299. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_y = 4;
  17300. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .coord_z = 13;
  17301. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .mask = 16'h5B20;
  17302. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .modeMux = 1'b0;
  17303. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .FeedbackMux = 1'b0;
  17304. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .ShiftMux = 1'b0;
  17305. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .BypassEn = 1'b0;
  17306. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[10] .CarryEnb = 1'b1;
  17307. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] (
  17308. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[2]~0_combout ),
  17309. .B(vcc),
  17310. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  17311. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  17312. .Cin(),
  17313. .Qin(),
  17314. .Clk(),
  17315. .AsyncReset(),
  17316. .SyncReset(),
  17317. .ShiftData(),
  17318. .SyncLoad(),
  17319. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17320. .Cout(),
  17321. .Q());
  17322. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_x = 12;
  17323. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_y = 4;
  17324. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .coord_z = 10;
  17325. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .mask = 16'h5FA0;
  17326. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .modeMux = 1'b0;
  17327. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .FeedbackMux = 1'b0;
  17328. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .ShiftMux = 1'b0;
  17329. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .BypassEn = 1'b0;
  17330. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[11] .CarryEnb = 1'b1;
  17331. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] (
  17332. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17333. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17334. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17335. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17336. .Cin(),
  17337. .Qin(),
  17338. .Clk(),
  17339. .AsyncReset(),
  17340. .SyncReset(),
  17341. .ShiftData(),
  17342. .SyncLoad(),
  17343. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  17344. .Cout(),
  17345. .Q());
  17346. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_x = 12;
  17347. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_y = 4;
  17348. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .coord_z = 2;
  17349. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .mask = 16'h286C;
  17350. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .modeMux = 1'b0;
  17351. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .FeedbackMux = 1'b0;
  17352. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .ShiftMux = 1'b0;
  17353. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .BypassEn = 1'b0;
  17354. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[1] .CarryEnb = 1'b1;
  17355. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] (
  17356. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17357. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17358. .C(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17359. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17360. .Cin(),
  17361. .Qin(),
  17362. .Clk(),
  17363. .AsyncReset(),
  17364. .SyncReset(),
  17365. .ShiftData(),
  17366. .SyncLoad(),
  17367. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  17368. .Cout(),
  17369. .Q());
  17370. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_x = 12;
  17371. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_y = 4;
  17372. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .coord_z = 7;
  17373. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .mask = 16'h268C;
  17374. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .modeMux = 1'b0;
  17375. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .FeedbackMux = 1'b0;
  17376. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .ShiftMux = 1'b0;
  17377. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .BypassEn = 1'b0;
  17378. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[2] .CarryEnb = 1'b1;
  17379. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] (
  17380. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17381. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17382. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17383. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17384. .Cin(),
  17385. .Qin(),
  17386. .Clk(),
  17387. .AsyncReset(),
  17388. .SyncReset(),
  17389. .ShiftData(),
  17390. .SyncLoad(),
  17391. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [3]),
  17392. .Cout(),
  17393. .Q());
  17394. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_x = 12;
  17395. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_y = 4;
  17396. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .coord_z = 11;
  17397. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .mask = 16'h606C;
  17398. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .modeMux = 1'b0;
  17399. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .FeedbackMux = 1'b0;
  17400. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .ShiftMux = 1'b0;
  17401. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .BypassEn = 1'b0;
  17402. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[3] .CarryEnb = 1'b1;
  17403. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] (
  17404. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17405. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17406. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17407. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17408. .Cin(),
  17409. .Qin(),
  17410. .Clk(),
  17411. .AsyncReset(),
  17412. .SyncReset(),
  17413. .ShiftData(),
  17414. .SyncLoad(),
  17415. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [4]),
  17416. .Cout(),
  17417. .Q());
  17418. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_x = 7;
  17419. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_y = 1;
  17420. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .coord_z = 14;
  17421. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .mask = 16'h5A30;
  17422. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .modeMux = 1'b0;
  17423. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .FeedbackMux = 1'b0;
  17424. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .ShiftMux = 1'b0;
  17425. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .BypassEn = 1'b0;
  17426. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[4] .CarryEnb = 1'b1;
  17427. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] (
  17428. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17429. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17430. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17431. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17432. .Cin(),
  17433. .Qin(),
  17434. .Clk(),
  17435. .AsyncReset(),
  17436. .SyncReset(),
  17437. .ShiftData(),
  17438. .SyncLoad(),
  17439. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [5]),
  17440. .Cout(),
  17441. .Q());
  17442. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_x = 11;
  17443. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_y = 3;
  17444. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .coord_z = 9;
  17445. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .mask = 16'h4878;
  17446. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .modeMux = 1'b0;
  17447. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .FeedbackMux = 1'b0;
  17448. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .ShiftMux = 1'b0;
  17449. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .BypassEn = 1'b0;
  17450. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[5] .CarryEnb = 1'b1;
  17451. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] (
  17452. .A(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17453. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17454. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17455. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17456. .Cin(),
  17457. .Qin(),
  17458. .Clk(),
  17459. .AsyncReset(),
  17460. .SyncReset(),
  17461. .ShiftData(),
  17462. .SyncLoad(),
  17463. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [6]),
  17464. .Cout(),
  17465. .Q());
  17466. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_x = 11;
  17467. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_y = 3;
  17468. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .coord_z = 15;
  17469. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .mask = 16'h1CD0;
  17470. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .modeMux = 1'b0;
  17471. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .FeedbackMux = 1'b0;
  17472. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .ShiftMux = 1'b0;
  17473. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .BypassEn = 1'b0;
  17474. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[6] .CarryEnb = 1'b1;
  17475. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] (
  17476. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17477. .B(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17478. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17479. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17480. .Cin(),
  17481. .Qin(),
  17482. .Clk(),
  17483. .AsyncReset(),
  17484. .SyncReset(),
  17485. .ShiftData(),
  17486. .SyncLoad(),
  17487. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [7]),
  17488. .Cout(),
  17489. .Q());
  17490. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_x = 11;
  17491. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_y = 3;
  17492. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .coord_z = 3;
  17493. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .mask = 16'h5A30;
  17494. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .modeMux = 1'b0;
  17495. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .FeedbackMux = 1'b0;
  17496. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .ShiftMux = 1'b0;
  17497. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .BypassEn = 1'b0;
  17498. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[7] .CarryEnb = 1'b1;
  17499. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] (
  17500. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17501. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17502. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17503. .D(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17504. .Cin(),
  17505. .Qin(),
  17506. .Clk(),
  17507. .AsyncReset(),
  17508. .SyncReset(),
  17509. .ShiftData(),
  17510. .SyncLoad(),
  17511. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [8]),
  17512. .Cout(),
  17513. .Q());
  17514. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_x = 11;
  17515. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_y = 3;
  17516. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .coord_z = 14;
  17517. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .mask = 16'h34C4;
  17518. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .modeMux = 1'b0;
  17519. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .FeedbackMux = 1'b0;
  17520. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .ShiftMux = 1'b0;
  17521. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .BypassEn = 1'b0;
  17522. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[8] .CarryEnb = 1'b1;
  17523. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] (
  17524. .A(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  17525. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  17526. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17527. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs3a[3]~0_combout ),
  17528. .Cin(),
  17529. .Qin(),
  17530. .Clk(),
  17531. .AsyncReset(),
  17532. .SyncReset(),
  17533. .ShiftData(),
  17534. .SyncLoad(),
  17535. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [9]),
  17536. .Cout(),
  17537. .Q());
  17538. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_x = 12;
  17539. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_y = 3;
  17540. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .coord_z = 14;
  17541. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .mask = 16'h660C;
  17542. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .modeMux = 1'b0;
  17543. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .FeedbackMux = 1'b0;
  17544. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .ShiftMux = 1'b0;
  17545. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .BypassEn = 1'b0;
  17546. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a[9] .CarryEnb = 1'b1;
  17547. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] (
  17548. .A(vcc),
  17549. .B(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17550. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17551. .D(vcc),
  17552. .Cin(),
  17553. .Qin(),
  17554. .Clk(),
  17555. .AsyncReset(),
  17556. .SyncReset(),
  17557. .ShiftData(),
  17558. .SyncLoad(),
  17559. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  17560. .Cout(),
  17561. .Q());
  17562. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_x = 11;
  17563. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_y = 2;
  17564. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .coord_z = 5;
  17565. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .mask = 16'hC0C0;
  17566. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .modeMux = 1'b0;
  17567. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .FeedbackMux = 1'b0;
  17568. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .ShiftMux = 1'b0;
  17569. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .BypassEn = 1'b0;
  17570. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[0] .CarryEnb = 1'b1;
  17571. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] (
  17572. .A(vcc),
  17573. .B(vcc),
  17574. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17575. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  17576. .Cin(),
  17577. .Qin(),
  17578. .Clk(),
  17579. .AsyncReset(),
  17580. .SyncReset(),
  17581. .ShiftData(),
  17582. .SyncLoad(),
  17583. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  17584. .Cout(),
  17585. .Q());
  17586. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_x = 12;
  17587. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_y = 1;
  17588. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .coord_z = 14;
  17589. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .mask = 16'hF000;
  17590. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .modeMux = 1'b0;
  17591. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .FeedbackMux = 1'b0;
  17592. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .ShiftMux = 1'b0;
  17593. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .BypassEn = 1'b0;
  17594. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[10] .CarryEnb = 1'b1;
  17595. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] (
  17596. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17597. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17598. .C(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17599. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17600. .Cin(),
  17601. .Qin(),
  17602. .Clk(),
  17603. .AsyncReset(),
  17604. .SyncReset(),
  17605. .ShiftData(),
  17606. .SyncLoad(),
  17607. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  17608. .Cout(),
  17609. .Q());
  17610. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_x = 7;
  17611. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_y = 3;
  17612. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .coord_z = 10;
  17613. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .mask = 16'hECA0;
  17614. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .modeMux = 1'b0;
  17615. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .FeedbackMux = 1'b0;
  17616. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .ShiftMux = 1'b0;
  17617. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .BypassEn = 1'b0;
  17618. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[1] .CarryEnb = 1'b1;
  17619. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] (
  17620. .A(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17621. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17622. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17623. .D(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17624. .Cin(),
  17625. .Qin(),
  17626. .Clk(),
  17627. .AsyncReset(),
  17628. .SyncReset(),
  17629. .ShiftData(),
  17630. .SyncLoad(),
  17631. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  17632. .Cout(),
  17633. .Q());
  17634. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_x = 7;
  17635. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_y = 3;
  17636. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .coord_z = 3;
  17637. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .mask = 16'hF888;
  17638. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .modeMux = 1'b0;
  17639. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .FeedbackMux = 1'b0;
  17640. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .ShiftMux = 1'b0;
  17641. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .BypassEn = 1'b0;
  17642. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[2] .CarryEnb = 1'b1;
  17643. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] (
  17644. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17645. .B(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17646. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17647. .D(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17648. .Cin(),
  17649. .Qin(),
  17650. .Clk(),
  17651. .AsyncReset(),
  17652. .SyncReset(),
  17653. .ShiftData(),
  17654. .SyncLoad(),
  17655. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [3]),
  17656. .Cout(),
  17657. .Q());
  17658. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_x = 12;
  17659. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_y = 4;
  17660. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .coord_z = 1;
  17661. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .mask = 16'hF888;
  17662. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .modeMux = 1'b0;
  17663. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .FeedbackMux = 1'b0;
  17664. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .ShiftMux = 1'b0;
  17665. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .BypassEn = 1'b0;
  17666. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[3] .CarryEnb = 1'b1;
  17667. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] (
  17668. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17669. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17670. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17671. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17672. .Cin(),
  17673. .Qin(),
  17674. .Clk(),
  17675. .AsyncReset(),
  17676. .SyncReset(),
  17677. .ShiftData(),
  17678. .SyncLoad(),
  17679. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [4]),
  17680. .Cout(),
  17681. .Q());
  17682. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_x = 12;
  17683. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_y = 1;
  17684. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .coord_z = 10;
  17685. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .mask = 16'hECA0;
  17686. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .modeMux = 1'b0;
  17687. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .FeedbackMux = 1'b0;
  17688. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .ShiftMux = 1'b0;
  17689. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .BypassEn = 1'b0;
  17690. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[4] .CarryEnb = 1'b1;
  17691. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] (
  17692. .A(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17693. .B(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17694. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17695. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17696. .Cin(),
  17697. .Qin(),
  17698. .Clk(),
  17699. .AsyncReset(),
  17700. .SyncReset(),
  17701. .ShiftData(),
  17702. .SyncLoad(),
  17703. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [5]),
  17704. .Cout(),
  17705. .Q());
  17706. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_x = 7;
  17707. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_y = 1;
  17708. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .coord_z = 13;
  17709. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .mask = 16'hECA0;
  17710. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .modeMux = 1'b0;
  17711. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .FeedbackMux = 1'b0;
  17712. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .ShiftMux = 1'b0;
  17713. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .BypassEn = 1'b0;
  17714. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[5] .CarryEnb = 1'b1;
  17715. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] (
  17716. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17717. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17718. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17719. .D(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17720. .Cin(),
  17721. .Qin(),
  17722. .Clk(),
  17723. .AsyncReset(),
  17724. .SyncReset(),
  17725. .ShiftData(),
  17726. .SyncLoad(),
  17727. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  17728. .Cout(),
  17729. .Q());
  17730. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_x = 7;
  17731. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_y = 3;
  17732. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .coord_z = 15;
  17733. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .mask = 16'hEAC0;
  17734. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .modeMux = 1'b0;
  17735. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .FeedbackMux = 1'b0;
  17736. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .ShiftMux = 1'b0;
  17737. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .BypassEn = 1'b0;
  17738. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[6] .CarryEnb = 1'b1;
  17739. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] (
  17740. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17741. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17742. .C(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17743. .D(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17744. .Cin(),
  17745. .Qin(),
  17746. .Clk(),
  17747. .AsyncReset(),
  17748. .SyncReset(),
  17749. .ShiftData(),
  17750. .SyncLoad(),
  17751. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  17752. .Cout(),
  17753. .Q());
  17754. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_x = 7;
  17755. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_y = 3;
  17756. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .coord_z = 11;
  17757. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .mask = 16'hEAC0;
  17758. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .modeMux = 1'b0;
  17759. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .FeedbackMux = 1'b0;
  17760. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .ShiftMux = 1'b0;
  17761. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .BypassEn = 1'b0;
  17762. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[7] .CarryEnb = 1'b1;
  17763. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] (
  17764. .A(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17765. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17766. .C(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17767. .D(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17768. .Cin(),
  17769. .Qin(),
  17770. .Clk(),
  17771. .AsyncReset(),
  17772. .SyncReset(),
  17773. .ShiftData(),
  17774. .SyncLoad(),
  17775. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  17776. .Cout(),
  17777. .Q());
  17778. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_x = 7;
  17779. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_y = 3;
  17780. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .coord_z = 8;
  17781. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .mask = 16'hECA0;
  17782. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .modeMux = 1'b0;
  17783. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .FeedbackMux = 1'b0;
  17784. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .ShiftMux = 1'b0;
  17785. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .BypassEn = 1'b0;
  17786. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[8] .CarryEnb = 1'b1;
  17787. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] (
  17788. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|cs2a[4]~2_combout ),
  17789. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~9_combout ),
  17790. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  17791. .D(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  17792. .Cin(),
  17793. .Qin(),
  17794. .Clk(),
  17795. .AsyncReset(),
  17796. .SyncReset(),
  17797. .ShiftData(),
  17798. .SyncLoad(),
  17799. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  17800. .Cout(),
  17801. .Q());
  17802. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_x = 12;
  17803. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_y = 1;
  17804. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .coord_z = 11;
  17805. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .mask = 16'hECA0;
  17806. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .modeMux = 1'b0;
  17807. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .FeedbackMux = 1'b0;
  17808. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .ShiftMux = 1'b0;
  17809. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .BypassEn = 1'b0;
  17810. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a[9] .CarryEnb = 1'b1;
  17811. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] (
  17812. .A(vcc),
  17813. .B(vcc),
  17814. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  17815. .D(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  17816. .Cin(),
  17817. .Qin(),
  17818. .Clk(),
  17819. .AsyncReset(),
  17820. .SyncReset(),
  17821. .ShiftData(),
  17822. .SyncLoad(),
  17823. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [0]),
  17824. .Cout(),
  17825. .Q());
  17826. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_x = 12;
  17827. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_y = 2;
  17828. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .coord_z = 3;
  17829. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .mask = 16'hF000;
  17830. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .modeMux = 1'b0;
  17831. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .FeedbackMux = 1'b0;
  17832. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .ShiftMux = 1'b0;
  17833. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .BypassEn = 1'b0;
  17834. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[0] .CarryEnb = 1'b1;
  17835. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] (
  17836. .A(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  17837. .B(vcc),
  17838. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  17839. .D(vcc),
  17840. .Cin(),
  17841. .Qin(),
  17842. .Clk(),
  17843. .AsyncReset(),
  17844. .SyncReset(),
  17845. .ShiftData(),
  17846. .SyncLoad(),
  17847. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [1]),
  17848. .Cout(),
  17849. .Q());
  17850. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_x = 12;
  17851. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_y = 2;
  17852. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .coord_z = 5;
  17853. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .mask = 16'hA0A0;
  17854. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .modeMux = 1'b0;
  17855. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .FeedbackMux = 1'b0;
  17856. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .ShiftMux = 1'b0;
  17857. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .BypassEn = 1'b0;
  17858. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[1] .CarryEnb = 1'b1;
  17859. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] (
  17860. .A(vcc),
  17861. .B(vcc),
  17862. .C(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  17863. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  17864. .Cin(),
  17865. .Qin(),
  17866. .Clk(),
  17867. .AsyncReset(),
  17868. .SyncReset(),
  17869. .ShiftData(),
  17870. .SyncLoad(),
  17871. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [2]),
  17872. .Cout(),
  17873. .Q());
  17874. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_x = 7;
  17875. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_y = 3;
  17876. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .coord_z = 9;
  17877. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .mask = 16'hF000;
  17878. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .modeMux = 1'b0;
  17879. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .FeedbackMux = 1'b0;
  17880. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .ShiftMux = 1'b0;
  17881. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .BypassEn = 1'b0;
  17882. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[2] .CarryEnb = 1'b1;
  17883. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] (
  17884. .A(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  17885. .B(vcc),
  17886. .C(vcc),
  17887. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  17888. .Cin(),
  17889. .Qin(),
  17890. .Clk(),
  17891. .AsyncReset(),
  17892. .SyncReset(),
  17893. .ShiftData(),
  17894. .SyncLoad(),
  17895. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [3]),
  17896. .Cout(),
  17897. .Q());
  17898. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_x = 11;
  17899. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_y = 1;
  17900. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .coord_z = 14;
  17901. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .mask = 16'hAA00;
  17902. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .modeMux = 1'b0;
  17903. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .FeedbackMux = 1'b0;
  17904. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .ShiftMux = 1'b0;
  17905. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .BypassEn = 1'b0;
  17906. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[3] .CarryEnb = 1'b1;
  17907. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] (
  17908. .A(vcc),
  17909. .B(vcc),
  17910. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  17911. .D(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  17912. .Cin(),
  17913. .Qin(),
  17914. .Clk(),
  17915. .AsyncReset(),
  17916. .SyncReset(),
  17917. .ShiftData(),
  17918. .SyncLoad(),
  17919. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [4]),
  17920. .Cout(),
  17921. .Q());
  17922. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_x = 12;
  17923. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_y = 1;
  17924. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .coord_z = 9;
  17925. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .mask = 16'hF000;
  17926. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .modeMux = 1'b0;
  17927. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .FeedbackMux = 1'b0;
  17928. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .ShiftMux = 1'b0;
  17929. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .BypassEn = 1'b0;
  17930. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[4] .CarryEnb = 1'b1;
  17931. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] (
  17932. .A(vcc),
  17933. .B(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  17934. .C(vcc),
  17935. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  17936. .Cin(),
  17937. .Qin(),
  17938. .Clk(),
  17939. .AsyncReset(),
  17940. .SyncReset(),
  17941. .ShiftData(),
  17942. .SyncLoad(),
  17943. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [5]),
  17944. .Cout(),
  17945. .Q());
  17946. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_x = 11;
  17947. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_y = 1;
  17948. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .coord_z = 11;
  17949. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .mask = 16'hCC00;
  17950. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .modeMux = 1'b0;
  17951. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .FeedbackMux = 1'b0;
  17952. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .ShiftMux = 1'b0;
  17953. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .BypassEn = 1'b0;
  17954. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[5] .CarryEnb = 1'b1;
  17955. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] (
  17956. .A(vcc),
  17957. .B(vcc),
  17958. .C(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  17959. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  17960. .Cin(),
  17961. .Qin(),
  17962. .Clk(),
  17963. .AsyncReset(),
  17964. .SyncReset(),
  17965. .ShiftData(),
  17966. .SyncLoad(),
  17967. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [6]),
  17968. .Cout(),
  17969. .Q());
  17970. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_x = 11;
  17971. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_y = 1;
  17972. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .coord_z = 15;
  17973. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .mask = 16'hF000;
  17974. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .modeMux = 1'b0;
  17975. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .FeedbackMux = 1'b0;
  17976. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .ShiftMux = 1'b0;
  17977. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .BypassEn = 1'b0;
  17978. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[6] .CarryEnb = 1'b1;
  17979. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] (
  17980. .A(vcc),
  17981. .B(vcc),
  17982. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  17983. .D(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  17984. .Cin(),
  17985. .Qin(),
  17986. .Clk(),
  17987. .AsyncReset(),
  17988. .SyncReset(),
  17989. .ShiftData(),
  17990. .SyncLoad(),
  17991. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [7]),
  17992. .Cout(),
  17993. .Q());
  17994. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_x = 12;
  17995. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_y = 1;
  17996. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .coord_z = 13;
  17997. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .mask = 16'hF000;
  17998. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .modeMux = 1'b0;
  17999. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .FeedbackMux = 1'b0;
  18000. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .ShiftMux = 1'b0;
  18001. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .BypassEn = 1'b0;
  18002. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[7] .CarryEnb = 1'b1;
  18003. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] (
  18004. .A(vcc),
  18005. .B(vcc),
  18006. .C(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  18007. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  18008. .Cin(),
  18009. .Qin(),
  18010. .Clk(),
  18011. .AsyncReset(),
  18012. .SyncReset(),
  18013. .ShiftData(),
  18014. .SyncLoad(),
  18015. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [8]),
  18016. .Cout(),
  18017. .Q());
  18018. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_x = 12;
  18019. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_y = 1;
  18020. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .coord_z = 12;
  18021. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .mask = 16'hF000;
  18022. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .modeMux = 1'b0;
  18023. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .FeedbackMux = 1'b0;
  18024. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .ShiftMux = 1'b0;
  18025. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .BypassEn = 1'b0;
  18026. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[8] .CarryEnb = 1'b1;
  18027. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] (
  18028. .A(vcc),
  18029. .B(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  18030. .C(vcc),
  18031. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  18032. .Cin(),
  18033. .Qin(),
  18034. .Clk(),
  18035. .AsyncReset(),
  18036. .SyncReset(),
  18037. .ShiftData(),
  18038. .SyncLoad(),
  18039. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [9]),
  18040. .Cout(),
  18041. .Q());
  18042. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_x = 12;
  18043. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_y = 1;
  18044. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .coord_z = 15;
  18045. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .mask = 16'hCC00;
  18046. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .modeMux = 1'b0;
  18047. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .FeedbackMux = 1'b0;
  18048. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .ShiftMux = 1'b0;
  18049. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .BypassEn = 1'b0;
  18050. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a[9] .CarryEnb = 1'b1;
  18051. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 (
  18052. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [0]),
  18053. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  18054. .C(vcc),
  18055. .D(vcc),
  18056. .Cin(),
  18057. .Qin(),
  18058. .Clk(),
  18059. .AsyncReset(),
  18060. .SyncReset(),
  18061. .ShiftData(),
  18062. .SyncLoad(),
  18063. .LutOut(),
  18064. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ),
  18065. .Q());
  18066. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_x = 11;
  18067. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_y = 2;
  18068. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .coord_z = 6;
  18069. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .mask = 16'h0088;
  18070. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .modeMux = 1'b0;
  18071. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .FeedbackMux = 1'b0;
  18072. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .ShiftMux = 1'b0;
  18073. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .BypassEn = 1'b0;
  18074. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1 .CarryEnb = 1'b0;
  18075. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 (
  18076. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ),
  18077. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ),
  18078. .C(vcc),
  18079. .D(vcc),
  18080. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ),
  18081. .Qin(),
  18082. .Clk(),
  18083. .AsyncReset(),
  18084. .SyncReset(),
  18085. .ShiftData(),
  18086. .SyncLoad(),
  18087. .LutOut(),
  18088. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ),
  18089. .Q());
  18090. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_x = 11;
  18091. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_y = 2;
  18092. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .coord_z = 11;
  18093. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .mask = 16'h0017;
  18094. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .modeMux = 1'b1;
  18095. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .FeedbackMux = 1'b0;
  18096. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .ShiftMux = 1'b0;
  18097. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .BypassEn = 1'b0;
  18098. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11 .CarryEnb = 1'b0;
  18099. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 (
  18100. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ),
  18101. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ),
  18102. .C(vcc),
  18103. .D(vcc),
  18104. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~11_cout ),
  18105. .Qin(),
  18106. .Clk(),
  18107. .AsyncReset(),
  18108. .SyncReset(),
  18109. .ShiftData(),
  18110. .SyncLoad(),
  18111. .LutOut(),
  18112. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ),
  18113. .Q());
  18114. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_x = 11;
  18115. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_y = 2;
  18116. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .coord_z = 12;
  18117. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .mask = 16'h008E;
  18118. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .modeMux = 1'b1;
  18119. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .FeedbackMux = 1'b0;
  18120. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .ShiftMux = 1'b0;
  18121. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .BypassEn = 1'b0;
  18122. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13 .CarryEnb = 1'b0;
  18123. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 (
  18124. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ),
  18125. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ),
  18126. .C(vcc),
  18127. .D(vcc),
  18128. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~13_cout ),
  18129. .Qin(),
  18130. .Clk(),
  18131. .AsyncReset(),
  18132. .SyncReset(),
  18133. .ShiftData(),
  18134. .SyncLoad(),
  18135. .LutOut(),
  18136. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ),
  18137. .Q());
  18138. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_x = 11;
  18139. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_y = 2;
  18140. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .coord_z = 13;
  18141. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .mask = 16'h0017;
  18142. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .modeMux = 1'b1;
  18143. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .FeedbackMux = 1'b0;
  18144. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .ShiftMux = 1'b0;
  18145. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .BypassEn = 1'b0;
  18146. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15 .CarryEnb = 1'b0;
  18147. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 (
  18148. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ),
  18149. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ),
  18150. .C(vcc),
  18151. .D(vcc),
  18152. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~15_cout ),
  18153. .Qin(),
  18154. .Clk(),
  18155. .AsyncReset(),
  18156. .SyncReset(),
  18157. .ShiftData(),
  18158. .SyncLoad(),
  18159. .LutOut(),
  18160. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ),
  18161. .Q());
  18162. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_x = 11;
  18163. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_y = 2;
  18164. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .coord_z = 14;
  18165. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .mask = 16'h008E;
  18166. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .modeMux = 1'b1;
  18167. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .FeedbackMux = 1'b0;
  18168. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .ShiftMux = 1'b0;
  18169. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .BypassEn = 1'b0;
  18170. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17 .CarryEnb = 1'b0;
  18171. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 (
  18172. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ),
  18173. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ),
  18174. .C(vcc),
  18175. .D(vcc),
  18176. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~17_cout ),
  18177. .Qin(),
  18178. .Clk(),
  18179. .AsyncReset(),
  18180. .SyncReset(),
  18181. .ShiftData(),
  18182. .SyncLoad(),
  18183. .LutOut(),
  18184. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ),
  18185. .Q());
  18186. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_x = 11;
  18187. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_y = 2;
  18188. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .coord_z = 15;
  18189. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .mask = 16'h0017;
  18190. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .modeMux = 1'b1;
  18191. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .FeedbackMux = 1'b0;
  18192. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .ShiftMux = 1'b0;
  18193. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .BypassEn = 1'b0;
  18194. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19 .CarryEnb = 1'b0;
  18195. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 (
  18196. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ),
  18197. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ),
  18198. .C(vcc),
  18199. .D(vcc),
  18200. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~19_cout ),
  18201. .Qin(),
  18202. .Clk(),
  18203. .AsyncReset(),
  18204. .SyncReset(),
  18205. .ShiftData(),
  18206. .SyncLoad(),
  18207. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20_combout ),
  18208. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  18209. .Q());
  18210. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_x = 11;
  18211. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_y = 1;
  18212. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .coord_z = 0;
  18213. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .mask = 16'h698E;
  18214. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .modeMux = 1'b1;
  18215. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .FeedbackMux = 1'b0;
  18216. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .ShiftMux = 1'b0;
  18217. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .BypassEn = 1'b0;
  18218. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~20 .CarryEnb = 1'b0;
  18219. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 (
  18220. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ),
  18221. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ),
  18222. .C(vcc),
  18223. .D(vcc),
  18224. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~21 ),
  18225. .Qin(),
  18226. .Clk(),
  18227. .AsyncReset(),
  18228. .SyncReset(),
  18229. .ShiftData(),
  18230. .SyncLoad(),
  18231. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22_combout ),
  18232. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  18233. .Q());
  18234. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_x = 11;
  18235. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_y = 1;
  18236. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .coord_z = 1;
  18237. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .mask = 16'h9617;
  18238. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .modeMux = 1'b1;
  18239. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .FeedbackMux = 1'b0;
  18240. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .ShiftMux = 1'b0;
  18241. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .BypassEn = 1'b0;
  18242. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~22 .CarryEnb = 1'b0;
  18243. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 (
  18244. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ),
  18245. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ),
  18246. .C(vcc),
  18247. .D(vcc),
  18248. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~23 ),
  18249. .Qin(),
  18250. .Clk(),
  18251. .AsyncReset(),
  18252. .SyncReset(),
  18253. .ShiftData(),
  18254. .SyncLoad(),
  18255. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24_combout ),
  18256. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  18257. .Q());
  18258. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_x = 11;
  18259. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_y = 1;
  18260. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .coord_z = 2;
  18261. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .mask = 16'h698E;
  18262. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .modeMux = 1'b1;
  18263. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .FeedbackMux = 1'b0;
  18264. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .ShiftMux = 1'b0;
  18265. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .BypassEn = 1'b0;
  18266. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~24 .CarryEnb = 1'b0;
  18267. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 (
  18268. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ),
  18269. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ),
  18270. .C(vcc),
  18271. .D(vcc),
  18272. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~25 ),
  18273. .Qin(),
  18274. .Clk(),
  18275. .AsyncReset(),
  18276. .SyncReset(),
  18277. .ShiftData(),
  18278. .SyncLoad(),
  18279. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26_combout ),
  18280. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  18281. .Q());
  18282. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_x = 11;
  18283. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_y = 1;
  18284. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .coord_z = 3;
  18285. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .mask = 16'h9617;
  18286. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .modeMux = 1'b1;
  18287. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .FeedbackMux = 1'b0;
  18288. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .ShiftMux = 1'b0;
  18289. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .BypassEn = 1'b0;
  18290. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~26 .CarryEnb = 1'b0;
  18291. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 (
  18292. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ),
  18293. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ),
  18294. .C(vcc),
  18295. .D(vcc),
  18296. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~27 ),
  18297. .Qin(),
  18298. .Clk(),
  18299. .AsyncReset(),
  18300. .SyncReset(),
  18301. .ShiftData(),
  18302. .SyncLoad(),
  18303. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28_combout ),
  18304. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  18305. .Q());
  18306. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_x = 11;
  18307. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_y = 1;
  18308. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .coord_z = 4;
  18309. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .mask = 16'h698E;
  18310. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .modeMux = 1'b1;
  18311. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .FeedbackMux = 1'b0;
  18312. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .ShiftMux = 1'b0;
  18313. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .BypassEn = 1'b0;
  18314. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~28 .CarryEnb = 1'b0;
  18315. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 (
  18316. .A(vcc),
  18317. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [1]),
  18318. .C(vcc),
  18319. .D(vcc),
  18320. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~1_cout ),
  18321. .Qin(),
  18322. .Clk(),
  18323. .AsyncReset(),
  18324. .SyncReset(),
  18325. .ShiftData(),
  18326. .SyncLoad(),
  18327. .LutOut(),
  18328. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ),
  18329. .Q());
  18330. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_x = 11;
  18331. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_y = 2;
  18332. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .coord_z = 7;
  18333. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .mask = 16'h003F;
  18334. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .modeMux = 1'b1;
  18335. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .FeedbackMux = 1'b0;
  18336. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .ShiftMux = 1'b0;
  18337. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .BypassEn = 1'b0;
  18338. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3 .CarryEnb = 1'b0;
  18339. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 (
  18340. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ),
  18341. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ),
  18342. .C(vcc),
  18343. .D(vcc),
  18344. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~29 ),
  18345. .Qin(),
  18346. .Clk(),
  18347. .AsyncReset(),
  18348. .SyncReset(),
  18349. .ShiftData(),
  18350. .SyncLoad(),
  18351. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30_combout ),
  18352. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  18353. .Q());
  18354. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_x = 11;
  18355. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_y = 1;
  18356. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .coord_z = 5;
  18357. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .mask = 16'h9617;
  18358. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .modeMux = 1'b1;
  18359. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .FeedbackMux = 1'b0;
  18360. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .ShiftMux = 1'b0;
  18361. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .BypassEn = 1'b0;
  18362. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~30 .CarryEnb = 1'b0;
  18363. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 (
  18364. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ),
  18365. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ),
  18366. .C(vcc),
  18367. .D(vcc),
  18368. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~31 ),
  18369. .Qin(),
  18370. .Clk(),
  18371. .AsyncReset(),
  18372. .SyncReset(),
  18373. .ShiftData(),
  18374. .SyncLoad(),
  18375. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32_combout ),
  18376. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ),
  18377. .Q());
  18378. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_x = 11;
  18379. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_y = 1;
  18380. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .coord_z = 6;
  18381. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .mask = 16'h698E;
  18382. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .modeMux = 1'b1;
  18383. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .FeedbackMux = 1'b0;
  18384. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .ShiftMux = 1'b0;
  18385. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .BypassEn = 1'b0;
  18386. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~32 .CarryEnb = 1'b0;
  18387. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 (
  18388. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ),
  18389. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ),
  18390. .C(vcc),
  18391. .D(vcc),
  18392. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~33 ),
  18393. .Qin(),
  18394. .Clk(),
  18395. .AsyncReset(),
  18396. .SyncReset(),
  18397. .ShiftData(),
  18398. .SyncLoad(),
  18399. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34_combout ),
  18400. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ),
  18401. .Q());
  18402. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_x = 11;
  18403. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_y = 1;
  18404. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .coord_z = 7;
  18405. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .mask = 16'h9617;
  18406. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .modeMux = 1'b1;
  18407. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .FeedbackMux = 1'b0;
  18408. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .ShiftMux = 1'b0;
  18409. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .BypassEn = 1'b0;
  18410. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~34 .CarryEnb = 1'b0;
  18411. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 (
  18412. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ),
  18413. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ),
  18414. .C(vcc),
  18415. .D(vcc),
  18416. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~35 ),
  18417. .Qin(),
  18418. .Clk(),
  18419. .AsyncReset(),
  18420. .SyncReset(),
  18421. .ShiftData(),
  18422. .SyncLoad(),
  18423. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36_combout ),
  18424. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ),
  18425. .Q());
  18426. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_x = 11;
  18427. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_y = 1;
  18428. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .coord_z = 8;
  18429. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .mask = 16'h698E;
  18430. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .modeMux = 1'b1;
  18431. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .FeedbackMux = 1'b0;
  18432. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .ShiftMux = 1'b0;
  18433. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .BypassEn = 1'b0;
  18434. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~36 .CarryEnb = 1'b0;
  18435. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 (
  18436. .A(vcc),
  18437. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ),
  18438. .C(vcc),
  18439. .D(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ),
  18440. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~37 ),
  18441. .Qin(),
  18442. .Clk(),
  18443. .AsyncReset(),
  18444. .SyncReset(),
  18445. .ShiftData(),
  18446. .SyncLoad(),
  18447. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38_combout ),
  18448. .Cout(),
  18449. .Q());
  18450. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_x = 11;
  18451. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_y = 1;
  18452. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .coord_z = 9;
  18453. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .mask = 16'hC33C;
  18454. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .modeMux = 1'b1;
  18455. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .FeedbackMux = 1'b0;
  18456. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .ShiftMux = 1'b0;
  18457. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .BypassEn = 1'b0;
  18458. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~38 .CarryEnb = 1'b1;
  18459. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 (
  18460. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [0]),
  18461. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ),
  18462. .C(vcc),
  18463. .D(vcc),
  18464. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~3_cout ),
  18465. .Qin(),
  18466. .Clk(),
  18467. .AsyncReset(),
  18468. .SyncReset(),
  18469. .ShiftData(),
  18470. .SyncLoad(),
  18471. .LutOut(),
  18472. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ),
  18473. .Q());
  18474. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_x = 11;
  18475. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_y = 2;
  18476. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .coord_z = 8;
  18477. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .mask = 16'h008E;
  18478. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .modeMux = 1'b1;
  18479. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .FeedbackMux = 1'b0;
  18480. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .ShiftMux = 1'b0;
  18481. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .BypassEn = 1'b0;
  18482. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5 .CarryEnb = 1'b0;
  18483. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 (
  18484. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [1]),
  18485. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ),
  18486. .C(vcc),
  18487. .D(vcc),
  18488. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~5_cout ),
  18489. .Qin(),
  18490. .Clk(),
  18491. .AsyncReset(),
  18492. .SyncReset(),
  18493. .ShiftData(),
  18494. .SyncLoad(),
  18495. .LutOut(),
  18496. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ),
  18497. .Q());
  18498. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_x = 11;
  18499. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_y = 2;
  18500. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .coord_z = 9;
  18501. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .mask = 16'h0017;
  18502. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .modeMux = 1'b1;
  18503. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .FeedbackMux = 1'b0;
  18504. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .ShiftMux = 1'b0;
  18505. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .BypassEn = 1'b0;
  18506. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7 .CarryEnb = 1'b0;
  18507. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 (
  18508. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ),
  18509. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ),
  18510. .C(vcc),
  18511. .D(vcc),
  18512. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~7_cout ),
  18513. .Qin(),
  18514. .Clk(),
  18515. .AsyncReset(),
  18516. .SyncReset(),
  18517. .ShiftData(),
  18518. .SyncLoad(),
  18519. .LutOut(),
  18520. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9_cout ),
  18521. .Q());
  18522. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_x = 11;
  18523. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_y = 2;
  18524. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .coord_z = 10;
  18525. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .mask = 16'h008E;
  18526. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .modeMux = 1'b1;
  18527. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .FeedbackMux = 1'b0;
  18528. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .ShiftMux = 1'b0;
  18529. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .BypassEn = 1'b0;
  18530. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_1~9 .CarryEnb = 1'b0;
  18531. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 (
  18532. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le5a [11]),
  18533. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [2]),
  18534. .C(vcc),
  18535. .D(vcc),
  18536. .Cin(),
  18537. .Qin(),
  18538. .Clk(),
  18539. .AsyncReset(),
  18540. .SyncReset(),
  18541. .ShiftData(),
  18542. .SyncLoad(),
  18543. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0_combout ),
  18544. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ),
  18545. .Q());
  18546. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_x = 12;
  18547. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_y = 2;
  18548. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .coord_z = 7;
  18549. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .mask = 16'h6688;
  18550. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .modeMux = 1'b0;
  18551. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .FeedbackMux = 1'b0;
  18552. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .ShiftMux = 1'b0;
  18553. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .BypassEn = 1'b0;
  18554. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~0 .CarryEnb = 1'b0;
  18555. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 (
  18556. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[1]~2_combout ),
  18557. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [1]),
  18558. .C(vcc),
  18559. .D(vcc),
  18560. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ),
  18561. .Qin(),
  18562. .Clk(),
  18563. .AsyncReset(),
  18564. .SyncReset(),
  18565. .ShiftData(),
  18566. .SyncLoad(),
  18567. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10_combout ),
  18568. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ),
  18569. .Q());
  18570. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_x = 12;
  18571. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_y = 2;
  18572. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .coord_z = 12;
  18573. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .mask = 16'h9617;
  18574. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .modeMux = 1'b1;
  18575. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .FeedbackMux = 1'b0;
  18576. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .ShiftMux = 1'b0;
  18577. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .BypassEn = 1'b0;
  18578. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~10 .CarryEnb = 1'b0;
  18579. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 (
  18580. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[2]~4_combout ),
  18581. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [0]),
  18582. .C(vcc),
  18583. .D(vcc),
  18584. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~11 ),
  18585. .Qin(),
  18586. .Clk(),
  18587. .AsyncReset(),
  18588. .SyncReset(),
  18589. .ShiftData(),
  18590. .SyncLoad(),
  18591. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12_combout ),
  18592. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ),
  18593. .Q());
  18594. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_x = 12;
  18595. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_y = 2;
  18596. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .coord_z = 13;
  18597. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .mask = 16'h698E;
  18598. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .modeMux = 1'b1;
  18599. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .FeedbackMux = 1'b0;
  18600. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .ShiftMux = 1'b0;
  18601. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .BypassEn = 1'b0;
  18602. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~12 .CarryEnb = 1'b0;
  18603. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 (
  18604. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[3]~6_combout ),
  18605. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [0]),
  18606. .C(vcc),
  18607. .D(vcc),
  18608. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~13 ),
  18609. .Qin(),
  18610. .Clk(),
  18611. .AsyncReset(),
  18612. .SyncReset(),
  18613. .ShiftData(),
  18614. .SyncLoad(),
  18615. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14_combout ),
  18616. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ),
  18617. .Q());
  18618. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_x = 12;
  18619. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_y = 2;
  18620. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .coord_z = 14;
  18621. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .mask = 16'h9617;
  18622. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .modeMux = 1'b1;
  18623. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .FeedbackMux = 1'b0;
  18624. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .ShiftMux = 1'b0;
  18625. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .BypassEn = 1'b0;
  18626. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~14 .CarryEnb = 1'b0;
  18627. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 (
  18628. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[4]~8_combout ),
  18629. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [1]),
  18630. .C(vcc),
  18631. .D(vcc),
  18632. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~15 ),
  18633. .Qin(),
  18634. .Clk(),
  18635. .AsyncReset(),
  18636. .SyncReset(),
  18637. .ShiftData(),
  18638. .SyncLoad(),
  18639. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16_combout ),
  18640. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ),
  18641. .Q());
  18642. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_x = 12;
  18643. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_y = 2;
  18644. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .coord_z = 15;
  18645. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .mask = 16'h698E;
  18646. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .modeMux = 1'b1;
  18647. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .FeedbackMux = 1'b0;
  18648. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .ShiftMux = 1'b0;
  18649. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .BypassEn = 1'b0;
  18650. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~16 .CarryEnb = 1'b0;
  18651. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 (
  18652. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[5]~10_combout ),
  18653. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[2]~4_combout ),
  18654. .C(vcc),
  18655. .D(vcc),
  18656. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~17 ),
  18657. .Qin(),
  18658. .Clk(),
  18659. .AsyncReset(),
  18660. .SyncReset(),
  18661. .ShiftData(),
  18662. .SyncLoad(),
  18663. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18_combout ),
  18664. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ),
  18665. .Q());
  18666. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_x = 12;
  18667. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_y = 1;
  18668. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .coord_z = 0;
  18669. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .mask = 16'h9617;
  18670. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .modeMux = 1'b1;
  18671. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .FeedbackMux = 1'b0;
  18672. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .ShiftMux = 1'b0;
  18673. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .BypassEn = 1'b0;
  18674. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~18 .CarryEnb = 1'b0;
  18675. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 (
  18676. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [3]),
  18677. .B(vcc),
  18678. .C(vcc),
  18679. .D(vcc),
  18680. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~1 ),
  18681. .Qin(),
  18682. .Clk(),
  18683. .AsyncReset(),
  18684. .SyncReset(),
  18685. .ShiftData(),
  18686. .SyncLoad(),
  18687. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2_combout ),
  18688. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ),
  18689. .Q());
  18690. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_x = 12;
  18691. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_y = 2;
  18692. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .coord_z = 8;
  18693. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .mask = 16'h5A5F;
  18694. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .modeMux = 1'b1;
  18695. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .FeedbackMux = 1'b0;
  18696. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .ShiftMux = 1'b0;
  18697. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .BypassEn = 1'b0;
  18698. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~2 .CarryEnb = 1'b0;
  18699. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 (
  18700. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [3]),
  18701. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[6]~12_combout ),
  18702. .C(vcc),
  18703. .D(vcc),
  18704. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~19 ),
  18705. .Qin(),
  18706. .Clk(),
  18707. .AsyncReset(),
  18708. .SyncReset(),
  18709. .ShiftData(),
  18710. .SyncLoad(),
  18711. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20_combout ),
  18712. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ),
  18713. .Q());
  18714. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_x = 12;
  18715. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_y = 1;
  18716. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .coord_z = 1;
  18717. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .mask = 16'h698E;
  18718. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .modeMux = 1'b1;
  18719. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .FeedbackMux = 1'b0;
  18720. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .ShiftMux = 1'b0;
  18721. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .BypassEn = 1'b0;
  18722. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~20 .CarryEnb = 1'b0;
  18723. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 (
  18724. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[7]~14_combout ),
  18725. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [4]),
  18726. .C(vcc),
  18727. .D(vcc),
  18728. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~21 ),
  18729. .Qin(),
  18730. .Clk(),
  18731. .AsyncReset(),
  18732. .SyncReset(),
  18733. .ShiftData(),
  18734. .SyncLoad(),
  18735. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22_combout ),
  18736. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ),
  18737. .Q());
  18738. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_x = 12;
  18739. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_y = 1;
  18740. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .coord_z = 2;
  18741. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .mask = 16'h9617;
  18742. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .modeMux = 1'b1;
  18743. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .FeedbackMux = 1'b0;
  18744. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .ShiftMux = 1'b0;
  18745. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .BypassEn = 1'b0;
  18746. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~22 .CarryEnb = 1'b0;
  18747. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 (
  18748. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[8]~16_combout ),
  18749. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [5]),
  18750. .C(vcc),
  18751. .D(vcc),
  18752. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~23 ),
  18753. .Qin(),
  18754. .Clk(),
  18755. .AsyncReset(),
  18756. .SyncReset(),
  18757. .ShiftData(),
  18758. .SyncLoad(),
  18759. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24_combout ),
  18760. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ),
  18761. .Q());
  18762. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_x = 12;
  18763. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_y = 1;
  18764. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .coord_z = 3;
  18765. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .mask = 16'h698E;
  18766. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .modeMux = 1'b1;
  18767. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .FeedbackMux = 1'b0;
  18768. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .ShiftMux = 1'b0;
  18769. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .BypassEn = 1'b0;
  18770. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~24 .CarryEnb = 1'b0;
  18771. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 (
  18772. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [6]),
  18773. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[9]~18_combout ),
  18774. .C(vcc),
  18775. .D(vcc),
  18776. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~25 ),
  18777. .Qin(),
  18778. .Clk(),
  18779. .AsyncReset(),
  18780. .SyncReset(),
  18781. .ShiftData(),
  18782. .SyncLoad(),
  18783. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26_combout ),
  18784. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ),
  18785. .Q());
  18786. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_x = 12;
  18787. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_y = 1;
  18788. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .coord_z = 4;
  18789. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .mask = 16'h9617;
  18790. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .modeMux = 1'b1;
  18791. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .FeedbackMux = 1'b0;
  18792. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .ShiftMux = 1'b0;
  18793. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .BypassEn = 1'b0;
  18794. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~26 .CarryEnb = 1'b0;
  18795. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 (
  18796. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[10]~20_combout ),
  18797. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [7]),
  18798. .C(vcc),
  18799. .D(vcc),
  18800. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~27 ),
  18801. .Qin(),
  18802. .Clk(),
  18803. .AsyncReset(),
  18804. .SyncReset(),
  18805. .ShiftData(),
  18806. .SyncLoad(),
  18807. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28_combout ),
  18808. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ),
  18809. .Q());
  18810. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_x = 12;
  18811. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_y = 1;
  18812. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .coord_z = 5;
  18813. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .mask = 16'h698E;
  18814. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .modeMux = 1'b1;
  18815. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .FeedbackMux = 1'b0;
  18816. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .ShiftMux = 1'b0;
  18817. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .BypassEn = 1'b0;
  18818. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~28 .CarryEnb = 1'b0;
  18819. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 (
  18820. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [8]),
  18821. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [9]),
  18822. .C(vcc),
  18823. .D(vcc),
  18824. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~29 ),
  18825. .Qin(),
  18826. .Clk(),
  18827. .AsyncReset(),
  18828. .SyncReset(),
  18829. .ShiftData(),
  18830. .SyncLoad(),
  18831. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30_combout ),
  18832. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ),
  18833. .Q());
  18834. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_x = 12;
  18835. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_y = 1;
  18836. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .coord_z = 6;
  18837. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .mask = 16'h9617;
  18838. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .modeMux = 1'b1;
  18839. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .FeedbackMux = 1'b0;
  18840. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .ShiftMux = 1'b0;
  18841. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .BypassEn = 1'b0;
  18842. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~30 .CarryEnb = 1'b0;
  18843. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 (
  18844. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [10]),
  18845. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [9]),
  18846. .C(vcc),
  18847. .D(vcc),
  18848. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~31 ),
  18849. .Qin(),
  18850. .Clk(),
  18851. .AsyncReset(),
  18852. .SyncReset(),
  18853. .ShiftData(),
  18854. .SyncLoad(),
  18855. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32_combout ),
  18856. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ),
  18857. .Q());
  18858. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_x = 12;
  18859. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_y = 1;
  18860. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .coord_z = 7;
  18861. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .mask = 16'h698E;
  18862. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .modeMux = 1'b1;
  18863. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .FeedbackMux = 1'b0;
  18864. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .ShiftMux = 1'b0;
  18865. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .BypassEn = 1'b0;
  18866. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~32 .CarryEnb = 1'b0;
  18867. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 (
  18868. .A(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ),
  18869. .B(vcc),
  18870. .C(vcc),
  18871. .D(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|~QUARTUS_CREATED_GND~I_combout ),
  18872. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~33 ),
  18873. .Qin(),
  18874. .Clk(),
  18875. .AsyncReset(),
  18876. .SyncReset(),
  18877. .ShiftData(),
  18878. .SyncLoad(),
  18879. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34_combout ),
  18880. .Cout(),
  18881. .Q());
  18882. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_x = 12;
  18883. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_y = 1;
  18884. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .coord_z = 8;
  18885. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .mask = 16'hA55A;
  18886. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .modeMux = 1'b1;
  18887. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .FeedbackMux = 1'b0;
  18888. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .ShiftMux = 1'b0;
  18889. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .BypassEn = 1'b0;
  18890. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~34 .CarryEnb = 1'b1;
  18891. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 (
  18892. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [2]),
  18893. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [0]),
  18894. .C(vcc),
  18895. .D(vcc),
  18896. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~3 ),
  18897. .Qin(),
  18898. .Clk(),
  18899. .AsyncReset(),
  18900. .SyncReset(),
  18901. .ShiftData(),
  18902. .SyncLoad(),
  18903. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4_combout ),
  18904. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ),
  18905. .Q());
  18906. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_x = 12;
  18907. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_y = 2;
  18908. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .coord_z = 9;
  18909. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .mask = 16'h698E;
  18910. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .modeMux = 1'b1;
  18911. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .FeedbackMux = 1'b0;
  18912. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .ShiftMux = 1'b0;
  18913. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .BypassEn = 1'b0;
  18914. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~4 .CarryEnb = 1'b0;
  18915. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 (
  18916. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [3]),
  18917. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [1]),
  18918. .C(vcc),
  18919. .D(vcc),
  18920. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~5 ),
  18921. .Qin(),
  18922. .Clk(),
  18923. .AsyncReset(),
  18924. .SyncReset(),
  18925. .ShiftData(),
  18926. .SyncLoad(),
  18927. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6_combout ),
  18928. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ),
  18929. .Q());
  18930. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_x = 12;
  18931. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_y = 2;
  18932. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .coord_z = 10;
  18933. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .mask = 16'h9617;
  18934. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .modeMux = 1'b1;
  18935. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .FeedbackMux = 1'b0;
  18936. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .ShiftMux = 1'b0;
  18937. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .BypassEn = 1'b0;
  18938. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~6 .CarryEnb = 1'b0;
  18939. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 (
  18940. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [0]),
  18941. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[0]~0_combout ),
  18942. .C(vcc),
  18943. .D(vcc),
  18944. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~7 ),
  18945. .Qin(),
  18946. .Clk(),
  18947. .AsyncReset(),
  18948. .SyncReset(),
  18949. .ShiftData(),
  18950. .SyncLoad(),
  18951. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8_combout ),
  18952. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~9 ),
  18953. .Q());
  18954. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_x = 12;
  18955. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_y = 2;
  18956. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .coord_z = 11;
  18957. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .mask = 16'h698E;
  18958. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .modeMux = 1'b1;
  18959. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .FeedbackMux = 1'b0;
  18960. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .ShiftMux = 1'b0;
  18961. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .BypassEn = 1'b0;
  18962. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_2~8 .CarryEnb = 1'b0;
  18963. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 (
  18964. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|le6a [11]),
  18965. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [4]),
  18966. .C(vcc),
  18967. .D(vcc),
  18968. .Cin(),
  18969. .Qin(),
  18970. .Clk(),
  18971. .AsyncReset(),
  18972. .SyncReset(),
  18973. .ShiftData(),
  18974. .SyncLoad(),
  18975. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0_combout ),
  18976. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ),
  18977. .Q());
  18978. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_x = 11;
  18979. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_y = 4;
  18980. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .coord_z = 0;
  18981. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .mask = 16'h6688;
  18982. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .modeMux = 1'b0;
  18983. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .FeedbackMux = 1'b0;
  18984. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .ShiftMux = 1'b0;
  18985. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .BypassEn = 1'b0;
  18986. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~0 .CarryEnb = 1'b0;
  18987. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 (
  18988. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[0]~0_combout ),
  18989. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [1]),
  18990. .C(vcc),
  18991. .D(vcc),
  18992. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ),
  18993. .Qin(),
  18994. .Clk(),
  18995. .AsyncReset(),
  18996. .SyncReset(),
  18997. .ShiftData(),
  18998. .SyncLoad(),
  18999. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10_combout ),
  19000. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ),
  19001. .Q());
  19002. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_x = 11;
  19003. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_y = 4;
  19004. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .coord_z = 5;
  19005. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .mask = 16'h9617;
  19006. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .modeMux = 1'b1;
  19007. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .FeedbackMux = 1'b0;
  19008. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .ShiftMux = 1'b0;
  19009. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .BypassEn = 1'b0;
  19010. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~10 .CarryEnb = 1'b0;
  19011. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 (
  19012. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[1]~2_combout ),
  19013. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [2]),
  19014. .C(vcc),
  19015. .D(vcc),
  19016. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~11 ),
  19017. .Qin(),
  19018. .Clk(),
  19019. .AsyncReset(),
  19020. .SyncReset(),
  19021. .ShiftData(),
  19022. .SyncLoad(),
  19023. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12_combout ),
  19024. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ),
  19025. .Q());
  19026. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_x = 11;
  19027. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_y = 4;
  19028. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .coord_z = 6;
  19029. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .mask = 16'h698E;
  19030. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .modeMux = 1'b1;
  19031. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .FeedbackMux = 1'b0;
  19032. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .ShiftMux = 1'b0;
  19033. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .BypassEn = 1'b0;
  19034. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~12 .CarryEnb = 1'b0;
  19035. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 (
  19036. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le9a [2]),
  19037. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  19038. .C(vcc),
  19039. .D(vcc),
  19040. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~13 ),
  19041. .Qin(),
  19042. .Clk(),
  19043. .AsyncReset(),
  19044. .SyncReset(),
  19045. .ShiftData(),
  19046. .SyncLoad(),
  19047. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14_combout ),
  19048. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ),
  19049. .Q());
  19050. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_x = 11;
  19051. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_y = 4;
  19052. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .coord_z = 7;
  19053. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .mask = 16'h9617;
  19054. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .modeMux = 1'b1;
  19055. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .FeedbackMux = 1'b0;
  19056. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .ShiftMux = 1'b0;
  19057. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .BypassEn = 1'b0;
  19058. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~14 .CarryEnb = 1'b0;
  19059. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 (
  19060. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[3]~6_combout ),
  19061. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  19062. .C(vcc),
  19063. .D(vcc),
  19064. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~15 ),
  19065. .Qin(),
  19066. .Clk(),
  19067. .AsyncReset(),
  19068. .SyncReset(),
  19069. .ShiftData(),
  19070. .SyncLoad(),
  19071. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16_combout ),
  19072. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ),
  19073. .Q());
  19074. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_x = 11;
  19075. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_y = 4;
  19076. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .coord_z = 8;
  19077. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .mask = 16'h698E;
  19078. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .modeMux = 1'b1;
  19079. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .FeedbackMux = 1'b0;
  19080. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .ShiftMux = 1'b0;
  19081. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .BypassEn = 1'b0;
  19082. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~16 .CarryEnb = 1'b0;
  19083. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 (
  19084. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[4]~8_combout ),
  19085. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  19086. .C(vcc),
  19087. .D(vcc),
  19088. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~17 ),
  19089. .Qin(),
  19090. .Clk(),
  19091. .AsyncReset(),
  19092. .SyncReset(),
  19093. .ShiftData(),
  19094. .SyncLoad(),
  19095. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18_combout ),
  19096. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ),
  19097. .Q());
  19098. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_x = 11;
  19099. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_y = 4;
  19100. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .coord_z = 9;
  19101. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .mask = 16'h694D;
  19102. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .modeMux = 1'b1;
  19103. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .FeedbackMux = 1'b0;
  19104. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .ShiftMux = 1'b0;
  19105. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .BypassEn = 1'b0;
  19106. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~18 .CarryEnb = 1'b0;
  19107. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 (
  19108. .A(vcc),
  19109. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le4a [5]),
  19110. .C(vcc),
  19111. .D(vcc),
  19112. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~1 ),
  19113. .Qin(),
  19114. .Clk(),
  19115. .AsyncReset(),
  19116. .SyncReset(),
  19117. .ShiftData(),
  19118. .SyncLoad(),
  19119. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2_combout ),
  19120. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ),
  19121. .Q());
  19122. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_x = 11;
  19123. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_y = 4;
  19124. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .coord_z = 1;
  19125. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .mask = 16'h3C3F;
  19126. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .modeMux = 1'b1;
  19127. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .FeedbackMux = 1'b0;
  19128. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .ShiftMux = 1'b0;
  19129. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .BypassEn = 1'b0;
  19130. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~2 .CarryEnb = 1'b0;
  19131. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 (
  19132. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[5]~10_combout ),
  19133. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [6]),
  19134. .C(vcc),
  19135. .D(vcc),
  19136. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~19 ),
  19137. .Qin(),
  19138. .Clk(),
  19139. .AsyncReset(),
  19140. .SyncReset(),
  19141. .ShiftData(),
  19142. .SyncLoad(),
  19143. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20_combout ),
  19144. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ),
  19145. .Q());
  19146. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_x = 11;
  19147. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_y = 4;
  19148. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .coord_z = 10;
  19149. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .mask = 16'h698E;
  19150. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .modeMux = 1'b1;
  19151. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .FeedbackMux = 1'b0;
  19152. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .ShiftMux = 1'b0;
  19153. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .BypassEn = 1'b0;
  19154. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~20 .CarryEnb = 1'b0;
  19155. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 (
  19156. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add26_result[6]~12_combout ),
  19157. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [7]),
  19158. .C(vcc),
  19159. .D(vcc),
  19160. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~21 ),
  19161. .Qin(),
  19162. .Clk(),
  19163. .AsyncReset(),
  19164. .SyncReset(),
  19165. .ShiftData(),
  19166. .SyncLoad(),
  19167. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22_combout ),
  19168. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ),
  19169. .Q());
  19170. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_x = 11;
  19171. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_y = 4;
  19172. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .coord_z = 11;
  19173. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .mask = 16'h9617;
  19174. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .modeMux = 1'b1;
  19175. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .FeedbackMux = 1'b0;
  19176. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .ShiftMux = 1'b0;
  19177. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .BypassEn = 1'b0;
  19178. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~22 .CarryEnb = 1'b0;
  19179. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 (
  19180. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [10]),
  19181. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le8a [8]),
  19182. .C(vcc),
  19183. .D(vcc),
  19184. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~23 ),
  19185. .Qin(),
  19186. .Clk(),
  19187. .AsyncReset(),
  19188. .SyncReset(),
  19189. .ShiftData(),
  19190. .SyncLoad(),
  19191. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24_combout ),
  19192. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ),
  19193. .Q());
  19194. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_x = 11;
  19195. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_y = 4;
  19196. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .coord_z = 12;
  19197. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .mask = 16'h698E;
  19198. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .modeMux = 1'b1;
  19199. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .FeedbackMux = 1'b0;
  19200. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .ShiftMux = 1'b0;
  19201. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .BypassEn = 1'b0;
  19202. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~24 .CarryEnb = 1'b0;
  19203. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 (
  19204. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [11]),
  19205. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|add22_result[11]~22_combout ),
  19206. .C(vcc),
  19207. .D(vcc),
  19208. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~25 ),
  19209. .Qin(),
  19210. .Clk(),
  19211. .AsyncReset(),
  19212. .SyncReset(),
  19213. .ShiftData(),
  19214. .SyncLoad(),
  19215. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26_combout ),
  19216. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ),
  19217. .Q());
  19218. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_x = 11;
  19219. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_y = 4;
  19220. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .coord_z = 13;
  19221. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .mask = 16'h692B;
  19222. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .modeMux = 1'b1;
  19223. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .FeedbackMux = 1'b0;
  19224. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .ShiftMux = 1'b0;
  19225. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .BypassEn = 1'b0;
  19226. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~26 .CarryEnb = 1'b0;
  19227. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 (
  19228. .A(vcc),
  19229. .B(vcc),
  19230. .C(vcc),
  19231. .D(vcc),
  19232. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~27 ),
  19233. .Qin(),
  19234. .Clk(),
  19235. .AsyncReset(),
  19236. .SyncReset(),
  19237. .ShiftData(),
  19238. .SyncLoad(),
  19239. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28_combout ),
  19240. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ),
  19241. .Q());
  19242. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_x = 11;
  19243. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_y = 4;
  19244. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .coord_z = 14;
  19245. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .mask = 16'hF00F;
  19246. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .modeMux = 1'b1;
  19247. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .FeedbackMux = 1'b0;
  19248. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .ShiftMux = 1'b0;
  19249. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .BypassEn = 1'b0;
  19250. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~28 .CarryEnb = 1'b0;
  19251. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 (
  19252. .A(vcc),
  19253. .B(vcc),
  19254. .C(vcc),
  19255. .D(vcc),
  19256. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~29 ),
  19257. .Qin(),
  19258. .Clk(),
  19259. .AsyncReset(),
  19260. .SyncReset(),
  19261. .ShiftData(),
  19262. .SyncLoad(),
  19263. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30_combout ),
  19264. .Cout(),
  19265. .Q());
  19266. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_x = 11;
  19267. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_y = 4;
  19268. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .coord_z = 15;
  19269. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .mask = 16'h0F0F;
  19270. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .modeMux = 1'b1;
  19271. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .FeedbackMux = 1'b0;
  19272. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .ShiftMux = 1'b0;
  19273. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .BypassEn = 1'b0;
  19274. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~30 .CarryEnb = 1'b1;
  19275. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 (
  19276. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [4]),
  19277. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [2]),
  19278. .C(vcc),
  19279. .D(vcc),
  19280. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~3 ),
  19281. .Qin(),
  19282. .Clk(),
  19283. .AsyncReset(),
  19284. .SyncReset(),
  19285. .ShiftData(),
  19286. .SyncLoad(),
  19287. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4_combout ),
  19288. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ),
  19289. .Q());
  19290. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_x = 11;
  19291. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_y = 4;
  19292. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .coord_z = 2;
  19293. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .mask = 16'h698E;
  19294. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .modeMux = 1'b1;
  19295. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .FeedbackMux = 1'b0;
  19296. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .ShiftMux = 1'b0;
  19297. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .BypassEn = 1'b0;
  19298. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~4 .CarryEnb = 1'b0;
  19299. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 (
  19300. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le5a [5]),
  19301. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [3]),
  19302. .C(vcc),
  19303. .D(vcc),
  19304. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~5 ),
  19305. .Qin(),
  19306. .Clk(),
  19307. .AsyncReset(),
  19308. .SyncReset(),
  19309. .ShiftData(),
  19310. .SyncLoad(),
  19311. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6_combout ),
  19312. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ),
  19313. .Q());
  19314. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_x = 11;
  19315. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_y = 4;
  19316. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .coord_z = 3;
  19317. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .mask = 16'h9617;
  19318. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .modeMux = 1'b1;
  19319. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .FeedbackMux = 1'b0;
  19320. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .ShiftMux = 1'b0;
  19321. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .BypassEn = 1'b0;
  19322. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~6 .CarryEnb = 1'b0;
  19323. alta_slice \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 (
  19324. .A(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le7a [2]),
  19325. .B(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|le6a [4]),
  19326. .C(vcc),
  19327. .D(vcc),
  19328. .Cin(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~7 ),
  19329. .Qin(),
  19330. .Clk(),
  19331. .AsyncReset(),
  19332. .SyncReset(),
  19333. .ShiftData(),
  19334. .SyncLoad(),
  19335. .LutOut(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8_combout ),
  19336. .Cout(\macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~9 ),
  19337. .Q());
  19338. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_x = 11;
  19339. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_y = 4;
  19340. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .coord_z = 4;
  19341. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .mask = 16'h698E;
  19342. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .modeMux = 1'b1;
  19343. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .FeedbackMux = 1'b0;
  19344. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .ShiftMux = 1'b0;
  19345. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .BypassEn = 1'b0;
  19346. defparam \macro_inst|apb_dac0_inst|Mult3|auto_generated|mac_mult1|auto_generated|mult1|op_3~8 .CarryEnb = 1'b0;
  19347. alta_slice \macro_inst|apb_dac0_inst|Mux0~0 (
  19348. .A(\macro_inst|apb_dac0_inst|Add4~18_combout ),
  19349. .B(\macro_inst|apb_dac0_inst|Add3~18_combout ),
  19350. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19351. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19352. .Cin(),
  19353. .Qin(),
  19354. .Clk(),
  19355. .AsyncReset(),
  19356. .SyncReset(),
  19357. .ShiftData(),
  19358. .SyncLoad(),
  19359. .LutOut(\macro_inst|apb_dac0_inst|Mux0~0_combout ),
  19360. .Cout(),
  19361. .Q());
  19362. defparam \macro_inst|apb_dac0_inst|Mux0~0 .coord_x = 15;
  19363. defparam \macro_inst|apb_dac0_inst|Mux0~0 .coord_y = 5;
  19364. defparam \macro_inst|apb_dac0_inst|Mux0~0 .coord_z = 15;
  19365. defparam \macro_inst|apb_dac0_inst|Mux0~0 .mask = 16'hF0CA;
  19366. defparam \macro_inst|apb_dac0_inst|Mux0~0 .modeMux = 1'b0;
  19367. defparam \macro_inst|apb_dac0_inst|Mux0~0 .FeedbackMux = 1'b0;
  19368. defparam \macro_inst|apb_dac0_inst|Mux0~0 .ShiftMux = 1'b0;
  19369. defparam \macro_inst|apb_dac0_inst|Mux0~0 .BypassEn = 1'b0;
  19370. defparam \macro_inst|apb_dac0_inst|Mux0~0 .CarryEnb = 1'b1;
  19371. alta_slice \macro_inst|apb_dac0_inst|Mux0~1 (
  19372. .A(\macro_inst|apb_dac0_inst|Add5~18_combout ),
  19373. .B(\macro_inst|apb_dac0_inst|Mux0~0_combout ),
  19374. .C(\macro_inst|apb_dac0_inst|max_vol_r [9]),
  19375. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19376. .Cin(),
  19377. .Qin(),
  19378. .Clk(),
  19379. .AsyncReset(),
  19380. .SyncReset(),
  19381. .ShiftData(),
  19382. .SyncLoad(),
  19383. .LutOut(\macro_inst|apb_dac0_inst|Mux0~1_combout ),
  19384. .Cout(),
  19385. .Q());
  19386. defparam \macro_inst|apb_dac0_inst|Mux0~1 .coord_x = 15;
  19387. defparam \macro_inst|apb_dac0_inst|Mux0~1 .coord_y = 5;
  19388. defparam \macro_inst|apb_dac0_inst|Mux0~1 .coord_z = 2;
  19389. defparam \macro_inst|apb_dac0_inst|Mux0~1 .mask = 16'hB8CC;
  19390. defparam \macro_inst|apb_dac0_inst|Mux0~1 .modeMux = 1'b0;
  19391. defparam \macro_inst|apb_dac0_inst|Mux0~1 .FeedbackMux = 1'b0;
  19392. defparam \macro_inst|apb_dac0_inst|Mux0~1 .ShiftMux = 1'b0;
  19393. defparam \macro_inst|apb_dac0_inst|Mux0~1 .BypassEn = 1'b0;
  19394. defparam \macro_inst|apb_dac0_inst|Mux0~1 .CarryEnb = 1'b1;
  19395. alta_slice \macro_inst|apb_dac0_inst|Mux1~0 (
  19396. .A(\macro_inst|apb_dac0_inst|Add4~16_combout ),
  19397. .B(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19398. .C(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19399. .D(\macro_inst|apb_dac0_inst|max_vol_r [8]),
  19400. .Cin(),
  19401. .Qin(),
  19402. .Clk(),
  19403. .AsyncReset(),
  19404. .SyncReset(),
  19405. .ShiftData(),
  19406. .SyncLoad(),
  19407. .LutOut(\macro_inst|apb_dac0_inst|Mux1~0_combout ),
  19408. .Cout(),
  19409. .Q());
  19410. defparam \macro_inst|apb_dac0_inst|Mux1~0 .coord_x = 15;
  19411. defparam \macro_inst|apb_dac0_inst|Mux1~0 .coord_y = 6;
  19412. defparam \macro_inst|apb_dac0_inst|Mux1~0 .coord_z = 13;
  19413. defparam \macro_inst|apb_dac0_inst|Mux1~0 .mask = 16'hF2C2;
  19414. defparam \macro_inst|apb_dac0_inst|Mux1~0 .modeMux = 1'b0;
  19415. defparam \macro_inst|apb_dac0_inst|Mux1~0 .FeedbackMux = 1'b0;
  19416. defparam \macro_inst|apb_dac0_inst|Mux1~0 .ShiftMux = 1'b0;
  19417. defparam \macro_inst|apb_dac0_inst|Mux1~0 .BypassEn = 1'b0;
  19418. defparam \macro_inst|apb_dac0_inst|Mux1~0 .CarryEnb = 1'b1;
  19419. alta_slice \macro_inst|apb_dac0_inst|Mux1~1 (
  19420. .A(\macro_inst|apb_dac0_inst|Mux1~0_combout ),
  19421. .B(\macro_inst|apb_dac0_inst|Add3~16_combout ),
  19422. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19423. .D(\macro_inst|apb_dac0_inst|Add5~16_combout ),
  19424. .Cin(),
  19425. .Qin(),
  19426. .Clk(),
  19427. .AsyncReset(),
  19428. .SyncReset(),
  19429. .ShiftData(),
  19430. .SyncLoad(),
  19431. .LutOut(\macro_inst|apb_dac0_inst|Mux1~1_combout ),
  19432. .Cout(),
  19433. .Q());
  19434. defparam \macro_inst|apb_dac0_inst|Mux1~1 .coord_x = 16;
  19435. defparam \macro_inst|apb_dac0_inst|Mux1~1 .coord_y = 6;
  19436. defparam \macro_inst|apb_dac0_inst|Mux1~1 .coord_z = 7;
  19437. defparam \macro_inst|apb_dac0_inst|Mux1~1 .mask = 16'hEA4A;
  19438. defparam \macro_inst|apb_dac0_inst|Mux1~1 .modeMux = 1'b0;
  19439. defparam \macro_inst|apb_dac0_inst|Mux1~1 .FeedbackMux = 1'b0;
  19440. defparam \macro_inst|apb_dac0_inst|Mux1~1 .ShiftMux = 1'b0;
  19441. defparam \macro_inst|apb_dac0_inst|Mux1~1 .BypassEn = 1'b0;
  19442. defparam \macro_inst|apb_dac0_inst|Mux1~1 .CarryEnb = 1'b1;
  19443. alta_slice \macro_inst|apb_dac0_inst|Mux2~0 (
  19444. .A(\macro_inst|apb_dac0_inst|Add3~14_combout ),
  19445. .B(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19446. .C(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19447. .D(\macro_inst|apb_dac0_inst|Add4~14_combout ),
  19448. .Cin(),
  19449. .Qin(),
  19450. .Clk(),
  19451. .AsyncReset(),
  19452. .SyncReset(),
  19453. .ShiftData(),
  19454. .SyncLoad(),
  19455. .LutOut(\macro_inst|apb_dac0_inst|Mux2~0_combout ),
  19456. .Cout(),
  19457. .Q());
  19458. defparam \macro_inst|apb_dac0_inst|Mux2~0 .coord_x = 15;
  19459. defparam \macro_inst|apb_dac0_inst|Mux2~0 .coord_y = 6;
  19460. defparam \macro_inst|apb_dac0_inst|Mux2~0 .coord_z = 1;
  19461. defparam \macro_inst|apb_dac0_inst|Mux2~0 .mask = 16'hCBC8;
  19462. defparam \macro_inst|apb_dac0_inst|Mux2~0 .modeMux = 1'b0;
  19463. defparam \macro_inst|apb_dac0_inst|Mux2~0 .FeedbackMux = 1'b0;
  19464. defparam \macro_inst|apb_dac0_inst|Mux2~0 .ShiftMux = 1'b0;
  19465. defparam \macro_inst|apb_dac0_inst|Mux2~0 .BypassEn = 1'b0;
  19466. defparam \macro_inst|apb_dac0_inst|Mux2~0 .CarryEnb = 1'b1;
  19467. alta_slice \macro_inst|apb_dac0_inst|Mux2~1 (
  19468. .A(\macro_inst|apb_dac0_inst|max_vol_r [7]),
  19469. .B(\macro_inst|apb_dac0_inst|Mux2~0_combout ),
  19470. .C(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19471. .D(\macro_inst|apb_dac0_inst|Add5~14_combout ),
  19472. .Cin(),
  19473. .Qin(),
  19474. .Clk(),
  19475. .AsyncReset(),
  19476. .SyncReset(),
  19477. .ShiftData(),
  19478. .SyncLoad(),
  19479. .LutOut(\macro_inst|apb_dac0_inst|Mux2~1_combout ),
  19480. .Cout(),
  19481. .Q());
  19482. defparam \macro_inst|apb_dac0_inst|Mux2~1 .coord_x = 15;
  19483. defparam \macro_inst|apb_dac0_inst|Mux2~1 .coord_y = 4;
  19484. defparam \macro_inst|apb_dac0_inst|Mux2~1 .coord_z = 14;
  19485. defparam \macro_inst|apb_dac0_inst|Mux2~1 .mask = 16'hEC2C;
  19486. defparam \macro_inst|apb_dac0_inst|Mux2~1 .modeMux = 1'b0;
  19487. defparam \macro_inst|apb_dac0_inst|Mux2~1 .FeedbackMux = 1'b0;
  19488. defparam \macro_inst|apb_dac0_inst|Mux2~1 .ShiftMux = 1'b0;
  19489. defparam \macro_inst|apb_dac0_inst|Mux2~1 .BypassEn = 1'b0;
  19490. defparam \macro_inst|apb_dac0_inst|Mux2~1 .CarryEnb = 1'b1;
  19491. alta_slice \macro_inst|apb_dac0_inst|Mux3~0 (
  19492. .A(\macro_inst|apb_dac0_inst|max_vol_r [6]),
  19493. .B(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19494. .C(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19495. .D(\macro_inst|apb_dac0_inst|Add4~12_combout ),
  19496. .Cin(),
  19497. .Qin(),
  19498. .Clk(),
  19499. .AsyncReset(),
  19500. .SyncReset(),
  19501. .ShiftData(),
  19502. .SyncLoad(),
  19503. .LutOut(\macro_inst|apb_dac0_inst|Mux3~0_combout ),
  19504. .Cout(),
  19505. .Q());
  19506. defparam \macro_inst|apb_dac0_inst|Mux3~0 .coord_x = 15;
  19507. defparam \macro_inst|apb_dac0_inst|Mux3~0 .coord_y = 6;
  19508. defparam \macro_inst|apb_dac0_inst|Mux3~0 .coord_z = 0;
  19509. defparam \macro_inst|apb_dac0_inst|Mux3~0 .mask = 16'hE3E0;
  19510. defparam \macro_inst|apb_dac0_inst|Mux3~0 .modeMux = 1'b0;
  19511. defparam \macro_inst|apb_dac0_inst|Mux3~0 .FeedbackMux = 1'b0;
  19512. defparam \macro_inst|apb_dac0_inst|Mux3~0 .ShiftMux = 1'b0;
  19513. defparam \macro_inst|apb_dac0_inst|Mux3~0 .BypassEn = 1'b0;
  19514. defparam \macro_inst|apb_dac0_inst|Mux3~0 .CarryEnb = 1'b1;
  19515. alta_slice \macro_inst|apb_dac0_inst|Mux3~1 (
  19516. .A(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19517. .B(\macro_inst|apb_dac0_inst|Add5~12_combout ),
  19518. .C(\macro_inst|apb_dac0_inst|Add3~12_combout ),
  19519. .D(\macro_inst|apb_dac0_inst|Mux3~0_combout ),
  19520. .Cin(),
  19521. .Qin(),
  19522. .Clk(),
  19523. .AsyncReset(),
  19524. .SyncReset(),
  19525. .ShiftData(),
  19526. .SyncLoad(),
  19527. .LutOut(\macro_inst|apb_dac0_inst|Mux3~1_combout ),
  19528. .Cout(),
  19529. .Q());
  19530. defparam \macro_inst|apb_dac0_inst|Mux3~1 .coord_x = 14;
  19531. defparam \macro_inst|apb_dac0_inst|Mux3~1 .coord_y = 5;
  19532. defparam \macro_inst|apb_dac0_inst|Mux3~1 .coord_z = 3;
  19533. defparam \macro_inst|apb_dac0_inst|Mux3~1 .mask = 16'hDDA0;
  19534. defparam \macro_inst|apb_dac0_inst|Mux3~1 .modeMux = 1'b0;
  19535. defparam \macro_inst|apb_dac0_inst|Mux3~1 .FeedbackMux = 1'b0;
  19536. defparam \macro_inst|apb_dac0_inst|Mux3~1 .ShiftMux = 1'b0;
  19537. defparam \macro_inst|apb_dac0_inst|Mux3~1 .BypassEn = 1'b0;
  19538. defparam \macro_inst|apb_dac0_inst|Mux3~1 .CarryEnb = 1'b1;
  19539. alta_slice \macro_inst|apb_dac0_inst|Mux4~0 (
  19540. .A(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19541. .B(\macro_inst|apb_dac0_inst|Add4~10_combout ),
  19542. .C(\macro_inst|apb_dac0_inst|Add3~10_combout ),
  19543. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19544. .Cin(),
  19545. .Qin(),
  19546. .Clk(),
  19547. .AsyncReset(),
  19548. .SyncReset(),
  19549. .ShiftData(),
  19550. .SyncLoad(),
  19551. .LutOut(\macro_inst|apb_dac0_inst|Mux4~0_combout ),
  19552. .Cout(),
  19553. .Q());
  19554. defparam \macro_inst|apb_dac0_inst|Mux4~0 .coord_x = 15;
  19555. defparam \macro_inst|apb_dac0_inst|Mux4~0 .coord_y = 6;
  19556. defparam \macro_inst|apb_dac0_inst|Mux4~0 .coord_z = 14;
  19557. defparam \macro_inst|apb_dac0_inst|Mux4~0 .mask = 16'hAAE4;
  19558. defparam \macro_inst|apb_dac0_inst|Mux4~0 .modeMux = 1'b0;
  19559. defparam \macro_inst|apb_dac0_inst|Mux4~0 .FeedbackMux = 1'b0;
  19560. defparam \macro_inst|apb_dac0_inst|Mux4~0 .ShiftMux = 1'b0;
  19561. defparam \macro_inst|apb_dac0_inst|Mux4~0 .BypassEn = 1'b0;
  19562. defparam \macro_inst|apb_dac0_inst|Mux4~0 .CarryEnb = 1'b1;
  19563. alta_slice \macro_inst|apb_dac0_inst|Mux4~1 (
  19564. .A(\macro_inst|apb_dac0_inst|max_vol_r [5]),
  19565. .B(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19566. .C(\macro_inst|apb_dac0_inst|Add5~10_combout ),
  19567. .D(\macro_inst|apb_dac0_inst|Mux4~0_combout ),
  19568. .Cin(),
  19569. .Qin(),
  19570. .Clk(),
  19571. .AsyncReset(),
  19572. .SyncReset(),
  19573. .ShiftData(),
  19574. .SyncLoad(),
  19575. .LutOut(\macro_inst|apb_dac0_inst|Mux4~1_combout ),
  19576. .Cout(),
  19577. .Q());
  19578. defparam \macro_inst|apb_dac0_inst|Mux4~1 .coord_x = 15;
  19579. defparam \macro_inst|apb_dac0_inst|Mux4~1 .coord_y = 5;
  19580. defparam \macro_inst|apb_dac0_inst|Mux4~1 .coord_z = 4;
  19581. defparam \macro_inst|apb_dac0_inst|Mux4~1 .mask = 16'hF388;
  19582. defparam \macro_inst|apb_dac0_inst|Mux4~1 .modeMux = 1'b0;
  19583. defparam \macro_inst|apb_dac0_inst|Mux4~1 .FeedbackMux = 1'b0;
  19584. defparam \macro_inst|apb_dac0_inst|Mux4~1 .ShiftMux = 1'b0;
  19585. defparam \macro_inst|apb_dac0_inst|Mux4~1 .BypassEn = 1'b0;
  19586. defparam \macro_inst|apb_dac0_inst|Mux4~1 .CarryEnb = 1'b1;
  19587. alta_slice \macro_inst|apb_dac0_inst|Mux5~0 (
  19588. .A(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19589. .B(\macro_inst|apb_dac0_inst|Add4~8_combout ),
  19590. .C(\macro_inst|apb_dac0_inst|max_vol_r [4]),
  19591. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19592. .Cin(),
  19593. .Qin(),
  19594. .Clk(),
  19595. .AsyncReset(),
  19596. .SyncReset(),
  19597. .ShiftData(),
  19598. .SyncLoad(),
  19599. .LutOut(\macro_inst|apb_dac0_inst|Mux5~0_combout ),
  19600. .Cout(),
  19601. .Q());
  19602. defparam \macro_inst|apb_dac0_inst|Mux5~0 .coord_x = 16;
  19603. defparam \macro_inst|apb_dac0_inst|Mux5~0 .coord_y = 8;
  19604. defparam \macro_inst|apb_dac0_inst|Mux5~0 .coord_z = 3;
  19605. defparam \macro_inst|apb_dac0_inst|Mux5~0 .mask = 16'hFA44;
  19606. defparam \macro_inst|apb_dac0_inst|Mux5~0 .modeMux = 1'b0;
  19607. defparam \macro_inst|apb_dac0_inst|Mux5~0 .FeedbackMux = 1'b0;
  19608. defparam \macro_inst|apb_dac0_inst|Mux5~0 .ShiftMux = 1'b0;
  19609. defparam \macro_inst|apb_dac0_inst|Mux5~0 .BypassEn = 1'b0;
  19610. defparam \macro_inst|apb_dac0_inst|Mux5~0 .CarryEnb = 1'b1;
  19611. alta_slice \macro_inst|apb_dac0_inst|Mux5~1 (
  19612. .A(\macro_inst|apb_dac0_inst|Add3~8_combout ),
  19613. .B(\macro_inst|apb_dac0_inst|Mux5~0_combout ),
  19614. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19615. .D(\macro_inst|apb_dac0_inst|Add5~8_combout ),
  19616. .Cin(),
  19617. .Qin(),
  19618. .Clk(),
  19619. .AsyncReset(),
  19620. .SyncReset(),
  19621. .ShiftData(),
  19622. .SyncLoad(),
  19623. .LutOut(\macro_inst|apb_dac0_inst|Mux5~1_combout ),
  19624. .Cout(),
  19625. .Q());
  19626. defparam \macro_inst|apb_dac0_inst|Mux5~1 .coord_x = 16;
  19627. defparam \macro_inst|apb_dac0_inst|Mux5~1 .coord_y = 8;
  19628. defparam \macro_inst|apb_dac0_inst|Mux5~1 .coord_z = 1;
  19629. defparam \macro_inst|apb_dac0_inst|Mux5~1 .mask = 16'hEC2C;
  19630. defparam \macro_inst|apb_dac0_inst|Mux5~1 .modeMux = 1'b0;
  19631. defparam \macro_inst|apb_dac0_inst|Mux5~1 .FeedbackMux = 1'b0;
  19632. defparam \macro_inst|apb_dac0_inst|Mux5~1 .ShiftMux = 1'b0;
  19633. defparam \macro_inst|apb_dac0_inst|Mux5~1 .BypassEn = 1'b0;
  19634. defparam \macro_inst|apb_dac0_inst|Mux5~1 .CarryEnb = 1'b1;
  19635. alta_slice \macro_inst|apb_dac0_inst|Mux6~0 (
  19636. .A(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19637. .B(\macro_inst|apb_dac0_inst|Add3~6_combout ),
  19638. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19639. .D(\macro_inst|apb_dac0_inst|Add4~6_combout ),
  19640. .Cin(),
  19641. .Qin(),
  19642. .Clk(),
  19643. .AsyncReset(),
  19644. .SyncReset(),
  19645. .ShiftData(),
  19646. .SyncLoad(),
  19647. .LutOut(\macro_inst|apb_dac0_inst|Mux6~0_combout ),
  19648. .Cout(),
  19649. .Q());
  19650. defparam \macro_inst|apb_dac0_inst|Mux6~0 .coord_x = 16;
  19651. defparam \macro_inst|apb_dac0_inst|Mux6~0 .coord_y = 6;
  19652. defparam \macro_inst|apb_dac0_inst|Mux6~0 .coord_z = 13;
  19653. defparam \macro_inst|apb_dac0_inst|Mux6~0 .mask = 16'hE5E0;
  19654. defparam \macro_inst|apb_dac0_inst|Mux6~0 .modeMux = 1'b0;
  19655. defparam \macro_inst|apb_dac0_inst|Mux6~0 .FeedbackMux = 1'b0;
  19656. defparam \macro_inst|apb_dac0_inst|Mux6~0 .ShiftMux = 1'b0;
  19657. defparam \macro_inst|apb_dac0_inst|Mux6~0 .BypassEn = 1'b0;
  19658. defparam \macro_inst|apb_dac0_inst|Mux6~0 .CarryEnb = 1'b1;
  19659. alta_slice \macro_inst|apb_dac0_inst|Mux6~1 (
  19660. .A(\macro_inst|apb_dac0_inst|Add5~6_combout ),
  19661. .B(\macro_inst|apb_dac0_inst|Mux6~0_combout ),
  19662. .C(\macro_inst|apb_dac0_inst|max_vol_r [3]),
  19663. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19664. .Cin(),
  19665. .Qin(),
  19666. .Clk(),
  19667. .AsyncReset(),
  19668. .SyncReset(),
  19669. .ShiftData(),
  19670. .SyncLoad(),
  19671. .LutOut(\macro_inst|apb_dac0_inst|Mux6~1_combout ),
  19672. .Cout(),
  19673. .Q());
  19674. defparam \macro_inst|apb_dac0_inst|Mux6~1 .coord_x = 15;
  19675. defparam \macro_inst|apb_dac0_inst|Mux6~1 .coord_y = 5;
  19676. defparam \macro_inst|apb_dac0_inst|Mux6~1 .coord_z = 12;
  19677. defparam \macro_inst|apb_dac0_inst|Mux6~1 .mask = 16'hB8CC;
  19678. defparam \macro_inst|apb_dac0_inst|Mux6~1 .modeMux = 1'b0;
  19679. defparam \macro_inst|apb_dac0_inst|Mux6~1 .FeedbackMux = 1'b0;
  19680. defparam \macro_inst|apb_dac0_inst|Mux6~1 .ShiftMux = 1'b0;
  19681. defparam \macro_inst|apb_dac0_inst|Mux6~1 .BypassEn = 1'b0;
  19682. defparam \macro_inst|apb_dac0_inst|Mux6~1 .CarryEnb = 1'b1;
  19683. alta_slice \macro_inst|apb_dac0_inst|Mux7~0 (
  19684. .A(\macro_inst|apb_dac0_inst|LessThan0~18_combout ),
  19685. .B(\macro_inst|apb_dac0_inst|phase_r [9]),
  19686. .C(\macro_inst|cfg_reg_inst|wave_type [1]),
  19687. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  19688. .Cin(),
  19689. .Qin(),
  19690. .Clk(),
  19691. .AsyncReset(),
  19692. .SyncReset(),
  19693. .ShiftData(),
  19694. .SyncLoad(),
  19695. .LutOut(\macro_inst|apb_dac0_inst|Mux7~0_combout ),
  19696. .Cout(),
  19697. .Q());
  19698. defparam \macro_inst|apb_dac0_inst|Mux7~0 .coord_x = 16;
  19699. defparam \macro_inst|apb_dac0_inst|Mux7~0 .coord_y = 6;
  19700. defparam \macro_inst|apb_dac0_inst|Mux7~0 .coord_z = 6;
  19701. defparam \macro_inst|apb_dac0_inst|Mux7~0 .mask = 16'h004C;
  19702. defparam \macro_inst|apb_dac0_inst|Mux7~0 .modeMux = 1'b0;
  19703. defparam \macro_inst|apb_dac0_inst|Mux7~0 .FeedbackMux = 1'b0;
  19704. defparam \macro_inst|apb_dac0_inst|Mux7~0 .ShiftMux = 1'b0;
  19705. defparam \macro_inst|apb_dac0_inst|Mux7~0 .BypassEn = 1'b0;
  19706. defparam \macro_inst|apb_dac0_inst|Mux7~0 .CarryEnb = 1'b1;
  19707. alta_slice \macro_inst|apb_dac0_inst|Mux7~1 (
  19708. .A(vcc),
  19709. .B(\macro_inst|apb_dac0_inst|phase_r [9]),
  19710. .C(\macro_inst|cfg_reg_inst|wave_type [1]),
  19711. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  19712. .Cin(),
  19713. .Qin(),
  19714. .Clk(),
  19715. .AsyncReset(),
  19716. .SyncReset(),
  19717. .ShiftData(),
  19718. .SyncLoad(),
  19719. .LutOut(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19720. .Cout(),
  19721. .Q());
  19722. defparam \macro_inst|apb_dac0_inst|Mux7~1 .coord_x = 16;
  19723. defparam \macro_inst|apb_dac0_inst|Mux7~1 .coord_y = 6;
  19724. defparam \macro_inst|apb_dac0_inst|Mux7~1 .coord_z = 4;
  19725. defparam \macro_inst|apb_dac0_inst|Mux7~1 .mask = 16'hF030;
  19726. defparam \macro_inst|apb_dac0_inst|Mux7~1 .modeMux = 1'b0;
  19727. defparam \macro_inst|apb_dac0_inst|Mux7~1 .FeedbackMux = 1'b0;
  19728. defparam \macro_inst|apb_dac0_inst|Mux7~1 .ShiftMux = 1'b0;
  19729. defparam \macro_inst|apb_dac0_inst|Mux7~1 .BypassEn = 1'b0;
  19730. defparam \macro_inst|apb_dac0_inst|Mux7~1 .CarryEnb = 1'b1;
  19731. alta_slice \macro_inst|apb_dac0_inst|Mux7~2 (
  19732. .A(vcc),
  19733. .B(vcc),
  19734. .C(\macro_inst|cfg_reg_inst|wave_type [1]),
  19735. .D(\macro_inst|cfg_reg_inst|wave_type [0]),
  19736. .Cin(),
  19737. .Qin(),
  19738. .Clk(),
  19739. .AsyncReset(),
  19740. .SyncReset(),
  19741. .ShiftData(),
  19742. .SyncLoad(),
  19743. .LutOut(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19744. .Cout(),
  19745. .Q());
  19746. defparam \macro_inst|apb_dac0_inst|Mux7~2 .coord_x = 16;
  19747. defparam \macro_inst|apb_dac0_inst|Mux7~2 .coord_y = 6;
  19748. defparam \macro_inst|apb_dac0_inst|Mux7~2 .coord_z = 14;
  19749. defparam \macro_inst|apb_dac0_inst|Mux7~2 .mask = 16'hFF0F;
  19750. defparam \macro_inst|apb_dac0_inst|Mux7~2 .modeMux = 1'b0;
  19751. defparam \macro_inst|apb_dac0_inst|Mux7~2 .FeedbackMux = 1'b0;
  19752. defparam \macro_inst|apb_dac0_inst|Mux7~2 .ShiftMux = 1'b0;
  19753. defparam \macro_inst|apb_dac0_inst|Mux7~2 .BypassEn = 1'b0;
  19754. defparam \macro_inst|apb_dac0_inst|Mux7~2 .CarryEnb = 1'b1;
  19755. alta_slice \macro_inst|apb_dac0_inst|Mux7~3 (
  19756. .A(\macro_inst|cfg_reg_inst|wave_type [1]),
  19757. .B(\macro_inst|cfg_reg_inst|wave_type [0]),
  19758. .C(vcc),
  19759. .D(vcc),
  19760. .Cin(),
  19761. .Qin(),
  19762. .Clk(),
  19763. .AsyncReset(),
  19764. .SyncReset(),
  19765. .ShiftData(),
  19766. .SyncLoad(),
  19767. .LutOut(\macro_inst|apb_dac0_inst|Mux7~3_combout ),
  19768. .Cout(),
  19769. .Q());
  19770. defparam \macro_inst|apb_dac0_inst|Mux7~3 .coord_x = 15;
  19771. defparam \macro_inst|apb_dac0_inst|Mux7~3 .coord_y = 5;
  19772. defparam \macro_inst|apb_dac0_inst|Mux7~3 .coord_z = 11;
  19773. defparam \macro_inst|apb_dac0_inst|Mux7~3 .mask = 16'h4444;
  19774. defparam \macro_inst|apb_dac0_inst|Mux7~3 .modeMux = 1'b0;
  19775. defparam \macro_inst|apb_dac0_inst|Mux7~3 .FeedbackMux = 1'b0;
  19776. defparam \macro_inst|apb_dac0_inst|Mux7~3 .ShiftMux = 1'b0;
  19777. defparam \macro_inst|apb_dac0_inst|Mux7~3 .BypassEn = 1'b0;
  19778. defparam \macro_inst|apb_dac0_inst|Mux7~3 .CarryEnb = 1'b1;
  19779. alta_slice \macro_inst|apb_dac0_inst|Mux7~4 (
  19780. .A(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19781. .B(\macro_inst|apb_dac0_inst|max_vol_r [2]),
  19782. .C(\macro_inst|apb_dac0_inst|Add4~4_combout ),
  19783. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19784. .Cin(),
  19785. .Qin(),
  19786. .Clk(),
  19787. .AsyncReset(),
  19788. .SyncReset(),
  19789. .ShiftData(),
  19790. .SyncLoad(),
  19791. .LutOut(\macro_inst|apb_dac0_inst|Mux7~4_combout ),
  19792. .Cout(),
  19793. .Q());
  19794. defparam \macro_inst|apb_dac0_inst|Mux7~4 .coord_x = 15;
  19795. defparam \macro_inst|apb_dac0_inst|Mux7~4 .coord_y = 6;
  19796. defparam \macro_inst|apb_dac0_inst|Mux7~4 .coord_z = 12;
  19797. defparam \macro_inst|apb_dac0_inst|Mux7~4 .mask = 16'hEE50;
  19798. defparam \macro_inst|apb_dac0_inst|Mux7~4 .modeMux = 1'b0;
  19799. defparam \macro_inst|apb_dac0_inst|Mux7~4 .FeedbackMux = 1'b0;
  19800. defparam \macro_inst|apb_dac0_inst|Mux7~4 .ShiftMux = 1'b0;
  19801. defparam \macro_inst|apb_dac0_inst|Mux7~4 .BypassEn = 1'b0;
  19802. defparam \macro_inst|apb_dac0_inst|Mux7~4 .CarryEnb = 1'b1;
  19803. alta_slice \macro_inst|apb_dac0_inst|Mux7~5 (
  19804. .A(\macro_inst|apb_dac0_inst|Add3~4_combout ),
  19805. .B(\macro_inst|apb_dac0_inst|Mux7~4_combout ),
  19806. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19807. .D(\macro_inst|apb_dac0_inst|Add5~4_combout ),
  19808. .Cin(),
  19809. .Qin(),
  19810. .Clk(),
  19811. .AsyncReset(),
  19812. .SyncReset(),
  19813. .ShiftData(),
  19814. .SyncLoad(),
  19815. .LutOut(\macro_inst|apb_dac0_inst|Mux7~5_combout ),
  19816. .Cout(),
  19817. .Q());
  19818. defparam \macro_inst|apb_dac0_inst|Mux7~5 .coord_x = 15;
  19819. defparam \macro_inst|apb_dac0_inst|Mux7~5 .coord_y = 5;
  19820. defparam \macro_inst|apb_dac0_inst|Mux7~5 .coord_z = 3;
  19821. defparam \macro_inst|apb_dac0_inst|Mux7~5 .mask = 16'hEC2C;
  19822. defparam \macro_inst|apb_dac0_inst|Mux7~5 .modeMux = 1'b0;
  19823. defparam \macro_inst|apb_dac0_inst|Mux7~5 .FeedbackMux = 1'b0;
  19824. defparam \macro_inst|apb_dac0_inst|Mux7~5 .ShiftMux = 1'b0;
  19825. defparam \macro_inst|apb_dac0_inst|Mux7~5 .BypassEn = 1'b0;
  19826. defparam \macro_inst|apb_dac0_inst|Mux7~5 .CarryEnb = 1'b1;
  19827. alta_slice \macro_inst|apb_dac0_inst|Mux8~0 (
  19828. .A(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19829. .B(\macro_inst|apb_dac0_inst|Add4~2_combout ),
  19830. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19831. .D(\macro_inst|apb_dac0_inst|Add3~2_combout ),
  19832. .Cin(),
  19833. .Qin(),
  19834. .Clk(),
  19835. .AsyncReset(),
  19836. .SyncReset(),
  19837. .ShiftData(),
  19838. .SyncLoad(),
  19839. .LutOut(\macro_inst|apb_dac0_inst|Mux8~0_combout ),
  19840. .Cout(),
  19841. .Q());
  19842. defparam \macro_inst|apb_dac0_inst|Mux8~0 .coord_x = 16;
  19843. defparam \macro_inst|apb_dac0_inst|Mux8~0 .coord_y = 6;
  19844. defparam \macro_inst|apb_dac0_inst|Mux8~0 .coord_z = 9;
  19845. defparam \macro_inst|apb_dac0_inst|Mux8~0 .mask = 16'hF4A4;
  19846. defparam \macro_inst|apb_dac0_inst|Mux8~0 .modeMux = 1'b0;
  19847. defparam \macro_inst|apb_dac0_inst|Mux8~0 .FeedbackMux = 1'b0;
  19848. defparam \macro_inst|apb_dac0_inst|Mux8~0 .ShiftMux = 1'b0;
  19849. defparam \macro_inst|apb_dac0_inst|Mux8~0 .BypassEn = 1'b0;
  19850. defparam \macro_inst|apb_dac0_inst|Mux8~0 .CarryEnb = 1'b1;
  19851. alta_slice \macro_inst|apb_dac0_inst|Mux8~1 (
  19852. .A(\macro_inst|apb_dac0_inst|Mux8~0_combout ),
  19853. .B(\macro_inst|apb_dac0_inst|Add5~2_combout ),
  19854. .C(\macro_inst|apb_dac0_inst|max_vol_r [1]),
  19855. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  19856. .Cin(),
  19857. .Qin(),
  19858. .Clk(),
  19859. .AsyncReset(),
  19860. .SyncReset(),
  19861. .ShiftData(),
  19862. .SyncLoad(),
  19863. .LutOut(\macro_inst|apb_dac0_inst|Mux8~1_combout ),
  19864. .Cout(),
  19865. .Q());
  19866. defparam \macro_inst|apb_dac0_inst|Mux8~1 .coord_x = 16;
  19867. defparam \macro_inst|apb_dac0_inst|Mux8~1 .coord_y = 4;
  19868. defparam \macro_inst|apb_dac0_inst|Mux8~1 .coord_z = 5;
  19869. defparam \macro_inst|apb_dac0_inst|Mux8~1 .mask = 16'hD8AA;
  19870. defparam \macro_inst|apb_dac0_inst|Mux8~1 .modeMux = 1'b0;
  19871. defparam \macro_inst|apb_dac0_inst|Mux8~1 .FeedbackMux = 1'b0;
  19872. defparam \macro_inst|apb_dac0_inst|Mux8~1 .ShiftMux = 1'b0;
  19873. defparam \macro_inst|apb_dac0_inst|Mux8~1 .BypassEn = 1'b0;
  19874. defparam \macro_inst|apb_dac0_inst|Mux8~1 .CarryEnb = 1'b1;
  19875. alta_slice \macro_inst|apb_dac0_inst|Mux9~1 (
  19876. .A(\macro_inst|apb_dac0_inst|Add5~0_combout ),
  19877. .B(\macro_inst|apb_dac0_inst|Mux9~0_combout ),
  19878. .C(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  19879. .D(\macro_inst|apb_dac0_inst|Add3~0_combout ),
  19880. .Cin(),
  19881. .Qin(),
  19882. .Clk(),
  19883. .AsyncReset(),
  19884. .SyncReset(),
  19885. .ShiftData(),
  19886. .SyncLoad(),
  19887. .LutOut(\macro_inst|apb_dac0_inst|Mux9~1_combout ),
  19888. .Cout(),
  19889. .Q());
  19890. defparam \macro_inst|apb_dac0_inst|Mux9~1 .coord_x = 16;
  19891. defparam \macro_inst|apb_dac0_inst|Mux9~1 .coord_y = 6;
  19892. defparam \macro_inst|apb_dac0_inst|Mux9~1 .coord_z = 1;
  19893. defparam \macro_inst|apb_dac0_inst|Mux9~1 .mask = 16'hBC8C;
  19894. defparam \macro_inst|apb_dac0_inst|Mux9~1 .modeMux = 1'b0;
  19895. defparam \macro_inst|apb_dac0_inst|Mux9~1 .FeedbackMux = 1'b0;
  19896. defparam \macro_inst|apb_dac0_inst|Mux9~1 .ShiftMux = 1'b0;
  19897. defparam \macro_inst|apb_dac0_inst|Mux9~1 .BypassEn = 1'b0;
  19898. defparam \macro_inst|apb_dac0_inst|Mux9~1 .CarryEnb = 1'b1;
  19899. alta_slice \macro_inst|apb_dac0_inst|always0~0 (
  19900. .A(vcc),
  19901. .B(\macro_inst|cfg_reg_inst|dac_run~q ),
  19902. .C(vcc),
  19903. .D(\macro_inst|cfg_reg_inst|dac_en~q ),
  19904. .Cin(),
  19905. .Qin(),
  19906. .Clk(),
  19907. .AsyncReset(),
  19908. .SyncReset(),
  19909. .ShiftData(),
  19910. .SyncLoad(),
  19911. .LutOut(\macro_inst|apb_dac0_inst|always0~0_combout ),
  19912. .Cout(),
  19913. .Q());
  19914. defparam \macro_inst|apb_dac0_inst|always0~0 .coord_x = 19;
  19915. defparam \macro_inst|apb_dac0_inst|always0~0 .coord_y = 12;
  19916. defparam \macro_inst|apb_dac0_inst|always0~0 .coord_z = 5;
  19917. defparam \macro_inst|apb_dac0_inst|always0~0 .mask = 16'h33FF;
  19918. defparam \macro_inst|apb_dac0_inst|always0~0 .modeMux = 1'b0;
  19919. defparam \macro_inst|apb_dac0_inst|always0~0 .FeedbackMux = 1'b0;
  19920. defparam \macro_inst|apb_dac0_inst|always0~0 .ShiftMux = 1'b0;
  19921. defparam \macro_inst|apb_dac0_inst|always0~0 .BypassEn = 1'b0;
  19922. defparam \macro_inst|apb_dac0_inst|always0~0 .CarryEnb = 1'b1;
  19923. alta_dac \macro_inst|apb_dac0_inst|dac_inst (
  19924. .enb(\macro_inst|cfg_reg_inst|dac_en~_wirecell_combout ),
  19925. .bufenb(\macro_inst|cfg_reg_inst|dac_en~_wirecell_combout ),
  19926. .din({\macro_inst|apb_dac0_inst|Add2~59_combout , \macro_inst|apb_dac0_inst|Add2~58_combout , \macro_inst|apb_dac0_inst|Add2~57_combout , \macro_inst|apb_dac0_inst|Add2~56_combout , \macro_inst|apb_dac0_inst|Add2~55_combout , \macro_inst|apb_dac0_inst|Add2~54_combout , \macro_inst|apb_dac0_inst|Add2~53_combout , \macro_inst|apb_dac0_inst|Add2~52_combout , \macro_inst|apb_dac0_inst|Add2~51_combout , \macro_inst|apb_dac0_inst|Add2~50_combout }),
  19927. .stop(\rv32.sys_ctrl_stop ));
  19928. defparam \macro_inst|apb_dac0_inst|dac_inst .coord_x = 22;
  19929. defparam \macro_inst|apb_dac0_inst|dac_inst .coord_y = 11;
  19930. defparam \macro_inst|apb_dac0_inst|dac_inst .coord_z = 0;
  19931. alta_slice \macro_inst|apb_dac0_inst|diff[0]~0 (
  19932. .A(\macro_inst|apb_dac0_inst|max_vol_r [0]),
  19933. .B(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  19934. .C(vcc),
  19935. .D(vcc),
  19936. .Cin(),
  19937. .Qin(),
  19938. .Clk(),
  19939. .AsyncReset(),
  19940. .SyncReset(),
  19941. .ShiftData(),
  19942. .SyncLoad(),
  19943. .LutOut(\macro_inst|apb_dac0_inst|diff[0]~0_combout ),
  19944. .Cout(\macro_inst|apb_dac0_inst|diff[0]~1 ),
  19945. .Q());
  19946. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .coord_x = 15;
  19947. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .coord_y = 4;
  19948. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .coord_z = 4;
  19949. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .mask = 16'h66BB;
  19950. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .modeMux = 1'b0;
  19951. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .FeedbackMux = 1'b0;
  19952. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .ShiftMux = 1'b0;
  19953. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .BypassEn = 1'b0;
  19954. defparam \macro_inst|apb_dac0_inst|diff[0]~0 .CarryEnb = 1'b0;
  19955. alta_slice \macro_inst|apb_dac0_inst|diff[1]~2 (
  19956. .A(\macro_inst|apb_dac0_inst|max_vol_r [1]),
  19957. .B(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  19958. .C(vcc),
  19959. .D(vcc),
  19960. .Cin(\macro_inst|apb_dac0_inst|diff[0]~1 ),
  19961. .Qin(),
  19962. .Clk(),
  19963. .AsyncReset(),
  19964. .SyncReset(),
  19965. .ShiftData(),
  19966. .SyncLoad(),
  19967. .LutOut(\macro_inst|apb_dac0_inst|diff[1]~2_combout ),
  19968. .Cout(\macro_inst|apb_dac0_inst|diff[1]~3 ),
  19969. .Q());
  19970. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .coord_x = 15;
  19971. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .coord_y = 4;
  19972. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .coord_z = 5;
  19973. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .mask = 16'h694D;
  19974. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .modeMux = 1'b1;
  19975. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .FeedbackMux = 1'b0;
  19976. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .ShiftMux = 1'b0;
  19977. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .BypassEn = 1'b0;
  19978. defparam \macro_inst|apb_dac0_inst|diff[1]~2 .CarryEnb = 1'b0;
  19979. alta_slice \macro_inst|apb_dac0_inst|diff[2]~4 (
  19980. .A(\macro_inst|apb_dac0_inst|max_vol_r [2]),
  19981. .B(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  19982. .C(vcc),
  19983. .D(vcc),
  19984. .Cin(\macro_inst|apb_dac0_inst|diff[1]~3 ),
  19985. .Qin(),
  19986. .Clk(),
  19987. .AsyncReset(),
  19988. .SyncReset(),
  19989. .ShiftData(),
  19990. .SyncLoad(),
  19991. .LutOut(\macro_inst|apb_dac0_inst|diff[2]~4_combout ),
  19992. .Cout(\macro_inst|apb_dac0_inst|diff[2]~5 ),
  19993. .Q());
  19994. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .coord_x = 15;
  19995. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .coord_y = 4;
  19996. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .coord_z = 6;
  19997. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .mask = 16'h962B;
  19998. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .modeMux = 1'b1;
  19999. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .FeedbackMux = 1'b0;
  20000. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .ShiftMux = 1'b0;
  20001. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .BypassEn = 1'b0;
  20002. defparam \macro_inst|apb_dac0_inst|diff[2]~4 .CarryEnb = 1'b0;
  20003. alta_slice \macro_inst|apb_dac0_inst|diff[3]~6 (
  20004. .A(\macro_inst|apb_dac0_inst|max_vol_r [3]),
  20005. .B(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  20006. .C(vcc),
  20007. .D(vcc),
  20008. .Cin(\macro_inst|apb_dac0_inst|diff[2]~5 ),
  20009. .Qin(),
  20010. .Clk(),
  20011. .AsyncReset(),
  20012. .SyncReset(),
  20013. .ShiftData(),
  20014. .SyncLoad(),
  20015. .LutOut(\macro_inst|apb_dac0_inst|diff[3]~6_combout ),
  20016. .Cout(\macro_inst|apb_dac0_inst|diff[3]~7 ),
  20017. .Q());
  20018. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .coord_x = 15;
  20019. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .coord_y = 4;
  20020. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .coord_z = 7;
  20021. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .mask = 16'h694D;
  20022. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .modeMux = 1'b1;
  20023. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .FeedbackMux = 1'b0;
  20024. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .ShiftMux = 1'b0;
  20025. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .BypassEn = 1'b0;
  20026. defparam \macro_inst|apb_dac0_inst|diff[3]~6 .CarryEnb = 1'b0;
  20027. alta_slice \macro_inst|apb_dac0_inst|diff[4]~8 (
  20028. .A(\macro_inst|apb_dac0_inst|max_vol_r [4]),
  20029. .B(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  20030. .C(vcc),
  20031. .D(vcc),
  20032. .Cin(\macro_inst|apb_dac0_inst|diff[3]~7 ),
  20033. .Qin(),
  20034. .Clk(),
  20035. .AsyncReset(),
  20036. .SyncReset(),
  20037. .ShiftData(),
  20038. .SyncLoad(),
  20039. .LutOut(\macro_inst|apb_dac0_inst|diff[4]~8_combout ),
  20040. .Cout(\macro_inst|apb_dac0_inst|diff[4]~9 ),
  20041. .Q());
  20042. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .coord_x = 15;
  20043. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .coord_y = 4;
  20044. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .coord_z = 8;
  20045. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .mask = 16'h962B;
  20046. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .modeMux = 1'b1;
  20047. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .FeedbackMux = 1'b0;
  20048. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .ShiftMux = 1'b0;
  20049. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .BypassEn = 1'b0;
  20050. defparam \macro_inst|apb_dac0_inst|diff[4]~8 .CarryEnb = 1'b0;
  20051. alta_slice \macro_inst|apb_dac0_inst|diff[5]~10 (
  20052. .A(\macro_inst|apb_dac0_inst|max_vol_r [5]),
  20053. .B(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  20054. .C(vcc),
  20055. .D(vcc),
  20056. .Cin(\macro_inst|apb_dac0_inst|diff[4]~9 ),
  20057. .Qin(),
  20058. .Clk(),
  20059. .AsyncReset(),
  20060. .SyncReset(),
  20061. .ShiftData(),
  20062. .SyncLoad(),
  20063. .LutOut(\macro_inst|apb_dac0_inst|diff[5]~10_combout ),
  20064. .Cout(\macro_inst|apb_dac0_inst|diff[5]~11 ),
  20065. .Q());
  20066. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .coord_x = 15;
  20067. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .coord_y = 4;
  20068. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .coord_z = 9;
  20069. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .mask = 16'h694D;
  20070. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .modeMux = 1'b1;
  20071. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .FeedbackMux = 1'b0;
  20072. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .ShiftMux = 1'b0;
  20073. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .BypassEn = 1'b0;
  20074. defparam \macro_inst|apb_dac0_inst|diff[5]~10 .CarryEnb = 1'b0;
  20075. alta_slice \macro_inst|apb_dac0_inst|diff[6]~12 (
  20076. .A(\macro_inst|apb_dac0_inst|max_vol_r [6]),
  20077. .B(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  20078. .C(vcc),
  20079. .D(vcc),
  20080. .Cin(\macro_inst|apb_dac0_inst|diff[5]~11 ),
  20081. .Qin(),
  20082. .Clk(),
  20083. .AsyncReset(),
  20084. .SyncReset(),
  20085. .ShiftData(),
  20086. .SyncLoad(),
  20087. .LutOut(\macro_inst|apb_dac0_inst|diff[6]~12_combout ),
  20088. .Cout(\macro_inst|apb_dac0_inst|diff[6]~13 ),
  20089. .Q());
  20090. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .coord_x = 15;
  20091. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .coord_y = 4;
  20092. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .coord_z = 10;
  20093. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .mask = 16'h962B;
  20094. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .modeMux = 1'b1;
  20095. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .FeedbackMux = 1'b0;
  20096. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .ShiftMux = 1'b0;
  20097. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .BypassEn = 1'b0;
  20098. defparam \macro_inst|apb_dac0_inst|diff[6]~12 .CarryEnb = 1'b0;
  20099. alta_slice \macro_inst|apb_dac0_inst|diff[7]~14 (
  20100. .A(\macro_inst|apb_dac0_inst|max_vol_r [7]),
  20101. .B(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  20102. .C(vcc),
  20103. .D(vcc),
  20104. .Cin(\macro_inst|apb_dac0_inst|diff[6]~13 ),
  20105. .Qin(),
  20106. .Clk(),
  20107. .AsyncReset(),
  20108. .SyncReset(),
  20109. .ShiftData(),
  20110. .SyncLoad(),
  20111. .LutOut(\macro_inst|apb_dac0_inst|diff[7]~14_combout ),
  20112. .Cout(\macro_inst|apb_dac0_inst|diff[7]~15 ),
  20113. .Q());
  20114. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .coord_x = 15;
  20115. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .coord_y = 4;
  20116. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .coord_z = 11;
  20117. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .mask = 16'h694D;
  20118. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .modeMux = 1'b1;
  20119. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .FeedbackMux = 1'b0;
  20120. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .ShiftMux = 1'b0;
  20121. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .BypassEn = 1'b0;
  20122. defparam \macro_inst|apb_dac0_inst|diff[7]~14 .CarryEnb = 1'b0;
  20123. alta_slice \macro_inst|apb_dac0_inst|diff[8]~16 (
  20124. .A(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  20125. .B(\macro_inst|apb_dac0_inst|max_vol_r [8]),
  20126. .C(vcc),
  20127. .D(vcc),
  20128. .Cin(\macro_inst|apb_dac0_inst|diff[7]~15 ),
  20129. .Qin(),
  20130. .Clk(),
  20131. .AsyncReset(),
  20132. .SyncReset(),
  20133. .ShiftData(),
  20134. .SyncLoad(),
  20135. .LutOut(\macro_inst|apb_dac0_inst|diff[8]~16_combout ),
  20136. .Cout(\macro_inst|apb_dac0_inst|diff[8]~17 ),
  20137. .Q());
  20138. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .coord_x = 15;
  20139. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .coord_y = 4;
  20140. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .coord_z = 12;
  20141. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .mask = 16'h964D;
  20142. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .modeMux = 1'b1;
  20143. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .FeedbackMux = 1'b0;
  20144. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .ShiftMux = 1'b0;
  20145. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .BypassEn = 1'b0;
  20146. defparam \macro_inst|apb_dac0_inst|diff[8]~16 .CarryEnb = 1'b0;
  20147. alta_slice \macro_inst|apb_dac0_inst|diff[9]~18 (
  20148. .A(vcc),
  20149. .B(\macro_inst|apb_dac0_inst|max_vol_r [9]),
  20150. .C(vcc),
  20151. .D(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  20152. .Cin(\macro_inst|apb_dac0_inst|diff[8]~17 ),
  20153. .Qin(),
  20154. .Clk(),
  20155. .AsyncReset(),
  20156. .SyncReset(),
  20157. .ShiftData(),
  20158. .SyncLoad(),
  20159. .LutOut(\macro_inst|apb_dac0_inst|diff[9]~18_combout ),
  20160. .Cout(),
  20161. .Q());
  20162. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .coord_x = 15;
  20163. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .coord_y = 4;
  20164. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .coord_z = 13;
  20165. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .mask = 16'h3CC3;
  20166. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .modeMux = 1'b1;
  20167. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .FeedbackMux = 1'b0;
  20168. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .ShiftMux = 1'b0;
  20169. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .BypassEn = 1'b0;
  20170. defparam \macro_inst|apb_dac0_inst|diff[9]~18 .CarryEnb = 1'b1;
  20171. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[0] (
  20172. .A(\macro_inst|apb_dac0_inst|Add4~0_combout ),
  20173. .B(\macro_inst|apb_dac0_inst|Mux7~1_combout ),
  20174. .C(\macro_inst|cfg_reg_inst|max_vol [0]),
  20175. .D(\macro_inst|apb_dac0_inst|Mux7~2_combout ),
  20176. .Cin(),
  20177. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [0]),
  20178. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ),
  20179. .AsyncReset(AsyncReset_X56_Y8_GND),
  20180. .SyncReset(SyncReset_X56_Y8_GND),
  20181. .ShiftData(),
  20182. .SyncLoad(SyncLoad_X56_Y8_VCC),
  20183. .LutOut(\macro_inst|apb_dac0_inst|Mux9~0_combout ),
  20184. .Cout(),
  20185. .Q(\macro_inst|apb_dac0_inst|max_vol_r [0]));
  20186. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .coord_x = 15;
  20187. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .coord_y = 6;
  20188. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .coord_z = 15;
  20189. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .mask = 16'hFC22;
  20190. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .modeMux = 1'b0;
  20191. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .FeedbackMux = 1'b1;
  20192. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .ShiftMux = 1'b0;
  20193. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .BypassEn = 1'b1;
  20194. defparam \macro_inst|apb_dac0_inst|max_vol_r[0] .CarryEnb = 1'b1;
  20195. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[1] (
  20196. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~18_combout ),
  20197. .B(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  20198. .C(\macro_inst|cfg_reg_inst|max_vol [1]),
  20199. .D(vcc),
  20200. .Cin(),
  20201. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [1]),
  20202. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20203. .AsyncReset(AsyncReset_X57_Y8_GND),
  20204. .SyncReset(SyncReset_X57_Y8_GND),
  20205. .ShiftData(),
  20206. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20207. .LutOut(\macro_inst|apb_dac0_inst|Add3~0_combout ),
  20208. .Cout(\macro_inst|apb_dac0_inst|Add3~1 ),
  20209. .Q(\macro_inst|apb_dac0_inst|max_vol_r [1]));
  20210. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .coord_x = 15;
  20211. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .coord_y = 8;
  20212. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .coord_z = 0;
  20213. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .mask = 16'h6688;
  20214. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .modeMux = 1'b0;
  20215. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .FeedbackMux = 1'b0;
  20216. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .ShiftMux = 1'b0;
  20217. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .BypassEn = 1'b1;
  20218. defparam \macro_inst|apb_dac0_inst|max_vol_r[1] .CarryEnb = 1'b0;
  20219. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[2] (
  20220. .A(\macro_inst|cfg_reg_inst|max_vol [2]),
  20221. .B(vcc),
  20222. .C(vcc),
  20223. .D(vcc),
  20224. .Cin(),
  20225. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [2]),
  20226. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  20227. .AsyncReset(AsyncReset_X57_Y9_GND),
  20228. .SyncReset(),
  20229. .ShiftData(),
  20230. .SyncLoad(),
  20231. .LutOut(\macro_inst|apb_dac0_inst|max_vol_r[2]~3_combout ),
  20232. .Cout(),
  20233. .Q(\macro_inst|apb_dac0_inst|max_vol_r [2]));
  20234. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .coord_x = 14;
  20235. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .coord_y = 6;
  20236. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .coord_z = 0;
  20237. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .mask = 16'h5555;
  20238. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .modeMux = 1'b0;
  20239. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .FeedbackMux = 1'b0;
  20240. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .ShiftMux = 1'b0;
  20241. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .BypassEn = 1'b0;
  20242. defparam \macro_inst|apb_dac0_inst|max_vol_r[2] .CarryEnb = 1'b1;
  20243. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[3] (
  20244. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28_combout ),
  20245. .B(\macro_inst|apb_dac0_inst|max_vol_r [5]),
  20246. .C(\macro_inst|cfg_reg_inst|max_vol [3]),
  20247. .D(vcc),
  20248. .Cin(\macro_inst|apb_dac0_inst|Add4~9 ),
  20249. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [3]),
  20250. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ),
  20251. .AsyncReset(AsyncReset_X56_Y8_GND),
  20252. .SyncReset(SyncReset_X56_Y8_GND),
  20253. .ShiftData(),
  20254. .SyncLoad(SyncLoad_X56_Y8_VCC),
  20255. .LutOut(\macro_inst|apb_dac0_inst|Add4~10_combout ),
  20256. .Cout(\macro_inst|apb_dac0_inst|Add4~11 ),
  20257. .Q(\macro_inst|apb_dac0_inst|max_vol_r [3]));
  20258. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .coord_x = 15;
  20259. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .coord_y = 6;
  20260. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .coord_z = 7;
  20261. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .mask = 16'h692B;
  20262. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .modeMux = 1'b1;
  20263. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .FeedbackMux = 1'b0;
  20264. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .ShiftMux = 1'b0;
  20265. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .BypassEn = 1'b1;
  20266. defparam \macro_inst|apb_dac0_inst|max_vol_r[3] .CarryEnb = 1'b0;
  20267. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[4] (
  20268. .A(vcc),
  20269. .B(\macro_inst|apb_dac0_inst|max_vol_r [9]),
  20270. .C(\macro_inst|cfg_reg_inst|max_vol [4]),
  20271. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36_combout ),
  20272. .Cin(\macro_inst|apb_dac0_inst|Add4~17 ),
  20273. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [4]),
  20274. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ),
  20275. .AsyncReset(AsyncReset_X56_Y8_GND),
  20276. .SyncReset(SyncReset_X56_Y8_GND),
  20277. .ShiftData(),
  20278. .SyncLoad(SyncLoad_X56_Y8_VCC),
  20279. .LutOut(\macro_inst|apb_dac0_inst|Add4~18_combout ),
  20280. .Cout(),
  20281. .Q(\macro_inst|apb_dac0_inst|max_vol_r [4]));
  20282. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .coord_x = 15;
  20283. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .coord_y = 6;
  20284. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .coord_z = 11;
  20285. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .mask = 16'h3CC3;
  20286. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .modeMux = 1'b1;
  20287. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .FeedbackMux = 1'b0;
  20288. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .ShiftMux = 1'b0;
  20289. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .BypassEn = 1'b1;
  20290. defparam \macro_inst|apb_dac0_inst|max_vol_r[4] .CarryEnb = 1'b1;
  20291. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[5] (
  20292. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~28_combout ),
  20293. .B(\macro_inst|apb_dac0_inst|max_vol_r [5]),
  20294. .C(\macro_inst|cfg_reg_inst|max_vol [5]),
  20295. .D(vcc),
  20296. .Cin(\macro_inst|apb_dac0_inst|LessThan0~9_cout ),
  20297. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [5]),
  20298. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  20299. .AsyncReset(AsyncReset_X57_Y9_GND),
  20300. .SyncReset(SyncReset_X57_Y9_GND),
  20301. .ShiftData(),
  20302. .SyncLoad(SyncLoad_X57_Y9_VCC),
  20303. .LutOut(),
  20304. .Cout(\macro_inst|apb_dac0_inst|LessThan0~11_cout ),
  20305. .Q(\macro_inst|apb_dac0_inst|max_vol_r [5]));
  20306. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .coord_x = 14;
  20307. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .coord_y = 6;
  20308. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .coord_z = 9;
  20309. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .mask = 16'h002B;
  20310. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .modeMux = 1'b1;
  20311. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .FeedbackMux = 1'b0;
  20312. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .ShiftMux = 1'b0;
  20313. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .BypassEn = 1'b1;
  20314. defparam \macro_inst|apb_dac0_inst|max_vol_r[5] .CarryEnb = 1'b0;
  20315. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[6] (
  20316. .A(\macro_inst|apb_dac0_inst|max_vol_r [6]),
  20317. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30_combout ),
  20318. .C(\macro_inst|cfg_reg_inst|max_vol [6]),
  20319. .D(vcc),
  20320. .Cin(\macro_inst|apb_dac0_inst|Add4~11 ),
  20321. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [6]),
  20322. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y8_SIG_VCC ),
  20323. .AsyncReset(AsyncReset_X56_Y8_GND),
  20324. .SyncReset(SyncReset_X56_Y8_GND),
  20325. .ShiftData(),
  20326. .SyncLoad(SyncLoad_X56_Y8_VCC),
  20327. .LutOut(\macro_inst|apb_dac0_inst|Add4~12_combout ),
  20328. .Cout(\macro_inst|apb_dac0_inst|Add4~13 ),
  20329. .Q(\macro_inst|apb_dac0_inst|max_vol_r [6]));
  20330. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .coord_x = 15;
  20331. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .coord_y = 6;
  20332. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .coord_z = 8;
  20333. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .mask = 16'h962B;
  20334. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .modeMux = 1'b1;
  20335. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .FeedbackMux = 1'b0;
  20336. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .ShiftMux = 1'b0;
  20337. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .BypassEn = 1'b1;
  20338. defparam \macro_inst|apb_dac0_inst|max_vol_r[6] .CarryEnb = 1'b0;
  20339. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[7] (
  20340. .A(vcc),
  20341. .B(vcc),
  20342. .C(vcc),
  20343. .D(\macro_inst|cfg_reg_inst|max_vol [7]),
  20344. .Cin(),
  20345. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [7]),
  20346. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  20347. .AsyncReset(AsyncReset_X57_Y9_GND),
  20348. .SyncReset(),
  20349. .ShiftData(),
  20350. .SyncLoad(),
  20351. .LutOut(\macro_inst|apb_dac0_inst|max_vol_r[7]~2_combout ),
  20352. .Cout(),
  20353. .Q(\macro_inst|apb_dac0_inst|max_vol_r [7]));
  20354. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .coord_x = 14;
  20355. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .coord_y = 6;
  20356. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .coord_z = 15;
  20357. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .mask = 16'h00FF;
  20358. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .modeMux = 1'b0;
  20359. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .FeedbackMux = 1'b0;
  20360. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .ShiftMux = 1'b0;
  20361. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .BypassEn = 1'b0;
  20362. defparam \macro_inst|apb_dac0_inst|max_vol_r[7] .CarryEnb = 1'b1;
  20363. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[8] (
  20364. .A(vcc),
  20365. .B(vcc),
  20366. .C(vcc),
  20367. .D(\macro_inst|cfg_reg_inst|max_vol [8]),
  20368. .Cin(),
  20369. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [8]),
  20370. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  20371. .AsyncReset(AsyncReset_X57_Y9_GND),
  20372. .SyncReset(),
  20373. .ShiftData(),
  20374. .SyncLoad(),
  20375. .LutOut(\macro_inst|apb_dac0_inst|max_vol_r[8]~1_combout ),
  20376. .Cout(),
  20377. .Q(\macro_inst|apb_dac0_inst|max_vol_r [8]));
  20378. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .coord_x = 14;
  20379. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .coord_y = 6;
  20380. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .coord_z = 14;
  20381. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .mask = 16'h00FF;
  20382. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .modeMux = 1'b0;
  20383. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .FeedbackMux = 1'b0;
  20384. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .ShiftMux = 1'b0;
  20385. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .BypassEn = 1'b0;
  20386. defparam \macro_inst|apb_dac0_inst|max_vol_r[8] .CarryEnb = 1'b1;
  20387. alta_slice \macro_inst|apb_dac0_inst|max_vol_r[9] (
  20388. .A(vcc),
  20389. .B(vcc),
  20390. .C(vcc),
  20391. .D(\macro_inst|cfg_reg_inst|max_vol [9]),
  20392. .Cin(),
  20393. .Qin(\macro_inst|apb_dac0_inst|max_vol_r [9]),
  20394. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y7_SIG_VCC ),
  20395. .AsyncReset(AsyncReset_X57_Y7_GND),
  20396. .SyncReset(),
  20397. .ShiftData(),
  20398. .SyncLoad(),
  20399. .LutOut(\macro_inst|apb_dac0_inst|max_vol_r[9]~0_combout ),
  20400. .Cout(),
  20401. .Q(\macro_inst|apb_dac0_inst|max_vol_r [9]));
  20402. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .coord_x = 16;
  20403. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .coord_y = 8;
  20404. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .coord_z = 12;
  20405. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .mask = 16'h00FF;
  20406. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .modeMux = 1'b0;
  20407. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .FeedbackMux = 1'b0;
  20408. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .ShiftMux = 1'b0;
  20409. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .BypassEn = 1'b0;
  20410. defparam \macro_inst|apb_dac0_inst|max_vol_r[9] .CarryEnb = 1'b1;
  20411. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[0] (
  20412. .A(vcc),
  20413. .B(vcc),
  20414. .C(vcc),
  20415. .D(\macro_inst|cfg_reg_inst|min_vol [0]),
  20416. .Cin(),
  20417. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [0]),
  20418. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20419. .AsyncReset(AsyncReset_X57_Y8_GND),
  20420. .SyncReset(),
  20421. .ShiftData(),
  20422. .SyncLoad(),
  20423. .LutOut(\macro_inst|apb_dac0_inst|min_vol_r[0]~feeder_combout ),
  20424. .Cout(),
  20425. .Q(\macro_inst|apb_dac0_inst|min_vol_r [0]));
  20426. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .coord_x = 15;
  20427. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .coord_y = 8;
  20428. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .coord_z = 13;
  20429. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .mask = 16'hFF00;
  20430. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .modeMux = 1'b0;
  20431. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .FeedbackMux = 1'b0;
  20432. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .ShiftMux = 1'b0;
  20433. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .BypassEn = 1'b0;
  20434. defparam \macro_inst|apb_dac0_inst|min_vol_r[0] .CarryEnb = 1'b1;
  20435. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[1] (
  20436. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~20_combout ),
  20437. .B(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  20438. .C(\macro_inst|cfg_reg_inst|min_vol [1]),
  20439. .D(vcc),
  20440. .Cin(\macro_inst|apb_dac0_inst|Add3~1 ),
  20441. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [1]),
  20442. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20443. .AsyncReset(AsyncReset_X57_Y8_GND),
  20444. .SyncReset(SyncReset_X57_Y8_GND),
  20445. .ShiftData(),
  20446. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20447. .LutOut(\macro_inst|apb_dac0_inst|Add3~2_combout ),
  20448. .Cout(\macro_inst|apb_dac0_inst|Add3~3 ),
  20449. .Q(\macro_inst|apb_dac0_inst|min_vol_r [1]));
  20450. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .coord_x = 15;
  20451. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .coord_y = 8;
  20452. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .coord_z = 1;
  20453. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .mask = 16'h9617;
  20454. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .modeMux = 1'b1;
  20455. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .FeedbackMux = 1'b0;
  20456. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .ShiftMux = 1'b0;
  20457. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .BypassEn = 1'b1;
  20458. defparam \macro_inst|apb_dac0_inst|min_vol_r[1] .CarryEnb = 1'b0;
  20459. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[2] (
  20460. .A(vcc),
  20461. .B(vcc),
  20462. .C(vcc),
  20463. .D(\macro_inst|cfg_reg_inst|min_vol [2]),
  20464. .Cin(),
  20465. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [2]),
  20466. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y7_SIG_VCC ),
  20467. .AsyncReset(AsyncReset_X57_Y7_GND),
  20468. .SyncReset(),
  20469. .ShiftData(),
  20470. .SyncLoad(),
  20471. .LutOut(\macro_inst|apb_dac0_inst|min_vol_r[2]~0_combout ),
  20472. .Cout(),
  20473. .Q(\macro_inst|apb_dac0_inst|min_vol_r [2]));
  20474. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .coord_x = 16;
  20475. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .coord_y = 8;
  20476. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .coord_z = 13;
  20477. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .mask = 16'h00FF;
  20478. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .modeMux = 1'b0;
  20479. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .FeedbackMux = 1'b0;
  20480. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .ShiftMux = 1'b0;
  20481. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .BypassEn = 1'b0;
  20482. defparam \macro_inst|apb_dac0_inst|min_vol_r[2] .CarryEnb = 1'b1;
  20483. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[3] (
  20484. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~24_combout ),
  20485. .B(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  20486. .C(\macro_inst|cfg_reg_inst|min_vol [3]),
  20487. .D(vcc),
  20488. .Cin(\macro_inst|apb_dac0_inst|Add3~5 ),
  20489. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [3]),
  20490. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20491. .AsyncReset(AsyncReset_X57_Y8_GND),
  20492. .SyncReset(SyncReset_X57_Y8_GND),
  20493. .ShiftData(),
  20494. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20495. .LutOut(\macro_inst|apb_dac0_inst|Add3~6_combout ),
  20496. .Cout(\macro_inst|apb_dac0_inst|Add3~7 ),
  20497. .Q(\macro_inst|apb_dac0_inst|min_vol_r [3]));
  20498. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .coord_x = 15;
  20499. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .coord_y = 8;
  20500. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .coord_z = 3;
  20501. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .mask = 16'h9617;
  20502. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .modeMux = 1'b1;
  20503. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .FeedbackMux = 1'b0;
  20504. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .ShiftMux = 1'b0;
  20505. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .BypassEn = 1'b1;
  20506. defparam \macro_inst|apb_dac0_inst|min_vol_r[3] .CarryEnb = 1'b0;
  20507. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[4] (
  20508. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26_combout ),
  20509. .B(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  20510. .C(\macro_inst|cfg_reg_inst|min_vol [4]),
  20511. .D(vcc),
  20512. .Cin(\macro_inst|apb_dac0_inst|Add3~7 ),
  20513. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [4]),
  20514. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20515. .AsyncReset(AsyncReset_X57_Y8_GND),
  20516. .SyncReset(SyncReset_X57_Y8_GND),
  20517. .ShiftData(),
  20518. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20519. .LutOut(\macro_inst|apb_dac0_inst|Add3~8_combout ),
  20520. .Cout(\macro_inst|apb_dac0_inst|Add3~9 ),
  20521. .Q(\macro_inst|apb_dac0_inst|min_vol_r [4]));
  20522. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .coord_x = 15;
  20523. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .coord_y = 8;
  20524. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .coord_z = 4;
  20525. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .mask = 16'h698E;
  20526. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .modeMux = 1'b1;
  20527. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .FeedbackMux = 1'b0;
  20528. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .ShiftMux = 1'b0;
  20529. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .BypassEn = 1'b1;
  20530. defparam \macro_inst|apb_dac0_inst|min_vol_r[4] .CarryEnb = 1'b0;
  20531. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[5] (
  20532. .A(vcc),
  20533. .B(vcc),
  20534. .C(\macro_inst|cfg_reg_inst|min_vol [5]),
  20535. .D(vcc),
  20536. .Cin(),
  20537. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [5]),
  20538. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20539. .AsyncReset(AsyncReset_X57_Y8_GND),
  20540. .SyncReset(),
  20541. .ShiftData(),
  20542. .SyncLoad(),
  20543. .LutOut(\macro_inst|apb_dac0_inst|min_vol_r[5]~1_combout ),
  20544. .Cout(),
  20545. .Q(\macro_inst|apb_dac0_inst|min_vol_r [5]));
  20546. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .coord_x = 15;
  20547. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .coord_y = 8;
  20548. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .coord_z = 15;
  20549. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .mask = 16'h0F0F;
  20550. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .modeMux = 1'b0;
  20551. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .FeedbackMux = 1'b0;
  20552. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .ShiftMux = 1'b0;
  20553. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .BypassEn = 1'b0;
  20554. defparam \macro_inst|apb_dac0_inst|min_vol_r[5] .CarryEnb = 1'b1;
  20555. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[6] (
  20556. .A(vcc),
  20557. .B(\macro_inst|cfg_reg_inst|min_vol [6]),
  20558. .C(vcc),
  20559. .D(vcc),
  20560. .Cin(),
  20561. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [6]),
  20562. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20563. .AsyncReset(AsyncReset_X57_Y8_GND),
  20564. .SyncReset(),
  20565. .ShiftData(),
  20566. .SyncLoad(),
  20567. .LutOut(\macro_inst|apb_dac0_inst|min_vol_r[6]~2_combout ),
  20568. .Cout(),
  20569. .Q(\macro_inst|apb_dac0_inst|min_vol_r [6]));
  20570. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .coord_x = 15;
  20571. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .coord_y = 8;
  20572. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .coord_z = 14;
  20573. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .mask = 16'h3333;
  20574. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .modeMux = 1'b0;
  20575. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .FeedbackMux = 1'b0;
  20576. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .ShiftMux = 1'b0;
  20577. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .BypassEn = 1'b0;
  20578. defparam \macro_inst|apb_dac0_inst|min_vol_r[6] .CarryEnb = 1'b1;
  20579. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[7] (
  20580. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32_combout ),
  20581. .B(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  20582. .C(\macro_inst|cfg_reg_inst|min_vol [7]),
  20583. .D(vcc),
  20584. .Cin(\macro_inst|apb_dac0_inst|Add3~13 ),
  20585. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [7]),
  20586. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20587. .AsyncReset(AsyncReset_X57_Y8_GND),
  20588. .SyncReset(SyncReset_X57_Y8_GND),
  20589. .ShiftData(),
  20590. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20591. .LutOut(\macro_inst|apb_dac0_inst|Add3~14_combout ),
  20592. .Cout(\macro_inst|apb_dac0_inst|Add3~15 ),
  20593. .Q(\macro_inst|apb_dac0_inst|min_vol_r [7]));
  20594. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .coord_x = 15;
  20595. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .coord_y = 8;
  20596. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .coord_z = 7;
  20597. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .mask = 16'h9617;
  20598. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .modeMux = 1'b1;
  20599. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .FeedbackMux = 1'b0;
  20600. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .ShiftMux = 1'b0;
  20601. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .BypassEn = 1'b1;
  20602. defparam \macro_inst|apb_dac0_inst|min_vol_r[7] .CarryEnb = 1'b0;
  20603. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[8] (
  20604. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34_combout ),
  20605. .B(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  20606. .C(\macro_inst|cfg_reg_inst|min_vol [8]),
  20607. .D(vcc),
  20608. .Cin(\macro_inst|apb_dac0_inst|Add3~15 ),
  20609. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [8]),
  20610. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20611. .AsyncReset(AsyncReset_X57_Y8_GND),
  20612. .SyncReset(SyncReset_X57_Y8_GND),
  20613. .ShiftData(),
  20614. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20615. .LutOut(\macro_inst|apb_dac0_inst|Add3~16_combout ),
  20616. .Cout(\macro_inst|apb_dac0_inst|Add3~17 ),
  20617. .Q(\macro_inst|apb_dac0_inst|min_vol_r [8]));
  20618. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .coord_x = 15;
  20619. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .coord_y = 8;
  20620. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .coord_z = 8;
  20621. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .mask = 16'h698E;
  20622. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .modeMux = 1'b1;
  20623. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .FeedbackMux = 1'b0;
  20624. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .ShiftMux = 1'b0;
  20625. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .BypassEn = 1'b1;
  20626. defparam \macro_inst|apb_dac0_inst|min_vol_r[8] .CarryEnb = 1'b0;
  20627. alta_slice \macro_inst|apb_dac0_inst|min_vol_r[9] (
  20628. .A(vcc),
  20629. .B(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  20630. .C(\macro_inst|cfg_reg_inst|min_vol [9]),
  20631. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36_combout ),
  20632. .Cin(\macro_inst|apb_dac0_inst|Add3~17 ),
  20633. .Qin(\macro_inst|apb_dac0_inst|min_vol_r [9]),
  20634. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y8_SIG_VCC ),
  20635. .AsyncReset(AsyncReset_X57_Y8_GND),
  20636. .SyncReset(SyncReset_X57_Y8_GND),
  20637. .ShiftData(),
  20638. .SyncLoad(SyncLoad_X57_Y8_VCC),
  20639. .LutOut(\macro_inst|apb_dac0_inst|Add3~18_combout ),
  20640. .Cout(),
  20641. .Q(\macro_inst|apb_dac0_inst|min_vol_r [9]));
  20642. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .coord_x = 15;
  20643. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .coord_y = 8;
  20644. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .coord_z = 9;
  20645. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .mask = 16'hC33C;
  20646. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .modeMux = 1'b1;
  20647. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .FeedbackMux = 1'b0;
  20648. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .ShiftMux = 1'b0;
  20649. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .BypassEn = 1'b1;
  20650. defparam \macro_inst|apb_dac0_inst|min_vol_r[9] .CarryEnb = 1'b1;
  20651. alta_slice \macro_inst|apb_dac0_inst|phase_acc[0] (
  20652. .A(\macro_inst|apb_dac0_inst|phase_acc [0]),
  20653. .B(\macro_inst|cfg_reg_inst|frequency [0]),
  20654. .C(vcc),
  20655. .D(vcc),
  20656. .Cin(),
  20657. .Qin(\macro_inst|apb_dac0_inst|phase_acc [0]),
  20658. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20659. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20660. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20661. .ShiftData(),
  20662. .SyncLoad(SyncLoad_X58_Y11_GND),
  20663. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[0]~32_combout ),
  20664. .Cout(\macro_inst|apb_dac0_inst|phase_acc[0]~33 ),
  20665. .Q(\macro_inst|apb_dac0_inst|phase_acc [0]));
  20666. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .coord_x = 15;
  20667. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .coord_y = 10;
  20668. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .coord_z = 0;
  20669. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .mask = 16'h6688;
  20670. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .modeMux = 1'b0;
  20671. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .FeedbackMux = 1'b0;
  20672. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .ShiftMux = 1'b0;
  20673. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .BypassEn = 1'b1;
  20674. defparam \macro_inst|apb_dac0_inst|phase_acc[0] .CarryEnb = 1'b0;
  20675. alta_slice \macro_inst|apb_dac0_inst|phase_acc[10] (
  20676. .A(\macro_inst|cfg_reg_inst|frequency [10]),
  20677. .B(\macro_inst|apb_dac0_inst|phase_acc [10]),
  20678. .C(vcc),
  20679. .D(vcc),
  20680. .Cin(\macro_inst|apb_dac0_inst|phase_acc[9]~51 ),
  20681. .Qin(\macro_inst|apb_dac0_inst|phase_acc [10]),
  20682. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20683. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20684. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20685. .ShiftData(),
  20686. .SyncLoad(SyncLoad_X58_Y11_GND),
  20687. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[10]~52_combout ),
  20688. .Cout(\macro_inst|apb_dac0_inst|phase_acc[10]~53 ),
  20689. .Q(\macro_inst|apb_dac0_inst|phase_acc [10]));
  20690. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .coord_x = 15;
  20691. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .coord_y = 10;
  20692. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .coord_z = 10;
  20693. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .mask = 16'h698E;
  20694. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .modeMux = 1'b1;
  20695. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .FeedbackMux = 1'b0;
  20696. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .ShiftMux = 1'b0;
  20697. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .BypassEn = 1'b1;
  20698. defparam \macro_inst|apb_dac0_inst|phase_acc[10] .CarryEnb = 1'b0;
  20699. alta_slice \macro_inst|apb_dac0_inst|phase_acc[11] (
  20700. .A(\macro_inst|cfg_reg_inst|frequency [11]),
  20701. .B(\macro_inst|apb_dac0_inst|phase_acc [11]),
  20702. .C(vcc),
  20703. .D(vcc),
  20704. .Cin(\macro_inst|apb_dac0_inst|phase_acc[10]~53 ),
  20705. .Qin(\macro_inst|apb_dac0_inst|phase_acc [11]),
  20706. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20707. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20708. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20709. .ShiftData(),
  20710. .SyncLoad(SyncLoad_X58_Y11_GND),
  20711. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[11]~54_combout ),
  20712. .Cout(\macro_inst|apb_dac0_inst|phase_acc[11]~55 ),
  20713. .Q(\macro_inst|apb_dac0_inst|phase_acc [11]));
  20714. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .coord_x = 15;
  20715. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .coord_y = 10;
  20716. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .coord_z = 11;
  20717. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .mask = 16'h9617;
  20718. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .modeMux = 1'b1;
  20719. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .FeedbackMux = 1'b0;
  20720. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .ShiftMux = 1'b0;
  20721. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .BypassEn = 1'b1;
  20722. defparam \macro_inst|apb_dac0_inst|phase_acc[11] .CarryEnb = 1'b0;
  20723. alta_slice \macro_inst|apb_dac0_inst|phase_acc[12] (
  20724. .A(\macro_inst|apb_dac0_inst|phase_acc [12]),
  20725. .B(\macro_inst|cfg_reg_inst|frequency [12]),
  20726. .C(vcc),
  20727. .D(vcc),
  20728. .Cin(\macro_inst|apb_dac0_inst|phase_acc[11]~55 ),
  20729. .Qin(\macro_inst|apb_dac0_inst|phase_acc [12]),
  20730. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20731. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20732. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20733. .ShiftData(),
  20734. .SyncLoad(SyncLoad_X58_Y11_GND),
  20735. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[12]~56_combout ),
  20736. .Cout(\macro_inst|apb_dac0_inst|phase_acc[12]~57 ),
  20737. .Q(\macro_inst|apb_dac0_inst|phase_acc [12]));
  20738. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .coord_x = 15;
  20739. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .coord_y = 10;
  20740. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .coord_z = 12;
  20741. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .mask = 16'h698E;
  20742. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .modeMux = 1'b1;
  20743. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .FeedbackMux = 1'b0;
  20744. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .ShiftMux = 1'b0;
  20745. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .BypassEn = 1'b1;
  20746. defparam \macro_inst|apb_dac0_inst|phase_acc[12] .CarryEnb = 1'b0;
  20747. alta_slice \macro_inst|apb_dac0_inst|phase_acc[13] (
  20748. .A(\macro_inst|apb_dac0_inst|phase_acc [13]),
  20749. .B(\macro_inst|cfg_reg_inst|frequency [13]),
  20750. .C(vcc),
  20751. .D(vcc),
  20752. .Cin(\macro_inst|apb_dac0_inst|phase_acc[12]~57 ),
  20753. .Qin(\macro_inst|apb_dac0_inst|phase_acc [13]),
  20754. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20755. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20756. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20757. .ShiftData(),
  20758. .SyncLoad(SyncLoad_X58_Y11_GND),
  20759. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[13]~58_combout ),
  20760. .Cout(\macro_inst|apb_dac0_inst|phase_acc[13]~59 ),
  20761. .Q(\macro_inst|apb_dac0_inst|phase_acc [13]));
  20762. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .coord_x = 15;
  20763. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .coord_y = 10;
  20764. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .coord_z = 13;
  20765. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .mask = 16'h9617;
  20766. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .modeMux = 1'b1;
  20767. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .FeedbackMux = 1'b0;
  20768. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .ShiftMux = 1'b0;
  20769. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .BypassEn = 1'b1;
  20770. defparam \macro_inst|apb_dac0_inst|phase_acc[13] .CarryEnb = 1'b0;
  20771. alta_slice \macro_inst|apb_dac0_inst|phase_acc[14] (
  20772. .A(\macro_inst|apb_dac0_inst|phase_acc [14]),
  20773. .B(\macro_inst|cfg_reg_inst|frequency [14]),
  20774. .C(vcc),
  20775. .D(vcc),
  20776. .Cin(\macro_inst|apb_dac0_inst|phase_acc[13]~59 ),
  20777. .Qin(\macro_inst|apb_dac0_inst|phase_acc [14]),
  20778. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20779. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20780. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20781. .ShiftData(),
  20782. .SyncLoad(SyncLoad_X58_Y11_GND),
  20783. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[14]~60_combout ),
  20784. .Cout(\macro_inst|apb_dac0_inst|phase_acc[14]~61 ),
  20785. .Q(\macro_inst|apb_dac0_inst|phase_acc [14]));
  20786. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .coord_x = 15;
  20787. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .coord_y = 10;
  20788. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .coord_z = 14;
  20789. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .mask = 16'h698E;
  20790. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .modeMux = 1'b1;
  20791. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .FeedbackMux = 1'b0;
  20792. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .ShiftMux = 1'b0;
  20793. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .BypassEn = 1'b1;
  20794. defparam \macro_inst|apb_dac0_inst|phase_acc[14] .CarryEnb = 1'b0;
  20795. alta_slice \macro_inst|apb_dac0_inst|phase_acc[15] (
  20796. .A(\macro_inst|apb_dac0_inst|phase_acc [15]),
  20797. .B(\macro_inst|cfg_reg_inst|frequency [15]),
  20798. .C(vcc),
  20799. .D(vcc),
  20800. .Cin(\macro_inst|apb_dac0_inst|phase_acc[14]~61 ),
  20801. .Qin(\macro_inst|apb_dac0_inst|phase_acc [15]),
  20802. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20803. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20804. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20805. .ShiftData(),
  20806. .SyncLoad(SyncLoad_X58_Y11_GND),
  20807. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[15]~62_combout ),
  20808. .Cout(\macro_inst|apb_dac0_inst|phase_acc[15]~63 ),
  20809. .Q(\macro_inst|apb_dac0_inst|phase_acc [15]));
  20810. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .coord_x = 15;
  20811. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .coord_y = 10;
  20812. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .coord_z = 15;
  20813. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .mask = 16'h9617;
  20814. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .modeMux = 1'b1;
  20815. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .FeedbackMux = 1'b0;
  20816. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .ShiftMux = 1'b0;
  20817. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .BypassEn = 1'b1;
  20818. defparam \macro_inst|apb_dac0_inst|phase_acc[15] .CarryEnb = 1'b0;
  20819. alta_slice \macro_inst|apb_dac0_inst|phase_acc[16] (
  20820. .A(\macro_inst|apb_dac0_inst|phase_acc [16]),
  20821. .B(\macro_inst|cfg_reg_inst|frequency [16]),
  20822. .C(vcc),
  20823. .D(vcc),
  20824. .Cin(\macro_inst|apb_dac0_inst|phase_acc[15]~63 ),
  20825. .Qin(\macro_inst|apb_dac0_inst|phase_acc [16]),
  20826. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20827. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20828. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20829. .ShiftData(),
  20830. .SyncLoad(SyncLoad_X58_Y10_GND),
  20831. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[16]~64_combout ),
  20832. .Cout(\macro_inst|apb_dac0_inst|phase_acc[16]~65 ),
  20833. .Q(\macro_inst|apb_dac0_inst|phase_acc [16]));
  20834. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .coord_x = 15;
  20835. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .coord_y = 9;
  20836. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .coord_z = 0;
  20837. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .mask = 16'h698E;
  20838. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .modeMux = 1'b1;
  20839. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .FeedbackMux = 1'b0;
  20840. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .ShiftMux = 1'b0;
  20841. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .BypassEn = 1'b1;
  20842. defparam \macro_inst|apb_dac0_inst|phase_acc[16] .CarryEnb = 1'b0;
  20843. alta_slice \macro_inst|apb_dac0_inst|phase_acc[17] (
  20844. .A(\macro_inst|apb_dac0_inst|phase_acc [17]),
  20845. .B(\macro_inst|cfg_reg_inst|frequency [17]),
  20846. .C(vcc),
  20847. .D(vcc),
  20848. .Cin(\macro_inst|apb_dac0_inst|phase_acc[16]~65 ),
  20849. .Qin(\macro_inst|apb_dac0_inst|phase_acc [17]),
  20850. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20851. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20852. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20853. .ShiftData(),
  20854. .SyncLoad(SyncLoad_X58_Y10_GND),
  20855. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[17]~66_combout ),
  20856. .Cout(\macro_inst|apb_dac0_inst|phase_acc[17]~67 ),
  20857. .Q(\macro_inst|apb_dac0_inst|phase_acc [17]));
  20858. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .coord_x = 15;
  20859. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .coord_y = 9;
  20860. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .coord_z = 1;
  20861. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .mask = 16'h9617;
  20862. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .modeMux = 1'b1;
  20863. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .FeedbackMux = 1'b0;
  20864. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .ShiftMux = 1'b0;
  20865. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .BypassEn = 1'b1;
  20866. defparam \macro_inst|apb_dac0_inst|phase_acc[17] .CarryEnb = 1'b0;
  20867. alta_slice \macro_inst|apb_dac0_inst|phase_acc[18] (
  20868. .A(\macro_inst|cfg_reg_inst|frequency [18]),
  20869. .B(\macro_inst|apb_dac0_inst|phase_acc [18]),
  20870. .C(vcc),
  20871. .D(vcc),
  20872. .Cin(\macro_inst|apb_dac0_inst|phase_acc[17]~67 ),
  20873. .Qin(\macro_inst|apb_dac0_inst|phase_acc [18]),
  20874. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20875. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20876. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20877. .ShiftData(),
  20878. .SyncLoad(SyncLoad_X58_Y10_GND),
  20879. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[18]~68_combout ),
  20880. .Cout(\macro_inst|apb_dac0_inst|phase_acc[18]~69 ),
  20881. .Q(\macro_inst|apb_dac0_inst|phase_acc [18]));
  20882. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .coord_x = 15;
  20883. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .coord_y = 9;
  20884. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .coord_z = 2;
  20885. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .mask = 16'h698E;
  20886. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .modeMux = 1'b1;
  20887. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .FeedbackMux = 1'b0;
  20888. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .ShiftMux = 1'b0;
  20889. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .BypassEn = 1'b1;
  20890. defparam \macro_inst|apb_dac0_inst|phase_acc[18] .CarryEnb = 1'b0;
  20891. alta_slice \macro_inst|apb_dac0_inst|phase_acc[19] (
  20892. .A(\macro_inst|apb_dac0_inst|phase_acc [19]),
  20893. .B(\macro_inst|cfg_reg_inst|frequency [19]),
  20894. .C(vcc),
  20895. .D(vcc),
  20896. .Cin(\macro_inst|apb_dac0_inst|phase_acc[18]~69 ),
  20897. .Qin(\macro_inst|apb_dac0_inst|phase_acc [19]),
  20898. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20899. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20900. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20901. .ShiftData(),
  20902. .SyncLoad(SyncLoad_X58_Y10_GND),
  20903. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[19]~70_combout ),
  20904. .Cout(\macro_inst|apb_dac0_inst|phase_acc[19]~71 ),
  20905. .Q(\macro_inst|apb_dac0_inst|phase_acc [19]));
  20906. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .coord_x = 15;
  20907. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .coord_y = 9;
  20908. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .coord_z = 3;
  20909. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .mask = 16'h9617;
  20910. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .modeMux = 1'b1;
  20911. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .FeedbackMux = 1'b0;
  20912. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .ShiftMux = 1'b0;
  20913. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .BypassEn = 1'b1;
  20914. defparam \macro_inst|apb_dac0_inst|phase_acc[19] .CarryEnb = 1'b0;
  20915. alta_slice \macro_inst|apb_dac0_inst|phase_acc[1] (
  20916. .A(\macro_inst|cfg_reg_inst|frequency [1]),
  20917. .B(\macro_inst|apb_dac0_inst|phase_acc [1]),
  20918. .C(vcc),
  20919. .D(vcc),
  20920. .Cin(\macro_inst|apb_dac0_inst|phase_acc[0]~33 ),
  20921. .Qin(\macro_inst|apb_dac0_inst|phase_acc [1]),
  20922. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  20923. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  20924. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  20925. .ShiftData(),
  20926. .SyncLoad(SyncLoad_X58_Y11_GND),
  20927. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[1]~34_combout ),
  20928. .Cout(\macro_inst|apb_dac0_inst|phase_acc[1]~35 ),
  20929. .Q(\macro_inst|apb_dac0_inst|phase_acc [1]));
  20930. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .coord_x = 15;
  20931. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .coord_y = 10;
  20932. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .coord_z = 1;
  20933. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .mask = 16'h9617;
  20934. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .modeMux = 1'b1;
  20935. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .FeedbackMux = 1'b0;
  20936. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .ShiftMux = 1'b0;
  20937. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .BypassEn = 1'b1;
  20938. defparam \macro_inst|apb_dac0_inst|phase_acc[1] .CarryEnb = 1'b0;
  20939. alta_slice \macro_inst|apb_dac0_inst|phase_acc[20] (
  20940. .A(\macro_inst|apb_dac0_inst|phase_acc [20]),
  20941. .B(\macro_inst|cfg_reg_inst|frequency [20]),
  20942. .C(vcc),
  20943. .D(vcc),
  20944. .Cin(\macro_inst|apb_dac0_inst|phase_acc[19]~71 ),
  20945. .Qin(\macro_inst|apb_dac0_inst|phase_acc [20]),
  20946. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20947. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20948. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20949. .ShiftData(),
  20950. .SyncLoad(SyncLoad_X58_Y10_GND),
  20951. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[20]~72_combout ),
  20952. .Cout(\macro_inst|apb_dac0_inst|phase_acc[20]~73 ),
  20953. .Q(\macro_inst|apb_dac0_inst|phase_acc [20]));
  20954. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .coord_x = 15;
  20955. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .coord_y = 9;
  20956. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .coord_z = 4;
  20957. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .mask = 16'h698E;
  20958. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .modeMux = 1'b1;
  20959. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .FeedbackMux = 1'b0;
  20960. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .ShiftMux = 1'b0;
  20961. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .BypassEn = 1'b1;
  20962. defparam \macro_inst|apb_dac0_inst|phase_acc[20] .CarryEnb = 1'b0;
  20963. alta_slice \macro_inst|apb_dac0_inst|phase_acc[21] (
  20964. .A(\macro_inst|apb_dac0_inst|phase_acc [21]),
  20965. .B(\macro_inst|cfg_reg_inst|frequency [21]),
  20966. .C(vcc),
  20967. .D(vcc),
  20968. .Cin(\macro_inst|apb_dac0_inst|phase_acc[20]~73 ),
  20969. .Qin(\macro_inst|apb_dac0_inst|phase_acc [21]),
  20970. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20971. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20972. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20973. .ShiftData(),
  20974. .SyncLoad(SyncLoad_X58_Y10_GND),
  20975. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[21]~74_combout ),
  20976. .Cout(\macro_inst|apb_dac0_inst|phase_acc[21]~75 ),
  20977. .Q(\macro_inst|apb_dac0_inst|phase_acc [21]));
  20978. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .coord_x = 15;
  20979. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .coord_y = 9;
  20980. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .coord_z = 5;
  20981. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .mask = 16'h9617;
  20982. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .modeMux = 1'b1;
  20983. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .FeedbackMux = 1'b0;
  20984. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .ShiftMux = 1'b0;
  20985. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .BypassEn = 1'b1;
  20986. defparam \macro_inst|apb_dac0_inst|phase_acc[21] .CarryEnb = 1'b0;
  20987. alta_slice \macro_inst|apb_dac0_inst|phase_acc[22] (
  20988. .A(\macro_inst|cfg_reg_inst|frequency [22]),
  20989. .B(\macro_inst|apb_dac0_inst|phase_acc [22]),
  20990. .C(vcc),
  20991. .D(vcc),
  20992. .Cin(\macro_inst|apb_dac0_inst|phase_acc[21]~75 ),
  20993. .Qin(\macro_inst|apb_dac0_inst|phase_acc [22]),
  20994. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  20995. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  20996. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  20997. .ShiftData(),
  20998. .SyncLoad(SyncLoad_X58_Y10_GND),
  20999. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[22]~76_combout ),
  21000. .Cout(\macro_inst|apb_dac0_inst|phase_acc[22]~77 ),
  21001. .Q(\macro_inst|apb_dac0_inst|phase_acc [22]));
  21002. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .coord_x = 15;
  21003. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .coord_y = 9;
  21004. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .coord_z = 6;
  21005. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .mask = 16'h698E;
  21006. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .modeMux = 1'b1;
  21007. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .FeedbackMux = 1'b0;
  21008. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .ShiftMux = 1'b0;
  21009. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .BypassEn = 1'b1;
  21010. defparam \macro_inst|apb_dac0_inst|phase_acc[22] .CarryEnb = 1'b0;
  21011. alta_slice \macro_inst|apb_dac0_inst|phase_acc[23] (
  21012. .A(\macro_inst|cfg_reg_inst|frequency [23]),
  21013. .B(\macro_inst|apb_dac0_inst|phase_acc [23]),
  21014. .C(vcc),
  21015. .D(vcc),
  21016. .Cin(\macro_inst|apb_dac0_inst|phase_acc[22]~77 ),
  21017. .Qin(\macro_inst|apb_dac0_inst|phase_acc [23]),
  21018. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21019. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21020. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21021. .ShiftData(),
  21022. .SyncLoad(SyncLoad_X58_Y10_GND),
  21023. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[23]~78_combout ),
  21024. .Cout(\macro_inst|apb_dac0_inst|phase_acc[23]~79 ),
  21025. .Q(\macro_inst|apb_dac0_inst|phase_acc [23]));
  21026. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .coord_x = 15;
  21027. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .coord_y = 9;
  21028. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .coord_z = 7;
  21029. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .mask = 16'h9617;
  21030. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .modeMux = 1'b1;
  21031. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .FeedbackMux = 1'b0;
  21032. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .ShiftMux = 1'b0;
  21033. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .BypassEn = 1'b1;
  21034. defparam \macro_inst|apb_dac0_inst|phase_acc[23] .CarryEnb = 1'b0;
  21035. alta_slice \macro_inst|apb_dac0_inst|phase_acc[24] (
  21036. .A(\macro_inst|cfg_reg_inst|frequency [24]),
  21037. .B(\macro_inst|apb_dac0_inst|phase_acc [24]),
  21038. .C(vcc),
  21039. .D(vcc),
  21040. .Cin(\macro_inst|apb_dac0_inst|phase_acc[23]~79 ),
  21041. .Qin(\macro_inst|apb_dac0_inst|phase_acc [24]),
  21042. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21043. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21044. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21045. .ShiftData(),
  21046. .SyncLoad(SyncLoad_X58_Y10_GND),
  21047. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[24]~80_combout ),
  21048. .Cout(\macro_inst|apb_dac0_inst|phase_acc[24]~81 ),
  21049. .Q(\macro_inst|apb_dac0_inst|phase_acc [24]));
  21050. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .coord_x = 15;
  21051. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .coord_y = 9;
  21052. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .coord_z = 8;
  21053. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .mask = 16'h698E;
  21054. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .modeMux = 1'b1;
  21055. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .FeedbackMux = 1'b0;
  21056. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .ShiftMux = 1'b0;
  21057. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .BypassEn = 1'b1;
  21058. defparam \macro_inst|apb_dac0_inst|phase_acc[24] .CarryEnb = 1'b0;
  21059. alta_slice \macro_inst|apb_dac0_inst|phase_acc[25] (
  21060. .A(\macro_inst|cfg_reg_inst|frequency [25]),
  21061. .B(\macro_inst|apb_dac0_inst|phase_acc [25]),
  21062. .C(vcc),
  21063. .D(vcc),
  21064. .Cin(\macro_inst|apb_dac0_inst|phase_acc[24]~81 ),
  21065. .Qin(\macro_inst|apb_dac0_inst|phase_acc [25]),
  21066. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21067. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21068. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21069. .ShiftData(),
  21070. .SyncLoad(SyncLoad_X58_Y10_GND),
  21071. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[25]~82_combout ),
  21072. .Cout(\macro_inst|apb_dac0_inst|phase_acc[25]~83 ),
  21073. .Q(\macro_inst|apb_dac0_inst|phase_acc [25]));
  21074. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .coord_x = 15;
  21075. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .coord_y = 9;
  21076. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .coord_z = 9;
  21077. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .mask = 16'h9617;
  21078. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .modeMux = 1'b1;
  21079. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .FeedbackMux = 1'b0;
  21080. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .ShiftMux = 1'b0;
  21081. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .BypassEn = 1'b1;
  21082. defparam \macro_inst|apb_dac0_inst|phase_acc[25] .CarryEnb = 1'b0;
  21083. alta_slice \macro_inst|apb_dac0_inst|phase_acc[26] (
  21084. .A(\macro_inst|cfg_reg_inst|frequency [26]),
  21085. .B(\macro_inst|apb_dac0_inst|phase_acc [26]),
  21086. .C(vcc),
  21087. .D(vcc),
  21088. .Cin(\macro_inst|apb_dac0_inst|phase_acc[25]~83 ),
  21089. .Qin(\macro_inst|apb_dac0_inst|phase_acc [26]),
  21090. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21091. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21092. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21093. .ShiftData(),
  21094. .SyncLoad(SyncLoad_X58_Y10_GND),
  21095. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[26]~84_combout ),
  21096. .Cout(\macro_inst|apb_dac0_inst|phase_acc[26]~85 ),
  21097. .Q(\macro_inst|apb_dac0_inst|phase_acc [26]));
  21098. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .coord_x = 15;
  21099. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .coord_y = 9;
  21100. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .coord_z = 10;
  21101. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .mask = 16'h698E;
  21102. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .modeMux = 1'b1;
  21103. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .FeedbackMux = 1'b0;
  21104. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .ShiftMux = 1'b0;
  21105. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .BypassEn = 1'b1;
  21106. defparam \macro_inst|apb_dac0_inst|phase_acc[26] .CarryEnb = 1'b0;
  21107. alta_slice \macro_inst|apb_dac0_inst|phase_acc[27] (
  21108. .A(\macro_inst|apb_dac0_inst|phase_acc [27]),
  21109. .B(\macro_inst|cfg_reg_inst|frequency [27]),
  21110. .C(vcc),
  21111. .D(vcc),
  21112. .Cin(\macro_inst|apb_dac0_inst|phase_acc[26]~85 ),
  21113. .Qin(\macro_inst|apb_dac0_inst|phase_acc [27]),
  21114. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21115. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21116. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21117. .ShiftData(),
  21118. .SyncLoad(SyncLoad_X58_Y10_GND),
  21119. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[27]~86_combout ),
  21120. .Cout(\macro_inst|apb_dac0_inst|phase_acc[27]~87 ),
  21121. .Q(\macro_inst|apb_dac0_inst|phase_acc [27]));
  21122. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .coord_x = 15;
  21123. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .coord_y = 9;
  21124. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .coord_z = 11;
  21125. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .mask = 16'h9617;
  21126. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .modeMux = 1'b1;
  21127. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .FeedbackMux = 1'b0;
  21128. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .ShiftMux = 1'b0;
  21129. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .BypassEn = 1'b1;
  21130. defparam \macro_inst|apb_dac0_inst|phase_acc[27] .CarryEnb = 1'b0;
  21131. alta_slice \macro_inst|apb_dac0_inst|phase_acc[28] (
  21132. .A(\macro_inst|apb_dac0_inst|phase_acc [28]),
  21133. .B(\macro_inst|cfg_reg_inst|frequency [28]),
  21134. .C(vcc),
  21135. .D(vcc),
  21136. .Cin(\macro_inst|apb_dac0_inst|phase_acc[27]~87 ),
  21137. .Qin(\macro_inst|apb_dac0_inst|phase_acc [28]),
  21138. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21139. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21140. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21141. .ShiftData(),
  21142. .SyncLoad(SyncLoad_X58_Y10_GND),
  21143. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[28]~88_combout ),
  21144. .Cout(\macro_inst|apb_dac0_inst|phase_acc[28]~89 ),
  21145. .Q(\macro_inst|apb_dac0_inst|phase_acc [28]));
  21146. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .coord_x = 15;
  21147. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .coord_y = 9;
  21148. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .coord_z = 12;
  21149. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .mask = 16'h698E;
  21150. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .modeMux = 1'b1;
  21151. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .FeedbackMux = 1'b0;
  21152. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .ShiftMux = 1'b0;
  21153. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .BypassEn = 1'b1;
  21154. defparam \macro_inst|apb_dac0_inst|phase_acc[28] .CarryEnb = 1'b0;
  21155. alta_slice \macro_inst|apb_dac0_inst|phase_acc[29] (
  21156. .A(\macro_inst|apb_dac0_inst|phase_acc [29]),
  21157. .B(\macro_inst|cfg_reg_inst|frequency [29]),
  21158. .C(vcc),
  21159. .D(vcc),
  21160. .Cin(\macro_inst|apb_dac0_inst|phase_acc[28]~89 ),
  21161. .Qin(\macro_inst|apb_dac0_inst|phase_acc [29]),
  21162. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21163. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21164. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21165. .ShiftData(),
  21166. .SyncLoad(SyncLoad_X58_Y10_GND),
  21167. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[29]~90_combout ),
  21168. .Cout(\macro_inst|apb_dac0_inst|phase_acc[29]~91 ),
  21169. .Q(\macro_inst|apb_dac0_inst|phase_acc [29]));
  21170. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .coord_x = 15;
  21171. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .coord_y = 9;
  21172. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .coord_z = 13;
  21173. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .mask = 16'h9617;
  21174. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .modeMux = 1'b1;
  21175. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .FeedbackMux = 1'b0;
  21176. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .ShiftMux = 1'b0;
  21177. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .BypassEn = 1'b1;
  21178. defparam \macro_inst|apb_dac0_inst|phase_acc[29] .CarryEnb = 1'b0;
  21179. alta_slice \macro_inst|apb_dac0_inst|phase_acc[2] (
  21180. .A(\macro_inst|apb_dac0_inst|phase_acc [2]),
  21181. .B(\macro_inst|cfg_reg_inst|frequency [2]),
  21182. .C(vcc),
  21183. .D(vcc),
  21184. .Cin(\macro_inst|apb_dac0_inst|phase_acc[1]~35 ),
  21185. .Qin(\macro_inst|apb_dac0_inst|phase_acc [2]),
  21186. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21187. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21188. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21189. .ShiftData(),
  21190. .SyncLoad(SyncLoad_X58_Y11_GND),
  21191. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[2]~36_combout ),
  21192. .Cout(\macro_inst|apb_dac0_inst|phase_acc[2]~37 ),
  21193. .Q(\macro_inst|apb_dac0_inst|phase_acc [2]));
  21194. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .coord_x = 15;
  21195. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .coord_y = 10;
  21196. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .coord_z = 2;
  21197. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .mask = 16'h698E;
  21198. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .modeMux = 1'b1;
  21199. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .FeedbackMux = 1'b0;
  21200. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .ShiftMux = 1'b0;
  21201. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .BypassEn = 1'b1;
  21202. defparam \macro_inst|apb_dac0_inst|phase_acc[2] .CarryEnb = 1'b0;
  21203. alta_slice \macro_inst|apb_dac0_inst|phase_acc[30] (
  21204. .A(\macro_inst|cfg_reg_inst|frequency [30]),
  21205. .B(\macro_inst|apb_dac0_inst|phase_acc [30]),
  21206. .C(vcc),
  21207. .D(vcc),
  21208. .Cin(\macro_inst|apb_dac0_inst|phase_acc[29]~91 ),
  21209. .Qin(\macro_inst|apb_dac0_inst|phase_acc [30]),
  21210. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21211. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21212. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21213. .ShiftData(),
  21214. .SyncLoad(SyncLoad_X58_Y10_GND),
  21215. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[30]~92_combout ),
  21216. .Cout(\macro_inst|apb_dac0_inst|phase_acc[30]~93 ),
  21217. .Q(\macro_inst|apb_dac0_inst|phase_acc [30]));
  21218. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .coord_x = 15;
  21219. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .coord_y = 9;
  21220. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .coord_z = 14;
  21221. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .mask = 16'h698E;
  21222. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .modeMux = 1'b1;
  21223. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .FeedbackMux = 1'b0;
  21224. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .ShiftMux = 1'b0;
  21225. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .BypassEn = 1'b1;
  21226. defparam \macro_inst|apb_dac0_inst|phase_acc[30] .CarryEnb = 1'b0;
  21227. alta_slice \macro_inst|apb_dac0_inst|phase_acc[31] (
  21228. .A(vcc),
  21229. .B(\macro_inst|apb_dac0_inst|phase_acc [31]),
  21230. .C(vcc),
  21231. .D(\macro_inst|cfg_reg_inst|frequency [31]),
  21232. .Cin(\macro_inst|apb_dac0_inst|phase_acc[30]~93 ),
  21233. .Qin(\macro_inst|apb_dac0_inst|phase_acc [31]),
  21234. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y10_SIG_VCC ),
  21235. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  21236. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ),
  21237. .ShiftData(),
  21238. .SyncLoad(SyncLoad_X58_Y10_GND),
  21239. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[31]~94_combout ),
  21240. .Cout(),
  21241. .Q(\macro_inst|apb_dac0_inst|phase_acc [31]));
  21242. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .coord_x = 15;
  21243. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .coord_y = 9;
  21244. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .coord_z = 15;
  21245. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .mask = 16'hC33C;
  21246. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .modeMux = 1'b1;
  21247. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .FeedbackMux = 1'b0;
  21248. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .ShiftMux = 1'b0;
  21249. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .BypassEn = 1'b1;
  21250. defparam \macro_inst|apb_dac0_inst|phase_acc[31] .CarryEnb = 1'b1;
  21251. alta_slice \macro_inst|apb_dac0_inst|phase_acc[3] (
  21252. .A(\macro_inst|apb_dac0_inst|phase_acc [3]),
  21253. .B(\macro_inst|cfg_reg_inst|frequency [3]),
  21254. .C(vcc),
  21255. .D(vcc),
  21256. .Cin(\macro_inst|apb_dac0_inst|phase_acc[2]~37 ),
  21257. .Qin(\macro_inst|apb_dac0_inst|phase_acc [3]),
  21258. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21259. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21260. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21261. .ShiftData(),
  21262. .SyncLoad(SyncLoad_X58_Y11_GND),
  21263. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[3]~38_combout ),
  21264. .Cout(\macro_inst|apb_dac0_inst|phase_acc[3]~39 ),
  21265. .Q(\macro_inst|apb_dac0_inst|phase_acc [3]));
  21266. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .coord_x = 15;
  21267. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .coord_y = 10;
  21268. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .coord_z = 3;
  21269. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .mask = 16'h694D;
  21270. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .modeMux = 1'b1;
  21271. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .FeedbackMux = 1'b0;
  21272. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .ShiftMux = 1'b0;
  21273. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .BypassEn = 1'b1;
  21274. defparam \macro_inst|apb_dac0_inst|phase_acc[3] .CarryEnb = 1'b0;
  21275. alta_slice \macro_inst|apb_dac0_inst|phase_acc[4] (
  21276. .A(\macro_inst|apb_dac0_inst|phase_acc [4]),
  21277. .B(\macro_inst|cfg_reg_inst|frequency [4]),
  21278. .C(vcc),
  21279. .D(vcc),
  21280. .Cin(\macro_inst|apb_dac0_inst|phase_acc[3]~39 ),
  21281. .Qin(\macro_inst|apb_dac0_inst|phase_acc [4]),
  21282. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21283. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21284. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21285. .ShiftData(),
  21286. .SyncLoad(SyncLoad_X58_Y11_GND),
  21287. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[4]~40_combout ),
  21288. .Cout(\macro_inst|apb_dac0_inst|phase_acc[4]~41 ),
  21289. .Q(\macro_inst|apb_dac0_inst|phase_acc [4]));
  21290. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .coord_x = 15;
  21291. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .coord_y = 10;
  21292. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .coord_z = 4;
  21293. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .mask = 16'h698E;
  21294. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .modeMux = 1'b1;
  21295. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .FeedbackMux = 1'b0;
  21296. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .ShiftMux = 1'b0;
  21297. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .BypassEn = 1'b1;
  21298. defparam \macro_inst|apb_dac0_inst|phase_acc[4] .CarryEnb = 1'b0;
  21299. alta_slice \macro_inst|apb_dac0_inst|phase_acc[5] (
  21300. .A(\macro_inst|apb_dac0_inst|phase_acc [5]),
  21301. .B(\macro_inst|cfg_reg_inst|frequency [5]),
  21302. .C(vcc),
  21303. .D(vcc),
  21304. .Cin(\macro_inst|apb_dac0_inst|phase_acc[4]~41 ),
  21305. .Qin(\macro_inst|apb_dac0_inst|phase_acc [5]),
  21306. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21307. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21308. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21309. .ShiftData(),
  21310. .SyncLoad(SyncLoad_X58_Y11_GND),
  21311. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[5]~42_combout ),
  21312. .Cout(\macro_inst|apb_dac0_inst|phase_acc[5]~43 ),
  21313. .Q(\macro_inst|apb_dac0_inst|phase_acc [5]));
  21314. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .coord_x = 15;
  21315. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .coord_y = 10;
  21316. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .coord_z = 5;
  21317. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .mask = 16'h694D;
  21318. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .modeMux = 1'b1;
  21319. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .FeedbackMux = 1'b0;
  21320. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .ShiftMux = 1'b0;
  21321. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .BypassEn = 1'b1;
  21322. defparam \macro_inst|apb_dac0_inst|phase_acc[5] .CarryEnb = 1'b0;
  21323. alta_slice \macro_inst|apb_dac0_inst|phase_acc[6] (
  21324. .A(\macro_inst|apb_dac0_inst|phase_acc [6]),
  21325. .B(\macro_inst|cfg_reg_inst|frequency [6]),
  21326. .C(vcc),
  21327. .D(vcc),
  21328. .Cin(\macro_inst|apb_dac0_inst|phase_acc[5]~43 ),
  21329. .Qin(\macro_inst|apb_dac0_inst|phase_acc [6]),
  21330. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21331. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21332. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21333. .ShiftData(),
  21334. .SyncLoad(SyncLoad_X58_Y11_GND),
  21335. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[6]~44_combout ),
  21336. .Cout(\macro_inst|apb_dac0_inst|phase_acc[6]~45 ),
  21337. .Q(\macro_inst|apb_dac0_inst|phase_acc [6]));
  21338. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .coord_x = 15;
  21339. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .coord_y = 10;
  21340. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .coord_z = 6;
  21341. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .mask = 16'h962B;
  21342. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .modeMux = 1'b1;
  21343. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .FeedbackMux = 1'b0;
  21344. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .ShiftMux = 1'b0;
  21345. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .BypassEn = 1'b1;
  21346. defparam \macro_inst|apb_dac0_inst|phase_acc[6] .CarryEnb = 1'b0;
  21347. alta_slice \macro_inst|apb_dac0_inst|phase_acc[7] (
  21348. .A(\macro_inst|apb_dac0_inst|phase_acc [7]),
  21349. .B(\macro_inst|cfg_reg_inst|frequency [7]),
  21350. .C(vcc),
  21351. .D(vcc),
  21352. .Cin(\macro_inst|apb_dac0_inst|phase_acc[6]~45 ),
  21353. .Qin(\macro_inst|apb_dac0_inst|phase_acc [7]),
  21354. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21355. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21356. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21357. .ShiftData(),
  21358. .SyncLoad(SyncLoad_X58_Y11_GND),
  21359. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[7]~46_combout ),
  21360. .Cout(\macro_inst|apb_dac0_inst|phase_acc[7]~47 ),
  21361. .Q(\macro_inst|apb_dac0_inst|phase_acc [7]));
  21362. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .coord_x = 15;
  21363. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .coord_y = 10;
  21364. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .coord_z = 7;
  21365. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .mask = 16'h694D;
  21366. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .modeMux = 1'b1;
  21367. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .FeedbackMux = 1'b0;
  21368. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .ShiftMux = 1'b0;
  21369. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .BypassEn = 1'b1;
  21370. defparam \macro_inst|apb_dac0_inst|phase_acc[7] .CarryEnb = 1'b0;
  21371. alta_slice \macro_inst|apb_dac0_inst|phase_acc[8] (
  21372. .A(\macro_inst|cfg_reg_inst|frequency [8]),
  21373. .B(\macro_inst|apb_dac0_inst|phase_acc [8]),
  21374. .C(vcc),
  21375. .D(vcc),
  21376. .Cin(\macro_inst|apb_dac0_inst|phase_acc[7]~47 ),
  21377. .Qin(\macro_inst|apb_dac0_inst|phase_acc [8]),
  21378. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21379. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21380. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21381. .ShiftData(),
  21382. .SyncLoad(SyncLoad_X58_Y11_GND),
  21383. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[8]~48_combout ),
  21384. .Cout(\macro_inst|apb_dac0_inst|phase_acc[8]~49 ),
  21385. .Q(\macro_inst|apb_dac0_inst|phase_acc [8]));
  21386. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .coord_x = 15;
  21387. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .coord_y = 10;
  21388. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .coord_z = 8;
  21389. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .mask = 16'h964D;
  21390. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .modeMux = 1'b1;
  21391. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .FeedbackMux = 1'b0;
  21392. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .ShiftMux = 1'b0;
  21393. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .BypassEn = 1'b1;
  21394. defparam \macro_inst|apb_dac0_inst|phase_acc[8] .CarryEnb = 1'b0;
  21395. alta_slice \macro_inst|apb_dac0_inst|phase_acc[9] (
  21396. .A(\macro_inst|apb_dac0_inst|phase_acc [9]),
  21397. .B(\macro_inst|cfg_reg_inst|frequency [9]),
  21398. .C(vcc),
  21399. .D(vcc),
  21400. .Cin(\macro_inst|apb_dac0_inst|phase_acc[8]~49 ),
  21401. .Qin(\macro_inst|apb_dac0_inst|phase_acc [9]),
  21402. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X58_Y11_SIG_VCC ),
  21403. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y11_SIG ),
  21404. .SyncReset(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ),
  21405. .ShiftData(),
  21406. .SyncLoad(SyncLoad_X58_Y11_GND),
  21407. .LutOut(\macro_inst|apb_dac0_inst|phase_acc[9]~50_combout ),
  21408. .Cout(\macro_inst|apb_dac0_inst|phase_acc[9]~51 ),
  21409. .Q(\macro_inst|apb_dac0_inst|phase_acc [9]));
  21410. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .coord_x = 15;
  21411. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .coord_y = 10;
  21412. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .coord_z = 9;
  21413. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .mask = 16'h694D;
  21414. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .modeMux = 1'b1;
  21415. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .FeedbackMux = 1'b0;
  21416. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .ShiftMux = 1'b0;
  21417. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .BypassEn = 1'b1;
  21418. defparam \macro_inst|apb_dac0_inst|phase_acc[9] .CarryEnb = 1'b0;
  21419. alta_slice \macro_inst|apb_dac0_inst|phase_r[0] (
  21420. .A(\macro_inst|apb_dac0_inst|max_vol_r [6]),
  21421. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~30_combout ),
  21422. .C(\macro_inst|apb_dac0_inst|phase_acc [22]),
  21423. .D(vcc),
  21424. .Cin(\macro_inst|apb_dac0_inst|LessThan0~11_cout ),
  21425. .Qin(\macro_inst|apb_dac0_inst|phase_r [0]),
  21426. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  21427. .AsyncReset(AsyncReset_X57_Y9_GND),
  21428. .SyncReset(SyncReset_X57_Y9_GND),
  21429. .ShiftData(),
  21430. .SyncLoad(SyncLoad_X57_Y9_VCC),
  21431. .LutOut(),
  21432. .Cout(\macro_inst|apb_dac0_inst|LessThan0~13_cout ),
  21433. .Q(\macro_inst|apb_dac0_inst|phase_r [0]));
  21434. defparam \macro_inst|apb_dac0_inst|phase_r[0] .coord_x = 14;
  21435. defparam \macro_inst|apb_dac0_inst|phase_r[0] .coord_y = 6;
  21436. defparam \macro_inst|apb_dac0_inst|phase_r[0] .coord_z = 10;
  21437. defparam \macro_inst|apb_dac0_inst|phase_r[0] .mask = 16'h002B;
  21438. defparam \macro_inst|apb_dac0_inst|phase_r[0] .modeMux = 1'b1;
  21439. defparam \macro_inst|apb_dac0_inst|phase_r[0] .FeedbackMux = 1'b0;
  21440. defparam \macro_inst|apb_dac0_inst|phase_r[0] .ShiftMux = 1'b0;
  21441. defparam \macro_inst|apb_dac0_inst|phase_r[0] .BypassEn = 1'b1;
  21442. defparam \macro_inst|apb_dac0_inst|phase_r[0] .CarryEnb = 1'b0;
  21443. alta_slice \macro_inst|apb_dac0_inst|phase_r[1] (
  21444. .A(vcc),
  21445. .B(\macro_inst|apb_dac0_inst|max_vol_r [9]),
  21446. .C(\macro_inst|apb_dac0_inst|phase_acc [23]),
  21447. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~36_combout ),
  21448. .Cin(\macro_inst|apb_dac0_inst|LessThan0~17_cout ),
  21449. .Qin(\macro_inst|apb_dac0_inst|phase_r [1]),
  21450. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  21451. .AsyncReset(AsyncReset_X57_Y9_GND),
  21452. .SyncReset(SyncReset_X57_Y9_GND),
  21453. .ShiftData(),
  21454. .SyncLoad(SyncLoad_X57_Y9_VCC),
  21455. .LutOut(\macro_inst|apb_dac0_inst|LessThan0~18_combout ),
  21456. .Cout(),
  21457. .Q(\macro_inst|apb_dac0_inst|phase_r [1]));
  21458. defparam \macro_inst|apb_dac0_inst|phase_r[1] .coord_x = 14;
  21459. defparam \macro_inst|apb_dac0_inst|phase_r[1] .coord_y = 6;
  21460. defparam \macro_inst|apb_dac0_inst|phase_r[1] .coord_z = 13;
  21461. defparam \macro_inst|apb_dac0_inst|phase_r[1] .mask = 16'hC0FC;
  21462. defparam \macro_inst|apb_dac0_inst|phase_r[1] .modeMux = 1'b1;
  21463. defparam \macro_inst|apb_dac0_inst|phase_r[1] .FeedbackMux = 1'b0;
  21464. defparam \macro_inst|apb_dac0_inst|phase_r[1] .ShiftMux = 1'b0;
  21465. defparam \macro_inst|apb_dac0_inst|phase_r[1] .BypassEn = 1'b1;
  21466. defparam \macro_inst|apb_dac0_inst|phase_r[1] .CarryEnb = 1'b1;
  21467. alta_slice \macro_inst|apb_dac0_inst|phase_r[2] (
  21468. .A(vcc),
  21469. .B(vcc),
  21470. .C(vcc),
  21471. .D(\macro_inst|apb_dac0_inst|phase_acc [24]),
  21472. .Cin(),
  21473. .Qin(\macro_inst|apb_dac0_inst|phase_r [2]),
  21474. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y9_SIG_VCC ),
  21475. .AsyncReset(AsyncReset_X62_Y9_GND),
  21476. .SyncReset(),
  21477. .ShiftData(),
  21478. .SyncLoad(),
  21479. .LutOut(\macro_inst|apb_dac0_inst|phase_r[2]~feeder_combout ),
  21480. .Cout(),
  21481. .Q(\macro_inst|apb_dac0_inst|phase_r [2]));
  21482. defparam \macro_inst|apb_dac0_inst|phase_r[2] .coord_x = 17;
  21483. defparam \macro_inst|apb_dac0_inst|phase_r[2] .coord_y = 5;
  21484. defparam \macro_inst|apb_dac0_inst|phase_r[2] .coord_z = 5;
  21485. defparam \macro_inst|apb_dac0_inst|phase_r[2] .mask = 16'hFF00;
  21486. defparam \macro_inst|apb_dac0_inst|phase_r[2] .modeMux = 1'b0;
  21487. defparam \macro_inst|apb_dac0_inst|phase_r[2] .FeedbackMux = 1'b0;
  21488. defparam \macro_inst|apb_dac0_inst|phase_r[2] .ShiftMux = 1'b0;
  21489. defparam \macro_inst|apb_dac0_inst|phase_r[2] .BypassEn = 1'b0;
  21490. defparam \macro_inst|apb_dac0_inst|phase_r[2] .CarryEnb = 1'b1;
  21491. alta_slice \macro_inst|apb_dac0_inst|phase_r[3] (
  21492. .A(vcc),
  21493. .B(vcc),
  21494. .C(vcc),
  21495. .D(\macro_inst|apb_dac0_inst|phase_acc [25]),
  21496. .Cin(),
  21497. .Qin(\macro_inst|apb_dac0_inst|phase_r [3]),
  21498. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y9_SIG_VCC ),
  21499. .AsyncReset(AsyncReset_X62_Y9_GND),
  21500. .SyncReset(),
  21501. .ShiftData(),
  21502. .SyncLoad(),
  21503. .LutOut(\macro_inst|apb_dac0_inst|phase_r[3]~feeder_combout ),
  21504. .Cout(),
  21505. .Q(\macro_inst|apb_dac0_inst|phase_r [3]));
  21506. defparam \macro_inst|apb_dac0_inst|phase_r[3] .coord_x = 17;
  21507. defparam \macro_inst|apb_dac0_inst|phase_r[3] .coord_y = 5;
  21508. defparam \macro_inst|apb_dac0_inst|phase_r[3] .coord_z = 2;
  21509. defparam \macro_inst|apb_dac0_inst|phase_r[3] .mask = 16'hFF00;
  21510. defparam \macro_inst|apb_dac0_inst|phase_r[3] .modeMux = 1'b0;
  21511. defparam \macro_inst|apb_dac0_inst|phase_r[3] .FeedbackMux = 1'b0;
  21512. defparam \macro_inst|apb_dac0_inst|phase_r[3] .ShiftMux = 1'b0;
  21513. defparam \macro_inst|apb_dac0_inst|phase_r[3] .BypassEn = 1'b0;
  21514. defparam \macro_inst|apb_dac0_inst|phase_r[3] .CarryEnb = 1'b1;
  21515. alta_slice \macro_inst|apb_dac0_inst|phase_r[4] (
  21516. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~26_combout ),
  21517. .B(\macro_inst|apb_dac0_inst|max_vol_r [4]),
  21518. .C(\macro_inst|apb_dac0_inst|phase_acc [26]),
  21519. .D(vcc),
  21520. .Cin(\macro_inst|apb_dac0_inst|LessThan0~7_cout ),
  21521. .Qin(\macro_inst|apb_dac0_inst|phase_r [4]),
  21522. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  21523. .AsyncReset(AsyncReset_X57_Y9_GND),
  21524. .SyncReset(SyncReset_X57_Y9_GND),
  21525. .ShiftData(),
  21526. .SyncLoad(SyncLoad_X57_Y9_VCC),
  21527. .LutOut(),
  21528. .Cout(\macro_inst|apb_dac0_inst|LessThan0~9_cout ),
  21529. .Q(\macro_inst|apb_dac0_inst|phase_r [4]));
  21530. defparam \macro_inst|apb_dac0_inst|phase_r[4] .coord_x = 14;
  21531. defparam \macro_inst|apb_dac0_inst|phase_r[4] .coord_y = 6;
  21532. defparam \macro_inst|apb_dac0_inst|phase_r[4] .coord_z = 8;
  21533. defparam \macro_inst|apb_dac0_inst|phase_r[4] .mask = 16'h004D;
  21534. defparam \macro_inst|apb_dac0_inst|phase_r[4] .modeMux = 1'b1;
  21535. defparam \macro_inst|apb_dac0_inst|phase_r[4] .FeedbackMux = 1'b0;
  21536. defparam \macro_inst|apb_dac0_inst|phase_r[4] .ShiftMux = 1'b0;
  21537. defparam \macro_inst|apb_dac0_inst|phase_r[4] .BypassEn = 1'b1;
  21538. defparam \macro_inst|apb_dac0_inst|phase_r[4] .CarryEnb = 1'b0;
  21539. alta_slice \macro_inst|apb_dac0_inst|phase_r[5] (
  21540. .A(vcc),
  21541. .B(vcc),
  21542. .C(\macro_inst|apb_dac0_inst|phase_acc [27]),
  21543. .D(\macro_inst|apb_dac0_inst|sine_rom~10_combout ),
  21544. .Cin(),
  21545. .Qin(\macro_inst|apb_dac0_inst|phase_r [5]),
  21546. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y6_SIG_VCC ),
  21547. .AsyncReset(AsyncReset_X57_Y6_GND),
  21548. .SyncReset(SyncReset_X57_Y6_GND),
  21549. .ShiftData(),
  21550. .SyncLoad(SyncLoad_X57_Y6_VCC),
  21551. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~11_combout ),
  21552. .Cout(),
  21553. .Q(\macro_inst|apb_dac0_inst|phase_r [5]));
  21554. defparam \macro_inst|apb_dac0_inst|phase_r[5] .coord_x = 14;
  21555. defparam \macro_inst|apb_dac0_inst|phase_r[5] .coord_y = 5;
  21556. defparam \macro_inst|apb_dac0_inst|phase_r[5] .coord_z = 4;
  21557. defparam \macro_inst|apb_dac0_inst|phase_r[5] .mask = 16'h0FFF;
  21558. defparam \macro_inst|apb_dac0_inst|phase_r[5] .modeMux = 1'b0;
  21559. defparam \macro_inst|apb_dac0_inst|phase_r[5] .FeedbackMux = 1'b1;
  21560. defparam \macro_inst|apb_dac0_inst|phase_r[5] .ShiftMux = 1'b0;
  21561. defparam \macro_inst|apb_dac0_inst|phase_r[5] .BypassEn = 1'b1;
  21562. defparam \macro_inst|apb_dac0_inst|phase_r[5] .CarryEnb = 1'b1;
  21563. alta_slice \macro_inst|apb_dac0_inst|phase_r[6] (
  21564. .A(\macro_inst|apb_dac0_inst|sine_rom~252_combout ),
  21565. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  21566. .C(\macro_inst|apb_dac0_inst|phase_acc [28]),
  21567. .D(\macro_inst|apb_dac0_inst|sine_rom~248_combout ),
  21568. .Cin(),
  21569. .Qin(\macro_inst|apb_dac0_inst|phase_r [6]),
  21570. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y6_SIG_VCC ),
  21571. .AsyncReset(AsyncReset_X57_Y6_GND),
  21572. .SyncReset(SyncReset_X57_Y6_GND),
  21573. .ShiftData(),
  21574. .SyncLoad(SyncLoad_X57_Y6_VCC),
  21575. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~253_combout ),
  21576. .Cout(),
  21577. .Q(\macro_inst|apb_dac0_inst|phase_r [6]));
  21578. defparam \macro_inst|apb_dac0_inst|phase_r[6] .coord_x = 14;
  21579. defparam \macro_inst|apb_dac0_inst|phase_r[6] .coord_y = 5;
  21580. defparam \macro_inst|apb_dac0_inst|phase_r[6] .coord_z = 1;
  21581. defparam \macro_inst|apb_dac0_inst|phase_r[6] .mask = 16'hFF02;
  21582. defparam \macro_inst|apb_dac0_inst|phase_r[6] .modeMux = 1'b0;
  21583. defparam \macro_inst|apb_dac0_inst|phase_r[6] .FeedbackMux = 1'b1;
  21584. defparam \macro_inst|apb_dac0_inst|phase_r[6] .ShiftMux = 1'b0;
  21585. defparam \macro_inst|apb_dac0_inst|phase_r[6] .BypassEn = 1'b1;
  21586. defparam \macro_inst|apb_dac0_inst|phase_r[6] .CarryEnb = 1'b1;
  21587. alta_slice \macro_inst|apb_dac0_inst|phase_r[7] (
  21588. .A(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~32_combout ),
  21589. .B(\macro_inst|apb_dac0_inst|max_vol_r [7]),
  21590. .C(\macro_inst|apb_dac0_inst|phase_acc [29]),
  21591. .D(vcc),
  21592. .Cin(\macro_inst|apb_dac0_inst|LessThan0~13_cout ),
  21593. .Qin(\macro_inst|apb_dac0_inst|phase_r [7]),
  21594. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y9_SIG_VCC ),
  21595. .AsyncReset(AsyncReset_X57_Y9_GND),
  21596. .SyncReset(SyncReset_X57_Y9_GND),
  21597. .ShiftData(),
  21598. .SyncLoad(SyncLoad_X57_Y9_VCC),
  21599. .LutOut(),
  21600. .Cout(\macro_inst|apb_dac0_inst|LessThan0~15_cout ),
  21601. .Q(\macro_inst|apb_dac0_inst|phase_r [7]));
  21602. defparam \macro_inst|apb_dac0_inst|phase_r[7] .coord_x = 14;
  21603. defparam \macro_inst|apb_dac0_inst|phase_r[7] .coord_y = 6;
  21604. defparam \macro_inst|apb_dac0_inst|phase_r[7] .coord_z = 11;
  21605. defparam \macro_inst|apb_dac0_inst|phase_r[7] .mask = 16'h002B;
  21606. defparam \macro_inst|apb_dac0_inst|phase_r[7] .modeMux = 1'b1;
  21607. defparam \macro_inst|apb_dac0_inst|phase_r[7] .FeedbackMux = 1'b0;
  21608. defparam \macro_inst|apb_dac0_inst|phase_r[7] .ShiftMux = 1'b0;
  21609. defparam \macro_inst|apb_dac0_inst|phase_r[7] .BypassEn = 1'b1;
  21610. defparam \macro_inst|apb_dac0_inst|phase_r[7] .CarryEnb = 1'b0;
  21611. alta_slice \macro_inst|apb_dac0_inst|phase_r[8] (
  21612. .A(\macro_inst|apb_dac0_inst|phase_r [9]),
  21613. .B(\macro_inst|apb_dac0_inst|sine_rom~178_combout ),
  21614. .C(\macro_inst|apb_dac0_inst|phase_acc [30]),
  21615. .D(\macro_inst|apb_dac0_inst|sine_rom~152_combout ),
  21616. .Cin(),
  21617. .Qin(\macro_inst|apb_dac0_inst|phase_r [8]),
  21618. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y3_SIG_VCC ),
  21619. .AsyncReset(AsyncReset_X57_Y3_GND),
  21620. .SyncReset(SyncReset_X57_Y3_GND),
  21621. .ShiftData(),
  21622. .SyncLoad(SyncLoad_X57_Y3_VCC),
  21623. .LutOut(\macro_inst|apb_dac0_inst|Mult0|auto_generated|mac_mult1|auto_generated|mult1|le4a [11]),
  21624. .Cout(),
  21625. .Q(\macro_inst|apb_dac0_inst|phase_r [8]));
  21626. defparam \macro_inst|apb_dac0_inst|phase_r[8] .coord_x = 17;
  21627. defparam \macro_inst|apb_dac0_inst|phase_r[8] .coord_y = 2;
  21628. defparam \macro_inst|apb_dac0_inst|phase_r[8] .coord_z = 13;
  21629. defparam \macro_inst|apb_dac0_inst|phase_r[8] .mask = 16'hFF60;
  21630. defparam \macro_inst|apb_dac0_inst|phase_r[8] .modeMux = 1'b0;
  21631. defparam \macro_inst|apb_dac0_inst|phase_r[8] .FeedbackMux = 1'b1;
  21632. defparam \macro_inst|apb_dac0_inst|phase_r[8] .ShiftMux = 1'b0;
  21633. defparam \macro_inst|apb_dac0_inst|phase_r[8] .BypassEn = 1'b1;
  21634. defparam \macro_inst|apb_dac0_inst|phase_r[8] .CarryEnb = 1'b1;
  21635. alta_slice \macro_inst|apb_dac0_inst|phase_r[9] (
  21636. .A(vcc),
  21637. .B(\macro_inst|apb_dac0_inst|sine_rom~17_combout ),
  21638. .C(\macro_inst|apb_dac0_inst|phase_acc [31]),
  21639. .D(\macro_inst|apb_dac0_inst|phase_r [8]),
  21640. .Cin(),
  21641. .Qin(\macro_inst|apb_dac0_inst|phase_r [9]),
  21642. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X57_Y3_SIG_VCC ),
  21643. .AsyncReset(AsyncReset_X57_Y3_GND),
  21644. .SyncReset(SyncReset_X57_Y3_GND),
  21645. .ShiftData(),
  21646. .SyncLoad(SyncLoad_X57_Y3_VCC),
  21647. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~18_combout ),
  21648. .Cout(),
  21649. .Q(\macro_inst|apb_dac0_inst|phase_r [9]));
  21650. defparam \macro_inst|apb_dac0_inst|phase_r[9] .coord_x = 17;
  21651. defparam \macro_inst|apb_dac0_inst|phase_r[9] .coord_y = 2;
  21652. defparam \macro_inst|apb_dac0_inst|phase_r[9] .coord_z = 2;
  21653. defparam \macro_inst|apb_dac0_inst|phase_r[9] .mask = 16'h3C00;
  21654. defparam \macro_inst|apb_dac0_inst|phase_r[9] .modeMux = 1'b0;
  21655. defparam \macro_inst|apb_dac0_inst|phase_r[9] .FeedbackMux = 1'b1;
  21656. defparam \macro_inst|apb_dac0_inst|phase_r[9] .ShiftMux = 1'b0;
  21657. defparam \macro_inst|apb_dac0_inst|phase_r[9] .BypassEn = 1'b1;
  21658. defparam \macro_inst|apb_dac0_inst|phase_r[9] .CarryEnb = 1'b1;
  21659. alta_slice \macro_inst|apb_dac0_inst|sine_rom~10 (
  21660. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  21661. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  21662. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21663. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21664. .Cin(),
  21665. .Qin(),
  21666. .Clk(),
  21667. .AsyncReset(),
  21668. .SyncReset(),
  21669. .ShiftData(),
  21670. .SyncLoad(),
  21671. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~10_combout ),
  21672. .Cout(),
  21673. .Q());
  21674. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .coord_x = 14;
  21675. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .coord_y = 5;
  21676. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .coord_z = 7;
  21677. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .mask = 16'hA080;
  21678. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .modeMux = 1'b0;
  21679. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .FeedbackMux = 1'b0;
  21680. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .ShiftMux = 1'b0;
  21681. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .BypassEn = 1'b0;
  21682. defparam \macro_inst|apb_dac0_inst|sine_rom~10 .CarryEnb = 1'b1;
  21683. alta_slice \macro_inst|apb_dac0_inst|sine_rom~100 (
  21684. .A(\macro_inst|apb_dac0_inst|sine_rom~99_combout ),
  21685. .B(\macro_inst|apb_dac0_inst|sine_rom~98_combout ),
  21686. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21687. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21688. .Cin(),
  21689. .Qin(),
  21690. .Clk(),
  21691. .AsyncReset(),
  21692. .SyncReset(),
  21693. .ShiftData(),
  21694. .SyncLoad(),
  21695. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~100_combout ),
  21696. .Cout(),
  21697. .Q());
  21698. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .coord_x = 18;
  21699. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .coord_y = 3;
  21700. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .coord_z = 4;
  21701. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .mask = 16'hB4DA;
  21702. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .modeMux = 1'b0;
  21703. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .FeedbackMux = 1'b0;
  21704. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .ShiftMux = 1'b0;
  21705. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .BypassEn = 1'b0;
  21706. defparam \macro_inst|apb_dac0_inst|sine_rom~100 .CarryEnb = 1'b1;
  21707. alta_slice \macro_inst|apb_dac0_inst|sine_rom~101 (
  21708. .A(\macro_inst|apb_dac0_inst|sine_rom~100_combout ),
  21709. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  21710. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  21711. .D(\macro_inst|apb_dac0_inst|sine_rom~89_combout ),
  21712. .Cin(),
  21713. .Qin(),
  21714. .Clk(),
  21715. .AsyncReset(),
  21716. .SyncReset(),
  21717. .ShiftData(),
  21718. .SyncLoad(),
  21719. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~101_combout ),
  21720. .Cout(),
  21721. .Q());
  21722. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .coord_x = 18;
  21723. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .coord_y = 3;
  21724. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .coord_z = 12;
  21725. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .mask = 16'hF2C2;
  21726. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .modeMux = 1'b0;
  21727. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .FeedbackMux = 1'b0;
  21728. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .ShiftMux = 1'b0;
  21729. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .BypassEn = 1'b0;
  21730. defparam \macro_inst|apb_dac0_inst|sine_rom~101 .CarryEnb = 1'b1;
  21731. alta_slice \macro_inst|apb_dac0_inst|sine_rom~102 (
  21732. .A(\macro_inst|apb_dac0_inst|sine_rom~96_combout ),
  21733. .B(\macro_inst|apb_dac0_inst|sine_rom~83_combout ),
  21734. .C(\macro_inst|apb_dac0_inst|sine_rom~101_combout ),
  21735. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  21736. .Cin(),
  21737. .Qin(),
  21738. .Clk(),
  21739. .AsyncReset(),
  21740. .SyncReset(),
  21741. .ShiftData(),
  21742. .SyncLoad(),
  21743. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~102_combout ),
  21744. .Cout(),
  21745. .Q());
  21746. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .coord_x = 18;
  21747. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .coord_y = 3;
  21748. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .coord_z = 11;
  21749. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .mask = 16'hACF0;
  21750. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .modeMux = 1'b0;
  21751. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .FeedbackMux = 1'b0;
  21752. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .ShiftMux = 1'b0;
  21753. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .BypassEn = 1'b0;
  21754. defparam \macro_inst|apb_dac0_inst|sine_rom~102 .CarryEnb = 1'b1;
  21755. alta_slice \macro_inst|apb_dac0_inst|sine_rom~103 (
  21756. .A(\macro_inst|apb_dac0_inst|sine_rom~102_combout ),
  21757. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  21758. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  21759. .D(\macro_inst|apb_dac0_inst|sine_rom~97_combout ),
  21760. .Cin(),
  21761. .Qin(),
  21762. .Clk(),
  21763. .AsyncReset(),
  21764. .SyncReset(),
  21765. .ShiftData(),
  21766. .SyncLoad(),
  21767. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~103_combout ),
  21768. .Cout(),
  21769. .Q());
  21770. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .coord_x = 17;
  21771. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .coord_y = 2;
  21772. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .coord_z = 14;
  21773. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .mask = 16'h3202;
  21774. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .modeMux = 1'b0;
  21775. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .FeedbackMux = 1'b0;
  21776. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .ShiftMux = 1'b0;
  21777. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .BypassEn = 1'b0;
  21778. defparam \macro_inst|apb_dac0_inst|sine_rom~103 .CarryEnb = 1'b1;
  21779. alta_slice \macro_inst|apb_dac0_inst|sine_rom~104 (
  21780. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  21781. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  21782. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21783. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21784. .Cin(),
  21785. .Qin(),
  21786. .Clk(),
  21787. .AsyncReset(),
  21788. .SyncReset(),
  21789. .ShiftData(),
  21790. .SyncLoad(),
  21791. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~104_combout ),
  21792. .Cout(),
  21793. .Q());
  21794. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .coord_x = 14;
  21795. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .coord_y = 1;
  21796. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .coord_z = 3;
  21797. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .mask = 16'h6CCA;
  21798. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .modeMux = 1'b0;
  21799. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .FeedbackMux = 1'b0;
  21800. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .ShiftMux = 1'b0;
  21801. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .BypassEn = 1'b0;
  21802. defparam \macro_inst|apb_dac0_inst|sine_rom~104 .CarryEnb = 1'b1;
  21803. alta_slice \macro_inst|apb_dac0_inst|sine_rom~105 (
  21804. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  21805. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  21806. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21807. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21808. .Cin(),
  21809. .Qin(),
  21810. .Clk(),
  21811. .AsyncReset(),
  21812. .SyncReset(),
  21813. .ShiftData(),
  21814. .SyncLoad(),
  21815. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~105_combout ),
  21816. .Cout(),
  21817. .Q());
  21818. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .coord_x = 14;
  21819. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .coord_y = 1;
  21820. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .coord_z = 15;
  21821. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .mask = 16'h93B4;
  21822. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .modeMux = 1'b0;
  21823. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .FeedbackMux = 1'b0;
  21824. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .ShiftMux = 1'b0;
  21825. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .BypassEn = 1'b0;
  21826. defparam \macro_inst|apb_dac0_inst|sine_rom~105 .CarryEnb = 1'b1;
  21827. alta_slice \macro_inst|apb_dac0_inst|sine_rom~106 (
  21828. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  21829. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  21830. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21831. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21832. .Cin(),
  21833. .Qin(),
  21834. .Clk(),
  21835. .AsyncReset(),
  21836. .SyncReset(),
  21837. .ShiftData(),
  21838. .SyncLoad(),
  21839. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~106_combout ),
  21840. .Cout(),
  21841. .Q());
  21842. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .coord_x = 14;
  21843. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .coord_y = 1;
  21844. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .coord_z = 13;
  21845. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .mask = 16'hB37C;
  21846. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .modeMux = 1'b0;
  21847. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .FeedbackMux = 1'b0;
  21848. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .ShiftMux = 1'b0;
  21849. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .BypassEn = 1'b0;
  21850. defparam \macro_inst|apb_dac0_inst|sine_rom~106 .CarryEnb = 1'b1;
  21851. alta_slice \macro_inst|apb_dac0_inst|sine_rom~107 (
  21852. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  21853. .B(\macro_inst|apb_dac0_inst|sine_rom~105_combout ),
  21854. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  21855. .D(\macro_inst|apb_dac0_inst|sine_rom~106_combout ),
  21856. .Cin(),
  21857. .Qin(),
  21858. .Clk(),
  21859. .AsyncReset(),
  21860. .SyncReset(),
  21861. .ShiftData(),
  21862. .SyncLoad(),
  21863. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~107_combout ),
  21864. .Cout(),
  21865. .Q());
  21866. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .coord_x = 14;
  21867. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .coord_y = 1;
  21868. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .coord_z = 0;
  21869. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .mask = 16'hA8AD;
  21870. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .modeMux = 1'b0;
  21871. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .FeedbackMux = 1'b0;
  21872. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .ShiftMux = 1'b0;
  21873. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .BypassEn = 1'b0;
  21874. defparam \macro_inst|apb_dac0_inst|sine_rom~107 .CarryEnb = 1'b1;
  21875. alta_slice \macro_inst|apb_dac0_inst|sine_rom~108 (
  21876. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  21877. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  21878. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21879. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21880. .Cin(),
  21881. .Qin(),
  21882. .Clk(),
  21883. .AsyncReset(),
  21884. .SyncReset(),
  21885. .ShiftData(),
  21886. .SyncLoad(),
  21887. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~108_combout ),
  21888. .Cout(),
  21889. .Q());
  21890. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .coord_x = 14;
  21891. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .coord_y = 1;
  21892. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .coord_z = 7;
  21893. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .mask = 16'hB448;
  21894. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .modeMux = 1'b0;
  21895. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .FeedbackMux = 1'b0;
  21896. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .ShiftMux = 1'b0;
  21897. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .BypassEn = 1'b0;
  21898. defparam \macro_inst|apb_dac0_inst|sine_rom~108 .CarryEnb = 1'b1;
  21899. alta_slice \macro_inst|apb_dac0_inst|sine_rom~109 (
  21900. .A(\macro_inst|apb_dac0_inst|sine_rom~107_combout ),
  21901. .B(\macro_inst|apb_dac0_inst|sine_rom~104_combout ),
  21902. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  21903. .D(\macro_inst|apb_dac0_inst|sine_rom~108_combout ),
  21904. .Cin(),
  21905. .Qin(),
  21906. .Clk(),
  21907. .AsyncReset(),
  21908. .SyncReset(),
  21909. .ShiftData(),
  21910. .SyncLoad(),
  21911. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~109_combout ),
  21912. .Cout(),
  21913. .Q());
  21914. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .coord_x = 14;
  21915. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .coord_y = 1;
  21916. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .coord_z = 2;
  21917. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .mask = 16'h4AEA;
  21918. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .modeMux = 1'b0;
  21919. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .FeedbackMux = 1'b0;
  21920. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .ShiftMux = 1'b0;
  21921. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .BypassEn = 1'b0;
  21922. defparam \macro_inst|apb_dac0_inst|sine_rom~109 .CarryEnb = 1'b1;
  21923. alta_slice \macro_inst|apb_dac0_inst|sine_rom~110 (
  21924. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  21925. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  21926. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21927. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21928. .Cin(),
  21929. .Qin(),
  21930. .Clk(),
  21931. .AsyncReset(),
  21932. .SyncReset(),
  21933. .ShiftData(),
  21934. .SyncLoad(),
  21935. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~110_combout ),
  21936. .Cout(),
  21937. .Q());
  21938. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .coord_x = 14;
  21939. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .coord_y = 1;
  21940. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .coord_z = 1;
  21941. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .mask = 16'h3242;
  21942. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .modeMux = 1'b0;
  21943. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .FeedbackMux = 1'b0;
  21944. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .ShiftMux = 1'b0;
  21945. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .BypassEn = 1'b0;
  21946. defparam \macro_inst|apb_dac0_inst|sine_rom~110 .CarryEnb = 1'b1;
  21947. alta_slice \macro_inst|apb_dac0_inst|sine_rom~111 (
  21948. .A(vcc),
  21949. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  21950. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  21951. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21952. .Cin(),
  21953. .Qin(),
  21954. .Clk(),
  21955. .AsyncReset(),
  21956. .SyncReset(),
  21957. .ShiftData(),
  21958. .SyncLoad(),
  21959. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~111_combout ),
  21960. .Cout(),
  21961. .Q());
  21962. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .coord_x = 14;
  21963. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .coord_y = 1;
  21964. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .coord_z = 12;
  21965. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .mask = 16'hFCCC;
  21966. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .modeMux = 1'b0;
  21967. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .FeedbackMux = 1'b0;
  21968. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .ShiftMux = 1'b0;
  21969. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .BypassEn = 1'b0;
  21970. defparam \macro_inst|apb_dac0_inst|sine_rom~111 .CarryEnb = 1'b1;
  21971. alta_slice \macro_inst|apb_dac0_inst|sine_rom~112 (
  21972. .A(\macro_inst|apb_dac0_inst|sine_rom~111_combout ),
  21973. .B(\macro_inst|apb_dac0_inst|sine_rom~110_combout ),
  21974. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  21975. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  21976. .Cin(),
  21977. .Qin(),
  21978. .Clk(),
  21979. .AsyncReset(),
  21980. .SyncReset(),
  21981. .ShiftData(),
  21982. .SyncLoad(),
  21983. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~112_combout ),
  21984. .Cout(),
  21985. .Q());
  21986. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .coord_x = 14;
  21987. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .coord_y = 1;
  21988. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .coord_z = 11;
  21989. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .mask = 16'h2652;
  21990. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .modeMux = 1'b0;
  21991. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .FeedbackMux = 1'b0;
  21992. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .ShiftMux = 1'b0;
  21993. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .BypassEn = 1'b0;
  21994. defparam \macro_inst|apb_dac0_inst|sine_rom~112 .CarryEnb = 1'b1;
  21995. alta_slice \macro_inst|apb_dac0_inst|sine_rom~113 (
  21996. .A(\macro_inst|apb_dac0_inst|sine_rom~111_combout ),
  21997. .B(\macro_inst|apb_dac0_inst|sine_rom~110_combout ),
  21998. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  21999. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22000. .Cin(),
  22001. .Qin(),
  22002. .Clk(),
  22003. .AsyncReset(),
  22004. .SyncReset(),
  22005. .ShiftData(),
  22006. .SyncLoad(),
  22007. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~113_combout ),
  22008. .Cout(),
  22009. .Q());
  22010. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .coord_x = 14;
  22011. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .coord_y = 1;
  22012. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .coord_z = 5;
  22013. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .mask = 16'hD7E6;
  22014. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .modeMux = 1'b0;
  22015. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .FeedbackMux = 1'b0;
  22016. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .ShiftMux = 1'b0;
  22017. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .BypassEn = 1'b0;
  22018. defparam \macro_inst|apb_dac0_inst|sine_rom~113 .CarryEnb = 1'b1;
  22019. alta_slice \macro_inst|apb_dac0_inst|sine_rom~114 (
  22020. .A(vcc),
  22021. .B(\macro_inst|apb_dac0_inst|sine_rom~113_combout ),
  22022. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  22023. .D(\macro_inst|apb_dac0_inst|sine_rom~112_combout ),
  22024. .Cin(),
  22025. .Qin(),
  22026. .Clk(),
  22027. .AsyncReset(),
  22028. .SyncReset(),
  22029. .ShiftData(),
  22030. .SyncLoad(),
  22031. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~114_combout ),
  22032. .Cout(),
  22033. .Q());
  22034. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .coord_x = 14;
  22035. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .coord_y = 1;
  22036. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .coord_z = 6;
  22037. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .mask = 16'hF303;
  22038. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .modeMux = 1'b0;
  22039. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .FeedbackMux = 1'b0;
  22040. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .ShiftMux = 1'b0;
  22041. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .BypassEn = 1'b0;
  22042. defparam \macro_inst|apb_dac0_inst|sine_rom~114 .CarryEnb = 1'b1;
  22043. alta_slice \macro_inst|apb_dac0_inst|sine_rom~115 (
  22044. .A(vcc),
  22045. .B(\macro_inst|apb_dac0_inst|sine_rom~72_combout ),
  22046. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22047. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  22048. .Cin(),
  22049. .Qin(),
  22050. .Clk(),
  22051. .AsyncReset(),
  22052. .SyncReset(),
  22053. .ShiftData(),
  22054. .SyncLoad(),
  22055. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~115_combout ),
  22056. .Cout(),
  22057. .Q());
  22058. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .coord_x = 17;
  22059. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .coord_y = 5;
  22060. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .coord_z = 6;
  22061. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .mask = 16'hF300;
  22062. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .modeMux = 1'b0;
  22063. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .FeedbackMux = 1'b0;
  22064. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .ShiftMux = 1'b0;
  22065. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .BypassEn = 1'b0;
  22066. defparam \macro_inst|apb_dac0_inst|sine_rom~115 .CarryEnb = 1'b1;
  22067. alta_slice \macro_inst|apb_dac0_inst|sine_rom~116 (
  22068. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22069. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22070. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  22071. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22072. .Cin(),
  22073. .Qin(),
  22074. .Clk(),
  22075. .AsyncReset(),
  22076. .SyncReset(),
  22077. .ShiftData(),
  22078. .SyncLoad(),
  22079. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~116_combout ),
  22080. .Cout(),
  22081. .Q());
  22082. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .coord_x = 17;
  22083. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .coord_y = 5;
  22084. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .coord_z = 15;
  22085. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .mask = 16'hF382;
  22086. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .modeMux = 1'b0;
  22087. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .FeedbackMux = 1'b0;
  22088. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .ShiftMux = 1'b0;
  22089. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .BypassEn = 1'b0;
  22090. defparam \macro_inst|apb_dac0_inst|sine_rom~116 .CarryEnb = 1'b1;
  22091. alta_slice \macro_inst|apb_dac0_inst|sine_rom~117 (
  22092. .A(\macro_inst|apb_dac0_inst|sine_rom~115_combout ),
  22093. .B(\macro_inst|apb_dac0_inst|sine_rom~116_combout ),
  22094. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22095. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  22096. .Cin(),
  22097. .Qin(),
  22098. .Clk(),
  22099. .AsyncReset(),
  22100. .SyncReset(),
  22101. .ShiftData(),
  22102. .SyncLoad(),
  22103. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~117_combout ),
  22104. .Cout(),
  22105. .Q());
  22106. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .coord_x = 17;
  22107. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .coord_y = 5;
  22108. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .coord_z = 12;
  22109. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .mask = 16'hB5D5;
  22110. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .modeMux = 1'b0;
  22111. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .FeedbackMux = 1'b0;
  22112. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .ShiftMux = 1'b0;
  22113. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .BypassEn = 1'b0;
  22114. defparam \macro_inst|apb_dac0_inst|sine_rom~117 .CarryEnb = 1'b1;
  22115. alta_slice \macro_inst|apb_dac0_inst|sine_rom~118 (
  22116. .A(\macro_inst|apb_dac0_inst|sine_rom~114_combout ),
  22117. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  22118. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22119. .D(\macro_inst|apb_dac0_inst|sine_rom~117_combout ),
  22120. .Cin(),
  22121. .Qin(),
  22122. .Clk(),
  22123. .AsyncReset(),
  22124. .SyncReset(),
  22125. .ShiftData(),
  22126. .SyncLoad(),
  22127. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~118_combout ),
  22128. .Cout(),
  22129. .Q());
  22130. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .coord_x = 14;
  22131. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .coord_y = 1;
  22132. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .coord_z = 4;
  22133. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .mask = 16'hE3E0;
  22134. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .modeMux = 1'b0;
  22135. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .FeedbackMux = 1'b0;
  22136. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .ShiftMux = 1'b0;
  22137. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .BypassEn = 1'b0;
  22138. defparam \macro_inst|apb_dac0_inst|sine_rom~118 .CarryEnb = 1'b1;
  22139. alta_slice \macro_inst|apb_dac0_inst|sine_rom~119 (
  22140. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  22141. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22142. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  22143. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22144. .Cin(),
  22145. .Qin(),
  22146. .Clk(),
  22147. .AsyncReset(),
  22148. .SyncReset(),
  22149. .ShiftData(),
  22150. .SyncLoad(),
  22151. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~119_combout ),
  22152. .Cout(),
  22153. .Q());
  22154. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .coord_x = 14;
  22155. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .coord_y = 1;
  22156. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .coord_z = 10;
  22157. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .mask = 16'h2404;
  22158. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .modeMux = 1'b0;
  22159. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .FeedbackMux = 1'b0;
  22160. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .ShiftMux = 1'b0;
  22161. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .BypassEn = 1'b0;
  22162. defparam \macro_inst|apb_dac0_inst|sine_rom~119 .CarryEnb = 1'b1;
  22163. alta_slice \macro_inst|apb_dac0_inst|sine_rom~12 (
  22164. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22165. .B(\macro_inst|apb_dac0_inst|sine_rom~9_combout ),
  22166. .C(\macro_inst|apb_dac0_inst|sine_rom~11_combout ),
  22167. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  22168. .Cin(),
  22169. .Qin(),
  22170. .Clk(),
  22171. .AsyncReset(),
  22172. .SyncReset(),
  22173. .ShiftData(),
  22174. .SyncLoad(),
  22175. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~12_combout ),
  22176. .Cout(),
  22177. .Q());
  22178. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .coord_x = 14;
  22179. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .coord_y = 5;
  22180. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .coord_z = 6;
  22181. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .mask = 16'hEE50;
  22182. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .modeMux = 1'b0;
  22183. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .FeedbackMux = 1'b0;
  22184. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .ShiftMux = 1'b0;
  22185. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .BypassEn = 1'b0;
  22186. defparam \macro_inst|apb_dac0_inst|sine_rom~12 .CarryEnb = 1'b1;
  22187. alta_slice \macro_inst|apb_dac0_inst|sine_rom~120 (
  22188. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22189. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22190. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  22191. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  22192. .Cin(),
  22193. .Qin(),
  22194. .Clk(),
  22195. .AsyncReset(),
  22196. .SyncReset(),
  22197. .ShiftData(),
  22198. .SyncLoad(),
  22199. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~120_combout ),
  22200. .Cout(),
  22201. .Q());
  22202. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .coord_x = 14;
  22203. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .coord_y = 1;
  22204. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .coord_z = 14;
  22205. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .mask = 16'h1080;
  22206. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .modeMux = 1'b0;
  22207. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .FeedbackMux = 1'b0;
  22208. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .ShiftMux = 1'b0;
  22209. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .BypassEn = 1'b0;
  22210. defparam \macro_inst|apb_dac0_inst|sine_rom~120 .CarryEnb = 1'b1;
  22211. alta_slice \macro_inst|apb_dac0_inst|sine_rom~121 (
  22212. .A(\macro_inst|apb_dac0_inst|sine_rom~119_combout ),
  22213. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  22214. .C(\macro_inst|apb_dac0_inst|sine_rom~120_combout ),
  22215. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22216. .Cin(),
  22217. .Qin(),
  22218. .Clk(),
  22219. .AsyncReset(),
  22220. .SyncReset(),
  22221. .ShiftData(),
  22222. .SyncLoad(),
  22223. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~121_combout ),
  22224. .Cout(),
  22225. .Q());
  22226. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .coord_x = 14;
  22227. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .coord_y = 1;
  22228. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .coord_z = 8;
  22229. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .mask = 16'hE966;
  22230. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .modeMux = 1'b0;
  22231. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .FeedbackMux = 1'b0;
  22232. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .ShiftMux = 1'b0;
  22233. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .BypassEn = 1'b0;
  22234. defparam \macro_inst|apb_dac0_inst|sine_rom~121 .CarryEnb = 1'b1;
  22235. alta_slice \macro_inst|apb_dac0_inst|sine_rom~122 (
  22236. .A(\macro_inst|apb_dac0_inst|sine_rom~109_combout ),
  22237. .B(\macro_inst|apb_dac0_inst|sine_rom~121_combout ),
  22238. .C(\macro_inst|apb_dac0_inst|sine_rom~118_combout ),
  22239. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  22240. .Cin(),
  22241. .Qin(),
  22242. .Clk(),
  22243. .AsyncReset(),
  22244. .SyncReset(),
  22245. .ShiftData(),
  22246. .SyncLoad(),
  22247. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~122_combout ),
  22248. .Cout(),
  22249. .Q());
  22250. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .coord_x = 14;
  22251. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .coord_y = 1;
  22252. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .coord_z = 9;
  22253. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .mask = 16'hCAF0;
  22254. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .modeMux = 1'b0;
  22255. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .FeedbackMux = 1'b0;
  22256. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .ShiftMux = 1'b0;
  22257. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .BypassEn = 1'b0;
  22258. defparam \macro_inst|apb_dac0_inst|sine_rom~122 .CarryEnb = 1'b1;
  22259. alta_slice \macro_inst|apb_dac0_inst|sine_rom~123 (
  22260. .A(vcc),
  22261. .B(\macro_inst|apb_dac0_inst|sine_rom~122_combout ),
  22262. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  22263. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  22264. .Cin(),
  22265. .Qin(),
  22266. .Clk(),
  22267. .AsyncReset(),
  22268. .SyncReset(),
  22269. .ShiftData(),
  22270. .SyncLoad(),
  22271. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~123_combout ),
  22272. .Cout(),
  22273. .Q());
  22274. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .coord_x = 18;
  22275. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .coord_y = 2;
  22276. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .coord_z = 11;
  22277. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .mask = 16'h30C0;
  22278. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .modeMux = 1'b0;
  22279. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .FeedbackMux = 1'b0;
  22280. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .ShiftMux = 1'b0;
  22281. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .BypassEn = 1'b0;
  22282. defparam \macro_inst|apb_dac0_inst|sine_rom~123 .CarryEnb = 1'b1;
  22283. alta_slice \macro_inst|apb_dac0_inst|sine_rom~124 (
  22284. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  22285. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22286. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  22287. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22288. .Cin(),
  22289. .Qin(),
  22290. .Clk(),
  22291. .AsyncReset(),
  22292. .SyncReset(),
  22293. .ShiftData(),
  22294. .SyncLoad(),
  22295. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~124_combout ),
  22296. .Cout(),
  22297. .Q());
  22298. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .coord_x = 5;
  22299. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .coord_y = 2;
  22300. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .coord_z = 5;
  22301. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .mask = 16'hAA62;
  22302. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .modeMux = 1'b0;
  22303. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .FeedbackMux = 1'b0;
  22304. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .ShiftMux = 1'b0;
  22305. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .BypassEn = 1'b0;
  22306. defparam \macro_inst|apb_dac0_inst|sine_rom~124 .CarryEnb = 1'b1;
  22307. alta_slice \macro_inst|apb_dac0_inst|sine_rom~125 (
  22308. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  22309. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  22310. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22311. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22312. .Cin(),
  22313. .Qin(),
  22314. .Clk(),
  22315. .AsyncReset(),
  22316. .SyncReset(),
  22317. .ShiftData(),
  22318. .SyncLoad(),
  22319. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~125_combout ),
  22320. .Cout(),
  22321. .Q());
  22322. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .coord_x = 5;
  22323. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .coord_y = 2;
  22324. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .coord_z = 2;
  22325. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .mask = 16'hB4CC;
  22326. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .modeMux = 1'b0;
  22327. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .FeedbackMux = 1'b0;
  22328. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .ShiftMux = 1'b0;
  22329. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .BypassEn = 1'b0;
  22330. defparam \macro_inst|apb_dac0_inst|sine_rom~125 .CarryEnb = 1'b1;
  22331. alta_slice \macro_inst|apb_dac0_inst|sine_rom~126 (
  22332. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22333. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22334. .C(\macro_inst|apb_dac0_inst|sine_rom~125_combout ),
  22335. .D(\macro_inst|apb_dac0_inst|sine_rom~124_combout ),
  22336. .Cin(),
  22337. .Qin(),
  22338. .Clk(),
  22339. .AsyncReset(),
  22340. .SyncReset(),
  22341. .ShiftData(),
  22342. .SyncLoad(),
  22343. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~126_combout ),
  22344. .Cout(),
  22345. .Q());
  22346. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .coord_x = 5;
  22347. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .coord_y = 2;
  22348. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .coord_z = 11;
  22349. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .mask = 16'h8E4A;
  22350. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .modeMux = 1'b0;
  22351. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .FeedbackMux = 1'b0;
  22352. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .ShiftMux = 1'b0;
  22353. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .BypassEn = 1'b0;
  22354. defparam \macro_inst|apb_dac0_inst|sine_rom~126 .CarryEnb = 1'b1;
  22355. alta_slice \macro_inst|apb_dac0_inst|sine_rom~127 (
  22356. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22357. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22358. .C(\macro_inst|apb_dac0_inst|sine_rom~125_combout ),
  22359. .D(\macro_inst|apb_dac0_inst|sine_rom~124_combout ),
  22360. .Cin(),
  22361. .Qin(),
  22362. .Clk(),
  22363. .AsyncReset(),
  22364. .SyncReset(),
  22365. .ShiftData(),
  22366. .SyncLoad(),
  22367. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~127_combout ),
  22368. .Cout(),
  22369. .Q());
  22370. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .coord_x = 5;
  22371. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .coord_y = 2;
  22372. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .coord_z = 10;
  22373. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .mask = 16'hE1F4;
  22374. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .modeMux = 1'b0;
  22375. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .FeedbackMux = 1'b0;
  22376. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .ShiftMux = 1'b0;
  22377. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .BypassEn = 1'b0;
  22378. defparam \macro_inst|apb_dac0_inst|sine_rom~127 .CarryEnb = 1'b1;
  22379. alta_slice \macro_inst|apb_dac0_inst|sine_rom~128 (
  22380. .A(\macro_inst|apb_dac0_inst|sine_rom~127_combout ),
  22381. .B(vcc),
  22382. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22383. .D(\macro_inst|apb_dac0_inst|sine_rom~126_combout ),
  22384. .Cin(),
  22385. .Qin(),
  22386. .Clk(),
  22387. .AsyncReset(),
  22388. .SyncReset(),
  22389. .ShiftData(),
  22390. .SyncLoad(),
  22391. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~128_combout ),
  22392. .Cout(),
  22393. .Q());
  22394. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .coord_x = 5;
  22395. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .coord_y = 2;
  22396. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .coord_z = 13;
  22397. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .mask = 16'h5A55;
  22398. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .modeMux = 1'b0;
  22399. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .FeedbackMux = 1'b0;
  22400. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .ShiftMux = 1'b0;
  22401. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .BypassEn = 1'b0;
  22402. defparam \macro_inst|apb_dac0_inst|sine_rom~128 .CarryEnb = 1'b1;
  22403. alta_slice \macro_inst|apb_dac0_inst|sine_rom~129 (
  22404. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  22405. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22406. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  22407. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22408. .Cin(),
  22409. .Qin(),
  22410. .Clk(),
  22411. .AsyncReset(),
  22412. .SyncReset(),
  22413. .ShiftData(),
  22414. .SyncLoad(),
  22415. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~129_combout ),
  22416. .Cout(),
  22417. .Q());
  22418. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .coord_x = 5;
  22419. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .coord_y = 4;
  22420. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .coord_z = 0;
  22421. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .mask = 16'h481A;
  22422. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .modeMux = 1'b0;
  22423. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .FeedbackMux = 1'b0;
  22424. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .ShiftMux = 1'b0;
  22425. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .BypassEn = 1'b0;
  22426. defparam \macro_inst|apb_dac0_inst|sine_rom~129 .CarryEnb = 1'b1;
  22427. alta_slice \macro_inst|apb_dac0_inst|sine_rom~13 (
  22428. .A(vcc),
  22429. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  22430. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  22431. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22432. .Cin(),
  22433. .Qin(),
  22434. .Clk(),
  22435. .AsyncReset(),
  22436. .SyncReset(),
  22437. .ShiftData(),
  22438. .SyncLoad(),
  22439. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~13_combout ),
  22440. .Cout(),
  22441. .Q());
  22442. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .coord_x = 10;
  22443. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .coord_y = 1;
  22444. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .coord_z = 2;
  22445. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .mask = 16'hF003;
  22446. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .modeMux = 1'b0;
  22447. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .FeedbackMux = 1'b0;
  22448. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .ShiftMux = 1'b0;
  22449. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .BypassEn = 1'b0;
  22450. defparam \macro_inst|apb_dac0_inst|sine_rom~13 .CarryEnb = 1'b1;
  22451. alta_slice \macro_inst|apb_dac0_inst|sine_rom~130 (
  22452. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  22453. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  22454. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22455. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22456. .Cin(),
  22457. .Qin(),
  22458. .Clk(),
  22459. .AsyncReset(),
  22460. .SyncReset(),
  22461. .ShiftData(),
  22462. .SyncLoad(),
  22463. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~130_combout ),
  22464. .Cout(),
  22465. .Q());
  22466. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .coord_x = 8;
  22467. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .coord_y = 4;
  22468. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .coord_z = 13;
  22469. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .mask = 16'h90B0;
  22470. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .modeMux = 1'b0;
  22471. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .FeedbackMux = 1'b0;
  22472. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .ShiftMux = 1'b0;
  22473. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .BypassEn = 1'b0;
  22474. defparam \macro_inst|apb_dac0_inst|sine_rom~130 .CarryEnb = 1'b1;
  22475. alta_slice \macro_inst|apb_dac0_inst|sine_rom~131 (
  22476. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  22477. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  22478. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  22479. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22480. .Cin(),
  22481. .Qin(),
  22482. .Clk(),
  22483. .AsyncReset(),
  22484. .SyncReset(),
  22485. .ShiftData(),
  22486. .SyncLoad(),
  22487. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~131_combout ),
  22488. .Cout(),
  22489. .Q());
  22490. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .coord_x = 8;
  22491. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .coord_y = 4;
  22492. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .coord_z = 12;
  22493. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .mask = 16'h13B6;
  22494. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .modeMux = 1'b0;
  22495. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .FeedbackMux = 1'b0;
  22496. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .ShiftMux = 1'b0;
  22497. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .BypassEn = 1'b0;
  22498. defparam \macro_inst|apb_dac0_inst|sine_rom~131 .CarryEnb = 1'b1;
  22499. alta_slice \macro_inst|apb_dac0_inst|sine_rom~132 (
  22500. .A(\macro_inst|apb_dac0_inst|sine_rom~130_combout ),
  22501. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  22502. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  22503. .D(\macro_inst|apb_dac0_inst|sine_rom~131_combout ),
  22504. .Cin(),
  22505. .Qin(),
  22506. .Clk(),
  22507. .AsyncReset(),
  22508. .SyncReset(),
  22509. .ShiftData(),
  22510. .SyncLoad(),
  22511. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~132_combout ),
  22512. .Cout(),
  22513. .Q());
  22514. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .coord_x = 6;
  22515. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .coord_y = 4;
  22516. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .coord_z = 8;
  22517. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .mask = 16'hE0E3;
  22518. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .modeMux = 1'b0;
  22519. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .FeedbackMux = 1'b0;
  22520. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .ShiftMux = 1'b0;
  22521. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .BypassEn = 1'b0;
  22522. defparam \macro_inst|apb_dac0_inst|sine_rom~132 .CarryEnb = 1'b1;
  22523. alta_slice \macro_inst|apb_dac0_inst|sine_rom~133 (
  22524. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22525. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22526. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22527. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22528. .Cin(),
  22529. .Qin(),
  22530. .Clk(),
  22531. .AsyncReset(),
  22532. .SyncReset(),
  22533. .ShiftData(),
  22534. .SyncLoad(),
  22535. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~133_combout ),
  22536. .Cout(),
  22537. .Q());
  22538. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .coord_x = 5;
  22539. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .coord_y = 4;
  22540. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .coord_z = 5;
  22541. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .mask = 16'h6228;
  22542. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .modeMux = 1'b0;
  22543. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .FeedbackMux = 1'b0;
  22544. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .ShiftMux = 1'b0;
  22545. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .BypassEn = 1'b0;
  22546. defparam \macro_inst|apb_dac0_inst|sine_rom~133 .CarryEnb = 1'b1;
  22547. alta_slice \macro_inst|apb_dac0_inst|sine_rom~134 (
  22548. .A(\macro_inst|apb_dac0_inst|sine_rom~129_combout ),
  22549. .B(\macro_inst|apb_dac0_inst|sine_rom~133_combout ),
  22550. .C(\macro_inst|apb_dac0_inst|sine_rom~132_combout ),
  22551. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22552. .Cin(),
  22553. .Qin(),
  22554. .Clk(),
  22555. .AsyncReset(),
  22556. .SyncReset(),
  22557. .ShiftData(),
  22558. .SyncLoad(),
  22559. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~134_combout ),
  22560. .Cout(),
  22561. .Q());
  22562. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .coord_x = 5;
  22563. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .coord_y = 4;
  22564. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .coord_z = 15;
  22565. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .mask = 16'h35F0;
  22566. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .modeMux = 1'b0;
  22567. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .FeedbackMux = 1'b0;
  22568. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .ShiftMux = 1'b0;
  22569. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .BypassEn = 1'b0;
  22570. defparam \macro_inst|apb_dac0_inst|sine_rom~134 .CarryEnb = 1'b1;
  22571. alta_slice \macro_inst|apb_dac0_inst|sine_rom~135 (
  22572. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  22573. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22574. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22575. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22576. .Cin(),
  22577. .Qin(),
  22578. .Clk(),
  22579. .AsyncReset(),
  22580. .SyncReset(),
  22581. .ShiftData(),
  22582. .SyncLoad(),
  22583. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~135_combout ),
  22584. .Cout(),
  22585. .Q());
  22586. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .coord_x = 10;
  22587. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .coord_y = 2;
  22588. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .coord_z = 2;
  22589. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .mask = 16'h3D8A;
  22590. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .modeMux = 1'b0;
  22591. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .FeedbackMux = 1'b0;
  22592. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .ShiftMux = 1'b0;
  22593. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .BypassEn = 1'b0;
  22594. defparam \macro_inst|apb_dac0_inst|sine_rom~135 .CarryEnb = 1'b1;
  22595. alta_slice \macro_inst|apb_dac0_inst|sine_rom~136 (
  22596. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  22597. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22598. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22599. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22600. .Cin(),
  22601. .Qin(),
  22602. .Clk(),
  22603. .AsyncReset(),
  22604. .SyncReset(),
  22605. .ShiftData(),
  22606. .SyncLoad(),
  22607. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~136_combout ),
  22608. .Cout(),
  22609. .Q());
  22610. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .coord_x = 10;
  22611. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .coord_y = 2;
  22612. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .coord_z = 1;
  22613. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .mask = 16'hAA54;
  22614. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .modeMux = 1'b0;
  22615. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .FeedbackMux = 1'b0;
  22616. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .ShiftMux = 1'b0;
  22617. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .BypassEn = 1'b0;
  22618. defparam \macro_inst|apb_dac0_inst|sine_rom~136 .CarryEnb = 1'b1;
  22619. alta_slice \macro_inst|apb_dac0_inst|sine_rom~137 (
  22620. .A(\macro_inst|apb_dac0_inst|sine_rom~135_combout ),
  22621. .B(\macro_inst|apb_dac0_inst|sine_rom~136_combout ),
  22622. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22623. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  22624. .Cin(),
  22625. .Qin(),
  22626. .Clk(),
  22627. .AsyncReset(),
  22628. .SyncReset(),
  22629. .ShiftData(),
  22630. .SyncLoad(),
  22631. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~137_combout ),
  22632. .Cout(),
  22633. .Q());
  22634. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .coord_x = 10;
  22635. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .coord_y = 2;
  22636. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .coord_z = 11;
  22637. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .mask = 16'h00AC;
  22638. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .modeMux = 1'b0;
  22639. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .FeedbackMux = 1'b0;
  22640. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .ShiftMux = 1'b0;
  22641. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .BypassEn = 1'b0;
  22642. defparam \macro_inst|apb_dac0_inst|sine_rom~137 .CarryEnb = 1'b1;
  22643. alta_slice \macro_inst|apb_dac0_inst|sine_rom~138 (
  22644. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  22645. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22646. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  22647. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22648. .Cin(),
  22649. .Qin(),
  22650. .Clk(),
  22651. .AsyncReset(),
  22652. .SyncReset(),
  22653. .ShiftData(),
  22654. .SyncLoad(),
  22655. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~138_combout ),
  22656. .Cout(),
  22657. .Q());
  22658. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .coord_x = 10;
  22659. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .coord_y = 2;
  22660. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .coord_z = 9;
  22661. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .mask = 16'h2FD0;
  22662. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .modeMux = 1'b0;
  22663. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .FeedbackMux = 1'b0;
  22664. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .ShiftMux = 1'b0;
  22665. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .BypassEn = 1'b0;
  22666. defparam \macro_inst|apb_dac0_inst|sine_rom~138 .CarryEnb = 1'b1;
  22667. alta_slice \macro_inst|apb_dac0_inst|sine_rom~139 (
  22668. .A(\macro_inst|apb_dac0_inst|sine_rom~137_combout ),
  22669. .B(\macro_inst|apb_dac0_inst|sine_rom~138_combout ),
  22670. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22671. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  22672. .Cin(),
  22673. .Qin(),
  22674. .Clk(),
  22675. .AsyncReset(),
  22676. .SyncReset(),
  22677. .ShiftData(),
  22678. .SyncLoad(),
  22679. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~139_combout ),
  22680. .Cout(),
  22681. .Q());
  22682. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .coord_x = 10;
  22683. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .coord_y = 2;
  22684. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .coord_z = 10;
  22685. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .mask = 16'hBAAA;
  22686. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .modeMux = 1'b0;
  22687. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .FeedbackMux = 1'b0;
  22688. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .ShiftMux = 1'b0;
  22689. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .BypassEn = 1'b0;
  22690. defparam \macro_inst|apb_dac0_inst|sine_rom~139 .CarryEnb = 1'b1;
  22691. alta_slice \macro_inst|apb_dac0_inst|sine_rom~14 (
  22692. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22693. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  22694. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  22695. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  22696. .Cin(),
  22697. .Qin(),
  22698. .Clk(),
  22699. .AsyncReset(),
  22700. .SyncReset(),
  22701. .ShiftData(),
  22702. .SyncLoad(),
  22703. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~14_combout ),
  22704. .Cout(),
  22705. .Q());
  22706. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .coord_x = 10;
  22707. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .coord_y = 1;
  22708. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .coord_z = 7;
  22709. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .mask = 16'h1FFC;
  22710. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .modeMux = 1'b0;
  22711. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .FeedbackMux = 1'b0;
  22712. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .ShiftMux = 1'b0;
  22713. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .BypassEn = 1'b0;
  22714. defparam \macro_inst|apb_dac0_inst|sine_rom~14 .CarryEnb = 1'b1;
  22715. alta_slice \macro_inst|apb_dac0_inst|sine_rom~140 (
  22716. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22717. .B(\macro_inst|apb_dac0_inst|sine_rom~139_combout ),
  22718. .C(\macro_inst|apb_dac0_inst|sine_rom~134_combout ),
  22719. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  22720. .Cin(),
  22721. .Qin(),
  22722. .Clk(),
  22723. .AsyncReset(),
  22724. .SyncReset(),
  22725. .ShiftData(),
  22726. .SyncLoad(),
  22727. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~140_combout ),
  22728. .Cout(),
  22729. .Q());
  22730. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .coord_x = 5;
  22731. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .coord_y = 2;
  22732. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .coord_z = 3;
  22733. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .mask = 16'hAF44;
  22734. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .modeMux = 1'b0;
  22735. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .FeedbackMux = 1'b0;
  22736. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .ShiftMux = 1'b0;
  22737. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .BypassEn = 1'b0;
  22738. defparam \macro_inst|apb_dac0_inst|sine_rom~140 .CarryEnb = 1'b1;
  22739. alta_slice \macro_inst|apb_dac0_inst|sine_rom~141 (
  22740. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  22741. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  22742. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22743. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22744. .Cin(),
  22745. .Qin(),
  22746. .Clk(),
  22747. .AsyncReset(),
  22748. .SyncReset(),
  22749. .ShiftData(),
  22750. .SyncLoad(),
  22751. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~141_combout ),
  22752. .Cout(),
  22753. .Q());
  22754. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .coord_x = 5;
  22755. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .coord_y = 2;
  22756. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .coord_z = 8;
  22757. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .mask = 16'hC206;
  22758. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .modeMux = 1'b0;
  22759. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .FeedbackMux = 1'b0;
  22760. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .ShiftMux = 1'b0;
  22761. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .BypassEn = 1'b0;
  22762. defparam \macro_inst|apb_dac0_inst|sine_rom~141 .CarryEnb = 1'b1;
  22763. alta_slice \macro_inst|apb_dac0_inst|sine_rom~142 (
  22764. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  22765. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  22766. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22767. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22768. .Cin(),
  22769. .Qin(),
  22770. .Clk(),
  22771. .AsyncReset(),
  22772. .SyncReset(),
  22773. .ShiftData(),
  22774. .SyncLoad(),
  22775. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~142_combout ),
  22776. .Cout(),
  22777. .Q());
  22778. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .coord_x = 5;
  22779. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .coord_y = 2;
  22780. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .coord_z = 15;
  22781. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .mask = 16'hE0C2;
  22782. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .modeMux = 1'b0;
  22783. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .FeedbackMux = 1'b0;
  22784. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .ShiftMux = 1'b0;
  22785. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .BypassEn = 1'b0;
  22786. defparam \macro_inst|apb_dac0_inst|sine_rom~142 .CarryEnb = 1'b1;
  22787. alta_slice \macro_inst|apb_dac0_inst|sine_rom~143 (
  22788. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22789. .B(\macro_inst|apb_dac0_inst|sine_rom~142_combout ),
  22790. .C(\macro_inst|apb_dac0_inst|sine_rom~141_combout ),
  22791. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22792. .Cin(),
  22793. .Qin(),
  22794. .Clk(),
  22795. .AsyncReset(),
  22796. .SyncReset(),
  22797. .ShiftData(),
  22798. .SyncLoad(),
  22799. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~143_combout ),
  22800. .Cout(),
  22801. .Q());
  22802. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .coord_x = 5;
  22803. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .coord_y = 2;
  22804. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .coord_z = 4;
  22805. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .mask = 16'hCC0A;
  22806. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .modeMux = 1'b0;
  22807. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .FeedbackMux = 1'b0;
  22808. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .ShiftMux = 1'b0;
  22809. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .BypassEn = 1'b0;
  22810. defparam \macro_inst|apb_dac0_inst|sine_rom~143 .CarryEnb = 1'b1;
  22811. alta_slice \macro_inst|apb_dac0_inst|sine_rom~144 (
  22812. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22813. .B(\macro_inst|apb_dac0_inst|sine_rom~142_combout ),
  22814. .C(\macro_inst|apb_dac0_inst|sine_rom~141_combout ),
  22815. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  22816. .Cin(),
  22817. .Qin(),
  22818. .Clk(),
  22819. .AsyncReset(),
  22820. .SyncReset(),
  22821. .ShiftData(),
  22822. .SyncLoad(),
  22823. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~144_combout ),
  22824. .Cout(),
  22825. .Q());
  22826. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .coord_x = 5;
  22827. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .coord_y = 2;
  22828. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .coord_z = 9;
  22829. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .mask = 16'h068C;
  22830. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .modeMux = 1'b0;
  22831. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .FeedbackMux = 1'b0;
  22832. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .ShiftMux = 1'b0;
  22833. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .BypassEn = 1'b0;
  22834. defparam \macro_inst|apb_dac0_inst|sine_rom~144 .CarryEnb = 1'b1;
  22835. alta_slice \macro_inst|apb_dac0_inst|sine_rom~145 (
  22836. .A(vcc),
  22837. .B(\macro_inst|apb_dac0_inst|sine_rom~144_combout ),
  22838. .C(\macro_inst|apb_dac0_inst|sine_rom~143_combout ),
  22839. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22840. .Cin(),
  22841. .Qin(),
  22842. .Clk(),
  22843. .AsyncReset(),
  22844. .SyncReset(),
  22845. .ShiftData(),
  22846. .SyncLoad(),
  22847. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~145_combout ),
  22848. .Cout(),
  22849. .Q());
  22850. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .coord_x = 5;
  22851. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .coord_y = 2;
  22852. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .coord_z = 14;
  22853. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .mask = 16'h3C33;
  22854. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .modeMux = 1'b0;
  22855. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .FeedbackMux = 1'b0;
  22856. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .ShiftMux = 1'b0;
  22857. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .BypassEn = 1'b0;
  22858. defparam \macro_inst|apb_dac0_inst|sine_rom~145 .CarryEnb = 1'b1;
  22859. alta_slice \macro_inst|apb_dac0_inst|sine_rom~146 (
  22860. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22861. .B(\macro_inst|apb_dac0_inst|sine_rom~140_combout ),
  22862. .C(\macro_inst|apb_dac0_inst|sine_rom~145_combout ),
  22863. .D(\macro_inst|apb_dac0_inst|sine_rom~128_combout ),
  22864. .Cin(),
  22865. .Qin(),
  22866. .Clk(),
  22867. .AsyncReset(),
  22868. .SyncReset(),
  22869. .ShiftData(),
  22870. .SyncLoad(),
  22871. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~146_combout ),
  22872. .Cout(),
  22873. .Q());
  22874. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .coord_x = 5;
  22875. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .coord_y = 2;
  22876. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .coord_z = 12;
  22877. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .mask = 16'h4C6E;
  22878. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .modeMux = 1'b0;
  22879. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .FeedbackMux = 1'b0;
  22880. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .ShiftMux = 1'b0;
  22881. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .BypassEn = 1'b0;
  22882. defparam \macro_inst|apb_dac0_inst|sine_rom~146 .CarryEnb = 1'b1;
  22883. alta_slice \macro_inst|apb_dac0_inst|sine_rom~147 (
  22884. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  22885. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  22886. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22887. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  22888. .Cin(),
  22889. .Qin(),
  22890. .Clk(),
  22891. .AsyncReset(),
  22892. .SyncReset(),
  22893. .ShiftData(),
  22894. .SyncLoad(),
  22895. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~147_combout ),
  22896. .Cout(),
  22897. .Q());
  22898. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .coord_x = 5;
  22899. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .coord_y = 2;
  22900. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .coord_z = 6;
  22901. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .mask = 16'h0B0E;
  22902. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .modeMux = 1'b0;
  22903. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .FeedbackMux = 1'b0;
  22904. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .ShiftMux = 1'b0;
  22905. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .BypassEn = 1'b0;
  22906. defparam \macro_inst|apb_dac0_inst|sine_rom~147 .CarryEnb = 1'b1;
  22907. alta_slice \macro_inst|apb_dac0_inst|sine_rom~148 (
  22908. .A(\macro_inst|apb_dac0_inst|sine_rom~135_combout ),
  22909. .B(\macro_inst|apb_dac0_inst|sine_rom~138_combout ),
  22910. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  22911. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  22912. .Cin(),
  22913. .Qin(),
  22914. .Clk(),
  22915. .AsyncReset(),
  22916. .SyncReset(),
  22917. .ShiftData(),
  22918. .SyncLoad(),
  22919. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~148_combout ),
  22920. .Cout(),
  22921. .Q());
  22922. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .coord_x = 10;
  22923. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .coord_y = 2;
  22924. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .coord_z = 8;
  22925. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .mask = 16'hCC50;
  22926. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .modeMux = 1'b0;
  22927. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .FeedbackMux = 1'b0;
  22928. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .ShiftMux = 1'b0;
  22929. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .BypassEn = 1'b0;
  22930. defparam \macro_inst|apb_dac0_inst|sine_rom~148 .CarryEnb = 1'b1;
  22931. alta_slice \macro_inst|apb_dac0_inst|sine_rom~149 (
  22932. .A(vcc),
  22933. .B(vcc),
  22934. .C(\macro_inst|apb_dac0_inst|sine_rom~147_combout ),
  22935. .D(\macro_inst|apb_dac0_inst|sine_rom~148_combout ),
  22936. .Cin(),
  22937. .Qin(),
  22938. .Clk(),
  22939. .AsyncReset(),
  22940. .SyncReset(),
  22941. .ShiftData(),
  22942. .SyncLoad(),
  22943. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~149_combout ),
  22944. .Cout(),
  22945. .Q());
  22946. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .coord_x = 5;
  22947. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .coord_y = 2;
  22948. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .coord_z = 1;
  22949. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .mask = 16'hFFF0;
  22950. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .modeMux = 1'b0;
  22951. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .FeedbackMux = 1'b0;
  22952. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .ShiftMux = 1'b0;
  22953. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .BypassEn = 1'b0;
  22954. defparam \macro_inst|apb_dac0_inst|sine_rom~149 .CarryEnb = 1'b1;
  22955. alta_slice \macro_inst|apb_dac0_inst|sine_rom~15 (
  22956. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  22957. .B(\macro_inst|apb_dac0_inst|sine_rom~14_combout ),
  22958. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  22959. .D(\macro_inst|apb_dac0_inst|sine_rom~6_combout ),
  22960. .Cin(),
  22961. .Qin(),
  22962. .Clk(),
  22963. .AsyncReset(),
  22964. .SyncReset(),
  22965. .ShiftData(),
  22966. .SyncLoad(),
  22967. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~15_combout ),
  22968. .Cout(),
  22969. .Q());
  22970. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .coord_x = 10;
  22971. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .coord_y = 1;
  22972. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .coord_z = 3;
  22973. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .mask = 16'hF4A4;
  22974. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .modeMux = 1'b0;
  22975. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .FeedbackMux = 1'b0;
  22976. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .ShiftMux = 1'b0;
  22977. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .BypassEn = 1'b0;
  22978. defparam \macro_inst|apb_dac0_inst|sine_rom~15 .CarryEnb = 1'b1;
  22979. alta_slice \macro_inst|apb_dac0_inst|sine_rom~150 (
  22980. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  22981. .B(\macro_inst|apb_dac0_inst|sine_rom~149_combout ),
  22982. .C(\macro_inst|apb_dac0_inst|sine_rom~134_combout ),
  22983. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  22984. .Cin(),
  22985. .Qin(),
  22986. .Clk(),
  22987. .AsyncReset(),
  22988. .SyncReset(),
  22989. .ShiftData(),
  22990. .SyncLoad(),
  22991. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~150_combout ),
  22992. .Cout(),
  22993. .Q());
  22994. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .coord_x = 5;
  22995. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .coord_y = 2;
  22996. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .coord_z = 7;
  22997. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .mask = 16'hFA44;
  22998. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .modeMux = 1'b0;
  22999. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .FeedbackMux = 1'b0;
  23000. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .ShiftMux = 1'b0;
  23001. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .BypassEn = 1'b0;
  23002. defparam \macro_inst|apb_dac0_inst|sine_rom~150 .CarryEnb = 1'b1;
  23003. alta_slice \macro_inst|apb_dac0_inst|sine_rom~151 (
  23004. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  23005. .B(\macro_inst|apb_dac0_inst|sine_rom~150_combout ),
  23006. .C(\macro_inst|apb_dac0_inst|sine_rom~145_combout ),
  23007. .D(\macro_inst|apb_dac0_inst|sine_rom~128_combout ),
  23008. .Cin(),
  23009. .Qin(),
  23010. .Clk(),
  23011. .AsyncReset(),
  23012. .SyncReset(),
  23013. .ShiftData(),
  23014. .SyncLoad(),
  23015. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~151_combout ),
  23016. .Cout(),
  23017. .Q());
  23018. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .coord_x = 5;
  23019. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .coord_y = 2;
  23020. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .coord_z = 0;
  23021. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .mask = 16'hE6C4;
  23022. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .modeMux = 1'b0;
  23023. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .FeedbackMux = 1'b0;
  23024. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .ShiftMux = 1'b0;
  23025. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .BypassEn = 1'b0;
  23026. defparam \macro_inst|apb_dac0_inst|sine_rom~151 .CarryEnb = 1'b1;
  23027. alta_slice \macro_inst|apb_dac0_inst|sine_rom~152 (
  23028. .A(\macro_inst|apb_dac0_inst|sine_rom~146_combout ),
  23029. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  23030. .C(\macro_inst|apb_dac0_inst|sine_rom~151_combout ),
  23031. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  23032. .Cin(),
  23033. .Qin(),
  23034. .Clk(),
  23035. .AsyncReset(),
  23036. .SyncReset(),
  23037. .ShiftData(),
  23038. .SyncLoad(),
  23039. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~152_combout ),
  23040. .Cout(),
  23041. .Q());
  23042. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .coord_x = 9;
  23043. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .coord_y = 2;
  23044. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .coord_z = 8;
  23045. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .mask = 16'h2230;
  23046. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .modeMux = 1'b0;
  23047. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .FeedbackMux = 1'b0;
  23048. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .ShiftMux = 1'b0;
  23049. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .BypassEn = 1'b0;
  23050. defparam \macro_inst|apb_dac0_inst|sine_rom~152 .CarryEnb = 1'b1;
  23051. alta_slice \macro_inst|apb_dac0_inst|sine_rom~153 (
  23052. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23053. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23054. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23055. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23056. .Cin(),
  23057. .Qin(),
  23058. .Clk(),
  23059. .AsyncReset(),
  23060. .SyncReset(),
  23061. .ShiftData(),
  23062. .SyncLoad(),
  23063. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~153_combout ),
  23064. .Cout(),
  23065. .Q());
  23066. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .coord_x = 20;
  23067. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .coord_y = 1;
  23068. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .coord_z = 0;
  23069. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .mask = 16'hC5C2;
  23070. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .modeMux = 1'b0;
  23071. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .FeedbackMux = 1'b0;
  23072. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .ShiftMux = 1'b0;
  23073. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .BypassEn = 1'b0;
  23074. defparam \macro_inst|apb_dac0_inst|sine_rom~153 .CarryEnb = 1'b1;
  23075. alta_slice \macro_inst|apb_dac0_inst|sine_rom~154 (
  23076. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23077. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23078. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23079. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23080. .Cin(),
  23081. .Qin(),
  23082. .Clk(),
  23083. .AsyncReset(),
  23084. .SyncReset(),
  23085. .ShiftData(),
  23086. .SyncLoad(),
  23087. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~154_combout ),
  23088. .Cout(),
  23089. .Q());
  23090. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .coord_x = 20;
  23091. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .coord_y = 1;
  23092. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .coord_z = 1;
  23093. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .mask = 16'hCCBE;
  23094. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .modeMux = 1'b0;
  23095. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .FeedbackMux = 1'b0;
  23096. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .ShiftMux = 1'b0;
  23097. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .BypassEn = 1'b0;
  23098. defparam \macro_inst|apb_dac0_inst|sine_rom~154 .CarryEnb = 1'b1;
  23099. alta_slice \macro_inst|apb_dac0_inst|sine_rom~155 (
  23100. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23101. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23102. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23103. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23104. .Cin(),
  23105. .Qin(),
  23106. .Clk(),
  23107. .AsyncReset(),
  23108. .SyncReset(),
  23109. .ShiftData(),
  23110. .SyncLoad(),
  23111. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~155_combout ),
  23112. .Cout(),
  23113. .Q());
  23114. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .coord_x = 20;
  23115. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .coord_y = 1;
  23116. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .coord_z = 14;
  23117. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .mask = 16'hC898;
  23118. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .modeMux = 1'b0;
  23119. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .FeedbackMux = 1'b0;
  23120. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .ShiftMux = 1'b0;
  23121. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .BypassEn = 1'b0;
  23122. defparam \macro_inst|apb_dac0_inst|sine_rom~155 .CarryEnb = 1'b1;
  23123. alta_slice \macro_inst|apb_dac0_inst|sine_rom~156 (
  23124. .A(\macro_inst|apb_dac0_inst|sine_rom~155_combout ),
  23125. .B(\macro_inst|apb_dac0_inst|sine_rom~154_combout ),
  23126. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  23127. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  23128. .Cin(),
  23129. .Qin(),
  23130. .Clk(),
  23131. .AsyncReset(),
  23132. .SyncReset(),
  23133. .ShiftData(),
  23134. .SyncLoad(),
  23135. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~156_combout ),
  23136. .Cout(),
  23137. .Q());
  23138. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .coord_x = 20;
  23139. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .coord_y = 1;
  23140. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .coord_z = 11;
  23141. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .mask = 16'hF305;
  23142. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .modeMux = 1'b0;
  23143. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .FeedbackMux = 1'b0;
  23144. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .ShiftMux = 1'b0;
  23145. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .BypassEn = 1'b0;
  23146. defparam \macro_inst|apb_dac0_inst|sine_rom~156 .CarryEnb = 1'b1;
  23147. alta_slice \macro_inst|apb_dac0_inst|sine_rom~157 (
  23148. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23149. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23150. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23151. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23152. .Cin(),
  23153. .Qin(),
  23154. .Clk(),
  23155. .AsyncReset(),
  23156. .SyncReset(),
  23157. .ShiftData(),
  23158. .SyncLoad(),
  23159. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~157_combout ),
  23160. .Cout(),
  23161. .Q());
  23162. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .coord_x = 20;
  23163. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .coord_y = 1;
  23164. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .coord_z = 7;
  23165. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .mask = 16'hF7FE;
  23166. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .modeMux = 1'b0;
  23167. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .FeedbackMux = 1'b0;
  23168. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .ShiftMux = 1'b0;
  23169. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .BypassEn = 1'b0;
  23170. defparam \macro_inst|apb_dac0_inst|sine_rom~157 .CarryEnb = 1'b1;
  23171. alta_slice \macro_inst|apb_dac0_inst|sine_rom~158 (
  23172. .A(\macro_inst|apb_dac0_inst|sine_rom~153_combout ),
  23173. .B(\macro_inst|apb_dac0_inst|sine_rom~156_combout ),
  23174. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  23175. .D(\macro_inst|apb_dac0_inst|sine_rom~157_combout ),
  23176. .Cin(),
  23177. .Qin(),
  23178. .Clk(),
  23179. .AsyncReset(),
  23180. .SyncReset(),
  23181. .ShiftData(),
  23182. .SyncLoad(),
  23183. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~158_combout ),
  23184. .Cout(),
  23185. .Q());
  23186. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .coord_x = 20;
  23187. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .coord_y = 1;
  23188. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .coord_z = 12;
  23189. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .mask = 16'h2CEC;
  23190. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .modeMux = 1'b0;
  23191. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .FeedbackMux = 1'b0;
  23192. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .ShiftMux = 1'b0;
  23193. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .BypassEn = 1'b0;
  23194. defparam \macro_inst|apb_dac0_inst|sine_rom~158 .CarryEnb = 1'b1;
  23195. alta_slice \macro_inst|apb_dac0_inst|sine_rom~159 (
  23196. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  23197. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  23198. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23199. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23200. .Cin(),
  23201. .Qin(),
  23202. .Clk(),
  23203. .AsyncReset(),
  23204. .SyncReset(),
  23205. .ShiftData(),
  23206. .SyncLoad(),
  23207. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~159_combout ),
  23208. .Cout(),
  23209. .Q());
  23210. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .coord_x = 10;
  23211. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .coord_y = 2;
  23212. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .coord_z = 14;
  23213. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .mask = 16'h2112;
  23214. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .modeMux = 1'b0;
  23215. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .FeedbackMux = 1'b0;
  23216. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .ShiftMux = 1'b0;
  23217. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .BypassEn = 1'b0;
  23218. defparam \macro_inst|apb_dac0_inst|sine_rom~159 .CarryEnb = 1'b1;
  23219. alta_slice \macro_inst|apb_dac0_inst|sine_rom~16 (
  23220. .A(\macro_inst|apb_dac0_inst|sine_rom~13_combout ),
  23221. .B(\macro_inst|apb_dac0_inst|sine_rom~15_combout ),
  23222. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  23223. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  23224. .Cin(),
  23225. .Qin(),
  23226. .Clk(),
  23227. .AsyncReset(),
  23228. .SyncReset(),
  23229. .ShiftData(),
  23230. .SyncLoad(),
  23231. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~16_combout ),
  23232. .Cout(),
  23233. .Q());
  23234. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .coord_x = 10;
  23235. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .coord_y = 1;
  23236. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .coord_z = 12;
  23237. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .mask = 16'h2CEC;
  23238. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .modeMux = 1'b0;
  23239. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .FeedbackMux = 1'b0;
  23240. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .ShiftMux = 1'b0;
  23241. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .BypassEn = 1'b0;
  23242. defparam \macro_inst|apb_dac0_inst|sine_rom~16 .CarryEnb = 1'b1;
  23243. alta_slice \macro_inst|apb_dac0_inst|sine_rom~160 (
  23244. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23245. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  23246. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23247. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  23248. .Cin(),
  23249. .Qin(),
  23250. .Clk(),
  23251. .AsyncReset(),
  23252. .SyncReset(),
  23253. .ShiftData(),
  23254. .SyncLoad(),
  23255. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~160_combout ),
  23256. .Cout(),
  23257. .Q());
  23258. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .coord_x = 8;
  23259. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .coord_y = 3;
  23260. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .coord_z = 2;
  23261. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .mask = 16'h254E;
  23262. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .modeMux = 1'b0;
  23263. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .FeedbackMux = 1'b0;
  23264. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .ShiftMux = 1'b0;
  23265. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .BypassEn = 1'b0;
  23266. defparam \macro_inst|apb_dac0_inst|sine_rom~160 .CarryEnb = 1'b1;
  23267. alta_slice \macro_inst|apb_dac0_inst|sine_rom~161 (
  23268. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23269. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  23270. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23271. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  23272. .Cin(),
  23273. .Qin(),
  23274. .Clk(),
  23275. .AsyncReset(),
  23276. .SyncReset(),
  23277. .ShiftData(),
  23278. .SyncLoad(),
  23279. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~161_combout ),
  23280. .Cout(),
  23281. .Q());
  23282. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .coord_x = 8;
  23283. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .coord_y = 3;
  23284. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .coord_z = 9;
  23285. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .mask = 16'h048E;
  23286. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .modeMux = 1'b0;
  23287. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .FeedbackMux = 1'b0;
  23288. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .ShiftMux = 1'b0;
  23289. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .BypassEn = 1'b0;
  23290. defparam \macro_inst|apb_dac0_inst|sine_rom~161 .CarryEnb = 1'b1;
  23291. alta_slice \macro_inst|apb_dac0_inst|sine_rom~162 (
  23292. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23293. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23294. .C(\macro_inst|apb_dac0_inst|sine_rom~160_combout ),
  23295. .D(\macro_inst|apb_dac0_inst|sine_rom~161_combout ),
  23296. .Cin(),
  23297. .Qin(),
  23298. .Clk(),
  23299. .AsyncReset(),
  23300. .SyncReset(),
  23301. .ShiftData(),
  23302. .SyncLoad(),
  23303. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~162_combout ),
  23304. .Cout(),
  23305. .Q());
  23306. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .coord_x = 8;
  23307. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .coord_y = 3;
  23308. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .coord_z = 4;
  23309. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .mask = 16'hC8D9;
  23310. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .modeMux = 1'b0;
  23311. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .FeedbackMux = 1'b0;
  23312. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .ShiftMux = 1'b0;
  23313. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .BypassEn = 1'b0;
  23314. defparam \macro_inst|apb_dac0_inst|sine_rom~162 .CarryEnb = 1'b1;
  23315. alta_slice \macro_inst|apb_dac0_inst|sine_rom~163 (
  23316. .A(vcc),
  23317. .B(vcc),
  23318. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23319. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  23320. .Cin(),
  23321. .Qin(),
  23322. .Clk(),
  23323. .AsyncReset(),
  23324. .SyncReset(),
  23325. .ShiftData(),
  23326. .SyncLoad(),
  23327. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~163_combout ),
  23328. .Cout(),
  23329. .Q());
  23330. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .coord_x = 17;
  23331. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .coord_y = 1;
  23332. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .coord_z = 10;
  23333. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .mask = 16'h0F00;
  23334. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .modeMux = 1'b0;
  23335. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .FeedbackMux = 1'b0;
  23336. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .ShiftMux = 1'b0;
  23337. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .BypassEn = 1'b0;
  23338. defparam \macro_inst|apb_dac0_inst|sine_rom~163 .CarryEnb = 1'b1;
  23339. alta_slice \macro_inst|apb_dac0_inst|sine_rom~164 (
  23340. .A(\macro_inst|apb_dac0_inst|sine_rom~159_combout ),
  23341. .B(\macro_inst|apb_dac0_inst|sine_rom~162_combout ),
  23342. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  23343. .D(\macro_inst|apb_dac0_inst|sine_rom~163_combout ),
  23344. .Cin(),
  23345. .Qin(),
  23346. .Clk(),
  23347. .AsyncReset(),
  23348. .SyncReset(),
  23349. .ShiftData(),
  23350. .SyncLoad(),
  23351. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~164_combout ),
  23352. .Cout(),
  23353. .Q());
  23354. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .coord_x = 10;
  23355. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .coord_y = 2;
  23356. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .coord_z = 4;
  23357. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .mask = 16'h1CDC;
  23358. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .modeMux = 1'b0;
  23359. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .FeedbackMux = 1'b0;
  23360. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .ShiftMux = 1'b0;
  23361. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .BypassEn = 1'b0;
  23362. defparam \macro_inst|apb_dac0_inst|sine_rom~164 .CarryEnb = 1'b1;
  23363. alta_slice \macro_inst|apb_dac0_inst|sine_rom~165 (
  23364. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23365. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23366. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23367. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23368. .Cin(),
  23369. .Qin(),
  23370. .Clk(),
  23371. .AsyncReset(),
  23372. .SyncReset(),
  23373. .ShiftData(),
  23374. .SyncLoad(),
  23375. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~165_combout ),
  23376. .Cout(),
  23377. .Q());
  23378. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .coord_x = 10;
  23379. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .coord_y = 2;
  23380. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .coord_z = 3;
  23381. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .mask = 16'h5416;
  23382. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .modeMux = 1'b0;
  23383. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .FeedbackMux = 1'b0;
  23384. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .ShiftMux = 1'b0;
  23385. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .BypassEn = 1'b0;
  23386. defparam \macro_inst|apb_dac0_inst|sine_rom~165 .CarryEnb = 1'b1;
  23387. alta_slice \macro_inst|apb_dac0_inst|sine_rom~166 (
  23388. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23389. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23390. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23391. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23392. .Cin(),
  23393. .Qin(),
  23394. .Clk(),
  23395. .AsyncReset(),
  23396. .SyncReset(),
  23397. .ShiftData(),
  23398. .SyncLoad(),
  23399. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~166_combout ),
  23400. .Cout(),
  23401. .Q());
  23402. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .coord_x = 10;
  23403. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .coord_y = 2;
  23404. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .coord_z = 7;
  23405. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .mask = 16'h4432;
  23406. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .modeMux = 1'b0;
  23407. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .FeedbackMux = 1'b0;
  23408. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .ShiftMux = 1'b0;
  23409. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .BypassEn = 1'b0;
  23410. defparam \macro_inst|apb_dac0_inst|sine_rom~166 .CarryEnb = 1'b1;
  23411. alta_slice \macro_inst|apb_dac0_inst|sine_rom~167 (
  23412. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23413. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23414. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23415. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23416. .Cin(),
  23417. .Qin(),
  23418. .Clk(),
  23419. .AsyncReset(),
  23420. .SyncReset(),
  23421. .ShiftData(),
  23422. .SyncLoad(),
  23423. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~167_combout ),
  23424. .Cout(),
  23425. .Q());
  23426. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .coord_x = 10;
  23427. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .coord_y = 2;
  23428. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .coord_z = 6;
  23429. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .mask = 16'hAE82;
  23430. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .modeMux = 1'b0;
  23431. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .FeedbackMux = 1'b0;
  23432. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .ShiftMux = 1'b0;
  23433. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .BypassEn = 1'b0;
  23434. defparam \macro_inst|apb_dac0_inst|sine_rom~167 .CarryEnb = 1'b1;
  23435. alta_slice \macro_inst|apb_dac0_inst|sine_rom~168 (
  23436. .A(\macro_inst|apb_dac0_inst|sine_rom~167_combout ),
  23437. .B(\macro_inst|apb_dac0_inst|sine_rom~166_combout ),
  23438. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  23439. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  23440. .Cin(),
  23441. .Qin(),
  23442. .Clk(),
  23443. .AsyncReset(),
  23444. .SyncReset(),
  23445. .ShiftData(),
  23446. .SyncLoad(),
  23447. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~168_combout ),
  23448. .Cout(),
  23449. .Q());
  23450. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .coord_x = 10;
  23451. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .coord_y = 2;
  23452. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .coord_z = 12;
  23453. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .mask = 16'hF0C5;
  23454. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .modeMux = 1'b0;
  23455. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .FeedbackMux = 1'b0;
  23456. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .ShiftMux = 1'b0;
  23457. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .BypassEn = 1'b0;
  23458. defparam \macro_inst|apb_dac0_inst|sine_rom~168 .CarryEnb = 1'b1;
  23459. alta_slice \macro_inst|apb_dac0_inst|sine_rom~169 (
  23460. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23461. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23462. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23463. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  23464. .Cin(),
  23465. .Qin(),
  23466. .Clk(),
  23467. .AsyncReset(),
  23468. .SyncReset(),
  23469. .ShiftData(),
  23470. .SyncLoad(),
  23471. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~169_combout ),
  23472. .Cout(),
  23473. .Q());
  23474. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .coord_x = 10;
  23475. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .coord_y = 2;
  23476. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .coord_z = 5;
  23477. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .mask = 16'h677A;
  23478. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .modeMux = 1'b0;
  23479. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .FeedbackMux = 1'b0;
  23480. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .ShiftMux = 1'b0;
  23481. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .BypassEn = 1'b0;
  23482. defparam \macro_inst|apb_dac0_inst|sine_rom~169 .CarryEnb = 1'b1;
  23483. alta_slice \macro_inst|apb_dac0_inst|sine_rom~17 (
  23484. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  23485. .B(\macro_inst|apb_dac0_inst|sine_rom~16_combout ),
  23486. .C(\macro_inst|apb_dac0_inst|sine_rom~12_combout ),
  23487. .D(\macro_inst|apb_dac0_inst|sine_rom~7_combout ),
  23488. .Cin(),
  23489. .Qin(),
  23490. .Clk(),
  23491. .AsyncReset(),
  23492. .SyncReset(),
  23493. .ShiftData(),
  23494. .SyncLoad(),
  23495. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~17_combout ),
  23496. .Cout(),
  23497. .Q());
  23498. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .coord_x = 9;
  23499. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .coord_y = 2;
  23500. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .coord_z = 12;
  23501. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .mask = 16'hDAD0;
  23502. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .modeMux = 1'b0;
  23503. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .FeedbackMux = 1'b0;
  23504. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .ShiftMux = 1'b0;
  23505. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .BypassEn = 1'b0;
  23506. defparam \macro_inst|apb_dac0_inst|sine_rom~17 .CarryEnb = 1'b1;
  23507. alta_slice \macro_inst|apb_dac0_inst|sine_rom~170 (
  23508. .A(\macro_inst|apb_dac0_inst|sine_rom~168_combout ),
  23509. .B(\macro_inst|apb_dac0_inst|sine_rom~165_combout ),
  23510. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  23511. .D(\macro_inst|apb_dac0_inst|sine_rom~169_combout ),
  23512. .Cin(),
  23513. .Qin(),
  23514. .Clk(),
  23515. .AsyncReset(),
  23516. .SyncReset(),
  23517. .ShiftData(),
  23518. .SyncLoad(),
  23519. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~170_combout ),
  23520. .Cout(),
  23521. .Q());
  23522. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .coord_x = 10;
  23523. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .coord_y = 2;
  23524. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .coord_z = 13;
  23525. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .mask = 16'hBA1A;
  23526. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .modeMux = 1'b0;
  23527. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .FeedbackMux = 1'b0;
  23528. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .ShiftMux = 1'b0;
  23529. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .BypassEn = 1'b0;
  23530. defparam \macro_inst|apb_dac0_inst|sine_rom~170 .CarryEnb = 1'b1;
  23531. alta_slice \macro_inst|apb_dac0_inst|sine_rom~171 (
  23532. .A(\macro_inst|apb_dac0_inst|sine_rom~164_combout ),
  23533. .B(\macro_inst|apb_dac0_inst|sine_rom~170_combout ),
  23534. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  23535. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23536. .Cin(),
  23537. .Qin(),
  23538. .Clk(),
  23539. .AsyncReset(),
  23540. .SyncReset(),
  23541. .ShiftData(),
  23542. .SyncLoad(),
  23543. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~171_combout ),
  23544. .Cout(),
  23545. .Q());
  23546. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .coord_x = 10;
  23547. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .coord_y = 2;
  23548. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .coord_z = 15;
  23549. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .mask = 16'hFA0C;
  23550. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .modeMux = 1'b0;
  23551. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .FeedbackMux = 1'b0;
  23552. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .ShiftMux = 1'b0;
  23553. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .BypassEn = 1'b0;
  23554. defparam \macro_inst|apb_dac0_inst|sine_rom~171 .CarryEnb = 1'b1;
  23555. alta_slice \macro_inst|apb_dac0_inst|sine_rom~172 (
  23556. .A(vcc),
  23557. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23558. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  23559. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  23560. .Cin(),
  23561. .Qin(),
  23562. .Clk(),
  23563. .AsyncReset(),
  23564. .SyncReset(),
  23565. .ShiftData(),
  23566. .SyncLoad(),
  23567. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~172_combout ),
  23568. .Cout(),
  23569. .Q());
  23570. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .coord_x = 8;
  23571. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .coord_y = 3;
  23572. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .coord_z = 13;
  23573. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .mask = 16'hFC3F;
  23574. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .modeMux = 1'b0;
  23575. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .FeedbackMux = 1'b0;
  23576. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .ShiftMux = 1'b0;
  23577. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .BypassEn = 1'b0;
  23578. defparam \macro_inst|apb_dac0_inst|sine_rom~172 .CarryEnb = 1'b1;
  23579. alta_slice \macro_inst|apb_dac0_inst|sine_rom~173 (
  23580. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23581. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23582. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23583. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  23584. .Cin(),
  23585. .Qin(),
  23586. .Clk(),
  23587. .AsyncReset(),
  23588. .SyncReset(),
  23589. .ShiftData(),
  23590. .SyncLoad(),
  23591. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~173_combout ),
  23592. .Cout(),
  23593. .Q());
  23594. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .coord_x = 8;
  23595. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .coord_y = 3;
  23596. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .coord_z = 3;
  23597. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .mask = 16'h0534;
  23598. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .modeMux = 1'b0;
  23599. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .FeedbackMux = 1'b0;
  23600. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .ShiftMux = 1'b0;
  23601. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .BypassEn = 1'b0;
  23602. defparam \macro_inst|apb_dac0_inst|sine_rom~173 .CarryEnb = 1'b1;
  23603. alta_slice \macro_inst|apb_dac0_inst|sine_rom~174 (
  23604. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23605. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23606. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23607. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  23608. .Cin(),
  23609. .Qin(),
  23610. .Clk(),
  23611. .AsyncReset(),
  23612. .SyncReset(),
  23613. .ShiftData(),
  23614. .SyncLoad(),
  23615. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~174_combout ),
  23616. .Cout(),
  23617. .Q());
  23618. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .coord_x = 8;
  23619. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .coord_y = 3;
  23620. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .coord_z = 6;
  23621. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .mask = 16'h2522;
  23622. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .modeMux = 1'b0;
  23623. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .FeedbackMux = 1'b0;
  23624. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .ShiftMux = 1'b0;
  23625. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .BypassEn = 1'b0;
  23626. defparam \macro_inst|apb_dac0_inst|sine_rom~174 .CarryEnb = 1'b1;
  23627. alta_slice \macro_inst|apb_dac0_inst|sine_rom~175 (
  23628. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23629. .B(\macro_inst|apb_dac0_inst|sine_rom~173_combout ),
  23630. .C(\macro_inst|apb_dac0_inst|sine_rom~174_combout ),
  23631. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  23632. .Cin(),
  23633. .Qin(),
  23634. .Clk(),
  23635. .AsyncReset(),
  23636. .SyncReset(),
  23637. .ShiftData(),
  23638. .SyncLoad(),
  23639. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~175_combout ),
  23640. .Cout(),
  23641. .Q());
  23642. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .coord_x = 8;
  23643. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .coord_y = 3;
  23644. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .coord_z = 0;
  23645. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .mask = 16'hBB05;
  23646. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .modeMux = 1'b0;
  23647. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .FeedbackMux = 1'b0;
  23648. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .ShiftMux = 1'b0;
  23649. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .BypassEn = 1'b0;
  23650. defparam \macro_inst|apb_dac0_inst|sine_rom~175 .CarryEnb = 1'b1;
  23651. alta_slice \macro_inst|apb_dac0_inst|sine_rom~176 (
  23652. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  23653. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  23654. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23655. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  23656. .Cin(),
  23657. .Qin(),
  23658. .Clk(),
  23659. .AsyncReset(),
  23660. .SyncReset(),
  23661. .ShiftData(),
  23662. .SyncLoad(),
  23663. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~176_combout ),
  23664. .Cout(),
  23665. .Q());
  23666. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .coord_x = 8;
  23667. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .coord_y = 3;
  23668. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .coord_z = 7;
  23669. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .mask = 16'h22EA;
  23670. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .modeMux = 1'b0;
  23671. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .FeedbackMux = 1'b0;
  23672. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .ShiftMux = 1'b0;
  23673. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .BypassEn = 1'b0;
  23674. defparam \macro_inst|apb_dac0_inst|sine_rom~176 .CarryEnb = 1'b1;
  23675. alta_slice \macro_inst|apb_dac0_inst|sine_rom~177 (
  23676. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23677. .B(\macro_inst|apb_dac0_inst|sine_rom~172_combout ),
  23678. .C(\macro_inst|apb_dac0_inst|sine_rom~175_combout ),
  23679. .D(\macro_inst|apb_dac0_inst|sine_rom~176_combout ),
  23680. .Cin(),
  23681. .Qin(),
  23682. .Clk(),
  23683. .AsyncReset(),
  23684. .SyncReset(),
  23685. .ShiftData(),
  23686. .SyncLoad(),
  23687. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~177_combout ),
  23688. .Cout(),
  23689. .Q());
  23690. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .coord_x = 8;
  23691. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .coord_y = 3;
  23692. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .coord_z = 8;
  23693. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .mask = 16'h52F2;
  23694. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .modeMux = 1'b0;
  23695. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .FeedbackMux = 1'b0;
  23696. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .ShiftMux = 1'b0;
  23697. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .BypassEn = 1'b0;
  23698. defparam \macro_inst|apb_dac0_inst|sine_rom~177 .CarryEnb = 1'b1;
  23699. alta_slice \macro_inst|apb_dac0_inst|sine_rom~178 (
  23700. .A(\macro_inst|apb_dac0_inst|sine_rom~177_combout ),
  23701. .B(\macro_inst|apb_dac0_inst|sine_rom~158_combout ),
  23702. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  23703. .D(\macro_inst|apb_dac0_inst|sine_rom~171_combout ),
  23704. .Cin(),
  23705. .Qin(),
  23706. .Clk(),
  23707. .AsyncReset(),
  23708. .SyncReset(),
  23709. .ShiftData(),
  23710. .SyncLoad(),
  23711. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~178_combout ),
  23712. .Cout(),
  23713. .Q());
  23714. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .coord_x = 10;
  23715. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .coord_y = 2;
  23716. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .coord_z = 0;
  23717. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .mask = 16'hAFC0;
  23718. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .modeMux = 1'b0;
  23719. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .FeedbackMux = 1'b0;
  23720. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .ShiftMux = 1'b0;
  23721. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .BypassEn = 1'b0;
  23722. defparam \macro_inst|apb_dac0_inst|sine_rom~178 .CarryEnb = 1'b1;
  23723. alta_slice \macro_inst|apb_dac0_inst|sine_rom~180 (
  23724. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23725. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  23726. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  23727. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  23728. .Cin(),
  23729. .Qin(),
  23730. .Clk(),
  23731. .AsyncReset(),
  23732. .SyncReset(),
  23733. .ShiftData(),
  23734. .SyncLoad(),
  23735. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~180_combout ),
  23736. .Cout(),
  23737. .Q());
  23738. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .coord_x = 9;
  23739. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .coord_y = 2;
  23740. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .coord_z = 9;
  23741. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .mask = 16'h4148;
  23742. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .modeMux = 1'b0;
  23743. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .FeedbackMux = 1'b0;
  23744. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .ShiftMux = 1'b0;
  23745. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .BypassEn = 1'b0;
  23746. defparam \macro_inst|apb_dac0_inst|sine_rom~180 .CarryEnb = 1'b1;
  23747. alta_slice \macro_inst|apb_dac0_inst|sine_rom~181 (
  23748. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  23749. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  23750. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  23751. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  23752. .Cin(),
  23753. .Qin(),
  23754. .Clk(),
  23755. .AsyncReset(),
  23756. .SyncReset(),
  23757. .ShiftData(),
  23758. .SyncLoad(),
  23759. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~181_combout ),
  23760. .Cout(),
  23761. .Q());
  23762. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .coord_x = 9;
  23763. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .coord_y = 2;
  23764. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .coord_z = 13;
  23765. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .mask = 16'hE7A8;
  23766. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .modeMux = 1'b0;
  23767. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .FeedbackMux = 1'b0;
  23768. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .ShiftMux = 1'b0;
  23769. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .BypassEn = 1'b0;
  23770. defparam \macro_inst|apb_dac0_inst|sine_rom~181 .CarryEnb = 1'b1;
  23771. alta_slice \macro_inst|apb_dac0_inst|sine_rom~182 (
  23772. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  23773. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  23774. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  23775. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  23776. .Cin(),
  23777. .Qin(),
  23778. .Clk(),
  23779. .AsyncReset(),
  23780. .SyncReset(),
  23781. .ShiftData(),
  23782. .SyncLoad(),
  23783. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~182_combout ),
  23784. .Cout(),
  23785. .Q());
  23786. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .coord_x = 9;
  23787. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .coord_y = 2;
  23788. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .coord_z = 10;
  23789. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .mask = 16'hEFC4;
  23790. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .modeMux = 1'b0;
  23791. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .FeedbackMux = 1'b0;
  23792. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .ShiftMux = 1'b0;
  23793. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .BypassEn = 1'b0;
  23794. defparam \macro_inst|apb_dac0_inst|sine_rom~182 .CarryEnb = 1'b1;
  23795. alta_slice \macro_inst|apb_dac0_inst|sine_rom~183 (
  23796. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  23797. .B(\macro_inst|apb_dac0_inst|sine_rom~181_combout ),
  23798. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23799. .D(\macro_inst|apb_dac0_inst|sine_rom~182_combout ),
  23800. .Cin(),
  23801. .Qin(),
  23802. .Clk(),
  23803. .AsyncReset(),
  23804. .SyncReset(),
  23805. .ShiftData(),
  23806. .SyncLoad(),
  23807. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~183_combout ),
  23808. .Cout(),
  23809. .Q());
  23810. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .coord_x = 9;
  23811. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .coord_y = 2;
  23812. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .coord_z = 15;
  23813. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .mask = 16'hA7A2;
  23814. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .modeMux = 1'b0;
  23815. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .FeedbackMux = 1'b0;
  23816. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .ShiftMux = 1'b0;
  23817. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .BypassEn = 1'b0;
  23818. defparam \macro_inst|apb_dac0_inst|sine_rom~183 .CarryEnb = 1'b1;
  23819. alta_slice \macro_inst|apb_dac0_inst|sine_rom~184 (
  23820. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  23821. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  23822. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  23823. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  23824. .Cin(),
  23825. .Qin(),
  23826. .Clk(),
  23827. .AsyncReset(),
  23828. .SyncReset(),
  23829. .ShiftData(),
  23830. .SyncLoad(),
  23831. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~184_combout ),
  23832. .Cout(),
  23833. .Q());
  23834. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .coord_x = 9;
  23835. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .coord_y = 2;
  23836. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .coord_z = 3;
  23837. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .mask = 16'h6134;
  23838. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .modeMux = 1'b0;
  23839. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .FeedbackMux = 1'b0;
  23840. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .ShiftMux = 1'b0;
  23841. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .BypassEn = 1'b0;
  23842. defparam \macro_inst|apb_dac0_inst|sine_rom~184 .CarryEnb = 1'b1;
  23843. alta_slice \macro_inst|apb_dac0_inst|sine_rom~185 (
  23844. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  23845. .B(\macro_inst|apb_dac0_inst|sine_rom~184_combout ),
  23846. .C(\macro_inst|apb_dac0_inst|sine_rom~183_combout ),
  23847. .D(\macro_inst|apb_dac0_inst|sine_rom~180_combout ),
  23848. .Cin(),
  23849. .Qin(),
  23850. .Clk(),
  23851. .AsyncReset(),
  23852. .SyncReset(),
  23853. .ShiftData(),
  23854. .SyncLoad(),
  23855. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~185_combout ),
  23856. .Cout(),
  23857. .Q());
  23858. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .coord_x = 9;
  23859. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .coord_y = 2;
  23860. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .coord_z = 14;
  23861. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .mask = 16'h7A70;
  23862. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .modeMux = 1'b0;
  23863. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .FeedbackMux = 1'b0;
  23864. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .ShiftMux = 1'b0;
  23865. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .BypassEn = 1'b0;
  23866. defparam \macro_inst|apb_dac0_inst|sine_rom~185 .CarryEnb = 1'b1;
  23867. alta_slice \macro_inst|apb_dac0_inst|sine_rom~186 (
  23868. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  23869. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  23870. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23871. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23872. .Cin(),
  23873. .Qin(),
  23874. .Clk(),
  23875. .AsyncReset(),
  23876. .SyncReset(),
  23877. .ShiftData(),
  23878. .SyncLoad(),
  23879. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~186_combout ),
  23880. .Cout(),
  23881. .Q());
  23882. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .coord_x = 8;
  23883. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .coord_y = 2;
  23884. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .coord_z = 5;
  23885. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .mask = 16'hB3CC;
  23886. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .modeMux = 1'b0;
  23887. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .FeedbackMux = 1'b0;
  23888. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .ShiftMux = 1'b0;
  23889. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .BypassEn = 1'b0;
  23890. defparam \macro_inst|apb_dac0_inst|sine_rom~186 .CarryEnb = 1'b1;
  23891. alta_slice \macro_inst|apb_dac0_inst|sine_rom~187 (
  23892. .A(vcc),
  23893. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  23894. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23895. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23896. .Cin(),
  23897. .Qin(),
  23898. .Clk(),
  23899. .AsyncReset(),
  23900. .SyncReset(),
  23901. .ShiftData(),
  23902. .SyncLoad(),
  23903. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~187_combout ),
  23904. .Cout(),
  23905. .Q());
  23906. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .coord_x = 8;
  23907. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .coord_y = 2;
  23908. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .coord_z = 12;
  23909. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .mask = 16'hC3F0;
  23910. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .modeMux = 1'b0;
  23911. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .FeedbackMux = 1'b0;
  23912. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .ShiftMux = 1'b0;
  23913. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .BypassEn = 1'b0;
  23914. defparam \macro_inst|apb_dac0_inst|sine_rom~187 .CarryEnb = 1'b1;
  23915. alta_slice \macro_inst|apb_dac0_inst|sine_rom~188 (
  23916. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  23917. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  23918. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23919. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23920. .Cin(),
  23921. .Qin(),
  23922. .Clk(),
  23923. .AsyncReset(),
  23924. .SyncReset(),
  23925. .ShiftData(),
  23926. .SyncLoad(),
  23927. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~188_combout ),
  23928. .Cout(),
  23929. .Q());
  23930. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .coord_x = 8;
  23931. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .coord_y = 2;
  23932. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .coord_z = 4;
  23933. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .mask = 16'h6266;
  23934. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .modeMux = 1'b0;
  23935. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .FeedbackMux = 1'b0;
  23936. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .ShiftMux = 1'b0;
  23937. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .BypassEn = 1'b0;
  23938. defparam \macro_inst|apb_dac0_inst|sine_rom~188 .CarryEnb = 1'b1;
  23939. alta_slice \macro_inst|apb_dac0_inst|sine_rom~189 (
  23940. .A(\macro_inst|apb_dac0_inst|sine_rom~188_combout ),
  23941. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  23942. .C(\macro_inst|apb_dac0_inst|sine_rom~187_combout ),
  23943. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  23944. .Cin(),
  23945. .Qin(),
  23946. .Clk(),
  23947. .AsyncReset(),
  23948. .SyncReset(),
  23949. .ShiftData(),
  23950. .SyncLoad(),
  23951. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~189_combout ),
  23952. .Cout(),
  23953. .Q());
  23954. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .coord_x = 8;
  23955. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .coord_y = 2;
  23956. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .coord_z = 10;
  23957. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .mask = 16'hCC2E;
  23958. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .modeMux = 1'b0;
  23959. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .FeedbackMux = 1'b0;
  23960. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .ShiftMux = 1'b0;
  23961. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .BypassEn = 1'b0;
  23962. defparam \macro_inst|apb_dac0_inst|sine_rom~189 .CarryEnb = 1'b1;
  23963. alta_slice \macro_inst|apb_dac0_inst|sine_rom~19 (
  23964. .A(vcc),
  23965. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  23966. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  23967. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23968. .Cin(),
  23969. .Qin(),
  23970. .Clk(),
  23971. .AsyncReset(),
  23972. .SyncReset(),
  23973. .ShiftData(),
  23974. .SyncLoad(),
  23975. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~19_combout ),
  23976. .Cout(),
  23977. .Q());
  23978. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .coord_x = 19;
  23979. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .coord_y = 2;
  23980. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .coord_z = 5;
  23981. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .mask = 16'hC000;
  23982. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .modeMux = 1'b0;
  23983. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .FeedbackMux = 1'b0;
  23984. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .ShiftMux = 1'b0;
  23985. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .BypassEn = 1'b0;
  23986. defparam \macro_inst|apb_dac0_inst|sine_rom~19 .CarryEnb = 1'b1;
  23987. alta_slice \macro_inst|apb_dac0_inst|sine_rom~190 (
  23988. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  23989. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  23990. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  23991. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  23992. .Cin(),
  23993. .Qin(),
  23994. .Clk(),
  23995. .AsyncReset(),
  23996. .SyncReset(),
  23997. .ShiftData(),
  23998. .SyncLoad(),
  23999. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~190_combout ),
  24000. .Cout(),
  24001. .Q());
  24002. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .coord_x = 8;
  24003. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .coord_y = 2;
  24004. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .coord_z = 1;
  24005. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .mask = 16'hF5A6;
  24006. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .modeMux = 1'b0;
  24007. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .FeedbackMux = 1'b0;
  24008. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .ShiftMux = 1'b0;
  24009. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .BypassEn = 1'b0;
  24010. defparam \macro_inst|apb_dac0_inst|sine_rom~190 .CarryEnb = 1'b1;
  24011. alta_slice \macro_inst|apb_dac0_inst|sine_rom~191 (
  24012. .A(\macro_inst|apb_dac0_inst|sine_rom~190_combout ),
  24013. .B(\macro_inst|apb_dac0_inst|sine_rom~186_combout ),
  24014. .C(\macro_inst|apb_dac0_inst|sine_rom~189_combout ),
  24015. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  24016. .Cin(),
  24017. .Qin(),
  24018. .Clk(),
  24019. .AsyncReset(),
  24020. .SyncReset(),
  24021. .ShiftData(),
  24022. .SyncLoad(),
  24023. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~191_combout ),
  24024. .Cout(),
  24025. .Q());
  24026. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .coord_x = 8;
  24027. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .coord_y = 2;
  24028. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .coord_z = 14;
  24029. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .mask = 16'hACF0;
  24030. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .modeMux = 1'b0;
  24031. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .FeedbackMux = 1'b0;
  24032. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .ShiftMux = 1'b0;
  24033. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .BypassEn = 1'b0;
  24034. defparam \macro_inst|apb_dac0_inst|sine_rom~191 .CarryEnb = 1'b1;
  24035. alta_slice \macro_inst|apb_dac0_inst|sine_rom~192 (
  24036. .A(vcc),
  24037. .B(vcc),
  24038. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  24039. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24040. .Cin(),
  24041. .Qin(),
  24042. .Clk(),
  24043. .AsyncReset(),
  24044. .SyncReset(),
  24045. .ShiftData(),
  24046. .SyncLoad(),
  24047. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~192_combout ),
  24048. .Cout(),
  24049. .Q());
  24050. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .coord_x = 10;
  24051. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .coord_y = 3;
  24052. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .coord_z = 6;
  24053. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .mask = 16'h0FF0;
  24054. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .modeMux = 1'b0;
  24055. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .FeedbackMux = 1'b0;
  24056. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .ShiftMux = 1'b0;
  24057. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .BypassEn = 1'b0;
  24058. defparam \macro_inst|apb_dac0_inst|sine_rom~192 .CarryEnb = 1'b1;
  24059. alta_slice \macro_inst|apb_dac0_inst|sine_rom~193 (
  24060. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24061. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24062. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24063. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24064. .Cin(),
  24065. .Qin(),
  24066. .Clk(),
  24067. .AsyncReset(),
  24068. .SyncReset(),
  24069. .ShiftData(),
  24070. .SyncLoad(),
  24071. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~193_combout ),
  24072. .Cout(),
  24073. .Q());
  24074. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .coord_x = 10;
  24075. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .coord_y = 3;
  24076. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .coord_z = 2;
  24077. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .mask = 16'h6632;
  24078. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .modeMux = 1'b0;
  24079. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .FeedbackMux = 1'b0;
  24080. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .ShiftMux = 1'b0;
  24081. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .BypassEn = 1'b0;
  24082. defparam \macro_inst|apb_dac0_inst|sine_rom~193 .CarryEnb = 1'b1;
  24083. alta_slice \macro_inst|apb_dac0_inst|sine_rom~194 (
  24084. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24085. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24086. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24087. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24088. .Cin(),
  24089. .Qin(),
  24090. .Clk(),
  24091. .AsyncReset(),
  24092. .SyncReset(),
  24093. .ShiftData(),
  24094. .SyncLoad(),
  24095. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~194_combout ),
  24096. .Cout(),
  24097. .Q());
  24098. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .coord_x = 10;
  24099. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .coord_y = 3;
  24100. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .coord_z = 15;
  24101. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .mask = 16'h6692;
  24102. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .modeMux = 1'b0;
  24103. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .FeedbackMux = 1'b0;
  24104. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .ShiftMux = 1'b0;
  24105. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .BypassEn = 1'b0;
  24106. defparam \macro_inst|apb_dac0_inst|sine_rom~194 .CarryEnb = 1'b1;
  24107. alta_slice \macro_inst|apb_dac0_inst|sine_rom~195 (
  24108. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  24109. .B(\macro_inst|apb_dac0_inst|sine_rom~194_combout ),
  24110. .C(\macro_inst|apb_dac0_inst|sine_rom~193_combout ),
  24111. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  24112. .Cin(),
  24113. .Qin(),
  24114. .Clk(),
  24115. .AsyncReset(),
  24116. .SyncReset(),
  24117. .ShiftData(),
  24118. .SyncLoad(),
  24119. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~195_combout ),
  24120. .Cout(),
  24121. .Q());
  24122. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .coord_x = 10;
  24123. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .coord_y = 3;
  24124. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .coord_z = 12;
  24125. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .mask = 16'hAF44;
  24126. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .modeMux = 1'b0;
  24127. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .FeedbackMux = 1'b0;
  24128. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .ShiftMux = 1'b0;
  24129. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .BypassEn = 1'b0;
  24130. defparam \macro_inst|apb_dac0_inst|sine_rom~195 .CarryEnb = 1'b1;
  24131. alta_slice \macro_inst|apb_dac0_inst|sine_rom~196 (
  24132. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24133. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24134. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24135. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24136. .Cin(),
  24137. .Qin(),
  24138. .Clk(),
  24139. .AsyncReset(),
  24140. .SyncReset(),
  24141. .ShiftData(),
  24142. .SyncLoad(),
  24143. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~196_combout ),
  24144. .Cout(),
  24145. .Q());
  24146. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .coord_x = 10;
  24147. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .coord_y = 3;
  24148. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .coord_z = 7;
  24149. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .mask = 16'h0BD0;
  24150. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .modeMux = 1'b0;
  24151. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .FeedbackMux = 1'b0;
  24152. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .ShiftMux = 1'b0;
  24153. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .BypassEn = 1'b0;
  24154. defparam \macro_inst|apb_dac0_inst|sine_rom~196 .CarryEnb = 1'b1;
  24155. alta_slice \macro_inst|apb_dac0_inst|sine_rom~197 (
  24156. .A(\macro_inst|apb_dac0_inst|sine_rom~195_combout ),
  24157. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24158. .C(\macro_inst|apb_dac0_inst|sine_rom~192_combout ),
  24159. .D(\macro_inst|apb_dac0_inst|sine_rom~196_combout ),
  24160. .Cin(),
  24161. .Qin(),
  24162. .Clk(),
  24163. .AsyncReset(),
  24164. .SyncReset(),
  24165. .ShiftData(),
  24166. .SyncLoad(),
  24167. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~197_combout ),
  24168. .Cout(),
  24169. .Q());
  24170. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .coord_x = 10;
  24171. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .coord_y = 3;
  24172. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .coord_z = 1;
  24173. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .mask = 16'h26AE;
  24174. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .modeMux = 1'b0;
  24175. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .FeedbackMux = 1'b0;
  24176. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .ShiftMux = 1'b0;
  24177. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .BypassEn = 1'b0;
  24178. defparam \macro_inst|apb_dac0_inst|sine_rom~197 .CarryEnb = 1'b1;
  24179. alta_slice \macro_inst|apb_dac0_inst|sine_rom~198 (
  24180. .A(\macro_inst|apb_dac0_inst|sine_rom~197_combout ),
  24181. .B(\macro_inst|apb_dac0_inst|sine_rom~191_combout ),
  24182. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  24183. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  24184. .Cin(),
  24185. .Qin(),
  24186. .Clk(),
  24187. .AsyncReset(),
  24188. .SyncReset(),
  24189. .ShiftData(),
  24190. .SyncLoad(),
  24191. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~198_combout ),
  24192. .Cout(),
  24193. .Q());
  24194. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .coord_x = 9;
  24195. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .coord_y = 2;
  24196. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .coord_z = 5;
  24197. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .mask = 16'hF30A;
  24198. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .modeMux = 1'b0;
  24199. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .FeedbackMux = 1'b0;
  24200. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .ShiftMux = 1'b0;
  24201. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .BypassEn = 1'b0;
  24202. defparam \macro_inst|apb_dac0_inst|sine_rom~198 .CarryEnb = 1'b1;
  24203. alta_slice \macro_inst|apb_dac0_inst|sine_rom~199 (
  24204. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24205. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24206. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24207. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24208. .Cin(),
  24209. .Qin(),
  24210. .Clk(),
  24211. .AsyncReset(),
  24212. .SyncReset(),
  24213. .ShiftData(),
  24214. .SyncLoad(),
  24215. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~199_combout ),
  24216. .Cout(),
  24217. .Q());
  24218. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .coord_x = 10;
  24219. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .coord_y = 3;
  24220. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .coord_z = 8;
  24221. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .mask = 16'hCE8C;
  24222. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .modeMux = 1'b0;
  24223. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .FeedbackMux = 1'b0;
  24224. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .ShiftMux = 1'b0;
  24225. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .BypassEn = 1'b0;
  24226. defparam \macro_inst|apb_dac0_inst|sine_rom~199 .CarryEnb = 1'b1;
  24227. alta_slice \macro_inst|apb_dac0_inst|sine_rom~2 (
  24228. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24229. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24230. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24231. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24232. .Cin(),
  24233. .Qin(),
  24234. .Clk(),
  24235. .AsyncReset(),
  24236. .SyncReset(),
  24237. .ShiftData(),
  24238. .SyncLoad(),
  24239. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  24240. .Cout(),
  24241. .Q());
  24242. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .coord_x = 19;
  24243. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .coord_y = 2;
  24244. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .coord_z = 9;
  24245. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .mask = 16'hE0C0;
  24246. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .modeMux = 1'b0;
  24247. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .FeedbackMux = 1'b0;
  24248. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .ShiftMux = 1'b0;
  24249. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .BypassEn = 1'b0;
  24250. defparam \macro_inst|apb_dac0_inst|sine_rom~2 .CarryEnb = 1'b1;
  24251. alta_slice \macro_inst|apb_dac0_inst|sine_rom~20 (
  24252. .A(\macro_inst|apb_dac0_inst|sine_rom~19_combout ),
  24253. .B(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  24254. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24255. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  24256. .Cin(),
  24257. .Qin(),
  24258. .Clk(),
  24259. .AsyncReset(),
  24260. .SyncReset(),
  24261. .ShiftData(),
  24262. .SyncLoad(),
  24263. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~20_combout ),
  24264. .Cout(),
  24265. .Q());
  24266. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .coord_x = 19;
  24267. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .coord_y = 2;
  24268. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .coord_z = 4;
  24269. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .mask = 16'h0C53;
  24270. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .modeMux = 1'b0;
  24271. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .FeedbackMux = 1'b0;
  24272. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .ShiftMux = 1'b0;
  24273. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .BypassEn = 1'b0;
  24274. defparam \macro_inst|apb_dac0_inst|sine_rom~20 .CarryEnb = 1'b1;
  24275. alta_slice \macro_inst|apb_dac0_inst|sine_rom~200 (
  24276. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24277. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24278. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24279. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24280. .Cin(),
  24281. .Qin(),
  24282. .Clk(),
  24283. .AsyncReset(),
  24284. .SyncReset(),
  24285. .ShiftData(),
  24286. .SyncLoad(),
  24287. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~200_combout ),
  24288. .Cout(),
  24289. .Q());
  24290. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .coord_x = 10;
  24291. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .coord_y = 3;
  24292. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .coord_z = 5;
  24293. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .mask = 16'h05E8;
  24294. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .modeMux = 1'b0;
  24295. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .FeedbackMux = 1'b0;
  24296. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .ShiftMux = 1'b0;
  24297. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .BypassEn = 1'b0;
  24298. defparam \macro_inst|apb_dac0_inst|sine_rom~200 .CarryEnb = 1'b1;
  24299. alta_slice \macro_inst|apb_dac0_inst|sine_rom~201 (
  24300. .A(\macro_inst|apb_dac0_inst|sine_rom~199_combout ),
  24301. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24302. .C(\macro_inst|apb_dac0_inst|sine_rom~200_combout ),
  24303. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  24304. .Cin(),
  24305. .Qin(),
  24306. .Clk(),
  24307. .AsyncReset(),
  24308. .SyncReset(),
  24309. .ShiftData(),
  24310. .SyncLoad(),
  24311. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~201_combout ),
  24312. .Cout(),
  24313. .Q());
  24314. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .coord_x = 10;
  24315. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .coord_y = 3;
  24316. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .coord_z = 4;
  24317. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .mask = 16'hCF88;
  24318. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .modeMux = 1'b0;
  24319. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .FeedbackMux = 1'b0;
  24320. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .ShiftMux = 1'b0;
  24321. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .BypassEn = 1'b0;
  24322. defparam \macro_inst|apb_dac0_inst|sine_rom~201 .CarryEnb = 1'b1;
  24323. alta_slice \macro_inst|apb_dac0_inst|sine_rom~202 (
  24324. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24325. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24326. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24327. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24328. .Cin(),
  24329. .Qin(),
  24330. .Clk(),
  24331. .AsyncReset(),
  24332. .SyncReset(),
  24333. .ShiftData(),
  24334. .SyncLoad(),
  24335. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~202_combout ),
  24336. .Cout(),
  24337. .Q());
  24338. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .coord_x = 10;
  24339. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .coord_y = 3;
  24340. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .coord_z = 14;
  24341. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .mask = 16'h799E;
  24342. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .modeMux = 1'b0;
  24343. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .FeedbackMux = 1'b0;
  24344. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .ShiftMux = 1'b0;
  24345. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .BypassEn = 1'b0;
  24346. defparam \macro_inst|apb_dac0_inst|sine_rom~202 .CarryEnb = 1'b1;
  24347. alta_slice \macro_inst|apb_dac0_inst|sine_rom~203 (
  24348. .A(\macro_inst|apb_dac0_inst|sine_rom~201_combout ),
  24349. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24350. .C(\macro_inst|apb_dac0_inst|sine_rom~202_combout ),
  24351. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  24352. .Cin(),
  24353. .Qin(),
  24354. .Clk(),
  24355. .AsyncReset(),
  24356. .SyncReset(),
  24357. .ShiftData(),
  24358. .SyncLoad(),
  24359. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~203_combout ),
  24360. .Cout(),
  24361. .Q());
  24362. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .coord_x = 10;
  24363. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .coord_y = 3;
  24364. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .coord_z = 3;
  24365. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .mask = 16'hAABA;
  24366. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .modeMux = 1'b0;
  24367. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .FeedbackMux = 1'b0;
  24368. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .ShiftMux = 1'b0;
  24369. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .BypassEn = 1'b0;
  24370. defparam \macro_inst|apb_dac0_inst|sine_rom~203 .CarryEnb = 1'b1;
  24371. alta_slice \macro_inst|apb_dac0_inst|sine_rom~204 (
  24372. .A(\macro_inst|apb_dac0_inst|sine_rom~185_combout ),
  24373. .B(\macro_inst|apb_dac0_inst|sine_rom~198_combout ),
  24374. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  24375. .D(\macro_inst|apb_dac0_inst|sine_rom~203_combout ),
  24376. .Cin(),
  24377. .Qin(),
  24378. .Clk(),
  24379. .AsyncReset(),
  24380. .SyncReset(),
  24381. .ShiftData(),
  24382. .SyncLoad(),
  24383. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~204_combout ),
  24384. .Cout(),
  24385. .Q());
  24386. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .coord_x = 9;
  24387. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .coord_y = 2;
  24388. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .coord_z = 6;
  24389. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .mask = 16'h1CDC;
  24390. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .modeMux = 1'b0;
  24391. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .FeedbackMux = 1'b0;
  24392. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .ShiftMux = 1'b0;
  24393. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .BypassEn = 1'b0;
  24394. defparam \macro_inst|apb_dac0_inst|sine_rom~204 .CarryEnb = 1'b1;
  24395. alta_slice \macro_inst|apb_dac0_inst|sine_rom~205 (
  24396. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24397. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24398. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24399. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24400. .Cin(),
  24401. .Qin(),
  24402. .Clk(),
  24403. .AsyncReset(),
  24404. .SyncReset(),
  24405. .ShiftData(),
  24406. .SyncLoad(),
  24407. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~205_combout ),
  24408. .Cout(),
  24409. .Q());
  24410. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .coord_x = 10;
  24411. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .coord_y = 3;
  24412. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .coord_z = 11;
  24413. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .mask = 16'h996C;
  24414. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .modeMux = 1'b0;
  24415. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .FeedbackMux = 1'b0;
  24416. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .ShiftMux = 1'b0;
  24417. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .BypassEn = 1'b0;
  24418. defparam \macro_inst|apb_dac0_inst|sine_rom~205 .CarryEnb = 1'b1;
  24419. alta_slice \macro_inst|apb_dac0_inst|sine_rom~206 (
  24420. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  24421. .B(\macro_inst|apb_dac0_inst|sine_rom~205_combout ),
  24422. .C(\macro_inst|apb_dac0_inst|sine_rom~193_combout ),
  24423. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  24424. .Cin(),
  24425. .Qin(),
  24426. .Clk(),
  24427. .AsyncReset(),
  24428. .SyncReset(),
  24429. .ShiftData(),
  24430. .SyncLoad(),
  24431. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~206_combout ),
  24432. .Cout(),
  24433. .Q());
  24434. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .coord_x = 10;
  24435. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .coord_y = 3;
  24436. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .coord_z = 10;
  24437. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .mask = 16'hFA44;
  24438. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .modeMux = 1'b0;
  24439. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .FeedbackMux = 1'b0;
  24440. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .ShiftMux = 1'b0;
  24441. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .BypassEn = 1'b0;
  24442. defparam \macro_inst|apb_dac0_inst|sine_rom~206 .CarryEnb = 1'b1;
  24443. alta_slice \macro_inst|apb_dac0_inst|sine_rom~207 (
  24444. .A(\macro_inst|apb_dac0_inst|sine_rom~192_combout ),
  24445. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24446. .C(\macro_inst|apb_dac0_inst|sine_rom~206_combout ),
  24447. .D(\macro_inst|apb_dac0_inst|sine_rom~196_combout ),
  24448. .Cin(),
  24449. .Qin(),
  24450. .Clk(),
  24451. .AsyncReset(),
  24452. .SyncReset(),
  24453. .ShiftData(),
  24454. .SyncLoad(),
  24455. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~207_combout ),
  24456. .Cout(),
  24457. .Q());
  24458. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .coord_x = 10;
  24459. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .coord_y = 3;
  24460. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .coord_z = 9;
  24461. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .mask = 16'hF838;
  24462. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .modeMux = 1'b0;
  24463. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .FeedbackMux = 1'b0;
  24464. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .ShiftMux = 1'b0;
  24465. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .BypassEn = 1'b0;
  24466. defparam \macro_inst|apb_dac0_inst|sine_rom~207 .CarryEnb = 1'b1;
  24467. alta_slice \macro_inst|apb_dac0_inst|sine_rom~208 (
  24468. .A(\macro_inst|apb_dac0_inst|sine_rom~207_combout ),
  24469. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  24470. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  24471. .D(\macro_inst|apb_dac0_inst|sine_rom~191_combout ),
  24472. .Cin(),
  24473. .Qin(),
  24474. .Clk(),
  24475. .AsyncReset(),
  24476. .SyncReset(),
  24477. .ShiftData(),
  24478. .SyncLoad(),
  24479. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~208_combout ),
  24480. .Cout(),
  24481. .Q());
  24482. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .coord_x = 9;
  24483. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .coord_y = 2;
  24484. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .coord_z = 7;
  24485. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .mask = 16'hCEC2;
  24486. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .modeMux = 1'b0;
  24487. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .FeedbackMux = 1'b0;
  24488. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .ShiftMux = 1'b0;
  24489. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .BypassEn = 1'b0;
  24490. defparam \macro_inst|apb_dac0_inst|sine_rom~208 .CarryEnb = 1'b1;
  24491. alta_slice \macro_inst|apb_dac0_inst|sine_rom~209 (
  24492. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  24493. .B(\macro_inst|apb_dac0_inst|sine_rom~203_combout ),
  24494. .C(\macro_inst|apb_dac0_inst|sine_rom~185_combout ),
  24495. .D(\macro_inst|apb_dac0_inst|sine_rom~208_combout ),
  24496. .Cin(),
  24497. .Qin(),
  24498. .Clk(),
  24499. .AsyncReset(),
  24500. .SyncReset(),
  24501. .ShiftData(),
  24502. .SyncLoad(),
  24503. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~209_combout ),
  24504. .Cout(),
  24505. .Q());
  24506. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .coord_x = 9;
  24507. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .coord_y = 2;
  24508. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .coord_z = 11;
  24509. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .mask = 16'hDDA0;
  24510. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .modeMux = 1'b0;
  24511. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .FeedbackMux = 1'b0;
  24512. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .ShiftMux = 1'b0;
  24513. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .BypassEn = 1'b0;
  24514. defparam \macro_inst|apb_dac0_inst|sine_rom~209 .CarryEnb = 1'b1;
  24515. alta_slice \macro_inst|apb_dac0_inst|sine_rom~21 (
  24516. .A(vcc),
  24517. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  24518. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  24519. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  24520. .Cin(),
  24521. .Qin(),
  24522. .Clk(),
  24523. .AsyncReset(),
  24524. .SyncReset(),
  24525. .ShiftData(),
  24526. .SyncLoad(),
  24527. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~21_combout ),
  24528. .Cout(),
  24529. .Q());
  24530. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .coord_x = 9;
  24531. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .coord_y = 1;
  24532. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .coord_z = 11;
  24533. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .mask = 16'h03FF;
  24534. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .modeMux = 1'b0;
  24535. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .FeedbackMux = 1'b0;
  24536. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .ShiftMux = 1'b0;
  24537. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .BypassEn = 1'b0;
  24538. defparam \macro_inst|apb_dac0_inst|sine_rom~21 .CarryEnb = 1'b1;
  24539. alta_slice \macro_inst|apb_dac0_inst|sine_rom~210 (
  24540. .A(\macro_inst|apb_dac0_inst|phase_r [8]),
  24541. .B(\macro_inst|apb_dac0_inst|sine_rom~209_combout ),
  24542. .C(\macro_inst|apb_dac0_inst|sine_rom~204_combout ),
  24543. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  24544. .Cin(),
  24545. .Qin(),
  24546. .Clk(),
  24547. .AsyncReset(),
  24548. .SyncReset(),
  24549. .ShiftData(),
  24550. .SyncLoad(),
  24551. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~210_combout ),
  24552. .Cout(),
  24553. .Q());
  24554. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .coord_x = 9;
  24555. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .coord_y = 2;
  24556. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .coord_z = 2;
  24557. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .mask = 16'h5044;
  24558. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .modeMux = 1'b0;
  24559. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .FeedbackMux = 1'b0;
  24560. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .ShiftMux = 1'b0;
  24561. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .BypassEn = 1'b0;
  24562. defparam \macro_inst|apb_dac0_inst|sine_rom~210 .CarryEnb = 1'b1;
  24563. alta_slice \macro_inst|apb_dac0_inst|sine_rom~211 (
  24564. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24565. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24566. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24567. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  24568. .Cin(),
  24569. .Qin(),
  24570. .Clk(),
  24571. .AsyncReset(),
  24572. .SyncReset(),
  24573. .ShiftData(),
  24574. .SyncLoad(),
  24575. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~211_combout ),
  24576. .Cout(),
  24577. .Q());
  24578. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .coord_x = 19;
  24579. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .coord_y = 1;
  24580. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .coord_z = 3;
  24581. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .mask = 16'h49C8;
  24582. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .modeMux = 1'b0;
  24583. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .FeedbackMux = 1'b0;
  24584. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .ShiftMux = 1'b0;
  24585. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .BypassEn = 1'b0;
  24586. defparam \macro_inst|apb_dac0_inst|sine_rom~211 .CarryEnb = 1'b1;
  24587. alta_slice \macro_inst|apb_dac0_inst|sine_rom~212 (
  24588. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24589. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24590. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24591. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  24592. .Cin(),
  24593. .Qin(),
  24594. .Clk(),
  24595. .AsyncReset(),
  24596. .SyncReset(),
  24597. .ShiftData(),
  24598. .SyncLoad(),
  24599. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~212_combout ),
  24600. .Cout(),
  24601. .Q());
  24602. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .coord_x = 19;
  24603. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .coord_y = 1;
  24604. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .coord_z = 7;
  24605. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .mask = 16'h020C;
  24606. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .modeMux = 1'b0;
  24607. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .FeedbackMux = 1'b0;
  24608. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .ShiftMux = 1'b0;
  24609. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .BypassEn = 1'b0;
  24610. defparam \macro_inst|apb_dac0_inst|sine_rom~212 .CarryEnb = 1'b1;
  24611. alta_slice \macro_inst|apb_dac0_inst|sine_rom~213 (
  24612. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24613. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  24614. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24615. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  24616. .Cin(),
  24617. .Qin(),
  24618. .Clk(),
  24619. .AsyncReset(),
  24620. .SyncReset(),
  24621. .ShiftData(),
  24622. .SyncLoad(),
  24623. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~213_combout ),
  24624. .Cout(),
  24625. .Q());
  24626. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .coord_x = 19;
  24627. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .coord_y = 1;
  24628. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .coord_z = 6;
  24629. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .mask = 16'h0B26;
  24630. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .modeMux = 1'b0;
  24631. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .FeedbackMux = 1'b0;
  24632. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .ShiftMux = 1'b0;
  24633. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .BypassEn = 1'b0;
  24634. defparam \macro_inst|apb_dac0_inst|sine_rom~213 .CarryEnb = 1'b1;
  24635. alta_slice \macro_inst|apb_dac0_inst|sine_rom~214 (
  24636. .A(\macro_inst|apb_dac0_inst|sine_rom~213_combout ),
  24637. .B(\macro_inst|apb_dac0_inst|sine_rom~212_combout ),
  24638. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  24639. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24640. .Cin(),
  24641. .Qin(),
  24642. .Clk(),
  24643. .AsyncReset(),
  24644. .SyncReset(),
  24645. .ShiftData(),
  24646. .SyncLoad(),
  24647. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~214_combout ),
  24648. .Cout(),
  24649. .Q());
  24650. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .coord_x = 19;
  24651. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .coord_y = 1;
  24652. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .coord_z = 14;
  24653. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .mask = 16'hF30A;
  24654. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .modeMux = 1'b0;
  24655. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .FeedbackMux = 1'b0;
  24656. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .ShiftMux = 1'b0;
  24657. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .BypassEn = 1'b0;
  24658. defparam \macro_inst|apb_dac0_inst|sine_rom~214 .CarryEnb = 1'b1;
  24659. alta_slice \macro_inst|apb_dac0_inst|sine_rom~215 (
  24660. .A(vcc),
  24661. .B(vcc),
  24662. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  24663. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  24664. .Cin(),
  24665. .Qin(),
  24666. .Clk(),
  24667. .AsyncReset(),
  24668. .SyncReset(),
  24669. .ShiftData(),
  24670. .SyncLoad(),
  24671. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~215_combout ),
  24672. .Cout(),
  24673. .Q());
  24674. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .coord_x = 19;
  24675. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .coord_y = 1;
  24676. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .coord_z = 0;
  24677. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .mask = 16'h0FF0;
  24678. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .modeMux = 1'b0;
  24679. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .FeedbackMux = 1'b0;
  24680. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .ShiftMux = 1'b0;
  24681. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .BypassEn = 1'b0;
  24682. defparam \macro_inst|apb_dac0_inst|sine_rom~215 .CarryEnb = 1'b1;
  24683. alta_slice \macro_inst|apb_dac0_inst|sine_rom~216 (
  24684. .A(\macro_inst|apb_dac0_inst|sine_rom~214_combout ),
  24685. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24686. .C(\macro_inst|apb_dac0_inst|sine_rom~215_combout ),
  24687. .D(\macro_inst|apb_dac0_inst|sine_rom~211_combout ),
  24688. .Cin(),
  24689. .Qin(),
  24690. .Clk(),
  24691. .AsyncReset(),
  24692. .SyncReset(),
  24693. .ShiftData(),
  24694. .SyncLoad(),
  24695. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~216_combout ),
  24696. .Cout(),
  24697. .Q());
  24698. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .coord_x = 19;
  24699. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .coord_y = 1;
  24700. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .coord_z = 5;
  24701. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .mask = 16'h6E2A;
  24702. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .modeMux = 1'b0;
  24703. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .FeedbackMux = 1'b0;
  24704. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .ShiftMux = 1'b0;
  24705. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .BypassEn = 1'b0;
  24706. defparam \macro_inst|apb_dac0_inst|sine_rom~216 .CarryEnb = 1'b1;
  24707. alta_slice \macro_inst|apb_dac0_inst|sine_rom~217 (
  24708. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24709. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  24710. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24711. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24712. .Cin(),
  24713. .Qin(),
  24714. .Clk(),
  24715. .AsyncReset(),
  24716. .SyncReset(),
  24717. .ShiftData(),
  24718. .SyncLoad(),
  24719. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~217_combout ),
  24720. .Cout(),
  24721. .Q());
  24722. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .coord_x = 18;
  24723. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .coord_y = 1;
  24724. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .coord_z = 2;
  24725. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .mask = 16'hBCD6;
  24726. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .modeMux = 1'b0;
  24727. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .FeedbackMux = 1'b0;
  24728. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .ShiftMux = 1'b0;
  24729. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .BypassEn = 1'b0;
  24730. defparam \macro_inst|apb_dac0_inst|sine_rom~217 .CarryEnb = 1'b1;
  24731. alta_slice \macro_inst|apb_dac0_inst|sine_rom~218 (
  24732. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24733. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  24734. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24735. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24736. .Cin(),
  24737. .Qin(),
  24738. .Clk(),
  24739. .AsyncReset(),
  24740. .SyncReset(),
  24741. .ShiftData(),
  24742. .SyncLoad(),
  24743. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~218_combout ),
  24744. .Cout(),
  24745. .Q());
  24746. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .coord_x = 18;
  24747. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .coord_y = 1;
  24748. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .coord_z = 8;
  24749. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .mask = 16'hCB12;
  24750. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .modeMux = 1'b0;
  24751. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .FeedbackMux = 1'b0;
  24752. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .ShiftMux = 1'b0;
  24753. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .BypassEn = 1'b0;
  24754. defparam \macro_inst|apb_dac0_inst|sine_rom~218 .CarryEnb = 1'b1;
  24755. alta_slice \macro_inst|apb_dac0_inst|sine_rom~219 (
  24756. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24757. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  24758. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24759. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24760. .Cin(),
  24761. .Qin(),
  24762. .Clk(),
  24763. .AsyncReset(),
  24764. .SyncReset(),
  24765. .ShiftData(),
  24766. .SyncLoad(),
  24767. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~219_combout ),
  24768. .Cout(),
  24769. .Q());
  24770. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .coord_x = 18;
  24771. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .coord_y = 1;
  24772. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .coord_z = 5;
  24773. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .mask = 16'h34FC;
  24774. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .modeMux = 1'b0;
  24775. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .FeedbackMux = 1'b0;
  24776. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .ShiftMux = 1'b0;
  24777. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .BypassEn = 1'b0;
  24778. defparam \macro_inst|apb_dac0_inst|sine_rom~219 .CarryEnb = 1'b1;
  24779. alta_slice \macro_inst|apb_dac0_inst|sine_rom~22 (
  24780. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  24781. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  24782. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24783. .D(\macro_inst|apb_dac0_inst|sine_rom~21_combout ),
  24784. .Cin(),
  24785. .Qin(),
  24786. .Clk(),
  24787. .AsyncReset(),
  24788. .SyncReset(),
  24789. .ShiftData(),
  24790. .SyncLoad(),
  24791. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~22_combout ),
  24792. .Cout(),
  24793. .Q());
  24794. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .coord_x = 9;
  24795. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .coord_y = 1;
  24796. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .coord_z = 7;
  24797. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .mask = 16'hA2A7;
  24798. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .modeMux = 1'b0;
  24799. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .FeedbackMux = 1'b0;
  24800. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .ShiftMux = 1'b0;
  24801. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .BypassEn = 1'b0;
  24802. defparam \macro_inst|apb_dac0_inst|sine_rom~22 .CarryEnb = 1'b1;
  24803. alta_slice \macro_inst|apb_dac0_inst|sine_rom~220 (
  24804. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  24805. .B(\macro_inst|apb_dac0_inst|sine_rom~219_combout ),
  24806. .C(\macro_inst|apb_dac0_inst|sine_rom~218_combout ),
  24807. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  24808. .Cin(),
  24809. .Qin(),
  24810. .Clk(),
  24811. .AsyncReset(),
  24812. .SyncReset(),
  24813. .ShiftData(),
  24814. .SyncLoad(),
  24815. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~220_combout ),
  24816. .Cout(),
  24817. .Q());
  24818. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .coord_x = 18;
  24819. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .coord_y = 1;
  24820. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .coord_z = 15;
  24821. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .mask = 16'hAA1B;
  24822. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .modeMux = 1'b0;
  24823. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .FeedbackMux = 1'b0;
  24824. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .ShiftMux = 1'b0;
  24825. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .BypassEn = 1'b0;
  24826. defparam \macro_inst|apb_dac0_inst|sine_rom~220 .CarryEnb = 1'b1;
  24827. alta_slice \macro_inst|apb_dac0_inst|sine_rom~221 (
  24828. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  24829. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  24830. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  24831. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  24832. .Cin(),
  24833. .Qin(),
  24834. .Clk(),
  24835. .AsyncReset(),
  24836. .SyncReset(),
  24837. .ShiftData(),
  24838. .SyncLoad(),
  24839. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~221_combout ),
  24840. .Cout(),
  24841. .Q());
  24842. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .coord_x = 18;
  24843. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .coord_y = 1;
  24844. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .coord_z = 0;
  24845. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .mask = 16'hA9F4;
  24846. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .modeMux = 1'b0;
  24847. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .FeedbackMux = 1'b0;
  24848. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .ShiftMux = 1'b0;
  24849. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .BypassEn = 1'b0;
  24850. defparam \macro_inst|apb_dac0_inst|sine_rom~221 .CarryEnb = 1'b1;
  24851. alta_slice \macro_inst|apb_dac0_inst|sine_rom~222 (
  24852. .A(\macro_inst|apb_dac0_inst|sine_rom~217_combout ),
  24853. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24854. .C(\macro_inst|apb_dac0_inst|sine_rom~221_combout ),
  24855. .D(\macro_inst|apb_dac0_inst|sine_rom~220_combout ),
  24856. .Cin(),
  24857. .Qin(),
  24858. .Clk(),
  24859. .AsyncReset(),
  24860. .SyncReset(),
  24861. .ShiftData(),
  24862. .SyncLoad(),
  24863. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~222_combout ),
  24864. .Cout(),
  24865. .Q());
  24866. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .coord_x = 18;
  24867. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .coord_y = 1;
  24868. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .coord_z = 10;
  24869. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .mask = 16'hF344;
  24870. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .modeMux = 1'b0;
  24871. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .FeedbackMux = 1'b0;
  24872. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .ShiftMux = 1'b0;
  24873. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .BypassEn = 1'b0;
  24874. defparam \macro_inst|apb_dac0_inst|sine_rom~222 .CarryEnb = 1'b1;
  24875. alta_slice \macro_inst|apb_dac0_inst|sine_rom~223 (
  24876. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  24877. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  24878. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  24879. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  24880. .Cin(),
  24881. .Qin(),
  24882. .Clk(),
  24883. .AsyncReset(),
  24884. .SyncReset(),
  24885. .ShiftData(),
  24886. .SyncLoad(),
  24887. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~223_combout ),
  24888. .Cout(),
  24889. .Q());
  24890. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .coord_x = 19;
  24891. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .coord_y = 1;
  24892. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .coord_z = 10;
  24893. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .mask = 16'hD656;
  24894. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .modeMux = 1'b0;
  24895. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .FeedbackMux = 1'b0;
  24896. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .ShiftMux = 1'b0;
  24897. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .BypassEn = 1'b0;
  24898. defparam \macro_inst|apb_dac0_inst|sine_rom~223 .CarryEnb = 1'b1;
  24899. alta_slice \macro_inst|apb_dac0_inst|sine_rom~224 (
  24900. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  24901. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  24902. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  24903. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  24904. .Cin(),
  24905. .Qin(),
  24906. .Clk(),
  24907. .AsyncReset(),
  24908. .SyncReset(),
  24909. .ShiftData(),
  24910. .SyncLoad(),
  24911. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~224_combout ),
  24912. .Cout(),
  24913. .Q());
  24914. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .coord_x = 19;
  24915. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .coord_y = 1;
  24916. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .coord_z = 13;
  24917. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .mask = 16'hBB04;
  24918. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .modeMux = 1'b0;
  24919. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .FeedbackMux = 1'b0;
  24920. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .ShiftMux = 1'b0;
  24921. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .BypassEn = 1'b0;
  24922. defparam \macro_inst|apb_dac0_inst|sine_rom~224 .CarryEnb = 1'b1;
  24923. alta_slice \macro_inst|apb_dac0_inst|sine_rom~225 (
  24924. .A(\macro_inst|apb_dac0_inst|sine_rom~223_combout ),
  24925. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  24926. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  24927. .D(\macro_inst|apb_dac0_inst|sine_rom~224_combout ),
  24928. .Cin(),
  24929. .Qin(),
  24930. .Clk(),
  24931. .AsyncReset(),
  24932. .SyncReset(),
  24933. .ShiftData(),
  24934. .SyncLoad(),
  24935. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~225_combout ),
  24936. .Cout(),
  24937. .Q());
  24938. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .coord_x = 19;
  24939. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .coord_y = 1;
  24940. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .coord_z = 12;
  24941. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .mask = 16'h0B3B;
  24942. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .modeMux = 1'b0;
  24943. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .FeedbackMux = 1'b0;
  24944. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .ShiftMux = 1'b0;
  24945. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .BypassEn = 1'b0;
  24946. defparam \macro_inst|apb_dac0_inst|sine_rom~225 .CarryEnb = 1'b1;
  24947. alta_slice \macro_inst|apb_dac0_inst|sine_rom~226 (
  24948. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  24949. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  24950. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  24951. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  24952. .Cin(),
  24953. .Qin(),
  24954. .Clk(),
  24955. .AsyncReset(),
  24956. .SyncReset(),
  24957. .ShiftData(),
  24958. .SyncLoad(),
  24959. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~226_combout ),
  24960. .Cout(),
  24961. .Q());
  24962. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .coord_x = 19;
  24963. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .coord_y = 1;
  24964. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .coord_z = 4;
  24965. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .mask = 16'h6118;
  24966. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .modeMux = 1'b0;
  24967. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .FeedbackMux = 1'b0;
  24968. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .ShiftMux = 1'b0;
  24969. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .BypassEn = 1'b0;
  24970. defparam \macro_inst|apb_dac0_inst|sine_rom~226 .CarryEnb = 1'b1;
  24971. alta_slice \macro_inst|apb_dac0_inst|sine_rom~227 (
  24972. .A(\macro_inst|apb_dac0_inst|sine_rom~226_combout ),
  24973. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  24974. .C(\macro_inst|apb_dac0_inst|sine_rom~225_combout ),
  24975. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  24976. .Cin(),
  24977. .Qin(),
  24978. .Clk(),
  24979. .AsyncReset(),
  24980. .SyncReset(),
  24981. .ShiftData(),
  24982. .SyncLoad(),
  24983. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~227_combout ),
  24984. .Cout(),
  24985. .Q());
  24986. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .coord_x = 19;
  24987. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .coord_y = 1;
  24988. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .coord_z = 15;
  24989. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .mask = 16'hF4F0;
  24990. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .modeMux = 1'b0;
  24991. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .FeedbackMux = 1'b0;
  24992. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .ShiftMux = 1'b0;
  24993. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .BypassEn = 1'b0;
  24994. defparam \macro_inst|apb_dac0_inst|sine_rom~227 .CarryEnb = 1'b1;
  24995. alta_slice \macro_inst|apb_dac0_inst|sine_rom~228 (
  24996. .A(\macro_inst|apb_dac0_inst|sine_rom~227_combout ),
  24997. .B(\macro_inst|apb_dac0_inst|sine_rom~222_combout ),
  24998. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  24999. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  25000. .Cin(),
  25001. .Qin(),
  25002. .Clk(),
  25003. .AsyncReset(),
  25004. .SyncReset(),
  25005. .ShiftData(),
  25006. .SyncLoad(),
  25007. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~228_combout ),
  25008. .Cout(),
  25009. .Q());
  25010. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .coord_x = 18;
  25011. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .coord_y = 2;
  25012. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .coord_z = 4;
  25013. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .mask = 16'hF0CA;
  25014. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .modeMux = 1'b0;
  25015. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .FeedbackMux = 1'b0;
  25016. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .ShiftMux = 1'b0;
  25017. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .BypassEn = 1'b0;
  25018. defparam \macro_inst|apb_dac0_inst|sine_rom~228 .CarryEnb = 1'b1;
  25019. alta_slice \macro_inst|apb_dac0_inst|sine_rom~229 (
  25020. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  25021. .B(vcc),
  25022. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  25023. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  25024. .Cin(),
  25025. .Qin(),
  25026. .Clk(),
  25027. .AsyncReset(),
  25028. .SyncReset(),
  25029. .ShiftData(),
  25030. .SyncLoad(),
  25031. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~229_combout ),
  25032. .Cout(),
  25033. .Q());
  25034. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .coord_x = 19;
  25035. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .coord_y = 1;
  25036. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .coord_z = 11;
  25037. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .mask = 16'hA55A;
  25038. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .modeMux = 1'b0;
  25039. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .FeedbackMux = 1'b0;
  25040. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .ShiftMux = 1'b0;
  25041. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .BypassEn = 1'b0;
  25042. defparam \macro_inst|apb_dac0_inst|sine_rom~229 .CarryEnb = 1'b1;
  25043. alta_slice \macro_inst|apb_dac0_inst|sine_rom~23 (
  25044. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  25045. .B(\macro_inst|apb_dac0_inst|sine_rom~22_combout ),
  25046. .C(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|_~8_combout ),
  25047. .D(\macro_inst|apb_dac0_inst|sine_rom~3_combout ),
  25048. .Cin(),
  25049. .Qin(),
  25050. .Clk(),
  25051. .AsyncReset(),
  25052. .SyncReset(),
  25053. .ShiftData(),
  25054. .SyncLoad(),
  25055. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~23_combout ),
  25056. .Cout(),
  25057. .Q());
  25058. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .coord_x = 9;
  25059. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .coord_y = 1;
  25060. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .coord_z = 10;
  25061. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .mask = 16'h6E4C;
  25062. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .modeMux = 1'b0;
  25063. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .FeedbackMux = 1'b0;
  25064. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .ShiftMux = 1'b0;
  25065. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .BypassEn = 1'b0;
  25066. defparam \macro_inst|apb_dac0_inst|sine_rom~23 .CarryEnb = 1'b1;
  25067. alta_slice \macro_inst|apb_dac0_inst|sine_rom~230 (
  25068. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  25069. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  25070. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  25071. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  25072. .Cin(),
  25073. .Qin(),
  25074. .Clk(),
  25075. .AsyncReset(),
  25076. .SyncReset(),
  25077. .ShiftData(),
  25078. .SyncLoad(),
  25079. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~230_combout ),
  25080. .Cout(),
  25081. .Q());
  25082. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .coord_x = 19;
  25083. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .coord_y = 1;
  25084. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .coord_z = 2;
  25085. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .mask = 16'h9636;
  25086. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .modeMux = 1'b0;
  25087. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .FeedbackMux = 1'b0;
  25088. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .ShiftMux = 1'b0;
  25089. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .BypassEn = 1'b0;
  25090. defparam \macro_inst|apb_dac0_inst|sine_rom~230 .CarryEnb = 1'b1;
  25091. alta_slice \macro_inst|apb_dac0_inst|sine_rom~231 (
  25092. .A(\macro_inst|apb_dac0_inst|sine_rom~342_combout ),
  25093. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  25094. .C(\macro_inst|apb_dac0_inst|sine_rom~230_combout ),
  25095. .D(\macro_inst|apb_dac0_inst|sine_rom~229_combout ),
  25096. .Cin(),
  25097. .Qin(),
  25098. .Clk(),
  25099. .AsyncReset(),
  25100. .SyncReset(),
  25101. .ShiftData(),
  25102. .SyncLoad(),
  25103. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~231_combout ),
  25104. .Cout(),
  25105. .Q());
  25106. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .coord_x = 19;
  25107. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .coord_y = 1;
  25108. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .coord_z = 1;
  25109. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .mask = 16'h2A6E;
  25110. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .modeMux = 1'b0;
  25111. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .FeedbackMux = 1'b0;
  25112. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .ShiftMux = 1'b0;
  25113. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .BypassEn = 1'b0;
  25114. defparam \macro_inst|apb_dac0_inst|sine_rom~231 .CarryEnb = 1'b1;
  25115. alta_slice \macro_inst|apb_dac0_inst|sine_rom~232 (
  25116. .A(\macro_inst|apb_dac0_inst|sine_rom~231_combout ),
  25117. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  25118. .C(\macro_inst|apb_dac0_inst|sine_rom~228_combout ),
  25119. .D(\macro_inst|apb_dac0_inst|sine_rom~216_combout ),
  25120. .Cin(),
  25121. .Qin(),
  25122. .Clk(),
  25123. .AsyncReset(),
  25124. .SyncReset(),
  25125. .ShiftData(),
  25126. .SyncLoad(),
  25127. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~232_combout ),
  25128. .Cout(),
  25129. .Q());
  25130. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .coord_x = 18;
  25131. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .coord_y = 2;
  25132. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .coord_z = 3;
  25133. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .mask = 16'hBCB0;
  25134. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .modeMux = 1'b0;
  25135. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .FeedbackMux = 1'b0;
  25136. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .ShiftMux = 1'b0;
  25137. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .BypassEn = 1'b0;
  25138. defparam \macro_inst|apb_dac0_inst|sine_rom~232 .CarryEnb = 1'b1;
  25139. alta_slice \macro_inst|apb_dac0_inst|sine_rom~233 (
  25140. .A(\macro_inst|apb_dac0_inst|sine_rom~232_combout ),
  25141. .B(\macro_inst|apb_dac0_inst|sine_rom~210_combout ),
  25142. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  25143. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  25144. .Cin(),
  25145. .Qin(),
  25146. .Clk(),
  25147. .AsyncReset(),
  25148. .SyncReset(),
  25149. .ShiftData(),
  25150. .SyncLoad(),
  25151. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~233_combout ),
  25152. .Cout(),
  25153. .Q());
  25154. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .coord_x = 18;
  25155. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .coord_y = 2;
  25156. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .coord_z = 2;
  25157. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .mask = 16'hDCEC;
  25158. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .modeMux = 1'b0;
  25159. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .FeedbackMux = 1'b0;
  25160. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .ShiftMux = 1'b0;
  25161. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .BypassEn = 1'b0;
  25162. defparam \macro_inst|apb_dac0_inst|sine_rom~233 .CarryEnb = 1'b1;
  25163. alta_slice \macro_inst|apb_dac0_inst|sine_rom~234 (
  25164. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  25165. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  25166. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25167. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25168. .Cin(),
  25169. .Qin(),
  25170. .Clk(),
  25171. .AsyncReset(),
  25172. .SyncReset(),
  25173. .ShiftData(),
  25174. .SyncLoad(),
  25175. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~234_combout ),
  25176. .Cout(),
  25177. .Q());
  25178. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .coord_x = 14;
  25179. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .coord_y = 5;
  25180. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .coord_z = 10;
  25181. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .mask = 16'h0001;
  25182. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .modeMux = 1'b0;
  25183. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .FeedbackMux = 1'b0;
  25184. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .ShiftMux = 1'b0;
  25185. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .BypassEn = 1'b0;
  25186. defparam \macro_inst|apb_dac0_inst|sine_rom~234 .CarryEnb = 1'b1;
  25187. alta_slice \macro_inst|apb_dac0_inst|sine_rom~235 (
  25188. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  25189. .B(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  25190. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  25191. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  25192. .Cin(),
  25193. .Qin(),
  25194. .Clk(),
  25195. .AsyncReset(),
  25196. .SyncReset(),
  25197. .ShiftData(),
  25198. .SyncLoad(),
  25199. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~235_combout ),
  25200. .Cout(),
  25201. .Q());
  25202. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .coord_x = 14;
  25203. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .coord_y = 5;
  25204. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .coord_z = 8;
  25205. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .mask = 16'hE5FF;
  25206. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .modeMux = 1'b0;
  25207. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .FeedbackMux = 1'b0;
  25208. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .ShiftMux = 1'b0;
  25209. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .BypassEn = 1'b0;
  25210. defparam \macro_inst|apb_dac0_inst|sine_rom~235 .CarryEnb = 1'b1;
  25211. alta_slice \macro_inst|apb_dac0_inst|sine_rom~236 (
  25212. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  25213. .B(\macro_inst|apb_dac0_inst|sine_rom~8_combout ),
  25214. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25215. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  25216. .Cin(),
  25217. .Qin(),
  25218. .Clk(),
  25219. .AsyncReset(),
  25220. .SyncReset(),
  25221. .ShiftData(),
  25222. .SyncLoad(),
  25223. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~236_combout ),
  25224. .Cout(),
  25225. .Q());
  25226. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .coord_x = 14;
  25227. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .coord_y = 5;
  25228. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .coord_z = 9;
  25229. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .mask = 16'hB515;
  25230. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .modeMux = 1'b0;
  25231. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .FeedbackMux = 1'b0;
  25232. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .ShiftMux = 1'b0;
  25233. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .BypassEn = 1'b0;
  25234. defparam \macro_inst|apb_dac0_inst|sine_rom~236 .CarryEnb = 1'b1;
  25235. alta_slice \macro_inst|apb_dac0_inst|sine_rom~237 (
  25236. .A(vcc),
  25237. .B(vcc),
  25238. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25239. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  25240. .Cin(),
  25241. .Qin(),
  25242. .Clk(),
  25243. .AsyncReset(),
  25244. .SyncReset(),
  25245. .ShiftData(),
  25246. .SyncLoad(),
  25247. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~237_combout ),
  25248. .Cout(),
  25249. .Q());
  25250. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .coord_x = 18;
  25251. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .coord_y = 1;
  25252. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .coord_z = 9;
  25253. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .mask = 16'h00F0;
  25254. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .modeMux = 1'b0;
  25255. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .FeedbackMux = 1'b0;
  25256. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .ShiftMux = 1'b0;
  25257. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .BypassEn = 1'b0;
  25258. defparam \macro_inst|apb_dac0_inst|sine_rom~237 .CarryEnb = 1'b1;
  25259. alta_slice \macro_inst|apb_dac0_inst|sine_rom~238 (
  25260. .A(vcc),
  25261. .B(vcc),
  25262. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25263. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  25264. .Cin(),
  25265. .Qin(),
  25266. .Clk(),
  25267. .AsyncReset(),
  25268. .SyncReset(),
  25269. .ShiftData(),
  25270. .SyncLoad(),
  25271. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~238_combout ),
  25272. .Cout(),
  25273. .Q());
  25274. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .coord_x = 18;
  25275. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .coord_y = 1;
  25276. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .coord_z = 1;
  25277. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .mask = 16'h0F00;
  25278. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .modeMux = 1'b0;
  25279. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .FeedbackMux = 1'b0;
  25280. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .ShiftMux = 1'b0;
  25281. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .BypassEn = 1'b0;
  25282. defparam \macro_inst|apb_dac0_inst|sine_rom~238 .CarryEnb = 1'b1;
  25283. alta_slice \macro_inst|apb_dac0_inst|sine_rom~239 (
  25284. .A(vcc),
  25285. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  25286. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25287. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25288. .Cin(),
  25289. .Qin(),
  25290. .Clk(),
  25291. .AsyncReset(),
  25292. .SyncReset(),
  25293. .ShiftData(),
  25294. .SyncLoad(),
  25295. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~239_combout ),
  25296. .Cout(),
  25297. .Q());
  25298. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .coord_x = 18;
  25299. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .coord_y = 1;
  25300. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .coord_z = 6;
  25301. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .mask = 16'hCCCF;
  25302. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .modeMux = 1'b0;
  25303. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .FeedbackMux = 1'b0;
  25304. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .ShiftMux = 1'b0;
  25305. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .BypassEn = 1'b0;
  25306. defparam \macro_inst|apb_dac0_inst|sine_rom~239 .CarryEnb = 1'b1;
  25307. alta_slice \macro_inst|apb_dac0_inst|sine_rom~24 (
  25308. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  25309. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  25310. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25311. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25312. .Cin(),
  25313. .Qin(),
  25314. .Clk(),
  25315. .AsyncReset(),
  25316. .SyncReset(),
  25317. .ShiftData(),
  25318. .SyncLoad(),
  25319. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~24_combout ),
  25320. .Cout(),
  25321. .Q());
  25322. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .coord_x = 8;
  25323. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .coord_y = 2;
  25324. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .coord_z = 6;
  25325. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .mask = 16'h6AAA;
  25326. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .modeMux = 1'b0;
  25327. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .FeedbackMux = 1'b0;
  25328. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .ShiftMux = 1'b0;
  25329. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .BypassEn = 1'b0;
  25330. defparam \macro_inst|apb_dac0_inst|sine_rom~24 .CarryEnb = 1'b1;
  25331. alta_slice \macro_inst|apb_dac0_inst|sine_rom~240 (
  25332. .A(\macro_inst|apb_dac0_inst|sine_rom~239_combout ),
  25333. .B(\macro_inst|apb_dac0_inst|sine_rom~238_combout ),
  25334. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25335. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  25336. .Cin(),
  25337. .Qin(),
  25338. .Clk(),
  25339. .AsyncReset(),
  25340. .SyncReset(),
  25341. .ShiftData(),
  25342. .SyncLoad(),
  25343. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~240_combout ),
  25344. .Cout(),
  25345. .Q());
  25346. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .coord_x = 18;
  25347. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .coord_y = 1;
  25348. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .coord_z = 4;
  25349. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .mask = 16'hFC0A;
  25350. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .modeMux = 1'b0;
  25351. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .FeedbackMux = 1'b0;
  25352. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .ShiftMux = 1'b0;
  25353. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .BypassEn = 1'b0;
  25354. defparam \macro_inst|apb_dac0_inst|sine_rom~240 .CarryEnb = 1'b1;
  25355. alta_slice \macro_inst|apb_dac0_inst|sine_rom~241 (
  25356. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  25357. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  25358. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25359. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25360. .Cin(),
  25361. .Qin(),
  25362. .Clk(),
  25363. .AsyncReset(),
  25364. .SyncReset(),
  25365. .ShiftData(),
  25366. .SyncLoad(),
  25367. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~241_combout ),
  25368. .Cout(),
  25369. .Q());
  25370. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .coord_x = 18;
  25371. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .coord_y = 1;
  25372. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .coord_z = 11;
  25373. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .mask = 16'h3230;
  25374. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .modeMux = 1'b0;
  25375. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .FeedbackMux = 1'b0;
  25376. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .ShiftMux = 1'b0;
  25377. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .BypassEn = 1'b0;
  25378. defparam \macro_inst|apb_dac0_inst|sine_rom~241 .CarryEnb = 1'b1;
  25379. alta_slice \macro_inst|apb_dac0_inst|sine_rom~242 (
  25380. .A(\macro_inst|apb_dac0_inst|sine_rom~240_combout ),
  25381. .B(\macro_inst|apb_dac0_inst|sine_rom~241_combout ),
  25382. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25383. .D(\macro_inst|apb_dac0_inst|sine_rom~237_combout ),
  25384. .Cin(),
  25385. .Qin(),
  25386. .Clk(),
  25387. .AsyncReset(),
  25388. .SyncReset(),
  25389. .ShiftData(),
  25390. .SyncLoad(),
  25391. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~242_combout ),
  25392. .Cout(),
  25393. .Q());
  25394. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .coord_x = 18;
  25395. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .coord_y = 1;
  25396. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .coord_z = 7;
  25397. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .mask = 16'hDA8A;
  25398. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .modeMux = 1'b0;
  25399. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .FeedbackMux = 1'b0;
  25400. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .ShiftMux = 1'b0;
  25401. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .BypassEn = 1'b0;
  25402. defparam \macro_inst|apb_dac0_inst|sine_rom~242 .CarryEnb = 1'b1;
  25403. alta_slice \macro_inst|apb_dac0_inst|sine_rom~243 (
  25404. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  25405. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  25406. .C(\macro_inst|apb_dac0_inst|sine_rom~242_combout ),
  25407. .D(\macro_inst|apb_dac0_inst|sine_rom~236_combout ),
  25408. .Cin(),
  25409. .Qin(),
  25410. .Clk(),
  25411. .AsyncReset(),
  25412. .SyncReset(),
  25413. .ShiftData(),
  25414. .SyncLoad(),
  25415. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~243_combout ),
  25416. .Cout(),
  25417. .Q());
  25418. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .coord_x = 14;
  25419. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .coord_y = 5;
  25420. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .coord_z = 5;
  25421. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .mask = 16'hD580;
  25422. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .modeMux = 1'b0;
  25423. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .FeedbackMux = 1'b0;
  25424. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .ShiftMux = 1'b0;
  25425. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .BypassEn = 1'b0;
  25426. defparam \macro_inst|apb_dac0_inst|sine_rom~243 .CarryEnb = 1'b1;
  25427. alta_slice \macro_inst|apb_dac0_inst|sine_rom~244 (
  25428. .A(\macro_inst|apb_dac0_inst|sine_rom~234_combout ),
  25429. .B(\macro_inst|apb_dac0_inst|sine_rom~243_combout ),
  25430. .C(\macro_inst|apb_dac0_inst|sine_rom~235_combout ),
  25431. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  25432. .Cin(),
  25433. .Qin(),
  25434. .Clk(),
  25435. .AsyncReset(),
  25436. .SyncReset(),
  25437. .ShiftData(),
  25438. .SyncLoad(),
  25439. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~244_combout ),
  25440. .Cout(),
  25441. .Q());
  25442. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .coord_x = 14;
  25443. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .coord_y = 5;
  25444. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .coord_z = 12;
  25445. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .mask = 16'hCCFE;
  25446. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .modeMux = 1'b0;
  25447. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .FeedbackMux = 1'b0;
  25448. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .ShiftMux = 1'b0;
  25449. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .BypassEn = 1'b0;
  25450. defparam \macro_inst|apb_dac0_inst|sine_rom~244 .CarryEnb = 1'b1;
  25451. alta_slice \macro_inst|apb_dac0_inst|sine_rom~245 (
  25452. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  25453. .B(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  25454. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  25455. .D(\macro_inst|apb_dac0_inst|sine_rom~19_combout ),
  25456. .Cin(),
  25457. .Qin(),
  25458. .Clk(),
  25459. .AsyncReset(),
  25460. .SyncReset(),
  25461. .ShiftData(),
  25462. .SyncLoad(),
  25463. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~245_combout ),
  25464. .Cout(),
  25465. .Q());
  25466. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .coord_x = 19;
  25467. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .coord_y = 2;
  25468. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .coord_z = 2;
  25469. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .mask = 16'hF1A1;
  25470. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .modeMux = 1'b0;
  25471. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .FeedbackMux = 1'b0;
  25472. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .ShiftMux = 1'b0;
  25473. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .BypassEn = 1'b0;
  25474. defparam \macro_inst|apb_dac0_inst|sine_rom~245 .CarryEnb = 1'b1;
  25475. alta_slice \macro_inst|apb_dac0_inst|sine_rom~246 (
  25476. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  25477. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  25478. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  25479. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25480. .Cin(),
  25481. .Qin(),
  25482. .Clk(),
  25483. .AsyncReset(),
  25484. .SyncReset(),
  25485. .ShiftData(),
  25486. .SyncLoad(),
  25487. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~246_combout ),
  25488. .Cout(),
  25489. .Q());
  25490. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .coord_x = 9;
  25491. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .coord_y = 1;
  25492. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .coord_z = 0;
  25493. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .mask = 16'h8000;
  25494. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .modeMux = 1'b0;
  25495. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .FeedbackMux = 1'b0;
  25496. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .ShiftMux = 1'b0;
  25497. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .BypassEn = 1'b0;
  25498. defparam \macro_inst|apb_dac0_inst|sine_rom~246 .CarryEnb = 1'b1;
  25499. alta_slice \macro_inst|apb_dac0_inst|sine_rom~247 (
  25500. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  25501. .B(\macro_inst|apb_dac0_inst|sine_rom~246_combout ),
  25502. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25503. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  25504. .Cin(),
  25505. .Qin(),
  25506. .Clk(),
  25507. .AsyncReset(),
  25508. .SyncReset(),
  25509. .ShiftData(),
  25510. .SyncLoad(),
  25511. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~247_combout ),
  25512. .Cout(),
  25513. .Q());
  25514. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .coord_x = 14;
  25515. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .coord_y = 5;
  25516. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .coord_z = 13;
  25517. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .mask = 16'hADFD;
  25518. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .modeMux = 1'b0;
  25519. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .FeedbackMux = 1'b0;
  25520. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .ShiftMux = 1'b0;
  25521. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .BypassEn = 1'b0;
  25522. defparam \macro_inst|apb_dac0_inst|sine_rom~247 .CarryEnb = 1'b1;
  25523. alta_slice \macro_inst|apb_dac0_inst|sine_rom~248 (
  25524. .A(\macro_inst|apb_dac0_inst|sine_rom~245_combout ),
  25525. .B(\macro_inst|apb_dac0_inst|sine_rom~247_combout ),
  25526. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  25527. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  25528. .Cin(),
  25529. .Qin(),
  25530. .Clk(),
  25531. .AsyncReset(),
  25532. .SyncReset(),
  25533. .ShiftData(),
  25534. .SyncLoad(),
  25535. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~248_combout ),
  25536. .Cout(),
  25537. .Q());
  25538. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .coord_x = 14;
  25539. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .coord_y = 5;
  25540. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .coord_z = 0;
  25541. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .mask = 16'hFAC0;
  25542. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .modeMux = 1'b0;
  25543. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .FeedbackMux = 1'b0;
  25544. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .ShiftMux = 1'b0;
  25545. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .BypassEn = 1'b0;
  25546. defparam \macro_inst|apb_dac0_inst|sine_rom~248 .CarryEnb = 1'b1;
  25547. alta_slice \macro_inst|apb_dac0_inst|sine_rom~249 (
  25548. .A(vcc),
  25549. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  25550. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25551. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25552. .Cin(),
  25553. .Qin(),
  25554. .Clk(),
  25555. .AsyncReset(),
  25556. .SyncReset(),
  25557. .ShiftData(),
  25558. .SyncLoad(),
  25559. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~249_combout ),
  25560. .Cout(),
  25561. .Q());
  25562. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .coord_x = 18;
  25563. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .coord_y = 1;
  25564. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .coord_z = 12;
  25565. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .mask = 16'hF333;
  25566. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .modeMux = 1'b0;
  25567. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .FeedbackMux = 1'b0;
  25568. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .ShiftMux = 1'b0;
  25569. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .BypassEn = 1'b0;
  25570. defparam \macro_inst|apb_dac0_inst|sine_rom~249 .CarryEnb = 1'b1;
  25571. alta_slice \macro_inst|apb_dac0_inst|sine_rom~25 (
  25572. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  25573. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  25574. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25575. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25576. .Cin(),
  25577. .Qin(),
  25578. .Clk(),
  25579. .AsyncReset(),
  25580. .SyncReset(),
  25581. .ShiftData(),
  25582. .SyncLoad(),
  25583. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~25_combout ),
  25584. .Cout(),
  25585. .Q());
  25586. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .coord_x = 8;
  25587. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .coord_y = 2;
  25588. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .coord_z = 11;
  25589. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .mask = 16'h5F44;
  25590. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .modeMux = 1'b0;
  25591. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .FeedbackMux = 1'b0;
  25592. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .ShiftMux = 1'b0;
  25593. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .BypassEn = 1'b0;
  25594. defparam \macro_inst|apb_dac0_inst|sine_rom~25 .CarryEnb = 1'b1;
  25595. alta_slice \macro_inst|apb_dac0_inst|sine_rom~250 (
  25596. .A(\macro_inst|apb_dac0_inst|sine_rom~249_combout ),
  25597. .B(\macro_inst|apb_dac0_inst|sine_rom~238_combout ),
  25598. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25599. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  25600. .Cin(),
  25601. .Qin(),
  25602. .Clk(),
  25603. .AsyncReset(),
  25604. .SyncReset(),
  25605. .ShiftData(),
  25606. .SyncLoad(),
  25607. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~250_combout ),
  25608. .Cout(),
  25609. .Q());
  25610. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .coord_x = 18;
  25611. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .coord_y = 1;
  25612. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .coord_z = 13;
  25613. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .mask = 16'hFC05;
  25614. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .modeMux = 1'b0;
  25615. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .FeedbackMux = 1'b0;
  25616. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .ShiftMux = 1'b0;
  25617. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .BypassEn = 1'b0;
  25618. defparam \macro_inst|apb_dac0_inst|sine_rom~250 .CarryEnb = 1'b1;
  25619. alta_slice \macro_inst|apb_dac0_inst|sine_rom~251 (
  25620. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  25621. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  25622. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  25623. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25624. .Cin(),
  25625. .Qin(),
  25626. .Clk(),
  25627. .AsyncReset(),
  25628. .SyncReset(),
  25629. .ShiftData(),
  25630. .SyncLoad(),
  25631. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~251_combout ),
  25632. .Cout(),
  25633. .Q());
  25634. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .coord_x = 18;
  25635. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .coord_y = 1;
  25636. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .coord_z = 14;
  25637. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .mask = 16'hB332;
  25638. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .modeMux = 1'b0;
  25639. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .FeedbackMux = 1'b0;
  25640. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .ShiftMux = 1'b0;
  25641. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .BypassEn = 1'b0;
  25642. defparam \macro_inst|apb_dac0_inst|sine_rom~251 .CarryEnb = 1'b1;
  25643. alta_slice \macro_inst|apb_dac0_inst|sine_rom~252 (
  25644. .A(\macro_inst|apb_dac0_inst|sine_rom~251_combout ),
  25645. .B(\macro_inst|apb_dac0_inst|sine_rom~250_combout ),
  25646. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25647. .D(\macro_inst|apb_dac0_inst|sine_rom~237_combout ),
  25648. .Cin(),
  25649. .Qin(),
  25650. .Clk(),
  25651. .AsyncReset(),
  25652. .SyncReset(),
  25653. .ShiftData(),
  25654. .SyncLoad(),
  25655. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~252_combout ),
  25656. .Cout(),
  25657. .Q());
  25658. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .coord_x = 18;
  25659. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .coord_y = 1;
  25660. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .coord_z = 3;
  25661. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .mask = 16'hBC8C;
  25662. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .modeMux = 1'b0;
  25663. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .FeedbackMux = 1'b0;
  25664. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .ShiftMux = 1'b0;
  25665. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .BypassEn = 1'b0;
  25666. defparam \macro_inst|apb_dac0_inst|sine_rom~252 .CarryEnb = 1'b1;
  25667. alta_slice \macro_inst|apb_dac0_inst|sine_rom~254 (
  25668. .A(\macro_inst|apb_dac0_inst|sine_rom~244_combout ),
  25669. .B(\macro_inst|apb_dac0_inst|sine_rom~253_combout ),
  25670. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  25671. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  25672. .Cin(),
  25673. .Qin(),
  25674. .Clk(),
  25675. .AsyncReset(),
  25676. .SyncReset(),
  25677. .ShiftData(),
  25678. .SyncLoad(),
  25679. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~254_combout ),
  25680. .Cout(),
  25681. .Q());
  25682. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .coord_x = 18;
  25683. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .coord_y = 2;
  25684. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .coord_z = 13;
  25685. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .mask = 16'h00AC;
  25686. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .modeMux = 1'b0;
  25687. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .FeedbackMux = 1'b0;
  25688. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .ShiftMux = 1'b0;
  25689. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .BypassEn = 1'b0;
  25690. defparam \macro_inst|apb_dac0_inst|sine_rom~254 .CarryEnb = 1'b1;
  25691. alta_slice \macro_inst|apb_dac0_inst|sine_rom~255 (
  25692. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  25693. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  25694. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  25695. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25696. .Cin(),
  25697. .Qin(),
  25698. .Clk(),
  25699. .AsyncReset(),
  25700. .SyncReset(),
  25701. .ShiftData(),
  25702. .SyncLoad(),
  25703. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~255_combout ),
  25704. .Cout(),
  25705. .Q());
  25706. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .coord_x = 9;
  25707. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .coord_y = 1;
  25708. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .coord_z = 13;
  25709. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .mask = 16'h0001;
  25710. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .modeMux = 1'b0;
  25711. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .FeedbackMux = 1'b0;
  25712. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .ShiftMux = 1'b0;
  25713. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .BypassEn = 1'b0;
  25714. defparam \macro_inst|apb_dac0_inst|sine_rom~255 .CarryEnb = 1'b1;
  25715. alta_slice \macro_inst|apb_dac0_inst|sine_rom~256 (
  25716. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  25717. .B(\macro_inst|apb_dac0_inst|sine_rom~255_combout ),
  25718. .C(\macro_inst|apb_dac0_inst|sine_rom~4_combout ),
  25719. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  25720. .Cin(),
  25721. .Qin(),
  25722. .Clk(),
  25723. .AsyncReset(),
  25724. .SyncReset(),
  25725. .ShiftData(),
  25726. .SyncLoad(),
  25727. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~256_combout ),
  25728. .Cout(),
  25729. .Q());
  25730. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .coord_x = 9;
  25731. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .coord_y = 1;
  25732. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .coord_z = 12;
  25733. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .mask = 16'hAF11;
  25734. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .modeMux = 1'b0;
  25735. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .FeedbackMux = 1'b0;
  25736. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .ShiftMux = 1'b0;
  25737. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .BypassEn = 1'b0;
  25738. defparam \macro_inst|apb_dac0_inst|sine_rom~256 .CarryEnb = 1'b1;
  25739. alta_slice \macro_inst|apb_dac0_inst|sine_rom~257 (
  25740. .A(\macro_inst|apb_dac0_inst|sine_rom~256_combout ),
  25741. .B(\macro_inst|apb_dac0_inst|sine_rom~246_combout ),
  25742. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  25743. .D(\macro_inst|apb_dac0_inst|sine_rom~21_combout ),
  25744. .Cin(),
  25745. .Qin(),
  25746. .Clk(),
  25747. .AsyncReset(),
  25748. .SyncReset(),
  25749. .ShiftData(),
  25750. .SyncLoad(),
  25751. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~257_combout ),
  25752. .Cout(),
  25753. .Q());
  25754. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .coord_x = 9;
  25755. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .coord_y = 1;
  25756. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .coord_z = 1;
  25757. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .mask = 16'h2A7A;
  25758. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .modeMux = 1'b0;
  25759. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .FeedbackMux = 1'b0;
  25760. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .ShiftMux = 1'b0;
  25761. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .BypassEn = 1'b0;
  25762. defparam \macro_inst|apb_dac0_inst|sine_rom~257 .CarryEnb = 1'b1;
  25763. alta_slice \macro_inst|apb_dac0_inst|sine_rom~258 (
  25764. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  25765. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  25766. .C(\macro_inst|apb_dac0_inst|sine_rom~257_combout ),
  25767. .D(\macro_inst|apb_dac0_inst|sine_rom~247_combout ),
  25768. .Cin(),
  25769. .Qin(),
  25770. .Clk(),
  25771. .AsyncReset(),
  25772. .SyncReset(),
  25773. .ShiftData(),
  25774. .SyncLoad(),
  25775. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~258_combout ),
  25776. .Cout(),
  25777. .Q());
  25778. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .coord_x = 14;
  25779. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .coord_y = 5;
  25780. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .coord_z = 14;
  25781. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .mask = 16'h1054;
  25782. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .modeMux = 1'b0;
  25783. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .FeedbackMux = 1'b0;
  25784. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .ShiftMux = 1'b0;
  25785. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .BypassEn = 1'b0;
  25786. defparam \macro_inst|apb_dac0_inst|sine_rom~258 .CarryEnb = 1'b1;
  25787. alta_slice \macro_inst|apb_dac0_inst|sine_rom~259 (
  25788. .A(\macro_inst|apb_dac0_inst|sine_rom~245_combout ),
  25789. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  25790. .C(\macro_inst|apb_dac0_inst|sine_rom~258_combout ),
  25791. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  25792. .Cin(),
  25793. .Qin(),
  25794. .Clk(),
  25795. .AsyncReset(),
  25796. .SyncReset(),
  25797. .ShiftData(),
  25798. .SyncLoad(),
  25799. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~259_combout ),
  25800. .Cout(),
  25801. .Q());
  25802. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .coord_x = 14;
  25803. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .coord_y = 5;
  25804. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .coord_z = 2;
  25805. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .mask = 16'hF1F0;
  25806. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .modeMux = 1'b0;
  25807. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .FeedbackMux = 1'b0;
  25808. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .ShiftMux = 1'b0;
  25809. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .BypassEn = 1'b0;
  25810. defparam \macro_inst|apb_dac0_inst|sine_rom~259 .CarryEnb = 1'b1;
  25811. alta_slice \macro_inst|apb_dac0_inst|sine_rom~26 (
  25812. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  25813. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  25814. .C(\macro_inst|apb_dac0_inst|sine_rom~24_combout ),
  25815. .D(\macro_inst|apb_dac0_inst|sine_rom~25_combout ),
  25816. .Cin(),
  25817. .Qin(),
  25818. .Clk(),
  25819. .AsyncReset(),
  25820. .SyncReset(),
  25821. .ShiftData(),
  25822. .SyncLoad(),
  25823. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~26_combout ),
  25824. .Cout(),
  25825. .Q());
  25826. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .coord_x = 8;
  25827. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .coord_y = 2;
  25828. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .coord_z = 3;
  25829. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .mask = 16'h47A6;
  25830. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .modeMux = 1'b0;
  25831. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .FeedbackMux = 1'b0;
  25832. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .ShiftMux = 1'b0;
  25833. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .BypassEn = 1'b0;
  25834. defparam \macro_inst|apb_dac0_inst|sine_rom~26 .CarryEnb = 1'b1;
  25835. alta_slice \macro_inst|apb_dac0_inst|sine_rom~260 (
  25836. .A(\macro_inst|apb_dac0_inst|sine_rom~244_combout ),
  25837. .B(\macro_inst|apb_dac0_inst|sine_rom~259_combout ),
  25838. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  25839. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  25840. .Cin(),
  25841. .Qin(),
  25842. .Clk(),
  25843. .AsyncReset(),
  25844. .SyncReset(),
  25845. .ShiftData(),
  25846. .SyncLoad(),
  25847. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~260_combout ),
  25848. .Cout(),
  25849. .Q());
  25850. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .coord_x = 18;
  25851. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .coord_y = 2;
  25852. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .coord_z = 10;
  25853. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .mask = 16'h5C00;
  25854. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .modeMux = 1'b0;
  25855. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .FeedbackMux = 1'b0;
  25856. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .ShiftMux = 1'b0;
  25857. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .BypassEn = 1'b0;
  25858. defparam \macro_inst|apb_dac0_inst|sine_rom~260 .CarryEnb = 1'b1;
  25859. alta_slice \macro_inst|apb_dac0_inst|sine_rom~261 (
  25860. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  25861. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  25862. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  25863. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  25864. .Cin(),
  25865. .Qin(),
  25866. .Clk(),
  25867. .AsyncReset(),
  25868. .SyncReset(),
  25869. .ShiftData(),
  25870. .SyncLoad(),
  25871. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~261_combout ),
  25872. .Cout(),
  25873. .Q());
  25874. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .coord_x = 17;
  25875. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .coord_y = 1;
  25876. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .coord_z = 2;
  25877. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .mask = 16'hA888;
  25878. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .modeMux = 1'b0;
  25879. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .FeedbackMux = 1'b0;
  25880. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .ShiftMux = 1'b0;
  25881. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .BypassEn = 1'b0;
  25882. defparam \macro_inst|apb_dac0_inst|sine_rom~261 .CarryEnb = 1'b1;
  25883. alta_slice \macro_inst|apb_dac0_inst|sine_rom~262 (
  25884. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  25885. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  25886. .C(\macro_inst|apb_dac0_inst|sine_rom~261_combout ),
  25887. .D(\macro_inst|apb_dac0_inst|sine_rom~6_combout ),
  25888. .Cin(),
  25889. .Qin(),
  25890. .Clk(),
  25891. .AsyncReset(),
  25892. .SyncReset(),
  25893. .ShiftData(),
  25894. .SyncLoad(),
  25895. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~262_combout ),
  25896. .Cout(),
  25897. .Q());
  25898. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .coord_x = 18;
  25899. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .coord_y = 2;
  25900. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .coord_z = 0;
  25901. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .mask = 16'hB830;
  25902. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .modeMux = 1'b0;
  25903. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .FeedbackMux = 1'b0;
  25904. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .ShiftMux = 1'b0;
  25905. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .BypassEn = 1'b0;
  25906. defparam \macro_inst|apb_dac0_inst|sine_rom~262 .CarryEnb = 1'b1;
  25907. alta_slice \macro_inst|apb_dac0_inst|sine_rom~263 (
  25908. .A(vcc),
  25909. .B(vcc),
  25910. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25911. .D(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  25912. .Cin(),
  25913. .Qin(),
  25914. .Clk(),
  25915. .AsyncReset(),
  25916. .SyncReset(),
  25917. .ShiftData(),
  25918. .SyncLoad(),
  25919. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~263_combout ),
  25920. .Cout(),
  25921. .Q());
  25922. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .coord_x = 17;
  25923. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .coord_y = 1;
  25924. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .coord_z = 15;
  25925. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .mask = 16'h000F;
  25926. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .modeMux = 1'b0;
  25927. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .FeedbackMux = 1'b0;
  25928. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .ShiftMux = 1'b0;
  25929. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .BypassEn = 1'b0;
  25930. defparam \macro_inst|apb_dac0_inst|sine_rom~263 .CarryEnb = 1'b1;
  25931. alta_slice \macro_inst|apb_dac0_inst|sine_rom~264 (
  25932. .A(\macro_inst|apb_dac0_inst|sine_rom~340_combout ),
  25933. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  25934. .C(\macro_inst|apb_dac0_inst|sine_rom~262_combout ),
  25935. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  25936. .Cin(),
  25937. .Qin(),
  25938. .Clk(),
  25939. .AsyncReset(),
  25940. .SyncReset(),
  25941. .ShiftData(),
  25942. .SyncLoad(),
  25943. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~264_combout ),
  25944. .Cout(),
  25945. .Q());
  25946. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .coord_x = 18;
  25947. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .coord_y = 2;
  25948. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .coord_z = 5;
  25949. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .mask = 16'h267F;
  25950. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .modeMux = 1'b0;
  25951. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .FeedbackMux = 1'b0;
  25952. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .ShiftMux = 1'b0;
  25953. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .BypassEn = 1'b0;
  25954. defparam \macro_inst|apb_dac0_inst|sine_rom~264 .CarryEnb = 1'b1;
  25955. alta_slice \macro_inst|apb_dac0_inst|sine_rom~265 (
  25956. .A(\macro_inst|apb_dac0_inst|sine_rom~255_combout ),
  25957. .B(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  25958. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  25959. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  25960. .Cin(),
  25961. .Qin(),
  25962. .Clk(),
  25963. .AsyncReset(),
  25964. .SyncReset(),
  25965. .ShiftData(),
  25966. .SyncLoad(),
  25967. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~265_combout ),
  25968. .Cout(),
  25969. .Q());
  25970. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .coord_x = 17;
  25971. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .coord_y = 1;
  25972. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .coord_z = 3;
  25973. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .mask = 16'h03F5;
  25974. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .modeMux = 1'b0;
  25975. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .FeedbackMux = 1'b0;
  25976. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .ShiftMux = 1'b0;
  25977. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .BypassEn = 1'b0;
  25978. defparam \macro_inst|apb_dac0_inst|sine_rom~265 .CarryEnb = 1'b1;
  25979. alta_slice \macro_inst|apb_dac0_inst|sine_rom~266 (
  25980. .A(\macro_inst|apb_dac0_inst|sine_rom~263_combout ),
  25981. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  25982. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  25983. .D(\macro_inst|apb_dac0_inst|sine_rom~265_combout ),
  25984. .Cin(),
  25985. .Qin(),
  25986. .Clk(),
  25987. .AsyncReset(),
  25988. .SyncReset(),
  25989. .ShiftData(),
  25990. .SyncLoad(),
  25991. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~266_combout ),
  25992. .Cout(),
  25993. .Q());
  25994. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .coord_x = 17;
  25995. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .coord_y = 1;
  25996. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .coord_z = 14;
  25997. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .mask = 16'h3202;
  25998. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .modeMux = 1'b0;
  25999. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .FeedbackMux = 1'b0;
  26000. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .ShiftMux = 1'b0;
  26001. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .BypassEn = 1'b0;
  26002. defparam \macro_inst|apb_dac0_inst|sine_rom~266 .CarryEnb = 1'b1;
  26003. alta_slice \macro_inst|apb_dac0_inst|sine_rom~267 (
  26004. .A(\macro_inst|apb_dac0_inst|sine_rom~266_combout ),
  26005. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  26006. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  26007. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  26008. .Cin(),
  26009. .Qin(),
  26010. .Clk(),
  26011. .AsyncReset(),
  26012. .SyncReset(),
  26013. .ShiftData(),
  26014. .SyncLoad(),
  26015. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~267_combout ),
  26016. .Cout(),
  26017. .Q());
  26018. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .coord_x = 17;
  26019. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .coord_y = 1;
  26020. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .coord_z = 13;
  26021. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .mask = 16'h2D20;
  26022. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .modeMux = 1'b0;
  26023. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .FeedbackMux = 1'b0;
  26024. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .ShiftMux = 1'b0;
  26025. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .BypassEn = 1'b0;
  26026. defparam \macro_inst|apb_dac0_inst|sine_rom~267 .CarryEnb = 1'b1;
  26027. alta_slice \macro_inst|apb_dac0_inst|sine_rom~268 (
  26028. .A(vcc),
  26029. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  26030. .C(\macro_inst|apb_dac0_inst|sine_rom~261_combout ),
  26031. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  26032. .Cin(),
  26033. .Qin(),
  26034. .Clk(),
  26035. .AsyncReset(),
  26036. .SyncReset(),
  26037. .ShiftData(),
  26038. .SyncLoad(),
  26039. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~268_combout ),
  26040. .Cout(),
  26041. .Q());
  26042. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .coord_x = 17;
  26043. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .coord_y = 1;
  26044. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .coord_z = 6;
  26045. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .mask = 16'hCCC0;
  26046. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .modeMux = 1'b0;
  26047. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .FeedbackMux = 1'b0;
  26048. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .ShiftMux = 1'b0;
  26049. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .BypassEn = 1'b0;
  26050. defparam \macro_inst|apb_dac0_inst|sine_rom~268 .CarryEnb = 1'b1;
  26051. alta_slice \macro_inst|apb_dac0_inst|sine_rom~269 (
  26052. .A(\macro_inst|apb_dac0_inst|sine_rom~268_combout ),
  26053. .B(\macro_inst|apb_dac0_inst|sine_rom~21_combout ),
  26054. .C(\macro_inst|apb_dac0_inst|sine_rom~163_combout ),
  26055. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  26056. .Cin(),
  26057. .Qin(),
  26058. .Clk(),
  26059. .AsyncReset(),
  26060. .SyncReset(),
  26061. .ShiftData(),
  26062. .SyncLoad(),
  26063. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~269_combout ),
  26064. .Cout(),
  26065. .Q());
  26066. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .coord_x = 17;
  26067. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .coord_y = 1;
  26068. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .coord_z = 5;
  26069. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .mask = 16'h00EA;
  26070. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .modeMux = 1'b0;
  26071. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .FeedbackMux = 1'b0;
  26072. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .ShiftMux = 1'b0;
  26073. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .BypassEn = 1'b0;
  26074. defparam \macro_inst|apb_dac0_inst|sine_rom~269 .CarryEnb = 1'b1;
  26075. alta_slice \macro_inst|apb_dac0_inst|sine_rom~27 (
  26076. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  26077. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26078. .C(\macro_inst|apb_dac0_inst|sine_rom~24_combout ),
  26079. .D(\macro_inst|apb_dac0_inst|sine_rom~25_combout ),
  26080. .Cin(),
  26081. .Qin(),
  26082. .Clk(),
  26083. .AsyncReset(),
  26084. .SyncReset(),
  26085. .ShiftData(),
  26086. .SyncLoad(),
  26087. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~27_combout ),
  26088. .Cout(),
  26089. .Q());
  26090. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .coord_x = 8;
  26091. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .coord_y = 2;
  26092. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .coord_z = 9;
  26093. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .mask = 16'hBA18;
  26094. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .modeMux = 1'b0;
  26095. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .FeedbackMux = 1'b0;
  26096. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .ShiftMux = 1'b0;
  26097. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .BypassEn = 1'b0;
  26098. defparam \macro_inst|apb_dac0_inst|sine_rom~27 .CarryEnb = 1'b1;
  26099. alta_slice \macro_inst|apb_dac0_inst|sine_rom~270 (
  26100. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  26101. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  26102. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  26103. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  26104. .Cin(),
  26105. .Qin(),
  26106. .Clk(),
  26107. .AsyncReset(),
  26108. .SyncReset(),
  26109. .ShiftData(),
  26110. .SyncLoad(),
  26111. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~270_combout ),
  26112. .Cout(),
  26113. .Q());
  26114. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .coord_x = 17;
  26115. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .coord_y = 1;
  26116. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .coord_z = 0;
  26117. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .mask = 16'hEEEA;
  26118. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .modeMux = 1'b0;
  26119. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .FeedbackMux = 1'b0;
  26120. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .ShiftMux = 1'b0;
  26121. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .BypassEn = 1'b0;
  26122. defparam \macro_inst|apb_dac0_inst|sine_rom~270 .CarryEnb = 1'b1;
  26123. alta_slice \macro_inst|apb_dac0_inst|sine_rom~271 (
  26124. .A(\macro_inst|apb_dac0_inst|sine_rom~270_combout ),
  26125. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  26126. .C(\macro_inst|apb_dac0_inst|sine_rom~261_combout ),
  26127. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  26128. .Cin(),
  26129. .Qin(),
  26130. .Clk(),
  26131. .AsyncReset(),
  26132. .SyncReset(),
  26133. .ShiftData(),
  26134. .SyncLoad(),
  26135. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~271_combout ),
  26136. .Cout(),
  26137. .Q());
  26138. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .coord_x = 17;
  26139. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .coord_y = 1;
  26140. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .coord_z = 1;
  26141. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .mask = 16'h220C;
  26142. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .modeMux = 1'b0;
  26143. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .FeedbackMux = 1'b0;
  26144. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .ShiftMux = 1'b0;
  26145. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .BypassEn = 1'b0;
  26146. defparam \macro_inst|apb_dac0_inst|sine_rom~271 .CarryEnb = 1'b1;
  26147. alta_slice \macro_inst|apb_dac0_inst|sine_rom~272 (
  26148. .A(\macro_inst|apb_dac0_inst|phase_r [8]),
  26149. .B(\macro_inst|apb_dac0_inst|sine_rom~271_combout ),
  26150. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  26151. .D(\macro_inst|apb_dac0_inst|sine_rom~269_combout ),
  26152. .Cin(),
  26153. .Qin(),
  26154. .Clk(),
  26155. .AsyncReset(),
  26156. .SyncReset(),
  26157. .ShiftData(),
  26158. .SyncLoad(),
  26159. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~272_combout ),
  26160. .Cout(),
  26161. .Q());
  26162. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .coord_x = 17;
  26163. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .coord_y = 1;
  26164. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .coord_z = 11;
  26165. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .mask = 16'hF4A4;
  26166. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .modeMux = 1'b0;
  26167. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .FeedbackMux = 1'b0;
  26168. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .ShiftMux = 1'b0;
  26169. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .BypassEn = 1'b0;
  26170. defparam \macro_inst|apb_dac0_inst|sine_rom~272 .CarryEnb = 1'b1;
  26171. alta_slice \macro_inst|apb_dac0_inst|sine_rom~273 (
  26172. .A(\macro_inst|apb_dac0_inst|sine_rom~267_combout ),
  26173. .B(\macro_inst|apb_dac0_inst|sine_rom~272_combout ),
  26174. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  26175. .D(\macro_inst|apb_dac0_inst|sine_rom~264_combout ),
  26176. .Cin(),
  26177. .Qin(),
  26178. .Clk(),
  26179. .AsyncReset(),
  26180. .SyncReset(),
  26181. .ShiftData(),
  26182. .SyncLoad(),
  26183. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~273_combout ),
  26184. .Cout(),
  26185. .Q());
  26186. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .coord_x = 18;
  26187. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .coord_y = 2;
  26188. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .coord_z = 6;
  26189. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .mask = 16'h3ECE;
  26190. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .modeMux = 1'b0;
  26191. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .FeedbackMux = 1'b0;
  26192. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .ShiftMux = 1'b0;
  26193. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .BypassEn = 1'b0;
  26194. defparam \macro_inst|apb_dac0_inst|sine_rom~273 .CarryEnb = 1'b1;
  26195. alta_slice \macro_inst|apb_dac0_inst|sine_rom~274 (
  26196. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26197. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26198. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26199. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  26200. .Cin(),
  26201. .Qin(),
  26202. .Clk(),
  26203. .AsyncReset(),
  26204. .SyncReset(),
  26205. .ShiftData(),
  26206. .SyncLoad(),
  26207. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~274_combout ),
  26208. .Cout(),
  26209. .Q());
  26210. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .coord_x = 8;
  26211. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .coord_y = 3;
  26212. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .coord_z = 12;
  26213. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .mask = 16'h2702;
  26214. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .modeMux = 1'b0;
  26215. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .FeedbackMux = 1'b0;
  26216. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .ShiftMux = 1'b0;
  26217. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .BypassEn = 1'b0;
  26218. defparam \macro_inst|apb_dac0_inst|sine_rom~274 .CarryEnb = 1'b1;
  26219. alta_slice \macro_inst|apb_dac0_inst|sine_rom~275 (
  26220. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26221. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26222. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26223. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  26224. .Cin(),
  26225. .Qin(),
  26226. .Clk(),
  26227. .AsyncReset(),
  26228. .SyncReset(),
  26229. .ShiftData(),
  26230. .SyncLoad(),
  26231. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~275_combout ),
  26232. .Cout(),
  26233. .Q());
  26234. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .coord_x = 8;
  26235. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .coord_y = 3;
  26236. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .coord_z = 10;
  26237. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .mask = 16'h9AFA;
  26238. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .modeMux = 1'b0;
  26239. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .FeedbackMux = 1'b0;
  26240. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .ShiftMux = 1'b0;
  26241. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .BypassEn = 1'b0;
  26242. defparam \macro_inst|apb_dac0_inst|sine_rom~275 .CarryEnb = 1'b1;
  26243. alta_slice \macro_inst|apb_dac0_inst|sine_rom~276 (
  26244. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  26245. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26246. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26247. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  26248. .Cin(),
  26249. .Qin(),
  26250. .Clk(),
  26251. .AsyncReset(),
  26252. .SyncReset(),
  26253. .ShiftData(),
  26254. .SyncLoad(),
  26255. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~276_combout ),
  26256. .Cout(),
  26257. .Q());
  26258. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .coord_x = 8;
  26259. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .coord_y = 3;
  26260. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .coord_z = 11;
  26261. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .mask = 16'h9034;
  26262. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .modeMux = 1'b0;
  26263. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .FeedbackMux = 1'b0;
  26264. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .ShiftMux = 1'b0;
  26265. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .BypassEn = 1'b0;
  26266. defparam \macro_inst|apb_dac0_inst|sine_rom~276 .CarryEnb = 1'b1;
  26267. alta_slice \macro_inst|apb_dac0_inst|sine_rom~277 (
  26268. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  26269. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  26270. .C(\macro_inst|apb_dac0_inst|sine_rom~275_combout ),
  26271. .D(\macro_inst|apb_dac0_inst|sine_rom~276_combout ),
  26272. .Cin(),
  26273. .Qin(),
  26274. .Clk(),
  26275. .AsyncReset(),
  26276. .SyncReset(),
  26277. .ShiftData(),
  26278. .SyncLoad(),
  26279. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~277_combout ),
  26280. .Cout(),
  26281. .Q());
  26282. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .coord_x = 8;
  26283. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .coord_y = 3;
  26284. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .coord_z = 1;
  26285. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .mask = 16'hA8B9;
  26286. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .modeMux = 1'b0;
  26287. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .FeedbackMux = 1'b0;
  26288. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .ShiftMux = 1'b0;
  26289. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .BypassEn = 1'b0;
  26290. defparam \macro_inst|apb_dac0_inst|sine_rom~277 .CarryEnb = 1'b1;
  26291. alta_slice \macro_inst|apb_dac0_inst|sine_rom~278 (
  26292. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  26293. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26294. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26295. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  26296. .Cin(),
  26297. .Qin(),
  26298. .Clk(),
  26299. .AsyncReset(),
  26300. .SyncReset(),
  26301. .ShiftData(),
  26302. .SyncLoad(),
  26303. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~278_combout ),
  26304. .Cout(),
  26305. .Q());
  26306. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .coord_x = 8;
  26307. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .coord_y = 3;
  26308. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .coord_z = 15;
  26309. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .mask = 16'h26C4;
  26310. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .modeMux = 1'b0;
  26311. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .FeedbackMux = 1'b0;
  26312. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .ShiftMux = 1'b0;
  26313. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .BypassEn = 1'b0;
  26314. defparam \macro_inst|apb_dac0_inst|sine_rom~278 .CarryEnb = 1'b1;
  26315. alta_slice \macro_inst|apb_dac0_inst|sine_rom~279 (
  26316. .A(\macro_inst|apb_dac0_inst|sine_rom~274_combout ),
  26317. .B(\macro_inst|apb_dac0_inst|sine_rom~277_combout ),
  26318. .C(\macro_inst|apb_dac0_inst|sine_rom~278_combout ),
  26319. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  26320. .Cin(),
  26321. .Qin(),
  26322. .Clk(),
  26323. .AsyncReset(),
  26324. .SyncReset(),
  26325. .ShiftData(),
  26326. .SyncLoad(),
  26327. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~279_combout ),
  26328. .Cout(),
  26329. .Q());
  26330. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .coord_x = 8;
  26331. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .coord_y = 3;
  26332. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .coord_z = 14;
  26333. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .mask = 16'h2ECC;
  26334. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .modeMux = 1'b0;
  26335. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .FeedbackMux = 1'b0;
  26336. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .ShiftMux = 1'b0;
  26337. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .BypassEn = 1'b0;
  26338. defparam \macro_inst|apb_dac0_inst|sine_rom~279 .CarryEnb = 1'b1;
  26339. alta_slice \macro_inst|apb_dac0_inst|sine_rom~28 (
  26340. .A(vcc),
  26341. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26342. .C(\macro_inst|apb_dac0_inst|sine_rom~26_combout ),
  26343. .D(\macro_inst|apb_dac0_inst|sine_rom~27_combout ),
  26344. .Cin(),
  26345. .Qin(),
  26346. .Clk(),
  26347. .AsyncReset(),
  26348. .SyncReset(),
  26349. .ShiftData(),
  26350. .SyncLoad(),
  26351. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~28_combout ),
  26352. .Cout(),
  26353. .Q());
  26354. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .coord_x = 8;
  26355. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .coord_y = 2;
  26356. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .coord_z = 2;
  26357. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .mask = 16'hFC30;
  26358. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .modeMux = 1'b0;
  26359. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .FeedbackMux = 1'b0;
  26360. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .ShiftMux = 1'b0;
  26361. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .BypassEn = 1'b0;
  26362. defparam \macro_inst|apb_dac0_inst|sine_rom~28 .CarryEnb = 1'b1;
  26363. alta_slice \macro_inst|apb_dac0_inst|sine_rom~280 (
  26364. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  26365. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26366. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26367. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  26368. .Cin(),
  26369. .Qin(),
  26370. .Clk(),
  26371. .AsyncReset(),
  26372. .SyncReset(),
  26373. .ShiftData(),
  26374. .SyncLoad(),
  26375. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~280_combout ),
  26376. .Cout(),
  26377. .Q());
  26378. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .coord_x = 8;
  26379. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .coord_y = 1;
  26380. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .coord_z = 6;
  26381. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .mask = 16'h0090;
  26382. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .modeMux = 1'b0;
  26383. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .FeedbackMux = 1'b0;
  26384. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .ShiftMux = 1'b0;
  26385. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .BypassEn = 1'b0;
  26386. defparam \macro_inst|apb_dac0_inst|sine_rom~280 .CarryEnb = 1'b1;
  26387. alta_slice \macro_inst|apb_dac0_inst|sine_rom~281 (
  26388. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  26389. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26390. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26391. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  26392. .Cin(),
  26393. .Qin(),
  26394. .Clk(),
  26395. .AsyncReset(),
  26396. .SyncReset(),
  26397. .ShiftData(),
  26398. .SyncLoad(),
  26399. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~281_combout ),
  26400. .Cout(),
  26401. .Q());
  26402. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .coord_x = 8;
  26403. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .coord_y = 1;
  26404. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .coord_z = 12;
  26405. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .mask = 16'hEC6C;
  26406. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .modeMux = 1'b0;
  26407. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .FeedbackMux = 1'b0;
  26408. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .ShiftMux = 1'b0;
  26409. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .BypassEn = 1'b0;
  26410. defparam \macro_inst|apb_dac0_inst|sine_rom~281 .CarryEnb = 1'b1;
  26411. alta_slice \macro_inst|apb_dac0_inst|sine_rom~282 (
  26412. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  26413. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  26414. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26415. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  26416. .Cin(),
  26417. .Qin(),
  26418. .Clk(),
  26419. .AsyncReset(),
  26420. .SyncReset(),
  26421. .ShiftData(),
  26422. .SyncLoad(),
  26423. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~282_combout ),
  26424. .Cout(),
  26425. .Q());
  26426. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .coord_x = 8;
  26427. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .coord_y = 1;
  26428. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .coord_z = 15;
  26429. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .mask = 16'h30E0;
  26430. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .modeMux = 1'b0;
  26431. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .FeedbackMux = 1'b0;
  26432. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .ShiftMux = 1'b0;
  26433. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .BypassEn = 1'b0;
  26434. defparam \macro_inst|apb_dac0_inst|sine_rom~282 .CarryEnb = 1'b1;
  26435. alta_slice \macro_inst|apb_dac0_inst|sine_rom~283 (
  26436. .A(\macro_inst|apb_dac0_inst|sine_rom~281_combout ),
  26437. .B(\macro_inst|apb_dac0_inst|sine_rom~282_combout ),
  26438. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26439. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26440. .Cin(),
  26441. .Qin(),
  26442. .Clk(),
  26443. .AsyncReset(),
  26444. .SyncReset(),
  26445. .ShiftData(),
  26446. .SyncLoad(),
  26447. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~283_combout ),
  26448. .Cout(),
  26449. .Q());
  26450. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .coord_x = 8;
  26451. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .coord_y = 1;
  26452. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .coord_z = 3;
  26453. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .mask = 16'hF50C;
  26454. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .modeMux = 1'b0;
  26455. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .FeedbackMux = 1'b0;
  26456. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .ShiftMux = 1'b0;
  26457. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .BypassEn = 1'b0;
  26458. defparam \macro_inst|apb_dac0_inst|sine_rom~283 .CarryEnb = 1'b1;
  26459. alta_slice \macro_inst|apb_dac0_inst|sine_rom~284 (
  26460. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  26461. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  26462. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26463. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  26464. .Cin(),
  26465. .Qin(),
  26466. .Clk(),
  26467. .AsyncReset(),
  26468. .SyncReset(),
  26469. .ShiftData(),
  26470. .SyncLoad(),
  26471. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~284_combout ),
  26472. .Cout(),
  26473. .Q());
  26474. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .coord_x = 8;
  26475. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .coord_y = 1;
  26476. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .coord_z = 5;
  26477. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .mask = 16'hDA0A;
  26478. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .modeMux = 1'b0;
  26479. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .FeedbackMux = 1'b0;
  26480. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .ShiftMux = 1'b0;
  26481. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .BypassEn = 1'b0;
  26482. defparam \macro_inst|apb_dac0_inst|sine_rom~284 .CarryEnb = 1'b1;
  26483. alta_slice \macro_inst|apb_dac0_inst|sine_rom~285 (
  26484. .A(\macro_inst|apb_dac0_inst|sine_rom~280_combout ),
  26485. .B(\macro_inst|apb_dac0_inst|sine_rom~283_combout ),
  26486. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26487. .D(\macro_inst|apb_dac0_inst|sine_rom~284_combout ),
  26488. .Cin(),
  26489. .Qin(),
  26490. .Clk(),
  26491. .AsyncReset(),
  26492. .SyncReset(),
  26493. .ShiftData(),
  26494. .SyncLoad(),
  26495. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~285_combout ),
  26496. .Cout(),
  26497. .Q());
  26498. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .coord_x = 8;
  26499. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .coord_y = 1;
  26500. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .coord_z = 2;
  26501. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .mask = 16'hDC1C;
  26502. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .modeMux = 1'b0;
  26503. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .FeedbackMux = 1'b0;
  26504. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .ShiftMux = 1'b0;
  26505. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .BypassEn = 1'b0;
  26506. defparam \macro_inst|apb_dac0_inst|sine_rom~285 .CarryEnb = 1'b1;
  26507. alta_slice \macro_inst|apb_dac0_inst|sine_rom~286 (
  26508. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  26509. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26510. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26511. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26512. .Cin(),
  26513. .Qin(),
  26514. .Clk(),
  26515. .AsyncReset(),
  26516. .SyncReset(),
  26517. .ShiftData(),
  26518. .SyncLoad(),
  26519. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~286_combout ),
  26520. .Cout(),
  26521. .Q());
  26522. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .coord_x = 15;
  26523. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .coord_y = 1;
  26524. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .coord_z = 14;
  26525. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .mask = 16'hAFEE;
  26526. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .modeMux = 1'b0;
  26527. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .FeedbackMux = 1'b0;
  26528. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .ShiftMux = 1'b0;
  26529. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .BypassEn = 1'b0;
  26530. defparam \macro_inst|apb_dac0_inst|sine_rom~286 .CarryEnb = 1'b1;
  26531. alta_slice \macro_inst|apb_dac0_inst|sine_rom~287 (
  26532. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  26533. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26534. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26535. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26536. .Cin(),
  26537. .Qin(),
  26538. .Clk(),
  26539. .AsyncReset(),
  26540. .SyncReset(),
  26541. .ShiftData(),
  26542. .SyncLoad(),
  26543. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~287_combout ),
  26544. .Cout(),
  26545. .Q());
  26546. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .coord_x = 8;
  26547. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .coord_y = 1;
  26548. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .coord_z = 11;
  26549. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .mask = 16'h9FF2;
  26550. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .modeMux = 1'b0;
  26551. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .FeedbackMux = 1'b0;
  26552. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .ShiftMux = 1'b0;
  26553. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .BypassEn = 1'b0;
  26554. defparam \macro_inst|apb_dac0_inst|sine_rom~287 .CarryEnb = 1'b1;
  26555. alta_slice \macro_inst|apb_dac0_inst|sine_rom~288 (
  26556. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  26557. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26558. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26559. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26560. .Cin(),
  26561. .Qin(),
  26562. .Clk(),
  26563. .AsyncReset(),
  26564. .SyncReset(),
  26565. .ShiftData(),
  26566. .SyncLoad(),
  26567. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~288_combout ),
  26568. .Cout(),
  26569. .Q());
  26570. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .coord_x = 8;
  26571. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .coord_y = 1;
  26572. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .coord_z = 9;
  26573. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .mask = 16'hAA54;
  26574. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .modeMux = 1'b0;
  26575. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .FeedbackMux = 1'b0;
  26576. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .ShiftMux = 1'b0;
  26577. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .BypassEn = 1'b0;
  26578. defparam \macro_inst|apb_dac0_inst|sine_rom~288 .CarryEnb = 1'b1;
  26579. alta_slice \macro_inst|apb_dac0_inst|sine_rom~289 (
  26580. .A(\macro_inst|apb_dac0_inst|sine_rom~287_combout ),
  26581. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26582. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26583. .D(\macro_inst|apb_dac0_inst|sine_rom~288_combout ),
  26584. .Cin(),
  26585. .Qin(),
  26586. .Clk(),
  26587. .AsyncReset(),
  26588. .SyncReset(),
  26589. .ShiftData(),
  26590. .SyncLoad(),
  26591. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~289_combout ),
  26592. .Cout(),
  26593. .Q());
  26594. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .coord_x = 8;
  26595. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .coord_y = 1;
  26596. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .coord_z = 0;
  26597. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .mask = 16'hD3D0;
  26598. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .modeMux = 1'b0;
  26599. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .FeedbackMux = 1'b0;
  26600. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .ShiftMux = 1'b0;
  26601. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .BypassEn = 1'b0;
  26602. defparam \macro_inst|apb_dac0_inst|sine_rom~289 .CarryEnb = 1'b1;
  26603. alta_slice \macro_inst|apb_dac0_inst|sine_rom~29 (
  26604. .A(\macro_inst|apb_dac0_inst|sine_rom~23_combout ),
  26605. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  26606. .C(\macro_inst|apb_dac0_inst|sine_rom~28_combout ),
  26607. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  26608. .Cin(),
  26609. .Qin(),
  26610. .Clk(),
  26611. .AsyncReset(),
  26612. .SyncReset(),
  26613. .ShiftData(),
  26614. .SyncLoad(),
  26615. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~29_combout ),
  26616. .Cout(),
  26617. .Q());
  26618. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .coord_x = 8;
  26619. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .coord_y = 2;
  26620. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .coord_z = 7;
  26621. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .mask = 16'hCC74;
  26622. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .modeMux = 1'b0;
  26623. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .FeedbackMux = 1'b0;
  26624. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .ShiftMux = 1'b0;
  26625. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .BypassEn = 1'b0;
  26626. defparam \macro_inst|apb_dac0_inst|sine_rom~29 .CarryEnb = 1'b1;
  26627. alta_slice \macro_inst|apb_dac0_inst|sine_rom~290 (
  26628. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  26629. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  26630. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  26631. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26632. .Cin(),
  26633. .Qin(),
  26634. .Clk(),
  26635. .AsyncReset(),
  26636. .SyncReset(),
  26637. .ShiftData(),
  26638. .SyncLoad(),
  26639. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~290_combout ),
  26640. .Cout(),
  26641. .Q());
  26642. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .coord_x = 15;
  26643. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .coord_y = 1;
  26644. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .coord_z = 15;
  26645. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .mask = 16'hAA70;
  26646. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .modeMux = 1'b0;
  26647. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .FeedbackMux = 1'b0;
  26648. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .ShiftMux = 1'b0;
  26649. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .BypassEn = 1'b0;
  26650. defparam \macro_inst|apb_dac0_inst|sine_rom~290 .CarryEnb = 1'b1;
  26651. alta_slice \macro_inst|apb_dac0_inst|sine_rom~291 (
  26652. .A(\macro_inst|apb_dac0_inst|sine_rom~289_combout ),
  26653. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26654. .C(\macro_inst|apb_dac0_inst|sine_rom~286_combout ),
  26655. .D(\macro_inst|apb_dac0_inst|sine_rom~290_combout ),
  26656. .Cin(),
  26657. .Qin(),
  26658. .Clk(),
  26659. .AsyncReset(),
  26660. .SyncReset(),
  26661. .ShiftData(),
  26662. .SyncLoad(),
  26663. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~291_combout ),
  26664. .Cout(),
  26665. .Q());
  26666. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .coord_x = 15;
  26667. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .coord_y = 1;
  26668. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .coord_z = 12;
  26669. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .mask = 16'h62EA;
  26670. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .modeMux = 1'b0;
  26671. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .FeedbackMux = 1'b0;
  26672. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .ShiftMux = 1'b0;
  26673. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .BypassEn = 1'b0;
  26674. defparam \macro_inst|apb_dac0_inst|sine_rom~291 .CarryEnb = 1'b1;
  26675. alta_slice \macro_inst|apb_dac0_inst|sine_rom~292 (
  26676. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  26677. .B(\macro_inst|apb_dac0_inst|sine_rom~291_combout ),
  26678. .C(\macro_inst|apb_dac0_inst|sine_rom~285_combout ),
  26679. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  26680. .Cin(),
  26681. .Qin(),
  26682. .Clk(),
  26683. .AsyncReset(),
  26684. .SyncReset(),
  26685. .ShiftData(),
  26686. .SyncLoad(),
  26687. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~292_combout ),
  26688. .Cout(),
  26689. .Q());
  26690. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .coord_x = 9;
  26691. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .coord_y = 4;
  26692. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .coord_z = 11;
  26693. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .mask = 16'hAF44;
  26694. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .modeMux = 1'b0;
  26695. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .FeedbackMux = 1'b0;
  26696. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .ShiftMux = 1'b0;
  26697. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .BypassEn = 1'b0;
  26698. defparam \macro_inst|apb_dac0_inst|sine_rom~292 .CarryEnb = 1'b1;
  26699. alta_slice \macro_inst|apb_dac0_inst|sine_rom~293 (
  26700. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26701. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  26702. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26703. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26704. .Cin(),
  26705. .Qin(),
  26706. .Clk(),
  26707. .AsyncReset(),
  26708. .SyncReset(),
  26709. .ShiftData(),
  26710. .SyncLoad(),
  26711. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~293_combout ),
  26712. .Cout(),
  26713. .Q());
  26714. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .coord_x = 8;
  26715. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .coord_y = 4;
  26716. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .coord_z = 8;
  26717. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .mask = 16'h9D18;
  26718. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .modeMux = 1'b0;
  26719. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .FeedbackMux = 1'b0;
  26720. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .ShiftMux = 1'b0;
  26721. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .BypassEn = 1'b0;
  26722. defparam \macro_inst|apb_dac0_inst|sine_rom~293 .CarryEnb = 1'b1;
  26723. alta_slice \macro_inst|apb_dac0_inst|sine_rom~294 (
  26724. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26725. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  26726. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26727. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  26728. .Cin(),
  26729. .Qin(),
  26730. .Clk(),
  26731. .AsyncReset(),
  26732. .SyncReset(),
  26733. .ShiftData(),
  26734. .SyncLoad(),
  26735. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~294_combout ),
  26736. .Cout(),
  26737. .Q());
  26738. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .coord_x = 8;
  26739. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .coord_y = 4;
  26740. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .coord_z = 15;
  26741. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .mask = 16'h0850;
  26742. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .modeMux = 1'b0;
  26743. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .FeedbackMux = 1'b0;
  26744. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .ShiftMux = 1'b0;
  26745. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .BypassEn = 1'b0;
  26746. defparam \macro_inst|apb_dac0_inst|sine_rom~294 .CarryEnb = 1'b1;
  26747. alta_slice \macro_inst|apb_dac0_inst|sine_rom~295 (
  26748. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26749. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  26750. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26751. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26752. .Cin(),
  26753. .Qin(),
  26754. .Clk(),
  26755. .AsyncReset(),
  26756. .SyncReset(),
  26757. .ShiftData(),
  26758. .SyncLoad(),
  26759. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~295_combout ),
  26760. .Cout(),
  26761. .Q());
  26762. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .coord_x = 8;
  26763. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .coord_y = 4;
  26764. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .coord_z = 3;
  26765. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .mask = 16'hD10C;
  26766. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .modeMux = 1'b0;
  26767. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .FeedbackMux = 1'b0;
  26768. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .ShiftMux = 1'b0;
  26769. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .BypassEn = 1'b0;
  26770. defparam \macro_inst|apb_dac0_inst|sine_rom~295 .CarryEnb = 1'b1;
  26771. alta_slice \macro_inst|apb_dac0_inst|sine_rom~296 (
  26772. .A(\macro_inst|apb_dac0_inst|sine_rom~295_combout ),
  26773. .B(\macro_inst|apb_dac0_inst|sine_rom~294_combout ),
  26774. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26775. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  26776. .Cin(),
  26777. .Qin(),
  26778. .Clk(),
  26779. .AsyncReset(),
  26780. .SyncReset(),
  26781. .ShiftData(),
  26782. .SyncLoad(),
  26783. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~296_combout ),
  26784. .Cout(),
  26785. .Q());
  26786. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .coord_x = 8;
  26787. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .coord_y = 4;
  26788. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .coord_z = 1;
  26789. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .mask = 16'hF305;
  26790. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .modeMux = 1'b0;
  26791. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .FeedbackMux = 1'b0;
  26792. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .ShiftMux = 1'b0;
  26793. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .BypassEn = 1'b0;
  26794. defparam \macro_inst|apb_dac0_inst|sine_rom~296 .CarryEnb = 1'b1;
  26795. alta_slice \macro_inst|apb_dac0_inst|sine_rom~297 (
  26796. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26797. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  26798. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26799. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26800. .Cin(),
  26801. .Qin(),
  26802. .Clk(),
  26803. .AsyncReset(),
  26804. .SyncReset(),
  26805. .ShiftData(),
  26806. .SyncLoad(),
  26807. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~297_combout ),
  26808. .Cout(),
  26809. .Q());
  26810. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .coord_x = 8;
  26811. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .coord_y = 4;
  26812. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .coord_z = 2;
  26813. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .mask = 16'hFCEC;
  26814. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .modeMux = 1'b0;
  26815. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .FeedbackMux = 1'b0;
  26816. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .ShiftMux = 1'b0;
  26817. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .BypassEn = 1'b0;
  26818. defparam \macro_inst|apb_dac0_inst|sine_rom~297 .CarryEnb = 1'b1;
  26819. alta_slice \macro_inst|apb_dac0_inst|sine_rom~298 (
  26820. .A(\macro_inst|apb_dac0_inst|sine_rom~297_combout ),
  26821. .B(\macro_inst|apb_dac0_inst|sine_rom~293_combout ),
  26822. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26823. .D(\macro_inst|apb_dac0_inst|sine_rom~296_combout ),
  26824. .Cin(),
  26825. .Qin(),
  26826. .Clk(),
  26827. .AsyncReset(),
  26828. .SyncReset(),
  26829. .ShiftData(),
  26830. .SyncLoad(),
  26831. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~298_combout ),
  26832. .Cout(),
  26833. .Q());
  26834. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .coord_x = 8;
  26835. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .coord_y = 4;
  26836. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .coord_z = 9;
  26837. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .mask = 16'hAFC0;
  26838. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .modeMux = 1'b0;
  26839. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .FeedbackMux = 1'b0;
  26840. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .ShiftMux = 1'b0;
  26841. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .BypassEn = 1'b0;
  26842. defparam \macro_inst|apb_dac0_inst|sine_rom~298 .CarryEnb = 1'b1;
  26843. alta_slice \macro_inst|apb_dac0_inst|sine_rom~299 (
  26844. .A(\macro_inst|apb_dac0_inst|sine_rom~298_combout ),
  26845. .B(\macro_inst|apb_dac0_inst|sine_rom~292_combout ),
  26846. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  26847. .D(\macro_inst|apb_dac0_inst|sine_rom~279_combout ),
  26848. .Cin(),
  26849. .Qin(),
  26850. .Clk(),
  26851. .AsyncReset(),
  26852. .SyncReset(),
  26853. .ShiftData(),
  26854. .SyncLoad(),
  26855. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~299_combout ),
  26856. .Cout(),
  26857. .Q());
  26858. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .coord_x = 9;
  26859. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .coord_y = 4;
  26860. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .coord_z = 4;
  26861. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .mask = 16'h4C7C;
  26862. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .modeMux = 1'b0;
  26863. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .FeedbackMux = 1'b0;
  26864. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .ShiftMux = 1'b0;
  26865. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .BypassEn = 1'b0;
  26866. defparam \macro_inst|apb_dac0_inst|sine_rom~299 .CarryEnb = 1'b1;
  26867. alta_slice \macro_inst|apb_dac0_inst|sine_rom~3 (
  26868. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  26869. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  26870. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  26871. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  26872. .Cin(),
  26873. .Qin(),
  26874. .Clk(),
  26875. .AsyncReset(),
  26876. .SyncReset(),
  26877. .ShiftData(),
  26878. .SyncLoad(),
  26879. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~3_combout ),
  26880. .Cout(),
  26881. .Q());
  26882. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .coord_x = 9;
  26883. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .coord_y = 1;
  26884. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .coord_z = 9;
  26885. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .mask = 16'h7FEE;
  26886. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .modeMux = 1'b0;
  26887. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .FeedbackMux = 1'b0;
  26888. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .ShiftMux = 1'b0;
  26889. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .BypassEn = 1'b0;
  26890. defparam \macro_inst|apb_dac0_inst|sine_rom~3 .CarryEnb = 1'b1;
  26891. alta_slice \macro_inst|apb_dac0_inst|sine_rom~30 (
  26892. .A(vcc),
  26893. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26894. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  26895. .D(\macro_inst|apb_dac0_inst|sine_rom~6_combout ),
  26896. .Cin(),
  26897. .Qin(),
  26898. .Clk(),
  26899. .AsyncReset(),
  26900. .SyncReset(),
  26901. .ShiftData(),
  26902. .SyncLoad(),
  26903. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~30_combout ),
  26904. .Cout(),
  26905. .Q());
  26906. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .coord_x = 8;
  26907. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .coord_y = 2;
  26908. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .coord_z = 0;
  26909. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .mask = 16'hFFFC;
  26910. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .modeMux = 1'b0;
  26911. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .FeedbackMux = 1'b0;
  26912. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .ShiftMux = 1'b0;
  26913. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .BypassEn = 1'b0;
  26914. defparam \macro_inst|apb_dac0_inst|sine_rom~30 .CarryEnb = 1'b1;
  26915. alta_slice \macro_inst|apb_dac0_inst|sine_rom~300 (
  26916. .A(vcc),
  26917. .B(vcc),
  26918. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  26919. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  26920. .Cin(),
  26921. .Qin(),
  26922. .Clk(),
  26923. .AsyncReset(),
  26924. .SyncReset(),
  26925. .ShiftData(),
  26926. .SyncLoad(),
  26927. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~300_combout ),
  26928. .Cout(),
  26929. .Q());
  26930. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .coord_x = 15;
  26931. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .coord_y = 1;
  26932. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .coord_z = 10;
  26933. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .mask = 16'h0FF0;
  26934. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .modeMux = 1'b0;
  26935. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .FeedbackMux = 1'b0;
  26936. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .ShiftMux = 1'b0;
  26937. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .BypassEn = 1'b0;
  26938. defparam \macro_inst|apb_dac0_inst|sine_rom~300 .CarryEnb = 1'b1;
  26939. alta_slice \macro_inst|apb_dac0_inst|sine_rom~301 (
  26940. .A(\macro_inst|apb_dac0_inst|sine_rom~300_combout ),
  26941. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  26942. .C(\macro_inst|apb_dac0_inst|sine_rom~287_combout ),
  26943. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  26944. .Cin(),
  26945. .Qin(),
  26946. .Clk(),
  26947. .AsyncReset(),
  26948. .SyncReset(),
  26949. .ShiftData(),
  26950. .SyncLoad(),
  26951. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~301_combout ),
  26952. .Cout(),
  26953. .Q());
  26954. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .coord_x = 15;
  26955. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .coord_y = 1;
  26956. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .coord_z = 13;
  26957. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .mask = 16'hFC22;
  26958. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .modeMux = 1'b0;
  26959. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .FeedbackMux = 1'b0;
  26960. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .ShiftMux = 1'b0;
  26961. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .BypassEn = 1'b0;
  26962. defparam \macro_inst|apb_dac0_inst|sine_rom~301 .CarryEnb = 1'b1;
  26963. alta_slice \macro_inst|apb_dac0_inst|sine_rom~302 (
  26964. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  26965. .B(\macro_inst|apb_dac0_inst|sine_rom~290_combout ),
  26966. .C(\macro_inst|apb_dac0_inst|sine_rom~286_combout ),
  26967. .D(\macro_inst|apb_dac0_inst|sine_rom~301_combout ),
  26968. .Cin(),
  26969. .Qin(),
  26970. .Clk(),
  26971. .AsyncReset(),
  26972. .SyncReset(),
  26973. .ShiftData(),
  26974. .SyncLoad(),
  26975. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~302_combout ),
  26976. .Cout(),
  26977. .Q());
  26978. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .coord_x = 15;
  26979. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .coord_y = 1;
  26980. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .coord_z = 11;
  26981. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .mask = 16'hDD0A;
  26982. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .modeMux = 1'b0;
  26983. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .FeedbackMux = 1'b0;
  26984. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .ShiftMux = 1'b0;
  26985. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .BypassEn = 1'b0;
  26986. defparam \macro_inst|apb_dac0_inst|sine_rom~302 .CarryEnb = 1'b1;
  26987. alta_slice \macro_inst|apb_dac0_inst|sine_rom~303 (
  26988. .A(\macro_inst|apb_dac0_inst|sine_rom~285_combout ),
  26989. .B(\macro_inst|apb_dac0_inst|sine_rom~302_combout ),
  26990. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  26991. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  26992. .Cin(),
  26993. .Qin(),
  26994. .Clk(),
  26995. .AsyncReset(),
  26996. .SyncReset(),
  26997. .ShiftData(),
  26998. .SyncLoad(),
  26999. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~303_combout ),
  27000. .Cout(),
  27001. .Q());
  27002. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .coord_x = 9;
  27003. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .coord_y = 4;
  27004. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .coord_z = 13;
  27005. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .mask = 16'hFA0C;
  27006. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .modeMux = 1'b0;
  27007. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .FeedbackMux = 1'b0;
  27008. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .ShiftMux = 1'b0;
  27009. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .BypassEn = 1'b0;
  27010. defparam \macro_inst|apb_dac0_inst|sine_rom~303 .CarryEnb = 1'b1;
  27011. alta_slice \macro_inst|apb_dac0_inst|sine_rom~304 (
  27012. .A(\macro_inst|apb_dac0_inst|sine_rom~298_combout ),
  27013. .B(\macro_inst|apb_dac0_inst|sine_rom~303_combout ),
  27014. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  27015. .D(\macro_inst|apb_dac0_inst|sine_rom~279_combout ),
  27016. .Cin(),
  27017. .Qin(),
  27018. .Clk(),
  27019. .AsyncReset(),
  27020. .SyncReset(),
  27021. .ShiftData(),
  27022. .SyncLoad(),
  27023. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~304_combout ),
  27024. .Cout(),
  27025. .Q());
  27026. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .coord_x = 9;
  27027. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .coord_y = 4;
  27028. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .coord_z = 3;
  27029. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .mask = 16'hBC8C;
  27030. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .modeMux = 1'b0;
  27031. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .FeedbackMux = 1'b0;
  27032. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .ShiftMux = 1'b0;
  27033. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .BypassEn = 1'b0;
  27034. defparam \macro_inst|apb_dac0_inst|sine_rom~304 .CarryEnb = 1'b1;
  27035. alta_slice \macro_inst|apb_dac0_inst|sine_rom~305 (
  27036. .A(\macro_inst|apb_dac0_inst|sine_rom~299_combout ),
  27037. .B(\macro_inst|apb_dac0_inst|sine_rom~304_combout ),
  27038. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  27039. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  27040. .Cin(),
  27041. .Qin(),
  27042. .Clk(),
  27043. .AsyncReset(),
  27044. .SyncReset(),
  27045. .ShiftData(),
  27046. .SyncLoad(),
  27047. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~305_combout ),
  27048. .Cout(),
  27049. .Q());
  27050. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .coord_x = 9;
  27051. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .coord_y = 4;
  27052. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .coord_z = 2;
  27053. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .mask = 16'h0A0C;
  27054. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .modeMux = 1'b0;
  27055. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .FeedbackMux = 1'b0;
  27056. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .ShiftMux = 1'b0;
  27057. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .BypassEn = 1'b0;
  27058. defparam \macro_inst|apb_dac0_inst|sine_rom~305 .CarryEnb = 1'b1;
  27059. alta_slice \macro_inst|apb_dac0_inst|sine_rom~306 (
  27060. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  27061. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27062. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27063. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27064. .Cin(),
  27065. .Qin(),
  27066. .Clk(),
  27067. .AsyncReset(),
  27068. .SyncReset(),
  27069. .ShiftData(),
  27070. .SyncLoad(),
  27071. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~306_combout ),
  27072. .Cout(),
  27073. .Q());
  27074. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .coord_x = 8;
  27075. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .coord_y = 4;
  27076. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .coord_z = 0;
  27077. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .mask = 16'h3710;
  27078. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .modeMux = 1'b0;
  27079. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .FeedbackMux = 1'b0;
  27080. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .ShiftMux = 1'b0;
  27081. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .BypassEn = 1'b0;
  27082. defparam \macro_inst|apb_dac0_inst|sine_rom~306 .CarryEnb = 1'b1;
  27083. alta_slice \macro_inst|apb_dac0_inst|sine_rom~307 (
  27084. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  27085. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27086. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27087. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27088. .Cin(),
  27089. .Qin(),
  27090. .Clk(),
  27091. .AsyncReset(),
  27092. .SyncReset(),
  27093. .ShiftData(),
  27094. .SyncLoad(),
  27095. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~307_combout ),
  27096. .Cout(),
  27097. .Q());
  27098. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .coord_x = 8;
  27099. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .coord_y = 4;
  27100. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .coord_z = 4;
  27101. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .mask = 16'h4C48;
  27102. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .modeMux = 1'b0;
  27103. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .FeedbackMux = 1'b0;
  27104. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .ShiftMux = 1'b0;
  27105. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .BypassEn = 1'b0;
  27106. defparam \macro_inst|apb_dac0_inst|sine_rom~307 .CarryEnb = 1'b1;
  27107. alta_slice \macro_inst|apb_dac0_inst|sine_rom~308 (
  27108. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  27109. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27110. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27111. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27112. .Cin(),
  27113. .Qin(),
  27114. .Clk(),
  27115. .AsyncReset(),
  27116. .SyncReset(),
  27117. .ShiftData(),
  27118. .SyncLoad(),
  27119. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~308_combout ),
  27120. .Cout(),
  27121. .Q());
  27122. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .coord_x = 8;
  27123. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .coord_y = 4;
  27124. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .coord_z = 14;
  27125. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .mask = 16'h4060;
  27126. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .modeMux = 1'b0;
  27127. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .FeedbackMux = 1'b0;
  27128. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .ShiftMux = 1'b0;
  27129. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .BypassEn = 1'b0;
  27130. defparam \macro_inst|apb_dac0_inst|sine_rom~308 .CarryEnb = 1'b1;
  27131. alta_slice \macro_inst|apb_dac0_inst|sine_rom~309 (
  27132. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  27133. .B(\macro_inst|apb_dac0_inst|sine_rom~307_combout ),
  27134. .C(\macro_inst|apb_dac0_inst|sine_rom~308_combout ),
  27135. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27136. .Cin(),
  27137. .Qin(),
  27138. .Clk(),
  27139. .AsyncReset(),
  27140. .SyncReset(),
  27141. .ShiftData(),
  27142. .SyncLoad(),
  27143. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~309_combout ),
  27144. .Cout(),
  27145. .Q());
  27146. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .coord_x = 8;
  27147. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .coord_y = 4;
  27148. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .coord_z = 5;
  27149. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .mask = 16'hAA27;
  27150. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .modeMux = 1'b0;
  27151. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .FeedbackMux = 1'b0;
  27152. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .ShiftMux = 1'b0;
  27153. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .BypassEn = 1'b0;
  27154. defparam \macro_inst|apb_dac0_inst|sine_rom~309 .CarryEnb = 1'b1;
  27155. alta_slice \macro_inst|apb_dac0_inst|sine_rom~31 (
  27156. .A(\macro_inst|apb_dac0_inst|sine_rom~20_combout ),
  27157. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27158. .C(\macro_inst|apb_dac0_inst|sine_rom~30_combout ),
  27159. .D(\macro_inst|apb_dac0_inst|sine_rom~29_combout ),
  27160. .Cin(),
  27161. .Qin(),
  27162. .Clk(),
  27163. .AsyncReset(),
  27164. .SyncReset(),
  27165. .ShiftData(),
  27166. .SyncLoad(),
  27167. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~31_combout ),
  27168. .Cout(),
  27169. .Q());
  27170. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .coord_x = 8;
  27171. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .coord_y = 2;
  27172. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .coord_z = 8;
  27173. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .mask = 16'h3F44;
  27174. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .modeMux = 1'b0;
  27175. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .FeedbackMux = 1'b0;
  27176. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .ShiftMux = 1'b0;
  27177. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .BypassEn = 1'b0;
  27178. defparam \macro_inst|apb_dac0_inst|sine_rom~31 .CarryEnb = 1'b1;
  27179. alta_slice \macro_inst|apb_dac0_inst|sine_rom~310 (
  27180. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  27181. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27182. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27183. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27184. .Cin(),
  27185. .Qin(),
  27186. .Clk(),
  27187. .AsyncReset(),
  27188. .SyncReset(),
  27189. .ShiftData(),
  27190. .SyncLoad(),
  27191. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~310_combout ),
  27192. .Cout(),
  27193. .Q());
  27194. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .coord_x = 8;
  27195. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .coord_y = 4;
  27196. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .coord_z = 10;
  27197. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .mask = 16'h8E70;
  27198. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .modeMux = 1'b0;
  27199. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .FeedbackMux = 1'b0;
  27200. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .ShiftMux = 1'b0;
  27201. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .BypassEn = 1'b0;
  27202. defparam \macro_inst|apb_dac0_inst|sine_rom~310 .CarryEnb = 1'b1;
  27203. alta_slice \macro_inst|apb_dac0_inst|sine_rom~311 (
  27204. .A(\macro_inst|apb_dac0_inst|sine_rom~306_combout ),
  27205. .B(\macro_inst|apb_dac0_inst|sine_rom~309_combout ),
  27206. .C(\macro_inst|apb_dac0_inst|sine_rom~310_combout ),
  27207. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27208. .Cin(),
  27209. .Qin(),
  27210. .Clk(),
  27211. .AsyncReset(),
  27212. .SyncReset(),
  27213. .ShiftData(),
  27214. .SyncLoad(),
  27215. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~311_combout ),
  27216. .Cout(),
  27217. .Q());
  27218. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .coord_x = 8;
  27219. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .coord_y = 4;
  27220. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .coord_z = 11;
  27221. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .mask = 16'hD1CC;
  27222. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .modeMux = 1'b0;
  27223. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .FeedbackMux = 1'b0;
  27224. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .ShiftMux = 1'b0;
  27225. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .BypassEn = 1'b0;
  27226. defparam \macro_inst|apb_dac0_inst|sine_rom~311 .CarryEnb = 1'b1;
  27227. alta_slice \macro_inst|apb_dac0_inst|sine_rom~312 (
  27228. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27229. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27230. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27231. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  27232. .Cin(),
  27233. .Qin(),
  27234. .Clk(),
  27235. .AsyncReset(),
  27236. .SyncReset(),
  27237. .ShiftData(),
  27238. .SyncLoad(),
  27239. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~312_combout ),
  27240. .Cout(),
  27241. .Q());
  27242. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .coord_x = 5;
  27243. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .coord_y = 4;
  27244. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .coord_z = 3;
  27245. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .mask = 16'hF7F6;
  27246. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .modeMux = 1'b0;
  27247. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .FeedbackMux = 1'b0;
  27248. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .ShiftMux = 1'b0;
  27249. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .BypassEn = 1'b0;
  27250. defparam \macro_inst|apb_dac0_inst|sine_rom~312 .CarryEnb = 1'b1;
  27251. alta_slice \macro_inst|apb_dac0_inst|sine_rom~313 (
  27252. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27253. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27254. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27255. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27256. .Cin(),
  27257. .Qin(),
  27258. .Clk(),
  27259. .AsyncReset(),
  27260. .SyncReset(),
  27261. .ShiftData(),
  27262. .SyncLoad(),
  27263. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~313_combout ),
  27264. .Cout(),
  27265. .Q());
  27266. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .coord_x = 5;
  27267. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .coord_y = 4;
  27268. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .coord_z = 4;
  27269. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .mask = 16'hC03E;
  27270. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .modeMux = 1'b0;
  27271. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .FeedbackMux = 1'b0;
  27272. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .ShiftMux = 1'b0;
  27273. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .BypassEn = 1'b0;
  27274. defparam \macro_inst|apb_dac0_inst|sine_rom~313 .CarryEnb = 1'b1;
  27275. alta_slice \macro_inst|apb_dac0_inst|sine_rom~314 (
  27276. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27277. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27278. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27279. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  27280. .Cin(),
  27281. .Qin(),
  27282. .Clk(),
  27283. .AsyncReset(),
  27284. .SyncReset(),
  27285. .ShiftData(),
  27286. .SyncLoad(),
  27287. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~314_combout ),
  27288. .Cout(),
  27289. .Q());
  27290. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .coord_x = 5;
  27291. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .coord_y = 4;
  27292. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .coord_z = 9;
  27293. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .mask = 16'h659C;
  27294. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .modeMux = 1'b0;
  27295. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .FeedbackMux = 1'b0;
  27296. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .ShiftMux = 1'b0;
  27297. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .BypassEn = 1'b0;
  27298. defparam \macro_inst|apb_dac0_inst|sine_rom~314 .CarryEnb = 1'b1;
  27299. alta_slice \macro_inst|apb_dac0_inst|sine_rom~315 (
  27300. .A(\macro_inst|apb_dac0_inst|sine_rom~313_combout ),
  27301. .B(\macro_inst|apb_dac0_inst|sine_rom~314_combout ),
  27302. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  27303. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  27304. .Cin(),
  27305. .Qin(),
  27306. .Clk(),
  27307. .AsyncReset(),
  27308. .SyncReset(),
  27309. .ShiftData(),
  27310. .SyncLoad(),
  27311. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~315_combout ),
  27312. .Cout(),
  27313. .Q());
  27314. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .coord_x = 5;
  27315. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .coord_y = 4;
  27316. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .coord_z = 14;
  27317. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .mask = 16'hF503;
  27318. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .modeMux = 1'b0;
  27319. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .FeedbackMux = 1'b0;
  27320. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .ShiftMux = 1'b0;
  27321. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .BypassEn = 1'b0;
  27322. defparam \macro_inst|apb_dac0_inst|sine_rom~315 .CarryEnb = 1'b1;
  27323. alta_slice \macro_inst|apb_dac0_inst|sine_rom~316 (
  27324. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27325. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27326. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27327. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27328. .Cin(),
  27329. .Qin(),
  27330. .Clk(),
  27331. .AsyncReset(),
  27332. .SyncReset(),
  27333. .ShiftData(),
  27334. .SyncLoad(),
  27335. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~316_combout ),
  27336. .Cout(),
  27337. .Q());
  27338. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .coord_x = 5;
  27339. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .coord_y = 4;
  27340. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .coord_z = 12;
  27341. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .mask = 16'hF30E;
  27342. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .modeMux = 1'b0;
  27343. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .FeedbackMux = 1'b0;
  27344. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .ShiftMux = 1'b0;
  27345. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .BypassEn = 1'b0;
  27346. defparam \macro_inst|apb_dac0_inst|sine_rom~316 .CarryEnb = 1'b1;
  27347. alta_slice \macro_inst|apb_dac0_inst|sine_rom~317 (
  27348. .A(\macro_inst|apb_dac0_inst|sine_rom~315_combout ),
  27349. .B(\macro_inst|apb_dac0_inst|sine_rom~316_combout ),
  27350. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  27351. .D(\macro_inst|apb_dac0_inst|sine_rom~312_combout ),
  27352. .Cin(),
  27353. .Qin(),
  27354. .Clk(),
  27355. .AsyncReset(),
  27356. .SyncReset(),
  27357. .ShiftData(),
  27358. .SyncLoad(),
  27359. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~317_combout ),
  27360. .Cout(),
  27361. .Q());
  27362. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .coord_x = 5;
  27363. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .coord_y = 4;
  27364. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .coord_z = 13;
  27365. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .mask = 16'h2A7A;
  27366. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .modeMux = 1'b0;
  27367. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .FeedbackMux = 1'b0;
  27368. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .ShiftMux = 1'b0;
  27369. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .BypassEn = 1'b0;
  27370. defparam \macro_inst|apb_dac0_inst|sine_rom~317 .CarryEnb = 1'b1;
  27371. alta_slice \macro_inst|apb_dac0_inst|sine_rom~318 (
  27372. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27373. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27374. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27375. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27376. .Cin(),
  27377. .Qin(),
  27378. .Clk(),
  27379. .AsyncReset(),
  27380. .SyncReset(),
  27381. .ShiftData(),
  27382. .SyncLoad(),
  27383. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~318_combout ),
  27384. .Cout(),
  27385. .Q());
  27386. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .coord_x = 5;
  27387. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .coord_y = 4;
  27388. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .coord_z = 2;
  27389. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .mask = 16'h0B1A;
  27390. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .modeMux = 1'b0;
  27391. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .FeedbackMux = 1'b0;
  27392. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .ShiftMux = 1'b0;
  27393. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .BypassEn = 1'b0;
  27394. defparam \macro_inst|apb_dac0_inst|sine_rom~318 .CarryEnb = 1'b1;
  27395. alta_slice \macro_inst|apb_dac0_inst|sine_rom~319 (
  27396. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27397. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27398. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27399. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  27400. .Cin(),
  27401. .Qin(),
  27402. .Clk(),
  27403. .AsyncReset(),
  27404. .SyncReset(),
  27405. .ShiftData(),
  27406. .SyncLoad(),
  27407. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~319_combout ),
  27408. .Cout(),
  27409. .Q());
  27410. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .coord_x = 5;
  27411. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .coord_y = 4;
  27412. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .coord_z = 6;
  27413. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .mask = 16'hFAD4;
  27414. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .modeMux = 1'b0;
  27415. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .FeedbackMux = 1'b0;
  27416. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .ShiftMux = 1'b0;
  27417. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .BypassEn = 1'b0;
  27418. defparam \macro_inst|apb_dac0_inst|sine_rom~319 .CarryEnb = 1'b1;
  27419. alta_slice \macro_inst|apb_dac0_inst|sine_rom~32 (
  27420. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  27421. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27422. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  27423. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27424. .Cin(),
  27425. .Qin(),
  27426. .Clk(),
  27427. .AsyncReset(),
  27428. .SyncReset(),
  27429. .ShiftData(),
  27430. .SyncLoad(),
  27431. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~32_combout ),
  27432. .Cout(),
  27433. .Q());
  27434. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .coord_x = 9;
  27435. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .coord_y = 1;
  27436. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .coord_z = 2;
  27437. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .mask = 16'h7CEC;
  27438. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .modeMux = 1'b0;
  27439. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .FeedbackMux = 1'b0;
  27440. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .ShiftMux = 1'b0;
  27441. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .BypassEn = 1'b0;
  27442. defparam \macro_inst|apb_dac0_inst|sine_rom~32 .CarryEnb = 1'b1;
  27443. alta_slice \macro_inst|apb_dac0_inst|sine_rom~320 (
  27444. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  27445. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27446. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27447. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27448. .Cin(),
  27449. .Qin(),
  27450. .Clk(),
  27451. .AsyncReset(),
  27452. .SyncReset(),
  27453. .ShiftData(),
  27454. .SyncLoad(),
  27455. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~320_combout ),
  27456. .Cout(),
  27457. .Q());
  27458. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .coord_x = 5;
  27459. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .coord_y = 4;
  27460. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .coord_z = 11;
  27461. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .mask = 16'h7428;
  27462. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .modeMux = 1'b0;
  27463. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .FeedbackMux = 1'b0;
  27464. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .ShiftMux = 1'b0;
  27465. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .BypassEn = 1'b0;
  27466. defparam \macro_inst|apb_dac0_inst|sine_rom~320 .CarryEnb = 1'b1;
  27467. alta_slice \macro_inst|apb_dac0_inst|sine_rom~321 (
  27468. .A(\macro_inst|apb_dac0_inst|sine_rom~319_combout ),
  27469. .B(\macro_inst|apb_dac0_inst|sine_rom~320_combout ),
  27470. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  27471. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  27472. .Cin(),
  27473. .Qin(),
  27474. .Clk(),
  27475. .AsyncReset(),
  27476. .SyncReset(),
  27477. .ShiftData(),
  27478. .SyncLoad(),
  27479. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~321_combout ),
  27480. .Cout(),
  27481. .Q());
  27482. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .coord_x = 5;
  27483. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .coord_y = 4;
  27484. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .coord_z = 10;
  27485. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .mask = 16'hFA03;
  27486. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .modeMux = 1'b0;
  27487. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .FeedbackMux = 1'b0;
  27488. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .ShiftMux = 1'b0;
  27489. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .BypassEn = 1'b0;
  27490. defparam \macro_inst|apb_dac0_inst|sine_rom~321 .CarryEnb = 1'b1;
  27491. alta_slice \macro_inst|apb_dac0_inst|sine_rom~322 (
  27492. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27493. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27494. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  27495. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  27496. .Cin(),
  27497. .Qin(),
  27498. .Clk(),
  27499. .AsyncReset(),
  27500. .SyncReset(),
  27501. .ShiftData(),
  27502. .SyncLoad(),
  27503. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~322_combout ),
  27504. .Cout(),
  27505. .Q());
  27506. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .coord_x = 5;
  27507. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .coord_y = 4;
  27508. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .coord_z = 7;
  27509. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .mask = 16'h6B7E;
  27510. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .modeMux = 1'b0;
  27511. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .FeedbackMux = 1'b0;
  27512. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .ShiftMux = 1'b0;
  27513. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .BypassEn = 1'b0;
  27514. defparam \macro_inst|apb_dac0_inst|sine_rom~322 .CarryEnb = 1'b1;
  27515. alta_slice \macro_inst|apb_dac0_inst|sine_rom~323 (
  27516. .A(\macro_inst|apb_dac0_inst|sine_rom~318_combout ),
  27517. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  27518. .C(\macro_inst|apb_dac0_inst|sine_rom~321_combout ),
  27519. .D(\macro_inst|apb_dac0_inst|sine_rom~322_combout ),
  27520. .Cin(),
  27521. .Qin(),
  27522. .Clk(),
  27523. .AsyncReset(),
  27524. .SyncReset(),
  27525. .ShiftData(),
  27526. .SyncLoad(),
  27527. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~323_combout ),
  27528. .Cout(),
  27529. .Q());
  27530. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .coord_x = 5;
  27531. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .coord_y = 4;
  27532. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .coord_z = 1;
  27533. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .mask = 16'hF838;
  27534. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .modeMux = 1'b0;
  27535. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .FeedbackMux = 1'b0;
  27536. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .ShiftMux = 1'b0;
  27537. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .BypassEn = 1'b0;
  27538. defparam \macro_inst|apb_dac0_inst|sine_rom~323 .CarryEnb = 1'b1;
  27539. alta_slice \macro_inst|apb_dac0_inst|sine_rom~324 (
  27540. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  27541. .B(\macro_inst|apb_dac0_inst|sine_rom~323_combout ),
  27542. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  27543. .D(\macro_inst|apb_dac0_inst|sine_rom~317_combout ),
  27544. .Cin(),
  27545. .Qin(),
  27546. .Clk(),
  27547. .AsyncReset(),
  27548. .SyncReset(),
  27549. .ShiftData(),
  27550. .SyncLoad(),
  27551. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~324_combout ),
  27552. .Cout(),
  27553. .Q());
  27554. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .coord_x = 5;
  27555. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .coord_y = 4;
  27556. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .coord_z = 8;
  27557. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .mask = 16'hF4A4;
  27558. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .modeMux = 1'b0;
  27559. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .FeedbackMux = 1'b0;
  27560. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .ShiftMux = 1'b0;
  27561. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .BypassEn = 1'b0;
  27562. defparam \macro_inst|apb_dac0_inst|sine_rom~324 .CarryEnb = 1'b1;
  27563. alta_slice \macro_inst|apb_dac0_inst|sine_rom~325 (
  27564. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  27565. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  27566. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  27567. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27568. .Cin(),
  27569. .Qin(),
  27570. .Clk(),
  27571. .AsyncReset(),
  27572. .SyncReset(),
  27573. .ShiftData(),
  27574. .SyncLoad(),
  27575. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~325_combout ),
  27576. .Cout(),
  27577. .Q());
  27578. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .coord_x = 9;
  27579. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .coord_y = 4;
  27580. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .coord_z = 12;
  27581. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .mask = 16'hF6F2;
  27582. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .modeMux = 1'b0;
  27583. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .FeedbackMux = 1'b0;
  27584. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .ShiftMux = 1'b0;
  27585. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .BypassEn = 1'b0;
  27586. defparam \macro_inst|apb_dac0_inst|sine_rom~325 .CarryEnb = 1'b1;
  27587. alta_slice \macro_inst|apb_dac0_inst|sine_rom~326 (
  27588. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  27589. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  27590. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  27591. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27592. .Cin(),
  27593. .Qin(),
  27594. .Clk(),
  27595. .AsyncReset(),
  27596. .SyncReset(),
  27597. .ShiftData(),
  27598. .SyncLoad(),
  27599. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~326_combout ),
  27600. .Cout(),
  27601. .Q());
  27602. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .coord_x = 9;
  27603. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .coord_y = 4;
  27604. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .coord_z = 0;
  27605. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .mask = 16'hD1E2;
  27606. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .modeMux = 1'b0;
  27607. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .FeedbackMux = 1'b0;
  27608. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .ShiftMux = 1'b0;
  27609. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .BypassEn = 1'b0;
  27610. defparam \macro_inst|apb_dac0_inst|sine_rom~326 .CarryEnb = 1'b1;
  27611. alta_slice \macro_inst|apb_dac0_inst|sine_rom~327 (
  27612. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  27613. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  27614. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  27615. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27616. .Cin(),
  27617. .Qin(),
  27618. .Clk(),
  27619. .AsyncReset(),
  27620. .SyncReset(),
  27621. .ShiftData(),
  27622. .SyncLoad(),
  27623. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~327_combout ),
  27624. .Cout(),
  27625. .Q());
  27626. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .coord_x = 9;
  27627. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .coord_y = 4;
  27628. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .coord_z = 14;
  27629. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .mask = 16'hC276;
  27630. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .modeMux = 1'b0;
  27631. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .FeedbackMux = 1'b0;
  27632. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .ShiftMux = 1'b0;
  27633. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .BypassEn = 1'b0;
  27634. defparam \macro_inst|apb_dac0_inst|sine_rom~327 .CarryEnb = 1'b1;
  27635. alta_slice \macro_inst|apb_dac0_inst|sine_rom~328 (
  27636. .A(\macro_inst|apb_dac0_inst|sine_rom~327_combout ),
  27637. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27638. .C(\macro_inst|apb_dac0_inst|sine_rom~326_combout ),
  27639. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  27640. .Cin(),
  27641. .Qin(),
  27642. .Clk(),
  27643. .AsyncReset(),
  27644. .SyncReset(),
  27645. .ShiftData(),
  27646. .SyncLoad(),
  27647. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~328_combout ),
  27648. .Cout(),
  27649. .Q());
  27650. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .coord_x = 9;
  27651. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .coord_y = 4;
  27652. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .coord_z = 9;
  27653. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .mask = 16'hCC1D;
  27654. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .modeMux = 1'b0;
  27655. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .FeedbackMux = 1'b0;
  27656. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .ShiftMux = 1'b0;
  27657. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .BypassEn = 1'b0;
  27658. defparam \macro_inst|apb_dac0_inst|sine_rom~328 .CarryEnb = 1'b1;
  27659. alta_slice \macro_inst|apb_dac0_inst|sine_rom~329 (
  27660. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  27661. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  27662. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  27663. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27664. .Cin(),
  27665. .Qin(),
  27666. .Clk(),
  27667. .AsyncReset(),
  27668. .SyncReset(),
  27669. .ShiftData(),
  27670. .SyncLoad(),
  27671. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~329_combout ),
  27672. .Cout(),
  27673. .Q());
  27674. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .coord_x = 9;
  27675. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .coord_y = 4;
  27676. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .coord_z = 10;
  27677. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .mask = 16'h6958;
  27678. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .modeMux = 1'b0;
  27679. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .FeedbackMux = 1'b0;
  27680. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .ShiftMux = 1'b0;
  27681. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .BypassEn = 1'b0;
  27682. defparam \macro_inst|apb_dac0_inst|sine_rom~329 .CarryEnb = 1'b1;
  27683. alta_slice \macro_inst|apb_dac0_inst|sine_rom~33 (
  27684. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  27685. .B(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  27686. .C(\macro_inst|apb_dac0_inst|sine_rom~32_combout ),
  27687. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  27688. .Cin(),
  27689. .Qin(),
  27690. .Clk(),
  27691. .AsyncReset(),
  27692. .SyncReset(),
  27693. .ShiftData(),
  27694. .SyncLoad(),
  27695. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~33_combout ),
  27696. .Cout(),
  27697. .Q());
  27698. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .coord_x = 9;
  27699. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .coord_y = 1;
  27700. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .coord_z = 5;
  27701. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .mask = 16'hAF44;
  27702. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .modeMux = 1'b0;
  27703. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .FeedbackMux = 1'b0;
  27704. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .ShiftMux = 1'b0;
  27705. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .BypassEn = 1'b0;
  27706. defparam \macro_inst|apb_dac0_inst|sine_rom~33 .CarryEnb = 1'b1;
  27707. alta_slice \macro_inst|apb_dac0_inst|sine_rom~330 (
  27708. .A(\macro_inst|apb_dac0_inst|sine_rom~325_combout ),
  27709. .B(\macro_inst|apb_dac0_inst|sine_rom~328_combout ),
  27710. .C(\macro_inst|apb_dac0_inst|sine_rom~329_combout ),
  27711. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  27712. .Cin(),
  27713. .Qin(),
  27714. .Clk(),
  27715. .AsyncReset(),
  27716. .SyncReset(),
  27717. .ShiftData(),
  27718. .SyncLoad(),
  27719. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~330_combout ),
  27720. .Cout(),
  27721. .Q());
  27722. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .coord_x = 9;
  27723. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .coord_y = 4;
  27724. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .coord_z = 7;
  27725. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .mask = 16'h2ECC;
  27726. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .modeMux = 1'b0;
  27727. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .FeedbackMux = 1'b0;
  27728. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .ShiftMux = 1'b0;
  27729. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .BypassEn = 1'b0;
  27730. defparam \macro_inst|apb_dac0_inst|sine_rom~330 .CarryEnb = 1'b1;
  27731. alta_slice \macro_inst|apb_dac0_inst|sine_rom~331 (
  27732. .A(\macro_inst|apb_dac0_inst|sine_rom~330_combout ),
  27733. .B(\macro_inst|apb_dac0_inst|sine_rom~311_combout ),
  27734. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  27735. .D(\macro_inst|apb_dac0_inst|sine_rom~324_combout ),
  27736. .Cin(),
  27737. .Qin(),
  27738. .Clk(),
  27739. .AsyncReset(),
  27740. .SyncReset(),
  27741. .ShiftData(),
  27742. .SyncLoad(),
  27743. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~331_combout ),
  27744. .Cout(),
  27745. .Q());
  27746. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .coord_x = 9;
  27747. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .coord_y = 4;
  27748. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .coord_z = 6;
  27749. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .mask = 16'hAFC0;
  27750. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .modeMux = 1'b0;
  27751. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .FeedbackMux = 1'b0;
  27752. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .ShiftMux = 1'b0;
  27753. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .BypassEn = 1'b0;
  27754. defparam \macro_inst|apb_dac0_inst|sine_rom~331 .CarryEnb = 1'b1;
  27755. alta_slice \macro_inst|apb_dac0_inst|sine_rom~332 (
  27756. .A(\macro_inst|apb_dac0_inst|sine_rom~331_combout ),
  27757. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  27758. .C(\macro_inst|apb_dac0_inst|sine_rom~305_combout ),
  27759. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  27760. .Cin(),
  27761. .Qin(),
  27762. .Clk(),
  27763. .AsyncReset(),
  27764. .SyncReset(),
  27765. .ShiftData(),
  27766. .SyncLoad(),
  27767. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~332_combout ),
  27768. .Cout(),
  27769. .Q());
  27770. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .coord_x = 9;
  27771. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .coord_y = 4;
  27772. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .coord_z = 5;
  27773. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .mask = 16'hF4F8;
  27774. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .modeMux = 1'b0;
  27775. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .FeedbackMux = 1'b0;
  27776. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .ShiftMux = 1'b0;
  27777. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .BypassEn = 1'b0;
  27778. defparam \macro_inst|apb_dac0_inst|sine_rom~332 .CarryEnb = 1'b1;
  27779. alta_slice \macro_inst|apb_dac0_inst|sine_rom~333 (
  27780. .A(\macro_inst|apb_dac0_inst|sine_rom~255_combout ),
  27781. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  27782. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27783. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  27784. .Cin(),
  27785. .Qin(),
  27786. .Clk(),
  27787. .AsyncReset(),
  27788. .SyncReset(),
  27789. .ShiftData(),
  27790. .SyncLoad(),
  27791. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~333_combout ),
  27792. .Cout(),
  27793. .Q());
  27794. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .coord_x = 17;
  27795. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .coord_y = 1;
  27796. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .coord_z = 12;
  27797. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .mask = 16'h0002;
  27798. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .modeMux = 1'b0;
  27799. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .FeedbackMux = 1'b0;
  27800. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .ShiftMux = 1'b0;
  27801. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .BypassEn = 1'b0;
  27802. defparam \macro_inst|apb_dac0_inst|sine_rom~333 .CarryEnb = 1'b1;
  27803. alta_slice \macro_inst|apb_dac0_inst|sine_rom~334 (
  27804. .A(\macro_inst|apb_dac0_inst|sine_rom~268_combout ),
  27805. .B(\macro_inst|apb_dac0_inst|phase_r [9]),
  27806. .C(\macro_inst|apb_dac0_inst|sine_rom~333_combout ),
  27807. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  27808. .Cin(),
  27809. .Qin(),
  27810. .Clk(),
  27811. .AsyncReset(),
  27812. .SyncReset(),
  27813. .ShiftData(),
  27814. .SyncLoad(),
  27815. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~334_combout ),
  27816. .Cout(),
  27817. .Q());
  27818. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .coord_x = 17;
  27819. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .coord_y = 1;
  27820. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .coord_z = 7;
  27821. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .mask = 16'h3326;
  27822. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .modeMux = 1'b0;
  27823. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .FeedbackMux = 1'b0;
  27824. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .ShiftMux = 1'b0;
  27825. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .BypassEn = 1'b0;
  27826. defparam \macro_inst|apb_dac0_inst|sine_rom~334 .CarryEnb = 1'b1;
  27827. alta_slice \macro_inst|apb_dac0_inst|sine_rom~335 (
  27828. .A(\macro_inst|apb_dac0_inst|phase_r [7]),
  27829. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  27830. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  27831. .D(\macro_inst|apb_dac0_inst|sine_rom~263_combout ),
  27832. .Cin(),
  27833. .Qin(),
  27834. .Clk(),
  27835. .AsyncReset(),
  27836. .SyncReset(),
  27837. .ShiftData(),
  27838. .SyncLoad(),
  27839. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~335_combout ),
  27840. .Cout(),
  27841. .Q());
  27842. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .coord_x = 17;
  27843. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .coord_y = 1;
  27844. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .coord_z = 4;
  27845. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .mask = 16'h7757;
  27846. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .modeMux = 1'b0;
  27847. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .FeedbackMux = 1'b0;
  27848. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .ShiftMux = 1'b0;
  27849. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .BypassEn = 1'b0;
  27850. defparam \macro_inst|apb_dac0_inst|sine_rom~335 .CarryEnb = 1'b1;
  27851. alta_slice \macro_inst|apb_dac0_inst|sine_rom~336 (
  27852. .A(\macro_inst|apb_dac0_inst|sine_rom~334_combout ),
  27853. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  27854. .C(\macro_inst|apb_dac0_inst|sine_rom~335_combout ),
  27855. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  27856. .Cin(),
  27857. .Qin(),
  27858. .Clk(),
  27859. .AsyncReset(),
  27860. .SyncReset(),
  27861. .ShiftData(),
  27862. .SyncLoad(),
  27863. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~336_combout ),
  27864. .Cout(),
  27865. .Q());
  27866. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .coord_x = 16;
  27867. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .coord_y = 3;
  27868. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .coord_z = 12;
  27869. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .mask = 16'h2EE2;
  27870. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .modeMux = 1'b0;
  27871. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .FeedbackMux = 1'b0;
  27872. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .ShiftMux = 1'b0;
  27873. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .BypassEn = 1'b0;
  27874. defparam \macro_inst|apb_dac0_inst|sine_rom~336 .CarryEnb = 1'b1;
  27875. alta_slice \macro_inst|apb_dac0_inst|sine_rom~337 (
  27876. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  27877. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  27878. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  27879. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  27880. .Cin(),
  27881. .Qin(),
  27882. .Clk(),
  27883. .AsyncReset(),
  27884. .SyncReset(),
  27885. .ShiftData(),
  27886. .SyncLoad(),
  27887. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~337_combout ),
  27888. .Cout(),
  27889. .Q());
  27890. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .coord_x = 17;
  27891. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .coord_y = 1;
  27892. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .coord_z = 8;
  27893. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .mask = 16'h0001;
  27894. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .modeMux = 1'b0;
  27895. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .FeedbackMux = 1'b0;
  27896. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .ShiftMux = 1'b0;
  27897. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .BypassEn = 1'b0;
  27898. defparam \macro_inst|apb_dac0_inst|sine_rom~337 .CarryEnb = 1'b1;
  27899. alta_slice \macro_inst|apb_dac0_inst|sine_rom~338 (
  27900. .A(\macro_inst|apb_dac0_inst|sine_rom~255_combout ),
  27901. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  27902. .C(\macro_inst|apb_dac0_inst|phase_r [9]),
  27903. .D(\macro_inst|apb_dac0_inst|sine_rom~337_combout ),
  27904. .Cin(),
  27905. .Qin(),
  27906. .Clk(),
  27907. .AsyncReset(),
  27908. .SyncReset(),
  27909. .ShiftData(),
  27910. .SyncLoad(),
  27911. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~338_combout ),
  27912. .Cout(),
  27913. .Q());
  27914. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .coord_x = 17;
  27915. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .coord_y = 1;
  27916. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .coord_z = 9;
  27917. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .mask = 16'h2F0F;
  27918. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .modeMux = 1'b0;
  27919. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .FeedbackMux = 1'b0;
  27920. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .ShiftMux = 1'b0;
  27921. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .BypassEn = 1'b0;
  27922. defparam \macro_inst|apb_dac0_inst|sine_rom~338 .CarryEnb = 1'b1;
  27923. alta_slice \macro_inst|apb_dac0_inst|sine_rom~339 (
  27924. .A(\macro_inst|apb_dac0_inst|phase_r [9]),
  27925. .B(\macro_inst|apb_dac0_inst|sine_rom~17_combout ),
  27926. .C(\macro_inst|apb_dac0_inst|sine_rom~38_combout ),
  27927. .D(\macro_inst|apb_dac0_inst|phase_r [8]),
  27928. .Cin(),
  27929. .Qin(),
  27930. .Clk(),
  27931. .AsyncReset(),
  27932. .SyncReset(),
  27933. .ShiftData(),
  27934. .SyncLoad(),
  27935. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~339_combout ),
  27936. .Cout(),
  27937. .Q());
  27938. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .coord_x = 17;
  27939. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .coord_y = 2;
  27940. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .coord_z = 0;
  27941. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .mask = 16'hF6F0;
  27942. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .modeMux = 1'b0;
  27943. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .FeedbackMux = 1'b0;
  27944. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .ShiftMux = 1'b0;
  27945. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .BypassEn = 1'b0;
  27946. defparam \macro_inst|apb_dac0_inst|sine_rom~339 .CarryEnb = 1'b1;
  27947. alta_slice \macro_inst|apb_dac0_inst|sine_rom~34 (
  27948. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  27949. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27950. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  27951. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  27952. .Cin(),
  27953. .Qin(),
  27954. .Clk(),
  27955. .AsyncReset(),
  27956. .SyncReset(),
  27957. .ShiftData(),
  27958. .SyncLoad(),
  27959. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~34_combout ),
  27960. .Cout(),
  27961. .Q());
  27962. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .coord_x = 9;
  27963. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .coord_y = 1;
  27964. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .coord_z = 14;
  27965. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .mask = 16'h7CFC;
  27966. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .modeMux = 1'b0;
  27967. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .FeedbackMux = 1'b0;
  27968. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .ShiftMux = 1'b0;
  27969. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .BypassEn = 1'b0;
  27970. defparam \macro_inst|apb_dac0_inst|sine_rom~34 .CarryEnb = 1'b1;
  27971. alta_slice \macro_inst|apb_dac0_inst|sine_rom~340 (
  27972. .A(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  27973. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  27974. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  27975. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  27976. .Cin(),
  27977. .Qin(),
  27978. .Clk(),
  27979. .AsyncReset(),
  27980. .SyncReset(),
  27981. .ShiftData(),
  27982. .SyncLoad(),
  27983. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~340_combout ),
  27984. .Cout(),
  27985. .Q());
  27986. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .coord_x = 18;
  27987. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .coord_y = 2;
  27988. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .coord_z = 14;
  27989. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .mask = 16'hFE00;
  27990. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .modeMux = 1'b0;
  27991. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .FeedbackMux = 1'b0;
  27992. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .ShiftMux = 1'b0;
  27993. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .BypassEn = 1'b0;
  27994. defparam \macro_inst|apb_dac0_inst|sine_rom~340 .CarryEnb = 1'b1;
  27995. alta_slice \macro_inst|apb_dac0_inst|sine_rom~341 (
  27996. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  27997. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  27998. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  27999. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28000. .Cin(),
  28001. .Qin(),
  28002. .Clk(),
  28003. .AsyncReset(),
  28004. .SyncReset(),
  28005. .ShiftData(),
  28006. .SyncLoad(),
  28007. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~341_combout ),
  28008. .Cout(),
  28009. .Q());
  28010. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .coord_x = 19;
  28011. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .coord_y = 1;
  28012. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .coord_z = 9;
  28013. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .mask = 16'h4964;
  28014. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .modeMux = 1'b0;
  28015. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .FeedbackMux = 1'b0;
  28016. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .ShiftMux = 1'b0;
  28017. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .BypassEn = 1'b0;
  28018. defparam \macro_inst|apb_dac0_inst|sine_rom~341 .CarryEnb = 1'b1;
  28019. alta_slice \macro_inst|apb_dac0_inst|sine_rom~342 (
  28020. .A(\macro_inst|apb_dac0_inst|sine_rom~341_combout ),
  28021. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  28022. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  28023. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28024. .Cin(),
  28025. .Qin(),
  28026. .Clk(),
  28027. .AsyncReset(),
  28028. .SyncReset(),
  28029. .ShiftData(),
  28030. .SyncLoad(),
  28031. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~342_combout ),
  28032. .Cout(),
  28033. .Q());
  28034. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .coord_x = 19;
  28035. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .coord_y = 1;
  28036. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .coord_z = 8;
  28037. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .mask = 16'hFE02;
  28038. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .modeMux = 1'b0;
  28039. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .FeedbackMux = 1'b0;
  28040. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .ShiftMux = 1'b0;
  28041. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .BypassEn = 1'b0;
  28042. defparam \macro_inst|apb_dac0_inst|sine_rom~342 .CarryEnb = 1'b1;
  28043. alta_slice \macro_inst|apb_dac0_inst|sine_rom~343 (
  28044. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  28045. .B(\macro_inst|apb_dac0_inst|sine_rom~76_combout ),
  28046. .C(\macro_inst|apb_dac0_inst|sine_rom~75_combout ),
  28047. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  28048. .Cin(),
  28049. .Qin(),
  28050. .Clk(),
  28051. .AsyncReset(),
  28052. .SyncReset(),
  28053. .ShiftData(),
  28054. .SyncLoad(),
  28055. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~343_combout ),
  28056. .Cout(),
  28057. .Q());
  28058. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .coord_x = 10;
  28059. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .coord_y = 1;
  28060. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .coord_z = 15;
  28061. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .mask = 16'h8EA3;
  28062. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .modeMux = 1'b0;
  28063. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .FeedbackMux = 1'b0;
  28064. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .ShiftMux = 1'b0;
  28065. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .BypassEn = 1'b0;
  28066. defparam \macro_inst|apb_dac0_inst|sine_rom~343 .CarryEnb = 1'b1;
  28067. alta_slice \macro_inst|apb_dac0_inst|sine_rom~344 (
  28068. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  28069. .B(\macro_inst|apb_dac0_inst|sine_rom~76_combout ),
  28070. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28071. .D(\macro_inst|apb_dac0_inst|sine_rom~343_combout ),
  28072. .Cin(),
  28073. .Qin(),
  28074. .Clk(),
  28075. .AsyncReset(),
  28076. .SyncReset(),
  28077. .ShiftData(),
  28078. .SyncLoad(),
  28079. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~344_combout ),
  28080. .Cout(),
  28081. .Q());
  28082. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .coord_x = 10;
  28083. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .coord_y = 1;
  28084. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .coord_z = 6;
  28085. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .mask = 16'hD714;
  28086. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .modeMux = 1'b0;
  28087. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .FeedbackMux = 1'b0;
  28088. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .ShiftMux = 1'b0;
  28089. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .BypassEn = 1'b0;
  28090. defparam \macro_inst|apb_dac0_inst|sine_rom~344 .CarryEnb = 1'b1;
  28091. alta_slice \macro_inst|apb_dac0_inst|sine_rom~345 (
  28092. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  28093. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  28094. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  28095. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  28096. .Cin(),
  28097. .Qin(),
  28098. .Clk(),
  28099. .AsyncReset(),
  28100. .SyncReset(),
  28101. .ShiftData(),
  28102. .SyncLoad(),
  28103. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~345_combout ),
  28104. .Cout(),
  28105. .Q());
  28106. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .coord_x = 19;
  28107. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .coord_y = 3;
  28108. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .coord_z = 15;
  28109. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .mask = 16'h7FEA;
  28110. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .modeMux = 1'b0;
  28111. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .FeedbackMux = 1'b0;
  28112. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .ShiftMux = 1'b0;
  28113. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .BypassEn = 1'b0;
  28114. defparam \macro_inst|apb_dac0_inst|sine_rom~345 .CarryEnb = 1'b1;
  28115. alta_slice \macro_inst|apb_dac0_inst|sine_rom~346 (
  28116. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  28117. .B(\macro_inst|apb_dac0_inst|sine_rom~345_combout ),
  28118. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  28119. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  28120. .Cin(),
  28121. .Qin(),
  28122. .Clk(),
  28123. .AsyncReset(),
  28124. .SyncReset(),
  28125. .ShiftData(),
  28126. .SyncLoad(),
  28127. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~346_combout ),
  28128. .Cout(),
  28129. .Q());
  28130. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .coord_x = 19;
  28131. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .coord_y = 3;
  28132. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .coord_z = 3;
  28133. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .mask = 16'hA43C;
  28134. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .modeMux = 1'b0;
  28135. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .FeedbackMux = 1'b0;
  28136. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .ShiftMux = 1'b0;
  28137. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .BypassEn = 1'b0;
  28138. defparam \macro_inst|apb_dac0_inst|sine_rom~346 .CarryEnb = 1'b1;
  28139. alta_slice \macro_inst|apb_dac0_inst|sine_rom~35 (
  28140. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  28141. .B(\macro_inst|apb_dac0_inst|sine_rom~33_combout ),
  28142. .C(\macro_inst|apb_dac0_inst|sine_rom~34_combout ),
  28143. .D(\macro_inst|apb_dac0_inst|sine_rom~21_combout ),
  28144. .Cin(),
  28145. .Qin(),
  28146. .Clk(),
  28147. .AsyncReset(),
  28148. .SyncReset(),
  28149. .ShiftData(),
  28150. .SyncLoad(),
  28151. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~35_combout ),
  28152. .Cout(),
  28153. .Q());
  28154. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .coord_x = 9;
  28155. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .coord_y = 1;
  28156. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .coord_z = 6;
  28157. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .mask = 16'hE6C4;
  28158. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .modeMux = 1'b0;
  28159. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .FeedbackMux = 1'b0;
  28160. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .ShiftMux = 1'b0;
  28161. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .BypassEn = 1'b0;
  28162. defparam \macro_inst|apb_dac0_inst|sine_rom~35 .CarryEnb = 1'b1;
  28163. alta_slice \macro_inst|apb_dac0_inst|sine_rom~36 (
  28164. .A(\macro_inst|apb_dac0_inst|sine_rom~23_combout ),
  28165. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  28166. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28167. .D(\macro_inst|apb_dac0_inst|sine_rom~35_combout ),
  28168. .Cin(),
  28169. .Qin(),
  28170. .Clk(),
  28171. .AsyncReset(),
  28172. .SyncReset(),
  28173. .ShiftData(),
  28174. .SyncLoad(),
  28175. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~36_combout ),
  28176. .Cout(),
  28177. .Q());
  28178. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .coord_x = 8;
  28179. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .coord_y = 2;
  28180. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .coord_z = 13;
  28181. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .mask = 16'hE3E0;
  28182. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .modeMux = 1'b0;
  28183. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .FeedbackMux = 1'b0;
  28184. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .ShiftMux = 1'b0;
  28185. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .BypassEn = 1'b0;
  28186. defparam \macro_inst|apb_dac0_inst|sine_rom~36 .CarryEnb = 1'b1;
  28187. alta_slice \macro_inst|apb_dac0_inst|sine_rom~37 (
  28188. .A(\macro_inst|apb_dac0_inst|sine_rom~30_combout ),
  28189. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  28190. .C(\macro_inst|apb_dac0_inst|sine_rom~20_combout ),
  28191. .D(\macro_inst|apb_dac0_inst|sine_rom~36_combout ),
  28192. .Cin(),
  28193. .Qin(),
  28194. .Clk(),
  28195. .AsyncReset(),
  28196. .SyncReset(),
  28197. .ShiftData(),
  28198. .SyncLoad(),
  28199. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~37_combout ),
  28200. .Cout(),
  28201. .Q());
  28202. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .coord_x = 8;
  28203. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .coord_y = 2;
  28204. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .coord_z = 15;
  28205. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .mask = 16'hBBC0;
  28206. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .modeMux = 1'b0;
  28207. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .FeedbackMux = 1'b0;
  28208. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .ShiftMux = 1'b0;
  28209. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .BypassEn = 1'b0;
  28210. defparam \macro_inst|apb_dac0_inst|sine_rom~37 .CarryEnb = 1'b1;
  28211. alta_slice \macro_inst|apb_dac0_inst|sine_rom~38 (
  28212. .A(\macro_inst|apb_dac0_inst|sine_rom~31_combout ),
  28213. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  28214. .C(\macro_inst|apb_dac0_inst|sine_rom~37_combout ),
  28215. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  28216. .Cin(),
  28217. .Qin(),
  28218. .Clk(),
  28219. .AsyncReset(),
  28220. .SyncReset(),
  28221. .ShiftData(),
  28222. .SyncLoad(),
  28223. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~38_combout ),
  28224. .Cout(),
  28225. .Q());
  28226. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .coord_x = 9;
  28227. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .coord_y = 2;
  28228. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .coord_z = 4;
  28229. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .mask = 16'h2230;
  28230. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .modeMux = 1'b0;
  28231. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .FeedbackMux = 1'b0;
  28232. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .ShiftMux = 1'b0;
  28233. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .BypassEn = 1'b0;
  28234. defparam \macro_inst|apb_dac0_inst|sine_rom~38 .CarryEnb = 1'b1;
  28235. alta_slice \macro_inst|apb_dac0_inst|sine_rom~39 (
  28236. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  28237. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  28238. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  28239. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  28240. .Cin(),
  28241. .Qin(),
  28242. .Clk(),
  28243. .AsyncReset(),
  28244. .SyncReset(),
  28245. .ShiftData(),
  28246. .SyncLoad(),
  28247. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~39_combout ),
  28248. .Cout(),
  28249. .Q());
  28250. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .coord_x = 20;
  28251. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .coord_y = 1;
  28252. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .coord_z = 6;
  28253. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .mask = 16'hA2EA;
  28254. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .modeMux = 1'b0;
  28255. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .FeedbackMux = 1'b0;
  28256. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .ShiftMux = 1'b0;
  28257. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .BypassEn = 1'b0;
  28258. defparam \macro_inst|apb_dac0_inst|sine_rom~39 .CarryEnb = 1'b1;
  28259. alta_slice \macro_inst|apb_dac0_inst|sine_rom~4 (
  28260. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  28261. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  28262. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28263. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28264. .Cin(),
  28265. .Qin(),
  28266. .Clk(),
  28267. .AsyncReset(),
  28268. .SyncReset(),
  28269. .ShiftData(),
  28270. .SyncLoad(),
  28271. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~4_combout ),
  28272. .Cout(),
  28273. .Q());
  28274. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .coord_x = 9;
  28275. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .coord_y = 1;
  28276. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .coord_z = 8;
  28277. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .mask = 16'hFCEC;
  28278. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .modeMux = 1'b0;
  28279. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .FeedbackMux = 1'b0;
  28280. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .ShiftMux = 1'b0;
  28281. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .BypassEn = 1'b0;
  28282. defparam \macro_inst|apb_dac0_inst|sine_rom~4 .CarryEnb = 1'b1;
  28283. alta_slice \macro_inst|apb_dac0_inst|sine_rom~40 (
  28284. .A(\macro_inst|apb_dac0_inst|sine_rom~39_combout ),
  28285. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  28286. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28287. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  28288. .Cin(),
  28289. .Qin(),
  28290. .Clk(),
  28291. .AsyncReset(),
  28292. .SyncReset(),
  28293. .ShiftData(),
  28294. .SyncLoad(),
  28295. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~40_combout ),
  28296. .Cout(),
  28297. .Q());
  28298. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .coord_x = 20;
  28299. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .coord_y = 1;
  28300. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .coord_z = 3;
  28301. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .mask = 16'hC97C;
  28302. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .modeMux = 1'b0;
  28303. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .FeedbackMux = 1'b0;
  28304. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .ShiftMux = 1'b0;
  28305. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .BypassEn = 1'b0;
  28306. defparam \macro_inst|apb_dac0_inst|sine_rom~40 .CarryEnb = 1'b1;
  28307. alta_slice \macro_inst|apb_dac0_inst|sine_rom~41 (
  28308. .A(\macro_inst|apb_dac0_inst|sine_rom~39_combout ),
  28309. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  28310. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28311. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  28312. .Cin(),
  28313. .Qin(),
  28314. .Clk(),
  28315. .AsyncReset(),
  28316. .SyncReset(),
  28317. .ShiftData(),
  28318. .SyncLoad(),
  28319. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~41_combout ),
  28320. .Cout(),
  28321. .Q());
  28322. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .coord_x = 20;
  28323. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .coord_y = 1;
  28324. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .coord_z = 9;
  28325. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .mask = 16'hB060;
  28326. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .modeMux = 1'b0;
  28327. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .FeedbackMux = 1'b0;
  28328. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .ShiftMux = 1'b0;
  28329. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .BypassEn = 1'b0;
  28330. defparam \macro_inst|apb_dac0_inst|sine_rom~41 .CarryEnb = 1'b1;
  28331. alta_slice \macro_inst|apb_dac0_inst|sine_rom~42 (
  28332. .A(vcc),
  28333. .B(\macro_inst|apb_dac0_inst|sine_rom~40_combout ),
  28334. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  28335. .D(\macro_inst|apb_dac0_inst|sine_rom~41_combout ),
  28336. .Cin(),
  28337. .Qin(),
  28338. .Clk(),
  28339. .AsyncReset(),
  28340. .SyncReset(),
  28341. .ShiftData(),
  28342. .SyncLoad(),
  28343. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~42_combout ),
  28344. .Cout(),
  28345. .Q());
  28346. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .coord_x = 20;
  28347. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .coord_y = 1;
  28348. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .coord_z = 8;
  28349. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .mask = 16'h333C;
  28350. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .modeMux = 1'b0;
  28351. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .FeedbackMux = 1'b0;
  28352. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .ShiftMux = 1'b0;
  28353. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .BypassEn = 1'b0;
  28354. defparam \macro_inst|apb_dac0_inst|sine_rom~42 .CarryEnb = 1'b1;
  28355. alta_slice \macro_inst|apb_dac0_inst|sine_rom~43 (
  28356. .A(\macro_inst|apb_dac0_inst|phase_r [2]),
  28357. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  28358. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  28359. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  28360. .Cin(),
  28361. .Qin(),
  28362. .Clk(),
  28363. .AsyncReset(),
  28364. .SyncReset(),
  28365. .ShiftData(),
  28366. .SyncLoad(),
  28367. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~43_combout ),
  28368. .Cout(),
  28369. .Q());
  28370. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .coord_x = 19;
  28371. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .coord_y = 3;
  28372. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .coord_z = 9;
  28373. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .mask = 16'hF938;
  28374. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .modeMux = 1'b0;
  28375. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .FeedbackMux = 1'b0;
  28376. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .ShiftMux = 1'b0;
  28377. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .BypassEn = 1'b0;
  28378. defparam \macro_inst|apb_dac0_inst|sine_rom~43 .CarryEnb = 1'b1;
  28379. alta_slice \macro_inst|apb_dac0_inst|sine_rom~44 (
  28380. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28381. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  28382. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28383. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28384. .Cin(),
  28385. .Qin(),
  28386. .Clk(),
  28387. .AsyncReset(),
  28388. .SyncReset(),
  28389. .ShiftData(),
  28390. .SyncLoad(),
  28391. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~44_combout ),
  28392. .Cout(),
  28393. .Q());
  28394. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .coord_x = 19;
  28395. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .coord_y = 3;
  28396. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .coord_z = 2;
  28397. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .mask = 16'h88EC;
  28398. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .modeMux = 1'b0;
  28399. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .FeedbackMux = 1'b0;
  28400. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .ShiftMux = 1'b0;
  28401. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .BypassEn = 1'b0;
  28402. defparam \macro_inst|apb_dac0_inst|sine_rom~44 .CarryEnb = 1'b1;
  28403. alta_slice \macro_inst|apb_dac0_inst|sine_rom~45 (
  28404. .A(\macro_inst|apb_dac0_inst|sine_rom~44_combout ),
  28405. .B(\macro_inst|apb_dac0_inst|sine_rom~43_combout ),
  28406. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28407. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  28408. .Cin(),
  28409. .Qin(),
  28410. .Clk(),
  28411. .AsyncReset(),
  28412. .SyncReset(),
  28413. .ShiftData(),
  28414. .SyncLoad(),
  28415. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~45_combout ),
  28416. .Cout(),
  28417. .Q());
  28418. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .coord_x = 19;
  28419. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .coord_y = 3;
  28420. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .coord_z = 0;
  28421. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .mask = 16'hC7F6;
  28422. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .modeMux = 1'b0;
  28423. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .FeedbackMux = 1'b0;
  28424. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .ShiftMux = 1'b0;
  28425. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .BypassEn = 1'b0;
  28426. defparam \macro_inst|apb_dac0_inst|sine_rom~45 .CarryEnb = 1'b1;
  28427. alta_slice \macro_inst|apb_dac0_inst|sine_rom~46 (
  28428. .A(\macro_inst|apb_dac0_inst|sine_rom~44_combout ),
  28429. .B(\macro_inst|apb_dac0_inst|sine_rom~43_combout ),
  28430. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28431. .D(\macro_inst|apb_dac0_inst|phase_r [0]),
  28432. .Cin(),
  28433. .Qin(),
  28434. .Clk(),
  28435. .AsyncReset(),
  28436. .SyncReset(),
  28437. .ShiftData(),
  28438. .SyncLoad(),
  28439. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~46_combout ),
  28440. .Cout(),
  28441. .Q());
  28442. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .coord_x = 19;
  28443. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .coord_y = 3;
  28444. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .coord_z = 7;
  28445. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .mask = 16'h5A4A;
  28446. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .modeMux = 1'b0;
  28447. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .FeedbackMux = 1'b0;
  28448. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .ShiftMux = 1'b0;
  28449. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .BypassEn = 1'b0;
  28450. defparam \macro_inst|apb_dac0_inst|sine_rom~46 .CarryEnb = 1'b1;
  28451. alta_slice \macro_inst|apb_dac0_inst|sine_rom~47 (
  28452. .A(vcc),
  28453. .B(\macro_inst|apb_dac0_inst|sine_rom~46_combout ),
  28454. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  28455. .D(\macro_inst|apb_dac0_inst|sine_rom~45_combout ),
  28456. .Cin(),
  28457. .Qin(),
  28458. .Clk(),
  28459. .AsyncReset(),
  28460. .SyncReset(),
  28461. .ShiftData(),
  28462. .SyncLoad(),
  28463. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~47_combout ),
  28464. .Cout(),
  28465. .Q());
  28466. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .coord_x = 19;
  28467. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .coord_y = 3;
  28468. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .coord_z = 1;
  28469. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .mask = 16'hC3CC;
  28470. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .modeMux = 1'b0;
  28471. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .FeedbackMux = 1'b0;
  28472. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .ShiftMux = 1'b0;
  28473. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .BypassEn = 1'b0;
  28474. defparam \macro_inst|apb_dac0_inst|sine_rom~47 .CarryEnb = 1'b1;
  28475. alta_slice \macro_inst|apb_dac0_inst|sine_rom~48 (
  28476. .A(\macro_inst|apb_dac0_inst|sine_rom~42_combout ),
  28477. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  28478. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  28479. .D(\macro_inst|apb_dac0_inst|sine_rom~47_combout ),
  28480. .Cin(),
  28481. .Qin(),
  28482. .Clk(),
  28483. .AsyncReset(),
  28484. .SyncReset(),
  28485. .ShiftData(),
  28486. .SyncLoad(),
  28487. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~48_combout ),
  28488. .Cout(),
  28489. .Q());
  28490. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .coord_x = 19;
  28491. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .coord_y = 3;
  28492. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .coord_z = 8;
  28493. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .mask = 16'hC7C4;
  28494. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .modeMux = 1'b0;
  28495. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .FeedbackMux = 1'b0;
  28496. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .ShiftMux = 1'b0;
  28497. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .BypassEn = 1'b0;
  28498. defparam \macro_inst|apb_dac0_inst|sine_rom~48 .CarryEnb = 1'b1;
  28499. alta_slice \macro_inst|apb_dac0_inst|sine_rom~49 (
  28500. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  28501. .B(vcc),
  28502. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  28503. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28504. .Cin(),
  28505. .Qin(),
  28506. .Clk(),
  28507. .AsyncReset(),
  28508. .SyncReset(),
  28509. .ShiftData(),
  28510. .SyncLoad(),
  28511. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~49_combout ),
  28512. .Cout(),
  28513. .Q());
  28514. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .coord_x = 17;
  28515. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .coord_y = 5;
  28516. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .coord_z = 13;
  28517. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .mask = 16'h0500;
  28518. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .modeMux = 1'b0;
  28519. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .FeedbackMux = 1'b0;
  28520. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .ShiftMux = 1'b0;
  28521. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .BypassEn = 1'b0;
  28522. defparam \macro_inst|apb_dac0_inst|sine_rom~49 .CarryEnb = 1'b1;
  28523. alta_slice \macro_inst|apb_dac0_inst|sine_rom~5 (
  28524. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  28525. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  28526. .C(\macro_inst|apb_dac0_inst|sine_rom~4_combout ),
  28527. .D(\macro_inst|apb_dac0_inst|sine_rom~3_combout ),
  28528. .Cin(),
  28529. .Qin(),
  28530. .Clk(),
  28531. .AsyncReset(),
  28532. .SyncReset(),
  28533. .ShiftData(),
  28534. .SyncLoad(),
  28535. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~5_combout ),
  28536. .Cout(),
  28537. .Q());
  28538. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .coord_x = 9;
  28539. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .coord_y = 1;
  28540. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .coord_z = 3;
  28541. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .mask = 16'hCD89;
  28542. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .modeMux = 1'b0;
  28543. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .FeedbackMux = 1'b0;
  28544. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .ShiftMux = 1'b0;
  28545. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .BypassEn = 1'b0;
  28546. defparam \macro_inst|apb_dac0_inst|sine_rom~5 .CarryEnb = 1'b1;
  28547. alta_slice \macro_inst|apb_dac0_inst|sine_rom~50 (
  28548. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  28549. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  28550. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  28551. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28552. .Cin(),
  28553. .Qin(),
  28554. .Clk(),
  28555. .AsyncReset(),
  28556. .SyncReset(),
  28557. .ShiftData(),
  28558. .SyncLoad(),
  28559. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~50_combout ),
  28560. .Cout(),
  28561. .Q());
  28562. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .coord_x = 17;
  28563. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .coord_y = 5;
  28564. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .coord_z = 7;
  28565. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .mask = 16'h0C10;
  28566. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .modeMux = 1'b0;
  28567. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .FeedbackMux = 1'b0;
  28568. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .ShiftMux = 1'b0;
  28569. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .BypassEn = 1'b0;
  28570. defparam \macro_inst|apb_dac0_inst|sine_rom~50 .CarryEnb = 1'b1;
  28571. alta_slice \macro_inst|apb_dac0_inst|sine_rom~51 (
  28572. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28573. .B(\macro_inst|apb_dac0_inst|sine_rom~49_combout ),
  28574. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  28575. .D(\macro_inst|apb_dac0_inst|sine_rom~50_combout ),
  28576. .Cin(),
  28577. .Qin(),
  28578. .Clk(),
  28579. .AsyncReset(),
  28580. .SyncReset(),
  28581. .ShiftData(),
  28582. .SyncLoad(),
  28583. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~51_combout ),
  28584. .Cout(),
  28585. .Q());
  28586. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .coord_x = 17;
  28587. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .coord_y = 5;
  28588. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .coord_z = 4;
  28589. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .mask = 16'hEEFE;
  28590. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .modeMux = 1'b0;
  28591. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .FeedbackMux = 1'b0;
  28592. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .ShiftMux = 1'b0;
  28593. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .BypassEn = 1'b0;
  28594. defparam \macro_inst|apb_dac0_inst|sine_rom~51 .CarryEnb = 1'b1;
  28595. alta_slice \macro_inst|apb_dac0_inst|sine_rom~52 (
  28596. .A(\macro_inst|apb_dac0_inst|sine_rom~48_combout ),
  28597. .B(\macro_inst|apb_dac0_inst|sine_rom~346_combout ),
  28598. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  28599. .D(\macro_inst|apb_dac0_inst|sine_rom~51_combout ),
  28600. .Cin(),
  28601. .Qin(),
  28602. .Clk(),
  28603. .AsyncReset(),
  28604. .SyncReset(),
  28605. .ShiftData(),
  28606. .SyncLoad(),
  28607. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~52_combout ),
  28608. .Cout(),
  28609. .Q());
  28610. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .coord_x = 19;
  28611. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .coord_y = 3;
  28612. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .coord_z = 13;
  28613. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .mask = 16'h1ABA;
  28614. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .modeMux = 1'b0;
  28615. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .FeedbackMux = 1'b0;
  28616. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .ShiftMux = 1'b0;
  28617. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .BypassEn = 1'b0;
  28618. defparam \macro_inst|apb_dac0_inst|sine_rom~52 .CarryEnb = 1'b1;
  28619. alta_slice \macro_inst|apb_dac0_inst|sine_rom~53 (
  28620. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28621. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  28622. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28623. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28624. .Cin(),
  28625. .Qin(),
  28626. .Clk(),
  28627. .AsyncReset(),
  28628. .SyncReset(),
  28629. .ShiftData(),
  28630. .SyncLoad(),
  28631. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~53_combout ),
  28632. .Cout(),
  28633. .Q());
  28634. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .coord_x = 19;
  28635. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .coord_y = 3;
  28636. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .coord_z = 10;
  28637. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .mask = 16'hF040;
  28638. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .modeMux = 1'b0;
  28639. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .FeedbackMux = 1'b0;
  28640. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .ShiftMux = 1'b0;
  28641. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .BypassEn = 1'b0;
  28642. defparam \macro_inst|apb_dac0_inst|sine_rom~53 .CarryEnb = 1'b1;
  28643. alta_slice \macro_inst|apb_dac0_inst|sine_rom~54 (
  28644. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28645. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  28646. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28647. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28648. .Cin(),
  28649. .Qin(),
  28650. .Clk(),
  28651. .AsyncReset(),
  28652. .SyncReset(),
  28653. .ShiftData(),
  28654. .SyncLoad(),
  28655. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~54_combout ),
  28656. .Cout(),
  28657. .Q());
  28658. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .coord_x = 19;
  28659. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .coord_y = 3;
  28660. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .coord_z = 4;
  28661. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .mask = 16'hFE80;
  28662. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .modeMux = 1'b0;
  28663. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .FeedbackMux = 1'b0;
  28664. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .ShiftMux = 1'b0;
  28665. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .BypassEn = 1'b0;
  28666. defparam \macro_inst|apb_dac0_inst|sine_rom~54 .CarryEnb = 1'b1;
  28667. alta_slice \macro_inst|apb_dac0_inst|sine_rom~55 (
  28668. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  28669. .B(\macro_inst|apb_dac0_inst|sine_rom~54_combout ),
  28670. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28671. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  28672. .Cin(),
  28673. .Qin(),
  28674. .Clk(),
  28675. .AsyncReset(),
  28676. .SyncReset(),
  28677. .ShiftData(),
  28678. .SyncLoad(),
  28679. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~55_combout ),
  28680. .Cout(),
  28681. .Q());
  28682. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .coord_x = 19;
  28683. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .coord_y = 3;
  28684. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .coord_z = 5;
  28685. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .mask = 16'hAB40;
  28686. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .modeMux = 1'b0;
  28687. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .FeedbackMux = 1'b0;
  28688. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .ShiftMux = 1'b0;
  28689. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .BypassEn = 1'b0;
  28690. defparam \macro_inst|apb_dac0_inst|sine_rom~55 .CarryEnb = 1'b1;
  28691. alta_slice \macro_inst|apb_dac0_inst|sine_rom~56 (
  28692. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28693. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  28694. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  28695. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28696. .Cin(),
  28697. .Qin(),
  28698. .Clk(),
  28699. .AsyncReset(),
  28700. .SyncReset(),
  28701. .ShiftData(),
  28702. .SyncLoad(),
  28703. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~56_combout ),
  28704. .Cout(),
  28705. .Q());
  28706. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .coord_x = 19;
  28707. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .coord_y = 3;
  28708. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .coord_z = 14;
  28709. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .mask = 16'hB5F0;
  28710. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .modeMux = 1'b0;
  28711. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .FeedbackMux = 1'b0;
  28712. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .ShiftMux = 1'b0;
  28713. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .BypassEn = 1'b0;
  28714. defparam \macro_inst|apb_dac0_inst|sine_rom~56 .CarryEnb = 1'b1;
  28715. alta_slice \macro_inst|apb_dac0_inst|sine_rom~57 (
  28716. .A(\macro_inst|apb_dac0_inst|sine_rom~56_combout ),
  28717. .B(\macro_inst|apb_dac0_inst|sine_rom~53_combout ),
  28718. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  28719. .D(\macro_inst|apb_dac0_inst|sine_rom~55_combout ),
  28720. .Cin(),
  28721. .Qin(),
  28722. .Clk(),
  28723. .AsyncReset(),
  28724. .SyncReset(),
  28725. .ShiftData(),
  28726. .SyncLoad(),
  28727. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~57_combout ),
  28728. .Cout(),
  28729. .Q());
  28730. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .coord_x = 19;
  28731. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .coord_y = 3;
  28732. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .coord_z = 11;
  28733. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .mask = 16'hAF30;
  28734. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .modeMux = 1'b0;
  28735. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .FeedbackMux = 1'b0;
  28736. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .ShiftMux = 1'b0;
  28737. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .BypassEn = 1'b0;
  28738. defparam \macro_inst|apb_dac0_inst|sine_rom~57 .CarryEnb = 1'b1;
  28739. alta_slice \macro_inst|apb_dac0_inst|sine_rom~58 (
  28740. .A(\macro_inst|apb_dac0_inst|sine_rom~42_combout ),
  28741. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  28742. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  28743. .D(\macro_inst|apb_dac0_inst|sine_rom~57_combout ),
  28744. .Cin(),
  28745. .Qin(),
  28746. .Clk(),
  28747. .AsyncReset(),
  28748. .SyncReset(),
  28749. .ShiftData(),
  28750. .SyncLoad(),
  28751. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~58_combout ),
  28752. .Cout(),
  28753. .Q());
  28754. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .coord_x = 19;
  28755. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .coord_y = 3;
  28756. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .coord_z = 6;
  28757. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .mask = 16'hCBC8;
  28758. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .modeMux = 1'b0;
  28759. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .FeedbackMux = 1'b0;
  28760. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .ShiftMux = 1'b0;
  28761. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .BypassEn = 1'b0;
  28762. defparam \macro_inst|apb_dac0_inst|sine_rom~58 .CarryEnb = 1'b1;
  28763. alta_slice \macro_inst|apb_dac0_inst|sine_rom~59 (
  28764. .A(\macro_inst|apb_dac0_inst|sine_rom~58_combout ),
  28765. .B(\macro_inst|apb_dac0_inst|sine_rom~346_combout ),
  28766. .C(\macro_inst|apb_dac0_inst|phase_r [7]),
  28767. .D(\macro_inst|apb_dac0_inst|sine_rom~51_combout ),
  28768. .Cin(),
  28769. .Qin(),
  28770. .Clk(),
  28771. .AsyncReset(),
  28772. .SyncReset(),
  28773. .ShiftData(),
  28774. .SyncLoad(),
  28775. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~59_combout ),
  28776. .Cout(),
  28777. .Q());
  28778. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .coord_x = 19;
  28779. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .coord_y = 3;
  28780. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .coord_z = 12;
  28781. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .mask = 16'hEA4A;
  28782. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .modeMux = 1'b0;
  28783. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .FeedbackMux = 1'b0;
  28784. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .ShiftMux = 1'b0;
  28785. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .BypassEn = 1'b0;
  28786. defparam \macro_inst|apb_dac0_inst|sine_rom~59 .CarryEnb = 1'b1;
  28787. alta_slice \macro_inst|apb_dac0_inst|sine_rom~6 (
  28788. .A(\macro_inst|apb_dac0_inst|phase_r [3]),
  28789. .B(\macro_inst|apb_dac0_inst|phase_r [0]),
  28790. .C(\macro_inst|apb_dac0_inst|phase_r [1]),
  28791. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28792. .Cin(),
  28793. .Qin(),
  28794. .Clk(),
  28795. .AsyncReset(),
  28796. .SyncReset(),
  28797. .ShiftData(),
  28798. .SyncLoad(),
  28799. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~6_combout ),
  28800. .Cout(),
  28801. .Q());
  28802. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .coord_x = 9;
  28803. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .coord_y = 2;
  28804. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .coord_z = 0;
  28805. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .mask = 16'hEAAA;
  28806. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .modeMux = 1'b0;
  28807. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .FeedbackMux = 1'b0;
  28808. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .ShiftMux = 1'b0;
  28809. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .BypassEn = 1'b0;
  28810. defparam \macro_inst|apb_dac0_inst|sine_rom~6 .CarryEnb = 1'b1;
  28811. alta_slice \macro_inst|apb_dac0_inst|sine_rom~60 (
  28812. .A(\macro_inst|apb_dac0_inst|sine_rom~52_combout ),
  28813. .B(\macro_inst|apb_dac0_inst|phase_r [8]),
  28814. .C(\macro_inst|apb_dac0_inst|sine_rom~59_combout ),
  28815. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  28816. .Cin(),
  28817. .Qin(),
  28818. .Clk(),
  28819. .AsyncReset(),
  28820. .SyncReset(),
  28821. .ShiftData(),
  28822. .SyncLoad(),
  28823. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~60_combout ),
  28824. .Cout(),
  28825. .Q());
  28826. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .coord_x = 16;
  28827. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .coord_y = 3;
  28828. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .coord_z = 4;
  28829. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .mask = 16'h2230;
  28830. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .modeMux = 1'b0;
  28831. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .FeedbackMux = 1'b0;
  28832. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .ShiftMux = 1'b0;
  28833. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .BypassEn = 1'b0;
  28834. defparam \macro_inst|apb_dac0_inst|sine_rom~60 .CarryEnb = 1'b1;
  28835. alta_slice \macro_inst|apb_dac0_inst|sine_rom~61 (
  28836. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  28837. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  28838. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28839. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28840. .Cin(),
  28841. .Qin(),
  28842. .Clk(),
  28843. .AsyncReset(),
  28844. .SyncReset(),
  28845. .ShiftData(),
  28846. .SyncLoad(),
  28847. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~61_combout ),
  28848. .Cout(),
  28849. .Q());
  28850. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .coord_x = 20;
  28851. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .coord_y = 1;
  28852. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .coord_z = 10;
  28853. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .mask = 16'h9F3C;
  28854. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .modeMux = 1'b0;
  28855. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .FeedbackMux = 1'b0;
  28856. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .ShiftMux = 1'b0;
  28857. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .BypassEn = 1'b0;
  28858. defparam \macro_inst|apb_dac0_inst|sine_rom~61 .CarryEnb = 1'b1;
  28859. alta_slice \macro_inst|apb_dac0_inst|sine_rom~62 (
  28860. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28861. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  28862. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  28863. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28864. .Cin(),
  28865. .Qin(),
  28866. .Clk(),
  28867. .AsyncReset(),
  28868. .SyncReset(),
  28869. .ShiftData(),
  28870. .SyncLoad(),
  28871. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~62_combout ),
  28872. .Cout(),
  28873. .Q());
  28874. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .coord_x = 20;
  28875. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .coord_y = 1;
  28876. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .coord_z = 2;
  28877. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .mask = 16'hD762;
  28878. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .modeMux = 1'b0;
  28879. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .FeedbackMux = 1'b0;
  28880. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .ShiftMux = 1'b0;
  28881. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .BypassEn = 1'b0;
  28882. defparam \macro_inst|apb_dac0_inst|sine_rom~62 .CarryEnb = 1'b1;
  28883. alta_slice \macro_inst|apb_dac0_inst|sine_rom~63 (
  28884. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  28885. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  28886. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28887. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28888. .Cin(),
  28889. .Qin(),
  28890. .Clk(),
  28891. .AsyncReset(),
  28892. .SyncReset(),
  28893. .ShiftData(),
  28894. .SyncLoad(),
  28895. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~63_combout ),
  28896. .Cout(),
  28897. .Q());
  28898. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .coord_x = 20;
  28899. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .coord_y = 1;
  28900. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .coord_z = 5;
  28901. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .mask = 16'h3EC0;
  28902. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .modeMux = 1'b0;
  28903. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .FeedbackMux = 1'b0;
  28904. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .ShiftMux = 1'b0;
  28905. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .BypassEn = 1'b0;
  28906. defparam \macro_inst|apb_dac0_inst|sine_rom~63 .CarryEnb = 1'b1;
  28907. alta_slice \macro_inst|apb_dac0_inst|sine_rom~64 (
  28908. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  28909. .B(\macro_inst|apb_dac0_inst|sine_rom~63_combout ),
  28910. .C(\macro_inst|apb_dac0_inst|sine_rom~62_combout ),
  28911. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  28912. .Cin(),
  28913. .Qin(),
  28914. .Clk(),
  28915. .AsyncReset(),
  28916. .SyncReset(),
  28917. .ShiftData(),
  28918. .SyncLoad(),
  28919. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~64_combout ),
  28920. .Cout(),
  28921. .Q());
  28922. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .coord_x = 20;
  28923. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .coord_y = 1;
  28924. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .coord_z = 13;
  28925. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .mask = 16'hAF44;
  28926. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .modeMux = 1'b0;
  28927. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .FeedbackMux = 1'b0;
  28928. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .ShiftMux = 1'b0;
  28929. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .BypassEn = 1'b0;
  28930. defparam \macro_inst|apb_dac0_inst|sine_rom~64 .CarryEnb = 1'b1;
  28931. alta_slice \macro_inst|apb_dac0_inst|sine_rom~65 (
  28932. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  28933. .B(\macro_inst|apb_dac0_inst|phase_r [4]),
  28934. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  28935. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  28936. .Cin(),
  28937. .Qin(),
  28938. .Clk(),
  28939. .AsyncReset(),
  28940. .SyncReset(),
  28941. .ShiftData(),
  28942. .SyncLoad(),
  28943. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~65_combout ),
  28944. .Cout(),
  28945. .Q());
  28946. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .coord_x = 20;
  28947. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .coord_y = 1;
  28948. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .coord_z = 15;
  28949. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .mask = 16'h9D66;
  28950. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .modeMux = 1'b0;
  28951. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .FeedbackMux = 1'b0;
  28952. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .ShiftMux = 1'b0;
  28953. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .BypassEn = 1'b0;
  28954. defparam \macro_inst|apb_dac0_inst|sine_rom~65 .CarryEnb = 1'b1;
  28955. alta_slice \macro_inst|apb_dac0_inst|sine_rom~66 (
  28956. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  28957. .B(\macro_inst|apb_dac0_inst|sine_rom~64_combout ),
  28958. .C(\macro_inst|apb_dac0_inst|sine_rom~61_combout ),
  28959. .D(\macro_inst|apb_dac0_inst|sine_rom~65_combout ),
  28960. .Cin(),
  28961. .Qin(),
  28962. .Clk(),
  28963. .AsyncReset(),
  28964. .SyncReset(),
  28965. .ShiftData(),
  28966. .SyncLoad(),
  28967. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~66_combout ),
  28968. .Cout(),
  28969. .Q());
  28970. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .coord_x = 20;
  28971. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .coord_y = 1;
  28972. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .coord_z = 4;
  28973. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .mask = 16'h64EC;
  28974. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .modeMux = 1'b0;
  28975. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .FeedbackMux = 1'b0;
  28976. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .ShiftMux = 1'b0;
  28977. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .BypassEn = 1'b0;
  28978. defparam \macro_inst|apb_dac0_inst|sine_rom~66 .CarryEnb = 1'b1;
  28979. alta_slice \macro_inst|apb_dac0_inst|sine_rom~67 (
  28980. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  28981. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  28982. .C(\macro_inst|apb_dac0_inst|phase_r [6]),
  28983. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  28984. .Cin(),
  28985. .Qin(),
  28986. .Clk(),
  28987. .AsyncReset(),
  28988. .SyncReset(),
  28989. .ShiftData(),
  28990. .SyncLoad(),
  28991. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~67_combout ),
  28992. .Cout(),
  28993. .Q());
  28994. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .coord_x = 17;
  28995. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .coord_y = 5;
  28996. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .coord_z = 9;
  28997. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .mask = 16'hCF0E;
  28998. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .modeMux = 1'b0;
  28999. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .FeedbackMux = 1'b0;
  29000. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .ShiftMux = 1'b0;
  29001. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .BypassEn = 1'b0;
  29002. defparam \macro_inst|apb_dac0_inst|sine_rom~67 .CarryEnb = 1'b1;
  29003. alta_slice \macro_inst|apb_dac0_inst|sine_rom~68 (
  29004. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  29005. .B(\macro_inst|apb_dac0_inst|sine_rom~67_combout ),
  29006. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  29007. .D(\macro_inst|apb_dac0_inst|phase_r [3]),
  29008. .Cin(),
  29009. .Qin(),
  29010. .Clk(),
  29011. .AsyncReset(),
  29012. .SyncReset(),
  29013. .ShiftData(),
  29014. .SyncLoad(),
  29015. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~68_combout ),
  29016. .Cout(),
  29017. .Q());
  29018. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .coord_x = 17;
  29019. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .coord_y = 5;
  29020. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .coord_z = 3;
  29021. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .mask = 16'hF30D;
  29022. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .modeMux = 1'b0;
  29023. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .FeedbackMux = 1'b0;
  29024. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .ShiftMux = 1'b0;
  29025. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .BypassEn = 1'b0;
  29026. defparam \macro_inst|apb_dac0_inst|sine_rom~68 .CarryEnb = 1'b1;
  29027. alta_slice \macro_inst|apb_dac0_inst|sine_rom~69 (
  29028. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  29029. .B(vcc),
  29030. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  29031. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29032. .Cin(),
  29033. .Qin(),
  29034. .Clk(),
  29035. .AsyncReset(),
  29036. .SyncReset(),
  29037. .ShiftData(),
  29038. .SyncLoad(),
  29039. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~69_combout ),
  29040. .Cout(),
  29041. .Q());
  29042. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .coord_x = 17;
  29043. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .coord_y = 5;
  29044. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .coord_z = 10;
  29045. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .mask = 16'hA050;
  29046. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .modeMux = 1'b0;
  29047. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .FeedbackMux = 1'b0;
  29048. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .ShiftMux = 1'b0;
  29049. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .BypassEn = 1'b0;
  29050. defparam \macro_inst|apb_dac0_inst|sine_rom~69 .CarryEnb = 1'b1;
  29051. alta_slice \macro_inst|apb_dac0_inst|sine_rom~7 (
  29052. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29053. .B(\macro_inst|apb_dac0_inst|sine_rom~5_combout ),
  29054. .C(\macro_inst|apb_dac0_inst|sine_rom~6_combout ),
  29055. .D(\macro_inst|apb_dac0_inst|sine_rom~2_combout ),
  29056. .Cin(),
  29057. .Qin(),
  29058. .Clk(),
  29059. .AsyncReset(),
  29060. .SyncReset(),
  29061. .ShiftData(),
  29062. .SyncLoad(),
  29063. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~7_combout ),
  29064. .Cout(),
  29065. .Q());
  29066. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .coord_x = 9;
  29067. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .coord_y = 1;
  29068. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .coord_z = 15;
  29069. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .mask = 16'h6E4C;
  29070. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .modeMux = 1'b0;
  29071. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .FeedbackMux = 1'b0;
  29072. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .ShiftMux = 1'b0;
  29073. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .BypassEn = 1'b0;
  29074. defparam \macro_inst|apb_dac0_inst|sine_rom~7 .CarryEnb = 1'b1;
  29075. alta_slice \macro_inst|apb_dac0_inst|sine_rom~70 (
  29076. .A(\macro_inst|apb_dac0_inst|phase_r [1]),
  29077. .B(\macro_inst|apb_dac0_inst|sine_rom~68_combout ),
  29078. .C(\macro_inst|apb_dac0_inst|sine_rom~69_combout ),
  29079. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  29080. .Cin(),
  29081. .Qin(),
  29082. .Clk(),
  29083. .AsyncReset(),
  29084. .SyncReset(),
  29085. .ShiftData(),
  29086. .SyncLoad(),
  29087. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~70_combout ),
  29088. .Cout(),
  29089. .Q());
  29090. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .coord_x = 17;
  29091. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .coord_y = 5;
  29092. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .coord_z = 8;
  29093. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .mask = 16'h6C8C;
  29094. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .modeMux = 1'b0;
  29095. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .FeedbackMux = 1'b0;
  29096. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .ShiftMux = 1'b0;
  29097. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .BypassEn = 1'b0;
  29098. defparam \macro_inst|apb_dac0_inst|sine_rom~70 .CarryEnb = 1'b1;
  29099. alta_slice \macro_inst|apb_dac0_inst|sine_rom~71 (
  29100. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29101. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29102. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  29103. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29104. .Cin(),
  29105. .Qin(),
  29106. .Clk(),
  29107. .AsyncReset(),
  29108. .SyncReset(),
  29109. .ShiftData(),
  29110. .SyncLoad(),
  29111. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~71_combout ),
  29112. .Cout(),
  29113. .Q());
  29114. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .coord_x = 17;
  29115. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .coord_y = 5;
  29116. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .coord_z = 11;
  29117. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .mask = 16'h3070;
  29118. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .modeMux = 1'b0;
  29119. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .FeedbackMux = 1'b0;
  29120. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .ShiftMux = 1'b0;
  29121. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .BypassEn = 1'b0;
  29122. defparam \macro_inst|apb_dac0_inst|sine_rom~71 .CarryEnb = 1'b1;
  29123. alta_slice \macro_inst|apb_dac0_inst|sine_rom~72 (
  29124. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29125. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29126. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  29127. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29128. .Cin(),
  29129. .Qin(),
  29130. .Clk(),
  29131. .AsyncReset(),
  29132. .SyncReset(),
  29133. .ShiftData(),
  29134. .SyncLoad(),
  29135. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~72_combout ),
  29136. .Cout(),
  29137. .Q());
  29138. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .coord_x = 17;
  29139. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .coord_y = 5;
  29140. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .coord_z = 1;
  29141. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .mask = 16'h1030;
  29142. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .modeMux = 1'b0;
  29143. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .FeedbackMux = 1'b0;
  29144. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .ShiftMux = 1'b0;
  29145. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .BypassEn = 1'b0;
  29146. defparam \macro_inst|apb_dac0_inst|sine_rom~72 .CarryEnb = 1'b1;
  29147. alta_slice \macro_inst|apb_dac0_inst|sine_rom~73 (
  29148. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  29149. .B(\macro_inst|apb_dac0_inst|sine_rom~71_combout ),
  29150. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29151. .D(\macro_inst|apb_dac0_inst|sine_rom~72_combout ),
  29152. .Cin(),
  29153. .Qin(),
  29154. .Clk(),
  29155. .AsyncReset(),
  29156. .SyncReset(),
  29157. .ShiftData(),
  29158. .SyncLoad(),
  29159. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~73_combout ),
  29160. .Cout(),
  29161. .Q());
  29162. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .coord_x = 17;
  29163. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .coord_y = 5;
  29164. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .coord_z = 14;
  29165. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .mask = 16'hD5DF;
  29166. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .modeMux = 1'b0;
  29167. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .FeedbackMux = 1'b0;
  29168. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .ShiftMux = 1'b0;
  29169. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .BypassEn = 1'b0;
  29170. defparam \macro_inst|apb_dac0_inst|sine_rom~73 .CarryEnb = 1'b1;
  29171. alta_slice \macro_inst|apb_dac0_inst|sine_rom~74 (
  29172. .A(\macro_inst|apb_dac0_inst|sine_rom~70_combout ),
  29173. .B(\macro_inst|apb_dac0_inst|phase_r [7]),
  29174. .C(\macro_inst|apb_dac0_inst|sine_rom~73_combout ),
  29175. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  29176. .Cin(),
  29177. .Qin(),
  29178. .Clk(),
  29179. .AsyncReset(),
  29180. .SyncReset(),
  29181. .ShiftData(),
  29182. .SyncLoad(),
  29183. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~74_combout ),
  29184. .Cout(),
  29185. .Q());
  29186. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .coord_x = 17;
  29187. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .coord_y = 5;
  29188. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .coord_z = 0;
  29189. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .mask = 16'hEE30;
  29190. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .modeMux = 1'b0;
  29191. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .FeedbackMux = 1'b0;
  29192. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .ShiftMux = 1'b0;
  29193. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .BypassEn = 1'b0;
  29194. defparam \macro_inst|apb_dac0_inst|sine_rom~74 .CarryEnb = 1'b1;
  29195. alta_slice \macro_inst|apb_dac0_inst|sine_rom~75 (
  29196. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29197. .B(\macro_inst|apb_dac0_inst|phase_r [6]),
  29198. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29199. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29200. .Cin(),
  29201. .Qin(),
  29202. .Clk(),
  29203. .AsyncReset(),
  29204. .SyncReset(),
  29205. .ShiftData(),
  29206. .SyncLoad(),
  29207. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~75_combout ),
  29208. .Cout(),
  29209. .Q());
  29210. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .coord_x = 10;
  29211. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .coord_y = 1;
  29212. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .coord_z = 14;
  29213. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .mask = 16'h9A38;
  29214. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .modeMux = 1'b0;
  29215. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .FeedbackMux = 1'b0;
  29216. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .ShiftMux = 1'b0;
  29217. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .BypassEn = 1'b0;
  29218. defparam \macro_inst|apb_dac0_inst|sine_rom~75 .CarryEnb = 1'b1;
  29219. alta_slice \macro_inst|apb_dac0_inst|sine_rom~76 (
  29220. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29221. .B(\macro_inst|apb_dac0_inst|phase_r [1]),
  29222. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29223. .D(\macro_inst|apb_dac0_inst|phase_r [6]),
  29224. .Cin(),
  29225. .Qin(),
  29226. .Clk(),
  29227. .AsyncReset(),
  29228. .SyncReset(),
  29229. .ShiftData(),
  29230. .SyncLoad(),
  29231. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~76_combout ),
  29232. .Cout(),
  29233. .Q());
  29234. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .coord_x = 10;
  29235. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .coord_y = 1;
  29236. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .coord_z = 9;
  29237. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .mask = 16'h0C0E;
  29238. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .modeMux = 1'b0;
  29239. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .FeedbackMux = 1'b0;
  29240. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .ShiftMux = 1'b0;
  29241. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .BypassEn = 1'b0;
  29242. defparam \macro_inst|apb_dac0_inst|sine_rom~76 .CarryEnb = 1'b1;
  29243. alta_slice \macro_inst|apb_dac0_inst|sine_rom~77 (
  29244. .A(\macro_inst|apb_dac0_inst|sine_rom~344_combout ),
  29245. .B(\macro_inst|apb_dac0_inst|sine_rom~66_combout ),
  29246. .C(\macro_inst|apb_dac0_inst|sine_rom~74_combout ),
  29247. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  29248. .Cin(),
  29249. .Qin(),
  29250. .Clk(),
  29251. .AsyncReset(),
  29252. .SyncReset(),
  29253. .ShiftData(),
  29254. .SyncLoad(),
  29255. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~77_combout ),
  29256. .Cout(),
  29257. .Q());
  29258. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .coord_x = 18;
  29259. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .coord_y = 2;
  29260. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .coord_z = 7;
  29261. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .mask = 16'hACF0;
  29262. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .modeMux = 1'b0;
  29263. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .FeedbackMux = 1'b0;
  29264. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .ShiftMux = 1'b0;
  29265. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .BypassEn = 1'b0;
  29266. defparam \macro_inst|apb_dac0_inst|sine_rom~77 .CarryEnb = 1'b1;
  29267. alta_slice \macro_inst|apb_dac0_inst|sine_rom~78 (
  29268. .A(\macro_inst|apb_dac0_inst|sine_rom~60_combout ),
  29269. .B(\macro_inst|apb_dac0_inst|sine_rom~77_combout ),
  29270. .C(\macro_inst|apb_dac0_inst|phase_r [8]),
  29271. .D(\macro_inst|apb_dac0_inst|phase_r [9]),
  29272. .Cin(),
  29273. .Qin(),
  29274. .Clk(),
  29275. .AsyncReset(),
  29276. .SyncReset(),
  29277. .ShiftData(),
  29278. .SyncLoad(),
  29279. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~78_combout ),
  29280. .Cout(),
  29281. .Q());
  29282. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .coord_x = 18;
  29283. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .coord_y = 2;
  29284. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .coord_z = 15;
  29285. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .mask = 16'hBAEA;
  29286. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .modeMux = 1'b0;
  29287. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .FeedbackMux = 1'b0;
  29288. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .ShiftMux = 1'b0;
  29289. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .BypassEn = 1'b0;
  29290. defparam \macro_inst|apb_dac0_inst|sine_rom~78 .CarryEnb = 1'b1;
  29291. alta_slice \macro_inst|apb_dac0_inst|sine_rom~79 (
  29292. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29293. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  29294. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29295. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29296. .Cin(),
  29297. .Qin(),
  29298. .Clk(),
  29299. .AsyncReset(),
  29300. .SyncReset(),
  29301. .ShiftData(),
  29302. .SyncLoad(),
  29303. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~79_combout ),
  29304. .Cout(),
  29305. .Q());
  29306. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .coord_x = 18;
  29307. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .coord_y = 3;
  29308. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .coord_z = 5;
  29309. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .mask = 16'hDE38;
  29310. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .modeMux = 1'b0;
  29311. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .FeedbackMux = 1'b0;
  29312. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .ShiftMux = 1'b0;
  29313. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .BypassEn = 1'b0;
  29314. defparam \macro_inst|apb_dac0_inst|sine_rom~79 .CarryEnb = 1'b1;
  29315. alta_slice \macro_inst|apb_dac0_inst|sine_rom~8 (
  29316. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29317. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29318. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29319. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29320. .Cin(),
  29321. .Qin(),
  29322. .Clk(),
  29323. .AsyncReset(),
  29324. .SyncReset(),
  29325. .ShiftData(),
  29326. .SyncLoad(),
  29327. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~8_combout ),
  29328. .Cout(),
  29329. .Q());
  29330. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .coord_x = 14;
  29331. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .coord_y = 5;
  29332. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .coord_z = 11;
  29333. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .mask = 16'hFEFC;
  29334. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .modeMux = 1'b0;
  29335. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .FeedbackMux = 1'b0;
  29336. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .ShiftMux = 1'b0;
  29337. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .BypassEn = 1'b0;
  29338. defparam \macro_inst|apb_dac0_inst|sine_rom~8 .CarryEnb = 1'b1;
  29339. alta_slice \macro_inst|apb_dac0_inst|sine_rom~80 (
  29340. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29341. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  29342. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29343. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29344. .Cin(),
  29345. .Qin(),
  29346. .Clk(),
  29347. .AsyncReset(),
  29348. .SyncReset(),
  29349. .ShiftData(),
  29350. .SyncLoad(),
  29351. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~80_combout ),
  29352. .Cout(),
  29353. .Q());
  29354. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .coord_x = 18;
  29355. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .coord_y = 3;
  29356. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .coord_z = 2;
  29357. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .mask = 16'hE0C0;
  29358. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .modeMux = 1'b0;
  29359. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .FeedbackMux = 1'b0;
  29360. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .ShiftMux = 1'b0;
  29361. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .BypassEn = 1'b0;
  29362. defparam \macro_inst|apb_dac0_inst|sine_rom~80 .CarryEnb = 1'b1;
  29363. alta_slice \macro_inst|apb_dac0_inst|sine_rom~81 (
  29364. .A(\macro_inst|apb_dac0_inst|sine_rom~80_combout ),
  29365. .B(\macro_inst|apb_dac0_inst|sine_rom~79_combout ),
  29366. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29367. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  29368. .Cin(),
  29369. .Qin(),
  29370. .Clk(),
  29371. .AsyncReset(),
  29372. .SyncReset(),
  29373. .ShiftData(),
  29374. .SyncLoad(),
  29375. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~81_combout ),
  29376. .Cout(),
  29377. .Q());
  29378. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .coord_x = 18;
  29379. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .coord_y = 3;
  29380. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .coord_z = 14;
  29381. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .mask = 16'hE564;
  29382. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .modeMux = 1'b0;
  29383. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .FeedbackMux = 1'b0;
  29384. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .ShiftMux = 1'b0;
  29385. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .BypassEn = 1'b0;
  29386. defparam \macro_inst|apb_dac0_inst|sine_rom~81 .CarryEnb = 1'b1;
  29387. alta_slice \macro_inst|apb_dac0_inst|sine_rom~82 (
  29388. .A(\macro_inst|apb_dac0_inst|sine_rom~80_combout ),
  29389. .B(\macro_inst|apb_dac0_inst|sine_rom~79_combout ),
  29390. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29391. .D(\macro_inst|apb_dac0_inst|phase_r [5]),
  29392. .Cin(),
  29393. .Qin(),
  29394. .Clk(),
  29395. .AsyncReset(),
  29396. .SyncReset(),
  29397. .ShiftData(),
  29398. .SyncLoad(),
  29399. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~82_combout ),
  29400. .Cout(),
  29401. .Q());
  29402. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .coord_x = 18;
  29403. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .coord_y = 3;
  29404. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .coord_z = 7;
  29405. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .mask = 16'h9A44;
  29406. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .modeMux = 1'b0;
  29407. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .FeedbackMux = 1'b0;
  29408. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .ShiftMux = 1'b0;
  29409. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .BypassEn = 1'b0;
  29410. defparam \macro_inst|apb_dac0_inst|sine_rom~82 .CarryEnb = 1'b1;
  29411. alta_slice \macro_inst|apb_dac0_inst|sine_rom~83 (
  29412. .A(vcc),
  29413. .B(\macro_inst|apb_dac0_inst|sine_rom~82_combout ),
  29414. .C(\macro_inst|apb_dac0_inst|sine_rom~81_combout ),
  29415. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  29416. .Cin(),
  29417. .Qin(),
  29418. .Clk(),
  29419. .AsyncReset(),
  29420. .SyncReset(),
  29421. .ShiftData(),
  29422. .SyncLoad(),
  29423. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~83_combout ),
  29424. .Cout(),
  29425. .Q());
  29426. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .coord_x = 18;
  29427. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .coord_y = 3;
  29428. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .coord_z = 3;
  29429. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .mask = 16'h0F33;
  29430. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .modeMux = 1'b0;
  29431. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .FeedbackMux = 1'b0;
  29432. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .ShiftMux = 1'b0;
  29433. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .BypassEn = 1'b0;
  29434. defparam \macro_inst|apb_dac0_inst|sine_rom~83 .CarryEnb = 1'b1;
  29435. alta_slice \macro_inst|apb_dac0_inst|sine_rom~84 (
  29436. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29437. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29438. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29439. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29440. .Cin(),
  29441. .Qin(),
  29442. .Clk(),
  29443. .AsyncReset(),
  29444. .SyncReset(),
  29445. .ShiftData(),
  29446. .SyncLoad(),
  29447. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~84_combout ),
  29448. .Cout(),
  29449. .Q());
  29450. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .coord_x = 19;
  29451. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .coord_y = 2;
  29452. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .coord_z = 7;
  29453. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .mask = 16'h6DDA;
  29454. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .modeMux = 1'b0;
  29455. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .FeedbackMux = 1'b0;
  29456. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .ShiftMux = 1'b0;
  29457. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .BypassEn = 1'b0;
  29458. defparam \macro_inst|apb_dac0_inst|sine_rom~84 .CarryEnb = 1'b1;
  29459. alta_slice \macro_inst|apb_dac0_inst|sine_rom~85 (
  29460. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29461. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29462. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29463. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29464. .Cin(),
  29465. .Qin(),
  29466. .Clk(),
  29467. .AsyncReset(),
  29468. .SyncReset(),
  29469. .ShiftData(),
  29470. .SyncLoad(),
  29471. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~85_combout ),
  29472. .Cout(),
  29473. .Q());
  29474. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .coord_x = 19;
  29475. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .coord_y = 2;
  29476. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .coord_z = 11;
  29477. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .mask = 16'h320C;
  29478. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .modeMux = 1'b0;
  29479. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .FeedbackMux = 1'b0;
  29480. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .ShiftMux = 1'b0;
  29481. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .BypassEn = 1'b0;
  29482. defparam \macro_inst|apb_dac0_inst|sine_rom~85 .CarryEnb = 1'b1;
  29483. alta_slice \macro_inst|apb_dac0_inst|sine_rom~86 (
  29484. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29485. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29486. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29487. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29488. .Cin(),
  29489. .Qin(),
  29490. .Clk(),
  29491. .AsyncReset(),
  29492. .SyncReset(),
  29493. .ShiftData(),
  29494. .SyncLoad(),
  29495. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~86_combout ),
  29496. .Cout(),
  29497. .Q());
  29498. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .coord_x = 19;
  29499. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .coord_y = 2;
  29500. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .coord_z = 13;
  29501. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .mask = 16'hC996;
  29502. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .modeMux = 1'b0;
  29503. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .FeedbackMux = 1'b0;
  29504. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .ShiftMux = 1'b0;
  29505. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .BypassEn = 1'b0;
  29506. defparam \macro_inst|apb_dac0_inst|sine_rom~86 .CarryEnb = 1'b1;
  29507. alta_slice \macro_inst|apb_dac0_inst|sine_rom~87 (
  29508. .A(\macro_inst|apb_dac0_inst|sine_rom~85_combout ),
  29509. .B(\macro_inst|apb_dac0_inst|sine_rom~86_combout ),
  29510. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  29511. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  29512. .Cin(),
  29513. .Qin(),
  29514. .Clk(),
  29515. .AsyncReset(),
  29516. .SyncReset(),
  29517. .ShiftData(),
  29518. .SyncLoad(),
  29519. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~87_combout ),
  29520. .Cout(),
  29521. .Q());
  29522. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .coord_x = 19;
  29523. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .coord_y = 2;
  29524. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .coord_z = 10;
  29525. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .mask = 16'hFA0C;
  29526. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .modeMux = 1'b0;
  29527. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .FeedbackMux = 1'b0;
  29528. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .ShiftMux = 1'b0;
  29529. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .BypassEn = 1'b0;
  29530. defparam \macro_inst|apb_dac0_inst|sine_rom~87 .CarryEnb = 1'b1;
  29531. alta_slice \macro_inst|apb_dac0_inst|sine_rom~88 (
  29532. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29533. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29534. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29535. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29536. .Cin(),
  29537. .Qin(),
  29538. .Clk(),
  29539. .AsyncReset(),
  29540. .SyncReset(),
  29541. .ShiftData(),
  29542. .SyncLoad(),
  29543. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~88_combout ),
  29544. .Cout(),
  29545. .Q());
  29546. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .coord_x = 19;
  29547. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .coord_y = 2;
  29548. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .coord_z = 15;
  29549. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .mask = 16'h7334;
  29550. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .modeMux = 1'b0;
  29551. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .FeedbackMux = 1'b0;
  29552. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .ShiftMux = 1'b0;
  29553. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .BypassEn = 1'b0;
  29554. defparam \macro_inst|apb_dac0_inst|sine_rom~88 .CarryEnb = 1'b1;
  29555. alta_slice \macro_inst|apb_dac0_inst|sine_rom~89 (
  29556. .A(\macro_inst|apb_dac0_inst|sine_rom~87_combout ),
  29557. .B(\macro_inst|apb_dac0_inst|sine_rom~84_combout ),
  29558. .C(\macro_inst|apb_dac0_inst|phase_r [0]),
  29559. .D(\macro_inst|apb_dac0_inst|sine_rom~88_combout ),
  29560. .Cin(),
  29561. .Qin(),
  29562. .Clk(),
  29563. .AsyncReset(),
  29564. .SyncReset(),
  29565. .ShiftData(),
  29566. .SyncLoad(),
  29567. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~89_combout ),
  29568. .Cout(),
  29569. .Q());
  29570. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .coord_x = 19;
  29571. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .coord_y = 2;
  29572. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .coord_z = 0;
  29573. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .mask = 16'hEA4A;
  29574. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .modeMux = 1'b0;
  29575. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .FeedbackMux = 1'b0;
  29576. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .ShiftMux = 1'b0;
  29577. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .BypassEn = 1'b0;
  29578. defparam \macro_inst|apb_dac0_inst|sine_rom~89 .CarryEnb = 1'b1;
  29579. alta_slice \macro_inst|apb_dac0_inst|sine_rom~9 (
  29580. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29581. .B(\macro_inst|apb_dac0_inst|sine_rom~8_combout ),
  29582. .C(\macro_inst|apb_dac0_inst|phase_r [4]),
  29583. .D(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|cs2a[1]~0_combout ),
  29584. .Cin(),
  29585. .Qin(),
  29586. .Clk(),
  29587. .AsyncReset(),
  29588. .SyncReset(),
  29589. .ShiftData(),
  29590. .SyncLoad(),
  29591. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~9_combout ),
  29592. .Cout(),
  29593. .Q());
  29594. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .coord_x = 14;
  29595. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .coord_y = 5;
  29596. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .coord_z = 15;
  29597. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .mask = 16'hE04A;
  29598. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .modeMux = 1'b0;
  29599. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .FeedbackMux = 1'b0;
  29600. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .ShiftMux = 1'b0;
  29601. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .BypassEn = 1'b0;
  29602. defparam \macro_inst|apb_dac0_inst|sine_rom~9 .CarryEnb = 1'b1;
  29603. alta_slice \macro_inst|apb_dac0_inst|sine_rom~90 (
  29604. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29605. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  29606. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29607. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  29608. .Cin(),
  29609. .Qin(),
  29610. .Clk(),
  29611. .AsyncReset(),
  29612. .SyncReset(),
  29613. .ShiftData(),
  29614. .SyncLoad(),
  29615. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~90_combout ),
  29616. .Cout(),
  29617. .Q());
  29618. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .coord_x = 18;
  29619. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .coord_y = 3;
  29620. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .coord_z = 0;
  29621. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .mask = 16'hEFCE;
  29622. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .modeMux = 1'b0;
  29623. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .FeedbackMux = 1'b0;
  29624. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .ShiftMux = 1'b0;
  29625. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .BypassEn = 1'b0;
  29626. defparam \macro_inst|apb_dac0_inst|sine_rom~90 .CarryEnb = 1'b1;
  29627. alta_slice \macro_inst|apb_dac0_inst|sine_rom~91 (
  29628. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29629. .B(vcc),
  29630. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29631. .D(vcc),
  29632. .Cin(),
  29633. .Qin(),
  29634. .Clk(),
  29635. .AsyncReset(),
  29636. .SyncReset(),
  29637. .ShiftData(),
  29638. .SyncLoad(),
  29639. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~91_combout ),
  29640. .Cout(),
  29641. .Q());
  29642. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .coord_x = 18;
  29643. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .coord_y = 3;
  29644. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .coord_z = 1;
  29645. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .mask = 16'h5050;
  29646. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .modeMux = 1'b0;
  29647. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .FeedbackMux = 1'b0;
  29648. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .ShiftMux = 1'b0;
  29649. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .BypassEn = 1'b0;
  29650. defparam \macro_inst|apb_dac0_inst|sine_rom~91 .CarryEnb = 1'b1;
  29651. alta_slice \macro_inst|apb_dac0_inst|sine_rom~92 (
  29652. .A(\macro_inst|apb_dac0_inst|sine_rom~90_combout ),
  29653. .B(\macro_inst|apb_dac0_inst|sine_rom~91_combout ),
  29654. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29655. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29656. .Cin(),
  29657. .Qin(),
  29658. .Clk(),
  29659. .AsyncReset(),
  29660. .SyncReset(),
  29661. .ShiftData(),
  29662. .SyncLoad(),
  29663. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~92_combout ),
  29664. .Cout(),
  29665. .Q());
  29666. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .coord_x = 18;
  29667. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .coord_y = 3;
  29668. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .coord_z = 15;
  29669. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .mask = 16'h2D4A;
  29670. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .modeMux = 1'b0;
  29671. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .FeedbackMux = 1'b0;
  29672. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .ShiftMux = 1'b0;
  29673. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .BypassEn = 1'b0;
  29674. defparam \macro_inst|apb_dac0_inst|sine_rom~92 .CarryEnb = 1'b1;
  29675. alta_slice \macro_inst|apb_dac0_inst|sine_rom~93 (
  29676. .A(\macro_inst|apb_dac0_inst|phase_r [6]),
  29677. .B(\macro_inst|apb_dac0_inst|sine_rom~92_combout ),
  29678. .C(\macro_inst|apb_dac0_inst|sine_rom~89_combout ),
  29679. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  29680. .Cin(),
  29681. .Qin(),
  29682. .Clk(),
  29683. .AsyncReset(),
  29684. .SyncReset(),
  29685. .ShiftData(),
  29686. .SyncLoad(),
  29687. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~93_combout ),
  29688. .Cout(),
  29689. .Q());
  29690. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .coord_x = 18;
  29691. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .coord_y = 3;
  29692. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .coord_z = 8;
  29693. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .mask = 16'hAA4E;
  29694. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .modeMux = 1'b0;
  29695. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .FeedbackMux = 1'b0;
  29696. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .ShiftMux = 1'b0;
  29697. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .BypassEn = 1'b0;
  29698. defparam \macro_inst|apb_dac0_inst|sine_rom~93 .CarryEnb = 1'b1;
  29699. alta_slice \macro_inst|apb_dac0_inst|sine_rom~94 (
  29700. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29701. .B(\macro_inst|apb_dac0_inst|phase_r [2]),
  29702. .C(\macro_inst|apb_dac0_inst|phase_r [5]),
  29703. .D(\macro_inst|apb_dac0_inst|phase_r [1]),
  29704. .Cin(),
  29705. .Qin(),
  29706. .Clk(),
  29707. .AsyncReset(),
  29708. .SyncReset(),
  29709. .ShiftData(),
  29710. .SyncLoad(),
  29711. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~94_combout ),
  29712. .Cout(),
  29713. .Q());
  29714. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .coord_x = 19;
  29715. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .coord_y = 2;
  29716. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .coord_z = 1;
  29717. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .mask = 16'h47CF;
  29718. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .modeMux = 1'b0;
  29719. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .FeedbackMux = 1'b0;
  29720. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .ShiftMux = 1'b0;
  29721. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .BypassEn = 1'b0;
  29722. defparam \macro_inst|apb_dac0_inst|sine_rom~94 .CarryEnb = 1'b1;
  29723. alta_slice \macro_inst|apb_dac0_inst|sine_rom~95 (
  29724. .A(\macro_inst|apb_dac0_inst|phase_r [4]),
  29725. .B(\macro_inst|apb_dac0_inst|sine_rom~19_combout ),
  29726. .C(\macro_inst|apb_dac0_inst|phase_r [3]),
  29727. .D(\macro_inst|apb_dac0_inst|sine_rom~94_combout ),
  29728. .Cin(),
  29729. .Qin(),
  29730. .Clk(),
  29731. .AsyncReset(),
  29732. .SyncReset(),
  29733. .ShiftData(),
  29734. .SyncLoad(),
  29735. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~95_combout ),
  29736. .Cout(),
  29737. .Q());
  29738. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .coord_x = 19;
  29739. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .coord_y = 2;
  29740. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .coord_z = 12;
  29741. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .mask = 16'h4F4E;
  29742. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .modeMux = 1'b0;
  29743. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .FeedbackMux = 1'b0;
  29744. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .ShiftMux = 1'b0;
  29745. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .BypassEn = 1'b0;
  29746. defparam \macro_inst|apb_dac0_inst|sine_rom~95 .CarryEnb = 1'b1;
  29747. alta_slice \macro_inst|apb_dac0_inst|sine_rom~96 (
  29748. .A(\macro_inst|apb_dac0_inst|phase_r [5]),
  29749. .B(\macro_inst|apb_dac0_inst|phase_r [3]),
  29750. .C(\macro_inst|apb_dac0_inst|sine_rom~95_combout ),
  29751. .D(\macro_inst|apb_dac0_inst|phase_r [2]),
  29752. .Cin(),
  29753. .Qin(),
  29754. .Clk(),
  29755. .AsyncReset(),
  29756. .SyncReset(),
  29757. .ShiftData(),
  29758. .SyncLoad(),
  29759. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~96_combout ),
  29760. .Cout(),
  29761. .Q());
  29762. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .coord_x = 19;
  29763. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .coord_y = 2;
  29764. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .coord_z = 3;
  29765. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .mask = 16'hFAF8;
  29766. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .modeMux = 1'b0;
  29767. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .FeedbackMux = 1'b0;
  29768. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .ShiftMux = 1'b0;
  29769. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .BypassEn = 1'b0;
  29770. defparam \macro_inst|apb_dac0_inst|sine_rom~96 .CarryEnb = 1'b1;
  29771. alta_slice \macro_inst|apb_dac0_inst|sine_rom~97 (
  29772. .A(\macro_inst|apb_dac0_inst|sine_rom~96_combout ),
  29773. .B(\macro_inst|apb_dac0_inst|sine_rom~83_combout ),
  29774. .C(\macro_inst|apb_dac0_inst|sine_rom~93_combout ),
  29775. .D(\macro_inst|apb_dac0_inst|phase_r [7]),
  29776. .Cin(),
  29777. .Qin(),
  29778. .Clk(),
  29779. .AsyncReset(),
  29780. .SyncReset(),
  29781. .ShiftData(),
  29782. .SyncLoad(),
  29783. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~97_combout ),
  29784. .Cout(),
  29785. .Q());
  29786. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .coord_x = 18;
  29787. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .coord_y = 3;
  29788. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .coord_z = 9;
  29789. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .mask = 16'h53F0;
  29790. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .modeMux = 1'b0;
  29791. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .FeedbackMux = 1'b0;
  29792. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .ShiftMux = 1'b0;
  29793. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .BypassEn = 1'b0;
  29794. defparam \macro_inst|apb_dac0_inst|sine_rom~97 .CarryEnb = 1'b1;
  29795. alta_slice \macro_inst|apb_dac0_inst|sine_rom~98 (
  29796. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29797. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  29798. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29799. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  29800. .Cin(),
  29801. .Qin(),
  29802. .Clk(),
  29803. .AsyncReset(),
  29804. .SyncReset(),
  29805. .ShiftData(),
  29806. .SyncLoad(),
  29807. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~98_combout ),
  29808. .Cout(),
  29809. .Q());
  29810. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .coord_x = 18;
  29811. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .coord_y = 3;
  29812. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .coord_z = 13;
  29813. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .mask = 16'hAFAE;
  29814. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .modeMux = 1'b0;
  29815. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .FeedbackMux = 1'b0;
  29816. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .ShiftMux = 1'b0;
  29817. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .BypassEn = 1'b0;
  29818. defparam \macro_inst|apb_dac0_inst|sine_rom~98 .CarryEnb = 1'b1;
  29819. alta_slice \macro_inst|apb_dac0_inst|sine_rom~99 (
  29820. .A(\macro_inst|apb_dac0_inst|phase_r [0]),
  29821. .B(\macro_inst|apb_dac0_inst|phase_r [5]),
  29822. .C(\macro_inst|apb_dac0_inst|phase_r [2]),
  29823. .D(\macro_inst|apb_dac0_inst|phase_r [4]),
  29824. .Cin(),
  29825. .Qin(),
  29826. .Clk(),
  29827. .AsyncReset(),
  29828. .SyncReset(),
  29829. .ShiftData(),
  29830. .SyncLoad(),
  29831. .LutOut(\macro_inst|apb_dac0_inst|sine_rom~99_combout ),
  29832. .Cout(),
  29833. .Q());
  29834. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .coord_x = 18;
  29835. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .coord_y = 3;
  29836. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .coord_z = 10;
  29837. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .mask = 16'h1030;
  29838. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .modeMux = 1'b0;
  29839. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .FeedbackMux = 1'b0;
  29840. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .ShiftMux = 1'b0;
  29841. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .BypassEn = 1'b0;
  29842. defparam \macro_inst|apb_dac0_inst|sine_rom~99 .CarryEnb = 1'b1;
  29843. alta_slice \macro_inst|apb_prdata[10]~0 (
  29844. .A(\macro_inst|ahb2apb_inst|prdata[14]~12_combout ),
  29845. .B(\macro_inst|ahb2apb_inst|paddr [14]),
  29846. .C(\macro_inst|ahb2apb_inst|paddr [1]),
  29847. .D(\macro_inst|mem_apb_psel~0_combout ),
  29848. .Cin(),
  29849. .Qin(),
  29850. .Clk(),
  29851. .AsyncReset(),
  29852. .SyncReset(),
  29853. .ShiftData(),
  29854. .SyncLoad(),
  29855. .LutOut(\macro_inst|apb_prdata[10]~0_combout ),
  29856. .Cout(),
  29857. .Q());
  29858. defparam \macro_inst|apb_prdata[10]~0 .coord_x = 16;
  29859. defparam \macro_inst|apb_prdata[10]~0 .coord_y = 9;
  29860. defparam \macro_inst|apb_prdata[10]~0 .coord_z = 4;
  29861. defparam \macro_inst|apb_prdata[10]~0 .mask = 16'h1D55;
  29862. defparam \macro_inst|apb_prdata[10]~0 .modeMux = 1'b0;
  29863. defparam \macro_inst|apb_prdata[10]~0 .FeedbackMux = 1'b0;
  29864. defparam \macro_inst|apb_prdata[10]~0 .ShiftMux = 1'b0;
  29865. defparam \macro_inst|apb_prdata[10]~0 .BypassEn = 1'b0;
  29866. defparam \macro_inst|apb_prdata[10]~0 .CarryEnb = 1'b1;
  29867. alta_slice \macro_inst|cfg_reg_inst|Equal10~0 (
  29868. .A(\macro_inst|ahb2apb_inst|paddr [5]),
  29869. .B(\macro_inst|ahb2apb_inst|paddr [4]),
  29870. .C(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  29871. .D(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  29872. .Cin(),
  29873. .Qin(),
  29874. .Clk(),
  29875. .AsyncReset(),
  29876. .SyncReset(),
  29877. .ShiftData(),
  29878. .SyncLoad(),
  29879. .LutOut(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  29880. .Cout(),
  29881. .Q());
  29882. defparam \macro_inst|cfg_reg_inst|Equal10~0 .coord_x = 17;
  29883. defparam \macro_inst|cfg_reg_inst|Equal10~0 .coord_y = 12;
  29884. defparam \macro_inst|cfg_reg_inst|Equal10~0 .coord_z = 10;
  29885. defparam \macro_inst|cfg_reg_inst|Equal10~0 .mask = 16'h2000;
  29886. defparam \macro_inst|cfg_reg_inst|Equal10~0 .modeMux = 1'b0;
  29887. defparam \macro_inst|cfg_reg_inst|Equal10~0 .FeedbackMux = 1'b0;
  29888. defparam \macro_inst|cfg_reg_inst|Equal10~0 .ShiftMux = 1'b0;
  29889. defparam \macro_inst|cfg_reg_inst|Equal10~0 .BypassEn = 1'b0;
  29890. defparam \macro_inst|cfg_reg_inst|Equal10~0 .CarryEnb = 1'b1;
  29891. alta_slice \macro_inst|cfg_reg_inst|Equal10~2 (
  29892. .A(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  29893. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  29894. .C(\macro_inst|cfg_reg_inst|Equal10~1_combout ),
  29895. .D(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  29896. .Cin(),
  29897. .Qin(),
  29898. .Clk(),
  29899. .AsyncReset(),
  29900. .SyncReset(),
  29901. .ShiftData(),
  29902. .SyncLoad(),
  29903. .LutOut(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  29904. .Cout(),
  29905. .Q());
  29906. defparam \macro_inst|cfg_reg_inst|Equal10~2 .coord_x = 17;
  29907. defparam \macro_inst|cfg_reg_inst|Equal10~2 .coord_y = 12;
  29908. defparam \macro_inst|cfg_reg_inst|Equal10~2 .coord_z = 7;
  29909. defparam \macro_inst|cfg_reg_inst|Equal10~2 .mask = 16'h2000;
  29910. defparam \macro_inst|cfg_reg_inst|Equal10~2 .modeMux = 1'b0;
  29911. defparam \macro_inst|cfg_reg_inst|Equal10~2 .FeedbackMux = 1'b0;
  29912. defparam \macro_inst|cfg_reg_inst|Equal10~2 .ShiftMux = 1'b0;
  29913. defparam \macro_inst|cfg_reg_inst|Equal10~2 .BypassEn = 1'b0;
  29914. defparam \macro_inst|cfg_reg_inst|Equal10~2 .CarryEnb = 1'b1;
  29915. alta_slice \macro_inst|cfg_reg_inst|Equal11~0 (
  29916. .A(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  29917. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  29918. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  29919. .D(vcc),
  29920. .Cin(),
  29921. .Qin(),
  29922. .Clk(),
  29923. .AsyncReset(),
  29924. .SyncReset(),
  29925. .ShiftData(),
  29926. .SyncLoad(),
  29927. .LutOut(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  29928. .Cout(),
  29929. .Q());
  29930. defparam \macro_inst|cfg_reg_inst|Equal11~0 .coord_x = 18;
  29931. defparam \macro_inst|cfg_reg_inst|Equal11~0 .coord_y = 10;
  29932. defparam \macro_inst|cfg_reg_inst|Equal11~0 .coord_z = 9;
  29933. defparam \macro_inst|cfg_reg_inst|Equal11~0 .mask = 16'h8080;
  29934. defparam \macro_inst|cfg_reg_inst|Equal11~0 .modeMux = 1'b0;
  29935. defparam \macro_inst|cfg_reg_inst|Equal11~0 .FeedbackMux = 1'b0;
  29936. defparam \macro_inst|cfg_reg_inst|Equal11~0 .ShiftMux = 1'b0;
  29937. defparam \macro_inst|cfg_reg_inst|Equal11~0 .BypassEn = 1'b0;
  29938. defparam \macro_inst|cfg_reg_inst|Equal11~0 .CarryEnb = 1'b1;
  29939. alta_slice \macro_inst|cfg_reg_inst|Equal1~1 (
  29940. .A(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  29941. .B(\macro_inst|cfg_reg_inst|Equal1~0_combout ),
  29942. .C(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  29943. .D(\macro_inst|ahb2apb_inst|paddr [4]),
  29944. .Cin(),
  29945. .Qin(),
  29946. .Clk(),
  29947. .AsyncReset(),
  29948. .SyncReset(),
  29949. .ShiftData(),
  29950. .SyncLoad(),
  29951. .LutOut(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  29952. .Cout(),
  29953. .Q());
  29954. defparam \macro_inst|cfg_reg_inst|Equal1~1 .coord_x = 17;
  29955. defparam \macro_inst|cfg_reg_inst|Equal1~1 .coord_y = 12;
  29956. defparam \macro_inst|cfg_reg_inst|Equal1~1 .coord_z = 2;
  29957. defparam \macro_inst|cfg_reg_inst|Equal1~1 .mask = 16'h0080;
  29958. defparam \macro_inst|cfg_reg_inst|Equal1~1 .modeMux = 1'b0;
  29959. defparam \macro_inst|cfg_reg_inst|Equal1~1 .FeedbackMux = 1'b0;
  29960. defparam \macro_inst|cfg_reg_inst|Equal1~1 .ShiftMux = 1'b0;
  29961. defparam \macro_inst|cfg_reg_inst|Equal1~1 .BypassEn = 1'b0;
  29962. defparam \macro_inst|cfg_reg_inst|Equal1~1 .CarryEnb = 1'b1;
  29963. alta_slice \macro_inst|cfg_reg_inst|Equal2~1 (
  29964. .A(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  29965. .B(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  29966. .C(\macro_inst|cfg_reg_inst|Equal2~0_combout ),
  29967. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  29968. .Cin(),
  29969. .Qin(),
  29970. .Clk(),
  29971. .AsyncReset(),
  29972. .SyncReset(),
  29973. .ShiftData(),
  29974. .SyncLoad(),
  29975. .LutOut(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  29976. .Cout(),
  29977. .Q());
  29978. defparam \macro_inst|cfg_reg_inst|Equal2~1 .coord_x = 17;
  29979. defparam \macro_inst|cfg_reg_inst|Equal2~1 .coord_y = 12;
  29980. defparam \macro_inst|cfg_reg_inst|Equal2~1 .coord_z = 3;
  29981. defparam \macro_inst|cfg_reg_inst|Equal2~1 .mask = 16'h0080;
  29982. defparam \macro_inst|cfg_reg_inst|Equal2~1 .modeMux = 1'b0;
  29983. defparam \macro_inst|cfg_reg_inst|Equal2~1 .FeedbackMux = 1'b0;
  29984. defparam \macro_inst|cfg_reg_inst|Equal2~1 .ShiftMux = 1'b0;
  29985. defparam \macro_inst|cfg_reg_inst|Equal2~1 .BypassEn = 1'b0;
  29986. defparam \macro_inst|cfg_reg_inst|Equal2~1 .CarryEnb = 1'b1;
  29987. alta_slice \macro_inst|cfg_reg_inst|Equal3~0 (
  29988. .A(vcc),
  29989. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  29990. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  29991. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  29992. .Cin(),
  29993. .Qin(),
  29994. .Clk(),
  29995. .AsyncReset(),
  29996. .SyncReset(),
  29997. .ShiftData(),
  29998. .SyncLoad(),
  29999. .LutOut(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  30000. .Cout(),
  30001. .Q());
  30002. defparam \macro_inst|cfg_reg_inst|Equal3~0 .coord_x = 18;
  30003. defparam \macro_inst|cfg_reg_inst|Equal3~0 .coord_y = 9;
  30004. defparam \macro_inst|cfg_reg_inst|Equal3~0 .coord_z = 5;
  30005. defparam \macro_inst|cfg_reg_inst|Equal3~0 .mask = 16'hC000;
  30006. defparam \macro_inst|cfg_reg_inst|Equal3~0 .modeMux = 1'b0;
  30007. defparam \macro_inst|cfg_reg_inst|Equal3~0 .FeedbackMux = 1'b0;
  30008. defparam \macro_inst|cfg_reg_inst|Equal3~0 .ShiftMux = 1'b0;
  30009. defparam \macro_inst|cfg_reg_inst|Equal3~0 .BypassEn = 1'b0;
  30010. defparam \macro_inst|cfg_reg_inst|Equal3~0 .CarryEnb = 1'b1;
  30011. alta_slice \macro_inst|cfg_reg_inst|Equal4~0 (
  30012. .A(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  30013. .B(\macro_inst|ahb2apb_inst|paddr [5]),
  30014. .C(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  30015. .D(\macro_inst|ahb2apb_inst|paddr [4]),
  30016. .Cin(),
  30017. .Qin(),
  30018. .Clk(),
  30019. .AsyncReset(),
  30020. .SyncReset(),
  30021. .ShiftData(),
  30022. .SyncLoad(),
  30023. .LutOut(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  30024. .Cout(),
  30025. .Q());
  30026. defparam \macro_inst|cfg_reg_inst|Equal4~0 .coord_x = 17;
  30027. defparam \macro_inst|cfg_reg_inst|Equal4~0 .coord_y = 12;
  30028. defparam \macro_inst|cfg_reg_inst|Equal4~0 .coord_z = 13;
  30029. defparam \macro_inst|cfg_reg_inst|Equal4~0 .mask = 16'h2000;
  30030. defparam \macro_inst|cfg_reg_inst|Equal4~0 .modeMux = 1'b0;
  30031. defparam \macro_inst|cfg_reg_inst|Equal4~0 .FeedbackMux = 1'b0;
  30032. defparam \macro_inst|cfg_reg_inst|Equal4~0 .ShiftMux = 1'b0;
  30033. defparam \macro_inst|cfg_reg_inst|Equal4~0 .BypassEn = 1'b0;
  30034. defparam \macro_inst|cfg_reg_inst|Equal4~0 .CarryEnb = 1'b1;
  30035. alta_slice \macro_inst|cfg_reg_inst|Equal4~2 (
  30036. .A(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  30037. .B(\macro_inst|ahb2apb_inst|paddr [5]),
  30038. .C(\macro_inst|cfg_reg_inst|Equal4~1_combout ),
  30039. .D(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  30040. .Cin(),
  30041. .Qin(),
  30042. .Clk(),
  30043. .AsyncReset(),
  30044. .SyncReset(),
  30045. .ShiftData(),
  30046. .SyncLoad(),
  30047. .LutOut(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  30048. .Cout(),
  30049. .Q());
  30050. defparam \macro_inst|cfg_reg_inst|Equal4~2 .coord_x = 17;
  30051. defparam \macro_inst|cfg_reg_inst|Equal4~2 .coord_y = 12;
  30052. defparam \macro_inst|cfg_reg_inst|Equal4~2 .coord_z = 11;
  30053. defparam \macro_inst|cfg_reg_inst|Equal4~2 .mask = 16'h2000;
  30054. defparam \macro_inst|cfg_reg_inst|Equal4~2 .modeMux = 1'b0;
  30055. defparam \macro_inst|cfg_reg_inst|Equal4~2 .FeedbackMux = 1'b0;
  30056. defparam \macro_inst|cfg_reg_inst|Equal4~2 .ShiftMux = 1'b0;
  30057. defparam \macro_inst|cfg_reg_inst|Equal4~2 .BypassEn = 1'b0;
  30058. defparam \macro_inst|cfg_reg_inst|Equal4~2 .CarryEnb = 1'b1;
  30059. alta_slice \macro_inst|cfg_reg_inst|Equal5~0 (
  30060. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  30061. .B(vcc),
  30062. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  30063. .D(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  30064. .Cin(),
  30065. .Qin(),
  30066. .Clk(),
  30067. .AsyncReset(),
  30068. .SyncReset(),
  30069. .ShiftData(),
  30070. .SyncLoad(),
  30071. .LutOut(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  30072. .Cout(),
  30073. .Q());
  30074. defparam \macro_inst|cfg_reg_inst|Equal5~0 .coord_x = 17;
  30075. defparam \macro_inst|cfg_reg_inst|Equal5~0 .coord_y = 11;
  30076. defparam \macro_inst|cfg_reg_inst|Equal5~0 .coord_z = 5;
  30077. defparam \macro_inst|cfg_reg_inst|Equal5~0 .mask = 16'h0A00;
  30078. defparam \macro_inst|cfg_reg_inst|Equal5~0 .modeMux = 1'b0;
  30079. defparam \macro_inst|cfg_reg_inst|Equal5~0 .FeedbackMux = 1'b0;
  30080. defparam \macro_inst|cfg_reg_inst|Equal5~0 .ShiftMux = 1'b0;
  30081. defparam \macro_inst|cfg_reg_inst|Equal5~0 .BypassEn = 1'b0;
  30082. defparam \macro_inst|cfg_reg_inst|Equal5~0 .CarryEnb = 1'b1;
  30083. alta_slice \macro_inst|cfg_reg_inst|Equal8~0 (
  30084. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  30085. .B(vcc),
  30086. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  30087. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  30088. .Cin(),
  30089. .Qin(),
  30090. .Clk(),
  30091. .AsyncReset(),
  30092. .SyncReset(),
  30093. .ShiftData(),
  30094. .SyncLoad(),
  30095. .LutOut(\macro_inst|cfg_reg_inst|Equal8~0_combout ),
  30096. .Cout(),
  30097. .Q());
  30098. defparam \macro_inst|cfg_reg_inst|Equal8~0 .coord_x = 17;
  30099. defparam \macro_inst|cfg_reg_inst|Equal8~0 .coord_y = 10;
  30100. defparam \macro_inst|cfg_reg_inst|Equal8~0 .coord_z = 13;
  30101. defparam \macro_inst|cfg_reg_inst|Equal8~0 .mask = 16'h0500;
  30102. defparam \macro_inst|cfg_reg_inst|Equal8~0 .modeMux = 1'b0;
  30103. defparam \macro_inst|cfg_reg_inst|Equal8~0 .FeedbackMux = 1'b0;
  30104. defparam \macro_inst|cfg_reg_inst|Equal8~0 .ShiftMux = 1'b0;
  30105. defparam \macro_inst|cfg_reg_inst|Equal8~0 .BypassEn = 1'b0;
  30106. defparam \macro_inst|cfg_reg_inst|Equal8~0 .CarryEnb = 1'b1;
  30107. alta_slice \macro_inst|cfg_reg_inst|Selector15~0 (
  30108. .A(\macro_inst|cfg_reg_inst|prdata[10]~1_combout ),
  30109. .B(\macro_inst|cfg_reg_inst|prdata[10]~2_combout ),
  30110. .C(\macro_inst|cfg_reg_inst|trig_auto_timeout [10]),
  30111. .D(\macro_inst|cfg_reg_inst|frequency [10]),
  30112. .Cin(),
  30113. .Qin(),
  30114. .Clk(),
  30115. .AsyncReset(),
  30116. .SyncReset(),
  30117. .ShiftData(),
  30118. .SyncLoad(),
  30119. .LutOut(\macro_inst|cfg_reg_inst|Selector15~0_combout ),
  30120. .Cout(),
  30121. .Q());
  30122. defparam \macro_inst|cfg_reg_inst|Selector15~0 .coord_x = 16;
  30123. defparam \macro_inst|cfg_reg_inst|Selector15~0 .coord_y = 10;
  30124. defparam \macro_inst|cfg_reg_inst|Selector15~0 .coord_z = 8;
  30125. defparam \macro_inst|cfg_reg_inst|Selector15~0 .mask = 16'hCE46;
  30126. defparam \macro_inst|cfg_reg_inst|Selector15~0 .modeMux = 1'b0;
  30127. defparam \macro_inst|cfg_reg_inst|Selector15~0 .FeedbackMux = 1'b0;
  30128. defparam \macro_inst|cfg_reg_inst|Selector15~0 .ShiftMux = 1'b0;
  30129. defparam \macro_inst|cfg_reg_inst|Selector15~0 .BypassEn = 1'b0;
  30130. defparam \macro_inst|cfg_reg_inst|Selector15~0 .CarryEnb = 1'b1;
  30131. alta_slice \macro_inst|cfg_reg_inst|Selector16~0 (
  30132. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30133. .B(\macro_inst|cfg_reg_inst|max_vol [9]),
  30134. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  30135. .D(\macro_inst|cfg_reg_inst|frequency [9]),
  30136. .Cin(),
  30137. .Qin(),
  30138. .Clk(),
  30139. .AsyncReset(),
  30140. .SyncReset(),
  30141. .ShiftData(),
  30142. .SyncLoad(),
  30143. .LutOut(\macro_inst|cfg_reg_inst|Selector16~0_combout ),
  30144. .Cout(),
  30145. .Q());
  30146. defparam \macro_inst|cfg_reg_inst|Selector16~0 .coord_x = 16;
  30147. defparam \macro_inst|cfg_reg_inst|Selector16~0 .coord_y = 11;
  30148. defparam \macro_inst|cfg_reg_inst|Selector16~0 .coord_z = 2;
  30149. defparam \macro_inst|cfg_reg_inst|Selector16~0 .mask = 16'h30BA;
  30150. defparam \macro_inst|cfg_reg_inst|Selector16~0 .modeMux = 1'b0;
  30151. defparam \macro_inst|cfg_reg_inst|Selector16~0 .FeedbackMux = 1'b0;
  30152. defparam \macro_inst|cfg_reg_inst|Selector16~0 .ShiftMux = 1'b0;
  30153. defparam \macro_inst|cfg_reg_inst|Selector16~0 .BypassEn = 1'b0;
  30154. defparam \macro_inst|cfg_reg_inst|Selector16~0 .CarryEnb = 1'b1;
  30155. alta_slice \macro_inst|cfg_reg_inst|Selector16~1 (
  30156. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [9]),
  30157. .B(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30158. .C(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  30159. .D(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  30160. .Cin(),
  30161. .Qin(),
  30162. .Clk(),
  30163. .AsyncReset(),
  30164. .SyncReset(),
  30165. .ShiftData(),
  30166. .SyncLoad(),
  30167. .LutOut(\macro_inst|cfg_reg_inst|Selector16~1_combout ),
  30168. .Cout(),
  30169. .Q());
  30170. defparam \macro_inst|cfg_reg_inst|Selector16~1 .coord_x = 16;
  30171. defparam \macro_inst|cfg_reg_inst|Selector16~1 .coord_y = 8;
  30172. defparam \macro_inst|cfg_reg_inst|Selector16~1 .coord_z = 11;
  30173. defparam \macro_inst|cfg_reg_inst|Selector16~1 .mask = 16'hEAC0;
  30174. defparam \macro_inst|cfg_reg_inst|Selector16~1 .modeMux = 1'b0;
  30175. defparam \macro_inst|cfg_reg_inst|Selector16~1 .FeedbackMux = 1'b0;
  30176. defparam \macro_inst|cfg_reg_inst|Selector16~1 .ShiftMux = 1'b0;
  30177. defparam \macro_inst|cfg_reg_inst|Selector16~1 .BypassEn = 1'b0;
  30178. defparam \macro_inst|cfg_reg_inst|Selector16~1 .CarryEnb = 1'b1;
  30179. alta_slice \macro_inst|cfg_reg_inst|Selector17~1 (
  30180. .A(\macro_inst|cfg_reg_inst|max_vol [8]),
  30181. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30182. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  30183. .D(\macro_inst|cfg_reg_inst|frequency [8]),
  30184. .Cin(),
  30185. .Qin(),
  30186. .Clk(),
  30187. .AsyncReset(),
  30188. .SyncReset(),
  30189. .ShiftData(),
  30190. .SyncLoad(),
  30191. .LutOut(\macro_inst|cfg_reg_inst|Selector17~1_combout ),
  30192. .Cout(),
  30193. .Q());
  30194. defparam \macro_inst|cfg_reg_inst|Selector17~1 .coord_x = 16;
  30195. defparam \macro_inst|cfg_reg_inst|Selector17~1 .coord_y = 10;
  30196. defparam \macro_inst|cfg_reg_inst|Selector17~1 .coord_z = 3;
  30197. defparam \macro_inst|cfg_reg_inst|Selector17~1 .mask = 16'h50DC;
  30198. defparam \macro_inst|cfg_reg_inst|Selector17~1 .modeMux = 1'b0;
  30199. defparam \macro_inst|cfg_reg_inst|Selector17~1 .FeedbackMux = 1'b0;
  30200. defparam \macro_inst|cfg_reg_inst|Selector17~1 .ShiftMux = 1'b0;
  30201. defparam \macro_inst|cfg_reg_inst|Selector17~1 .BypassEn = 1'b0;
  30202. defparam \macro_inst|cfg_reg_inst|Selector17~1 .CarryEnb = 1'b1;
  30203. alta_slice \macro_inst|cfg_reg_inst|Selector18~1 (
  30204. .A(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30205. .B(\macro_inst|cfg_reg_inst|adc_clk_div [7]),
  30206. .C(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30207. .D(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  30208. .Cin(),
  30209. .Qin(),
  30210. .Clk(),
  30211. .AsyncReset(),
  30212. .SyncReset(),
  30213. .ShiftData(),
  30214. .SyncLoad(),
  30215. .LutOut(\macro_inst|cfg_reg_inst|Selector18~1_combout ),
  30216. .Cout(),
  30217. .Q());
  30218. defparam \macro_inst|cfg_reg_inst|Selector18~1 .coord_x = 18;
  30219. defparam \macro_inst|cfg_reg_inst|Selector18~1 .coord_y = 9;
  30220. defparam \macro_inst|cfg_reg_inst|Selector18~1 .coord_z = 12;
  30221. defparam \macro_inst|cfg_reg_inst|Selector18~1 .mask = 16'hF888;
  30222. defparam \macro_inst|cfg_reg_inst|Selector18~1 .modeMux = 1'b0;
  30223. defparam \macro_inst|cfg_reg_inst|Selector18~1 .FeedbackMux = 1'b0;
  30224. defparam \macro_inst|cfg_reg_inst|Selector18~1 .ShiftMux = 1'b0;
  30225. defparam \macro_inst|cfg_reg_inst|Selector18~1 .BypassEn = 1'b0;
  30226. defparam \macro_inst|cfg_reg_inst|Selector18~1 .CarryEnb = 1'b1;
  30227. alta_slice \macro_inst|cfg_reg_inst|Selector18~2 (
  30228. .A(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  30229. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  30230. .C(\macro_inst|cfg_reg_inst|trig_pulse_width [7]),
  30231. .D(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  30232. .Cin(),
  30233. .Qin(),
  30234. .Clk(),
  30235. .AsyncReset(),
  30236. .SyncReset(),
  30237. .ShiftData(),
  30238. .SyncLoad(),
  30239. .LutOut(\macro_inst|cfg_reg_inst|Selector18~2_combout ),
  30240. .Cout(),
  30241. .Q());
  30242. defparam \macro_inst|cfg_reg_inst|Selector18~2 .coord_x = 18;
  30243. defparam \macro_inst|cfg_reg_inst|Selector18~2 .coord_y = 9;
  30244. defparam \macro_inst|cfg_reg_inst|Selector18~2 .coord_z = 7;
  30245. defparam \macro_inst|cfg_reg_inst|Selector18~2 .mask = 16'hEAC0;
  30246. defparam \macro_inst|cfg_reg_inst|Selector18~2 .modeMux = 1'b0;
  30247. defparam \macro_inst|cfg_reg_inst|Selector18~2 .FeedbackMux = 1'b0;
  30248. defparam \macro_inst|cfg_reg_inst|Selector18~2 .ShiftMux = 1'b0;
  30249. defparam \macro_inst|cfg_reg_inst|Selector18~2 .BypassEn = 1'b0;
  30250. defparam \macro_inst|cfg_reg_inst|Selector18~2 .CarryEnb = 1'b1;
  30251. alta_slice \macro_inst|cfg_reg_inst|Selector19~3 (
  30252. .A(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30253. .B(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  30254. .C(\macro_inst|cfg_reg_inst|adc_clk_div [6]),
  30255. .D(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30256. .Cin(),
  30257. .Qin(),
  30258. .Clk(),
  30259. .AsyncReset(),
  30260. .SyncReset(),
  30261. .ShiftData(),
  30262. .SyncLoad(),
  30263. .LutOut(\macro_inst|cfg_reg_inst|Selector19~3_combout ),
  30264. .Cout(),
  30265. .Q());
  30266. defparam \macro_inst|cfg_reg_inst|Selector19~3 .coord_x = 18;
  30267. defparam \macro_inst|cfg_reg_inst|Selector19~3 .coord_y = 11;
  30268. defparam \macro_inst|cfg_reg_inst|Selector19~3 .coord_z = 2;
  30269. defparam \macro_inst|cfg_reg_inst|Selector19~3 .mask = 16'hECA0;
  30270. defparam \macro_inst|cfg_reg_inst|Selector19~3 .modeMux = 1'b0;
  30271. defparam \macro_inst|cfg_reg_inst|Selector19~3 .FeedbackMux = 1'b0;
  30272. defparam \macro_inst|cfg_reg_inst|Selector19~3 .ShiftMux = 1'b0;
  30273. defparam \macro_inst|cfg_reg_inst|Selector19~3 .BypassEn = 1'b0;
  30274. defparam \macro_inst|cfg_reg_inst|Selector19~3 .CarryEnb = 1'b1;
  30275. alta_slice \macro_inst|cfg_reg_inst|Selector20~0 (
  30276. .A(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30277. .B(\macro_inst|cfg_reg_inst|frequency [5]),
  30278. .C(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30279. .D(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  30280. .Cin(),
  30281. .Qin(),
  30282. .Clk(),
  30283. .AsyncReset(),
  30284. .SyncReset(),
  30285. .ShiftData(),
  30286. .SyncLoad(),
  30287. .LutOut(\macro_inst|cfg_reg_inst|Selector20~0_combout ),
  30288. .Cout(),
  30289. .Q());
  30290. defparam \macro_inst|cfg_reg_inst|Selector20~0 .coord_x = 16;
  30291. defparam \macro_inst|cfg_reg_inst|Selector20~0 .coord_y = 10;
  30292. defparam \macro_inst|cfg_reg_inst|Selector20~0 .coord_z = 7;
  30293. defparam \macro_inst|cfg_reg_inst|Selector20~0 .mask = 16'hBA30;
  30294. defparam \macro_inst|cfg_reg_inst|Selector20~0 .modeMux = 1'b0;
  30295. defparam \macro_inst|cfg_reg_inst|Selector20~0 .FeedbackMux = 1'b0;
  30296. defparam \macro_inst|cfg_reg_inst|Selector20~0 .ShiftMux = 1'b0;
  30297. defparam \macro_inst|cfg_reg_inst|Selector20~0 .BypassEn = 1'b0;
  30298. defparam \macro_inst|cfg_reg_inst|Selector20~0 .CarryEnb = 1'b1;
  30299. alta_slice \macro_inst|cfg_reg_inst|Selector20~1 (
  30300. .A(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30301. .B(\macro_inst|cfg_reg_inst|adc_clk_div [5]),
  30302. .C(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  30303. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  30304. .Cin(),
  30305. .Qin(),
  30306. .Clk(),
  30307. .AsyncReset(),
  30308. .SyncReset(),
  30309. .ShiftData(),
  30310. .SyncLoad(),
  30311. .LutOut(\macro_inst|cfg_reg_inst|Selector20~1_combout ),
  30312. .Cout(),
  30313. .Q());
  30314. defparam \macro_inst|cfg_reg_inst|Selector20~1 .coord_x = 18;
  30315. defparam \macro_inst|cfg_reg_inst|Selector20~1 .coord_y = 9;
  30316. defparam \macro_inst|cfg_reg_inst|Selector20~1 .coord_z = 14;
  30317. defparam \macro_inst|cfg_reg_inst|Selector20~1 .mask = 16'hF888;
  30318. defparam \macro_inst|cfg_reg_inst|Selector20~1 .modeMux = 1'b0;
  30319. defparam \macro_inst|cfg_reg_inst|Selector20~1 .FeedbackMux = 1'b0;
  30320. defparam \macro_inst|cfg_reg_inst|Selector20~1 .ShiftMux = 1'b0;
  30321. defparam \macro_inst|cfg_reg_inst|Selector20~1 .BypassEn = 1'b0;
  30322. defparam \macro_inst|cfg_reg_inst|Selector20~1 .CarryEnb = 1'b1;
  30323. alta_slice \macro_inst|cfg_reg_inst|Selector20~3 (
  30324. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  30325. .B(\macro_inst|cfg_reg_inst|max_vol [5]),
  30326. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  30327. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  30328. .Cin(),
  30329. .Qin(),
  30330. .Clk(),
  30331. .AsyncReset(),
  30332. .SyncReset(),
  30333. .ShiftData(),
  30334. .SyncLoad(),
  30335. .LutOut(\macro_inst|cfg_reg_inst|Selector20~3_combout ),
  30336. .Cout(),
  30337. .Q());
  30338. defparam \macro_inst|cfg_reg_inst|Selector20~3 .coord_x = 17;
  30339. defparam \macro_inst|cfg_reg_inst|Selector20~3 .coord_y = 10;
  30340. defparam \macro_inst|cfg_reg_inst|Selector20~3 .coord_z = 9;
  30341. defparam \macro_inst|cfg_reg_inst|Selector20~3 .mask = 16'h0800;
  30342. defparam \macro_inst|cfg_reg_inst|Selector20~3 .modeMux = 1'b0;
  30343. defparam \macro_inst|cfg_reg_inst|Selector20~3 .FeedbackMux = 1'b0;
  30344. defparam \macro_inst|cfg_reg_inst|Selector20~3 .ShiftMux = 1'b0;
  30345. defparam \macro_inst|cfg_reg_inst|Selector20~3 .BypassEn = 1'b0;
  30346. defparam \macro_inst|cfg_reg_inst|Selector20~3 .CarryEnb = 1'b1;
  30347. alta_slice \macro_inst|cfg_reg_inst|Selector20~4 (
  30348. .A(vcc),
  30349. .B(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  30350. .C(\macro_inst|cfg_reg_inst|duty_cycle [5]),
  30351. .D(\macro_inst|cfg_reg_inst|Selector20~3_combout ),
  30352. .Cin(),
  30353. .Qin(),
  30354. .Clk(),
  30355. .AsyncReset(),
  30356. .SyncReset(),
  30357. .ShiftData(),
  30358. .SyncLoad(),
  30359. .LutOut(\macro_inst|cfg_reg_inst|Selector20~4_combout ),
  30360. .Cout(),
  30361. .Q());
  30362. defparam \macro_inst|cfg_reg_inst|Selector20~4 .coord_x = 17;
  30363. defparam \macro_inst|cfg_reg_inst|Selector20~4 .coord_y = 10;
  30364. defparam \macro_inst|cfg_reg_inst|Selector20~4 .coord_z = 2;
  30365. defparam \macro_inst|cfg_reg_inst|Selector20~4 .mask = 16'hFF0C;
  30366. defparam \macro_inst|cfg_reg_inst|Selector20~4 .modeMux = 1'b0;
  30367. defparam \macro_inst|cfg_reg_inst|Selector20~4 .FeedbackMux = 1'b0;
  30368. defparam \macro_inst|cfg_reg_inst|Selector20~4 .ShiftMux = 1'b0;
  30369. defparam \macro_inst|cfg_reg_inst|Selector20~4 .BypassEn = 1'b0;
  30370. defparam \macro_inst|cfg_reg_inst|Selector20~4 .CarryEnb = 1'b1;
  30371. alta_slice \macro_inst|cfg_reg_inst|Selector21~0 (
  30372. .A(\macro_inst|cfg_reg_inst|frequency [4]),
  30373. .B(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  30374. .C(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30375. .D(\macro_inst|cfg_reg_inst|duty_cycle [4]),
  30376. .Cin(),
  30377. .Qin(),
  30378. .Clk(),
  30379. .AsyncReset(),
  30380. .SyncReset(),
  30381. .ShiftData(),
  30382. .SyncLoad(),
  30383. .LutOut(\macro_inst|cfg_reg_inst|Selector21~0_combout ),
  30384. .Cout(),
  30385. .Q());
  30386. defparam \macro_inst|cfg_reg_inst|Selector21~0 .coord_x = 17;
  30387. defparam \macro_inst|cfg_reg_inst|Selector21~0 .coord_y = 10;
  30388. defparam \macro_inst|cfg_reg_inst|Selector21~0 .coord_z = 6;
  30389. defparam \macro_inst|cfg_reg_inst|Selector21~0 .mask = 16'hA0EC;
  30390. defparam \macro_inst|cfg_reg_inst|Selector21~0 .modeMux = 1'b0;
  30391. defparam \macro_inst|cfg_reg_inst|Selector21~0 .FeedbackMux = 1'b0;
  30392. defparam \macro_inst|cfg_reg_inst|Selector21~0 .ShiftMux = 1'b0;
  30393. defparam \macro_inst|cfg_reg_inst|Selector21~0 .BypassEn = 1'b0;
  30394. defparam \macro_inst|cfg_reg_inst|Selector21~0 .CarryEnb = 1'b1;
  30395. alta_slice \macro_inst|cfg_reg_inst|Selector21~2 (
  30396. .A(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30397. .B(\macro_inst|cfg_reg_inst|adc_clk_div [4]),
  30398. .C(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30399. .D(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  30400. .Cin(),
  30401. .Qin(),
  30402. .Clk(),
  30403. .AsyncReset(),
  30404. .SyncReset(),
  30405. .ShiftData(),
  30406. .SyncLoad(),
  30407. .LutOut(\macro_inst|cfg_reg_inst|Selector21~2_combout ),
  30408. .Cout(),
  30409. .Q());
  30410. defparam \macro_inst|cfg_reg_inst|Selector21~2 .coord_x = 18;
  30411. defparam \macro_inst|cfg_reg_inst|Selector21~2 .coord_y = 9;
  30412. defparam \macro_inst|cfg_reg_inst|Selector21~2 .coord_z = 11;
  30413. defparam \macro_inst|cfg_reg_inst|Selector21~2 .mask = 16'hF888;
  30414. defparam \macro_inst|cfg_reg_inst|Selector21~2 .modeMux = 1'b0;
  30415. defparam \macro_inst|cfg_reg_inst|Selector21~2 .FeedbackMux = 1'b0;
  30416. defparam \macro_inst|cfg_reg_inst|Selector21~2 .ShiftMux = 1'b0;
  30417. defparam \macro_inst|cfg_reg_inst|Selector21~2 .BypassEn = 1'b0;
  30418. defparam \macro_inst|cfg_reg_inst|Selector21~2 .CarryEnb = 1'b1;
  30419. alta_slice \macro_inst|cfg_reg_inst|Selector21~4 (
  30420. .A(\macro_inst|cfg_reg_inst|Selector21~3_combout ),
  30421. .B(\macro_inst|cfg_reg_inst|Selector21~2_combout ),
  30422. .C(\macro_inst|cfg_reg_inst|adc_chnl_sel [3]),
  30423. .D(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  30424. .Cin(),
  30425. .Qin(),
  30426. .Clk(),
  30427. .AsyncReset(),
  30428. .SyncReset(),
  30429. .ShiftData(),
  30430. .SyncLoad(),
  30431. .LutOut(\macro_inst|cfg_reg_inst|Selector21~4_combout ),
  30432. .Cout(),
  30433. .Q());
  30434. defparam \macro_inst|cfg_reg_inst|Selector21~4 .coord_x = 17;
  30435. defparam \macro_inst|cfg_reg_inst|Selector21~4 .coord_y = 10;
  30436. defparam \macro_inst|cfg_reg_inst|Selector21~4 .coord_z = 7;
  30437. defparam \macro_inst|cfg_reg_inst|Selector21~4 .mask = 16'hEFEE;
  30438. defparam \macro_inst|cfg_reg_inst|Selector21~4 .modeMux = 1'b0;
  30439. defparam \macro_inst|cfg_reg_inst|Selector21~4 .FeedbackMux = 1'b0;
  30440. defparam \macro_inst|cfg_reg_inst|Selector21~4 .ShiftMux = 1'b0;
  30441. defparam \macro_inst|cfg_reg_inst|Selector21~4 .BypassEn = 1'b0;
  30442. defparam \macro_inst|cfg_reg_inst|Selector21~4 .CarryEnb = 1'b1;
  30443. alta_slice \macro_inst|cfg_reg_inst|Selector22~2 (
  30444. .A(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30445. .B(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  30446. .C(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30447. .D(\macro_inst|cfg_reg_inst|adc_clk_div [3]),
  30448. .Cin(),
  30449. .Qin(),
  30450. .Clk(),
  30451. .AsyncReset(),
  30452. .SyncReset(),
  30453. .ShiftData(),
  30454. .SyncLoad(),
  30455. .LutOut(\macro_inst|cfg_reg_inst|Selector22~2_combout ),
  30456. .Cout(),
  30457. .Q());
  30458. defparam \macro_inst|cfg_reg_inst|Selector22~2 .coord_x = 18;
  30459. defparam \macro_inst|cfg_reg_inst|Selector22~2 .coord_y = 9;
  30460. defparam \macro_inst|cfg_reg_inst|Selector22~2 .coord_z = 3;
  30461. defparam \macro_inst|cfg_reg_inst|Selector22~2 .mask = 16'hEAC0;
  30462. defparam \macro_inst|cfg_reg_inst|Selector22~2 .modeMux = 1'b0;
  30463. defparam \macro_inst|cfg_reg_inst|Selector22~2 .FeedbackMux = 1'b0;
  30464. defparam \macro_inst|cfg_reg_inst|Selector22~2 .ShiftMux = 1'b0;
  30465. defparam \macro_inst|cfg_reg_inst|Selector22~2 .BypassEn = 1'b0;
  30466. defparam \macro_inst|cfg_reg_inst|Selector22~2 .CarryEnb = 1'b1;
  30467. alta_slice \macro_inst|cfg_reg_inst|Selector22~4 (
  30468. .A(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  30469. .B(\macro_inst|cfg_reg_inst|Selector22~2_combout ),
  30470. .C(\macro_inst|cfg_reg_inst|adc_chnl_sel [2]),
  30471. .D(\macro_inst|cfg_reg_inst|Selector22~3_combout ),
  30472. .Cin(),
  30473. .Qin(),
  30474. .Clk(),
  30475. .AsyncReset(),
  30476. .SyncReset(),
  30477. .ShiftData(),
  30478. .SyncLoad(),
  30479. .LutOut(\macro_inst|cfg_reg_inst|Selector22~4_combout ),
  30480. .Cout(),
  30481. .Q());
  30482. defparam \macro_inst|cfg_reg_inst|Selector22~4 .coord_x = 17;
  30483. defparam \macro_inst|cfg_reg_inst|Selector22~4 .coord_y = 9;
  30484. defparam \macro_inst|cfg_reg_inst|Selector22~4 .coord_z = 3;
  30485. defparam \macro_inst|cfg_reg_inst|Selector22~4 .mask = 16'hFFCE;
  30486. defparam \macro_inst|cfg_reg_inst|Selector22~4 .modeMux = 1'b0;
  30487. defparam \macro_inst|cfg_reg_inst|Selector22~4 .FeedbackMux = 1'b0;
  30488. defparam \macro_inst|cfg_reg_inst|Selector22~4 .ShiftMux = 1'b0;
  30489. defparam \macro_inst|cfg_reg_inst|Selector22~4 .BypassEn = 1'b0;
  30490. defparam \macro_inst|cfg_reg_inst|Selector22~4 .CarryEnb = 1'b1;
  30491. alta_slice \macro_inst|cfg_reg_inst|Selector23~2 (
  30492. .A(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30493. .B(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  30494. .C(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30495. .D(\macro_inst|cfg_reg_inst|adc_clk_div [2]),
  30496. .Cin(),
  30497. .Qin(),
  30498. .Clk(),
  30499. .AsyncReset(),
  30500. .SyncReset(),
  30501. .ShiftData(),
  30502. .SyncLoad(),
  30503. .LutOut(\macro_inst|cfg_reg_inst|Selector23~2_combout ),
  30504. .Cout(),
  30505. .Q());
  30506. defparam \macro_inst|cfg_reg_inst|Selector23~2 .coord_x = 18;
  30507. defparam \macro_inst|cfg_reg_inst|Selector23~2 .coord_y = 9;
  30508. defparam \macro_inst|cfg_reg_inst|Selector23~2 .coord_z = 8;
  30509. defparam \macro_inst|cfg_reg_inst|Selector23~2 .mask = 16'hF888;
  30510. defparam \macro_inst|cfg_reg_inst|Selector23~2 .modeMux = 1'b0;
  30511. defparam \macro_inst|cfg_reg_inst|Selector23~2 .FeedbackMux = 1'b0;
  30512. defparam \macro_inst|cfg_reg_inst|Selector23~2 .ShiftMux = 1'b0;
  30513. defparam \macro_inst|cfg_reg_inst|Selector23~2 .BypassEn = 1'b0;
  30514. defparam \macro_inst|cfg_reg_inst|Selector23~2 .CarryEnb = 1'b1;
  30515. alta_slice \macro_inst|cfg_reg_inst|Selector24~0 (
  30516. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30517. .B(\macro_inst|cfg_reg_inst|frequency [1]),
  30518. .C(\macro_inst|cfg_reg_inst|duty_cycle [1]),
  30519. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  30520. .Cin(),
  30521. .Qin(),
  30522. .Clk(),
  30523. .AsyncReset(),
  30524. .SyncReset(),
  30525. .ShiftData(),
  30526. .SyncLoad(),
  30527. .LutOut(\macro_inst|cfg_reg_inst|Selector24~0_combout ),
  30528. .Cout(),
  30529. .Q());
  30530. defparam \macro_inst|cfg_reg_inst|Selector24~0 .coord_x = 18;
  30531. defparam \macro_inst|cfg_reg_inst|Selector24~0 .coord_y = 10;
  30532. defparam \macro_inst|cfg_reg_inst|Selector24~0 .coord_z = 3;
  30533. defparam \macro_inst|cfg_reg_inst|Selector24~0 .mask = 16'h8F88;
  30534. defparam \macro_inst|cfg_reg_inst|Selector24~0 .modeMux = 1'b0;
  30535. defparam \macro_inst|cfg_reg_inst|Selector24~0 .FeedbackMux = 1'b0;
  30536. defparam \macro_inst|cfg_reg_inst|Selector24~0 .ShiftMux = 1'b0;
  30537. defparam \macro_inst|cfg_reg_inst|Selector24~0 .BypassEn = 1'b0;
  30538. defparam \macro_inst|cfg_reg_inst|Selector24~0 .CarryEnb = 1'b1;
  30539. alta_slice \macro_inst|cfg_reg_inst|Selector24~1 (
  30540. .A(\macro_inst|cfg_reg_inst|Equal8~0_combout ),
  30541. .B(\macro_inst|cfg_reg_inst|wave_type [1]),
  30542. .C(\macro_inst|cfg_reg_inst|max_vol [1]),
  30543. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  30544. .Cin(),
  30545. .Qin(),
  30546. .Clk(),
  30547. .AsyncReset(),
  30548. .SyncReset(),
  30549. .ShiftData(),
  30550. .SyncLoad(),
  30551. .LutOut(\macro_inst|cfg_reg_inst|Selector24~1_combout ),
  30552. .Cout(),
  30553. .Q());
  30554. defparam \macro_inst|cfg_reg_inst|Selector24~1 .coord_x = 16;
  30555. defparam \macro_inst|cfg_reg_inst|Selector24~1 .coord_y = 6;
  30556. defparam \macro_inst|cfg_reg_inst|Selector24~1 .coord_z = 3;
  30557. defparam \macro_inst|cfg_reg_inst|Selector24~1 .mask = 16'hF888;
  30558. defparam \macro_inst|cfg_reg_inst|Selector24~1 .modeMux = 1'b0;
  30559. defparam \macro_inst|cfg_reg_inst|Selector24~1 .FeedbackMux = 1'b0;
  30560. defparam \macro_inst|cfg_reg_inst|Selector24~1 .ShiftMux = 1'b0;
  30561. defparam \macro_inst|cfg_reg_inst|Selector24~1 .BypassEn = 1'b0;
  30562. defparam \macro_inst|cfg_reg_inst|Selector24~1 .CarryEnb = 1'b1;
  30563. alta_slice \macro_inst|cfg_reg_inst|Selector24~4 (
  30564. .A(\macro_inst|cfg_reg_inst|Equal0~0_combout ),
  30565. .B(\macro_inst|cfg_reg_inst|Selector24~2_combout ),
  30566. .C(\macro_inst|cfg_reg_inst|Equal0~1_combout ),
  30567. .D(\macro_inst|cfg_reg_inst|Selector24~3_combout ),
  30568. .Cin(),
  30569. .Qin(),
  30570. .Clk(),
  30571. .AsyncReset(),
  30572. .SyncReset(),
  30573. .ShiftData(),
  30574. .SyncLoad(),
  30575. .LutOut(\macro_inst|cfg_reg_inst|Selector24~4_combout ),
  30576. .Cout(),
  30577. .Q());
  30578. defparam \macro_inst|cfg_reg_inst|Selector24~4 .coord_x = 17;
  30579. defparam \macro_inst|cfg_reg_inst|Selector24~4 .coord_y = 12;
  30580. defparam \macro_inst|cfg_reg_inst|Selector24~4 .coord_z = 0;
  30581. defparam \macro_inst|cfg_reg_inst|Selector24~4 .mask = 16'h8000;
  30582. defparam \macro_inst|cfg_reg_inst|Selector24~4 .modeMux = 1'b0;
  30583. defparam \macro_inst|cfg_reg_inst|Selector24~4 .FeedbackMux = 1'b0;
  30584. defparam \macro_inst|cfg_reg_inst|Selector24~4 .ShiftMux = 1'b0;
  30585. defparam \macro_inst|cfg_reg_inst|Selector24~4 .BypassEn = 1'b0;
  30586. defparam \macro_inst|cfg_reg_inst|Selector24~4 .CarryEnb = 1'b1;
  30587. alta_slice \macro_inst|cfg_reg_inst|Selector24~5 (
  30588. .A(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30589. .B(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  30590. .C(\macro_inst|cfg_reg_inst|adc_clk_div [1]),
  30591. .D(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30592. .Cin(),
  30593. .Qin(),
  30594. .Clk(),
  30595. .AsyncReset(),
  30596. .SyncReset(),
  30597. .ShiftData(),
  30598. .SyncLoad(),
  30599. .LutOut(\macro_inst|cfg_reg_inst|Selector24~5_combout ),
  30600. .Cout(),
  30601. .Q());
  30602. defparam \macro_inst|cfg_reg_inst|Selector24~5 .coord_x = 19;
  30603. defparam \macro_inst|cfg_reg_inst|Selector24~5 .coord_y = 8;
  30604. defparam \macro_inst|cfg_reg_inst|Selector24~5 .coord_z = 12;
  30605. defparam \macro_inst|cfg_reg_inst|Selector24~5 .mask = 16'h8F88;
  30606. defparam \macro_inst|cfg_reg_inst|Selector24~5 .modeMux = 1'b0;
  30607. defparam \macro_inst|cfg_reg_inst|Selector24~5 .FeedbackMux = 1'b0;
  30608. defparam \macro_inst|cfg_reg_inst|Selector24~5 .ShiftMux = 1'b0;
  30609. defparam \macro_inst|cfg_reg_inst|Selector24~5 .BypassEn = 1'b0;
  30610. defparam \macro_inst|cfg_reg_inst|Selector24~5 .CarryEnb = 1'b1;
  30611. alta_slice \macro_inst|cfg_reg_inst|Selector24~6 (
  30612. .A(\macro_inst|cfg_reg_inst|Selector24~5_combout ),
  30613. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [1]),
  30614. .C(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  30615. .D(\macro_inst|cfg_reg_inst|Selector24~4_combout ),
  30616. .Cin(),
  30617. .Qin(),
  30618. .Clk(),
  30619. .AsyncReset(),
  30620. .SyncReset(),
  30621. .ShiftData(),
  30622. .SyncLoad(),
  30623. .LutOut(\macro_inst|cfg_reg_inst|Selector24~6_combout ),
  30624. .Cout(),
  30625. .Q());
  30626. defparam \macro_inst|cfg_reg_inst|Selector24~6 .coord_x = 19;
  30627. defparam \macro_inst|cfg_reg_inst|Selector24~6 .coord_y = 8;
  30628. defparam \macro_inst|cfg_reg_inst|Selector24~6 .coord_z = 9;
  30629. defparam \macro_inst|cfg_reg_inst|Selector24~6 .mask = 16'hFFBA;
  30630. defparam \macro_inst|cfg_reg_inst|Selector24~6 .modeMux = 1'b0;
  30631. defparam \macro_inst|cfg_reg_inst|Selector24~6 .FeedbackMux = 1'b0;
  30632. defparam \macro_inst|cfg_reg_inst|Selector24~6 .ShiftMux = 1'b0;
  30633. defparam \macro_inst|cfg_reg_inst|Selector24~6 .BypassEn = 1'b0;
  30634. defparam \macro_inst|cfg_reg_inst|Selector24~6 .CarryEnb = 1'b1;
  30635. alta_slice \macro_inst|cfg_reg_inst|Selector24~8 (
  30636. .A(\macro_inst|cfg_reg_inst|adc_chnl_sel [0]),
  30637. .B(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  30638. .C(\macro_inst|cfg_reg_inst|Selector24~7_combout ),
  30639. .D(\macro_inst|cfg_reg_inst|Selector24~6_combout ),
  30640. .Cin(),
  30641. .Qin(),
  30642. .Clk(),
  30643. .AsyncReset(),
  30644. .SyncReset(),
  30645. .ShiftData(),
  30646. .SyncLoad(),
  30647. .LutOut(\macro_inst|cfg_reg_inst|Selector24~8_combout ),
  30648. .Cout(),
  30649. .Q());
  30650. defparam \macro_inst|cfg_reg_inst|Selector24~8 .coord_x = 19;
  30651. defparam \macro_inst|cfg_reg_inst|Selector24~8 .coord_y = 8;
  30652. defparam \macro_inst|cfg_reg_inst|Selector24~8 .coord_z = 4;
  30653. defparam \macro_inst|cfg_reg_inst|Selector24~8 .mask = 16'hFFF4;
  30654. defparam \macro_inst|cfg_reg_inst|Selector24~8 .modeMux = 1'b0;
  30655. defparam \macro_inst|cfg_reg_inst|Selector24~8 .FeedbackMux = 1'b0;
  30656. defparam \macro_inst|cfg_reg_inst|Selector24~8 .ShiftMux = 1'b0;
  30657. defparam \macro_inst|cfg_reg_inst|Selector24~8 .BypassEn = 1'b0;
  30658. defparam \macro_inst|cfg_reg_inst|Selector24~8 .CarryEnb = 1'b1;
  30659. alta_slice \macro_inst|cfg_reg_inst|Selector25~1 (
  30660. .A(\macro_inst|cfg_reg_inst|dac_en~q ),
  30661. .B(\macro_inst|cfg_reg_inst|adc_run~q ),
  30662. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  30663. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  30664. .Cin(),
  30665. .Qin(),
  30666. .Clk(),
  30667. .AsyncReset(),
  30668. .SyncReset(),
  30669. .ShiftData(),
  30670. .SyncLoad(),
  30671. .LutOut(\macro_inst|cfg_reg_inst|Selector25~1_combout ),
  30672. .Cout(),
  30673. .Q());
  30674. defparam \macro_inst|cfg_reg_inst|Selector25~1 .coord_x = 18;
  30675. defparam \macro_inst|cfg_reg_inst|Selector25~1 .coord_y = 11;
  30676. defparam \macro_inst|cfg_reg_inst|Selector25~1 .coord_z = 4;
  30677. defparam \macro_inst|cfg_reg_inst|Selector25~1 .mask = 16'hA0C0;
  30678. defparam \macro_inst|cfg_reg_inst|Selector25~1 .modeMux = 1'b0;
  30679. defparam \macro_inst|cfg_reg_inst|Selector25~1 .FeedbackMux = 1'b0;
  30680. defparam \macro_inst|cfg_reg_inst|Selector25~1 .ShiftMux = 1'b0;
  30681. defparam \macro_inst|cfg_reg_inst|Selector25~1 .BypassEn = 1'b0;
  30682. defparam \macro_inst|cfg_reg_inst|Selector25~1 .CarryEnb = 1'b1;
  30683. alta_slice \macro_inst|cfg_reg_inst|Selector25~3 (
  30684. .A(\macro_inst|cfg_reg_inst|adc_clk_div [0]),
  30685. .B(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  30686. .C(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  30687. .D(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  30688. .Cin(),
  30689. .Qin(),
  30690. .Clk(),
  30691. .AsyncReset(),
  30692. .SyncReset(),
  30693. .ShiftData(),
  30694. .SyncLoad(),
  30695. .LutOut(\macro_inst|cfg_reg_inst|Selector25~3_combout ),
  30696. .Cout(),
  30697. .Q());
  30698. defparam \macro_inst|cfg_reg_inst|Selector25~3 .coord_x = 18;
  30699. defparam \macro_inst|cfg_reg_inst|Selector25~3 .coord_y = 11;
  30700. defparam \macro_inst|cfg_reg_inst|Selector25~3 .coord_z = 3;
  30701. defparam \macro_inst|cfg_reg_inst|Selector25~3 .mask = 16'hDC50;
  30702. defparam \macro_inst|cfg_reg_inst|Selector25~3 .modeMux = 1'b0;
  30703. defparam \macro_inst|cfg_reg_inst|Selector25~3 .FeedbackMux = 1'b0;
  30704. defparam \macro_inst|cfg_reg_inst|Selector25~3 .ShiftMux = 1'b0;
  30705. defparam \macro_inst|cfg_reg_inst|Selector25~3 .BypassEn = 1'b0;
  30706. defparam \macro_inst|cfg_reg_inst|Selector25~3 .CarryEnb = 1'b1;
  30707. alta_slice \macro_inst|cfg_reg_inst|Selector25~4 (
  30708. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  30709. .B(\macro_inst|cfg_reg_inst|adc_en~q ),
  30710. .C(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  30711. .D(\macro_inst|cfg_reg_inst|frequency [0]),
  30712. .Cin(),
  30713. .Qin(),
  30714. .Clk(),
  30715. .AsyncReset(),
  30716. .SyncReset(),
  30717. .ShiftData(),
  30718. .SyncLoad(),
  30719. .LutOut(\macro_inst|cfg_reg_inst|Selector25~4_combout ),
  30720. .Cout(),
  30721. .Q());
  30722. defparam \macro_inst|cfg_reg_inst|Selector25~4 .coord_x = 18;
  30723. defparam \macro_inst|cfg_reg_inst|Selector25~4 .coord_y = 11;
  30724. defparam \macro_inst|cfg_reg_inst|Selector25~4 .coord_z = 8;
  30725. defparam \macro_inst|cfg_reg_inst|Selector25~4 .mask = 16'hEAC0;
  30726. defparam \macro_inst|cfg_reg_inst|Selector25~4 .modeMux = 1'b0;
  30727. defparam \macro_inst|cfg_reg_inst|Selector25~4 .FeedbackMux = 1'b0;
  30728. defparam \macro_inst|cfg_reg_inst|Selector25~4 .ShiftMux = 1'b0;
  30729. defparam \macro_inst|cfg_reg_inst|Selector25~4 .BypassEn = 1'b0;
  30730. defparam \macro_inst|cfg_reg_inst|Selector25~4 .CarryEnb = 1'b1;
  30731. alta_slice \macro_inst|cfg_reg_inst|Selector25~6 (
  30732. .A(\macro_inst|cfg_reg_inst|Selector25~2_combout ),
  30733. .B(\macro_inst|cfg_reg_inst|Selector25~3_combout ),
  30734. .C(\macro_inst|cfg_reg_inst|Selector25~4_combout ),
  30735. .D(\macro_inst|cfg_reg_inst|Selector25~5_combout ),
  30736. .Cin(),
  30737. .Qin(),
  30738. .Clk(),
  30739. .AsyncReset(),
  30740. .SyncReset(),
  30741. .ShiftData(),
  30742. .SyncLoad(),
  30743. .LutOut(\macro_inst|cfg_reg_inst|Selector25~6_combout ),
  30744. .Cout(),
  30745. .Q());
  30746. defparam \macro_inst|cfg_reg_inst|Selector25~6 .coord_x = 18;
  30747. defparam \macro_inst|cfg_reg_inst|Selector25~6 .coord_y = 11;
  30748. defparam \macro_inst|cfg_reg_inst|Selector25~6 .coord_z = 9;
  30749. defparam \macro_inst|cfg_reg_inst|Selector25~6 .mask = 16'hFFFE;
  30750. defparam \macro_inst|cfg_reg_inst|Selector25~6 .modeMux = 1'b0;
  30751. defparam \macro_inst|cfg_reg_inst|Selector25~6 .FeedbackMux = 1'b0;
  30752. defparam \macro_inst|cfg_reg_inst|Selector25~6 .ShiftMux = 1'b0;
  30753. defparam \macro_inst|cfg_reg_inst|Selector25~6 .BypassEn = 1'b0;
  30754. defparam \macro_inst|cfg_reg_inst|Selector25~6 .CarryEnb = 1'b1;
  30755. alta_slice \macro_inst|cfg_reg_inst|adc_chnl_sel[0] (
  30756. .A(vcc),
  30757. .B(vcc),
  30758. .C(vcc),
  30759. .D(\rv32.mem_ahb_hwdata[1] ),
  30760. .Cin(),
  30761. .Qin(\macro_inst|cfg_reg_inst|adc_chnl_sel [0]),
  30762. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y11_SIG_SIG ),
  30763. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  30764. .SyncReset(),
  30765. .ShiftData(),
  30766. .SyncLoad(),
  30767. .LutOut(\macro_inst|cfg_reg_inst|adc_chnl_sel[0]~0_combout ),
  30768. .Cout(),
  30769. .Q(\macro_inst|cfg_reg_inst|adc_chnl_sel [0]));
  30770. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .coord_x = 17;
  30771. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .coord_y = 9;
  30772. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .coord_z = 12;
  30773. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .mask = 16'h00FF;
  30774. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .modeMux = 1'b0;
  30775. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .FeedbackMux = 1'b0;
  30776. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .ShiftMux = 1'b0;
  30777. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .BypassEn = 1'b0;
  30778. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[0] .CarryEnb = 1'b1;
  30779. alta_slice \macro_inst|cfg_reg_inst|adc_chnl_sel[1] (
  30780. .A(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  30781. .B(\macro_inst|cfg_reg_inst|Selector23~2_combout ),
  30782. .C(\rv32.mem_ahb_hwdata[2] ),
  30783. .D(\macro_inst|cfg_reg_inst|Selector23~3_combout ),
  30784. .Cin(),
  30785. .Qin(\macro_inst|cfg_reg_inst|adc_chnl_sel [1]),
  30786. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y11_SIG_SIG ),
  30787. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  30788. .SyncReset(SyncReset_X60_Y11_GND),
  30789. .ShiftData(),
  30790. .SyncLoad(SyncLoad_X60_Y11_VCC),
  30791. .LutOut(\macro_inst|cfg_reg_inst|Selector23~4_combout ),
  30792. .Cout(),
  30793. .Q(\macro_inst|cfg_reg_inst|adc_chnl_sel [1]));
  30794. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .coord_x = 17;
  30795. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .coord_y = 9;
  30796. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .coord_z = 8;
  30797. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .mask = 16'hFFEC;
  30798. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .modeMux = 1'b0;
  30799. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .FeedbackMux = 1'b1;
  30800. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .ShiftMux = 1'b0;
  30801. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .BypassEn = 1'b1;
  30802. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[1] .CarryEnb = 1'b1;
  30803. alta_slice \macro_inst|cfg_reg_inst|adc_chnl_sel[2] (
  30804. .A(vcc),
  30805. .B(vcc),
  30806. .C(vcc),
  30807. .D(\rv32.mem_ahb_hwdata[3] ),
  30808. .Cin(),
  30809. .Qin(\macro_inst|cfg_reg_inst|adc_chnl_sel [2]),
  30810. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y11_SIG_SIG ),
  30811. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  30812. .SyncReset(),
  30813. .ShiftData(),
  30814. .SyncLoad(),
  30815. .LutOut(\macro_inst|cfg_reg_inst|adc_chnl_sel[2]~1_combout ),
  30816. .Cout(),
  30817. .Q(\macro_inst|cfg_reg_inst|adc_chnl_sel [2]));
  30818. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .coord_x = 17;
  30819. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .coord_y = 9;
  30820. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .coord_z = 2;
  30821. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .mask = 16'h00FF;
  30822. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .modeMux = 1'b0;
  30823. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .FeedbackMux = 1'b0;
  30824. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .ShiftMux = 1'b0;
  30825. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .BypassEn = 1'b0;
  30826. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[2] .CarryEnb = 1'b1;
  30827. alta_slice \macro_inst|cfg_reg_inst|adc_chnl_sel[3] (
  30828. .A(vcc),
  30829. .B(vcc),
  30830. .C(\rv32.mem_ahb_hwdata[4] ),
  30831. .D(vcc),
  30832. .Cin(),
  30833. .Qin(\macro_inst|cfg_reg_inst|adc_chnl_sel [3]),
  30834. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y9_SIG_SIG ),
  30835. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  30836. .SyncReset(),
  30837. .ShiftData(),
  30838. .SyncLoad(),
  30839. .LutOut(\macro_inst|cfg_reg_inst|adc_chnl_sel[3]~2_combout ),
  30840. .Cout(),
  30841. .Q(\macro_inst|cfg_reg_inst|adc_chnl_sel [3]));
  30842. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .coord_x = 18;
  30843. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .coord_y = 9;
  30844. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .coord_z = 6;
  30845. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .mask = 16'h0F0F;
  30846. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .modeMux = 1'b0;
  30847. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .FeedbackMux = 1'b0;
  30848. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .ShiftMux = 1'b0;
  30849. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .BypassEn = 1'b0;
  30850. defparam \macro_inst|cfg_reg_inst|adc_chnl_sel[3] .CarryEnb = 1'b1;
  30851. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[0] (
  30852. .A(vcc),
  30853. .B(vcc),
  30854. .C(vcc),
  30855. .D(\rv32.mem_ahb_hwdata[0] ),
  30856. .Cin(),
  30857. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [0]),
  30858. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X61_Y10_SIG_SIG ),
  30859. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  30860. .SyncReset(),
  30861. .ShiftData(),
  30862. .SyncLoad(),
  30863. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[0]~1_combout ),
  30864. .Cout(),
  30865. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [0]));
  30866. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .coord_x = 19;
  30867. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .coord_y = 11;
  30868. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .coord_z = 13;
  30869. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .mask = 16'h00FF;
  30870. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .modeMux = 1'b0;
  30871. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .FeedbackMux = 1'b0;
  30872. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .ShiftMux = 1'b0;
  30873. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .BypassEn = 1'b0;
  30874. defparam \macro_inst|cfg_reg_inst|adc_clk_div[0] .CarryEnb = 1'b1;
  30875. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[1] (
  30876. .A(vcc),
  30877. .B(vcc),
  30878. .C(\rv32.mem_ahb_hwdata[1] ),
  30879. .D(vcc),
  30880. .Cin(),
  30881. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [1]),
  30882. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X61_Y10_SIG_SIG ),
  30883. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  30884. .SyncReset(),
  30885. .ShiftData(),
  30886. .SyncLoad(),
  30887. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[1]~2_combout ),
  30888. .Cout(),
  30889. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [1]));
  30890. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .coord_x = 19;
  30891. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .coord_y = 11;
  30892. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .coord_z = 11;
  30893. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .mask = 16'h0F0F;
  30894. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .modeMux = 1'b0;
  30895. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .FeedbackMux = 1'b0;
  30896. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .ShiftMux = 1'b0;
  30897. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .BypassEn = 1'b0;
  30898. defparam \macro_inst|cfg_reg_inst|adc_clk_div[1] .CarryEnb = 1'b1;
  30899. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[2] (
  30900. .A(),
  30901. .B(),
  30902. .C(\rv32.mem_ahb_hwdata[2] ),
  30903. .D(),
  30904. .Cin(),
  30905. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [2]),
  30906. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ),
  30907. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  30908. .SyncReset(SyncReset_X60_Y9_GND),
  30909. .ShiftData(),
  30910. .SyncLoad(SyncLoad_X60_Y9_VCC),
  30911. .LutOut(),
  30912. .Cout(),
  30913. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [2]));
  30914. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .coord_x = 18;
  30915. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .coord_y = 9;
  30916. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .coord_z = 13;
  30917. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .mask = 16'hFFFF;
  30918. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .modeMux = 1'b1;
  30919. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .FeedbackMux = 1'b0;
  30920. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .ShiftMux = 1'b0;
  30921. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .BypassEn = 1'b1;
  30922. defparam \macro_inst|cfg_reg_inst|adc_clk_div[2] .CarryEnb = 1'b1;
  30923. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[3] (
  30924. .A(),
  30925. .B(),
  30926. .C(vcc),
  30927. .D(\rv32.mem_ahb_hwdata[3] ),
  30928. .Cin(),
  30929. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [3]),
  30930. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ),
  30931. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  30932. .SyncReset(),
  30933. .ShiftData(),
  30934. .SyncLoad(),
  30935. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[3]__feeder__LutOut ),
  30936. .Cout(),
  30937. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [3]));
  30938. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .coord_x = 18;
  30939. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .coord_y = 9;
  30940. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .coord_z = 15;
  30941. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .mask = 16'hFF00;
  30942. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .modeMux = 1'b1;
  30943. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .FeedbackMux = 1'b0;
  30944. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .ShiftMux = 1'b0;
  30945. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .BypassEn = 1'b0;
  30946. defparam \macro_inst|cfg_reg_inst|adc_clk_div[3] .CarryEnb = 1'b1;
  30947. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[4] (
  30948. .A(),
  30949. .B(),
  30950. .C(vcc),
  30951. .D(\rv32.mem_ahb_hwdata[4] ),
  30952. .Cin(),
  30953. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [4]),
  30954. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ),
  30955. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  30956. .SyncReset(),
  30957. .ShiftData(),
  30958. .SyncLoad(),
  30959. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[4]__feeder__LutOut ),
  30960. .Cout(),
  30961. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [4]));
  30962. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .coord_x = 18;
  30963. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .coord_y = 9;
  30964. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .coord_z = 10;
  30965. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .mask = 16'hFF00;
  30966. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .modeMux = 1'b1;
  30967. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .FeedbackMux = 1'b0;
  30968. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .ShiftMux = 1'b0;
  30969. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .BypassEn = 1'b0;
  30970. defparam \macro_inst|cfg_reg_inst|adc_clk_div[4] .CarryEnb = 1'b1;
  30971. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[5] (
  30972. .A(),
  30973. .B(),
  30974. .C(vcc),
  30975. .D(\rv32.mem_ahb_hwdata[5] ),
  30976. .Cin(),
  30977. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [5]),
  30978. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ),
  30979. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  30980. .SyncReset(),
  30981. .ShiftData(),
  30982. .SyncLoad(),
  30983. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[5]__feeder__LutOut ),
  30984. .Cout(),
  30985. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [5]));
  30986. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .coord_x = 18;
  30987. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .coord_y = 9;
  30988. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .coord_z = 9;
  30989. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .mask = 16'hFF00;
  30990. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .modeMux = 1'b1;
  30991. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .FeedbackMux = 1'b0;
  30992. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .ShiftMux = 1'b0;
  30993. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .BypassEn = 1'b0;
  30994. defparam \macro_inst|cfg_reg_inst|adc_clk_div[5] .CarryEnb = 1'b1;
  30995. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[6] (
  30996. .A(),
  30997. .B(),
  30998. .C(vcc),
  30999. .D(\rv32.mem_ahb_hwdata[6] ),
  31000. .Cin(),
  31001. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [6]),
  31002. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X61_Y10_SIG_SIG ),
  31003. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  31004. .SyncReset(),
  31005. .ShiftData(),
  31006. .SyncLoad(),
  31007. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[6]__feeder__LutOut ),
  31008. .Cout(),
  31009. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [6]));
  31010. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .coord_x = 19;
  31011. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .coord_y = 11;
  31012. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .coord_z = 10;
  31013. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .mask = 16'hFF00;
  31014. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .modeMux = 1'b1;
  31015. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .FeedbackMux = 1'b0;
  31016. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .ShiftMux = 1'b0;
  31017. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .BypassEn = 1'b0;
  31018. defparam \macro_inst|cfg_reg_inst|adc_clk_div[6] .CarryEnb = 1'b1;
  31019. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[7] (
  31020. .A(),
  31021. .B(),
  31022. .C(vcc),
  31023. .D(\rv32.mem_ahb_hwdata[7] ),
  31024. .Cin(),
  31025. .Qin(\macro_inst|cfg_reg_inst|adc_clk_div [7]),
  31026. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout_X60_Y9_SIG_SIG ),
  31027. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  31028. .SyncReset(),
  31029. .ShiftData(),
  31030. .SyncLoad(),
  31031. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[7]__feeder__LutOut ),
  31032. .Cout(),
  31033. .Q(\macro_inst|cfg_reg_inst|adc_clk_div [7]));
  31034. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .coord_x = 18;
  31035. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .coord_y = 9;
  31036. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .coord_z = 1;
  31037. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .mask = 16'hFF00;
  31038. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .modeMux = 1'b1;
  31039. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .FeedbackMux = 1'b0;
  31040. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .ShiftMux = 1'b0;
  31041. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .BypassEn = 1'b0;
  31042. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7] .CarryEnb = 1'b1;
  31043. alta_slice \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 (
  31044. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  31045. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  31046. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  31047. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  31048. .Cin(),
  31049. .Qin(),
  31050. .Clk(),
  31051. .AsyncReset(),
  31052. .SyncReset(),
  31053. .ShiftData(),
  31054. .SyncLoad(),
  31055. .LutOut(\macro_inst|cfg_reg_inst|adc_clk_div[7]~0_combout ),
  31056. .Cout(),
  31057. .Q());
  31058. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .coord_x = 18;
  31059. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .coord_y = 9;
  31060. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .coord_z = 0;
  31061. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .mask = 16'h0800;
  31062. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .modeMux = 1'b0;
  31063. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .FeedbackMux = 1'b0;
  31064. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .ShiftMux = 1'b0;
  31065. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .BypassEn = 1'b0;
  31066. defparam \macro_inst|cfg_reg_inst|adc_clk_div[7]~0 .CarryEnb = 1'b1;
  31067. alta_slice \macro_inst|cfg_reg_inst|adc_en (
  31068. .A(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  31069. .B(\macro_inst|trig_ctrl_inst|always1~1_combout ),
  31070. .C(\rv32.mem_ahb_hwdata[0] ),
  31071. .D(\macro_inst|trig_ctrl_inst|adc_eoc_sync2~q ),
  31072. .Cin(),
  31073. .Qin(\macro_inst|cfg_reg_inst|adc_en~q ),
  31074. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_en~0_combout_X60_Y3_SIG_SIG ),
  31075. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  31076. .SyncReset(SyncReset_X60_Y3_GND),
  31077. .ShiftData(),
  31078. .SyncLoad(SyncLoad_X60_Y3_VCC),
  31079. .LutOut(\macro_inst|trig_ctrl_inst|always1~2_combout ),
  31080. .Cout(),
  31081. .Q(\macro_inst|cfg_reg_inst|adc_en~q ));
  31082. defparam \macro_inst|cfg_reg_inst|adc_en .coord_x = 18;
  31083. defparam \macro_inst|cfg_reg_inst|adc_en .coord_y = 6;
  31084. defparam \macro_inst|cfg_reg_inst|adc_en .coord_z = 8;
  31085. defparam \macro_inst|cfg_reg_inst|adc_en .mask = 16'hFFDD;
  31086. defparam \macro_inst|cfg_reg_inst|adc_en .modeMux = 1'b0;
  31087. defparam \macro_inst|cfg_reg_inst|adc_en .FeedbackMux = 1'b0;
  31088. defparam \macro_inst|cfg_reg_inst|adc_en .ShiftMux = 1'b0;
  31089. defparam \macro_inst|cfg_reg_inst|adc_en .BypassEn = 1'b1;
  31090. defparam \macro_inst|cfg_reg_inst|adc_en .CarryEnb = 1'b1;
  31091. alta_slice \macro_inst|cfg_reg_inst|adc_en~0 (
  31092. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  31093. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  31094. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  31095. .D(\macro_inst|cfg_reg_inst|always0~0_combout ),
  31096. .Cin(),
  31097. .Qin(),
  31098. .Clk(),
  31099. .AsyncReset(),
  31100. .SyncReset(),
  31101. .ShiftData(),
  31102. .SyncLoad(),
  31103. .LutOut(\macro_inst|cfg_reg_inst|adc_en~0_combout ),
  31104. .Cout(),
  31105. .Q());
  31106. defparam \macro_inst|cfg_reg_inst|adc_en~0 .coord_x = 18;
  31107. defparam \macro_inst|cfg_reg_inst|adc_en~0 .coord_y = 9;
  31108. defparam \macro_inst|cfg_reg_inst|adc_en~0 .coord_z = 2;
  31109. defparam \macro_inst|cfg_reg_inst|adc_en~0 .mask = 16'h0200;
  31110. defparam \macro_inst|cfg_reg_inst|adc_en~0 .modeMux = 1'b0;
  31111. defparam \macro_inst|cfg_reg_inst|adc_en~0 .FeedbackMux = 1'b0;
  31112. defparam \macro_inst|cfg_reg_inst|adc_en~0 .ShiftMux = 1'b0;
  31113. defparam \macro_inst|cfg_reg_inst|adc_en~0 .BypassEn = 1'b0;
  31114. defparam \macro_inst|cfg_reg_inst|adc_en~0 .CarryEnb = 1'b1;
  31115. alta_slice \macro_inst|cfg_reg_inst|adc_restart (
  31116. .A(),
  31117. .B(),
  31118. .C(vcc),
  31119. .D(\rv32.mem_ahb_hwdata[1] ),
  31120. .Cin(),
  31121. .Qin(\macro_inst|cfg_reg_inst|adc_restart~q ),
  31122. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y9_SIG_SIG ),
  31123. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  31124. .SyncReset(),
  31125. .ShiftData(),
  31126. .SyncLoad(),
  31127. .LutOut(\macro_inst|cfg_reg_inst|adc_restart__feeder__LutOut ),
  31128. .Cout(),
  31129. .Q(\macro_inst|cfg_reg_inst|adc_restart~q ));
  31130. defparam \macro_inst|cfg_reg_inst|adc_restart .coord_x = 19;
  31131. defparam \macro_inst|cfg_reg_inst|adc_restart .coord_y = 12;
  31132. defparam \macro_inst|cfg_reg_inst|adc_restart .coord_z = 14;
  31133. defparam \macro_inst|cfg_reg_inst|adc_restart .mask = 16'hFF00;
  31134. defparam \macro_inst|cfg_reg_inst|adc_restart .modeMux = 1'b1;
  31135. defparam \macro_inst|cfg_reg_inst|adc_restart .FeedbackMux = 1'b0;
  31136. defparam \macro_inst|cfg_reg_inst|adc_restart .ShiftMux = 1'b0;
  31137. defparam \macro_inst|cfg_reg_inst|adc_restart .BypassEn = 1'b0;
  31138. defparam \macro_inst|cfg_reg_inst|adc_restart .CarryEnb = 1'b1;
  31139. alta_slice \macro_inst|cfg_reg_inst|adc_run (
  31140. .A(\macro_inst|cfg_reg_inst|adc_en~q ),
  31141. .B(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  31142. .C(\rv32.mem_ahb_hwdata[0] ),
  31143. .D(\macro_inst|trig_ctrl_inst|Selector0~8_combout ),
  31144. .Cin(),
  31145. .Qin(\macro_inst|cfg_reg_inst|adc_run~q ),
  31146. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|adc_run~0_combout_X61_Y6_SIG_SIG ),
  31147. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  31148. .SyncReset(SyncReset_X61_Y6_GND),
  31149. .ShiftData(),
  31150. .SyncLoad(SyncLoad_X61_Y6_VCC),
  31151. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~9_combout ),
  31152. .Cout(),
  31153. .Q(\macro_inst|cfg_reg_inst|adc_run~q ));
  31154. defparam \macro_inst|cfg_reg_inst|adc_run .coord_x = 17;
  31155. defparam \macro_inst|cfg_reg_inst|adc_run .coord_y = 6;
  31156. defparam \macro_inst|cfg_reg_inst|adc_run .coord_z = 2;
  31157. defparam \macro_inst|cfg_reg_inst|adc_run .mask = 16'hFF44;
  31158. defparam \macro_inst|cfg_reg_inst|adc_run .modeMux = 1'b0;
  31159. defparam \macro_inst|cfg_reg_inst|adc_run .FeedbackMux = 1'b0;
  31160. defparam \macro_inst|cfg_reg_inst|adc_run .ShiftMux = 1'b0;
  31161. defparam \macro_inst|cfg_reg_inst|adc_run .BypassEn = 1'b1;
  31162. defparam \macro_inst|cfg_reg_inst|adc_run .CarryEnb = 1'b1;
  31163. alta_slice \macro_inst|cfg_reg_inst|adc_run~0 (
  31164. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  31165. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  31166. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  31167. .D(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  31168. .Cin(),
  31169. .Qin(),
  31170. .Clk(),
  31171. .AsyncReset(),
  31172. .SyncReset(),
  31173. .ShiftData(),
  31174. .SyncLoad(),
  31175. .LutOut(\macro_inst|cfg_reg_inst|adc_run~0_combout ),
  31176. .Cout(),
  31177. .Q());
  31178. defparam \macro_inst|cfg_reg_inst|adc_run~0 .coord_x = 19;
  31179. defparam \macro_inst|cfg_reg_inst|adc_run~0 .coord_y = 12;
  31180. defparam \macro_inst|cfg_reg_inst|adc_run~0 .coord_z = 1;
  31181. defparam \macro_inst|cfg_reg_inst|adc_run~0 .mask = 16'h4000;
  31182. defparam \macro_inst|cfg_reg_inst|adc_run~0 .modeMux = 1'b0;
  31183. defparam \macro_inst|cfg_reg_inst|adc_run~0 .FeedbackMux = 1'b0;
  31184. defparam \macro_inst|cfg_reg_inst|adc_run~0 .ShiftMux = 1'b0;
  31185. defparam \macro_inst|cfg_reg_inst|adc_run~0 .BypassEn = 1'b0;
  31186. defparam \macro_inst|cfg_reg_inst|adc_run~0 .CarryEnb = 1'b1;
  31187. alta_slice \macro_inst|cfg_reg_inst|always1~2 (
  31188. .A(\macro_inst|ahb2apb_inst|penable~q ),
  31189. .B(\macro_inst|ShiftLeft0~0_combout ),
  31190. .C(\macro_inst|ahb2apb_inst|pwrite~q ),
  31191. .D(\macro_inst|ahb2apb_inst|psel~q ),
  31192. .Cin(),
  31193. .Qin(),
  31194. .Clk(),
  31195. .AsyncReset(),
  31196. .SyncReset(),
  31197. .ShiftData(),
  31198. .SyncLoad(),
  31199. .LutOut(\macro_inst|cfg_reg_inst|always1~2_combout ),
  31200. .Cout(),
  31201. .Q());
  31202. defparam \macro_inst|cfg_reg_inst|always1~2 .coord_x = 16;
  31203. defparam \macro_inst|cfg_reg_inst|always1~2 .coord_y = 12;
  31204. defparam \macro_inst|cfg_reg_inst|always1~2 .coord_z = 5;
  31205. defparam \macro_inst|cfg_reg_inst|always1~2 .mask = 16'h0400;
  31206. defparam \macro_inst|cfg_reg_inst|always1~2 .modeMux = 1'b0;
  31207. defparam \macro_inst|cfg_reg_inst|always1~2 .FeedbackMux = 1'b0;
  31208. defparam \macro_inst|cfg_reg_inst|always1~2 .ShiftMux = 1'b0;
  31209. defparam \macro_inst|cfg_reg_inst|always1~2 .BypassEn = 1'b0;
  31210. defparam \macro_inst|cfg_reg_inst|always1~2 .CarryEnb = 1'b1;
  31211. alta_slice \macro_inst|cfg_reg_inst|dac_en (
  31212. .A(\macro_inst|cfg_reg_inst|adc_restart~q ),
  31213. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  31214. .C(\rv32.mem_ahb_hwdata[0] ),
  31215. .D(\macro_inst|cfg_reg_inst|dac_run~q ),
  31216. .Cin(),
  31217. .Qin(\macro_inst|cfg_reg_inst|dac_en~q ),
  31218. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|dac_en~2_combout_X61_Y9_SIG_SIG ),
  31219. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  31220. .SyncReset(SyncReset_X61_Y9_GND),
  31221. .ShiftData(),
  31222. .SyncLoad(SyncLoad_X61_Y9_VCC),
  31223. .LutOut(\macro_inst|cfg_reg_inst|Selector24~3_combout ),
  31224. .Cout(),
  31225. .Q(\macro_inst|cfg_reg_inst|dac_en~q ));
  31226. defparam \macro_inst|cfg_reg_inst|dac_en .coord_x = 19;
  31227. defparam \macro_inst|cfg_reg_inst|dac_en .coord_y = 12;
  31228. defparam \macro_inst|cfg_reg_inst|dac_en .coord_z = 13;
  31229. defparam \macro_inst|cfg_reg_inst|dac_en .mask = 16'hEE22;
  31230. defparam \macro_inst|cfg_reg_inst|dac_en .modeMux = 1'b0;
  31231. defparam \macro_inst|cfg_reg_inst|dac_en .FeedbackMux = 1'b0;
  31232. defparam \macro_inst|cfg_reg_inst|dac_en .ShiftMux = 1'b0;
  31233. defparam \macro_inst|cfg_reg_inst|dac_en .BypassEn = 1'b1;
  31234. defparam \macro_inst|cfg_reg_inst|dac_en .CarryEnb = 1'b1;
  31235. alta_slice \macro_inst|cfg_reg_inst|dac_en~2 (
  31236. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  31237. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  31238. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  31239. .D(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  31240. .Cin(),
  31241. .Qin(),
  31242. .Clk(),
  31243. .AsyncReset(),
  31244. .SyncReset(),
  31245. .ShiftData(),
  31246. .SyncLoad(),
  31247. .LutOut(\macro_inst|cfg_reg_inst|dac_en~2_combout ),
  31248. .Cout(),
  31249. .Q());
  31250. defparam \macro_inst|cfg_reg_inst|dac_en~2 .coord_x = 19;
  31251. defparam \macro_inst|cfg_reg_inst|dac_en~2 .coord_y = 12;
  31252. defparam \macro_inst|cfg_reg_inst|dac_en~2 .coord_z = 11;
  31253. defparam \macro_inst|cfg_reg_inst|dac_en~2 .mask = 16'h8000;
  31254. defparam \macro_inst|cfg_reg_inst|dac_en~2 .modeMux = 1'b0;
  31255. defparam \macro_inst|cfg_reg_inst|dac_en~2 .FeedbackMux = 1'b0;
  31256. defparam \macro_inst|cfg_reg_inst|dac_en~2 .ShiftMux = 1'b0;
  31257. defparam \macro_inst|cfg_reg_inst|dac_en~2 .BypassEn = 1'b0;
  31258. defparam \macro_inst|cfg_reg_inst|dac_en~2 .CarryEnb = 1'b1;
  31259. alta_slice \macro_inst|cfg_reg_inst|dac_en~_wirecell (
  31260. .A(vcc),
  31261. .B(vcc),
  31262. .C(\macro_inst|cfg_reg_inst|dac_en~q ),
  31263. .D(vcc),
  31264. .Cin(),
  31265. .Qin(),
  31266. .Clk(),
  31267. .AsyncReset(),
  31268. .SyncReset(),
  31269. .ShiftData(),
  31270. .SyncLoad(),
  31271. .LutOut(\macro_inst|cfg_reg_inst|dac_en~_wirecell_combout ),
  31272. .Cout(),
  31273. .Q());
  31274. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .coord_x = 18;
  31275. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .coord_y = 11;
  31276. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .coord_z = 1;
  31277. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .mask = 16'h0F0F;
  31278. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .modeMux = 1'b0;
  31279. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .FeedbackMux = 1'b0;
  31280. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .ShiftMux = 1'b0;
  31281. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .BypassEn = 1'b0;
  31282. defparam \macro_inst|cfg_reg_inst|dac_en~_wirecell .CarryEnb = 1'b1;
  31283. alta_slice \macro_inst|cfg_reg_inst|dac_run (
  31284. .A(),
  31285. .B(),
  31286. .C(vcc),
  31287. .D(\rv32.mem_ahb_hwdata[1] ),
  31288. .Cin(),
  31289. .Qin(\macro_inst|cfg_reg_inst|dac_run~q ),
  31290. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|dac_en~2_combout_X61_Y9_SIG_SIG ),
  31291. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  31292. .SyncReset(),
  31293. .ShiftData(),
  31294. .SyncLoad(),
  31295. .LutOut(\macro_inst|cfg_reg_inst|dac_run__feeder__LutOut ),
  31296. .Cout(),
  31297. .Q(\macro_inst|cfg_reg_inst|dac_run~q ));
  31298. defparam \macro_inst|cfg_reg_inst|dac_run .coord_x = 19;
  31299. defparam \macro_inst|cfg_reg_inst|dac_run .coord_y = 12;
  31300. defparam \macro_inst|cfg_reg_inst|dac_run .coord_z = 3;
  31301. defparam \macro_inst|cfg_reg_inst|dac_run .mask = 16'hFF00;
  31302. defparam \macro_inst|cfg_reg_inst|dac_run .modeMux = 1'b1;
  31303. defparam \macro_inst|cfg_reg_inst|dac_run .FeedbackMux = 1'b0;
  31304. defparam \macro_inst|cfg_reg_inst|dac_run .ShiftMux = 1'b0;
  31305. defparam \macro_inst|cfg_reg_inst|dac_run .BypassEn = 1'b0;
  31306. defparam \macro_inst|cfg_reg_inst|dac_run .CarryEnb = 1'b1;
  31307. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[0] (
  31308. .A(\macro_inst|cfg_reg_inst|wave_type [0]),
  31309. .B(\macro_inst|cfg_reg_inst|Equal8~0_combout ),
  31310. .C(\rv32.mem_ahb_hwdata[0] ),
  31311. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  31312. .Cin(),
  31313. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [0]),
  31314. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31315. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31316. .SyncReset(SyncReset_X59_Y11_GND),
  31317. .ShiftData(),
  31318. .SyncLoad(SyncLoad_X59_Y11_VCC),
  31319. .LutOut(\macro_inst|cfg_reg_inst|Selector25~0_combout ),
  31320. .Cout(),
  31321. .Q(\macro_inst|cfg_reg_inst|duty_cycle [0]));
  31322. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .coord_x = 18;
  31323. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .coord_y = 10;
  31324. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .coord_z = 7;
  31325. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .mask = 16'hF888;
  31326. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .modeMux = 1'b0;
  31327. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .FeedbackMux = 1'b1;
  31328. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .ShiftMux = 1'b0;
  31329. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .BypassEn = 1'b1;
  31330. defparam \macro_inst|cfg_reg_inst|duty_cycle[0] .CarryEnb = 1'b1;
  31331. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[0]~0 (
  31332. .A(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  31333. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  31334. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  31335. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  31336. .Cin(),
  31337. .Qin(),
  31338. .Clk(),
  31339. .AsyncReset(),
  31340. .SyncReset(),
  31341. .ShiftData(),
  31342. .SyncLoad(),
  31343. .LutOut(\macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout ),
  31344. .Cout(),
  31345. .Q());
  31346. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .coord_x = 18;
  31347. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .coord_y = 10;
  31348. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .coord_z = 15;
  31349. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .mask = 16'h8000;
  31350. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .modeMux = 1'b0;
  31351. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .FeedbackMux = 1'b0;
  31352. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .ShiftMux = 1'b0;
  31353. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .BypassEn = 1'b0;
  31354. defparam \macro_inst|cfg_reg_inst|duty_cycle[0]~0 .CarryEnb = 1'b1;
  31355. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[1] (
  31356. .A(vcc),
  31357. .B(vcc),
  31358. .C(vcc),
  31359. .D(\rv32.mem_ahb_hwdata[1] ),
  31360. .Cin(),
  31361. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [1]),
  31362. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31363. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31364. .SyncReset(),
  31365. .ShiftData(),
  31366. .SyncLoad(),
  31367. .LutOut(\macro_inst|cfg_reg_inst|duty_cycle[1]~1_combout ),
  31368. .Cout(),
  31369. .Q(\macro_inst|cfg_reg_inst|duty_cycle [1]));
  31370. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .coord_x = 18;
  31371. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .coord_y = 10;
  31372. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .coord_z = 4;
  31373. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .mask = 16'h00FF;
  31374. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .modeMux = 1'b0;
  31375. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .FeedbackMux = 1'b0;
  31376. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .ShiftMux = 1'b0;
  31377. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .BypassEn = 1'b0;
  31378. defparam \macro_inst|cfg_reg_inst|duty_cycle[1] .CarryEnb = 1'b1;
  31379. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[2] (
  31380. .A(\macro_inst|cfg_reg_inst|frequency [2]),
  31381. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  31382. .C(\rv32.mem_ahb_hwdata[2] ),
  31383. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  31384. .Cin(),
  31385. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [2]),
  31386. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31387. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31388. .SyncReset(SyncReset_X59_Y11_GND),
  31389. .ShiftData(),
  31390. .SyncLoad(SyncLoad_X59_Y11_VCC),
  31391. .LutOut(\macro_inst|cfg_reg_inst|Selector23~0_combout ),
  31392. .Cout(),
  31393. .Q(\macro_inst|cfg_reg_inst|duty_cycle [2]));
  31394. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .coord_x = 18;
  31395. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .coord_y = 10;
  31396. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .coord_z = 8;
  31397. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .mask = 16'hF888;
  31398. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .modeMux = 1'b0;
  31399. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .FeedbackMux = 1'b1;
  31400. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .ShiftMux = 1'b0;
  31401. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .BypassEn = 1'b1;
  31402. defparam \macro_inst|cfg_reg_inst|duty_cycle[2] .CarryEnb = 1'b1;
  31403. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[3] (
  31404. .A(\macro_inst|cfg_reg_inst|frequency [3]),
  31405. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  31406. .C(\rv32.mem_ahb_hwdata[3] ),
  31407. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  31408. .Cin(),
  31409. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [3]),
  31410. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31411. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31412. .SyncReset(SyncReset_X59_Y11_GND),
  31413. .ShiftData(),
  31414. .SyncLoad(SyncLoad_X59_Y11_VCC),
  31415. .LutOut(\macro_inst|cfg_reg_inst|Selector22~0_combout ),
  31416. .Cout(),
  31417. .Q(\macro_inst|cfg_reg_inst|duty_cycle [3]));
  31418. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .coord_x = 18;
  31419. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .coord_y = 10;
  31420. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .coord_z = 0;
  31421. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .mask = 16'hF444;
  31422. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .modeMux = 1'b0;
  31423. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .FeedbackMux = 1'b1;
  31424. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .ShiftMux = 1'b0;
  31425. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .BypassEn = 1'b1;
  31426. defparam \macro_inst|cfg_reg_inst|duty_cycle[3] .CarryEnb = 1'b1;
  31427. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[4] (
  31428. .A(vcc),
  31429. .B(vcc),
  31430. .C(vcc),
  31431. .D(\rv32.mem_ahb_hwdata[4] ),
  31432. .Cin(),
  31433. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [4]),
  31434. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31435. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31436. .SyncReset(),
  31437. .ShiftData(),
  31438. .SyncLoad(),
  31439. .LutOut(\macro_inst|cfg_reg_inst|duty_cycle[4]~2_combout ),
  31440. .Cout(),
  31441. .Q(\macro_inst|cfg_reg_inst|duty_cycle [4]));
  31442. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .coord_x = 18;
  31443. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .coord_y = 10;
  31444. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .coord_z = 6;
  31445. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .mask = 16'h00FF;
  31446. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .modeMux = 1'b0;
  31447. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .FeedbackMux = 1'b0;
  31448. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .ShiftMux = 1'b0;
  31449. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .BypassEn = 1'b0;
  31450. defparam \macro_inst|cfg_reg_inst|duty_cycle[4] .CarryEnb = 1'b1;
  31451. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[5] (
  31452. .A(vcc),
  31453. .B(vcc),
  31454. .C(vcc),
  31455. .D(\rv32.mem_ahb_hwdata[5] ),
  31456. .Cin(),
  31457. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [5]),
  31458. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31459. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31460. .SyncReset(),
  31461. .ShiftData(),
  31462. .SyncLoad(),
  31463. .LutOut(\macro_inst|cfg_reg_inst|duty_cycle[5]~3_combout ),
  31464. .Cout(),
  31465. .Q(\macro_inst|cfg_reg_inst|duty_cycle [5]));
  31466. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .coord_x = 18;
  31467. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .coord_y = 10;
  31468. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .coord_z = 1;
  31469. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .mask = 16'h00FF;
  31470. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .modeMux = 1'b0;
  31471. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .FeedbackMux = 1'b0;
  31472. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .ShiftMux = 1'b0;
  31473. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .BypassEn = 1'b0;
  31474. defparam \macro_inst|cfg_reg_inst|duty_cycle[5] .CarryEnb = 1'b1;
  31475. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[6] (
  31476. .A(\macro_inst|cfg_reg_inst|frequency [6]),
  31477. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  31478. .C(\rv32.mem_ahb_hwdata[6] ),
  31479. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  31480. .Cin(),
  31481. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [6]),
  31482. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31483. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31484. .SyncReset(SyncReset_X59_Y11_GND),
  31485. .ShiftData(),
  31486. .SyncLoad(SyncLoad_X59_Y11_VCC),
  31487. .LutOut(\macro_inst|cfg_reg_inst|Selector19~0_combout ),
  31488. .Cout(),
  31489. .Q(\macro_inst|cfg_reg_inst|duty_cycle [6]));
  31490. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .coord_x = 18;
  31491. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .coord_y = 10;
  31492. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .coord_z = 5;
  31493. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .mask = 16'hF444;
  31494. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .modeMux = 1'b0;
  31495. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .FeedbackMux = 1'b1;
  31496. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .ShiftMux = 1'b0;
  31497. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .BypassEn = 1'b1;
  31498. defparam \macro_inst|cfg_reg_inst|duty_cycle[6] .CarryEnb = 1'b1;
  31499. alta_slice \macro_inst|cfg_reg_inst|duty_cycle[7] (
  31500. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  31501. .B(\macro_inst|cfg_reg_inst|frequency [7]),
  31502. .C(\rv32.mem_ahb_hwdata[7] ),
  31503. .D(\macro_inst|cfg_reg_inst|Equal11~0_combout ),
  31504. .Cin(),
  31505. .Qin(\macro_inst|cfg_reg_inst|duty_cycle [7]),
  31506. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|duty_cycle[0]~0_combout_X59_Y11_SIG_SIG ),
  31507. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31508. .SyncReset(SyncReset_X59_Y11_GND),
  31509. .ShiftData(),
  31510. .SyncLoad(SyncLoad_X59_Y11_VCC),
  31511. .LutOut(\macro_inst|cfg_reg_inst|Selector18~0_combout ),
  31512. .Cout(),
  31513. .Q(\macro_inst|cfg_reg_inst|duty_cycle [7]));
  31514. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .coord_x = 18;
  31515. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .coord_y = 10;
  31516. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .coord_z = 11;
  31517. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .mask = 16'hF222;
  31518. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .modeMux = 1'b0;
  31519. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .FeedbackMux = 1'b1;
  31520. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .ShiftMux = 1'b0;
  31521. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .BypassEn = 1'b1;
  31522. defparam \macro_inst|cfg_reg_inst|duty_cycle[7] .CarryEnb = 1'b1;
  31523. alta_slice \macro_inst|cfg_reg_inst|frequency[0] (
  31524. .A(),
  31525. .B(),
  31526. .C(vcc),
  31527. .D(\rv32.mem_ahb_hwdata[0] ),
  31528. .Cin(),
  31529. .Qin(\macro_inst|cfg_reg_inst|frequency [0]),
  31530. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  31531. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  31532. .SyncReset(),
  31533. .ShiftData(),
  31534. .SyncLoad(),
  31535. .LutOut(\macro_inst|cfg_reg_inst|frequency[0]__feeder__LutOut ),
  31536. .Cout(),
  31537. .Q(\macro_inst|cfg_reg_inst|frequency [0]));
  31538. defparam \macro_inst|cfg_reg_inst|frequency[0] .coord_x = 16;
  31539. defparam \macro_inst|cfg_reg_inst|frequency[0] .coord_y = 10;
  31540. defparam \macro_inst|cfg_reg_inst|frequency[0] .coord_z = 4;
  31541. defparam \macro_inst|cfg_reg_inst|frequency[0] .mask = 16'hFF00;
  31542. defparam \macro_inst|cfg_reg_inst|frequency[0] .modeMux = 1'b1;
  31543. defparam \macro_inst|cfg_reg_inst|frequency[0] .FeedbackMux = 1'b0;
  31544. defparam \macro_inst|cfg_reg_inst|frequency[0] .ShiftMux = 1'b0;
  31545. defparam \macro_inst|cfg_reg_inst|frequency[0] .BypassEn = 1'b0;
  31546. defparam \macro_inst|cfg_reg_inst|frequency[0] .CarryEnb = 1'b1;
  31547. alta_slice \macro_inst|cfg_reg_inst|frequency[10] (
  31548. .A(),
  31549. .B(),
  31550. .C(vcc),
  31551. .D(\rv32.mem_ahb_hwdata[10] ),
  31552. .Cin(),
  31553. .Qin(\macro_inst|cfg_reg_inst|frequency [10]),
  31554. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  31555. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  31556. .SyncReset(),
  31557. .ShiftData(),
  31558. .SyncLoad(),
  31559. .LutOut(\macro_inst|cfg_reg_inst|frequency[10]__feeder__LutOut ),
  31560. .Cout(),
  31561. .Q(\macro_inst|cfg_reg_inst|frequency [10]));
  31562. defparam \macro_inst|cfg_reg_inst|frequency[10] .coord_x = 16;
  31563. defparam \macro_inst|cfg_reg_inst|frequency[10] .coord_y = 10;
  31564. defparam \macro_inst|cfg_reg_inst|frequency[10] .coord_z = 9;
  31565. defparam \macro_inst|cfg_reg_inst|frequency[10] .mask = 16'hFF00;
  31566. defparam \macro_inst|cfg_reg_inst|frequency[10] .modeMux = 1'b1;
  31567. defparam \macro_inst|cfg_reg_inst|frequency[10] .FeedbackMux = 1'b0;
  31568. defparam \macro_inst|cfg_reg_inst|frequency[10] .ShiftMux = 1'b0;
  31569. defparam \macro_inst|cfg_reg_inst|frequency[10] .BypassEn = 1'b0;
  31570. defparam \macro_inst|cfg_reg_inst|frequency[10] .CarryEnb = 1'b1;
  31571. alta_slice \macro_inst|cfg_reg_inst|frequency[11] (
  31572. .A(),
  31573. .B(),
  31574. .C(vcc),
  31575. .D(\rv32.mem_ahb_hwdata[11] ),
  31576. .Cin(),
  31577. .Qin(\macro_inst|cfg_reg_inst|frequency [11]),
  31578. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  31579. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  31580. .SyncReset(),
  31581. .ShiftData(),
  31582. .SyncLoad(),
  31583. .LutOut(\macro_inst|cfg_reg_inst|frequency[11]__feeder__LutOut ),
  31584. .Cout(),
  31585. .Q(\macro_inst|cfg_reg_inst|frequency [11]));
  31586. defparam \macro_inst|cfg_reg_inst|frequency[11] .coord_x = 16;
  31587. defparam \macro_inst|cfg_reg_inst|frequency[11] .coord_y = 10;
  31588. defparam \macro_inst|cfg_reg_inst|frequency[11] .coord_z = 12;
  31589. defparam \macro_inst|cfg_reg_inst|frequency[11] .mask = 16'hFF00;
  31590. defparam \macro_inst|cfg_reg_inst|frequency[11] .modeMux = 1'b1;
  31591. defparam \macro_inst|cfg_reg_inst|frequency[11] .FeedbackMux = 1'b0;
  31592. defparam \macro_inst|cfg_reg_inst|frequency[11] .ShiftMux = 1'b0;
  31593. defparam \macro_inst|cfg_reg_inst|frequency[11] .BypassEn = 1'b0;
  31594. defparam \macro_inst|cfg_reg_inst|frequency[11] .CarryEnb = 1'b1;
  31595. alta_slice \macro_inst|cfg_reg_inst|frequency[12] (
  31596. .A(),
  31597. .B(),
  31598. .C(vcc),
  31599. .D(\rv32.mem_ahb_hwdata[12] ),
  31600. .Cin(),
  31601. .Qin(\macro_inst|cfg_reg_inst|frequency [12]),
  31602. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  31603. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  31604. .SyncReset(),
  31605. .ShiftData(),
  31606. .SyncLoad(),
  31607. .LutOut(\macro_inst|cfg_reg_inst|frequency[12]__feeder__LutOut ),
  31608. .Cout(),
  31609. .Q(\macro_inst|cfg_reg_inst|frequency [12]));
  31610. defparam \macro_inst|cfg_reg_inst|frequency[12] .coord_x = 15;
  31611. defparam \macro_inst|cfg_reg_inst|frequency[12] .coord_y = 11;
  31612. defparam \macro_inst|cfg_reg_inst|frequency[12] .coord_z = 5;
  31613. defparam \macro_inst|cfg_reg_inst|frequency[12] .mask = 16'hFF00;
  31614. defparam \macro_inst|cfg_reg_inst|frequency[12] .modeMux = 1'b1;
  31615. defparam \macro_inst|cfg_reg_inst|frequency[12] .FeedbackMux = 1'b0;
  31616. defparam \macro_inst|cfg_reg_inst|frequency[12] .ShiftMux = 1'b0;
  31617. defparam \macro_inst|cfg_reg_inst|frequency[12] .BypassEn = 1'b0;
  31618. defparam \macro_inst|cfg_reg_inst|frequency[12] .CarryEnb = 1'b1;
  31619. alta_slice \macro_inst|cfg_reg_inst|frequency[13] (
  31620. .A(),
  31621. .B(),
  31622. .C(vcc),
  31623. .D(\rv32.mem_ahb_hwdata[13] ),
  31624. .Cin(),
  31625. .Qin(\macro_inst|cfg_reg_inst|frequency [13]),
  31626. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  31627. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  31628. .SyncReset(),
  31629. .ShiftData(),
  31630. .SyncLoad(),
  31631. .LutOut(\macro_inst|cfg_reg_inst|frequency[13]__feeder__LutOut ),
  31632. .Cout(),
  31633. .Q(\macro_inst|cfg_reg_inst|frequency [13]));
  31634. defparam \macro_inst|cfg_reg_inst|frequency[13] .coord_x = 14;
  31635. defparam \macro_inst|cfg_reg_inst|frequency[13] .coord_y = 9;
  31636. defparam \macro_inst|cfg_reg_inst|frequency[13] .coord_z = 3;
  31637. defparam \macro_inst|cfg_reg_inst|frequency[13] .mask = 16'hFF00;
  31638. defparam \macro_inst|cfg_reg_inst|frequency[13] .modeMux = 1'b1;
  31639. defparam \macro_inst|cfg_reg_inst|frequency[13] .FeedbackMux = 1'b0;
  31640. defparam \macro_inst|cfg_reg_inst|frequency[13] .ShiftMux = 1'b0;
  31641. defparam \macro_inst|cfg_reg_inst|frequency[13] .BypassEn = 1'b0;
  31642. defparam \macro_inst|cfg_reg_inst|frequency[13] .CarryEnb = 1'b1;
  31643. alta_slice \macro_inst|cfg_reg_inst|frequency[14] (
  31644. .A(),
  31645. .B(),
  31646. .C(vcc),
  31647. .D(\rv32.mem_ahb_hwdata[14] ),
  31648. .Cin(),
  31649. .Qin(\macro_inst|cfg_reg_inst|frequency [14]),
  31650. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y9_SIG_SIG ),
  31651. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  31652. .SyncReset(),
  31653. .ShiftData(),
  31654. .SyncLoad(),
  31655. .LutOut(\macro_inst|cfg_reg_inst|frequency[14]__feeder__LutOut ),
  31656. .Cout(),
  31657. .Q(\macro_inst|cfg_reg_inst|frequency [14]));
  31658. defparam \macro_inst|cfg_reg_inst|frequency[14] .coord_x = 17;
  31659. defparam \macro_inst|cfg_reg_inst|frequency[14] .coord_y = 10;
  31660. defparam \macro_inst|cfg_reg_inst|frequency[14] .coord_z = 14;
  31661. defparam \macro_inst|cfg_reg_inst|frequency[14] .mask = 16'hFF00;
  31662. defparam \macro_inst|cfg_reg_inst|frequency[14] .modeMux = 1'b1;
  31663. defparam \macro_inst|cfg_reg_inst|frequency[14] .FeedbackMux = 1'b0;
  31664. defparam \macro_inst|cfg_reg_inst|frequency[14] .ShiftMux = 1'b0;
  31665. defparam \macro_inst|cfg_reg_inst|frequency[14] .BypassEn = 1'b0;
  31666. defparam \macro_inst|cfg_reg_inst|frequency[14] .CarryEnb = 1'b1;
  31667. alta_slice \macro_inst|cfg_reg_inst|frequency[15] (
  31668. .A(),
  31669. .B(),
  31670. .C(vcc),
  31671. .D(\rv32.mem_ahb_hwdata[15] ),
  31672. .Cin(),
  31673. .Qin(\macro_inst|cfg_reg_inst|frequency [15]),
  31674. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  31675. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  31676. .SyncReset(),
  31677. .ShiftData(),
  31678. .SyncLoad(),
  31679. .LutOut(\macro_inst|cfg_reg_inst|frequency[15]__feeder__LutOut ),
  31680. .Cout(),
  31681. .Q(\macro_inst|cfg_reg_inst|frequency [15]));
  31682. defparam \macro_inst|cfg_reg_inst|frequency[15] .coord_x = 16;
  31683. defparam \macro_inst|cfg_reg_inst|frequency[15] .coord_y = 10;
  31684. defparam \macro_inst|cfg_reg_inst|frequency[15] .coord_z = 2;
  31685. defparam \macro_inst|cfg_reg_inst|frequency[15] .mask = 16'hFF00;
  31686. defparam \macro_inst|cfg_reg_inst|frequency[15] .modeMux = 1'b1;
  31687. defparam \macro_inst|cfg_reg_inst|frequency[15] .FeedbackMux = 1'b0;
  31688. defparam \macro_inst|cfg_reg_inst|frequency[15] .ShiftMux = 1'b0;
  31689. defparam \macro_inst|cfg_reg_inst|frequency[15] .BypassEn = 1'b0;
  31690. defparam \macro_inst|cfg_reg_inst|frequency[15] .CarryEnb = 1'b1;
  31691. alta_slice \macro_inst|cfg_reg_inst|frequency[16] (
  31692. .A(),
  31693. .B(),
  31694. .C(vcc),
  31695. .D(\rv32.mem_ahb_hwdata[16] ),
  31696. .Cin(),
  31697. .Qin(\macro_inst|cfg_reg_inst|frequency [16]),
  31698. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  31699. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  31700. .SyncReset(),
  31701. .ShiftData(),
  31702. .SyncLoad(),
  31703. .LutOut(\macro_inst|cfg_reg_inst|frequency[16]__feeder__LutOut ),
  31704. .Cout(),
  31705. .Q(\macro_inst|cfg_reg_inst|frequency [16]));
  31706. defparam \macro_inst|cfg_reg_inst|frequency[16] .coord_x = 15;
  31707. defparam \macro_inst|cfg_reg_inst|frequency[16] .coord_y = 11;
  31708. defparam \macro_inst|cfg_reg_inst|frequency[16] .coord_z = 1;
  31709. defparam \macro_inst|cfg_reg_inst|frequency[16] .mask = 16'hFF00;
  31710. defparam \macro_inst|cfg_reg_inst|frequency[16] .modeMux = 1'b1;
  31711. defparam \macro_inst|cfg_reg_inst|frequency[16] .FeedbackMux = 1'b0;
  31712. defparam \macro_inst|cfg_reg_inst|frequency[16] .ShiftMux = 1'b0;
  31713. defparam \macro_inst|cfg_reg_inst|frequency[16] .BypassEn = 1'b0;
  31714. defparam \macro_inst|cfg_reg_inst|frequency[16] .CarryEnb = 1'b1;
  31715. alta_slice \macro_inst|cfg_reg_inst|frequency[17] (
  31716. .A(),
  31717. .B(),
  31718. .C(vcc),
  31719. .D(\rv32.mem_ahb_hwdata[17] ),
  31720. .Cin(),
  31721. .Qin(\macro_inst|cfg_reg_inst|frequency [17]),
  31722. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  31723. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  31724. .SyncReset(),
  31725. .ShiftData(),
  31726. .SyncLoad(),
  31727. .LutOut(\macro_inst|cfg_reg_inst|frequency[17]__feeder__LutOut ),
  31728. .Cout(),
  31729. .Q(\macro_inst|cfg_reg_inst|frequency [17]));
  31730. defparam \macro_inst|cfg_reg_inst|frequency[17] .coord_x = 16;
  31731. defparam \macro_inst|cfg_reg_inst|frequency[17] .coord_y = 10;
  31732. defparam \macro_inst|cfg_reg_inst|frequency[17] .coord_z = 6;
  31733. defparam \macro_inst|cfg_reg_inst|frequency[17] .mask = 16'hFF00;
  31734. defparam \macro_inst|cfg_reg_inst|frequency[17] .modeMux = 1'b1;
  31735. defparam \macro_inst|cfg_reg_inst|frequency[17] .FeedbackMux = 1'b0;
  31736. defparam \macro_inst|cfg_reg_inst|frequency[17] .ShiftMux = 1'b0;
  31737. defparam \macro_inst|cfg_reg_inst|frequency[17] .BypassEn = 1'b0;
  31738. defparam \macro_inst|cfg_reg_inst|frequency[17] .CarryEnb = 1'b1;
  31739. alta_slice \macro_inst|cfg_reg_inst|frequency[18] (
  31740. .A(),
  31741. .B(),
  31742. .C(vcc),
  31743. .D(\rv32.mem_ahb_hwdata[18] ),
  31744. .Cin(),
  31745. .Qin(\macro_inst|cfg_reg_inst|frequency [18]),
  31746. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  31747. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  31748. .SyncReset(),
  31749. .ShiftData(),
  31750. .SyncLoad(),
  31751. .LutOut(\macro_inst|cfg_reg_inst|frequency[18]__feeder__LutOut ),
  31752. .Cout(),
  31753. .Q(\macro_inst|cfg_reg_inst|frequency [18]));
  31754. defparam \macro_inst|cfg_reg_inst|frequency[18] .coord_x = 15;
  31755. defparam \macro_inst|cfg_reg_inst|frequency[18] .coord_y = 11;
  31756. defparam \macro_inst|cfg_reg_inst|frequency[18] .coord_z = 9;
  31757. defparam \macro_inst|cfg_reg_inst|frequency[18] .mask = 16'hFF00;
  31758. defparam \macro_inst|cfg_reg_inst|frequency[18] .modeMux = 1'b1;
  31759. defparam \macro_inst|cfg_reg_inst|frequency[18] .FeedbackMux = 1'b0;
  31760. defparam \macro_inst|cfg_reg_inst|frequency[18] .ShiftMux = 1'b0;
  31761. defparam \macro_inst|cfg_reg_inst|frequency[18] .BypassEn = 1'b0;
  31762. defparam \macro_inst|cfg_reg_inst|frequency[18] .CarryEnb = 1'b1;
  31763. alta_slice \macro_inst|cfg_reg_inst|frequency[19] (
  31764. .A(),
  31765. .B(),
  31766. .C(vcc),
  31767. .D(\rv32.mem_ahb_hwdata[19] ),
  31768. .Cin(),
  31769. .Qin(\macro_inst|cfg_reg_inst|frequency [19]),
  31770. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ),
  31771. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  31772. .SyncReset(),
  31773. .ShiftData(),
  31774. .SyncLoad(),
  31775. .LutOut(\macro_inst|cfg_reg_inst|frequency[19]__feeder__LutOut ),
  31776. .Cout(),
  31777. .Q(\macro_inst|cfg_reg_inst|frequency [19]));
  31778. defparam \macro_inst|cfg_reg_inst|frequency[19] .coord_x = 16;
  31779. defparam \macro_inst|cfg_reg_inst|frequency[19] .coord_y = 9;
  31780. defparam \macro_inst|cfg_reg_inst|frequency[19] .coord_z = 6;
  31781. defparam \macro_inst|cfg_reg_inst|frequency[19] .mask = 16'hFF00;
  31782. defparam \macro_inst|cfg_reg_inst|frequency[19] .modeMux = 1'b1;
  31783. defparam \macro_inst|cfg_reg_inst|frequency[19] .FeedbackMux = 1'b0;
  31784. defparam \macro_inst|cfg_reg_inst|frequency[19] .ShiftMux = 1'b0;
  31785. defparam \macro_inst|cfg_reg_inst|frequency[19] .BypassEn = 1'b0;
  31786. defparam \macro_inst|cfg_reg_inst|frequency[19] .CarryEnb = 1'b1;
  31787. alta_slice \macro_inst|cfg_reg_inst|frequency[1] (
  31788. .A(),
  31789. .B(),
  31790. .C(vcc),
  31791. .D(\rv32.mem_ahb_hwdata[1] ),
  31792. .Cin(),
  31793. .Qin(\macro_inst|cfg_reg_inst|frequency [1]),
  31794. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ),
  31795. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  31796. .SyncReset(),
  31797. .ShiftData(),
  31798. .SyncLoad(),
  31799. .LutOut(\macro_inst|cfg_reg_inst|frequency[1]__feeder__LutOut ),
  31800. .Cout(),
  31801. .Q(\macro_inst|cfg_reg_inst|frequency [1]));
  31802. defparam \macro_inst|cfg_reg_inst|frequency[1] .coord_x = 18;
  31803. defparam \macro_inst|cfg_reg_inst|frequency[1] .coord_y = 10;
  31804. defparam \macro_inst|cfg_reg_inst|frequency[1] .coord_z = 13;
  31805. defparam \macro_inst|cfg_reg_inst|frequency[1] .mask = 16'hFF00;
  31806. defparam \macro_inst|cfg_reg_inst|frequency[1] .modeMux = 1'b1;
  31807. defparam \macro_inst|cfg_reg_inst|frequency[1] .FeedbackMux = 1'b0;
  31808. defparam \macro_inst|cfg_reg_inst|frequency[1] .ShiftMux = 1'b0;
  31809. defparam \macro_inst|cfg_reg_inst|frequency[1] .BypassEn = 1'b0;
  31810. defparam \macro_inst|cfg_reg_inst|frequency[1] .CarryEnb = 1'b1;
  31811. alta_slice \macro_inst|cfg_reg_inst|frequency[20] (
  31812. .A(),
  31813. .B(),
  31814. .C(vcc),
  31815. .D(\rv32.mem_ahb_hwdata[20] ),
  31816. .Cin(),
  31817. .Qin(\macro_inst|cfg_reg_inst|frequency [20]),
  31818. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ),
  31819. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  31820. .SyncReset(),
  31821. .ShiftData(),
  31822. .SyncLoad(),
  31823. .LutOut(\macro_inst|cfg_reg_inst|frequency[20]__feeder__LutOut ),
  31824. .Cout(),
  31825. .Q(\macro_inst|cfg_reg_inst|frequency [20]));
  31826. defparam \macro_inst|cfg_reg_inst|frequency[20] .coord_x = 16;
  31827. defparam \macro_inst|cfg_reg_inst|frequency[20] .coord_y = 9;
  31828. defparam \macro_inst|cfg_reg_inst|frequency[20] .coord_z = 7;
  31829. defparam \macro_inst|cfg_reg_inst|frequency[20] .mask = 16'hFF00;
  31830. defparam \macro_inst|cfg_reg_inst|frequency[20] .modeMux = 1'b1;
  31831. defparam \macro_inst|cfg_reg_inst|frequency[20] .FeedbackMux = 1'b0;
  31832. defparam \macro_inst|cfg_reg_inst|frequency[20] .ShiftMux = 1'b0;
  31833. defparam \macro_inst|cfg_reg_inst|frequency[20] .BypassEn = 1'b0;
  31834. defparam \macro_inst|cfg_reg_inst|frequency[20] .CarryEnb = 1'b1;
  31835. alta_slice \macro_inst|cfg_reg_inst|frequency[21] (
  31836. .A(),
  31837. .B(),
  31838. .C(vcc),
  31839. .D(\rv32.mem_ahb_hwdata[21] ),
  31840. .Cin(),
  31841. .Qin(\macro_inst|cfg_reg_inst|frequency [21]),
  31842. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ),
  31843. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  31844. .SyncReset(),
  31845. .ShiftData(),
  31846. .SyncLoad(),
  31847. .LutOut(\macro_inst|cfg_reg_inst|frequency[21]__feeder__LutOut ),
  31848. .Cout(),
  31849. .Q(\macro_inst|cfg_reg_inst|frequency [21]));
  31850. defparam \macro_inst|cfg_reg_inst|frequency[21] .coord_x = 16;
  31851. defparam \macro_inst|cfg_reg_inst|frequency[21] .coord_y = 9;
  31852. defparam \macro_inst|cfg_reg_inst|frequency[21] .coord_z = 13;
  31853. defparam \macro_inst|cfg_reg_inst|frequency[21] .mask = 16'hFF00;
  31854. defparam \macro_inst|cfg_reg_inst|frequency[21] .modeMux = 1'b1;
  31855. defparam \macro_inst|cfg_reg_inst|frequency[21] .FeedbackMux = 1'b0;
  31856. defparam \macro_inst|cfg_reg_inst|frequency[21] .ShiftMux = 1'b0;
  31857. defparam \macro_inst|cfg_reg_inst|frequency[21] .BypassEn = 1'b0;
  31858. defparam \macro_inst|cfg_reg_inst|frequency[21] .CarryEnb = 1'b1;
  31859. alta_slice \macro_inst|cfg_reg_inst|frequency[22] (
  31860. .A(),
  31861. .B(),
  31862. .C(vcc),
  31863. .D(\rv32.mem_ahb_hwdata[22] ),
  31864. .Cin(),
  31865. .Qin(\macro_inst|cfg_reg_inst|frequency [22]),
  31866. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ),
  31867. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  31868. .SyncReset(),
  31869. .ShiftData(),
  31870. .SyncLoad(),
  31871. .LutOut(\macro_inst|cfg_reg_inst|frequency[22]__feeder__LutOut ),
  31872. .Cout(),
  31873. .Q(\macro_inst|cfg_reg_inst|frequency [22]));
  31874. defparam \macro_inst|cfg_reg_inst|frequency[22] .coord_x = 16;
  31875. defparam \macro_inst|cfg_reg_inst|frequency[22] .coord_y = 9;
  31876. defparam \macro_inst|cfg_reg_inst|frequency[22] .coord_z = 2;
  31877. defparam \macro_inst|cfg_reg_inst|frequency[22] .mask = 16'hFF00;
  31878. defparam \macro_inst|cfg_reg_inst|frequency[22] .modeMux = 1'b1;
  31879. defparam \macro_inst|cfg_reg_inst|frequency[22] .FeedbackMux = 1'b0;
  31880. defparam \macro_inst|cfg_reg_inst|frequency[22] .ShiftMux = 1'b0;
  31881. defparam \macro_inst|cfg_reg_inst|frequency[22] .BypassEn = 1'b0;
  31882. defparam \macro_inst|cfg_reg_inst|frequency[22] .CarryEnb = 1'b1;
  31883. alta_slice \macro_inst|cfg_reg_inst|frequency[23] (
  31884. .A(),
  31885. .B(),
  31886. .C(vcc),
  31887. .D(\rv32.mem_ahb_hwdata[23] ),
  31888. .Cin(),
  31889. .Qin(\macro_inst|cfg_reg_inst|frequency [23]),
  31890. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  31891. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  31892. .SyncReset(),
  31893. .ShiftData(),
  31894. .SyncLoad(),
  31895. .LutOut(\macro_inst|cfg_reg_inst|frequency[23]__feeder__LutOut ),
  31896. .Cout(),
  31897. .Q(\macro_inst|cfg_reg_inst|frequency [23]));
  31898. defparam \macro_inst|cfg_reg_inst|frequency[23] .coord_x = 15;
  31899. defparam \macro_inst|cfg_reg_inst|frequency[23] .coord_y = 11;
  31900. defparam \macro_inst|cfg_reg_inst|frequency[23] .coord_z = 10;
  31901. defparam \macro_inst|cfg_reg_inst|frequency[23] .mask = 16'hFF00;
  31902. defparam \macro_inst|cfg_reg_inst|frequency[23] .modeMux = 1'b1;
  31903. defparam \macro_inst|cfg_reg_inst|frequency[23] .FeedbackMux = 1'b0;
  31904. defparam \macro_inst|cfg_reg_inst|frequency[23] .ShiftMux = 1'b0;
  31905. defparam \macro_inst|cfg_reg_inst|frequency[23] .BypassEn = 1'b0;
  31906. defparam \macro_inst|cfg_reg_inst|frequency[23] .CarryEnb = 1'b1;
  31907. alta_slice \macro_inst|cfg_reg_inst|frequency[24] (
  31908. .A(),
  31909. .B(),
  31910. .C(vcc),
  31911. .D(\rv32.mem_ahb_hwdata[24] ),
  31912. .Cin(),
  31913. .Qin(\macro_inst|cfg_reg_inst|frequency [24]),
  31914. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y12_SIG_SIG ),
  31915. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  31916. .SyncReset(),
  31917. .ShiftData(),
  31918. .SyncLoad(),
  31919. .LutOut(\macro_inst|cfg_reg_inst|frequency[24]__feeder__LutOut ),
  31920. .Cout(),
  31921. .Q(\macro_inst|cfg_reg_inst|frequency [24]));
  31922. defparam \macro_inst|cfg_reg_inst|frequency[24] .coord_x = 16;
  31923. defparam \macro_inst|cfg_reg_inst|frequency[24] .coord_y = 9;
  31924. defparam \macro_inst|cfg_reg_inst|frequency[24] .coord_z = 10;
  31925. defparam \macro_inst|cfg_reg_inst|frequency[24] .mask = 16'hFF00;
  31926. defparam \macro_inst|cfg_reg_inst|frequency[24] .modeMux = 1'b1;
  31927. defparam \macro_inst|cfg_reg_inst|frequency[24] .FeedbackMux = 1'b0;
  31928. defparam \macro_inst|cfg_reg_inst|frequency[24] .ShiftMux = 1'b0;
  31929. defparam \macro_inst|cfg_reg_inst|frequency[24] .BypassEn = 1'b0;
  31930. defparam \macro_inst|cfg_reg_inst|frequency[24] .CarryEnb = 1'b1;
  31931. alta_slice \macro_inst|cfg_reg_inst|frequency[25] (
  31932. .A(),
  31933. .B(),
  31934. .C(vcc),
  31935. .D(\rv32.mem_ahb_hwdata[25] ),
  31936. .Cin(),
  31937. .Qin(\macro_inst|cfg_reg_inst|frequency [25]),
  31938. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  31939. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  31940. .SyncReset(),
  31941. .ShiftData(),
  31942. .SyncLoad(),
  31943. .LutOut(\macro_inst|cfg_reg_inst|frequency[25]__feeder__LutOut ),
  31944. .Cout(),
  31945. .Q(\macro_inst|cfg_reg_inst|frequency [25]));
  31946. defparam \macro_inst|cfg_reg_inst|frequency[25] .coord_x = 15;
  31947. defparam \macro_inst|cfg_reg_inst|frequency[25] .coord_y = 11;
  31948. defparam \macro_inst|cfg_reg_inst|frequency[25] .coord_z = 6;
  31949. defparam \macro_inst|cfg_reg_inst|frequency[25] .mask = 16'hFF00;
  31950. defparam \macro_inst|cfg_reg_inst|frequency[25] .modeMux = 1'b1;
  31951. defparam \macro_inst|cfg_reg_inst|frequency[25] .FeedbackMux = 1'b0;
  31952. defparam \macro_inst|cfg_reg_inst|frequency[25] .ShiftMux = 1'b0;
  31953. defparam \macro_inst|cfg_reg_inst|frequency[25] .BypassEn = 1'b0;
  31954. defparam \macro_inst|cfg_reg_inst|frequency[25] .CarryEnb = 1'b1;
  31955. alta_slice \macro_inst|cfg_reg_inst|frequency[26] (
  31956. .A(),
  31957. .B(),
  31958. .C(vcc),
  31959. .D(\rv32.mem_ahb_hwdata[26] ),
  31960. .Cin(),
  31961. .Qin(\macro_inst|cfg_reg_inst|frequency [26]),
  31962. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  31963. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  31964. .SyncReset(),
  31965. .ShiftData(),
  31966. .SyncLoad(),
  31967. .LutOut(\macro_inst|cfg_reg_inst|frequency[26]__feeder__LutOut ),
  31968. .Cout(),
  31969. .Q(\macro_inst|cfg_reg_inst|frequency [26]));
  31970. defparam \macro_inst|cfg_reg_inst|frequency[26] .coord_x = 14;
  31971. defparam \macro_inst|cfg_reg_inst|frequency[26] .coord_y = 9;
  31972. defparam \macro_inst|cfg_reg_inst|frequency[26] .coord_z = 0;
  31973. defparam \macro_inst|cfg_reg_inst|frequency[26] .mask = 16'hFF00;
  31974. defparam \macro_inst|cfg_reg_inst|frequency[26] .modeMux = 1'b1;
  31975. defparam \macro_inst|cfg_reg_inst|frequency[26] .FeedbackMux = 1'b0;
  31976. defparam \macro_inst|cfg_reg_inst|frequency[26] .ShiftMux = 1'b0;
  31977. defparam \macro_inst|cfg_reg_inst|frequency[26] .BypassEn = 1'b0;
  31978. defparam \macro_inst|cfg_reg_inst|frequency[26] .CarryEnb = 1'b1;
  31979. alta_slice \macro_inst|cfg_reg_inst|frequency[27] (
  31980. .A(),
  31981. .B(),
  31982. .C(vcc),
  31983. .D(\rv32.mem_ahb_hwdata[27] ),
  31984. .Cin(),
  31985. .Qin(\macro_inst|cfg_reg_inst|frequency [27]),
  31986. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  31987. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  31988. .SyncReset(),
  31989. .ShiftData(),
  31990. .SyncLoad(),
  31991. .LutOut(\macro_inst|cfg_reg_inst|frequency[27]__feeder__LutOut ),
  31992. .Cout(),
  31993. .Q(\macro_inst|cfg_reg_inst|frequency [27]));
  31994. defparam \macro_inst|cfg_reg_inst|frequency[27] .coord_x = 14;
  31995. defparam \macro_inst|cfg_reg_inst|frequency[27] .coord_y = 9;
  31996. defparam \macro_inst|cfg_reg_inst|frequency[27] .coord_z = 14;
  31997. defparam \macro_inst|cfg_reg_inst|frequency[27] .mask = 16'hFF00;
  31998. defparam \macro_inst|cfg_reg_inst|frequency[27] .modeMux = 1'b1;
  31999. defparam \macro_inst|cfg_reg_inst|frequency[27] .FeedbackMux = 1'b0;
  32000. defparam \macro_inst|cfg_reg_inst|frequency[27] .ShiftMux = 1'b0;
  32001. defparam \macro_inst|cfg_reg_inst|frequency[27] .BypassEn = 1'b0;
  32002. defparam \macro_inst|cfg_reg_inst|frequency[27] .CarryEnb = 1'b1;
  32003. alta_slice \macro_inst|cfg_reg_inst|frequency[28] (
  32004. .A(),
  32005. .B(),
  32006. .C(vcc),
  32007. .D(\rv32.mem_ahb_hwdata[28] ),
  32008. .Cin(),
  32009. .Qin(\macro_inst|cfg_reg_inst|frequency [28]),
  32010. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  32011. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32012. .SyncReset(),
  32013. .ShiftData(),
  32014. .SyncLoad(),
  32015. .LutOut(\macro_inst|cfg_reg_inst|frequency[28]__feeder__LutOut ),
  32016. .Cout(),
  32017. .Q(\macro_inst|cfg_reg_inst|frequency [28]));
  32018. defparam \macro_inst|cfg_reg_inst|frequency[28] .coord_x = 14;
  32019. defparam \macro_inst|cfg_reg_inst|frequency[28] .coord_y = 9;
  32020. defparam \macro_inst|cfg_reg_inst|frequency[28] .coord_z = 2;
  32021. defparam \macro_inst|cfg_reg_inst|frequency[28] .mask = 16'hFF00;
  32022. defparam \macro_inst|cfg_reg_inst|frequency[28] .modeMux = 1'b1;
  32023. defparam \macro_inst|cfg_reg_inst|frequency[28] .FeedbackMux = 1'b0;
  32024. defparam \macro_inst|cfg_reg_inst|frequency[28] .ShiftMux = 1'b0;
  32025. defparam \macro_inst|cfg_reg_inst|frequency[28] .BypassEn = 1'b0;
  32026. defparam \macro_inst|cfg_reg_inst|frequency[28] .CarryEnb = 1'b1;
  32027. alta_slice \macro_inst|cfg_reg_inst|frequency[29] (
  32028. .A(),
  32029. .B(),
  32030. .C(vcc),
  32031. .D(\rv32.mem_ahb_hwdata[29] ),
  32032. .Cin(),
  32033. .Qin(\macro_inst|cfg_reg_inst|frequency [29]),
  32034. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  32035. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32036. .SyncReset(),
  32037. .ShiftData(),
  32038. .SyncLoad(),
  32039. .LutOut(\macro_inst|cfg_reg_inst|frequency[29]__feeder__LutOut ),
  32040. .Cout(),
  32041. .Q(\macro_inst|cfg_reg_inst|frequency [29]));
  32042. defparam \macro_inst|cfg_reg_inst|frequency[29] .coord_x = 14;
  32043. defparam \macro_inst|cfg_reg_inst|frequency[29] .coord_y = 9;
  32044. defparam \macro_inst|cfg_reg_inst|frequency[29] .coord_z = 9;
  32045. defparam \macro_inst|cfg_reg_inst|frequency[29] .mask = 16'hFF00;
  32046. defparam \macro_inst|cfg_reg_inst|frequency[29] .modeMux = 1'b1;
  32047. defparam \macro_inst|cfg_reg_inst|frequency[29] .FeedbackMux = 1'b0;
  32048. defparam \macro_inst|cfg_reg_inst|frequency[29] .ShiftMux = 1'b0;
  32049. defparam \macro_inst|cfg_reg_inst|frequency[29] .BypassEn = 1'b0;
  32050. defparam \macro_inst|cfg_reg_inst|frequency[29] .CarryEnb = 1'b1;
  32051. alta_slice \macro_inst|cfg_reg_inst|frequency[2] (
  32052. .A(),
  32053. .B(),
  32054. .C(vcc),
  32055. .D(\rv32.mem_ahb_hwdata[2] ),
  32056. .Cin(),
  32057. .Qin(\macro_inst|cfg_reg_inst|frequency [2]),
  32058. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ),
  32059. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  32060. .SyncReset(),
  32061. .ShiftData(),
  32062. .SyncLoad(),
  32063. .LutOut(\macro_inst|cfg_reg_inst|frequency[2]__feeder__LutOut ),
  32064. .Cout(),
  32065. .Q(\macro_inst|cfg_reg_inst|frequency [2]));
  32066. defparam \macro_inst|cfg_reg_inst|frequency[2] .coord_x = 18;
  32067. defparam \macro_inst|cfg_reg_inst|frequency[2] .coord_y = 10;
  32068. defparam \macro_inst|cfg_reg_inst|frequency[2] .coord_z = 12;
  32069. defparam \macro_inst|cfg_reg_inst|frequency[2] .mask = 16'hFF00;
  32070. defparam \macro_inst|cfg_reg_inst|frequency[2] .modeMux = 1'b1;
  32071. defparam \macro_inst|cfg_reg_inst|frequency[2] .FeedbackMux = 1'b0;
  32072. defparam \macro_inst|cfg_reg_inst|frequency[2] .ShiftMux = 1'b0;
  32073. defparam \macro_inst|cfg_reg_inst|frequency[2] .BypassEn = 1'b0;
  32074. defparam \macro_inst|cfg_reg_inst|frequency[2] .CarryEnb = 1'b1;
  32075. alta_slice \macro_inst|cfg_reg_inst|frequency[30] (
  32076. .A(),
  32077. .B(),
  32078. .C(vcc),
  32079. .D(\rv32.mem_ahb_hwdata[30] ),
  32080. .Cin(),
  32081. .Qin(\macro_inst|cfg_reg_inst|frequency [30]),
  32082. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  32083. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32084. .SyncReset(),
  32085. .ShiftData(),
  32086. .SyncLoad(),
  32087. .LutOut(\macro_inst|cfg_reg_inst|frequency[30]__feeder__LutOut ),
  32088. .Cout(),
  32089. .Q(\macro_inst|cfg_reg_inst|frequency [30]));
  32090. defparam \macro_inst|cfg_reg_inst|frequency[30] .coord_x = 14;
  32091. defparam \macro_inst|cfg_reg_inst|frequency[30] .coord_y = 9;
  32092. defparam \macro_inst|cfg_reg_inst|frequency[30] .coord_z = 8;
  32093. defparam \macro_inst|cfg_reg_inst|frequency[30] .mask = 16'hFF00;
  32094. defparam \macro_inst|cfg_reg_inst|frequency[30] .modeMux = 1'b1;
  32095. defparam \macro_inst|cfg_reg_inst|frequency[30] .FeedbackMux = 1'b0;
  32096. defparam \macro_inst|cfg_reg_inst|frequency[30] .ShiftMux = 1'b0;
  32097. defparam \macro_inst|cfg_reg_inst|frequency[30] .BypassEn = 1'b0;
  32098. defparam \macro_inst|cfg_reg_inst|frequency[30] .CarryEnb = 1'b1;
  32099. alta_slice \macro_inst|cfg_reg_inst|frequency[31] (
  32100. .A(),
  32101. .B(),
  32102. .C(vcc),
  32103. .D(\rv32.mem_ahb_hwdata[31] ),
  32104. .Cin(),
  32105. .Qin(\macro_inst|cfg_reg_inst|frequency [31]),
  32106. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X57_Y10_SIG_SIG ),
  32107. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32108. .SyncReset(),
  32109. .ShiftData(),
  32110. .SyncLoad(),
  32111. .LutOut(\macro_inst|cfg_reg_inst|frequency[31]__feeder__LutOut ),
  32112. .Cout(),
  32113. .Q(\macro_inst|cfg_reg_inst|frequency [31]));
  32114. defparam \macro_inst|cfg_reg_inst|frequency[31] .coord_x = 14;
  32115. defparam \macro_inst|cfg_reg_inst|frequency[31] .coord_y = 9;
  32116. defparam \macro_inst|cfg_reg_inst|frequency[31] .coord_z = 1;
  32117. defparam \macro_inst|cfg_reg_inst|frequency[31] .mask = 16'hFF00;
  32118. defparam \macro_inst|cfg_reg_inst|frequency[31] .modeMux = 1'b1;
  32119. defparam \macro_inst|cfg_reg_inst|frequency[31] .FeedbackMux = 1'b0;
  32120. defparam \macro_inst|cfg_reg_inst|frequency[31] .ShiftMux = 1'b0;
  32121. defparam \macro_inst|cfg_reg_inst|frequency[31] .BypassEn = 1'b0;
  32122. defparam \macro_inst|cfg_reg_inst|frequency[31] .CarryEnb = 1'b1;
  32123. alta_slice \macro_inst|cfg_reg_inst|frequency[31]~0 (
  32124. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  32125. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  32126. .C(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  32127. .D(\macro_inst|cfg_reg_inst|always0~0_combout ),
  32128. .Cin(),
  32129. .Qin(),
  32130. .Clk(),
  32131. .AsyncReset(),
  32132. .SyncReset(),
  32133. .ShiftData(),
  32134. .SyncLoad(),
  32135. .LutOut(\macro_inst|cfg_reg_inst|frequency[31]~0_combout ),
  32136. .Cout(),
  32137. .Q());
  32138. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .coord_x = 14;
  32139. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .coord_y = 9;
  32140. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .coord_z = 5;
  32141. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .mask = 16'h2000;
  32142. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .modeMux = 1'b0;
  32143. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .FeedbackMux = 1'b0;
  32144. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .ShiftMux = 1'b0;
  32145. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .BypassEn = 1'b0;
  32146. defparam \macro_inst|cfg_reg_inst|frequency[31]~0 .CarryEnb = 1'b1;
  32147. alta_slice \macro_inst|cfg_reg_inst|frequency[3] (
  32148. .A(vcc),
  32149. .B(vcc),
  32150. .C(\rv32.mem_ahb_hwdata[3] ),
  32151. .D(vcc),
  32152. .Cin(),
  32153. .Qin(\macro_inst|cfg_reg_inst|frequency [3]),
  32154. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ),
  32155. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  32156. .SyncReset(),
  32157. .ShiftData(),
  32158. .SyncLoad(),
  32159. .LutOut(\macro_inst|cfg_reg_inst|frequency[3]~6_combout ),
  32160. .Cout(),
  32161. .Q(\macro_inst|cfg_reg_inst|frequency [3]));
  32162. defparam \macro_inst|cfg_reg_inst|frequency[3] .coord_x = 18;
  32163. defparam \macro_inst|cfg_reg_inst|frequency[3] .coord_y = 10;
  32164. defparam \macro_inst|cfg_reg_inst|frequency[3] .coord_z = 14;
  32165. defparam \macro_inst|cfg_reg_inst|frequency[3] .mask = 16'h0F0F;
  32166. defparam \macro_inst|cfg_reg_inst|frequency[3] .modeMux = 1'b0;
  32167. defparam \macro_inst|cfg_reg_inst|frequency[3] .FeedbackMux = 1'b0;
  32168. defparam \macro_inst|cfg_reg_inst|frequency[3] .ShiftMux = 1'b0;
  32169. defparam \macro_inst|cfg_reg_inst|frequency[3] .BypassEn = 1'b0;
  32170. defparam \macro_inst|cfg_reg_inst|frequency[3] .CarryEnb = 1'b1;
  32171. alta_slice \macro_inst|cfg_reg_inst|frequency[4] (
  32172. .A(),
  32173. .B(),
  32174. .C(vcc),
  32175. .D(\rv32.mem_ahb_hwdata[4] ),
  32176. .Cin(),
  32177. .Qin(\macro_inst|cfg_reg_inst|frequency [4]),
  32178. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y9_SIG_SIG ),
  32179. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  32180. .SyncReset(),
  32181. .ShiftData(),
  32182. .SyncLoad(),
  32183. .LutOut(\macro_inst|cfg_reg_inst|frequency[4]__feeder__LutOut ),
  32184. .Cout(),
  32185. .Q(\macro_inst|cfg_reg_inst|frequency [4]));
  32186. defparam \macro_inst|cfg_reg_inst|frequency[4] .coord_x = 17;
  32187. defparam \macro_inst|cfg_reg_inst|frequency[4] .coord_y = 10;
  32188. defparam \macro_inst|cfg_reg_inst|frequency[4] .coord_z = 12;
  32189. defparam \macro_inst|cfg_reg_inst|frequency[4] .mask = 16'hFF00;
  32190. defparam \macro_inst|cfg_reg_inst|frequency[4] .modeMux = 1'b1;
  32191. defparam \macro_inst|cfg_reg_inst|frequency[4] .FeedbackMux = 1'b0;
  32192. defparam \macro_inst|cfg_reg_inst|frequency[4] .ShiftMux = 1'b0;
  32193. defparam \macro_inst|cfg_reg_inst|frequency[4] .BypassEn = 1'b0;
  32194. defparam \macro_inst|cfg_reg_inst|frequency[4] .CarryEnb = 1'b1;
  32195. alta_slice \macro_inst|cfg_reg_inst|frequency[5] (
  32196. .A(vcc),
  32197. .B(vcc),
  32198. .C(\rv32.mem_ahb_hwdata[5] ),
  32199. .D(vcc),
  32200. .Cin(),
  32201. .Qin(\macro_inst|cfg_reg_inst|frequency [5]),
  32202. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  32203. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  32204. .SyncReset(),
  32205. .ShiftData(),
  32206. .SyncLoad(),
  32207. .LutOut(\macro_inst|cfg_reg_inst|frequency[5]~5_combout ),
  32208. .Cout(),
  32209. .Q(\macro_inst|cfg_reg_inst|frequency [5]));
  32210. defparam \macro_inst|cfg_reg_inst|frequency[5] .coord_x = 16;
  32211. defparam \macro_inst|cfg_reg_inst|frequency[5] .coord_y = 10;
  32212. defparam \macro_inst|cfg_reg_inst|frequency[5] .coord_z = 5;
  32213. defparam \macro_inst|cfg_reg_inst|frequency[5] .mask = 16'h0F0F;
  32214. defparam \macro_inst|cfg_reg_inst|frequency[5] .modeMux = 1'b0;
  32215. defparam \macro_inst|cfg_reg_inst|frequency[5] .FeedbackMux = 1'b0;
  32216. defparam \macro_inst|cfg_reg_inst|frequency[5] .ShiftMux = 1'b0;
  32217. defparam \macro_inst|cfg_reg_inst|frequency[5] .BypassEn = 1'b0;
  32218. defparam \macro_inst|cfg_reg_inst|frequency[5] .CarryEnb = 1'b1;
  32219. alta_slice \macro_inst|cfg_reg_inst|frequency[6] (
  32220. .A(vcc),
  32221. .B(vcc),
  32222. .C(\rv32.mem_ahb_hwdata[6] ),
  32223. .D(vcc),
  32224. .Cin(),
  32225. .Qin(\macro_inst|cfg_reg_inst|frequency [6]),
  32226. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ),
  32227. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  32228. .SyncReset(),
  32229. .ShiftData(),
  32230. .SyncLoad(),
  32231. .LutOut(\macro_inst|cfg_reg_inst|frequency[6]~4_combout ),
  32232. .Cout(),
  32233. .Q(\macro_inst|cfg_reg_inst|frequency [6]));
  32234. defparam \macro_inst|cfg_reg_inst|frequency[6] .coord_x = 18;
  32235. defparam \macro_inst|cfg_reg_inst|frequency[6] .coord_y = 10;
  32236. defparam \macro_inst|cfg_reg_inst|frequency[6] .coord_z = 2;
  32237. defparam \macro_inst|cfg_reg_inst|frequency[6] .mask = 16'h0F0F;
  32238. defparam \macro_inst|cfg_reg_inst|frequency[6] .modeMux = 1'b0;
  32239. defparam \macro_inst|cfg_reg_inst|frequency[6] .FeedbackMux = 1'b0;
  32240. defparam \macro_inst|cfg_reg_inst|frequency[6] .ShiftMux = 1'b0;
  32241. defparam \macro_inst|cfg_reg_inst|frequency[6] .BypassEn = 1'b0;
  32242. defparam \macro_inst|cfg_reg_inst|frequency[6] .CarryEnb = 1'b1;
  32243. alta_slice \macro_inst|cfg_reg_inst|frequency[7] (
  32244. .A(vcc),
  32245. .B(vcc),
  32246. .C(\rv32.mem_ahb_hwdata[7] ),
  32247. .D(vcc),
  32248. .Cin(),
  32249. .Qin(\macro_inst|cfg_reg_inst|frequency [7]),
  32250. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X59_Y11_SIG_SIG ),
  32251. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y11_SIG ),
  32252. .SyncReset(),
  32253. .ShiftData(),
  32254. .SyncLoad(),
  32255. .LutOut(\macro_inst|cfg_reg_inst|frequency[7]~3_combout ),
  32256. .Cout(),
  32257. .Q(\macro_inst|cfg_reg_inst|frequency [7]));
  32258. defparam \macro_inst|cfg_reg_inst|frequency[7] .coord_x = 18;
  32259. defparam \macro_inst|cfg_reg_inst|frequency[7] .coord_y = 10;
  32260. defparam \macro_inst|cfg_reg_inst|frequency[7] .coord_z = 10;
  32261. defparam \macro_inst|cfg_reg_inst|frequency[7] .mask = 16'h0F0F;
  32262. defparam \macro_inst|cfg_reg_inst|frequency[7] .modeMux = 1'b0;
  32263. defparam \macro_inst|cfg_reg_inst|frequency[7] .FeedbackMux = 1'b0;
  32264. defparam \macro_inst|cfg_reg_inst|frequency[7] .ShiftMux = 1'b0;
  32265. defparam \macro_inst|cfg_reg_inst|frequency[7] .BypassEn = 1'b0;
  32266. defparam \macro_inst|cfg_reg_inst|frequency[7] .CarryEnb = 1'b1;
  32267. alta_slice \macro_inst|cfg_reg_inst|frequency[8] (
  32268. .A(vcc),
  32269. .B(vcc),
  32270. .C(vcc),
  32271. .D(\rv32.mem_ahb_hwdata[8] ),
  32272. .Cin(),
  32273. .Qin(\macro_inst|cfg_reg_inst|frequency [8]),
  32274. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X58_Y9_SIG_SIG ),
  32275. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  32276. .SyncReset(),
  32277. .ShiftData(),
  32278. .SyncLoad(),
  32279. .LutOut(\macro_inst|cfg_reg_inst|frequency[8]~2_combout ),
  32280. .Cout(),
  32281. .Q(\macro_inst|cfg_reg_inst|frequency [8]));
  32282. defparam \macro_inst|cfg_reg_inst|frequency[8] .coord_x = 16;
  32283. defparam \macro_inst|cfg_reg_inst|frequency[8] .coord_y = 10;
  32284. defparam \macro_inst|cfg_reg_inst|frequency[8] .coord_z = 15;
  32285. defparam \macro_inst|cfg_reg_inst|frequency[8] .mask = 16'h00FF;
  32286. defparam \macro_inst|cfg_reg_inst|frequency[8] .modeMux = 1'b0;
  32287. defparam \macro_inst|cfg_reg_inst|frequency[8] .FeedbackMux = 1'b0;
  32288. defparam \macro_inst|cfg_reg_inst|frequency[8] .ShiftMux = 1'b0;
  32289. defparam \macro_inst|cfg_reg_inst|frequency[8] .BypassEn = 1'b0;
  32290. defparam \macro_inst|cfg_reg_inst|frequency[8] .CarryEnb = 1'b1;
  32291. alta_slice \macro_inst|cfg_reg_inst|frequency[9] (
  32292. .A(vcc),
  32293. .B(vcc),
  32294. .C(vcc),
  32295. .D(\rv32.mem_ahb_hwdata[9] ),
  32296. .Cin(),
  32297. .Qin(\macro_inst|cfg_reg_inst|frequency [9]),
  32298. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|frequency[31]~0_combout_X56_Y11_SIG_SIG ),
  32299. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y11_SIG ),
  32300. .SyncReset(),
  32301. .ShiftData(),
  32302. .SyncLoad(),
  32303. .LutOut(\macro_inst|cfg_reg_inst|frequency[9]~1_combout ),
  32304. .Cout(),
  32305. .Q(\macro_inst|cfg_reg_inst|frequency [9]));
  32306. defparam \macro_inst|cfg_reg_inst|frequency[9] .coord_x = 15;
  32307. defparam \macro_inst|cfg_reg_inst|frequency[9] .coord_y = 11;
  32308. defparam \macro_inst|cfg_reg_inst|frequency[9] .coord_z = 12;
  32309. defparam \macro_inst|cfg_reg_inst|frequency[9] .mask = 16'h00FF;
  32310. defparam \macro_inst|cfg_reg_inst|frequency[9] .modeMux = 1'b0;
  32311. defparam \macro_inst|cfg_reg_inst|frequency[9] .FeedbackMux = 1'b0;
  32312. defparam \macro_inst|cfg_reg_inst|frequency[9] .ShiftMux = 1'b0;
  32313. defparam \macro_inst|cfg_reg_inst|frequency[9] .BypassEn = 1'b0;
  32314. defparam \macro_inst|cfg_reg_inst|frequency[9] .CarryEnb = 1'b1;
  32315. alta_slice \macro_inst|cfg_reg_inst|max_vol[0] (
  32316. .A(vcc),
  32317. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [0]),
  32318. .C(\rv32.mem_ahb_hwdata[0] ),
  32319. .D(vcc),
  32320. .Cin(),
  32321. .Qin(\macro_inst|cfg_reg_inst|max_vol [0]),
  32322. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ),
  32323. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  32324. .SyncReset(SyncReset_X60_Y8_GND),
  32325. .ShiftData(),
  32326. .SyncLoad(SyncLoad_X60_Y8_VCC),
  32327. .LutOut(\macro_inst|trig_ctrl_inst|Add3~0_combout ),
  32328. .Cout(\macro_inst|trig_ctrl_inst|Add3~1 ),
  32329. .Q(\macro_inst|cfg_reg_inst|max_vol [0]));
  32330. defparam \macro_inst|cfg_reg_inst|max_vol[0] .coord_x = 19;
  32331. defparam \macro_inst|cfg_reg_inst|max_vol[0] .coord_y = 10;
  32332. defparam \macro_inst|cfg_reg_inst|max_vol[0] .coord_z = 8;
  32333. defparam \macro_inst|cfg_reg_inst|max_vol[0] .mask = 16'h33CC;
  32334. defparam \macro_inst|cfg_reg_inst|max_vol[0] .modeMux = 1'b0;
  32335. defparam \macro_inst|cfg_reg_inst|max_vol[0] .FeedbackMux = 1'b0;
  32336. defparam \macro_inst|cfg_reg_inst|max_vol[0] .ShiftMux = 1'b0;
  32337. defparam \macro_inst|cfg_reg_inst|max_vol[0] .BypassEn = 1'b1;
  32338. defparam \macro_inst|cfg_reg_inst|max_vol[0] .CarryEnb = 1'b0;
  32339. alta_slice \macro_inst|cfg_reg_inst|max_vol[1] (
  32340. .A(),
  32341. .B(),
  32342. .C(vcc),
  32343. .D(\rv32.mem_ahb_hwdata[1] ),
  32344. .Cin(),
  32345. .Qin(\macro_inst|cfg_reg_inst|max_vol [1]),
  32346. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X58_Y8_SIG_SIG ),
  32347. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  32348. .SyncReset(),
  32349. .ShiftData(),
  32350. .SyncLoad(),
  32351. .LutOut(\macro_inst|cfg_reg_inst|max_vol[1]__feeder__LutOut ),
  32352. .Cout(),
  32353. .Q(\macro_inst|cfg_reg_inst|max_vol [1]));
  32354. defparam \macro_inst|cfg_reg_inst|max_vol[1] .coord_x = 16;
  32355. defparam \macro_inst|cfg_reg_inst|max_vol[1] .coord_y = 6;
  32356. defparam \macro_inst|cfg_reg_inst|max_vol[1] .coord_z = 8;
  32357. defparam \macro_inst|cfg_reg_inst|max_vol[1] .mask = 16'hFF00;
  32358. defparam \macro_inst|cfg_reg_inst|max_vol[1] .modeMux = 1'b1;
  32359. defparam \macro_inst|cfg_reg_inst|max_vol[1] .FeedbackMux = 1'b0;
  32360. defparam \macro_inst|cfg_reg_inst|max_vol[1] .ShiftMux = 1'b0;
  32361. defparam \macro_inst|cfg_reg_inst|max_vol[1] .BypassEn = 1'b0;
  32362. defparam \macro_inst|cfg_reg_inst|max_vol[1] .CarryEnb = 1'b1;
  32363. alta_slice \macro_inst|cfg_reg_inst|max_vol[2] (
  32364. .A(vcc),
  32365. .B(vcc),
  32366. .C(\rv32.mem_ahb_hwdata[2] ),
  32367. .D(vcc),
  32368. .Cin(),
  32369. .Qin(\macro_inst|cfg_reg_inst|max_vol [2]),
  32370. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ),
  32371. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  32372. .SyncReset(),
  32373. .ShiftData(),
  32374. .SyncLoad(),
  32375. .LutOut(\macro_inst|cfg_reg_inst|max_vol[2]~3_combout ),
  32376. .Cout(),
  32377. .Q(\macro_inst|cfg_reg_inst|max_vol [2]));
  32378. defparam \macro_inst|cfg_reg_inst|max_vol[2] .coord_x = 19;
  32379. defparam \macro_inst|cfg_reg_inst|max_vol[2] .coord_y = 10;
  32380. defparam \macro_inst|cfg_reg_inst|max_vol[2] .coord_z = 4;
  32381. defparam \macro_inst|cfg_reg_inst|max_vol[2] .mask = 16'h0F0F;
  32382. defparam \macro_inst|cfg_reg_inst|max_vol[2] .modeMux = 1'b0;
  32383. defparam \macro_inst|cfg_reg_inst|max_vol[2] .FeedbackMux = 1'b0;
  32384. defparam \macro_inst|cfg_reg_inst|max_vol[2] .ShiftMux = 1'b0;
  32385. defparam \macro_inst|cfg_reg_inst|max_vol[2] .BypassEn = 1'b0;
  32386. defparam \macro_inst|cfg_reg_inst|max_vol[2] .CarryEnb = 1'b1;
  32387. alta_slice \macro_inst|cfg_reg_inst|max_vol[3] (
  32388. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [3]),
  32389. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  32390. .C(\rv32.mem_ahb_hwdata[3] ),
  32391. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  32392. .Cin(),
  32393. .Qin(\macro_inst|cfg_reg_inst|max_vol [3]),
  32394. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ),
  32395. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  32396. .SyncReset(SyncReset_X60_Y8_GND),
  32397. .ShiftData(),
  32398. .SyncLoad(SyncLoad_X60_Y8_VCC),
  32399. .LutOut(\macro_inst|cfg_reg_inst|Selector22~1_combout ),
  32400. .Cout(),
  32401. .Q(\macro_inst|cfg_reg_inst|max_vol [3]));
  32402. defparam \macro_inst|cfg_reg_inst|max_vol[3] .coord_x = 19;
  32403. defparam \macro_inst|cfg_reg_inst|max_vol[3] .coord_y = 10;
  32404. defparam \macro_inst|cfg_reg_inst|max_vol[3] .coord_z = 3;
  32405. defparam \macro_inst|cfg_reg_inst|max_vol[3] .mask = 16'hF444;
  32406. defparam \macro_inst|cfg_reg_inst|max_vol[3] .modeMux = 1'b0;
  32407. defparam \macro_inst|cfg_reg_inst|max_vol[3] .FeedbackMux = 1'b1;
  32408. defparam \macro_inst|cfg_reg_inst|max_vol[3] .ShiftMux = 1'b0;
  32409. defparam \macro_inst|cfg_reg_inst|max_vol[3] .BypassEn = 1'b1;
  32410. defparam \macro_inst|cfg_reg_inst|max_vol[3] .CarryEnb = 1'b1;
  32411. alta_slice \macro_inst|cfg_reg_inst|max_vol[4] (
  32412. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [4]),
  32413. .B(vcc),
  32414. .C(\rv32.mem_ahb_hwdata[4] ),
  32415. .D(vcc),
  32416. .Cin(\macro_inst|trig_ctrl_inst|Add3~7 ),
  32417. .Qin(\macro_inst|cfg_reg_inst|max_vol [4]),
  32418. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ),
  32419. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  32420. .SyncReset(SyncReset_X60_Y8_GND),
  32421. .ShiftData(),
  32422. .SyncLoad(SyncLoad_X60_Y8_VCC),
  32423. .LutOut(\macro_inst|trig_ctrl_inst|Add3~8_combout ),
  32424. .Cout(\macro_inst|trig_ctrl_inst|Add3~9 ),
  32425. .Q(\macro_inst|cfg_reg_inst|max_vol [4]));
  32426. defparam \macro_inst|cfg_reg_inst|max_vol[4] .coord_x = 19;
  32427. defparam \macro_inst|cfg_reg_inst|max_vol[4] .coord_y = 10;
  32428. defparam \macro_inst|cfg_reg_inst|max_vol[4] .coord_z = 12;
  32429. defparam \macro_inst|cfg_reg_inst|max_vol[4] .mask = 16'h5AAF;
  32430. defparam \macro_inst|cfg_reg_inst|max_vol[4] .modeMux = 1'b1;
  32431. defparam \macro_inst|cfg_reg_inst|max_vol[4] .FeedbackMux = 1'b0;
  32432. defparam \macro_inst|cfg_reg_inst|max_vol[4] .ShiftMux = 1'b0;
  32433. defparam \macro_inst|cfg_reg_inst|max_vol[4] .BypassEn = 1'b1;
  32434. defparam \macro_inst|cfg_reg_inst|max_vol[4] .CarryEnb = 1'b0;
  32435. alta_slice \macro_inst|cfg_reg_inst|max_vol[5] (
  32436. .A(\macro_inst|apb_dac0_inst|max_vol_r [8]),
  32437. .B(\macro_inst|apb_dac0_inst|Mult2|auto_generated|mac_mult1|auto_generated|mult1|op_5~34_combout ),
  32438. .C(\rv32.mem_ahb_hwdata[5] ),
  32439. .D(vcc),
  32440. .Cin(\macro_inst|apb_dac0_inst|LessThan0~15_cout ),
  32441. .Qin(\macro_inst|cfg_reg_inst|max_vol [5]),
  32442. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y9_SIG_SIG ),
  32443. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  32444. .SyncReset(SyncReset_X57_Y9_GND),
  32445. .ShiftData(),
  32446. .SyncLoad(SyncLoad_X57_Y9_VCC),
  32447. .LutOut(),
  32448. .Cout(\macro_inst|apb_dac0_inst|LessThan0~17_cout ),
  32449. .Q(\macro_inst|cfg_reg_inst|max_vol [5]));
  32450. defparam \macro_inst|cfg_reg_inst|max_vol[5] .coord_x = 14;
  32451. defparam \macro_inst|cfg_reg_inst|max_vol[5] .coord_y = 6;
  32452. defparam \macro_inst|cfg_reg_inst|max_vol[5] .coord_z = 12;
  32453. defparam \macro_inst|cfg_reg_inst|max_vol[5] .mask = 16'h002B;
  32454. defparam \macro_inst|cfg_reg_inst|max_vol[5] .modeMux = 1'b1;
  32455. defparam \macro_inst|cfg_reg_inst|max_vol[5] .FeedbackMux = 1'b0;
  32456. defparam \macro_inst|cfg_reg_inst|max_vol[5] .ShiftMux = 1'b0;
  32457. defparam \macro_inst|cfg_reg_inst|max_vol[5] .BypassEn = 1'b1;
  32458. defparam \macro_inst|cfg_reg_inst|max_vol[5] .CarryEnb = 1'b0;
  32459. alta_slice \macro_inst|cfg_reg_inst|max_vol[6] (
  32460. .A(vcc),
  32461. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [6]),
  32462. .C(\rv32.mem_ahb_hwdata[6] ),
  32463. .D(vcc),
  32464. .Cin(\macro_inst|trig_ctrl_inst|Add3~11 ),
  32465. .Qin(\macro_inst|cfg_reg_inst|max_vol [6]),
  32466. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X60_Y8_SIG_SIG ),
  32467. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  32468. .SyncReset(SyncReset_X60_Y8_GND),
  32469. .ShiftData(),
  32470. .SyncLoad(SyncLoad_X60_Y8_VCC),
  32471. .LutOut(\macro_inst|trig_ctrl_inst|Add3~12_combout ),
  32472. .Cout(\macro_inst|trig_ctrl_inst|Add3~13 ),
  32473. .Q(\macro_inst|cfg_reg_inst|max_vol [6]));
  32474. defparam \macro_inst|cfg_reg_inst|max_vol[6] .coord_x = 19;
  32475. defparam \macro_inst|cfg_reg_inst|max_vol[6] .coord_y = 10;
  32476. defparam \macro_inst|cfg_reg_inst|max_vol[6] .coord_z = 14;
  32477. defparam \macro_inst|cfg_reg_inst|max_vol[6] .mask = 16'h3CCF;
  32478. defparam \macro_inst|cfg_reg_inst|max_vol[6] .modeMux = 1'b1;
  32479. defparam \macro_inst|cfg_reg_inst|max_vol[6] .FeedbackMux = 1'b0;
  32480. defparam \macro_inst|cfg_reg_inst|max_vol[6] .ShiftMux = 1'b0;
  32481. defparam \macro_inst|cfg_reg_inst|max_vol[6] .BypassEn = 1'b1;
  32482. defparam \macro_inst|cfg_reg_inst|max_vol[6] .CarryEnb = 1'b0;
  32483. alta_slice \macro_inst|cfg_reg_inst|max_vol[7] (
  32484. .A(vcc),
  32485. .B(vcc),
  32486. .C(vcc),
  32487. .D(\rv32.mem_ahb_hwdata[7] ),
  32488. .Cin(),
  32489. .Qin(\macro_inst|cfg_reg_inst|max_vol [7]),
  32490. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32491. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32492. .SyncReset(),
  32493. .ShiftData(),
  32494. .SyncLoad(),
  32495. .LutOut(\macro_inst|cfg_reg_inst|max_vol[7]~2_combout ),
  32496. .Cout(),
  32497. .Q(\macro_inst|cfg_reg_inst|max_vol [7]));
  32498. defparam \macro_inst|cfg_reg_inst|max_vol[7] .coord_x = 16;
  32499. defparam \macro_inst|cfg_reg_inst|max_vol[7] .coord_y = 11;
  32500. defparam \macro_inst|cfg_reg_inst|max_vol[7] .coord_z = 13;
  32501. defparam \macro_inst|cfg_reg_inst|max_vol[7] .mask = 16'h00FF;
  32502. defparam \macro_inst|cfg_reg_inst|max_vol[7] .modeMux = 1'b0;
  32503. defparam \macro_inst|cfg_reg_inst|max_vol[7] .FeedbackMux = 1'b0;
  32504. defparam \macro_inst|cfg_reg_inst|max_vol[7] .ShiftMux = 1'b0;
  32505. defparam \macro_inst|cfg_reg_inst|max_vol[7] .BypassEn = 1'b0;
  32506. defparam \macro_inst|cfg_reg_inst|max_vol[7] .CarryEnb = 1'b1;
  32507. alta_slice \macro_inst|cfg_reg_inst|max_vol[8] (
  32508. .A(vcc),
  32509. .B(vcc),
  32510. .C(vcc),
  32511. .D(\rv32.mem_ahb_hwdata[8] ),
  32512. .Cin(),
  32513. .Qin(\macro_inst|cfg_reg_inst|max_vol [8]),
  32514. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y9_SIG_SIG ),
  32515. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  32516. .SyncReset(),
  32517. .ShiftData(),
  32518. .SyncLoad(),
  32519. .LutOut(\macro_inst|cfg_reg_inst|max_vol[8]~1_combout ),
  32520. .Cout(),
  32521. .Q(\macro_inst|cfg_reg_inst|max_vol [8]));
  32522. defparam \macro_inst|cfg_reg_inst|max_vol[8] .coord_x = 14;
  32523. defparam \macro_inst|cfg_reg_inst|max_vol[8] .coord_y = 6;
  32524. defparam \macro_inst|cfg_reg_inst|max_vol[8] .coord_z = 1;
  32525. defparam \macro_inst|cfg_reg_inst|max_vol[8] .mask = 16'h00FF;
  32526. defparam \macro_inst|cfg_reg_inst|max_vol[8] .modeMux = 1'b0;
  32527. defparam \macro_inst|cfg_reg_inst|max_vol[8] .FeedbackMux = 1'b0;
  32528. defparam \macro_inst|cfg_reg_inst|max_vol[8] .ShiftMux = 1'b0;
  32529. defparam \macro_inst|cfg_reg_inst|max_vol[8] .BypassEn = 1'b0;
  32530. defparam \macro_inst|cfg_reg_inst|max_vol[8] .CarryEnb = 1'b1;
  32531. alta_slice \macro_inst|cfg_reg_inst|max_vol[9] (
  32532. .A(vcc),
  32533. .B(vcc),
  32534. .C(vcc),
  32535. .D(\rv32.mem_ahb_hwdata[9] ),
  32536. .Cin(),
  32537. .Qin(\macro_inst|cfg_reg_inst|max_vol [9]),
  32538. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32539. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32540. .SyncReset(),
  32541. .ShiftData(),
  32542. .SyncLoad(),
  32543. .LutOut(\macro_inst|cfg_reg_inst|max_vol[9]~0_combout ),
  32544. .Cout(),
  32545. .Q(\macro_inst|cfg_reg_inst|max_vol [9]));
  32546. defparam \macro_inst|cfg_reg_inst|max_vol[9] .coord_x = 16;
  32547. defparam \macro_inst|cfg_reg_inst|max_vol[9] .coord_y = 11;
  32548. defparam \macro_inst|cfg_reg_inst|max_vol[9] .coord_z = 7;
  32549. defparam \macro_inst|cfg_reg_inst|max_vol[9] .mask = 16'h00FF;
  32550. defparam \macro_inst|cfg_reg_inst|max_vol[9] .modeMux = 1'b0;
  32551. defparam \macro_inst|cfg_reg_inst|max_vol[9] .FeedbackMux = 1'b0;
  32552. defparam \macro_inst|cfg_reg_inst|max_vol[9] .ShiftMux = 1'b0;
  32553. defparam \macro_inst|cfg_reg_inst|max_vol[9] .BypassEn = 1'b0;
  32554. defparam \macro_inst|cfg_reg_inst|max_vol[9] .CarryEnb = 1'b1;
  32555. alta_slice \macro_inst|cfg_reg_inst|min_vol[0] (
  32556. .A(),
  32557. .B(),
  32558. .C(vcc),
  32559. .D(\rv32.mem_ahb_hwdata[16] ),
  32560. .Cin(),
  32561. .Qin(\macro_inst|cfg_reg_inst|min_vol [0]),
  32562. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32563. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32564. .SyncReset(),
  32565. .ShiftData(),
  32566. .SyncLoad(),
  32567. .LutOut(\macro_inst|cfg_reg_inst|min_vol[0]__feeder__LutOut ),
  32568. .Cout(),
  32569. .Q(\macro_inst|cfg_reg_inst|min_vol [0]));
  32570. defparam \macro_inst|cfg_reg_inst|min_vol[0] .coord_x = 16;
  32571. defparam \macro_inst|cfg_reg_inst|min_vol[0] .coord_y = 11;
  32572. defparam \macro_inst|cfg_reg_inst|min_vol[0] .coord_z = 15;
  32573. defparam \macro_inst|cfg_reg_inst|min_vol[0] .mask = 16'hFF00;
  32574. defparam \macro_inst|cfg_reg_inst|min_vol[0] .modeMux = 1'b1;
  32575. defparam \macro_inst|cfg_reg_inst|min_vol[0] .FeedbackMux = 1'b0;
  32576. defparam \macro_inst|cfg_reg_inst|min_vol[0] .ShiftMux = 1'b0;
  32577. defparam \macro_inst|cfg_reg_inst|min_vol[0] .BypassEn = 1'b0;
  32578. defparam \macro_inst|cfg_reg_inst|min_vol[0] .CarryEnb = 1'b1;
  32579. alta_slice \macro_inst|cfg_reg_inst|min_vol[0]~0 (
  32580. .A(\macro_inst|cfg_reg_inst|always0~0_combout ),
  32581. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  32582. .C(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  32583. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  32584. .Cin(),
  32585. .Qin(),
  32586. .Clk(),
  32587. .AsyncReset(),
  32588. .SyncReset(),
  32589. .ShiftData(),
  32590. .SyncLoad(),
  32591. .LutOut(\macro_inst|cfg_reg_inst|min_vol[0]~0_combout ),
  32592. .Cout(),
  32593. .Q());
  32594. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .coord_x = 16;
  32595. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .coord_y = 11;
  32596. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .coord_z = 12;
  32597. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .mask = 16'h2000;
  32598. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .modeMux = 1'b0;
  32599. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .FeedbackMux = 1'b0;
  32600. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .ShiftMux = 1'b0;
  32601. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .BypassEn = 1'b0;
  32602. defparam \macro_inst|cfg_reg_inst|min_vol[0]~0 .CarryEnb = 1'b1;
  32603. alta_slice \macro_inst|cfg_reg_inst|min_vol[1] (
  32604. .A(),
  32605. .B(),
  32606. .C(vcc),
  32607. .D(\rv32.mem_ahb_hwdata[17] ),
  32608. .Cin(),
  32609. .Qin(\macro_inst|cfg_reg_inst|min_vol [1]),
  32610. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X58_Y8_SIG_SIG ),
  32611. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  32612. .SyncReset(),
  32613. .ShiftData(),
  32614. .SyncLoad(),
  32615. .LutOut(\macro_inst|cfg_reg_inst|min_vol[1]__feeder__LutOut ),
  32616. .Cout(),
  32617. .Q(\macro_inst|cfg_reg_inst|min_vol [1]));
  32618. defparam \macro_inst|cfg_reg_inst|min_vol[1] .coord_x = 16;
  32619. defparam \macro_inst|cfg_reg_inst|min_vol[1] .coord_y = 6;
  32620. defparam \macro_inst|cfg_reg_inst|min_vol[1] .coord_z = 15;
  32621. defparam \macro_inst|cfg_reg_inst|min_vol[1] .mask = 16'hFF00;
  32622. defparam \macro_inst|cfg_reg_inst|min_vol[1] .modeMux = 1'b1;
  32623. defparam \macro_inst|cfg_reg_inst|min_vol[1] .FeedbackMux = 1'b0;
  32624. defparam \macro_inst|cfg_reg_inst|min_vol[1] .ShiftMux = 1'b0;
  32625. defparam \macro_inst|cfg_reg_inst|min_vol[1] .BypassEn = 1'b0;
  32626. defparam \macro_inst|cfg_reg_inst|min_vol[1] .CarryEnb = 1'b1;
  32627. alta_slice \macro_inst|cfg_reg_inst|min_vol[2] (
  32628. .A(vcc),
  32629. .B(vcc),
  32630. .C(\rv32.mem_ahb_hwdata[18] ),
  32631. .D(vcc),
  32632. .Cin(),
  32633. .Qin(\macro_inst|cfg_reg_inst|min_vol [2]),
  32634. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32635. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32636. .SyncReset(),
  32637. .ShiftData(),
  32638. .SyncLoad(),
  32639. .LutOut(\macro_inst|cfg_reg_inst|min_vol[2]~1_combout ),
  32640. .Cout(),
  32641. .Q(\macro_inst|cfg_reg_inst|min_vol [2]));
  32642. defparam \macro_inst|cfg_reg_inst|min_vol[2] .coord_x = 16;
  32643. defparam \macro_inst|cfg_reg_inst|min_vol[2] .coord_y = 11;
  32644. defparam \macro_inst|cfg_reg_inst|min_vol[2] .coord_z = 8;
  32645. defparam \macro_inst|cfg_reg_inst|min_vol[2] .mask = 16'h0F0F;
  32646. defparam \macro_inst|cfg_reg_inst|min_vol[2] .modeMux = 1'b0;
  32647. defparam \macro_inst|cfg_reg_inst|min_vol[2] .FeedbackMux = 1'b0;
  32648. defparam \macro_inst|cfg_reg_inst|min_vol[2] .ShiftMux = 1'b0;
  32649. defparam \macro_inst|cfg_reg_inst|min_vol[2] .BypassEn = 1'b0;
  32650. defparam \macro_inst|cfg_reg_inst|min_vol[2] .CarryEnb = 1'b1;
  32651. alta_slice \macro_inst|cfg_reg_inst|min_vol[3] (
  32652. .A(),
  32653. .B(),
  32654. .C(vcc),
  32655. .D(\rv32.mem_ahb_hwdata[19] ),
  32656. .Cin(),
  32657. .Qin(\macro_inst|cfg_reg_inst|min_vol [3]),
  32658. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32659. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32660. .SyncReset(),
  32661. .ShiftData(),
  32662. .SyncLoad(),
  32663. .LutOut(\macro_inst|cfg_reg_inst|min_vol[3]__feeder__LutOut ),
  32664. .Cout(),
  32665. .Q(\macro_inst|cfg_reg_inst|min_vol [3]));
  32666. defparam \macro_inst|cfg_reg_inst|min_vol[3] .coord_x = 16;
  32667. defparam \macro_inst|cfg_reg_inst|min_vol[3] .coord_y = 11;
  32668. defparam \macro_inst|cfg_reg_inst|min_vol[3] .coord_z = 10;
  32669. defparam \macro_inst|cfg_reg_inst|min_vol[3] .mask = 16'hFF00;
  32670. defparam \macro_inst|cfg_reg_inst|min_vol[3] .modeMux = 1'b1;
  32671. defparam \macro_inst|cfg_reg_inst|min_vol[3] .FeedbackMux = 1'b0;
  32672. defparam \macro_inst|cfg_reg_inst|min_vol[3] .ShiftMux = 1'b0;
  32673. defparam \macro_inst|cfg_reg_inst|min_vol[3] .BypassEn = 1'b0;
  32674. defparam \macro_inst|cfg_reg_inst|min_vol[3] .CarryEnb = 1'b1;
  32675. alta_slice \macro_inst|cfg_reg_inst|min_vol[4] (
  32676. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  32677. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  32678. .C(\rv32.mem_ahb_hwdata[20] ),
  32679. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  32680. .Cin(),
  32681. .Qin(\macro_inst|cfg_reg_inst|min_vol [4]),
  32682. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32683. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32684. .SyncReset(SyncReset_X57_Y11_GND),
  32685. .ShiftData(),
  32686. .SyncLoad(SyncLoad_X57_Y11_VCC),
  32687. .LutOut(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  32688. .Cout(),
  32689. .Q(\macro_inst|cfg_reg_inst|min_vol [4]));
  32690. defparam \macro_inst|cfg_reg_inst|min_vol[4] .coord_x = 16;
  32691. defparam \macro_inst|cfg_reg_inst|min_vol[4] .coord_y = 11;
  32692. defparam \macro_inst|cfg_reg_inst|min_vol[4] .coord_z = 5;
  32693. defparam \macro_inst|cfg_reg_inst|min_vol[4] .mask = 16'h4400;
  32694. defparam \macro_inst|cfg_reg_inst|min_vol[4] .modeMux = 1'b0;
  32695. defparam \macro_inst|cfg_reg_inst|min_vol[4] .FeedbackMux = 1'b0;
  32696. defparam \macro_inst|cfg_reg_inst|min_vol[4] .ShiftMux = 1'b0;
  32697. defparam \macro_inst|cfg_reg_inst|min_vol[4] .BypassEn = 1'b1;
  32698. defparam \macro_inst|cfg_reg_inst|min_vol[4] .CarryEnb = 1'b1;
  32699. alta_slice \macro_inst|cfg_reg_inst|min_vol[5] (
  32700. .A(vcc),
  32701. .B(vcc),
  32702. .C(vcc),
  32703. .D(\rv32.mem_ahb_hwdata[21] ),
  32704. .Cin(),
  32705. .Qin(\macro_inst|cfg_reg_inst|min_vol [5]),
  32706. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y12_SIG_SIG ),
  32707. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  32708. .SyncReset(),
  32709. .ShiftData(),
  32710. .SyncLoad(),
  32711. .LutOut(\macro_inst|cfg_reg_inst|min_vol[5]~2_combout ),
  32712. .Cout(),
  32713. .Q(\macro_inst|cfg_reg_inst|min_vol [5]));
  32714. defparam \macro_inst|cfg_reg_inst|min_vol[5] .coord_x = 16;
  32715. defparam \macro_inst|cfg_reg_inst|min_vol[5] .coord_y = 9;
  32716. defparam \macro_inst|cfg_reg_inst|min_vol[5] .coord_z = 12;
  32717. defparam \macro_inst|cfg_reg_inst|min_vol[5] .mask = 16'h00FF;
  32718. defparam \macro_inst|cfg_reg_inst|min_vol[5] .modeMux = 1'b0;
  32719. defparam \macro_inst|cfg_reg_inst|min_vol[5] .FeedbackMux = 1'b0;
  32720. defparam \macro_inst|cfg_reg_inst|min_vol[5] .ShiftMux = 1'b0;
  32721. defparam \macro_inst|cfg_reg_inst|min_vol[5] .BypassEn = 1'b0;
  32722. defparam \macro_inst|cfg_reg_inst|min_vol[5] .CarryEnb = 1'b1;
  32723. alta_slice \macro_inst|cfg_reg_inst|min_vol[6] (
  32724. .A(vcc),
  32725. .B(vcc),
  32726. .C(vcc),
  32727. .D(\rv32.mem_ahb_hwdata[22] ),
  32728. .Cin(),
  32729. .Qin(\macro_inst|cfg_reg_inst|min_vol [6]),
  32730. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y12_SIG_SIG ),
  32731. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  32732. .SyncReset(),
  32733. .ShiftData(),
  32734. .SyncLoad(),
  32735. .LutOut(\macro_inst|cfg_reg_inst|min_vol[6]~3_combout ),
  32736. .Cout(),
  32737. .Q(\macro_inst|cfg_reg_inst|min_vol [6]));
  32738. defparam \macro_inst|cfg_reg_inst|min_vol[6] .coord_x = 16;
  32739. defparam \macro_inst|cfg_reg_inst|min_vol[6] .coord_y = 9;
  32740. defparam \macro_inst|cfg_reg_inst|min_vol[6] .coord_z = 14;
  32741. defparam \macro_inst|cfg_reg_inst|min_vol[6] .mask = 16'h00FF;
  32742. defparam \macro_inst|cfg_reg_inst|min_vol[6] .modeMux = 1'b0;
  32743. defparam \macro_inst|cfg_reg_inst|min_vol[6] .FeedbackMux = 1'b0;
  32744. defparam \macro_inst|cfg_reg_inst|min_vol[6] .ShiftMux = 1'b0;
  32745. defparam \macro_inst|cfg_reg_inst|min_vol[6] .BypassEn = 1'b0;
  32746. defparam \macro_inst|cfg_reg_inst|min_vol[6] .CarryEnb = 1'b1;
  32747. alta_slice \macro_inst|cfg_reg_inst|min_vol[7] (
  32748. .A(),
  32749. .B(),
  32750. .C(vcc),
  32751. .D(\rv32.mem_ahb_hwdata[23] ),
  32752. .Cin(),
  32753. .Qin(\macro_inst|cfg_reg_inst|min_vol [7]),
  32754. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32755. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32756. .SyncReset(),
  32757. .ShiftData(),
  32758. .SyncLoad(),
  32759. .LutOut(\macro_inst|cfg_reg_inst|min_vol[7]__feeder__LutOut ),
  32760. .Cout(),
  32761. .Q(\macro_inst|cfg_reg_inst|min_vol [7]));
  32762. defparam \macro_inst|cfg_reg_inst|min_vol[7] .coord_x = 16;
  32763. defparam \macro_inst|cfg_reg_inst|min_vol[7] .coord_y = 11;
  32764. defparam \macro_inst|cfg_reg_inst|min_vol[7] .coord_z = 9;
  32765. defparam \macro_inst|cfg_reg_inst|min_vol[7] .mask = 16'hFF00;
  32766. defparam \macro_inst|cfg_reg_inst|min_vol[7] .modeMux = 1'b1;
  32767. defparam \macro_inst|cfg_reg_inst|min_vol[7] .FeedbackMux = 1'b0;
  32768. defparam \macro_inst|cfg_reg_inst|min_vol[7] .ShiftMux = 1'b0;
  32769. defparam \macro_inst|cfg_reg_inst|min_vol[7] .BypassEn = 1'b0;
  32770. defparam \macro_inst|cfg_reg_inst|min_vol[7] .CarryEnb = 1'b1;
  32771. alta_slice \macro_inst|cfg_reg_inst|min_vol[8] (
  32772. .A(),
  32773. .B(),
  32774. .C(vcc),
  32775. .D(\rv32.mem_ahb_hwdata[24] ),
  32776. .Cin(),
  32777. .Qin(\macro_inst|cfg_reg_inst|min_vol [8]),
  32778. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y12_SIG_SIG ),
  32779. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  32780. .SyncReset(),
  32781. .ShiftData(),
  32782. .SyncLoad(),
  32783. .LutOut(\macro_inst|cfg_reg_inst|min_vol[8]__feeder__LutOut ),
  32784. .Cout(),
  32785. .Q(\macro_inst|cfg_reg_inst|min_vol [8]));
  32786. defparam \macro_inst|cfg_reg_inst|min_vol[8] .coord_x = 16;
  32787. defparam \macro_inst|cfg_reg_inst|min_vol[8] .coord_y = 9;
  32788. defparam \macro_inst|cfg_reg_inst|min_vol[8] .coord_z = 9;
  32789. defparam \macro_inst|cfg_reg_inst|min_vol[8] .mask = 16'hFF00;
  32790. defparam \macro_inst|cfg_reg_inst|min_vol[8] .modeMux = 1'b1;
  32791. defparam \macro_inst|cfg_reg_inst|min_vol[8] .FeedbackMux = 1'b0;
  32792. defparam \macro_inst|cfg_reg_inst|min_vol[8] .ShiftMux = 1'b0;
  32793. defparam \macro_inst|cfg_reg_inst|min_vol[8] .BypassEn = 1'b0;
  32794. defparam \macro_inst|cfg_reg_inst|min_vol[8] .CarryEnb = 1'b1;
  32795. alta_slice \macro_inst|cfg_reg_inst|min_vol[9] (
  32796. .A(),
  32797. .B(),
  32798. .C(vcc),
  32799. .D(\rv32.mem_ahb_hwdata[25] ),
  32800. .Cin(),
  32801. .Qin(\macro_inst|cfg_reg_inst|min_vol [9]),
  32802. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|min_vol[0]~0_combout_X57_Y11_SIG_SIG ),
  32803. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  32804. .SyncReset(),
  32805. .ShiftData(),
  32806. .SyncLoad(),
  32807. .LutOut(\macro_inst|cfg_reg_inst|min_vol[9]__feeder__LutOut ),
  32808. .Cout(),
  32809. .Q(\macro_inst|cfg_reg_inst|min_vol [9]));
  32810. defparam \macro_inst|cfg_reg_inst|min_vol[9] .coord_x = 16;
  32811. defparam \macro_inst|cfg_reg_inst|min_vol[9] .coord_y = 11;
  32812. defparam \macro_inst|cfg_reg_inst|min_vol[9] .coord_z = 3;
  32813. defparam \macro_inst|cfg_reg_inst|min_vol[9] .mask = 16'hFF00;
  32814. defparam \macro_inst|cfg_reg_inst|min_vol[9] .modeMux = 1'b1;
  32815. defparam \macro_inst|cfg_reg_inst|min_vol[9] .FeedbackMux = 1'b0;
  32816. defparam \macro_inst|cfg_reg_inst|min_vol[9] .ShiftMux = 1'b0;
  32817. defparam \macro_inst|cfg_reg_inst|min_vol[9] .BypassEn = 1'b0;
  32818. defparam \macro_inst|cfg_reg_inst|min_vol[9] .CarryEnb = 1'b1;
  32819. alta_slice \macro_inst|cfg_reg_inst|prdata[0] (
  32820. .A(\macro_inst|cfg_reg_inst|Selector25~1_combout ),
  32821. .B(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  32822. .C(\macro_inst|cfg_reg_inst|Selector25~0_combout ),
  32823. .D(\macro_inst|cfg_reg_inst|Selector25~6_combout ),
  32824. .Cin(),
  32825. .Qin(\macro_inst|cfg_reg_inst|prdata [0]),
  32826. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X61_Y8_SIG_SIG ),
  32827. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  32828. .SyncReset(),
  32829. .ShiftData(),
  32830. .SyncLoad(),
  32831. .LutOut(\macro_inst|cfg_reg_inst|Selector25~7_combout ),
  32832. .Cout(),
  32833. .Q(\macro_inst|cfg_reg_inst|prdata [0]));
  32834. defparam \macro_inst|cfg_reg_inst|prdata[0] .coord_x = 18;
  32835. defparam \macro_inst|cfg_reg_inst|prdata[0] .coord_y = 11;
  32836. defparam \macro_inst|cfg_reg_inst|prdata[0] .coord_z = 14;
  32837. defparam \macro_inst|cfg_reg_inst|prdata[0] .mask = 16'hFFF8;
  32838. defparam \macro_inst|cfg_reg_inst|prdata[0] .modeMux = 1'b0;
  32839. defparam \macro_inst|cfg_reg_inst|prdata[0] .FeedbackMux = 1'b0;
  32840. defparam \macro_inst|cfg_reg_inst|prdata[0] .ShiftMux = 1'b0;
  32841. defparam \macro_inst|cfg_reg_inst|prdata[0] .BypassEn = 1'b0;
  32842. defparam \macro_inst|cfg_reg_inst|prdata[0] .CarryEnb = 1'b1;
  32843. alta_slice \macro_inst|cfg_reg_inst|prdata[10] (
  32844. .A(\macro_inst|cfg_reg_inst|prdata[10]~0_combout ),
  32845. .B(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  32846. .C(\macro_inst|cfg_reg_inst|Selector15~0_combout ),
  32847. .D(\macro_inst|cfg_reg_inst|trig_pulse_width [10]),
  32848. .Cin(),
  32849. .Qin(\macro_inst|cfg_reg_inst|prdata [10]),
  32850. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y7_SIG_SIG ),
  32851. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  32852. .SyncReset(),
  32853. .ShiftData(),
  32854. .SyncLoad(),
  32855. .LutOut(\macro_inst|cfg_reg_inst|Selector15~combout ),
  32856. .Cout(),
  32857. .Q(\macro_inst|cfg_reg_inst|prdata [10]));
  32858. defparam \macro_inst|cfg_reg_inst|prdata[10] .coord_x = 16;
  32859. defparam \macro_inst|cfg_reg_inst|prdata[10] .coord_y = 8;
  32860. defparam \macro_inst|cfg_reg_inst|prdata[10] .coord_z = 4;
  32861. defparam \macro_inst|cfg_reg_inst|prdata[10] .mask = 16'hF858;
  32862. defparam \macro_inst|cfg_reg_inst|prdata[10] .modeMux = 1'b0;
  32863. defparam \macro_inst|cfg_reg_inst|prdata[10] .FeedbackMux = 1'b0;
  32864. defparam \macro_inst|cfg_reg_inst|prdata[10] .ShiftMux = 1'b0;
  32865. defparam \macro_inst|cfg_reg_inst|prdata[10] .BypassEn = 1'b0;
  32866. defparam \macro_inst|cfg_reg_inst|prdata[10] .CarryEnb = 1'b1;
  32867. alta_slice \macro_inst|cfg_reg_inst|prdata[10]~0 (
  32868. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  32869. .B(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  32870. .C(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  32871. .D(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  32872. .Cin(),
  32873. .Qin(),
  32874. .Clk(),
  32875. .AsyncReset(),
  32876. .SyncReset(),
  32877. .ShiftData(),
  32878. .SyncLoad(),
  32879. .LutOut(\macro_inst|cfg_reg_inst|prdata[10]~0_combout ),
  32880. .Cout(),
  32881. .Q());
  32882. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .coord_x = 16;
  32883. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .coord_y = 8;
  32884. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .coord_z = 10;
  32885. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .mask = 16'h1110;
  32886. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .modeMux = 1'b0;
  32887. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .FeedbackMux = 1'b0;
  32888. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .ShiftMux = 1'b0;
  32889. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .BypassEn = 1'b0;
  32890. defparam \macro_inst|cfg_reg_inst|prdata[10]~0 .CarryEnb = 1'b1;
  32891. alta_slice \macro_inst|cfg_reg_inst|prdata[10]~1 (
  32892. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  32893. .B(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  32894. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  32895. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  32896. .Cin(),
  32897. .Qin(),
  32898. .Clk(),
  32899. .AsyncReset(),
  32900. .SyncReset(),
  32901. .ShiftData(),
  32902. .SyncLoad(),
  32903. .LutOut(\macro_inst|cfg_reg_inst|prdata[10]~1_combout ),
  32904. .Cout(),
  32905. .Q());
  32906. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .coord_x = 17;
  32907. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .coord_y = 10;
  32908. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .coord_z = 8;
  32909. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .mask = 16'h5808;
  32910. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .modeMux = 1'b0;
  32911. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .FeedbackMux = 1'b0;
  32912. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .ShiftMux = 1'b0;
  32913. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .BypassEn = 1'b0;
  32914. defparam \macro_inst|cfg_reg_inst|prdata[10]~1 .CarryEnb = 1'b1;
  32915. alta_slice \macro_inst|cfg_reg_inst|prdata[10]~2 (
  32916. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  32917. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  32918. .C(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  32919. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  32920. .Cin(),
  32921. .Qin(),
  32922. .Clk(),
  32923. .AsyncReset(),
  32924. .SyncReset(),
  32925. .ShiftData(),
  32926. .SyncLoad(),
  32927. .LutOut(\macro_inst|cfg_reg_inst|prdata[10]~2_combout ),
  32928. .Cout(),
  32929. .Q());
  32930. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .coord_x = 17;
  32931. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .coord_y = 10;
  32932. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .coord_z = 1;
  32933. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .mask = 16'hEAAA;
  32934. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .modeMux = 1'b0;
  32935. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .FeedbackMux = 1'b0;
  32936. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .ShiftMux = 1'b0;
  32937. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .BypassEn = 1'b0;
  32938. defparam \macro_inst|cfg_reg_inst|prdata[10]~2 .CarryEnb = 1'b1;
  32939. alta_slice \macro_inst|cfg_reg_inst|prdata[11] (
  32940. .A(\macro_inst|cfg_reg_inst|prdata[10]~0_combout ),
  32941. .B(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  32942. .C(\macro_inst|cfg_reg_inst|Selector14~0_combout ),
  32943. .D(\macro_inst|cfg_reg_inst|trig_pulse_width [11]),
  32944. .Cin(),
  32945. .Qin(\macro_inst|cfg_reg_inst|prdata [11]),
  32946. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y7_SIG_SIG ),
  32947. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  32948. .SyncReset(),
  32949. .ShiftData(),
  32950. .SyncLoad(),
  32951. .LutOut(\macro_inst|cfg_reg_inst|Selector14~combout ),
  32952. .Cout(),
  32953. .Q(\macro_inst|cfg_reg_inst|prdata [11]));
  32954. defparam \macro_inst|cfg_reg_inst|prdata[11] .coord_x = 16;
  32955. defparam \macro_inst|cfg_reg_inst|prdata[11] .coord_y = 8;
  32956. defparam \macro_inst|cfg_reg_inst|prdata[11] .coord_z = 5;
  32957. defparam \macro_inst|cfg_reg_inst|prdata[11] .mask = 16'hF252;
  32958. defparam \macro_inst|cfg_reg_inst|prdata[11] .modeMux = 1'b0;
  32959. defparam \macro_inst|cfg_reg_inst|prdata[11] .FeedbackMux = 1'b0;
  32960. defparam \macro_inst|cfg_reg_inst|prdata[11] .ShiftMux = 1'b0;
  32961. defparam \macro_inst|cfg_reg_inst|prdata[11] .BypassEn = 1'b0;
  32962. defparam \macro_inst|cfg_reg_inst|prdata[11] .CarryEnb = 1'b1;
  32963. alta_slice \macro_inst|cfg_reg_inst|prdata[12] (
  32964. .A(\macro_inst|cfg_reg_inst|frequency [12]),
  32965. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  32966. .C(\macro_inst|cfg_reg_inst|Selector13~1_combout ),
  32967. .D(\macro_inst|cfg_reg_inst|Selector13~0_combout ),
  32968. .Cin(),
  32969. .Qin(\macro_inst|cfg_reg_inst|prdata [12]),
  32970. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  32971. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32972. .SyncReset(),
  32973. .ShiftData(),
  32974. .SyncLoad(),
  32975. .LutOut(\macro_inst|cfg_reg_inst|Selector13~2_combout ),
  32976. .Cout(),
  32977. .Q(\macro_inst|cfg_reg_inst|prdata [12]));
  32978. defparam \macro_inst|cfg_reg_inst|prdata[12] .coord_x = 14;
  32979. defparam \macro_inst|cfg_reg_inst|prdata[12] .coord_y = 9;
  32980. defparam \macro_inst|cfg_reg_inst|prdata[12] .coord_z = 6;
  32981. defparam \macro_inst|cfg_reg_inst|prdata[12] .mask = 16'h8F88;
  32982. defparam \macro_inst|cfg_reg_inst|prdata[12] .modeMux = 1'b0;
  32983. defparam \macro_inst|cfg_reg_inst|prdata[12] .FeedbackMux = 1'b0;
  32984. defparam \macro_inst|cfg_reg_inst|prdata[12] .ShiftMux = 1'b0;
  32985. defparam \macro_inst|cfg_reg_inst|prdata[12] .BypassEn = 1'b0;
  32986. defparam \macro_inst|cfg_reg_inst|prdata[12] .CarryEnb = 1'b1;
  32987. alta_slice \macro_inst|cfg_reg_inst|prdata[13] (
  32988. .A(\macro_inst|cfg_reg_inst|Selector12~0_combout ),
  32989. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  32990. .C(\macro_inst|cfg_reg_inst|Selector13~1_combout ),
  32991. .D(\macro_inst|cfg_reg_inst|frequency [13]),
  32992. .Cin(),
  32993. .Qin(\macro_inst|cfg_reg_inst|prdata [13]),
  32994. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  32995. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  32996. .SyncReset(),
  32997. .ShiftData(),
  32998. .SyncLoad(),
  32999. .LutOut(\macro_inst|cfg_reg_inst|Selector12~1_combout ),
  33000. .Cout(),
  33001. .Q(\macro_inst|cfg_reg_inst|prdata [13]));
  33002. defparam \macro_inst|cfg_reg_inst|prdata[13] .coord_x = 14;
  33003. defparam \macro_inst|cfg_reg_inst|prdata[13] .coord_y = 9;
  33004. defparam \macro_inst|cfg_reg_inst|prdata[13] .coord_z = 11;
  33005. defparam \macro_inst|cfg_reg_inst|prdata[13] .mask = 16'hCE0A;
  33006. defparam \macro_inst|cfg_reg_inst|prdata[13] .modeMux = 1'b0;
  33007. defparam \macro_inst|cfg_reg_inst|prdata[13] .FeedbackMux = 1'b0;
  33008. defparam \macro_inst|cfg_reg_inst|prdata[13] .ShiftMux = 1'b0;
  33009. defparam \macro_inst|cfg_reg_inst|prdata[13] .BypassEn = 1'b0;
  33010. defparam \macro_inst|cfg_reg_inst|prdata[13] .CarryEnb = 1'b1;
  33011. alta_slice \macro_inst|cfg_reg_inst|prdata[14] (
  33012. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33013. .B(\macro_inst|cfg_reg_inst|Selector11~0_combout ),
  33014. .C(\macro_inst|cfg_reg_inst|frequency [14]),
  33015. .D(vcc),
  33016. .Cin(),
  33017. .Qin(\macro_inst|cfg_reg_inst|prdata [14]),
  33018. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ),
  33019. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  33020. .SyncReset(),
  33021. .ShiftData(),
  33022. .SyncLoad(),
  33023. .LutOut(\macro_inst|cfg_reg_inst|Selector11~1_combout ),
  33024. .Cout(),
  33025. .Q(\macro_inst|cfg_reg_inst|prdata [14]));
  33026. defparam \macro_inst|cfg_reg_inst|prdata[14] .coord_x = 17;
  33027. defparam \macro_inst|cfg_reg_inst|prdata[14] .coord_y = 10;
  33028. defparam \macro_inst|cfg_reg_inst|prdata[14] .coord_z = 4;
  33029. defparam \macro_inst|cfg_reg_inst|prdata[14] .mask = 16'hECEC;
  33030. defparam \macro_inst|cfg_reg_inst|prdata[14] .modeMux = 1'b0;
  33031. defparam \macro_inst|cfg_reg_inst|prdata[14] .FeedbackMux = 1'b0;
  33032. defparam \macro_inst|cfg_reg_inst|prdata[14] .ShiftMux = 1'b0;
  33033. defparam \macro_inst|cfg_reg_inst|prdata[14] .BypassEn = 1'b0;
  33034. defparam \macro_inst|cfg_reg_inst|prdata[14] .CarryEnb = 1'b1;
  33035. alta_slice \macro_inst|cfg_reg_inst|prdata[15] (
  33036. .A(\macro_inst|cfg_reg_inst|frequency [15]),
  33037. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33038. .C(\macro_inst|cfg_reg_inst|Selector13~1_combout ),
  33039. .D(\macro_inst|cfg_reg_inst|Selector10~0_combout ),
  33040. .Cin(),
  33041. .Qin(\macro_inst|cfg_reg_inst|prdata [15]),
  33042. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  33043. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  33044. .SyncReset(),
  33045. .ShiftData(),
  33046. .SyncLoad(),
  33047. .LutOut(\macro_inst|cfg_reg_inst|Selector10~1_combout ),
  33048. .Cout(),
  33049. .Q(\macro_inst|cfg_reg_inst|prdata [15]));
  33050. defparam \macro_inst|cfg_reg_inst|prdata[15] .coord_x = 14;
  33051. defparam \macro_inst|cfg_reg_inst|prdata[15] .coord_y = 9;
  33052. defparam \macro_inst|cfg_reg_inst|prdata[15] .coord_z = 12;
  33053. defparam \macro_inst|cfg_reg_inst|prdata[15] .mask = 16'h8F88;
  33054. defparam \macro_inst|cfg_reg_inst|prdata[15] .modeMux = 1'b0;
  33055. defparam \macro_inst|cfg_reg_inst|prdata[15] .FeedbackMux = 1'b0;
  33056. defparam \macro_inst|cfg_reg_inst|prdata[15] .ShiftMux = 1'b0;
  33057. defparam \macro_inst|cfg_reg_inst|prdata[15] .BypassEn = 1'b0;
  33058. defparam \macro_inst|cfg_reg_inst|prdata[15] .CarryEnb = 1'b1;
  33059. alta_slice \macro_inst|cfg_reg_inst|prdata[16] (
  33060. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33061. .B(\macro_inst|cfg_reg_inst|min_vol [0]),
  33062. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33063. .D(\macro_inst|cfg_reg_inst|frequency [16]),
  33064. .Cin(),
  33065. .Qin(\macro_inst|cfg_reg_inst|prdata [16]),
  33066. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33067. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33068. .SyncReset(),
  33069. .ShiftData(),
  33070. .SyncLoad(),
  33071. .LutOut(\macro_inst|cfg_reg_inst|Selector9~0_combout ),
  33072. .Cout(),
  33073. .Q(\macro_inst|cfg_reg_inst|prdata [16]));
  33074. defparam \macro_inst|cfg_reg_inst|prdata[16] .coord_x = 16;
  33075. defparam \macro_inst|cfg_reg_inst|prdata[16] .coord_y = 11;
  33076. defparam \macro_inst|cfg_reg_inst|prdata[16] .coord_z = 0;
  33077. defparam \macro_inst|cfg_reg_inst|prdata[16] .mask = 16'hEAC0;
  33078. defparam \macro_inst|cfg_reg_inst|prdata[16] .modeMux = 1'b0;
  33079. defparam \macro_inst|cfg_reg_inst|prdata[16] .FeedbackMux = 1'b0;
  33080. defparam \macro_inst|cfg_reg_inst|prdata[16] .ShiftMux = 1'b0;
  33081. defparam \macro_inst|cfg_reg_inst|prdata[16] .BypassEn = 1'b0;
  33082. defparam \macro_inst|cfg_reg_inst|prdata[16] .CarryEnb = 1'b1;
  33083. alta_slice \macro_inst|cfg_reg_inst|prdata[17] (
  33084. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33085. .B(\macro_inst|cfg_reg_inst|min_vol [1]),
  33086. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33087. .D(\macro_inst|cfg_reg_inst|frequency [17]),
  33088. .Cin(),
  33089. .Qin(\macro_inst|cfg_reg_inst|prdata [17]),
  33090. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y8_SIG_SIG ),
  33091. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  33092. .SyncReset(),
  33093. .ShiftData(),
  33094. .SyncLoad(),
  33095. .LutOut(\macro_inst|cfg_reg_inst|Selector8~0_combout ),
  33096. .Cout(),
  33097. .Q(\macro_inst|cfg_reg_inst|prdata [17]));
  33098. defparam \macro_inst|cfg_reg_inst|prdata[17] .coord_x = 15;
  33099. defparam \macro_inst|cfg_reg_inst|prdata[17] .coord_y = 8;
  33100. defparam \macro_inst|cfg_reg_inst|prdata[17] .coord_z = 10;
  33101. defparam \macro_inst|cfg_reg_inst|prdata[17] .mask = 16'hEAC0;
  33102. defparam \macro_inst|cfg_reg_inst|prdata[17] .modeMux = 1'b0;
  33103. defparam \macro_inst|cfg_reg_inst|prdata[17] .FeedbackMux = 1'b0;
  33104. defparam \macro_inst|cfg_reg_inst|prdata[17] .ShiftMux = 1'b0;
  33105. defparam \macro_inst|cfg_reg_inst|prdata[17] .BypassEn = 1'b0;
  33106. defparam \macro_inst|cfg_reg_inst|prdata[17] .CarryEnb = 1'b1;
  33107. alta_slice \macro_inst|cfg_reg_inst|prdata[18] (
  33108. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33109. .B(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33110. .C(\macro_inst|cfg_reg_inst|min_vol [2]),
  33111. .D(\macro_inst|cfg_reg_inst|frequency [18]),
  33112. .Cin(),
  33113. .Qin(\macro_inst|cfg_reg_inst|prdata [18]),
  33114. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33115. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33116. .SyncReset(),
  33117. .ShiftData(),
  33118. .SyncLoad(),
  33119. .LutOut(\macro_inst|cfg_reg_inst|Selector7~0_combout ),
  33120. .Cout(),
  33121. .Q(\macro_inst|cfg_reg_inst|prdata [18]));
  33122. defparam \macro_inst|cfg_reg_inst|prdata[18] .coord_x = 16;
  33123. defparam \macro_inst|cfg_reg_inst|prdata[18] .coord_y = 11;
  33124. defparam \macro_inst|cfg_reg_inst|prdata[18] .coord_z = 14;
  33125. defparam \macro_inst|cfg_reg_inst|prdata[18] .mask = 16'hAE0C;
  33126. defparam \macro_inst|cfg_reg_inst|prdata[18] .modeMux = 1'b0;
  33127. defparam \macro_inst|cfg_reg_inst|prdata[18] .FeedbackMux = 1'b0;
  33128. defparam \macro_inst|cfg_reg_inst|prdata[18] .ShiftMux = 1'b0;
  33129. defparam \macro_inst|cfg_reg_inst|prdata[18] .BypassEn = 1'b0;
  33130. defparam \macro_inst|cfg_reg_inst|prdata[18] .CarryEnb = 1'b1;
  33131. alta_slice \macro_inst|cfg_reg_inst|prdata[19] (
  33132. .A(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33133. .B(\macro_inst|cfg_reg_inst|min_vol [3]),
  33134. .C(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33135. .D(\macro_inst|cfg_reg_inst|frequency [19]),
  33136. .Cin(),
  33137. .Qin(\macro_inst|cfg_reg_inst|prdata [19]),
  33138. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33139. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33140. .SyncReset(),
  33141. .ShiftData(),
  33142. .SyncLoad(),
  33143. .LutOut(\macro_inst|cfg_reg_inst|Selector6~0_combout ),
  33144. .Cout(),
  33145. .Q(\macro_inst|cfg_reg_inst|prdata [19]));
  33146. defparam \macro_inst|cfg_reg_inst|prdata[19] .coord_x = 16;
  33147. defparam \macro_inst|cfg_reg_inst|prdata[19] .coord_y = 11;
  33148. defparam \macro_inst|cfg_reg_inst|prdata[19] .coord_z = 11;
  33149. defparam \macro_inst|cfg_reg_inst|prdata[19] .mask = 16'hF888;
  33150. defparam \macro_inst|cfg_reg_inst|prdata[19] .modeMux = 1'b0;
  33151. defparam \macro_inst|cfg_reg_inst|prdata[19] .FeedbackMux = 1'b0;
  33152. defparam \macro_inst|cfg_reg_inst|prdata[19] .ShiftMux = 1'b0;
  33153. defparam \macro_inst|cfg_reg_inst|prdata[19] .BypassEn = 1'b0;
  33154. defparam \macro_inst|cfg_reg_inst|prdata[19] .CarryEnb = 1'b1;
  33155. alta_slice \macro_inst|cfg_reg_inst|prdata[1] (
  33156. .A(vcc),
  33157. .B(\macro_inst|cfg_reg_inst|Selector24~8_combout ),
  33158. .C(\macro_inst|cfg_reg_inst|Selector24~0_combout ),
  33159. .D(\macro_inst|cfg_reg_inst|Selector24~1_combout ),
  33160. .Cin(),
  33161. .Qin(\macro_inst|cfg_reg_inst|prdata [1]),
  33162. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X60_Y11_SIG_SIG ),
  33163. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  33164. .SyncReset(),
  33165. .ShiftData(),
  33166. .SyncLoad(),
  33167. .LutOut(\macro_inst|cfg_reg_inst|Selector24~9_combout ),
  33168. .Cout(),
  33169. .Q(\macro_inst|cfg_reg_inst|prdata [1]));
  33170. defparam \macro_inst|cfg_reg_inst|prdata[1] .coord_x = 17;
  33171. defparam \macro_inst|cfg_reg_inst|prdata[1] .coord_y = 9;
  33172. defparam \macro_inst|cfg_reg_inst|prdata[1] .coord_z = 10;
  33173. defparam \macro_inst|cfg_reg_inst|prdata[1] .mask = 16'hFFFC;
  33174. defparam \macro_inst|cfg_reg_inst|prdata[1] .modeMux = 1'b0;
  33175. defparam \macro_inst|cfg_reg_inst|prdata[1] .FeedbackMux = 1'b0;
  33176. defparam \macro_inst|cfg_reg_inst|prdata[1] .ShiftMux = 1'b0;
  33177. defparam \macro_inst|cfg_reg_inst|prdata[1] .BypassEn = 1'b0;
  33178. defparam \macro_inst|cfg_reg_inst|prdata[1] .CarryEnb = 1'b1;
  33179. alta_slice \macro_inst|cfg_reg_inst|prdata[20] (
  33180. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33181. .B(\macro_inst|cfg_reg_inst|min_vol [4]),
  33182. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33183. .D(\macro_inst|cfg_reg_inst|frequency [20]),
  33184. .Cin(),
  33185. .Qin(\macro_inst|cfg_reg_inst|prdata [20]),
  33186. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33187. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33188. .SyncReset(),
  33189. .ShiftData(),
  33190. .SyncLoad(),
  33191. .LutOut(\macro_inst|cfg_reg_inst|Selector5~0_combout ),
  33192. .Cout(),
  33193. .Q(\macro_inst|cfg_reg_inst|prdata [20]));
  33194. defparam \macro_inst|cfg_reg_inst|prdata[20] .coord_x = 16;
  33195. defparam \macro_inst|cfg_reg_inst|prdata[20] .coord_y = 11;
  33196. defparam \macro_inst|cfg_reg_inst|prdata[20] .coord_z = 6;
  33197. defparam \macro_inst|cfg_reg_inst|prdata[20] .mask = 16'hEAC0;
  33198. defparam \macro_inst|cfg_reg_inst|prdata[20] .modeMux = 1'b0;
  33199. defparam \macro_inst|cfg_reg_inst|prdata[20] .FeedbackMux = 1'b0;
  33200. defparam \macro_inst|cfg_reg_inst|prdata[20] .ShiftMux = 1'b0;
  33201. defparam \macro_inst|cfg_reg_inst|prdata[20] .BypassEn = 1'b0;
  33202. defparam \macro_inst|cfg_reg_inst|prdata[20] .CarryEnb = 1'b1;
  33203. alta_slice \macro_inst|cfg_reg_inst|prdata[21] (
  33204. .A(\macro_inst|cfg_reg_inst|frequency [21]),
  33205. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33206. .C(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33207. .D(\macro_inst|cfg_reg_inst|min_vol [5]),
  33208. .Cin(),
  33209. .Qin(\macro_inst|cfg_reg_inst|prdata [21]),
  33210. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  33211. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  33212. .SyncReset(),
  33213. .ShiftData(),
  33214. .SyncLoad(),
  33215. .LutOut(\macro_inst|cfg_reg_inst|Selector4~0_combout ),
  33216. .Cout(),
  33217. .Q(\macro_inst|cfg_reg_inst|prdata [21]));
  33218. defparam \macro_inst|cfg_reg_inst|prdata[21] .coord_x = 14;
  33219. defparam \macro_inst|cfg_reg_inst|prdata[21] .coord_y = 9;
  33220. defparam \macro_inst|cfg_reg_inst|prdata[21] .coord_z = 10;
  33221. defparam \macro_inst|cfg_reg_inst|prdata[21] .mask = 16'h88F8;
  33222. defparam \macro_inst|cfg_reg_inst|prdata[21] .modeMux = 1'b0;
  33223. defparam \macro_inst|cfg_reg_inst|prdata[21] .FeedbackMux = 1'b0;
  33224. defparam \macro_inst|cfg_reg_inst|prdata[21] .ShiftMux = 1'b0;
  33225. defparam \macro_inst|cfg_reg_inst|prdata[21] .BypassEn = 1'b0;
  33226. defparam \macro_inst|cfg_reg_inst|prdata[21] .CarryEnb = 1'b1;
  33227. alta_slice \macro_inst|cfg_reg_inst|prdata[22] (
  33228. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33229. .B(\macro_inst|cfg_reg_inst|min_vol [6]),
  33230. .C(\macro_inst|cfg_reg_inst|frequency [22]),
  33231. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33232. .Cin(),
  33233. .Qin(\macro_inst|cfg_reg_inst|prdata [22]),
  33234. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y8_SIG_SIG ),
  33235. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  33236. .SyncReset(),
  33237. .ShiftData(),
  33238. .SyncLoad(),
  33239. .LutOut(\macro_inst|cfg_reg_inst|Selector3~0_combout ),
  33240. .Cout(),
  33241. .Q(\macro_inst|cfg_reg_inst|prdata [22]));
  33242. defparam \macro_inst|cfg_reg_inst|prdata[22] .coord_x = 15;
  33243. defparam \macro_inst|cfg_reg_inst|prdata[22] .coord_y = 8;
  33244. defparam \macro_inst|cfg_reg_inst|prdata[22] .coord_z = 12;
  33245. defparam \macro_inst|cfg_reg_inst|prdata[22] .mask = 16'hB3A0;
  33246. defparam \macro_inst|cfg_reg_inst|prdata[22] .modeMux = 1'b0;
  33247. defparam \macro_inst|cfg_reg_inst|prdata[22] .FeedbackMux = 1'b0;
  33248. defparam \macro_inst|cfg_reg_inst|prdata[22] .ShiftMux = 1'b0;
  33249. defparam \macro_inst|cfg_reg_inst|prdata[22] .BypassEn = 1'b0;
  33250. defparam \macro_inst|cfg_reg_inst|prdata[22] .CarryEnb = 1'b1;
  33251. alta_slice \macro_inst|cfg_reg_inst|prdata[23] (
  33252. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33253. .B(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33254. .C(\macro_inst|cfg_reg_inst|frequency [23]),
  33255. .D(\macro_inst|cfg_reg_inst|min_vol [7]),
  33256. .Cin(),
  33257. .Qin(\macro_inst|cfg_reg_inst|prdata [23]),
  33258. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33259. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33260. .SyncReset(),
  33261. .ShiftData(),
  33262. .SyncLoad(),
  33263. .LutOut(\macro_inst|cfg_reg_inst|Selector2~0_combout ),
  33264. .Cout(),
  33265. .Q(\macro_inst|cfg_reg_inst|prdata [23]));
  33266. defparam \macro_inst|cfg_reg_inst|prdata[23] .coord_x = 16;
  33267. defparam \macro_inst|cfg_reg_inst|prdata[23] .coord_y = 11;
  33268. defparam \macro_inst|cfg_reg_inst|prdata[23] .coord_z = 4;
  33269. defparam \macro_inst|cfg_reg_inst|prdata[23] .mask = 16'hECA0;
  33270. defparam \macro_inst|cfg_reg_inst|prdata[23] .modeMux = 1'b0;
  33271. defparam \macro_inst|cfg_reg_inst|prdata[23] .FeedbackMux = 1'b0;
  33272. defparam \macro_inst|cfg_reg_inst|prdata[23] .ShiftMux = 1'b0;
  33273. defparam \macro_inst|cfg_reg_inst|prdata[23] .BypassEn = 1'b0;
  33274. defparam \macro_inst|cfg_reg_inst|prdata[23] .CarryEnb = 1'b1;
  33275. alta_slice \macro_inst|cfg_reg_inst|prdata[24] (
  33276. .A(\macro_inst|cfg_reg_inst|frequency [24]),
  33277. .B(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33278. .C(\macro_inst|cfg_reg_inst|min_vol [8]),
  33279. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33280. .Cin(),
  33281. .Qin(\macro_inst|cfg_reg_inst|prdata [24]),
  33282. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y8_SIG_SIG ),
  33283. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  33284. .SyncReset(),
  33285. .ShiftData(),
  33286. .SyncLoad(),
  33287. .LutOut(\macro_inst|cfg_reg_inst|Selector1~0_combout ),
  33288. .Cout(),
  33289. .Q(\macro_inst|cfg_reg_inst|prdata [24]));
  33290. defparam \macro_inst|cfg_reg_inst|prdata[24] .coord_x = 15;
  33291. defparam \macro_inst|cfg_reg_inst|prdata[24] .coord_y = 8;
  33292. defparam \macro_inst|cfg_reg_inst|prdata[24] .coord_z = 11;
  33293. defparam \macro_inst|cfg_reg_inst|prdata[24] .mask = 16'hF888;
  33294. defparam \macro_inst|cfg_reg_inst|prdata[24] .modeMux = 1'b0;
  33295. defparam \macro_inst|cfg_reg_inst|prdata[24] .FeedbackMux = 1'b0;
  33296. defparam \macro_inst|cfg_reg_inst|prdata[24] .ShiftMux = 1'b0;
  33297. defparam \macro_inst|cfg_reg_inst|prdata[24] .BypassEn = 1'b0;
  33298. defparam \macro_inst|cfg_reg_inst|prdata[24] .CarryEnb = 1'b1;
  33299. alta_slice \macro_inst|cfg_reg_inst|prdata[25] (
  33300. .A(\macro_inst|cfg_reg_inst|frequency [25]),
  33301. .B(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33302. .C(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  33303. .D(\macro_inst|cfg_reg_inst|min_vol [9]),
  33304. .Cin(),
  33305. .Qin(\macro_inst|cfg_reg_inst|prdata [25]),
  33306. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y11_SIG_SIG ),
  33307. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  33308. .SyncReset(),
  33309. .ShiftData(),
  33310. .SyncLoad(),
  33311. .LutOut(\macro_inst|cfg_reg_inst|Selector0~0_combout ),
  33312. .Cout(),
  33313. .Q(\macro_inst|cfg_reg_inst|prdata [25]));
  33314. defparam \macro_inst|cfg_reg_inst|prdata[25] .coord_x = 16;
  33315. defparam \macro_inst|cfg_reg_inst|prdata[25] .coord_y = 11;
  33316. defparam \macro_inst|cfg_reg_inst|prdata[25] .coord_z = 1;
  33317. defparam \macro_inst|cfg_reg_inst|prdata[25] .mask = 16'hECA0;
  33318. defparam \macro_inst|cfg_reg_inst|prdata[25] .modeMux = 1'b0;
  33319. defparam \macro_inst|cfg_reg_inst|prdata[25] .FeedbackMux = 1'b0;
  33320. defparam \macro_inst|cfg_reg_inst|prdata[25] .ShiftMux = 1'b0;
  33321. defparam \macro_inst|cfg_reg_inst|prdata[25] .BypassEn = 1'b0;
  33322. defparam \macro_inst|cfg_reg_inst|prdata[25] .CarryEnb = 1'b1;
  33323. alta_slice \macro_inst|cfg_reg_inst|prdata[26] (
  33324. .A(\macro_inst|cfg_reg_inst|frequency [26]),
  33325. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  33326. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  33327. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33328. .Cin(),
  33329. .Qin(\macro_inst|cfg_reg_inst|prdata [26]),
  33330. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X56_Y10_SIG_SIG ),
  33331. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  33332. .SyncReset(),
  33333. .ShiftData(),
  33334. .SyncLoad(),
  33335. .LutOut(\macro_inst|cfg_reg_inst|prdata~3_combout ),
  33336. .Cout(),
  33337. .Q(\macro_inst|cfg_reg_inst|prdata [26]));
  33338. defparam \macro_inst|cfg_reg_inst|prdata[26] .coord_x = 14;
  33339. defparam \macro_inst|cfg_reg_inst|prdata[26] .coord_y = 11;
  33340. defparam \macro_inst|cfg_reg_inst|prdata[26] .coord_z = 10;
  33341. defparam \macro_inst|cfg_reg_inst|prdata[26] .mask = 16'h2000;
  33342. defparam \macro_inst|cfg_reg_inst|prdata[26] .modeMux = 1'b0;
  33343. defparam \macro_inst|cfg_reg_inst|prdata[26] .FeedbackMux = 1'b0;
  33344. defparam \macro_inst|cfg_reg_inst|prdata[26] .ShiftMux = 1'b0;
  33345. defparam \macro_inst|cfg_reg_inst|prdata[26] .BypassEn = 1'b0;
  33346. defparam \macro_inst|cfg_reg_inst|prdata[26] .CarryEnb = 1'b1;
  33347. alta_slice \macro_inst|cfg_reg_inst|prdata[27] (
  33348. .A(\macro_inst|cfg_reg_inst|frequency [27]),
  33349. .B(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33350. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  33351. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  33352. .Cin(),
  33353. .Qin(\macro_inst|cfg_reg_inst|prdata [27]),
  33354. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  33355. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  33356. .SyncReset(),
  33357. .ShiftData(),
  33358. .SyncLoad(),
  33359. .LutOut(\macro_inst|cfg_reg_inst|prdata~4_combout ),
  33360. .Cout(),
  33361. .Q(\macro_inst|cfg_reg_inst|prdata [27]));
  33362. defparam \macro_inst|cfg_reg_inst|prdata[27] .coord_x = 14;
  33363. defparam \macro_inst|cfg_reg_inst|prdata[27] .coord_y = 9;
  33364. defparam \macro_inst|cfg_reg_inst|prdata[27] .coord_z = 13;
  33365. defparam \macro_inst|cfg_reg_inst|prdata[27] .mask = 16'h0080;
  33366. defparam \macro_inst|cfg_reg_inst|prdata[27] .modeMux = 1'b0;
  33367. defparam \macro_inst|cfg_reg_inst|prdata[27] .FeedbackMux = 1'b0;
  33368. defparam \macro_inst|cfg_reg_inst|prdata[27] .ShiftMux = 1'b0;
  33369. defparam \macro_inst|cfg_reg_inst|prdata[27] .BypassEn = 1'b0;
  33370. defparam \macro_inst|cfg_reg_inst|prdata[27] .CarryEnb = 1'b1;
  33371. alta_slice \macro_inst|cfg_reg_inst|prdata[28] (
  33372. .A(\macro_inst|cfg_reg_inst|frequency [28]),
  33373. .B(\macro_inst|ahb2apb_inst|paddr [3]),
  33374. .C(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33375. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  33376. .Cin(),
  33377. .Qin(\macro_inst|cfg_reg_inst|prdata [28]),
  33378. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  33379. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  33380. .SyncReset(),
  33381. .ShiftData(),
  33382. .SyncLoad(),
  33383. .LutOut(\macro_inst|cfg_reg_inst|prdata~5_combout ),
  33384. .Cout(),
  33385. .Q(\macro_inst|cfg_reg_inst|prdata [28]));
  33386. defparam \macro_inst|cfg_reg_inst|prdata[28] .coord_x = 14;
  33387. defparam \macro_inst|cfg_reg_inst|prdata[28] .coord_y = 9;
  33388. defparam \macro_inst|cfg_reg_inst|prdata[28] .coord_z = 15;
  33389. defparam \macro_inst|cfg_reg_inst|prdata[28] .mask = 16'h0080;
  33390. defparam \macro_inst|cfg_reg_inst|prdata[28] .modeMux = 1'b0;
  33391. defparam \macro_inst|cfg_reg_inst|prdata[28] .FeedbackMux = 1'b0;
  33392. defparam \macro_inst|cfg_reg_inst|prdata[28] .ShiftMux = 1'b0;
  33393. defparam \macro_inst|cfg_reg_inst|prdata[28] .BypassEn = 1'b0;
  33394. defparam \macro_inst|cfg_reg_inst|prdata[28] .CarryEnb = 1'b1;
  33395. alta_slice \macro_inst|cfg_reg_inst|prdata[29] (
  33396. .A(\macro_inst|cfg_reg_inst|frequency [29]),
  33397. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  33398. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  33399. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33400. .Cin(),
  33401. .Qin(\macro_inst|cfg_reg_inst|prdata [29]),
  33402. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X56_Y10_SIG_SIG ),
  33403. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  33404. .SyncReset(),
  33405. .ShiftData(),
  33406. .SyncLoad(),
  33407. .LutOut(\macro_inst|cfg_reg_inst|prdata~6_combout ),
  33408. .Cout(),
  33409. .Q(\macro_inst|cfg_reg_inst|prdata [29]));
  33410. defparam \macro_inst|cfg_reg_inst|prdata[29] .coord_x = 14;
  33411. defparam \macro_inst|cfg_reg_inst|prdata[29] .coord_y = 11;
  33412. defparam \macro_inst|cfg_reg_inst|prdata[29] .coord_z = 0;
  33413. defparam \macro_inst|cfg_reg_inst|prdata[29] .mask = 16'h2000;
  33414. defparam \macro_inst|cfg_reg_inst|prdata[29] .modeMux = 1'b0;
  33415. defparam \macro_inst|cfg_reg_inst|prdata[29] .FeedbackMux = 1'b0;
  33416. defparam \macro_inst|cfg_reg_inst|prdata[29] .ShiftMux = 1'b0;
  33417. defparam \macro_inst|cfg_reg_inst|prdata[29] .BypassEn = 1'b0;
  33418. defparam \macro_inst|cfg_reg_inst|prdata[29] .CarryEnb = 1'b1;
  33419. alta_slice \macro_inst|cfg_reg_inst|prdata[2] (
  33420. .A(vcc),
  33421. .B(\macro_inst|cfg_reg_inst|Selector23~0_combout ),
  33422. .C(\macro_inst|cfg_reg_inst|Selector23~4_combout ),
  33423. .D(\macro_inst|cfg_reg_inst|Selector23~1_combout ),
  33424. .Cin(),
  33425. .Qin(\macro_inst|cfg_reg_inst|prdata [2]),
  33426. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X60_Y11_SIG_SIG ),
  33427. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  33428. .SyncReset(),
  33429. .ShiftData(),
  33430. .SyncLoad(),
  33431. .LutOut(\macro_inst|cfg_reg_inst|Selector23~5_combout ),
  33432. .Cout(),
  33433. .Q(\macro_inst|cfg_reg_inst|prdata [2]));
  33434. defparam \macro_inst|cfg_reg_inst|prdata[2] .coord_x = 17;
  33435. defparam \macro_inst|cfg_reg_inst|prdata[2] .coord_y = 9;
  33436. defparam \macro_inst|cfg_reg_inst|prdata[2] .coord_z = 5;
  33437. defparam \macro_inst|cfg_reg_inst|prdata[2] .mask = 16'hFFFC;
  33438. defparam \macro_inst|cfg_reg_inst|prdata[2] .modeMux = 1'b0;
  33439. defparam \macro_inst|cfg_reg_inst|prdata[2] .FeedbackMux = 1'b0;
  33440. defparam \macro_inst|cfg_reg_inst|prdata[2] .ShiftMux = 1'b0;
  33441. defparam \macro_inst|cfg_reg_inst|prdata[2] .BypassEn = 1'b0;
  33442. defparam \macro_inst|cfg_reg_inst|prdata[2] .CarryEnb = 1'b1;
  33443. alta_slice \macro_inst|cfg_reg_inst|prdata[30] (
  33444. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  33445. .B(\macro_inst|cfg_reg_inst|frequency [30]),
  33446. .C(\macro_inst|ahb2apb_inst|paddr [2]),
  33447. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33448. .Cin(),
  33449. .Qin(\macro_inst|cfg_reg_inst|prdata [30]),
  33450. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X56_Y10_SIG_SIG ),
  33451. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  33452. .SyncReset(),
  33453. .ShiftData(),
  33454. .SyncLoad(),
  33455. .LutOut(\macro_inst|cfg_reg_inst|prdata~7_combout ),
  33456. .Cout(),
  33457. .Q(\macro_inst|cfg_reg_inst|prdata [30]));
  33458. defparam \macro_inst|cfg_reg_inst|prdata[30] .coord_x = 14;
  33459. defparam \macro_inst|cfg_reg_inst|prdata[30] .coord_y = 11;
  33460. defparam \macro_inst|cfg_reg_inst|prdata[30] .coord_z = 14;
  33461. defparam \macro_inst|cfg_reg_inst|prdata[30] .mask = 16'h0800;
  33462. defparam \macro_inst|cfg_reg_inst|prdata[30] .modeMux = 1'b0;
  33463. defparam \macro_inst|cfg_reg_inst|prdata[30] .FeedbackMux = 1'b0;
  33464. defparam \macro_inst|cfg_reg_inst|prdata[30] .ShiftMux = 1'b0;
  33465. defparam \macro_inst|cfg_reg_inst|prdata[30] .BypassEn = 1'b0;
  33466. defparam \macro_inst|cfg_reg_inst|prdata[30] .CarryEnb = 1'b1;
  33467. alta_slice \macro_inst|cfg_reg_inst|prdata[31] (
  33468. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  33469. .B(\macro_inst|cfg_reg_inst|frequency [31]),
  33470. .C(\macro_inst|ahb2apb_inst|paddr [2]),
  33471. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  33472. .Cin(),
  33473. .Qin(\macro_inst|cfg_reg_inst|prdata [31]),
  33474. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y10_SIG_SIG ),
  33475. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  33476. .SyncReset(),
  33477. .ShiftData(),
  33478. .SyncLoad(),
  33479. .LutOut(\macro_inst|cfg_reg_inst|prdata~8_combout ),
  33480. .Cout(),
  33481. .Q(\macro_inst|cfg_reg_inst|prdata [31]));
  33482. defparam \macro_inst|cfg_reg_inst|prdata[31] .coord_x = 14;
  33483. defparam \macro_inst|cfg_reg_inst|prdata[31] .coord_y = 9;
  33484. defparam \macro_inst|cfg_reg_inst|prdata[31] .coord_z = 7;
  33485. defparam \macro_inst|cfg_reg_inst|prdata[31] .mask = 16'h0800;
  33486. defparam \macro_inst|cfg_reg_inst|prdata[31] .modeMux = 1'b0;
  33487. defparam \macro_inst|cfg_reg_inst|prdata[31] .FeedbackMux = 1'b0;
  33488. defparam \macro_inst|cfg_reg_inst|prdata[31] .ShiftMux = 1'b0;
  33489. defparam \macro_inst|cfg_reg_inst|prdata[31] .BypassEn = 1'b0;
  33490. defparam \macro_inst|cfg_reg_inst|prdata[31] .CarryEnb = 1'b1;
  33491. alta_slice \macro_inst|cfg_reg_inst|prdata[3] (
  33492. .A(vcc),
  33493. .B(\macro_inst|cfg_reg_inst|Selector22~4_combout ),
  33494. .C(\macro_inst|cfg_reg_inst|Selector22~0_combout ),
  33495. .D(\macro_inst|cfg_reg_inst|Selector22~1_combout ),
  33496. .Cin(),
  33497. .Qin(\macro_inst|cfg_reg_inst|prdata [3]),
  33498. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X60_Y11_SIG_SIG ),
  33499. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  33500. .SyncReset(),
  33501. .ShiftData(),
  33502. .SyncLoad(),
  33503. .LutOut(\macro_inst|cfg_reg_inst|Selector22~5_combout ),
  33504. .Cout(),
  33505. .Q(\macro_inst|cfg_reg_inst|prdata [3]));
  33506. defparam \macro_inst|cfg_reg_inst|prdata[3] .coord_x = 17;
  33507. defparam \macro_inst|cfg_reg_inst|prdata[3] .coord_y = 9;
  33508. defparam \macro_inst|cfg_reg_inst|prdata[3] .coord_z = 4;
  33509. defparam \macro_inst|cfg_reg_inst|prdata[3] .mask = 16'hFFFC;
  33510. defparam \macro_inst|cfg_reg_inst|prdata[3] .modeMux = 1'b0;
  33511. defparam \macro_inst|cfg_reg_inst|prdata[3] .FeedbackMux = 1'b0;
  33512. defparam \macro_inst|cfg_reg_inst|prdata[3] .ShiftMux = 1'b0;
  33513. defparam \macro_inst|cfg_reg_inst|prdata[3] .BypassEn = 1'b0;
  33514. defparam \macro_inst|cfg_reg_inst|prdata[3] .CarryEnb = 1'b1;
  33515. alta_slice \macro_inst|cfg_reg_inst|prdata[4] (
  33516. .A(\macro_inst|cfg_reg_inst|Selector21~0_combout ),
  33517. .B(vcc),
  33518. .C(\macro_inst|cfg_reg_inst|Selector21~1_combout ),
  33519. .D(\macro_inst|cfg_reg_inst|Selector21~4_combout ),
  33520. .Cin(),
  33521. .Qin(\macro_inst|cfg_reg_inst|prdata [4]),
  33522. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ),
  33523. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  33524. .SyncReset(),
  33525. .ShiftData(),
  33526. .SyncLoad(),
  33527. .LutOut(\macro_inst|cfg_reg_inst|Selector21~5_combout ),
  33528. .Cout(),
  33529. .Q(\macro_inst|cfg_reg_inst|prdata [4]));
  33530. defparam \macro_inst|cfg_reg_inst|prdata[4] .coord_x = 17;
  33531. defparam \macro_inst|cfg_reg_inst|prdata[4] .coord_y = 10;
  33532. defparam \macro_inst|cfg_reg_inst|prdata[4] .coord_z = 11;
  33533. defparam \macro_inst|cfg_reg_inst|prdata[4] .mask = 16'hFFFA;
  33534. defparam \macro_inst|cfg_reg_inst|prdata[4] .modeMux = 1'b0;
  33535. defparam \macro_inst|cfg_reg_inst|prdata[4] .FeedbackMux = 1'b0;
  33536. defparam \macro_inst|cfg_reg_inst|prdata[4] .ShiftMux = 1'b0;
  33537. defparam \macro_inst|cfg_reg_inst|prdata[4] .BypassEn = 1'b0;
  33538. defparam \macro_inst|cfg_reg_inst|prdata[4] .CarryEnb = 1'b1;
  33539. alta_slice \macro_inst|cfg_reg_inst|prdata[5] (
  33540. .A(\macro_inst|cfg_reg_inst|Selector20~2_combout ),
  33541. .B(\macro_inst|cfg_reg_inst|Selector20~0_combout ),
  33542. .C(\macro_inst|cfg_reg_inst|Selector20~4_combout ),
  33543. .D(\macro_inst|cfg_reg_inst|Selector20~1_combout ),
  33544. .Cin(),
  33545. .Qin(\macro_inst|cfg_reg_inst|prdata [5]),
  33546. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ),
  33547. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  33548. .SyncReset(),
  33549. .ShiftData(),
  33550. .SyncLoad(),
  33551. .LutOut(\macro_inst|cfg_reg_inst|Selector20~5_combout ),
  33552. .Cout(),
  33553. .Q(\macro_inst|cfg_reg_inst|prdata [5]));
  33554. defparam \macro_inst|cfg_reg_inst|prdata[5] .coord_x = 17;
  33555. defparam \macro_inst|cfg_reg_inst|prdata[5] .coord_y = 10;
  33556. defparam \macro_inst|cfg_reg_inst|prdata[5] .coord_z = 3;
  33557. defparam \macro_inst|cfg_reg_inst|prdata[5] .mask = 16'hFFFE;
  33558. defparam \macro_inst|cfg_reg_inst|prdata[5] .modeMux = 1'b0;
  33559. defparam \macro_inst|cfg_reg_inst|prdata[5] .FeedbackMux = 1'b0;
  33560. defparam \macro_inst|cfg_reg_inst|prdata[5] .ShiftMux = 1'b0;
  33561. defparam \macro_inst|cfg_reg_inst|prdata[5] .BypassEn = 1'b0;
  33562. defparam \macro_inst|cfg_reg_inst|prdata[5] .CarryEnb = 1'b1;
  33563. alta_slice \macro_inst|cfg_reg_inst|prdata[6] (
  33564. .A(\macro_inst|cfg_reg_inst|Selector19~3_combout ),
  33565. .B(\macro_inst|cfg_reg_inst|Selector19~0_combout ),
  33566. .C(\macro_inst|cfg_reg_inst|Selector19~2_combout ),
  33567. .D(\macro_inst|cfg_reg_inst|Selector19~1_combout ),
  33568. .Cin(),
  33569. .Qin(\macro_inst|cfg_reg_inst|prdata [6]),
  33570. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X61_Y8_SIG_SIG ),
  33571. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  33572. .SyncReset(),
  33573. .ShiftData(),
  33574. .SyncLoad(),
  33575. .LutOut(\macro_inst|cfg_reg_inst|Selector19~4_combout ),
  33576. .Cout(),
  33577. .Q(\macro_inst|cfg_reg_inst|prdata [6]));
  33578. defparam \macro_inst|cfg_reg_inst|prdata[6] .coord_x = 18;
  33579. defparam \macro_inst|cfg_reg_inst|prdata[6] .coord_y = 11;
  33580. defparam \macro_inst|cfg_reg_inst|prdata[6] .coord_z = 7;
  33581. defparam \macro_inst|cfg_reg_inst|prdata[6] .mask = 16'hFFFE;
  33582. defparam \macro_inst|cfg_reg_inst|prdata[6] .modeMux = 1'b0;
  33583. defparam \macro_inst|cfg_reg_inst|prdata[6] .FeedbackMux = 1'b0;
  33584. defparam \macro_inst|cfg_reg_inst|prdata[6] .ShiftMux = 1'b0;
  33585. defparam \macro_inst|cfg_reg_inst|prdata[6] .BypassEn = 1'b0;
  33586. defparam \macro_inst|cfg_reg_inst|prdata[6] .CarryEnb = 1'b1;
  33587. alta_slice \macro_inst|cfg_reg_inst|prdata[7] (
  33588. .A(\macro_inst|cfg_reg_inst|Selector18~0_combout ),
  33589. .B(\macro_inst|cfg_reg_inst|Selector18~3_combout ),
  33590. .C(\macro_inst|cfg_reg_inst|Selector18~2_combout ),
  33591. .D(\macro_inst|cfg_reg_inst|Selector18~1_combout ),
  33592. .Cin(),
  33593. .Qin(\macro_inst|cfg_reg_inst|prdata [7]),
  33594. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ),
  33595. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  33596. .SyncReset(),
  33597. .ShiftData(),
  33598. .SyncLoad(),
  33599. .LutOut(\macro_inst|cfg_reg_inst|Selector18~4_combout ),
  33600. .Cout(),
  33601. .Q(\macro_inst|cfg_reg_inst|prdata [7]));
  33602. defparam \macro_inst|cfg_reg_inst|prdata[7] .coord_x = 17;
  33603. defparam \macro_inst|cfg_reg_inst|prdata[7] .coord_y = 10;
  33604. defparam \macro_inst|cfg_reg_inst|prdata[7] .coord_z = 5;
  33605. defparam \macro_inst|cfg_reg_inst|prdata[7] .mask = 16'hFFFE;
  33606. defparam \macro_inst|cfg_reg_inst|prdata[7] .modeMux = 1'b0;
  33607. defparam \macro_inst|cfg_reg_inst|prdata[7] .FeedbackMux = 1'b0;
  33608. defparam \macro_inst|cfg_reg_inst|prdata[7] .ShiftMux = 1'b0;
  33609. defparam \macro_inst|cfg_reg_inst|prdata[7] .BypassEn = 1'b0;
  33610. defparam \macro_inst|cfg_reg_inst|prdata[7] .CarryEnb = 1'b1;
  33611. alta_slice \macro_inst|cfg_reg_inst|prdata[8] (
  33612. .A(\macro_inst|cfg_reg_inst|Selector17~0_combout ),
  33613. .B(vcc),
  33614. .C(\macro_inst|cfg_reg_inst|Selector17~1_combout ),
  33615. .D(\macro_inst|cfg_reg_inst|Selector17~2_combout ),
  33616. .Cin(),
  33617. .Qin(\macro_inst|cfg_reg_inst|prdata [8]),
  33618. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X59_Y9_SIG_SIG ),
  33619. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  33620. .SyncReset(),
  33621. .ShiftData(),
  33622. .SyncLoad(),
  33623. .LutOut(\macro_inst|cfg_reg_inst|Selector17~3_combout ),
  33624. .Cout(),
  33625. .Q(\macro_inst|cfg_reg_inst|prdata [8]));
  33626. defparam \macro_inst|cfg_reg_inst|prdata[8] .coord_x = 17;
  33627. defparam \macro_inst|cfg_reg_inst|prdata[8] .coord_y = 10;
  33628. defparam \macro_inst|cfg_reg_inst|prdata[8] .coord_z = 10;
  33629. defparam \macro_inst|cfg_reg_inst|prdata[8] .mask = 16'hFFFA;
  33630. defparam \macro_inst|cfg_reg_inst|prdata[8] .modeMux = 1'b0;
  33631. defparam \macro_inst|cfg_reg_inst|prdata[8] .FeedbackMux = 1'b0;
  33632. defparam \macro_inst|cfg_reg_inst|prdata[8] .ShiftMux = 1'b0;
  33633. defparam \macro_inst|cfg_reg_inst|prdata[8] .BypassEn = 1'b0;
  33634. defparam \macro_inst|cfg_reg_inst|prdata[8] .CarryEnb = 1'b1;
  33635. alta_slice \macro_inst|cfg_reg_inst|prdata[9] (
  33636. .A(\macro_inst|cfg_reg_inst|Selector16~0_combout ),
  33637. .B(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33638. .C(\macro_inst|cfg_reg_inst|trig_auto_timeout [9]),
  33639. .D(\macro_inst|cfg_reg_inst|Selector16~1_combout ),
  33640. .Cin(),
  33641. .Qin(\macro_inst|cfg_reg_inst|prdata [9]),
  33642. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|always1~2_combout_X57_Y7_SIG_SIG ),
  33643. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  33644. .SyncReset(),
  33645. .ShiftData(),
  33646. .SyncLoad(),
  33647. .LutOut(\macro_inst|cfg_reg_inst|Selector16~2_combout ),
  33648. .Cout(),
  33649. .Q(\macro_inst|cfg_reg_inst|prdata [9]));
  33650. defparam \macro_inst|cfg_reg_inst|prdata[9] .coord_x = 16;
  33651. defparam \macro_inst|cfg_reg_inst|prdata[9] .coord_y = 8;
  33652. defparam \macro_inst|cfg_reg_inst|prdata[9] .coord_z = 8;
  33653. defparam \macro_inst|cfg_reg_inst|prdata[9] .mask = 16'hFFEA;
  33654. defparam \macro_inst|cfg_reg_inst|prdata[9] .modeMux = 1'b0;
  33655. defparam \macro_inst|cfg_reg_inst|prdata[9] .FeedbackMux = 1'b0;
  33656. defparam \macro_inst|cfg_reg_inst|prdata[9] .ShiftMux = 1'b0;
  33657. defparam \macro_inst|cfg_reg_inst|prdata[9] .BypassEn = 1'b0;
  33658. defparam \macro_inst|cfg_reg_inst|prdata[9] .CarryEnb = 1'b1;
  33659. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[0] (
  33660. .A(\macro_inst|cfg_reg_inst|trig_edge [0]),
  33661. .B(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33662. .C(\rv32.mem_ahb_hwdata[0] ),
  33663. .D(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33664. .Cin(),
  33665. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [0]),
  33666. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y6_SIG_SIG ),
  33667. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  33668. .SyncReset(SyncReset_X60_Y6_GND),
  33669. .ShiftData(),
  33670. .SyncLoad(SyncLoad_X60_Y6_VCC),
  33671. .LutOut(\macro_inst|cfg_reg_inst|Selector25~2_combout ),
  33672. .Cout(),
  33673. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [0]));
  33674. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .coord_x = 19;
  33675. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .coord_y = 8;
  33676. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .coord_z = 11;
  33677. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .mask = 16'hEAC0;
  33678. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .modeMux = 1'b0;
  33679. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .FeedbackMux = 1'b1;
  33680. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .ShiftMux = 1'b0;
  33681. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .BypassEn = 1'b1;
  33682. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0] .CarryEnb = 1'b1;
  33683. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 (
  33684. .A(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  33685. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  33686. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  33687. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  33688. .Cin(),
  33689. .Qin(),
  33690. .Clk(),
  33691. .AsyncReset(),
  33692. .SyncReset(),
  33693. .ShiftData(),
  33694. .SyncLoad(),
  33695. .LutOut(\macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout ),
  33696. .Cout(),
  33697. .Q());
  33698. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .coord_x = 18;
  33699. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .coord_y = 9;
  33700. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .coord_z = 4;
  33701. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .mask = 16'h0800;
  33702. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .modeMux = 1'b0;
  33703. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .FeedbackMux = 1'b0;
  33704. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .ShiftMux = 1'b0;
  33705. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .BypassEn = 1'b0;
  33706. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0 .CarryEnb = 1'b1;
  33707. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[10] (
  33708. .A(vcc),
  33709. .B(vcc),
  33710. .C(vcc),
  33711. .D(\rv32.mem_ahb_hwdata[10] ),
  33712. .Cin(),
  33713. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [10]),
  33714. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ),
  33715. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  33716. .SyncReset(),
  33717. .ShiftData(),
  33718. .SyncLoad(),
  33719. .LutOut(\macro_inst|cfg_reg_inst|trig_auto_timeout[10]~1_combout ),
  33720. .Cout(),
  33721. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [10]));
  33722. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .coord_x = 16;
  33723. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .coord_y = 10;
  33724. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .coord_z = 14;
  33725. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .mask = 16'h00FF;
  33726. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .modeMux = 1'b0;
  33727. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .FeedbackMux = 1'b0;
  33728. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .ShiftMux = 1'b0;
  33729. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .BypassEn = 1'b0;
  33730. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[10] .CarryEnb = 1'b1;
  33731. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[11] (
  33732. .A(\macro_inst|cfg_reg_inst|prdata[10]~2_combout ),
  33733. .B(\macro_inst|cfg_reg_inst|frequency [11]),
  33734. .C(\rv32.mem_ahb_hwdata[11] ),
  33735. .D(\macro_inst|cfg_reg_inst|prdata[10]~1_combout ),
  33736. .Cin(),
  33737. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [11]),
  33738. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ),
  33739. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  33740. .SyncReset(SyncReset_X58_Y9_GND),
  33741. .ShiftData(),
  33742. .SyncLoad(SyncLoad_X58_Y9_VCC),
  33743. .LutOut(\macro_inst|cfg_reg_inst|Selector14~0_combout ),
  33744. .Cout(),
  33745. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [11]));
  33746. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .coord_x = 16;
  33747. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .coord_y = 10;
  33748. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .coord_z = 13;
  33749. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .mask = 16'hD8AA;
  33750. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .modeMux = 1'b0;
  33751. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .FeedbackMux = 1'b1;
  33752. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .ShiftMux = 1'b0;
  33753. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .BypassEn = 1'b1;
  33754. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[11] .CarryEnb = 1'b1;
  33755. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[12] (
  33756. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [12]),
  33757. .B(vcc),
  33758. .C(\rv32.mem_ahb_hwdata[12] ),
  33759. .D(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33760. .Cin(),
  33761. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [12]),
  33762. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  33763. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  33764. .SyncReset(SyncReset_X60_Y7_GND),
  33765. .ShiftData(),
  33766. .SyncLoad(SyncLoad_X60_Y7_VCC),
  33767. .LutOut(\macro_inst|cfg_reg_inst|Selector13~0_combout ),
  33768. .Cout(),
  33769. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [12]));
  33770. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .coord_x = 19;
  33771. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .coord_y = 9;
  33772. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .coord_z = 13;
  33773. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .mask = 16'hF0AA;
  33774. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .modeMux = 1'b0;
  33775. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .FeedbackMux = 1'b1;
  33776. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .ShiftMux = 1'b0;
  33777. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .BypassEn = 1'b1;
  33778. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[12] .CarryEnb = 1'b1;
  33779. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[13] (
  33780. .A(vcc),
  33781. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [13]),
  33782. .C(\rv32.mem_ahb_hwdata[13] ),
  33783. .D(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33784. .Cin(),
  33785. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [13]),
  33786. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  33787. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  33788. .SyncReset(SyncReset_X60_Y7_GND),
  33789. .ShiftData(),
  33790. .SyncLoad(SyncLoad_X60_Y7_VCC),
  33791. .LutOut(\macro_inst|cfg_reg_inst|Selector12~0_combout ),
  33792. .Cout(),
  33793. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [13]));
  33794. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .coord_x = 19;
  33795. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .coord_y = 9;
  33796. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .coord_z = 14;
  33797. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .mask = 16'hF0CC;
  33798. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .modeMux = 1'b0;
  33799. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .FeedbackMux = 1'b1;
  33800. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .ShiftMux = 1'b0;
  33801. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .BypassEn = 1'b1;
  33802. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[13] .CarryEnb = 1'b1;
  33803. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[14] (
  33804. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [14]),
  33805. .B(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33806. .C(\rv32.mem_ahb_hwdata[14] ),
  33807. .D(\macro_inst|cfg_reg_inst|Selector13~1_combout ),
  33808. .Cin(),
  33809. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [14]),
  33810. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  33811. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  33812. .SyncReset(SyncReset_X60_Y7_GND),
  33813. .ShiftData(),
  33814. .SyncLoad(SyncLoad_X60_Y7_VCC),
  33815. .LutOut(\macro_inst|cfg_reg_inst|Selector11~0_combout ),
  33816. .Cout(),
  33817. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [14]));
  33818. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .coord_x = 19;
  33819. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .coord_y = 9;
  33820. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .coord_z = 12;
  33821. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .mask = 16'h00E2;
  33822. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .modeMux = 1'b0;
  33823. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .FeedbackMux = 1'b1;
  33824. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .ShiftMux = 1'b0;
  33825. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .BypassEn = 1'b1;
  33826. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[14] .CarryEnb = 1'b1;
  33827. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[15] (
  33828. .A(vcc),
  33829. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [15]),
  33830. .C(\rv32.mem_ahb_hwdata[15] ),
  33831. .D(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33832. .Cin(),
  33833. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [15]),
  33834. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  33835. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  33836. .SyncReset(SyncReset_X60_Y7_GND),
  33837. .ShiftData(),
  33838. .SyncLoad(SyncLoad_X60_Y7_VCC),
  33839. .LutOut(\macro_inst|cfg_reg_inst|Selector10~0_combout ),
  33840. .Cout(),
  33841. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [15]));
  33842. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .coord_x = 19;
  33843. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .coord_y = 9;
  33844. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .coord_z = 11;
  33845. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .mask = 16'hF0CC;
  33846. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .modeMux = 1'b0;
  33847. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .FeedbackMux = 1'b1;
  33848. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .ShiftMux = 1'b0;
  33849. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .BypassEn = 1'b1;
  33850. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[15] .CarryEnb = 1'b1;
  33851. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[1] (
  33852. .A(\macro_inst|cfg_reg_inst|trig_edge [1]),
  33853. .B(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33854. .C(\rv32.mem_ahb_hwdata[1] ),
  33855. .D(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33856. .Cin(),
  33857. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [1]),
  33858. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y6_SIG_SIG ),
  33859. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  33860. .SyncReset(SyncReset_X60_Y6_GND),
  33861. .ShiftData(),
  33862. .SyncLoad(SyncLoad_X60_Y6_VCC),
  33863. .LutOut(\macro_inst|cfg_reg_inst|Selector24~7_combout ),
  33864. .Cout(),
  33865. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [1]));
  33866. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .coord_x = 19;
  33867. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .coord_y = 8;
  33868. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .coord_z = 6;
  33869. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .mask = 16'hEAC0;
  33870. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .modeMux = 1'b0;
  33871. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .FeedbackMux = 1'b1;
  33872. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .ShiftMux = 1'b0;
  33873. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .BypassEn = 1'b1;
  33874. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[1] .CarryEnb = 1'b1;
  33875. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[2] (
  33876. .A(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33877. .B(\macro_inst|cfg_reg_inst|trig_mode [0]),
  33878. .C(\rv32.mem_ahb_hwdata[2] ),
  33879. .D(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33880. .Cin(),
  33881. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [2]),
  33882. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  33883. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  33884. .SyncReset(SyncReset_X60_Y7_GND),
  33885. .ShiftData(),
  33886. .SyncLoad(SyncLoad_X60_Y7_VCC),
  33887. .LutOut(\macro_inst|cfg_reg_inst|Selector23~3_combout ),
  33888. .Cout(),
  33889. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [2]));
  33890. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .coord_x = 19;
  33891. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .coord_y = 9;
  33892. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .coord_z = 10;
  33893. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .mask = 16'hF888;
  33894. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .modeMux = 1'b0;
  33895. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .FeedbackMux = 1'b1;
  33896. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .ShiftMux = 1'b0;
  33897. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .BypassEn = 1'b1;
  33898. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[2] .CarryEnb = 1'b1;
  33899. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[3] (
  33900. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33901. .B(\macro_inst|cfg_reg_inst|trig_mode [1]),
  33902. .C(\rv32.mem_ahb_hwdata[3] ),
  33903. .D(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33904. .Cin(),
  33905. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [3]),
  33906. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X59_Y6_SIG_SIG ),
  33907. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  33908. .SyncReset(SyncReset_X59_Y6_GND),
  33909. .ShiftData(),
  33910. .SyncLoad(SyncLoad_X59_Y6_VCC),
  33911. .LutOut(\macro_inst|cfg_reg_inst|Selector22~3_combout ),
  33912. .Cout(),
  33913. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [3]));
  33914. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .coord_x = 18;
  33915. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .coord_y = 8;
  33916. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .coord_z = 9;
  33917. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .mask = 16'hECA0;
  33918. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .modeMux = 1'b0;
  33919. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .FeedbackMux = 1'b1;
  33920. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .ShiftMux = 1'b0;
  33921. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .BypassEn = 1'b1;
  33922. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[3] .CarryEnb = 1'b1;
  33923. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[4] (
  33924. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33925. .B(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33926. .C(\rv32.mem_ahb_hwdata[4] ),
  33927. .D(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  33928. .Cin(),
  33929. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [4]),
  33930. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X59_Y6_SIG_SIG ),
  33931. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  33932. .SyncReset(SyncReset_X59_Y6_GND),
  33933. .ShiftData(),
  33934. .SyncLoad(SyncLoad_X59_Y6_VCC),
  33935. .LutOut(\macro_inst|cfg_reg_inst|Selector21~3_combout ),
  33936. .Cout(),
  33937. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [4]));
  33938. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .coord_x = 18;
  33939. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .coord_y = 8;
  33940. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .coord_z = 8;
  33941. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .mask = 16'hA0EC;
  33942. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .modeMux = 1'b0;
  33943. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .FeedbackMux = 1'b1;
  33944. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .ShiftMux = 1'b0;
  33945. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .BypassEn = 1'b1;
  33946. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[4] .CarryEnb = 1'b1;
  33947. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[5] (
  33948. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33949. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [5]),
  33950. .C(\rv32.mem_ahb_hwdata[5] ),
  33951. .D(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  33952. .Cin(),
  33953. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [5]),
  33954. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ),
  33955. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  33956. .SyncReset(SyncReset_X58_Y9_GND),
  33957. .ShiftData(),
  33958. .SyncLoad(SyncLoad_X58_Y9_VCC),
  33959. .LutOut(\macro_inst|cfg_reg_inst|Selector20~2_combout ),
  33960. .Cout(),
  33961. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [5]));
  33962. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .coord_x = 16;
  33963. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .coord_y = 10;
  33964. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .coord_z = 11;
  33965. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .mask = 16'hECA0;
  33966. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .modeMux = 1'b0;
  33967. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .FeedbackMux = 1'b1;
  33968. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .ShiftMux = 1'b0;
  33969. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .BypassEn = 1'b1;
  33970. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[5] .CarryEnb = 1'b1;
  33971. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[6] (
  33972. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33973. .B(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  33974. .C(\rv32.mem_ahb_hwdata[6] ),
  33975. .D(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  33976. .Cin(),
  33977. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [6]),
  33978. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y6_SIG_SIG ),
  33979. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  33980. .SyncReset(SyncReset_X60_Y6_GND),
  33981. .ShiftData(),
  33982. .SyncLoad(SyncLoad_X60_Y6_VCC),
  33983. .LutOut(\macro_inst|cfg_reg_inst|Selector19~2_combout ),
  33984. .Cout(),
  33985. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [6]));
  33986. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .coord_x = 19;
  33987. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .coord_y = 8;
  33988. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .coord_z = 13;
  33989. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .mask = 16'hECA0;
  33990. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .modeMux = 1'b0;
  33991. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .FeedbackMux = 1'b1;
  33992. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .ShiftMux = 1'b0;
  33993. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .BypassEn = 1'b1;
  33994. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[6] .CarryEnb = 1'b1;
  33995. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[7] (
  33996. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  33997. .B(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  33998. .C(\rv32.mem_ahb_hwdata[7] ),
  33999. .D(\macro_inst|cfg_reg_inst|max_vol [7]),
  34000. .Cin(),
  34001. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [7]),
  34002. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X58_Y9_SIG_SIG ),
  34003. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  34004. .SyncReset(SyncReset_X58_Y9_GND),
  34005. .ShiftData(),
  34006. .SyncLoad(SyncLoad_X58_Y9_VCC),
  34007. .LutOut(\macro_inst|cfg_reg_inst|Selector18~3_combout ),
  34008. .Cout(),
  34009. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [7]));
  34010. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .coord_x = 16;
  34011. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .coord_y = 10;
  34012. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .coord_z = 1;
  34013. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .mask = 16'hA0EC;
  34014. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .modeMux = 1'b0;
  34015. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .FeedbackMux = 1'b1;
  34016. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .ShiftMux = 1'b0;
  34017. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .BypassEn = 1'b1;
  34018. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[7] .CarryEnb = 1'b1;
  34019. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[8] (
  34020. .A(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  34021. .B(\macro_inst|cfg_reg_inst|Equal4~2_combout ),
  34022. .C(\rv32.mem_ahb_hwdata[8] ),
  34023. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  34024. .Cin(),
  34025. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [8]),
  34026. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X59_Y6_SIG_SIG ),
  34027. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  34028. .SyncReset(SyncReset_X59_Y6_GND),
  34029. .ShiftData(),
  34030. .SyncLoad(SyncLoad_X59_Y6_VCC),
  34031. .LutOut(\macro_inst|cfg_reg_inst|Selector17~0_combout ),
  34032. .Cout(),
  34033. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [8]));
  34034. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .coord_x = 18;
  34035. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .coord_y = 8;
  34036. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .coord_z = 15;
  34037. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .mask = 16'hECA0;
  34038. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .modeMux = 1'b0;
  34039. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .FeedbackMux = 1'b1;
  34040. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .ShiftMux = 1'b0;
  34041. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .BypassEn = 1'b1;
  34042. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[8] .CarryEnb = 1'b1;
  34043. alta_slice \macro_inst|cfg_reg_inst|trig_auto_timeout[9] (
  34044. .A(vcc),
  34045. .B(vcc),
  34046. .C(\rv32.mem_ahb_hwdata[9] ),
  34047. .D(vcc),
  34048. .Cin(\macro_inst|trig_ctrl_inst|Add3~31 ),
  34049. .Qin(\macro_inst|cfg_reg_inst|trig_auto_timeout [9]),
  34050. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_auto_timeout[0]~0_combout_X60_Y7_SIG_SIG ),
  34051. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34052. .SyncReset(SyncReset_X60_Y7_GND),
  34053. .ShiftData(),
  34054. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34055. .LutOut(\macro_inst|trig_ctrl_inst|Add3~32_combout ),
  34056. .Cout(),
  34057. .Q(\macro_inst|cfg_reg_inst|trig_auto_timeout [9]));
  34058. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .coord_x = 19;
  34059. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .coord_y = 9;
  34060. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .coord_z = 8;
  34061. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .mask = 16'h0F0F;
  34062. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .modeMux = 1'b1;
  34063. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .FeedbackMux = 1'b0;
  34064. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .ShiftMux = 1'b0;
  34065. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .BypassEn = 1'b1;
  34066. defparam \macro_inst|cfg_reg_inst|trig_auto_timeout[9] .CarryEnb = 1'b1;
  34067. alta_slice \macro_inst|cfg_reg_inst|trig_edge[0] (
  34068. .A(\macro_inst|cfg_reg_inst|trig_edge [1]),
  34069. .B(vcc),
  34070. .C(\rv32.mem_ahb_hwdata[0] ),
  34071. .D(vcc),
  34072. .Cin(),
  34073. .Qin(\macro_inst|cfg_reg_inst|trig_edge [0]),
  34074. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y6_SIG_SIG ),
  34075. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  34076. .SyncReset(SyncReset_X60_Y6_GND),
  34077. .ShiftData(),
  34078. .SyncLoad(SyncLoad_X60_Y6_VCC),
  34079. .LutOut(\macro_inst|trig_ctrl_inst|always4~0_combout ),
  34080. .Cout(),
  34081. .Q(\macro_inst|cfg_reg_inst|trig_edge [0]));
  34082. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .coord_x = 19;
  34083. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .coord_y = 8;
  34084. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .coord_z = 3;
  34085. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .mask = 16'hA0A0;
  34086. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .modeMux = 1'b0;
  34087. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .FeedbackMux = 1'b1;
  34088. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .ShiftMux = 1'b0;
  34089. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .BypassEn = 1'b1;
  34090. defparam \macro_inst|cfg_reg_inst|trig_edge[0] .CarryEnb = 1'b1;
  34091. alta_slice \macro_inst|cfg_reg_inst|trig_edge[1] (
  34092. .A(\macro_inst|cfg_reg_inst|trig_edge [0]),
  34093. .B(\macro_inst|trig_ctrl_inst|LessThan4~22_combout ),
  34094. .C(\rv32.mem_ahb_hwdata[1] ),
  34095. .D(\macro_inst|trig_ctrl_inst|LessThan5~22_combout ),
  34096. .Cin(),
  34097. .Qin(\macro_inst|cfg_reg_inst|trig_edge [1]),
  34098. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y6_SIG_SIG ),
  34099. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  34100. .SyncReset(SyncReset_X60_Y6_GND),
  34101. .ShiftData(),
  34102. .SyncLoad(SyncLoad_X60_Y6_VCC),
  34103. .LutOut(\macro_inst|trig_ctrl_inst|edge_trigger~1_combout ),
  34104. .Cout(),
  34105. .Q(\macro_inst|cfg_reg_inst|trig_edge [1]));
  34106. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .coord_x = 19;
  34107. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .coord_y = 8;
  34108. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .coord_z = 14;
  34109. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .mask = 16'h0048;
  34110. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .modeMux = 1'b0;
  34111. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .FeedbackMux = 1'b1;
  34112. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .ShiftMux = 1'b0;
  34113. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .BypassEn = 1'b1;
  34114. defparam \macro_inst|cfg_reg_inst|trig_edge[1] .CarryEnb = 1'b1;
  34115. alta_slice \macro_inst|cfg_reg_inst|trig_mode[0] (
  34116. .A(),
  34117. .B(),
  34118. .C(vcc),
  34119. .D(\rv32.mem_ahb_hwdata[2] ),
  34120. .Cin(),
  34121. .Qin(\macro_inst|cfg_reg_inst|trig_mode [0]),
  34122. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ),
  34123. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  34124. .SyncReset(),
  34125. .ShiftData(),
  34126. .SyncLoad(),
  34127. .LutOut(\macro_inst|cfg_reg_inst|trig_mode[0]__feeder__LutOut ),
  34128. .Cout(),
  34129. .Q(\macro_inst|cfg_reg_inst|trig_mode [0]));
  34130. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .coord_x = 18;
  34131. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .coord_y = 8;
  34132. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .coord_z = 6;
  34133. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .mask = 16'hFF00;
  34134. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .modeMux = 1'b1;
  34135. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .FeedbackMux = 1'b0;
  34136. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .ShiftMux = 1'b0;
  34137. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .BypassEn = 1'b0;
  34138. defparam \macro_inst|cfg_reg_inst|trig_mode[0] .CarryEnb = 1'b1;
  34139. alta_slice \macro_inst|cfg_reg_inst|trig_mode[1] (
  34140. .A(),
  34141. .B(),
  34142. .C(vcc),
  34143. .D(\rv32.mem_ahb_hwdata[3] ),
  34144. .Cin(),
  34145. .Qin(\macro_inst|cfg_reg_inst|trig_mode [1]),
  34146. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ),
  34147. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  34148. .SyncReset(),
  34149. .ShiftData(),
  34150. .SyncLoad(),
  34151. .LutOut(\macro_inst|cfg_reg_inst|trig_mode[1]__feeder__LutOut ),
  34152. .Cout(),
  34153. .Q(\macro_inst|cfg_reg_inst|trig_mode [1]));
  34154. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .coord_x = 18;
  34155. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .coord_y = 8;
  34156. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .coord_z = 13;
  34157. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .mask = 16'hFF00;
  34158. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .modeMux = 1'b1;
  34159. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .FeedbackMux = 1'b0;
  34160. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .ShiftMux = 1'b0;
  34161. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .BypassEn = 1'b0;
  34162. defparam \macro_inst|cfg_reg_inst|trig_mode[1] .CarryEnb = 1'b1;
  34163. alta_slice \macro_inst|cfg_reg_inst|trig_mode[1]~0 (
  34164. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  34165. .B(\macro_inst|cfg_reg_inst|Equal4~0_combout ),
  34166. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  34167. .D(\macro_inst|cfg_reg_inst|always0~0_combout ),
  34168. .Cin(),
  34169. .Qin(),
  34170. .Clk(),
  34171. .AsyncReset(),
  34172. .SyncReset(),
  34173. .ShiftData(),
  34174. .SyncLoad(),
  34175. .LutOut(\macro_inst|cfg_reg_inst|trig_mode[1]~0_combout ),
  34176. .Cout(),
  34177. .Q());
  34178. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .coord_x = 17;
  34179. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .coord_y = 11;
  34180. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .coord_z = 10;
  34181. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .mask = 16'h0400;
  34182. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .modeMux = 1'b0;
  34183. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .FeedbackMux = 1'b0;
  34184. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .ShiftMux = 1'b0;
  34185. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .BypassEn = 1'b0;
  34186. defparam \macro_inst|cfg_reg_inst|trig_mode[1]~0 .CarryEnb = 1'b1;
  34187. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[0] (
  34188. .A(\macro_inst|cfg_reg_inst|max_vol [0]),
  34189. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34190. .C(\rv32.mem_ahb_hwdata[0] ),
  34191. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  34192. .Cin(),
  34193. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [0]),
  34194. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34195. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34196. .SyncReset(SyncReset_X60_Y8_GND),
  34197. .ShiftData(),
  34198. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34199. .LutOut(\macro_inst|cfg_reg_inst|Selector25~5_combout ),
  34200. .Cout(),
  34201. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [0]));
  34202. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .coord_x = 19;
  34203. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .coord_y = 10;
  34204. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .coord_z = 5;
  34205. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .mask = 16'hEAC0;
  34206. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .modeMux = 1'b0;
  34207. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .FeedbackMux = 1'b1;
  34208. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .ShiftMux = 1'b0;
  34209. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .BypassEn = 1'b1;
  34210. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0] .CarryEnb = 1'b1;
  34211. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 (
  34212. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  34213. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  34214. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  34215. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  34216. .Cin(),
  34217. .Qin(),
  34218. .Clk(),
  34219. .AsyncReset(),
  34220. .SyncReset(),
  34221. .ShiftData(),
  34222. .SyncLoad(),
  34223. .LutOut(\macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout ),
  34224. .Cout(),
  34225. .Q());
  34226. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .coord_x = 17;
  34227. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .coord_y = 11;
  34228. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .coord_z = 4;
  34229. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .mask = 16'h8000;
  34230. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .modeMux = 1'b0;
  34231. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .FeedbackMux = 1'b0;
  34232. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .ShiftMux = 1'b0;
  34233. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .BypassEn = 1'b0;
  34234. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[0]~2 .CarryEnb = 1'b1;
  34235. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[10] (
  34236. .A(vcc),
  34237. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [10]),
  34238. .C(\rv32.mem_ahb_hwdata[10] ),
  34239. .D(vcc),
  34240. .Cin(\macro_inst|trig_ctrl_inst|Add3~19 ),
  34241. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [10]),
  34242. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34243. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34244. .SyncReset(SyncReset_X60_Y7_GND),
  34245. .ShiftData(),
  34246. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34247. .LutOut(\macro_inst|trig_ctrl_inst|Add3~20_combout ),
  34248. .Cout(\macro_inst|trig_ctrl_inst|Add3~21 ),
  34249. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [10]));
  34250. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .coord_x = 19;
  34251. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .coord_y = 9;
  34252. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .coord_z = 2;
  34253. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .mask = 16'h3CCF;
  34254. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .modeMux = 1'b1;
  34255. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .FeedbackMux = 1'b0;
  34256. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .ShiftMux = 1'b0;
  34257. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .BypassEn = 1'b1;
  34258. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[10] .CarryEnb = 1'b0;
  34259. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[11] (
  34260. .A(vcc),
  34261. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [11]),
  34262. .C(\rv32.mem_ahb_hwdata[11] ),
  34263. .D(vcc),
  34264. .Cin(\macro_inst|trig_ctrl_inst|Add3~21 ),
  34265. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [11]),
  34266. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34267. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34268. .SyncReset(SyncReset_X60_Y7_GND),
  34269. .ShiftData(),
  34270. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34271. .LutOut(\macro_inst|trig_ctrl_inst|Add3~22_combout ),
  34272. .Cout(\macro_inst|trig_ctrl_inst|Add3~23 ),
  34273. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [11]));
  34274. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .coord_x = 19;
  34275. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .coord_y = 9;
  34276. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .coord_z = 3;
  34277. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .mask = 16'hC303;
  34278. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .modeMux = 1'b1;
  34279. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .FeedbackMux = 1'b0;
  34280. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .ShiftMux = 1'b0;
  34281. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .BypassEn = 1'b1;
  34282. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[11] .CarryEnb = 1'b0;
  34283. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[12] (
  34284. .A(vcc),
  34285. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [12]),
  34286. .C(\rv32.mem_ahb_hwdata[12] ),
  34287. .D(vcc),
  34288. .Cin(\macro_inst|trig_ctrl_inst|Add3~23 ),
  34289. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [12]),
  34290. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34291. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34292. .SyncReset(SyncReset_X60_Y7_GND),
  34293. .ShiftData(),
  34294. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34295. .LutOut(\macro_inst|trig_ctrl_inst|Add3~24_combout ),
  34296. .Cout(\macro_inst|trig_ctrl_inst|Add3~25 ),
  34297. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [12]));
  34298. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .coord_x = 19;
  34299. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .coord_y = 9;
  34300. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .coord_z = 4;
  34301. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .mask = 16'h3CCF;
  34302. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .modeMux = 1'b1;
  34303. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .FeedbackMux = 1'b0;
  34304. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .ShiftMux = 1'b0;
  34305. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .BypassEn = 1'b1;
  34306. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[12] .CarryEnb = 1'b0;
  34307. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[13] (
  34308. .A(vcc),
  34309. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [13]),
  34310. .C(\rv32.mem_ahb_hwdata[13] ),
  34311. .D(vcc),
  34312. .Cin(\macro_inst|trig_ctrl_inst|Add3~25 ),
  34313. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [13]),
  34314. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34315. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34316. .SyncReset(SyncReset_X60_Y7_GND),
  34317. .ShiftData(),
  34318. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34319. .LutOut(\macro_inst|trig_ctrl_inst|Add3~26_combout ),
  34320. .Cout(\macro_inst|trig_ctrl_inst|Add3~27 ),
  34321. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [13]));
  34322. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .coord_x = 19;
  34323. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .coord_y = 9;
  34324. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .coord_z = 5;
  34325. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .mask = 16'hC303;
  34326. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .modeMux = 1'b1;
  34327. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .FeedbackMux = 1'b0;
  34328. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .ShiftMux = 1'b0;
  34329. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .BypassEn = 1'b1;
  34330. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[13] .CarryEnb = 1'b0;
  34331. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[14] (
  34332. .A(vcc),
  34333. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [14]),
  34334. .C(\rv32.mem_ahb_hwdata[14] ),
  34335. .D(vcc),
  34336. .Cin(\macro_inst|trig_ctrl_inst|Add3~27 ),
  34337. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [14]),
  34338. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34339. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34340. .SyncReset(SyncReset_X60_Y7_GND),
  34341. .ShiftData(),
  34342. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34343. .LutOut(\macro_inst|trig_ctrl_inst|Add3~28_combout ),
  34344. .Cout(\macro_inst|trig_ctrl_inst|Add3~29 ),
  34345. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [14]));
  34346. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .coord_x = 19;
  34347. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .coord_y = 9;
  34348. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .coord_z = 6;
  34349. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .mask = 16'h3CCF;
  34350. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .modeMux = 1'b1;
  34351. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .FeedbackMux = 1'b0;
  34352. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .ShiftMux = 1'b0;
  34353. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .BypassEn = 1'b1;
  34354. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[14] .CarryEnb = 1'b0;
  34355. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[15] (
  34356. .A(vcc),
  34357. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [15]),
  34358. .C(\rv32.mem_ahb_hwdata[15] ),
  34359. .D(vcc),
  34360. .Cin(\macro_inst|trig_ctrl_inst|Add3~29 ),
  34361. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [15]),
  34362. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34363. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34364. .SyncReset(SyncReset_X60_Y7_GND),
  34365. .ShiftData(),
  34366. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34367. .LutOut(\macro_inst|trig_ctrl_inst|Add3~30_combout ),
  34368. .Cout(\macro_inst|trig_ctrl_inst|Add3~31 ),
  34369. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [15]));
  34370. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .coord_x = 19;
  34371. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .coord_y = 9;
  34372. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .coord_z = 7;
  34373. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .mask = 16'hC303;
  34374. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .modeMux = 1'b1;
  34375. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .FeedbackMux = 1'b0;
  34376. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .ShiftMux = 1'b0;
  34377. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .BypassEn = 1'b1;
  34378. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[15] .CarryEnb = 1'b0;
  34379. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[1] (
  34380. .A(vcc),
  34381. .B(vcc),
  34382. .C(vcc),
  34383. .D(\rv32.mem_ahb_hwdata[1] ),
  34384. .Cin(),
  34385. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [1]),
  34386. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34387. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34388. .SyncReset(),
  34389. .ShiftData(),
  34390. .SyncLoad(),
  34391. .LutOut(\macro_inst|cfg_reg_inst|trig_pulse_width[1]~3_combout ),
  34392. .Cout(),
  34393. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [1]));
  34394. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .coord_x = 19;
  34395. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .coord_y = 10;
  34396. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .coord_z = 1;
  34397. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .mask = 16'h00FF;
  34398. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .modeMux = 1'b0;
  34399. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .FeedbackMux = 1'b0;
  34400. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .ShiftMux = 1'b0;
  34401. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .BypassEn = 1'b0;
  34402. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[1] .CarryEnb = 1'b1;
  34403. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[2] (
  34404. .A(\macro_inst|cfg_reg_inst|max_vol [2]),
  34405. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34406. .C(\rv32.mem_ahb_hwdata[2] ),
  34407. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  34408. .Cin(),
  34409. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [2]),
  34410. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34411. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34412. .SyncReset(SyncReset_X60_Y8_GND),
  34413. .ShiftData(),
  34414. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34415. .LutOut(\macro_inst|cfg_reg_inst|Selector23~1_combout ),
  34416. .Cout(),
  34417. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [2]));
  34418. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .coord_x = 19;
  34419. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .coord_y = 10;
  34420. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .coord_z = 2;
  34421. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .mask = 16'hD5C0;
  34422. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .modeMux = 1'b0;
  34423. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .FeedbackMux = 1'b1;
  34424. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .ShiftMux = 1'b0;
  34425. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .BypassEn = 1'b1;
  34426. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[2] .CarryEnb = 1'b1;
  34427. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[3] (
  34428. .A(vcc),
  34429. .B(vcc),
  34430. .C(\rv32.mem_ahb_hwdata[3] ),
  34431. .D(vcc),
  34432. .Cin(),
  34433. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [3]),
  34434. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34435. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34436. .SyncReset(),
  34437. .ShiftData(),
  34438. .SyncLoad(),
  34439. .LutOut(\macro_inst|cfg_reg_inst|trig_pulse_width[3]~4_combout ),
  34440. .Cout(),
  34441. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [3]));
  34442. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .coord_x = 19;
  34443. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .coord_y = 10;
  34444. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .coord_z = 6;
  34445. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .mask = 16'h0F0F;
  34446. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .modeMux = 1'b0;
  34447. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .FeedbackMux = 1'b0;
  34448. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .ShiftMux = 1'b0;
  34449. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .BypassEn = 1'b0;
  34450. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[3] .CarryEnb = 1'b1;
  34451. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[4] (
  34452. .A(\macro_inst|cfg_reg_inst|max_vol [4]),
  34453. .B(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  34454. .C(\rv32.mem_ahb_hwdata[4] ),
  34455. .D(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34456. .Cin(),
  34457. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [4]),
  34458. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34459. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34460. .SyncReset(SyncReset_X60_Y8_GND),
  34461. .ShiftData(),
  34462. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34463. .LutOut(\macro_inst|cfg_reg_inst|Selector21~1_combout ),
  34464. .Cout(),
  34465. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [4]));
  34466. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .coord_x = 19;
  34467. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .coord_y = 10;
  34468. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .coord_z = 0;
  34469. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .mask = 16'hF888;
  34470. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .modeMux = 1'b0;
  34471. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .FeedbackMux = 1'b1;
  34472. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .ShiftMux = 1'b0;
  34473. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .BypassEn = 1'b1;
  34474. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[4] .CarryEnb = 1'b1;
  34475. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[5] (
  34476. .A(vcc),
  34477. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [5]),
  34478. .C(\rv32.mem_ahb_hwdata[5] ),
  34479. .D(vcc),
  34480. .Cin(\macro_inst|trig_ctrl_inst|Add3~9 ),
  34481. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [5]),
  34482. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34483. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34484. .SyncReset(SyncReset_X60_Y8_GND),
  34485. .ShiftData(),
  34486. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34487. .LutOut(\macro_inst|trig_ctrl_inst|Add3~10_combout ),
  34488. .Cout(\macro_inst|trig_ctrl_inst|Add3~11 ),
  34489. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [5]));
  34490. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .coord_x = 19;
  34491. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .coord_y = 10;
  34492. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .coord_z = 13;
  34493. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .mask = 16'hC303;
  34494. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .modeMux = 1'b1;
  34495. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .FeedbackMux = 1'b0;
  34496. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .ShiftMux = 1'b0;
  34497. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .BypassEn = 1'b1;
  34498. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[5] .CarryEnb = 1'b0;
  34499. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[6] (
  34500. .A(\macro_inst|cfg_reg_inst|max_vol [6]),
  34501. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34502. .C(\rv32.mem_ahb_hwdata[6] ),
  34503. .D(\macro_inst|cfg_reg_inst|Equal9~0_combout ),
  34504. .Cin(),
  34505. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [6]),
  34506. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34507. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34508. .SyncReset(SyncReset_X60_Y8_GND),
  34509. .ShiftData(),
  34510. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34511. .LutOut(\macro_inst|cfg_reg_inst|Selector19~1_combout ),
  34512. .Cout(),
  34513. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [6]));
  34514. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .coord_x = 19;
  34515. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .coord_y = 10;
  34516. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .coord_z = 7;
  34517. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .mask = 16'hEAC0;
  34518. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .modeMux = 1'b0;
  34519. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .FeedbackMux = 1'b1;
  34520. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .ShiftMux = 1'b0;
  34521. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .BypassEn = 1'b1;
  34522. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[6] .CarryEnb = 1'b1;
  34523. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[7] (
  34524. .A(vcc),
  34525. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [7]),
  34526. .C(\rv32.mem_ahb_hwdata[7] ),
  34527. .D(vcc),
  34528. .Cin(\macro_inst|trig_ctrl_inst|Add3~13 ),
  34529. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [7]),
  34530. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y8_SIG_SIG ),
  34531. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  34532. .SyncReset(SyncReset_X60_Y8_GND),
  34533. .ShiftData(),
  34534. .SyncLoad(SyncLoad_X60_Y8_VCC),
  34535. .LutOut(\macro_inst|trig_ctrl_inst|Add3~14_combout ),
  34536. .Cout(\macro_inst|trig_ctrl_inst|Add3~15 ),
  34537. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [7]));
  34538. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .coord_x = 19;
  34539. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .coord_y = 10;
  34540. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .coord_z = 15;
  34541. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .mask = 16'hC303;
  34542. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .modeMux = 1'b1;
  34543. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .FeedbackMux = 1'b0;
  34544. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .ShiftMux = 1'b0;
  34545. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .BypassEn = 1'b1;
  34546. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[7] .CarryEnb = 1'b0;
  34547. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[8] (
  34548. .A(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  34549. .B(\macro_inst|cfg_reg_inst|Equal2~1_combout ),
  34550. .C(\rv32.mem_ahb_hwdata[8] ),
  34551. .D(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34552. .Cin(),
  34553. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [8]),
  34554. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34555. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34556. .SyncReset(SyncReset_X60_Y7_GND),
  34557. .ShiftData(),
  34558. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34559. .LutOut(\macro_inst|cfg_reg_inst|Selector17~2_combout ),
  34560. .Cout(),
  34561. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [8]));
  34562. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .coord_x = 19;
  34563. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .coord_y = 9;
  34564. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .coord_z = 15;
  34565. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .mask = 16'hF888;
  34566. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .modeMux = 1'b0;
  34567. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .FeedbackMux = 1'b1;
  34568. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .ShiftMux = 1'b0;
  34569. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .BypassEn = 1'b1;
  34570. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[8] .CarryEnb = 1'b1;
  34571. alta_slice \macro_inst|cfg_reg_inst|trig_pulse_width[9] (
  34572. .A(\macro_inst|cfg_reg_inst|Equal10~2_combout ),
  34573. .B(\macro_inst|cfg_reg_inst|Equal3~0_combout ),
  34574. .C(\rv32.mem_ahb_hwdata[9] ),
  34575. .D(\macro_inst|cfg_reg_inst|Equal5~0_combout ),
  34576. .Cin(),
  34577. .Qin(\macro_inst|cfg_reg_inst|trig_pulse_width [9]),
  34578. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_pulse_width[0]~2_combout_X60_Y7_SIG_SIG ),
  34579. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  34580. .SyncReset(SyncReset_X60_Y7_GND),
  34581. .ShiftData(),
  34582. .SyncLoad(SyncLoad_X60_Y7_VCC),
  34583. .LutOut(\macro_inst|cfg_reg_inst|Selector13~1_combout ),
  34584. .Cout(),
  34585. .Q(\macro_inst|cfg_reg_inst|trig_pulse_width [9]));
  34586. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .coord_x = 19;
  34587. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .coord_y = 9;
  34588. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .coord_z = 9;
  34589. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .mask = 16'hAABB;
  34590. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .modeMux = 1'b0;
  34591. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .FeedbackMux = 1'b0;
  34592. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .ShiftMux = 1'b0;
  34593. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .BypassEn = 1'b1;
  34594. defparam \macro_inst|cfg_reg_inst|trig_pulse_width[9] .CarryEnb = 1'b1;
  34595. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[0] (
  34596. .A(),
  34597. .B(),
  34598. .C(vcc),
  34599. .D(\rv32.mem_ahb_hwdata[0] ),
  34600. .Cin(),
  34601. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  34602. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34603. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34604. .SyncReset(),
  34605. .ShiftData(),
  34606. .SyncLoad(),
  34607. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[0]__feeder__LutOut ),
  34608. .Cout(),
  34609. .Q(\macro_inst|cfg_reg_inst|trig_threshold [0]));
  34610. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .coord_x = 19;
  34611. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .coord_y = 4;
  34612. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .coord_z = 13;
  34613. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .mask = 16'hFF00;
  34614. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .modeMux = 1'b1;
  34615. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .FeedbackMux = 1'b0;
  34616. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .ShiftMux = 1'b0;
  34617. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .BypassEn = 1'b0;
  34618. defparam \macro_inst|cfg_reg_inst|trig_threshold[0] .CarryEnb = 1'b1;
  34619. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[10] (
  34620. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [10]),
  34621. .B(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  34622. .C(\rv32.mem_ahb_hwdata[10] ),
  34623. .D(vcc),
  34624. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~19_cout ),
  34625. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  34626. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34627. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34628. .SyncReset(SyncReset_X58_Y4_GND),
  34629. .ShiftData(),
  34630. .SyncLoad(SyncLoad_X58_Y4_VCC),
  34631. .LutOut(),
  34632. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~21_cout ),
  34633. .Q(\macro_inst|cfg_reg_inst|trig_threshold [10]));
  34634. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .coord_x = 19;
  34635. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .coord_y = 4;
  34636. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .coord_z = 11;
  34637. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .mask = 16'h002B;
  34638. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .modeMux = 1'b1;
  34639. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .FeedbackMux = 1'b0;
  34640. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .ShiftMux = 1'b0;
  34641. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .BypassEn = 1'b1;
  34642. defparam \macro_inst|cfg_reg_inst|trig_threshold[10] .CarryEnb = 1'b0;
  34643. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[11] (
  34644. .A(vcc),
  34645. .B(vcc),
  34646. .C(vcc),
  34647. .D(\rv32.mem_ahb_hwdata[11] ),
  34648. .Cin(),
  34649. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  34650. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34651. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34652. .SyncReset(),
  34653. .ShiftData(),
  34654. .SyncLoad(),
  34655. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[11]~1_combout ),
  34656. .Cout(),
  34657. .Q(\macro_inst|cfg_reg_inst|trig_threshold [11]));
  34658. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .coord_x = 19;
  34659. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .coord_y = 5;
  34660. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .coord_z = 1;
  34661. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .mask = 16'h00FF;
  34662. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .modeMux = 1'b0;
  34663. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .FeedbackMux = 1'b0;
  34664. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .ShiftMux = 1'b0;
  34665. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .BypassEn = 1'b0;
  34666. defparam \macro_inst|cfg_reg_inst|trig_threshold[11] .CarryEnb = 1'b1;
  34667. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[11]~0 (
  34668. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  34669. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  34670. .C(\macro_inst|ahb2apb_inst|paddr [2]),
  34671. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  34672. .Cin(),
  34673. .Qin(),
  34674. .Clk(),
  34675. .AsyncReset(),
  34676. .SyncReset(),
  34677. .ShiftData(),
  34678. .SyncLoad(),
  34679. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout ),
  34680. .Cout(),
  34681. .Q());
  34682. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .coord_x = 17;
  34683. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .coord_y = 11;
  34684. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .coord_z = 7;
  34685. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .mask = 16'h0800;
  34686. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .modeMux = 1'b0;
  34687. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .FeedbackMux = 1'b0;
  34688. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .ShiftMux = 1'b0;
  34689. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .BypassEn = 1'b0;
  34690. defparam \macro_inst|cfg_reg_inst|trig_threshold[11]~0 .CarryEnb = 1'b1;
  34691. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[1] (
  34692. .A(),
  34693. .B(),
  34694. .C(vcc),
  34695. .D(\rv32.mem_ahb_hwdata[1] ),
  34696. .Cin(),
  34697. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  34698. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34699. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34700. .SyncReset(),
  34701. .ShiftData(),
  34702. .SyncLoad(),
  34703. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[1]__feeder__LutOut ),
  34704. .Cout(),
  34705. .Q(\macro_inst|cfg_reg_inst|trig_threshold [1]));
  34706. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .coord_x = 19;
  34707. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .coord_y = 5;
  34708. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .coord_z = 15;
  34709. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .mask = 16'hFF00;
  34710. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .modeMux = 1'b1;
  34711. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .FeedbackMux = 1'b0;
  34712. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .ShiftMux = 1'b0;
  34713. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .BypassEn = 1'b0;
  34714. defparam \macro_inst|cfg_reg_inst|trig_threshold[1] .CarryEnb = 1'b1;
  34715. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[2] (
  34716. .A(),
  34717. .B(),
  34718. .C(vcc),
  34719. .D(\rv32.mem_ahb_hwdata[2] ),
  34720. .Cin(),
  34721. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  34722. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34723. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34724. .SyncReset(),
  34725. .ShiftData(),
  34726. .SyncLoad(),
  34727. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[2]__feeder__LutOut ),
  34728. .Cout(),
  34729. .Q(\macro_inst|cfg_reg_inst|trig_threshold [2]));
  34730. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .coord_x = 19;
  34731. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .coord_y = 4;
  34732. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .coord_z = 15;
  34733. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .mask = 16'hFF00;
  34734. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .modeMux = 1'b1;
  34735. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .FeedbackMux = 1'b0;
  34736. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .ShiftMux = 1'b0;
  34737. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .BypassEn = 1'b0;
  34738. defparam \macro_inst|cfg_reg_inst|trig_threshold[2] .CarryEnb = 1'b1;
  34739. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[3] (
  34740. .A(\macro_inst|apb_adc0_inst|apb_db [3]),
  34741. .B(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  34742. .C(\rv32.mem_ahb_hwdata[3] ),
  34743. .D(vcc),
  34744. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~5_cout ),
  34745. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  34746. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34747. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34748. .SyncReset(SyncReset_X57_Y4_GND),
  34749. .ShiftData(),
  34750. .SyncLoad(SyncLoad_X57_Y4_VCC),
  34751. .LutOut(),
  34752. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~7_cout ),
  34753. .Q(\macro_inst|cfg_reg_inst|trig_threshold [3]));
  34754. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .coord_x = 19;
  34755. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .coord_y = 5;
  34756. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .coord_z = 6;
  34757. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .mask = 16'h002B;
  34758. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .modeMux = 1'b1;
  34759. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .FeedbackMux = 1'b0;
  34760. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .ShiftMux = 1'b0;
  34761. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .BypassEn = 1'b1;
  34762. defparam \macro_inst|cfg_reg_inst|trig_threshold[3] .CarryEnb = 1'b0;
  34763. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[4] (
  34764. .A(),
  34765. .B(),
  34766. .C(vcc),
  34767. .D(\rv32.mem_ahb_hwdata[4] ),
  34768. .Cin(),
  34769. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  34770. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34771. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34772. .SyncReset(),
  34773. .ShiftData(),
  34774. .SyncLoad(),
  34775. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[4]__feeder__LutOut ),
  34776. .Cout(),
  34777. .Q(\macro_inst|cfg_reg_inst|trig_threshold [4]));
  34778. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .coord_x = 19;
  34779. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .coord_y = 4;
  34780. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .coord_z = 0;
  34781. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .mask = 16'hFF00;
  34782. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .modeMux = 1'b1;
  34783. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .FeedbackMux = 1'b0;
  34784. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .ShiftMux = 1'b0;
  34785. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .BypassEn = 1'b0;
  34786. defparam \macro_inst|cfg_reg_inst|trig_threshold[4] .CarryEnb = 1'b1;
  34787. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[5] (
  34788. .A(\macro_inst|apb_adc0_inst|apb_db [5]),
  34789. .B(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  34790. .C(\rv32.mem_ahb_hwdata[5] ),
  34791. .D(vcc),
  34792. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~9_cout ),
  34793. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  34794. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34795. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34796. .SyncReset(SyncReset_X57_Y4_GND),
  34797. .ShiftData(),
  34798. .SyncLoad(SyncLoad_X57_Y4_VCC),
  34799. .LutOut(),
  34800. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~11_cout ),
  34801. .Q(\macro_inst|cfg_reg_inst|trig_threshold [5]));
  34802. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .coord_x = 19;
  34803. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .coord_y = 5;
  34804. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .coord_z = 8;
  34805. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .mask = 16'h002B;
  34806. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .modeMux = 1'b1;
  34807. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .FeedbackMux = 1'b0;
  34808. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .ShiftMux = 1'b0;
  34809. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .BypassEn = 1'b1;
  34810. defparam \macro_inst|cfg_reg_inst|trig_threshold[5] .CarryEnb = 1'b0;
  34811. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[6] (
  34812. .A(),
  34813. .B(),
  34814. .C(vcc),
  34815. .D(\rv32.mem_ahb_hwdata[6] ),
  34816. .Cin(),
  34817. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  34818. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34819. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34820. .SyncReset(),
  34821. .ShiftData(),
  34822. .SyncLoad(),
  34823. .LutOut(\macro_inst|cfg_reg_inst|trig_threshold[6]__feeder__LutOut ),
  34824. .Cout(),
  34825. .Q(\macro_inst|cfg_reg_inst|trig_threshold [6]));
  34826. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .coord_x = 19;
  34827. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .coord_y = 4;
  34828. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .coord_z = 14;
  34829. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .mask = 16'hFF00;
  34830. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .modeMux = 1'b1;
  34831. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .FeedbackMux = 1'b0;
  34832. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .ShiftMux = 1'b0;
  34833. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .BypassEn = 1'b0;
  34834. defparam \macro_inst|cfg_reg_inst|trig_threshold[6] .CarryEnb = 1'b1;
  34835. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[7] (
  34836. .A(\macro_inst|apb_adc0_inst|apb_db [7]),
  34837. .B(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  34838. .C(\rv32.mem_ahb_hwdata[7] ),
  34839. .D(vcc),
  34840. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~13_cout ),
  34841. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  34842. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34843. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34844. .SyncReset(SyncReset_X57_Y4_GND),
  34845. .ShiftData(),
  34846. .SyncLoad(SyncLoad_X57_Y4_VCC),
  34847. .LutOut(),
  34848. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~15_cout ),
  34849. .Q(\macro_inst|cfg_reg_inst|trig_threshold [7]));
  34850. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .coord_x = 19;
  34851. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .coord_y = 5;
  34852. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .coord_z = 10;
  34853. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .mask = 16'h002B;
  34854. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .modeMux = 1'b1;
  34855. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .FeedbackMux = 1'b0;
  34856. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .ShiftMux = 1'b0;
  34857. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .BypassEn = 1'b1;
  34858. defparam \macro_inst|cfg_reg_inst|trig_threshold[7] .CarryEnb = 1'b0;
  34859. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[8] (
  34860. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [8]),
  34861. .B(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  34862. .C(\rv32.mem_ahb_hwdata[8] ),
  34863. .D(vcc),
  34864. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~15_cout ),
  34865. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  34866. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X58_Y4_SIG_SIG ),
  34867. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  34868. .SyncReset(SyncReset_X58_Y4_GND),
  34869. .ShiftData(),
  34870. .SyncLoad(SyncLoad_X58_Y4_VCC),
  34871. .LutOut(),
  34872. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~17_cout ),
  34873. .Q(\macro_inst|cfg_reg_inst|trig_threshold [8]));
  34874. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .coord_x = 19;
  34875. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .coord_y = 4;
  34876. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .coord_z = 9;
  34877. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .mask = 16'h002B;
  34878. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .modeMux = 1'b1;
  34879. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .FeedbackMux = 1'b0;
  34880. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .ShiftMux = 1'b0;
  34881. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .BypassEn = 1'b1;
  34882. defparam \macro_inst|cfg_reg_inst|trig_threshold[8] .CarryEnb = 1'b0;
  34883. alta_slice \macro_inst|cfg_reg_inst|trig_threshold[9] (
  34884. .A(\macro_inst|apb_adc0_inst|apb_db [9]),
  34885. .B(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  34886. .C(\rv32.mem_ahb_hwdata[9] ),
  34887. .D(vcc),
  34888. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~17_cout ),
  34889. .Qin(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  34890. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_threshold[11]~0_combout_X57_Y4_SIG_SIG ),
  34891. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  34892. .SyncReset(SyncReset_X57_Y4_GND),
  34893. .ShiftData(),
  34894. .SyncLoad(SyncLoad_X57_Y4_VCC),
  34895. .LutOut(),
  34896. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~19_cout ),
  34897. .Q(\macro_inst|cfg_reg_inst|trig_threshold [9]));
  34898. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .coord_x = 19;
  34899. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .coord_y = 5;
  34900. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .coord_z = 12;
  34901. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .mask = 16'h002B;
  34902. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .modeMux = 1'b1;
  34903. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .FeedbackMux = 1'b0;
  34904. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .ShiftMux = 1'b0;
  34905. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .BypassEn = 1'b1;
  34906. defparam \macro_inst|cfg_reg_inst|trig_threshold[9] .CarryEnb = 1'b0;
  34907. alta_slice \macro_inst|cfg_reg_inst|trig_time_slot[0] (
  34908. .A(vcc),
  34909. .B(vcc),
  34910. .C(\rv32.mem_ahb_hwdata[4] ),
  34911. .D(vcc),
  34912. .Cin(),
  34913. .Qin(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  34914. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ),
  34915. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  34916. .SyncReset(),
  34917. .ShiftData(),
  34918. .SyncLoad(),
  34919. .LutOut(\macro_inst|cfg_reg_inst|trig_time_slot[0]~0_combout ),
  34920. .Cout(),
  34921. .Q(\macro_inst|cfg_reg_inst|trig_time_slot [0]));
  34922. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .coord_x = 18;
  34923. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .coord_y = 8;
  34924. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .coord_z = 5;
  34925. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .mask = 16'h0F0F;
  34926. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .modeMux = 1'b0;
  34927. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .FeedbackMux = 1'b0;
  34928. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .ShiftMux = 1'b0;
  34929. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .BypassEn = 1'b0;
  34930. defparam \macro_inst|cfg_reg_inst|trig_time_slot[0] .CarryEnb = 1'b1;
  34931. alta_slice \macro_inst|cfg_reg_inst|trig_time_slot[1] (
  34932. .A(),
  34933. .B(),
  34934. .C(vcc),
  34935. .D(\rv32.mem_ahb_hwdata[5] ),
  34936. .Cin(),
  34937. .Qin(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  34938. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y4_SIG_SIG ),
  34939. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  34940. .SyncReset(),
  34941. .ShiftData(),
  34942. .SyncLoad(),
  34943. .LutOut(\macro_inst|cfg_reg_inst|trig_time_slot[1]__feeder__LutOut ),
  34944. .Cout(),
  34945. .Q(\macro_inst|cfg_reg_inst|trig_time_slot [1]));
  34946. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .coord_x = 18;
  34947. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .coord_y = 4;
  34948. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .coord_z = 2;
  34949. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .mask = 16'hFF00;
  34950. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .modeMux = 1'b1;
  34951. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .FeedbackMux = 1'b0;
  34952. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .ShiftMux = 1'b0;
  34953. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .BypassEn = 1'b0;
  34954. defparam \macro_inst|cfg_reg_inst|trig_time_slot[1] .CarryEnb = 1'b1;
  34955. alta_slice \macro_inst|cfg_reg_inst|trig_time_slot[2] (
  34956. .A(),
  34957. .B(),
  34958. .C(vcc),
  34959. .D(\rv32.mem_ahb_hwdata[6] ),
  34960. .Cin(),
  34961. .Qin(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  34962. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y6_SIG_SIG ),
  34963. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  34964. .SyncReset(),
  34965. .ShiftData(),
  34966. .SyncLoad(),
  34967. .LutOut(\macro_inst|cfg_reg_inst|trig_time_slot[2]__feeder__LutOut ),
  34968. .Cout(),
  34969. .Q(\macro_inst|cfg_reg_inst|trig_time_slot [2]));
  34970. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .coord_x = 19;
  34971. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .coord_y = 8;
  34972. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .coord_z = 5;
  34973. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .mask = 16'hFF00;
  34974. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .modeMux = 1'b1;
  34975. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .FeedbackMux = 1'b0;
  34976. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .ShiftMux = 1'b0;
  34977. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .BypassEn = 1'b0;
  34978. defparam \macro_inst|cfg_reg_inst|trig_time_slot[2] .CarryEnb = 1'b1;
  34979. alta_slice \macro_inst|cfg_reg_inst|trig_time_slot[3] (
  34980. .A(),
  34981. .B(),
  34982. .C(vcc),
  34983. .D(\rv32.mem_ahb_hwdata[7] ),
  34984. .Cin(),
  34985. .Qin(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  34986. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X60_Y4_SIG_SIG ),
  34987. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  34988. .SyncReset(),
  34989. .ShiftData(),
  34990. .SyncLoad(),
  34991. .LutOut(\macro_inst|cfg_reg_inst|trig_time_slot[3]__feeder__LutOut ),
  34992. .Cout(),
  34993. .Q(\macro_inst|cfg_reg_inst|trig_time_slot [3]));
  34994. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .coord_x = 18;
  34995. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .coord_y = 4;
  34996. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .coord_z = 14;
  34997. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .mask = 16'hFF00;
  34998. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .modeMux = 1'b1;
  34999. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .FeedbackMux = 1'b0;
  35000. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .ShiftMux = 1'b0;
  35001. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .BypassEn = 1'b0;
  35002. defparam \macro_inst|cfg_reg_inst|trig_time_slot[3] .CarryEnb = 1'b1;
  35003. alta_slice \macro_inst|cfg_reg_inst|trig_time_slot[4] (
  35004. .A(),
  35005. .B(),
  35006. .C(vcc),
  35007. .D(\rv32.mem_ahb_hwdata[8] ),
  35008. .Cin(),
  35009. .Qin(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  35010. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|trig_mode[1]~0_combout_X59_Y6_SIG_SIG ),
  35011. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  35012. .SyncReset(),
  35013. .ShiftData(),
  35014. .SyncLoad(),
  35015. .LutOut(\macro_inst|cfg_reg_inst|trig_time_slot[4]__feeder__LutOut ),
  35016. .Cout(),
  35017. .Q(\macro_inst|cfg_reg_inst|trig_time_slot [4]));
  35018. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .coord_x = 18;
  35019. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .coord_y = 8;
  35020. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .coord_z = 3;
  35021. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .mask = 16'hFF00;
  35022. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .modeMux = 1'b1;
  35023. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .FeedbackMux = 1'b0;
  35024. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .ShiftMux = 1'b0;
  35025. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .BypassEn = 1'b0;
  35026. defparam \macro_inst|cfg_reg_inst|trig_time_slot[4] .CarryEnb = 1'b1;
  35027. alta_slice \macro_inst|cfg_reg_inst|wave_type[0] (
  35028. .A(),
  35029. .B(),
  35030. .C(vcc),
  35031. .D(\rv32.mem_ahb_hwdata[0] ),
  35032. .Cin(),
  35033. .Qin(\macro_inst|cfg_reg_inst|wave_type [0]),
  35034. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|wave_type[1]~0_combout_X58_Y8_SIG_SIG ),
  35035. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  35036. .SyncReset(),
  35037. .ShiftData(),
  35038. .SyncLoad(),
  35039. .LutOut(\macro_inst|cfg_reg_inst|wave_type[0]__feeder__LutOut ),
  35040. .Cout(),
  35041. .Q(\macro_inst|cfg_reg_inst|wave_type [0]));
  35042. defparam \macro_inst|cfg_reg_inst|wave_type[0] .coord_x = 16;
  35043. defparam \macro_inst|cfg_reg_inst|wave_type[0] .coord_y = 6;
  35044. defparam \macro_inst|cfg_reg_inst|wave_type[0] .coord_z = 5;
  35045. defparam \macro_inst|cfg_reg_inst|wave_type[0] .mask = 16'hFF00;
  35046. defparam \macro_inst|cfg_reg_inst|wave_type[0] .modeMux = 1'b1;
  35047. defparam \macro_inst|cfg_reg_inst|wave_type[0] .FeedbackMux = 1'b0;
  35048. defparam \macro_inst|cfg_reg_inst|wave_type[0] .ShiftMux = 1'b0;
  35049. defparam \macro_inst|cfg_reg_inst|wave_type[0] .BypassEn = 1'b0;
  35050. defparam \macro_inst|cfg_reg_inst|wave_type[0] .CarryEnb = 1'b1;
  35051. alta_slice \macro_inst|cfg_reg_inst|wave_type[1] (
  35052. .A(),
  35053. .B(),
  35054. .C(vcc),
  35055. .D(\rv32.mem_ahb_hwdata[1] ),
  35056. .Cin(),
  35057. .Qin(\macro_inst|cfg_reg_inst|wave_type [1]),
  35058. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|cfg_reg_inst|wave_type[1]~0_combout_X58_Y8_SIG_SIG ),
  35059. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  35060. .SyncReset(),
  35061. .ShiftData(),
  35062. .SyncLoad(),
  35063. .LutOut(\macro_inst|cfg_reg_inst|wave_type[1]__feeder__LutOut ),
  35064. .Cout(),
  35065. .Q(\macro_inst|cfg_reg_inst|wave_type [1]));
  35066. defparam \macro_inst|cfg_reg_inst|wave_type[1] .coord_x = 16;
  35067. defparam \macro_inst|cfg_reg_inst|wave_type[1] .coord_y = 6;
  35068. defparam \macro_inst|cfg_reg_inst|wave_type[1] .coord_z = 2;
  35069. defparam \macro_inst|cfg_reg_inst|wave_type[1] .mask = 16'hFF00;
  35070. defparam \macro_inst|cfg_reg_inst|wave_type[1] .modeMux = 1'b1;
  35071. defparam \macro_inst|cfg_reg_inst|wave_type[1] .FeedbackMux = 1'b0;
  35072. defparam \macro_inst|cfg_reg_inst|wave_type[1] .ShiftMux = 1'b0;
  35073. defparam \macro_inst|cfg_reg_inst|wave_type[1] .BypassEn = 1'b0;
  35074. defparam \macro_inst|cfg_reg_inst|wave_type[1] .CarryEnb = 1'b1;
  35075. alta_slice \macro_inst|cfg_reg_inst|wave_type[1]~0 (
  35076. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  35077. .B(\macro_inst|cfg_reg_inst|always0~0_combout ),
  35078. .C(\macro_inst|ahb2apb_inst|paddr [2]),
  35079. .D(\macro_inst|cfg_reg_inst|Equal10~0_combout ),
  35080. .Cin(),
  35081. .Qin(),
  35082. .Clk(),
  35083. .AsyncReset(),
  35084. .SyncReset(),
  35085. .ShiftData(),
  35086. .SyncLoad(),
  35087. .LutOut(\macro_inst|cfg_reg_inst|wave_type[1]~0_combout ),
  35088. .Cout(),
  35089. .Q());
  35090. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .coord_x = 14;
  35091. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .coord_y = 9;
  35092. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .coord_z = 4;
  35093. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .mask = 16'h0400;
  35094. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .modeMux = 1'b0;
  35095. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .FeedbackMux = 1'b0;
  35096. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .ShiftMux = 1'b0;
  35097. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .BypassEn = 1'b0;
  35098. defparam \macro_inst|cfg_reg_inst|wave_type[1]~0 .CarryEnb = 1'b1;
  35099. alta_slice \macro_inst|mem_apb_psel (
  35100. .A(vcc),
  35101. .B(\macro_inst|mem_apb_psel~0_combout ),
  35102. .C(vcc),
  35103. .D(\macro_inst|ahb2apb_inst|paddr [14]),
  35104. .Cin(),
  35105. .Qin(),
  35106. .Clk(),
  35107. .AsyncReset(),
  35108. .SyncReset(),
  35109. .ShiftData(),
  35110. .SyncLoad(),
  35111. .LutOut(\macro_inst|mem_apb_psel~combout ),
  35112. .Cout(),
  35113. .Q());
  35114. defparam \macro_inst|mem_apb_psel .coord_x = 16;
  35115. defparam \macro_inst|mem_apb_psel .coord_y = 12;
  35116. defparam \macro_inst|mem_apb_psel .coord_z = 4;
  35117. defparam \macro_inst|mem_apb_psel .mask = 16'hCC00;
  35118. defparam \macro_inst|mem_apb_psel .modeMux = 1'b0;
  35119. defparam \macro_inst|mem_apb_psel .FeedbackMux = 1'b0;
  35120. defparam \macro_inst|mem_apb_psel .ShiftMux = 1'b0;
  35121. defparam \macro_inst|mem_apb_psel .BypassEn = 1'b0;
  35122. defparam \macro_inst|mem_apb_psel .CarryEnb = 1'b1;
  35123. alta_slice \macro_inst|mem_apb_psel~0 (
  35124. .A(\macro_inst|ahb2apb_inst|paddr [12]),
  35125. .B(\macro_inst|ahb2apb_inst|paddr [15]),
  35126. .C(\macro_inst|ahb2apb_inst|paddr [13]),
  35127. .D(\macro_inst|ahb2apb_inst|psel~q ),
  35128. .Cin(),
  35129. .Qin(),
  35130. .Clk(),
  35131. .AsyncReset(),
  35132. .SyncReset(),
  35133. .ShiftData(),
  35134. .SyncLoad(),
  35135. .LutOut(\macro_inst|mem_apb_psel~0_combout ),
  35136. .Cout(),
  35137. .Q());
  35138. defparam \macro_inst|mem_apb_psel~0 .coord_x = 16;
  35139. defparam \macro_inst|mem_apb_psel~0 .coord_y = 12;
  35140. defparam \macro_inst|mem_apb_psel~0 .coord_z = 11;
  35141. defparam \macro_inst|mem_apb_psel~0 .mask = 16'h1000;
  35142. defparam \macro_inst|mem_apb_psel~0 .modeMux = 1'b0;
  35143. defparam \macro_inst|mem_apb_psel~0 .FeedbackMux = 1'b0;
  35144. defparam \macro_inst|mem_apb_psel~0 .ShiftMux = 1'b0;
  35145. defparam \macro_inst|mem_apb_psel~0 .BypassEn = 1'b0;
  35146. defparam \macro_inst|mem_apb_psel~0 .CarryEnb = 1'b1;
  35147. alta_slice \macro_inst|pr_select[0] (
  35148. .A(\macro_inst|ahb2apb_inst|paddr [13]),
  35149. .B(\macro_inst|ahb2apb_inst|paddr [12]),
  35150. .C(\macro_inst|ahb2apb_inst|paddr [14]),
  35151. .D(\macro_inst|ahb2apb_inst|paddr [15]),
  35152. .Cin(),
  35153. .Qin(\macro_inst|pr_select [0]),
  35154. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ),
  35155. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  35156. .SyncReset(),
  35157. .ShiftData(),
  35158. .SyncLoad(),
  35159. .LutOut(\macro_inst|ShiftLeft0~2_combout ),
  35160. .Cout(),
  35161. .Q(\macro_inst|pr_select [0]));
  35162. defparam \macro_inst|pr_select[0] .coord_x = 15;
  35163. defparam \macro_inst|pr_select[0] .coord_y = 12;
  35164. defparam \macro_inst|pr_select[0] .coord_z = 7;
  35165. defparam \macro_inst|pr_select[0] .mask = 16'h0001;
  35166. defparam \macro_inst|pr_select[0] .modeMux = 1'b0;
  35167. defparam \macro_inst|pr_select[0] .FeedbackMux = 1'b0;
  35168. defparam \macro_inst|pr_select[0] .ShiftMux = 1'b0;
  35169. defparam \macro_inst|pr_select[0] .BypassEn = 1'b0;
  35170. defparam \macro_inst|pr_select[0] .CarryEnb = 1'b1;
  35171. alta_slice \macro_inst|pr_select[1] (
  35172. .A(vcc),
  35173. .B(vcc),
  35174. .C(\macro_inst|ShiftLeft0~0_combout ),
  35175. .D(vcc),
  35176. .Cin(),
  35177. .Qin(\macro_inst|pr_select [1]),
  35178. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ),
  35179. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  35180. .SyncReset(SyncReset_X58_Y12_GND),
  35181. .ShiftData(),
  35182. .SyncLoad(SyncLoad_X58_Y12_VCC),
  35183. .LutOut(\~GND~combout ),
  35184. .Cout(),
  35185. .Q(\macro_inst|pr_select [1]));
  35186. defparam \macro_inst|pr_select[1] .coord_x = 15;
  35187. defparam \macro_inst|pr_select[1] .coord_y = 12;
  35188. defparam \macro_inst|pr_select[1] .coord_z = 12;
  35189. defparam \macro_inst|pr_select[1] .mask = 16'h0000;
  35190. defparam \macro_inst|pr_select[1] .modeMux = 1'b0;
  35191. defparam \macro_inst|pr_select[1] .FeedbackMux = 1'b0;
  35192. defparam \macro_inst|pr_select[1] .ShiftMux = 1'b0;
  35193. defparam \macro_inst|pr_select[1] .BypassEn = 1'b1;
  35194. defparam \macro_inst|pr_select[1] .CarryEnb = 1'b1;
  35195. alta_slice \macro_inst|pr_select[2] (
  35196. .A(),
  35197. .B(),
  35198. .C(\macro_inst|ShiftLeft0~1_combout ),
  35199. .D(),
  35200. .Cin(),
  35201. .Qin(\macro_inst|pr_select [2]),
  35202. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ),
  35203. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  35204. .SyncReset(SyncReset_X58_Y12_GND),
  35205. .ShiftData(),
  35206. .SyncLoad(SyncLoad_X58_Y12_VCC),
  35207. .LutOut(),
  35208. .Cout(),
  35209. .Q(\macro_inst|pr_select [2]));
  35210. defparam \macro_inst|pr_select[2] .coord_x = 15;
  35211. defparam \macro_inst|pr_select[2] .coord_y = 12;
  35212. defparam \macro_inst|pr_select[2] .coord_z = 14;
  35213. defparam \macro_inst|pr_select[2] .mask = 16'hFFFF;
  35214. defparam \macro_inst|pr_select[2] .modeMux = 1'b1;
  35215. defparam \macro_inst|pr_select[2] .FeedbackMux = 1'b0;
  35216. defparam \macro_inst|pr_select[2] .ShiftMux = 1'b0;
  35217. defparam \macro_inst|pr_select[2] .BypassEn = 1'b1;
  35218. defparam \macro_inst|pr_select[2] .CarryEnb = 1'b1;
  35219. alta_slice \macro_inst|pr_select[3] (
  35220. .A(\macro_inst|ahb2apb_inst|paddr [13]),
  35221. .B(\macro_inst|ahb2apb_inst|paddr [12]),
  35222. .C(\macro_inst|ahb2apb_inst|paddr [14]),
  35223. .D(\macro_inst|ahb2apb_inst|paddr [15]),
  35224. .Cin(),
  35225. .Qin(\macro_inst|pr_select [3]),
  35226. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|always0~0_combout_X58_Y12_SIG_SIG ),
  35227. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  35228. .SyncReset(),
  35229. .ShiftData(),
  35230. .SyncLoad(),
  35231. .LutOut(\macro_inst|ShiftLeft0~3_combout ),
  35232. .Cout(),
  35233. .Q(\macro_inst|pr_select [3]));
  35234. defparam \macro_inst|pr_select[3] .coord_x = 15;
  35235. defparam \macro_inst|pr_select[3] .coord_y = 12;
  35236. defparam \macro_inst|pr_select[3] .coord_z = 15;
  35237. defparam \macro_inst|pr_select[3] .mask = 16'h0008;
  35238. defparam \macro_inst|pr_select[3] .modeMux = 1'b0;
  35239. defparam \macro_inst|pr_select[3] .FeedbackMux = 1'b0;
  35240. defparam \macro_inst|pr_select[3] .ShiftMux = 1'b0;
  35241. defparam \macro_inst|pr_select[3] .BypassEn = 1'b0;
  35242. defparam \macro_inst|pr_select[3] .CarryEnb = 1'b1;
  35243. alta_slice \macro_inst|trig_ctrl_inst|Add0~0 (
  35244. .A(vcc),
  35245. .B(\macro_inst|trig_ctrl_inst|decim_factor [0]),
  35246. .C(vcc),
  35247. .D(vcc),
  35248. .Cin(),
  35249. .Qin(),
  35250. .Clk(),
  35251. .AsyncReset(),
  35252. .SyncReset(),
  35253. .ShiftData(),
  35254. .SyncLoad(),
  35255. .LutOut(\macro_inst|trig_ctrl_inst|Add0~0_combout ),
  35256. .Cout(\macro_inst|trig_ctrl_inst|Add0~1 ),
  35257. .Q());
  35258. defparam \macro_inst|trig_ctrl_inst|Add0~0 .coord_x = 17;
  35259. defparam \macro_inst|trig_ctrl_inst|Add0~0 .coord_y = 8;
  35260. defparam \macro_inst|trig_ctrl_inst|Add0~0 .coord_z = 8;
  35261. defparam \macro_inst|trig_ctrl_inst|Add0~0 .mask = 16'hCC33;
  35262. defparam \macro_inst|trig_ctrl_inst|Add0~0 .modeMux = 1'b0;
  35263. defparam \macro_inst|trig_ctrl_inst|Add0~0 .FeedbackMux = 1'b0;
  35264. defparam \macro_inst|trig_ctrl_inst|Add0~0 .ShiftMux = 1'b0;
  35265. defparam \macro_inst|trig_ctrl_inst|Add0~0 .BypassEn = 1'b0;
  35266. defparam \macro_inst|trig_ctrl_inst|Add0~0 .CarryEnb = 1'b0;
  35267. alta_slice \macro_inst|trig_ctrl_inst|Add0~10 (
  35268. .A(\macro_inst|trig_ctrl_inst|decim_factor [5]),
  35269. .B(vcc),
  35270. .C(vcc),
  35271. .D(vcc),
  35272. .Cin(\macro_inst|trig_ctrl_inst|Add0~9 ),
  35273. .Qin(),
  35274. .Clk(),
  35275. .AsyncReset(),
  35276. .SyncReset(),
  35277. .ShiftData(),
  35278. .SyncLoad(),
  35279. .LutOut(\macro_inst|trig_ctrl_inst|Add0~10_combout ),
  35280. .Cout(\macro_inst|trig_ctrl_inst|Add0~11 ),
  35281. .Q());
  35282. defparam \macro_inst|trig_ctrl_inst|Add0~10 .coord_x = 17;
  35283. defparam \macro_inst|trig_ctrl_inst|Add0~10 .coord_y = 8;
  35284. defparam \macro_inst|trig_ctrl_inst|Add0~10 .coord_z = 13;
  35285. defparam \macro_inst|trig_ctrl_inst|Add0~10 .mask = 16'hA505;
  35286. defparam \macro_inst|trig_ctrl_inst|Add0~10 .modeMux = 1'b1;
  35287. defparam \macro_inst|trig_ctrl_inst|Add0~10 .FeedbackMux = 1'b0;
  35288. defparam \macro_inst|trig_ctrl_inst|Add0~10 .ShiftMux = 1'b0;
  35289. defparam \macro_inst|trig_ctrl_inst|Add0~10 .BypassEn = 1'b0;
  35290. defparam \macro_inst|trig_ctrl_inst|Add0~10 .CarryEnb = 1'b0;
  35291. alta_slice \macro_inst|trig_ctrl_inst|Add0~12 (
  35292. .A(\macro_inst|trig_ctrl_inst|decim_factor [6]),
  35293. .B(vcc),
  35294. .C(vcc),
  35295. .D(vcc),
  35296. .Cin(\macro_inst|trig_ctrl_inst|Add0~11 ),
  35297. .Qin(),
  35298. .Clk(),
  35299. .AsyncReset(),
  35300. .SyncReset(),
  35301. .ShiftData(),
  35302. .SyncLoad(),
  35303. .LutOut(\macro_inst|trig_ctrl_inst|Add0~12_combout ),
  35304. .Cout(\macro_inst|trig_ctrl_inst|Add0~13 ),
  35305. .Q());
  35306. defparam \macro_inst|trig_ctrl_inst|Add0~12 .coord_x = 17;
  35307. defparam \macro_inst|trig_ctrl_inst|Add0~12 .coord_y = 8;
  35308. defparam \macro_inst|trig_ctrl_inst|Add0~12 .coord_z = 14;
  35309. defparam \macro_inst|trig_ctrl_inst|Add0~12 .mask = 16'h5AAF;
  35310. defparam \macro_inst|trig_ctrl_inst|Add0~12 .modeMux = 1'b1;
  35311. defparam \macro_inst|trig_ctrl_inst|Add0~12 .FeedbackMux = 1'b0;
  35312. defparam \macro_inst|trig_ctrl_inst|Add0~12 .ShiftMux = 1'b0;
  35313. defparam \macro_inst|trig_ctrl_inst|Add0~12 .BypassEn = 1'b0;
  35314. defparam \macro_inst|trig_ctrl_inst|Add0~12 .CarryEnb = 1'b0;
  35315. alta_slice \macro_inst|trig_ctrl_inst|Add0~14 (
  35316. .A(vcc),
  35317. .B(\macro_inst|trig_ctrl_inst|decim_factor [7]),
  35318. .C(vcc),
  35319. .D(vcc),
  35320. .Cin(\macro_inst|trig_ctrl_inst|Add0~13 ),
  35321. .Qin(),
  35322. .Clk(),
  35323. .AsyncReset(),
  35324. .SyncReset(),
  35325. .ShiftData(),
  35326. .SyncLoad(),
  35327. .LutOut(\macro_inst|trig_ctrl_inst|Add0~14_combout ),
  35328. .Cout(\macro_inst|trig_ctrl_inst|Add0~15 ),
  35329. .Q());
  35330. defparam \macro_inst|trig_ctrl_inst|Add0~14 .coord_x = 17;
  35331. defparam \macro_inst|trig_ctrl_inst|Add0~14 .coord_y = 8;
  35332. defparam \macro_inst|trig_ctrl_inst|Add0~14 .coord_z = 15;
  35333. defparam \macro_inst|trig_ctrl_inst|Add0~14 .mask = 16'hC303;
  35334. defparam \macro_inst|trig_ctrl_inst|Add0~14 .modeMux = 1'b1;
  35335. defparam \macro_inst|trig_ctrl_inst|Add0~14 .FeedbackMux = 1'b0;
  35336. defparam \macro_inst|trig_ctrl_inst|Add0~14 .ShiftMux = 1'b0;
  35337. defparam \macro_inst|trig_ctrl_inst|Add0~14 .BypassEn = 1'b0;
  35338. defparam \macro_inst|trig_ctrl_inst|Add0~14 .CarryEnb = 1'b0;
  35339. alta_slice \macro_inst|trig_ctrl_inst|Add0~16 (
  35340. .A(vcc),
  35341. .B(\macro_inst|trig_ctrl_inst|decim_factor [8]),
  35342. .C(vcc),
  35343. .D(vcc),
  35344. .Cin(\macro_inst|trig_ctrl_inst|Add0~15 ),
  35345. .Qin(),
  35346. .Clk(),
  35347. .AsyncReset(),
  35348. .SyncReset(),
  35349. .ShiftData(),
  35350. .SyncLoad(),
  35351. .LutOut(\macro_inst|trig_ctrl_inst|Add0~16_combout ),
  35352. .Cout(\macro_inst|trig_ctrl_inst|Add0~17 ),
  35353. .Q());
  35354. defparam \macro_inst|trig_ctrl_inst|Add0~16 .coord_x = 17;
  35355. defparam \macro_inst|trig_ctrl_inst|Add0~16 .coord_y = 7;
  35356. defparam \macro_inst|trig_ctrl_inst|Add0~16 .coord_z = 0;
  35357. defparam \macro_inst|trig_ctrl_inst|Add0~16 .mask = 16'h3CCF;
  35358. defparam \macro_inst|trig_ctrl_inst|Add0~16 .modeMux = 1'b1;
  35359. defparam \macro_inst|trig_ctrl_inst|Add0~16 .FeedbackMux = 1'b0;
  35360. defparam \macro_inst|trig_ctrl_inst|Add0~16 .ShiftMux = 1'b0;
  35361. defparam \macro_inst|trig_ctrl_inst|Add0~16 .BypassEn = 1'b0;
  35362. defparam \macro_inst|trig_ctrl_inst|Add0~16 .CarryEnb = 1'b0;
  35363. alta_slice \macro_inst|trig_ctrl_inst|Add0~18 (
  35364. .A(\macro_inst|trig_ctrl_inst|decim_factor [9]),
  35365. .B(vcc),
  35366. .C(vcc),
  35367. .D(vcc),
  35368. .Cin(\macro_inst|trig_ctrl_inst|Add0~17 ),
  35369. .Qin(),
  35370. .Clk(),
  35371. .AsyncReset(),
  35372. .SyncReset(),
  35373. .ShiftData(),
  35374. .SyncLoad(),
  35375. .LutOut(\macro_inst|trig_ctrl_inst|Add0~18_combout ),
  35376. .Cout(\macro_inst|trig_ctrl_inst|Add0~19 ),
  35377. .Q());
  35378. defparam \macro_inst|trig_ctrl_inst|Add0~18 .coord_x = 17;
  35379. defparam \macro_inst|trig_ctrl_inst|Add0~18 .coord_y = 7;
  35380. defparam \macro_inst|trig_ctrl_inst|Add0~18 .coord_z = 1;
  35381. defparam \macro_inst|trig_ctrl_inst|Add0~18 .mask = 16'hA505;
  35382. defparam \macro_inst|trig_ctrl_inst|Add0~18 .modeMux = 1'b1;
  35383. defparam \macro_inst|trig_ctrl_inst|Add0~18 .FeedbackMux = 1'b0;
  35384. defparam \macro_inst|trig_ctrl_inst|Add0~18 .ShiftMux = 1'b0;
  35385. defparam \macro_inst|trig_ctrl_inst|Add0~18 .BypassEn = 1'b0;
  35386. defparam \macro_inst|trig_ctrl_inst|Add0~18 .CarryEnb = 1'b0;
  35387. alta_slice \macro_inst|trig_ctrl_inst|Add0~2 (
  35388. .A(\macro_inst|trig_ctrl_inst|decim_factor [1]),
  35389. .B(vcc),
  35390. .C(vcc),
  35391. .D(vcc),
  35392. .Cin(\macro_inst|trig_ctrl_inst|Add0~1 ),
  35393. .Qin(),
  35394. .Clk(),
  35395. .AsyncReset(),
  35396. .SyncReset(),
  35397. .ShiftData(),
  35398. .SyncLoad(),
  35399. .LutOut(\macro_inst|trig_ctrl_inst|Add0~2_combout ),
  35400. .Cout(\macro_inst|trig_ctrl_inst|Add0~3 ),
  35401. .Q());
  35402. defparam \macro_inst|trig_ctrl_inst|Add0~2 .coord_x = 17;
  35403. defparam \macro_inst|trig_ctrl_inst|Add0~2 .coord_y = 8;
  35404. defparam \macro_inst|trig_ctrl_inst|Add0~2 .coord_z = 9;
  35405. defparam \macro_inst|trig_ctrl_inst|Add0~2 .mask = 16'hA505;
  35406. defparam \macro_inst|trig_ctrl_inst|Add0~2 .modeMux = 1'b1;
  35407. defparam \macro_inst|trig_ctrl_inst|Add0~2 .FeedbackMux = 1'b0;
  35408. defparam \macro_inst|trig_ctrl_inst|Add0~2 .ShiftMux = 1'b0;
  35409. defparam \macro_inst|trig_ctrl_inst|Add0~2 .BypassEn = 1'b0;
  35410. defparam \macro_inst|trig_ctrl_inst|Add0~2 .CarryEnb = 1'b0;
  35411. alta_slice \macro_inst|trig_ctrl_inst|Add0~20 (
  35412. .A(\macro_inst|trig_ctrl_inst|decim_factor [10]),
  35413. .B(vcc),
  35414. .C(vcc),
  35415. .D(vcc),
  35416. .Cin(\macro_inst|trig_ctrl_inst|Add0~19 ),
  35417. .Qin(),
  35418. .Clk(),
  35419. .AsyncReset(),
  35420. .SyncReset(),
  35421. .ShiftData(),
  35422. .SyncLoad(),
  35423. .LutOut(\macro_inst|trig_ctrl_inst|Add0~20_combout ),
  35424. .Cout(\macro_inst|trig_ctrl_inst|Add0~21 ),
  35425. .Q());
  35426. defparam \macro_inst|trig_ctrl_inst|Add0~20 .coord_x = 17;
  35427. defparam \macro_inst|trig_ctrl_inst|Add0~20 .coord_y = 7;
  35428. defparam \macro_inst|trig_ctrl_inst|Add0~20 .coord_z = 2;
  35429. defparam \macro_inst|trig_ctrl_inst|Add0~20 .mask = 16'h5AAF;
  35430. defparam \macro_inst|trig_ctrl_inst|Add0~20 .modeMux = 1'b1;
  35431. defparam \macro_inst|trig_ctrl_inst|Add0~20 .FeedbackMux = 1'b0;
  35432. defparam \macro_inst|trig_ctrl_inst|Add0~20 .ShiftMux = 1'b0;
  35433. defparam \macro_inst|trig_ctrl_inst|Add0~20 .BypassEn = 1'b0;
  35434. defparam \macro_inst|trig_ctrl_inst|Add0~20 .CarryEnb = 1'b0;
  35435. alta_slice \macro_inst|trig_ctrl_inst|Add0~24 (
  35436. .A(vcc),
  35437. .B(vcc),
  35438. .C(vcc),
  35439. .D(vcc),
  35440. .Cin(\macro_inst|trig_ctrl_inst|Add0~23 ),
  35441. .Qin(),
  35442. .Clk(),
  35443. .AsyncReset(),
  35444. .SyncReset(),
  35445. .ShiftData(),
  35446. .SyncLoad(),
  35447. .LutOut(\macro_inst|trig_ctrl_inst|Add0~24_combout ),
  35448. .Cout(\macro_inst|trig_ctrl_inst|Add0~25 ),
  35449. .Q());
  35450. defparam \macro_inst|trig_ctrl_inst|Add0~24 .coord_x = 17;
  35451. defparam \macro_inst|trig_ctrl_inst|Add0~24 .coord_y = 7;
  35452. defparam \macro_inst|trig_ctrl_inst|Add0~24 .coord_z = 4;
  35453. defparam \macro_inst|trig_ctrl_inst|Add0~24 .mask = 16'hF00F;
  35454. defparam \macro_inst|trig_ctrl_inst|Add0~24 .modeMux = 1'b1;
  35455. defparam \macro_inst|trig_ctrl_inst|Add0~24 .FeedbackMux = 1'b0;
  35456. defparam \macro_inst|trig_ctrl_inst|Add0~24 .ShiftMux = 1'b0;
  35457. defparam \macro_inst|trig_ctrl_inst|Add0~24 .BypassEn = 1'b0;
  35458. defparam \macro_inst|trig_ctrl_inst|Add0~24 .CarryEnb = 1'b0;
  35459. alta_slice \macro_inst|trig_ctrl_inst|Add0~26 (
  35460. .A(vcc),
  35461. .B(\macro_inst|trig_ctrl_inst|decim_factor [13]),
  35462. .C(vcc),
  35463. .D(vcc),
  35464. .Cin(\macro_inst|trig_ctrl_inst|Add0~25 ),
  35465. .Qin(),
  35466. .Clk(),
  35467. .AsyncReset(),
  35468. .SyncReset(),
  35469. .ShiftData(),
  35470. .SyncLoad(),
  35471. .LutOut(\macro_inst|trig_ctrl_inst|Add0~26_combout ),
  35472. .Cout(\macro_inst|trig_ctrl_inst|Add0~27 ),
  35473. .Q());
  35474. defparam \macro_inst|trig_ctrl_inst|Add0~26 .coord_x = 17;
  35475. defparam \macro_inst|trig_ctrl_inst|Add0~26 .coord_y = 7;
  35476. defparam \macro_inst|trig_ctrl_inst|Add0~26 .coord_z = 5;
  35477. defparam \macro_inst|trig_ctrl_inst|Add0~26 .mask = 16'hC303;
  35478. defparam \macro_inst|trig_ctrl_inst|Add0~26 .modeMux = 1'b1;
  35479. defparam \macro_inst|trig_ctrl_inst|Add0~26 .FeedbackMux = 1'b0;
  35480. defparam \macro_inst|trig_ctrl_inst|Add0~26 .ShiftMux = 1'b0;
  35481. defparam \macro_inst|trig_ctrl_inst|Add0~26 .BypassEn = 1'b0;
  35482. defparam \macro_inst|trig_ctrl_inst|Add0~26 .CarryEnb = 1'b0;
  35483. alta_slice \macro_inst|trig_ctrl_inst|Add0~28 (
  35484. .A(vcc),
  35485. .B(\macro_inst|trig_ctrl_inst|decim_factor [14]),
  35486. .C(vcc),
  35487. .D(vcc),
  35488. .Cin(\macro_inst|trig_ctrl_inst|Add0~27 ),
  35489. .Qin(),
  35490. .Clk(),
  35491. .AsyncReset(),
  35492. .SyncReset(),
  35493. .ShiftData(),
  35494. .SyncLoad(),
  35495. .LutOut(\macro_inst|trig_ctrl_inst|Add0~28_combout ),
  35496. .Cout(\macro_inst|trig_ctrl_inst|Add0~29 ),
  35497. .Q());
  35498. defparam \macro_inst|trig_ctrl_inst|Add0~28 .coord_x = 17;
  35499. defparam \macro_inst|trig_ctrl_inst|Add0~28 .coord_y = 7;
  35500. defparam \macro_inst|trig_ctrl_inst|Add0~28 .coord_z = 6;
  35501. defparam \macro_inst|trig_ctrl_inst|Add0~28 .mask = 16'h3CCF;
  35502. defparam \macro_inst|trig_ctrl_inst|Add0~28 .modeMux = 1'b1;
  35503. defparam \macro_inst|trig_ctrl_inst|Add0~28 .FeedbackMux = 1'b0;
  35504. defparam \macro_inst|trig_ctrl_inst|Add0~28 .ShiftMux = 1'b0;
  35505. defparam \macro_inst|trig_ctrl_inst|Add0~28 .BypassEn = 1'b0;
  35506. defparam \macro_inst|trig_ctrl_inst|Add0~28 .CarryEnb = 1'b0;
  35507. alta_slice \macro_inst|trig_ctrl_inst|Add0~30 (
  35508. .A(vcc),
  35509. .B(vcc),
  35510. .C(vcc),
  35511. .D(vcc),
  35512. .Cin(\macro_inst|trig_ctrl_inst|Add0~29 ),
  35513. .Qin(),
  35514. .Clk(),
  35515. .AsyncReset(),
  35516. .SyncReset(),
  35517. .ShiftData(),
  35518. .SyncLoad(),
  35519. .LutOut(\macro_inst|trig_ctrl_inst|Add0~30_combout ),
  35520. .Cout(\macro_inst|trig_ctrl_inst|Add0~31 ),
  35521. .Q());
  35522. defparam \macro_inst|trig_ctrl_inst|Add0~30 .coord_x = 17;
  35523. defparam \macro_inst|trig_ctrl_inst|Add0~30 .coord_y = 7;
  35524. defparam \macro_inst|trig_ctrl_inst|Add0~30 .coord_z = 7;
  35525. defparam \macro_inst|trig_ctrl_inst|Add0~30 .mask = 16'h0F0F;
  35526. defparam \macro_inst|trig_ctrl_inst|Add0~30 .modeMux = 1'b1;
  35527. defparam \macro_inst|trig_ctrl_inst|Add0~30 .FeedbackMux = 1'b0;
  35528. defparam \macro_inst|trig_ctrl_inst|Add0~30 .ShiftMux = 1'b0;
  35529. defparam \macro_inst|trig_ctrl_inst|Add0~30 .BypassEn = 1'b0;
  35530. defparam \macro_inst|trig_ctrl_inst|Add0~30 .CarryEnb = 1'b0;
  35531. alta_slice \macro_inst|trig_ctrl_inst|Add0~32 (
  35532. .A(vcc),
  35533. .B(vcc),
  35534. .C(vcc),
  35535. .D(vcc),
  35536. .Cin(\macro_inst|trig_ctrl_inst|Add0~31 ),
  35537. .Qin(),
  35538. .Clk(),
  35539. .AsyncReset(),
  35540. .SyncReset(),
  35541. .ShiftData(),
  35542. .SyncLoad(),
  35543. .LutOut(\macro_inst|trig_ctrl_inst|Add0~32_combout ),
  35544. .Cout(),
  35545. .Q());
  35546. defparam \macro_inst|trig_ctrl_inst|Add0~32 .coord_x = 17;
  35547. defparam \macro_inst|trig_ctrl_inst|Add0~32 .coord_y = 7;
  35548. defparam \macro_inst|trig_ctrl_inst|Add0~32 .coord_z = 8;
  35549. defparam \macro_inst|trig_ctrl_inst|Add0~32 .mask = 16'h0F0F;
  35550. defparam \macro_inst|trig_ctrl_inst|Add0~32 .modeMux = 1'b1;
  35551. defparam \macro_inst|trig_ctrl_inst|Add0~32 .FeedbackMux = 1'b0;
  35552. defparam \macro_inst|trig_ctrl_inst|Add0~32 .ShiftMux = 1'b0;
  35553. defparam \macro_inst|trig_ctrl_inst|Add0~32 .BypassEn = 1'b0;
  35554. defparam \macro_inst|trig_ctrl_inst|Add0~32 .CarryEnb = 1'b1;
  35555. alta_slice \macro_inst|trig_ctrl_inst|Add0~4 (
  35556. .A(vcc),
  35557. .B(\macro_inst|trig_ctrl_inst|decim_factor [2]),
  35558. .C(vcc),
  35559. .D(vcc),
  35560. .Cin(\macro_inst|trig_ctrl_inst|Add0~3 ),
  35561. .Qin(),
  35562. .Clk(),
  35563. .AsyncReset(),
  35564. .SyncReset(),
  35565. .ShiftData(),
  35566. .SyncLoad(),
  35567. .LutOut(\macro_inst|trig_ctrl_inst|Add0~4_combout ),
  35568. .Cout(\macro_inst|trig_ctrl_inst|Add0~5 ),
  35569. .Q());
  35570. defparam \macro_inst|trig_ctrl_inst|Add0~4 .coord_x = 17;
  35571. defparam \macro_inst|trig_ctrl_inst|Add0~4 .coord_y = 8;
  35572. defparam \macro_inst|trig_ctrl_inst|Add0~4 .coord_z = 10;
  35573. defparam \macro_inst|trig_ctrl_inst|Add0~4 .mask = 16'h3CCF;
  35574. defparam \macro_inst|trig_ctrl_inst|Add0~4 .modeMux = 1'b1;
  35575. defparam \macro_inst|trig_ctrl_inst|Add0~4 .FeedbackMux = 1'b0;
  35576. defparam \macro_inst|trig_ctrl_inst|Add0~4 .ShiftMux = 1'b0;
  35577. defparam \macro_inst|trig_ctrl_inst|Add0~4 .BypassEn = 1'b0;
  35578. defparam \macro_inst|trig_ctrl_inst|Add0~4 .CarryEnb = 1'b0;
  35579. alta_slice \macro_inst|trig_ctrl_inst|Add0~6 (
  35580. .A(\macro_inst|trig_ctrl_inst|decim_factor [3]),
  35581. .B(vcc),
  35582. .C(vcc),
  35583. .D(vcc),
  35584. .Cin(\macro_inst|trig_ctrl_inst|Add0~5 ),
  35585. .Qin(),
  35586. .Clk(),
  35587. .AsyncReset(),
  35588. .SyncReset(),
  35589. .ShiftData(),
  35590. .SyncLoad(),
  35591. .LutOut(\macro_inst|trig_ctrl_inst|Add0~6_combout ),
  35592. .Cout(\macro_inst|trig_ctrl_inst|Add0~7 ),
  35593. .Q());
  35594. defparam \macro_inst|trig_ctrl_inst|Add0~6 .coord_x = 17;
  35595. defparam \macro_inst|trig_ctrl_inst|Add0~6 .coord_y = 8;
  35596. defparam \macro_inst|trig_ctrl_inst|Add0~6 .coord_z = 11;
  35597. defparam \macro_inst|trig_ctrl_inst|Add0~6 .mask = 16'hA505;
  35598. defparam \macro_inst|trig_ctrl_inst|Add0~6 .modeMux = 1'b1;
  35599. defparam \macro_inst|trig_ctrl_inst|Add0~6 .FeedbackMux = 1'b0;
  35600. defparam \macro_inst|trig_ctrl_inst|Add0~6 .ShiftMux = 1'b0;
  35601. defparam \macro_inst|trig_ctrl_inst|Add0~6 .BypassEn = 1'b0;
  35602. defparam \macro_inst|trig_ctrl_inst|Add0~6 .CarryEnb = 1'b0;
  35603. alta_slice \macro_inst|trig_ctrl_inst|Add0~8 (
  35604. .A(vcc),
  35605. .B(\macro_inst|trig_ctrl_inst|decim_factor [4]),
  35606. .C(vcc),
  35607. .D(vcc),
  35608. .Cin(\macro_inst|trig_ctrl_inst|Add0~7 ),
  35609. .Qin(),
  35610. .Clk(),
  35611. .AsyncReset(),
  35612. .SyncReset(),
  35613. .ShiftData(),
  35614. .SyncLoad(),
  35615. .LutOut(\macro_inst|trig_ctrl_inst|Add0~8_combout ),
  35616. .Cout(\macro_inst|trig_ctrl_inst|Add0~9 ),
  35617. .Q());
  35618. defparam \macro_inst|trig_ctrl_inst|Add0~8 .coord_x = 17;
  35619. defparam \macro_inst|trig_ctrl_inst|Add0~8 .coord_y = 8;
  35620. defparam \macro_inst|trig_ctrl_inst|Add0~8 .coord_z = 12;
  35621. defparam \macro_inst|trig_ctrl_inst|Add0~8 .mask = 16'h3CCF;
  35622. defparam \macro_inst|trig_ctrl_inst|Add0~8 .modeMux = 1'b1;
  35623. defparam \macro_inst|trig_ctrl_inst|Add0~8 .FeedbackMux = 1'b0;
  35624. defparam \macro_inst|trig_ctrl_inst|Add0~8 .ShiftMux = 1'b0;
  35625. defparam \macro_inst|trig_ctrl_inst|Add0~8 .BypassEn = 1'b0;
  35626. defparam \macro_inst|trig_ctrl_inst|Add0~8 .CarryEnb = 1'b0;
  35627. alta_slice \macro_inst|trig_ctrl_inst|Add3~16 (
  35628. .A(vcc),
  35629. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [8]),
  35630. .C(vcc),
  35631. .D(vcc),
  35632. .Cin(\macro_inst|trig_ctrl_inst|Add3~15 ),
  35633. .Qin(),
  35634. .Clk(),
  35635. .AsyncReset(),
  35636. .SyncReset(),
  35637. .ShiftData(),
  35638. .SyncLoad(),
  35639. .LutOut(\macro_inst|trig_ctrl_inst|Add3~16_combout ),
  35640. .Cout(\macro_inst|trig_ctrl_inst|Add3~17 ),
  35641. .Q());
  35642. defparam \macro_inst|trig_ctrl_inst|Add3~16 .coord_x = 19;
  35643. defparam \macro_inst|trig_ctrl_inst|Add3~16 .coord_y = 9;
  35644. defparam \macro_inst|trig_ctrl_inst|Add3~16 .coord_z = 0;
  35645. defparam \macro_inst|trig_ctrl_inst|Add3~16 .mask = 16'h3CCF;
  35646. defparam \macro_inst|trig_ctrl_inst|Add3~16 .modeMux = 1'b1;
  35647. defparam \macro_inst|trig_ctrl_inst|Add3~16 .FeedbackMux = 1'b0;
  35648. defparam \macro_inst|trig_ctrl_inst|Add3~16 .ShiftMux = 1'b0;
  35649. defparam \macro_inst|trig_ctrl_inst|Add3~16 .BypassEn = 1'b0;
  35650. defparam \macro_inst|trig_ctrl_inst|Add3~16 .CarryEnb = 1'b0;
  35651. alta_slice \macro_inst|trig_ctrl_inst|Add3~18 (
  35652. .A(vcc),
  35653. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [9]),
  35654. .C(vcc),
  35655. .D(vcc),
  35656. .Cin(\macro_inst|trig_ctrl_inst|Add3~17 ),
  35657. .Qin(),
  35658. .Clk(),
  35659. .AsyncReset(),
  35660. .SyncReset(),
  35661. .ShiftData(),
  35662. .SyncLoad(),
  35663. .LutOut(\macro_inst|trig_ctrl_inst|Add3~18_combout ),
  35664. .Cout(\macro_inst|trig_ctrl_inst|Add3~19 ),
  35665. .Q());
  35666. defparam \macro_inst|trig_ctrl_inst|Add3~18 .coord_x = 19;
  35667. defparam \macro_inst|trig_ctrl_inst|Add3~18 .coord_y = 9;
  35668. defparam \macro_inst|trig_ctrl_inst|Add3~18 .coord_z = 1;
  35669. defparam \macro_inst|trig_ctrl_inst|Add3~18 .mask = 16'hC303;
  35670. defparam \macro_inst|trig_ctrl_inst|Add3~18 .modeMux = 1'b1;
  35671. defparam \macro_inst|trig_ctrl_inst|Add3~18 .FeedbackMux = 1'b0;
  35672. defparam \macro_inst|trig_ctrl_inst|Add3~18 .ShiftMux = 1'b0;
  35673. defparam \macro_inst|trig_ctrl_inst|Add3~18 .BypassEn = 1'b0;
  35674. defparam \macro_inst|trig_ctrl_inst|Add3~18 .CarryEnb = 1'b0;
  35675. alta_slice \macro_inst|trig_ctrl_inst|Add3~2 (
  35676. .A(vcc),
  35677. .B(\macro_inst|cfg_reg_inst|trig_pulse_width [1]),
  35678. .C(vcc),
  35679. .D(vcc),
  35680. .Cin(\macro_inst|trig_ctrl_inst|Add3~1 ),
  35681. .Qin(),
  35682. .Clk(),
  35683. .AsyncReset(),
  35684. .SyncReset(),
  35685. .ShiftData(),
  35686. .SyncLoad(),
  35687. .LutOut(\macro_inst|trig_ctrl_inst|Add3~2_combout ),
  35688. .Cout(\macro_inst|trig_ctrl_inst|Add3~3 ),
  35689. .Q());
  35690. defparam \macro_inst|trig_ctrl_inst|Add3~2 .coord_x = 19;
  35691. defparam \macro_inst|trig_ctrl_inst|Add3~2 .coord_y = 10;
  35692. defparam \macro_inst|trig_ctrl_inst|Add3~2 .coord_z = 9;
  35693. defparam \macro_inst|trig_ctrl_inst|Add3~2 .mask = 16'h3C0C;
  35694. defparam \macro_inst|trig_ctrl_inst|Add3~2 .modeMux = 1'b1;
  35695. defparam \macro_inst|trig_ctrl_inst|Add3~2 .FeedbackMux = 1'b0;
  35696. defparam \macro_inst|trig_ctrl_inst|Add3~2 .ShiftMux = 1'b0;
  35697. defparam \macro_inst|trig_ctrl_inst|Add3~2 .BypassEn = 1'b0;
  35698. defparam \macro_inst|trig_ctrl_inst|Add3~2 .CarryEnb = 1'b0;
  35699. alta_slice \macro_inst|trig_ctrl_inst|Add3~4 (
  35700. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [2]),
  35701. .B(vcc),
  35702. .C(vcc),
  35703. .D(vcc),
  35704. .Cin(\macro_inst|trig_ctrl_inst|Add3~3 ),
  35705. .Qin(),
  35706. .Clk(),
  35707. .AsyncReset(),
  35708. .SyncReset(),
  35709. .ShiftData(),
  35710. .SyncLoad(),
  35711. .LutOut(\macro_inst|trig_ctrl_inst|Add3~4_combout ),
  35712. .Cout(\macro_inst|trig_ctrl_inst|Add3~5 ),
  35713. .Q());
  35714. defparam \macro_inst|trig_ctrl_inst|Add3~4 .coord_x = 19;
  35715. defparam \macro_inst|trig_ctrl_inst|Add3~4 .coord_y = 10;
  35716. defparam \macro_inst|trig_ctrl_inst|Add3~4 .coord_z = 10;
  35717. defparam \macro_inst|trig_ctrl_inst|Add3~4 .mask = 16'h5AAF;
  35718. defparam \macro_inst|trig_ctrl_inst|Add3~4 .modeMux = 1'b1;
  35719. defparam \macro_inst|trig_ctrl_inst|Add3~4 .FeedbackMux = 1'b0;
  35720. defparam \macro_inst|trig_ctrl_inst|Add3~4 .ShiftMux = 1'b0;
  35721. defparam \macro_inst|trig_ctrl_inst|Add3~4 .BypassEn = 1'b0;
  35722. defparam \macro_inst|trig_ctrl_inst|Add3~4 .CarryEnb = 1'b0;
  35723. alta_slice \macro_inst|trig_ctrl_inst|Add3~6 (
  35724. .A(\macro_inst|cfg_reg_inst|trig_pulse_width [3]),
  35725. .B(vcc),
  35726. .C(vcc),
  35727. .D(vcc),
  35728. .Cin(\macro_inst|trig_ctrl_inst|Add3~5 ),
  35729. .Qin(),
  35730. .Clk(),
  35731. .AsyncReset(),
  35732. .SyncReset(),
  35733. .ShiftData(),
  35734. .SyncLoad(),
  35735. .LutOut(\macro_inst|trig_ctrl_inst|Add3~6_combout ),
  35736. .Cout(\macro_inst|trig_ctrl_inst|Add3~7 ),
  35737. .Q());
  35738. defparam \macro_inst|trig_ctrl_inst|Add3~6 .coord_x = 19;
  35739. defparam \macro_inst|trig_ctrl_inst|Add3~6 .coord_y = 10;
  35740. defparam \macro_inst|trig_ctrl_inst|Add3~6 .coord_z = 11;
  35741. defparam \macro_inst|trig_ctrl_inst|Add3~6 .mask = 16'h5A0A;
  35742. defparam \macro_inst|trig_ctrl_inst|Add3~6 .modeMux = 1'b1;
  35743. defparam \macro_inst|trig_ctrl_inst|Add3~6 .FeedbackMux = 1'b0;
  35744. defparam \macro_inst|trig_ctrl_inst|Add3~6 .ShiftMux = 1'b0;
  35745. defparam \macro_inst|trig_ctrl_inst|Add3~6 .BypassEn = 1'b0;
  35746. defparam \macro_inst|trig_ctrl_inst|Add3~6 .CarryEnb = 1'b0;
  35747. alta_slice \macro_inst|trig_ctrl_inst|Decoder0~1 (
  35748. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  35749. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  35750. .C(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  35751. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  35752. .Cin(),
  35753. .Qin(),
  35754. .Clk(),
  35755. .AsyncReset(),
  35756. .SyncReset(),
  35757. .ShiftData(),
  35758. .SyncLoad(),
  35759. .LutOut(\macro_inst|trig_ctrl_inst|Decoder0~1_combout ),
  35760. .Cout(),
  35761. .Q());
  35762. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .coord_x = 18;
  35763. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .coord_y = 5;
  35764. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .coord_z = 15;
  35765. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .mask = 16'h0008;
  35766. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .modeMux = 1'b0;
  35767. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .FeedbackMux = 1'b0;
  35768. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .ShiftMux = 1'b0;
  35769. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .BypassEn = 1'b0;
  35770. defparam \macro_inst|trig_ctrl_inst|Decoder0~1 .CarryEnb = 1'b1;
  35771. alta_slice \macro_inst|trig_ctrl_inst|Decoder1~0 (
  35772. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  35773. .B(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  35774. .C(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  35775. .D(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  35776. .Cin(),
  35777. .Qin(),
  35778. .Clk(),
  35779. .AsyncReset(),
  35780. .SyncReset(),
  35781. .ShiftData(),
  35782. .SyncLoad(),
  35783. .LutOut(\macro_inst|trig_ctrl_inst|Decoder1~0_combout ),
  35784. .Cout(),
  35785. .Q());
  35786. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .coord_x = 17;
  35787. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .coord_y = 4;
  35788. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .coord_z = 14;
  35789. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .mask = 16'h0800;
  35790. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .modeMux = 1'b0;
  35791. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .FeedbackMux = 1'b0;
  35792. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .ShiftMux = 1'b0;
  35793. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .BypassEn = 1'b0;
  35794. defparam \macro_inst|trig_ctrl_inst|Decoder1~0 .CarryEnb = 1'b1;
  35795. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~1 (
  35796. .A(\macro_inst|trig_ctrl_inst|Add0~0_combout ),
  35797. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [0]),
  35798. .C(vcc),
  35799. .D(vcc),
  35800. .Cin(),
  35801. .Qin(),
  35802. .Clk(),
  35803. .AsyncReset(),
  35804. .SyncReset(),
  35805. .ShiftData(),
  35806. .SyncLoad(),
  35807. .LutOut(),
  35808. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~1_cout ),
  35809. .Q());
  35810. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .coord_x = 16;
  35811. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .coord_y = 7;
  35812. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .coord_z = 0;
  35813. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .mask = 16'h0022;
  35814. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .modeMux = 1'b1;
  35815. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .FeedbackMux = 1'b0;
  35816. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .ShiftMux = 1'b0;
  35817. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .BypassEn = 1'b0;
  35818. defparam \macro_inst|trig_ctrl_inst|LessThan0~1 .CarryEnb = 1'b0;
  35819. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~11 (
  35820. .A(\macro_inst|trig_ctrl_inst|Add0~10_combout ),
  35821. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [5]),
  35822. .C(vcc),
  35823. .D(vcc),
  35824. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~9_cout ),
  35825. .Qin(),
  35826. .Clk(),
  35827. .AsyncReset(),
  35828. .SyncReset(),
  35829. .ShiftData(),
  35830. .SyncLoad(),
  35831. .LutOut(),
  35832. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~11_cout ),
  35833. .Q());
  35834. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .coord_x = 16;
  35835. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .coord_y = 7;
  35836. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .coord_z = 5;
  35837. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .mask = 16'h004D;
  35838. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .modeMux = 1'b1;
  35839. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .FeedbackMux = 1'b0;
  35840. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .ShiftMux = 1'b0;
  35841. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .BypassEn = 1'b0;
  35842. defparam \macro_inst|trig_ctrl_inst|LessThan0~11 .CarryEnb = 1'b0;
  35843. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~13 (
  35844. .A(\macro_inst|trig_ctrl_inst|Add0~12_combout ),
  35845. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [6]),
  35846. .C(vcc),
  35847. .D(vcc),
  35848. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~11_cout ),
  35849. .Qin(),
  35850. .Clk(),
  35851. .AsyncReset(),
  35852. .SyncReset(),
  35853. .ShiftData(),
  35854. .SyncLoad(),
  35855. .LutOut(),
  35856. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~13_cout ),
  35857. .Q());
  35858. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .coord_x = 16;
  35859. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .coord_y = 7;
  35860. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .coord_z = 6;
  35861. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .mask = 16'h002B;
  35862. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .modeMux = 1'b1;
  35863. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .FeedbackMux = 1'b0;
  35864. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .ShiftMux = 1'b0;
  35865. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .BypassEn = 1'b0;
  35866. defparam \macro_inst|trig_ctrl_inst|LessThan0~13 .CarryEnb = 1'b0;
  35867. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~15 (
  35868. .A(\macro_inst|trig_ctrl_inst|Add0~14_combout ),
  35869. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [7]),
  35870. .C(vcc),
  35871. .D(vcc),
  35872. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~13_cout ),
  35873. .Qin(),
  35874. .Clk(),
  35875. .AsyncReset(),
  35876. .SyncReset(),
  35877. .ShiftData(),
  35878. .SyncLoad(),
  35879. .LutOut(),
  35880. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~15_cout ),
  35881. .Q());
  35882. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .coord_x = 16;
  35883. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .coord_y = 7;
  35884. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .coord_z = 7;
  35885. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .mask = 16'h004D;
  35886. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .modeMux = 1'b1;
  35887. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .FeedbackMux = 1'b0;
  35888. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .ShiftMux = 1'b0;
  35889. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .BypassEn = 1'b0;
  35890. defparam \macro_inst|trig_ctrl_inst|LessThan0~15 .CarryEnb = 1'b0;
  35891. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~17 (
  35892. .A(\macro_inst|trig_ctrl_inst|eoc_cnt [8]),
  35893. .B(\macro_inst|trig_ctrl_inst|Add0~16_combout ),
  35894. .C(vcc),
  35895. .D(vcc),
  35896. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~15_cout ),
  35897. .Qin(),
  35898. .Clk(),
  35899. .AsyncReset(),
  35900. .SyncReset(),
  35901. .ShiftData(),
  35902. .SyncLoad(),
  35903. .LutOut(),
  35904. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~17_cout ),
  35905. .Q());
  35906. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .coord_x = 16;
  35907. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .coord_y = 7;
  35908. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .coord_z = 8;
  35909. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .mask = 16'h004D;
  35910. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .modeMux = 1'b1;
  35911. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .FeedbackMux = 1'b0;
  35912. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .ShiftMux = 1'b0;
  35913. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .BypassEn = 1'b0;
  35914. defparam \macro_inst|trig_ctrl_inst|LessThan0~17 .CarryEnb = 1'b0;
  35915. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~19 (
  35916. .A(\macro_inst|trig_ctrl_inst|Add0~18_combout ),
  35917. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [9]),
  35918. .C(vcc),
  35919. .D(vcc),
  35920. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~17_cout ),
  35921. .Qin(),
  35922. .Clk(),
  35923. .AsyncReset(),
  35924. .SyncReset(),
  35925. .ShiftData(),
  35926. .SyncLoad(),
  35927. .LutOut(),
  35928. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~19_cout ),
  35929. .Q());
  35930. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .coord_x = 16;
  35931. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .coord_y = 7;
  35932. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .coord_z = 9;
  35933. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .mask = 16'h004D;
  35934. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .modeMux = 1'b1;
  35935. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .FeedbackMux = 1'b0;
  35936. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .ShiftMux = 1'b0;
  35937. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .BypassEn = 1'b0;
  35938. defparam \macro_inst|trig_ctrl_inst|LessThan0~19 .CarryEnb = 1'b0;
  35939. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~21 (
  35940. .A(\macro_inst|trig_ctrl_inst|Add0~20_combout ),
  35941. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [10]),
  35942. .C(vcc),
  35943. .D(vcc),
  35944. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~19_cout ),
  35945. .Qin(),
  35946. .Clk(),
  35947. .AsyncReset(),
  35948. .SyncReset(),
  35949. .ShiftData(),
  35950. .SyncLoad(),
  35951. .LutOut(),
  35952. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~21_cout ),
  35953. .Q());
  35954. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .coord_x = 16;
  35955. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .coord_y = 7;
  35956. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .coord_z = 10;
  35957. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .mask = 16'h002B;
  35958. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .modeMux = 1'b1;
  35959. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .FeedbackMux = 1'b0;
  35960. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .ShiftMux = 1'b0;
  35961. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .BypassEn = 1'b0;
  35962. defparam \macro_inst|trig_ctrl_inst|LessThan0~21 .CarryEnb = 1'b0;
  35963. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~23 (
  35964. .A(\macro_inst|trig_ctrl_inst|Add0~22_combout ),
  35965. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [11]),
  35966. .C(vcc),
  35967. .D(vcc),
  35968. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~21_cout ),
  35969. .Qin(),
  35970. .Clk(),
  35971. .AsyncReset(),
  35972. .SyncReset(),
  35973. .ShiftData(),
  35974. .SyncLoad(),
  35975. .LutOut(),
  35976. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~23_cout ),
  35977. .Q());
  35978. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .coord_x = 16;
  35979. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .coord_y = 7;
  35980. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .coord_z = 11;
  35981. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .mask = 16'h004D;
  35982. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .modeMux = 1'b1;
  35983. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .FeedbackMux = 1'b0;
  35984. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .ShiftMux = 1'b0;
  35985. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .BypassEn = 1'b0;
  35986. defparam \macro_inst|trig_ctrl_inst|LessThan0~23 .CarryEnb = 1'b0;
  35987. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~25 (
  35988. .A(\macro_inst|trig_ctrl_inst|Add0~24_combout ),
  35989. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [12]),
  35990. .C(vcc),
  35991. .D(vcc),
  35992. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~23_cout ),
  35993. .Qin(),
  35994. .Clk(),
  35995. .AsyncReset(),
  35996. .SyncReset(),
  35997. .ShiftData(),
  35998. .SyncLoad(),
  35999. .LutOut(),
  36000. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~25_cout ),
  36001. .Q());
  36002. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .coord_x = 16;
  36003. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .coord_y = 7;
  36004. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .coord_z = 12;
  36005. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .mask = 16'h002B;
  36006. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .modeMux = 1'b1;
  36007. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .FeedbackMux = 1'b0;
  36008. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .ShiftMux = 1'b0;
  36009. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .BypassEn = 1'b0;
  36010. defparam \macro_inst|trig_ctrl_inst|LessThan0~25 .CarryEnb = 1'b0;
  36011. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~27 (
  36012. .A(\macro_inst|trig_ctrl_inst|Add0~26_combout ),
  36013. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [13]),
  36014. .C(vcc),
  36015. .D(vcc),
  36016. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~25_cout ),
  36017. .Qin(),
  36018. .Clk(),
  36019. .AsyncReset(),
  36020. .SyncReset(),
  36021. .ShiftData(),
  36022. .SyncLoad(),
  36023. .LutOut(),
  36024. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~27_cout ),
  36025. .Q());
  36026. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .coord_x = 16;
  36027. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .coord_y = 7;
  36028. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .coord_z = 13;
  36029. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .mask = 16'h004D;
  36030. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .modeMux = 1'b1;
  36031. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .FeedbackMux = 1'b0;
  36032. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .ShiftMux = 1'b0;
  36033. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .BypassEn = 1'b0;
  36034. defparam \macro_inst|trig_ctrl_inst|LessThan0~27 .CarryEnb = 1'b0;
  36035. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~29 (
  36036. .A(\macro_inst|trig_ctrl_inst|Add0~28_combout ),
  36037. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [14]),
  36038. .C(vcc),
  36039. .D(vcc),
  36040. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~27_cout ),
  36041. .Qin(),
  36042. .Clk(),
  36043. .AsyncReset(),
  36044. .SyncReset(),
  36045. .ShiftData(),
  36046. .SyncLoad(),
  36047. .LutOut(),
  36048. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~29_cout ),
  36049. .Q());
  36050. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .coord_x = 16;
  36051. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .coord_y = 7;
  36052. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .coord_z = 14;
  36053. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .mask = 16'h002B;
  36054. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .modeMux = 1'b1;
  36055. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .FeedbackMux = 1'b0;
  36056. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .ShiftMux = 1'b0;
  36057. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .BypassEn = 1'b0;
  36058. defparam \macro_inst|trig_ctrl_inst|LessThan0~29 .CarryEnb = 1'b0;
  36059. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~3 (
  36060. .A(\macro_inst|trig_ctrl_inst|Add0~2_combout ),
  36061. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [1]),
  36062. .C(vcc),
  36063. .D(vcc),
  36064. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~1_cout ),
  36065. .Qin(),
  36066. .Clk(),
  36067. .AsyncReset(),
  36068. .SyncReset(),
  36069. .ShiftData(),
  36070. .SyncLoad(),
  36071. .LutOut(),
  36072. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~3_cout ),
  36073. .Q());
  36074. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .coord_x = 16;
  36075. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .coord_y = 7;
  36076. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .coord_z = 1;
  36077. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .mask = 16'h004D;
  36078. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .modeMux = 1'b1;
  36079. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .FeedbackMux = 1'b0;
  36080. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .ShiftMux = 1'b0;
  36081. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .BypassEn = 1'b0;
  36082. defparam \macro_inst|trig_ctrl_inst|LessThan0~3 .CarryEnb = 1'b0;
  36083. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~30 (
  36084. .A(vcc),
  36085. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [15]),
  36086. .C(vcc),
  36087. .D(\macro_inst|trig_ctrl_inst|Add0~30_combout ),
  36088. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~29_cout ),
  36089. .Qin(),
  36090. .Clk(),
  36091. .AsyncReset(),
  36092. .SyncReset(),
  36093. .ShiftData(),
  36094. .SyncLoad(),
  36095. .LutOut(\macro_inst|trig_ctrl_inst|LessThan0~30_combout ),
  36096. .Cout(),
  36097. .Q());
  36098. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .coord_x = 16;
  36099. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .coord_y = 7;
  36100. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .coord_z = 15;
  36101. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .mask = 16'hF330;
  36102. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .modeMux = 1'b1;
  36103. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .FeedbackMux = 1'b0;
  36104. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .ShiftMux = 1'b0;
  36105. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .BypassEn = 1'b0;
  36106. defparam \macro_inst|trig_ctrl_inst|LessThan0~30 .CarryEnb = 1'b1;
  36107. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~5 (
  36108. .A(\macro_inst|trig_ctrl_inst|Add0~4_combout ),
  36109. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [2]),
  36110. .C(vcc),
  36111. .D(vcc),
  36112. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~3_cout ),
  36113. .Qin(),
  36114. .Clk(),
  36115. .AsyncReset(),
  36116. .SyncReset(),
  36117. .ShiftData(),
  36118. .SyncLoad(),
  36119. .LutOut(),
  36120. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~5_cout ),
  36121. .Q());
  36122. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .coord_x = 16;
  36123. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .coord_y = 7;
  36124. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .coord_z = 2;
  36125. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .mask = 16'h002B;
  36126. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .modeMux = 1'b1;
  36127. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .FeedbackMux = 1'b0;
  36128. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .ShiftMux = 1'b0;
  36129. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .BypassEn = 1'b0;
  36130. defparam \macro_inst|trig_ctrl_inst|LessThan0~5 .CarryEnb = 1'b0;
  36131. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~7 (
  36132. .A(\macro_inst|trig_ctrl_inst|Add0~6_combout ),
  36133. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [3]),
  36134. .C(vcc),
  36135. .D(vcc),
  36136. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~5_cout ),
  36137. .Qin(),
  36138. .Clk(),
  36139. .AsyncReset(),
  36140. .SyncReset(),
  36141. .ShiftData(),
  36142. .SyncLoad(),
  36143. .LutOut(),
  36144. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~7_cout ),
  36145. .Q());
  36146. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .coord_x = 16;
  36147. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .coord_y = 7;
  36148. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .coord_z = 3;
  36149. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .mask = 16'h004D;
  36150. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .modeMux = 1'b1;
  36151. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .FeedbackMux = 1'b0;
  36152. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .ShiftMux = 1'b0;
  36153. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .BypassEn = 1'b0;
  36154. defparam \macro_inst|trig_ctrl_inst|LessThan0~7 .CarryEnb = 1'b0;
  36155. alta_slice \macro_inst|trig_ctrl_inst|LessThan0~9 (
  36156. .A(\macro_inst|trig_ctrl_inst|Add0~8_combout ),
  36157. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [4]),
  36158. .C(vcc),
  36159. .D(vcc),
  36160. .Cin(\macro_inst|trig_ctrl_inst|LessThan0~7_cout ),
  36161. .Qin(),
  36162. .Clk(),
  36163. .AsyncReset(),
  36164. .SyncReset(),
  36165. .ShiftData(),
  36166. .SyncLoad(),
  36167. .LutOut(),
  36168. .Cout(\macro_inst|trig_ctrl_inst|LessThan0~9_cout ),
  36169. .Q());
  36170. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .coord_x = 16;
  36171. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .coord_y = 7;
  36172. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .coord_z = 4;
  36173. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .mask = 16'h002B;
  36174. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .modeMux = 1'b1;
  36175. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .FeedbackMux = 1'b0;
  36176. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .ShiftMux = 1'b0;
  36177. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .BypassEn = 1'b0;
  36178. defparam \macro_inst|trig_ctrl_inst|LessThan0~9 .CarryEnb = 1'b0;
  36179. alta_slice \macro_inst|trig_ctrl_inst|LessThan1~0 (
  36180. .A(\macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0_combout ),
  36181. .B(\macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4_combout ),
  36182. .C(\macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2_combout ),
  36183. .D(\macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6_combout ),
  36184. .Cin(),
  36185. .Qin(),
  36186. .Clk(),
  36187. .AsyncReset(),
  36188. .SyncReset(),
  36189. .ShiftData(),
  36190. .SyncLoad(),
  36191. .LutOut(\macro_inst|trig_ctrl_inst|LessThan1~0_combout ),
  36192. .Cout(),
  36193. .Q());
  36194. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .coord_x = 19;
  36195. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .coord_y = 7;
  36196. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .coord_z = 13;
  36197. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .mask = 16'h7FFF;
  36198. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .modeMux = 1'b0;
  36199. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .FeedbackMux = 1'b0;
  36200. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .ShiftMux = 1'b0;
  36201. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .BypassEn = 1'b0;
  36202. defparam \macro_inst|trig_ctrl_inst|LessThan1~0 .CarryEnb = 1'b1;
  36203. alta_slice \macro_inst|trig_ctrl_inst|LessThan1~1 (
  36204. .A(\macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14_combout ),
  36205. .B(\macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12_combout ),
  36206. .C(\macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10_combout ),
  36207. .D(\macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8_combout ),
  36208. .Cin(),
  36209. .Qin(),
  36210. .Clk(),
  36211. .AsyncReset(),
  36212. .SyncReset(),
  36213. .ShiftData(),
  36214. .SyncLoad(),
  36215. .LutOut(\macro_inst|trig_ctrl_inst|LessThan1~1_combout ),
  36216. .Cout(),
  36217. .Q());
  36218. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .coord_x = 19;
  36219. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .coord_y = 7;
  36220. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .coord_z = 11;
  36221. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .mask = 16'h7FFF;
  36222. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .modeMux = 1'b0;
  36223. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .FeedbackMux = 1'b0;
  36224. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .ShiftMux = 1'b0;
  36225. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .BypassEn = 1'b0;
  36226. defparam \macro_inst|trig_ctrl_inst|LessThan1~1 .CarryEnb = 1'b1;
  36227. alta_slice \macro_inst|trig_ctrl_inst|LessThan1~2 (
  36228. .A(\macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18_combout ),
  36229. .B(\macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16_combout ),
  36230. .C(\macro_inst|trig_ctrl_inst|LessThan1~0_combout ),
  36231. .D(\macro_inst|trig_ctrl_inst|LessThan1~1_combout ),
  36232. .Cin(),
  36233. .Qin(),
  36234. .Clk(),
  36235. .AsyncReset(),
  36236. .SyncReset(),
  36237. .ShiftData(),
  36238. .SyncLoad(),
  36239. .LutOut(\macro_inst|trig_ctrl_inst|LessThan1~2_combout ),
  36240. .Cout(),
  36241. .Q());
  36242. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .coord_x = 19;
  36243. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .coord_y = 7;
  36244. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .coord_z = 0;
  36245. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .mask = 16'hFFF7;
  36246. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .modeMux = 1'b0;
  36247. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .FeedbackMux = 1'b0;
  36248. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .ShiftMux = 1'b0;
  36249. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .BypassEn = 1'b0;
  36250. defparam \macro_inst|trig_ctrl_inst|LessThan1~2 .CarryEnb = 1'b1;
  36251. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~1 (
  36252. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [0]),
  36253. .B(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  36254. .C(vcc),
  36255. .D(vcc),
  36256. .Cin(),
  36257. .Qin(),
  36258. .Clk(),
  36259. .AsyncReset(),
  36260. .SyncReset(),
  36261. .ShiftData(),
  36262. .SyncLoad(),
  36263. .LutOut(),
  36264. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~1_cout ),
  36265. .Q());
  36266. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .coord_x = 20;
  36267. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .coord_y = 4;
  36268. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .coord_z = 3;
  36269. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .mask = 16'h0044;
  36270. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .modeMux = 1'b1;
  36271. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .FeedbackMux = 1'b0;
  36272. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .ShiftMux = 1'b0;
  36273. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .BypassEn = 1'b0;
  36274. defparam \macro_inst|trig_ctrl_inst|LessThan2~1 .CarryEnb = 1'b0;
  36275. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~11 (
  36276. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [5]),
  36277. .B(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  36278. .C(vcc),
  36279. .D(vcc),
  36280. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~9_cout ),
  36281. .Qin(),
  36282. .Clk(),
  36283. .AsyncReset(),
  36284. .SyncReset(),
  36285. .ShiftData(),
  36286. .SyncLoad(),
  36287. .LutOut(),
  36288. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~11_cout ),
  36289. .Q());
  36290. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .coord_x = 20;
  36291. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .coord_y = 4;
  36292. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .coord_z = 8;
  36293. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .mask = 16'h002B;
  36294. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .modeMux = 1'b1;
  36295. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .FeedbackMux = 1'b0;
  36296. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .ShiftMux = 1'b0;
  36297. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .BypassEn = 1'b0;
  36298. defparam \macro_inst|trig_ctrl_inst|LessThan2~11 .CarryEnb = 1'b0;
  36299. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~13 (
  36300. .A(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  36301. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [6]),
  36302. .C(vcc),
  36303. .D(vcc),
  36304. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~11_cout ),
  36305. .Qin(),
  36306. .Clk(),
  36307. .AsyncReset(),
  36308. .SyncReset(),
  36309. .ShiftData(),
  36310. .SyncLoad(),
  36311. .LutOut(),
  36312. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~13_cout ),
  36313. .Q());
  36314. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .coord_x = 20;
  36315. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .coord_y = 4;
  36316. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .coord_z = 9;
  36317. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .mask = 16'h002B;
  36318. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .modeMux = 1'b1;
  36319. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .FeedbackMux = 1'b0;
  36320. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .ShiftMux = 1'b0;
  36321. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .BypassEn = 1'b0;
  36322. defparam \macro_inst|trig_ctrl_inst|LessThan2~13 .CarryEnb = 1'b0;
  36323. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~15 (
  36324. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [7]),
  36325. .B(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  36326. .C(vcc),
  36327. .D(vcc),
  36328. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~13_cout ),
  36329. .Qin(),
  36330. .Clk(),
  36331. .AsyncReset(),
  36332. .SyncReset(),
  36333. .ShiftData(),
  36334. .SyncLoad(),
  36335. .LutOut(),
  36336. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~15_cout ),
  36337. .Q());
  36338. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .coord_x = 20;
  36339. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .coord_y = 4;
  36340. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .coord_z = 10;
  36341. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .mask = 16'h002B;
  36342. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .modeMux = 1'b1;
  36343. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .FeedbackMux = 1'b0;
  36344. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .ShiftMux = 1'b0;
  36345. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .BypassEn = 1'b0;
  36346. defparam \macro_inst|trig_ctrl_inst|LessThan2~15 .CarryEnb = 1'b0;
  36347. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~17 (
  36348. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [8]),
  36349. .B(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  36350. .C(vcc),
  36351. .D(vcc),
  36352. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~15_cout ),
  36353. .Qin(),
  36354. .Clk(),
  36355. .AsyncReset(),
  36356. .SyncReset(),
  36357. .ShiftData(),
  36358. .SyncLoad(),
  36359. .LutOut(),
  36360. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~17_cout ),
  36361. .Q());
  36362. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .coord_x = 20;
  36363. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .coord_y = 4;
  36364. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .coord_z = 11;
  36365. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .mask = 16'h004D;
  36366. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .modeMux = 1'b1;
  36367. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .FeedbackMux = 1'b0;
  36368. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .ShiftMux = 1'b0;
  36369. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .BypassEn = 1'b0;
  36370. defparam \macro_inst|trig_ctrl_inst|LessThan2~17 .CarryEnb = 1'b0;
  36371. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~19 (
  36372. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [9]),
  36373. .B(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  36374. .C(vcc),
  36375. .D(vcc),
  36376. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~17_cout ),
  36377. .Qin(),
  36378. .Clk(),
  36379. .AsyncReset(),
  36380. .SyncReset(),
  36381. .ShiftData(),
  36382. .SyncLoad(),
  36383. .LutOut(),
  36384. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~19_cout ),
  36385. .Q());
  36386. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .coord_x = 20;
  36387. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .coord_y = 4;
  36388. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .coord_z = 12;
  36389. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .mask = 16'h002B;
  36390. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .modeMux = 1'b1;
  36391. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .FeedbackMux = 1'b0;
  36392. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .ShiftMux = 1'b0;
  36393. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .BypassEn = 1'b0;
  36394. defparam \macro_inst|trig_ctrl_inst|LessThan2~19 .CarryEnb = 1'b0;
  36395. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~21 (
  36396. .A(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  36397. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [10]),
  36398. .C(vcc),
  36399. .D(vcc),
  36400. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~19_cout ),
  36401. .Qin(),
  36402. .Clk(),
  36403. .AsyncReset(),
  36404. .SyncReset(),
  36405. .ShiftData(),
  36406. .SyncLoad(),
  36407. .LutOut(),
  36408. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~21_cout ),
  36409. .Q());
  36410. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .coord_x = 20;
  36411. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .coord_y = 4;
  36412. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .coord_z = 13;
  36413. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .mask = 16'h002B;
  36414. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .modeMux = 1'b1;
  36415. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .FeedbackMux = 1'b0;
  36416. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .ShiftMux = 1'b0;
  36417. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .BypassEn = 1'b0;
  36418. defparam \macro_inst|trig_ctrl_inst|LessThan2~21 .CarryEnb = 1'b0;
  36419. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~22 (
  36420. .A(vcc),
  36421. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [11]),
  36422. .C(vcc),
  36423. .D(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  36424. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~21_cout ),
  36425. .Qin(),
  36426. .Clk(),
  36427. .AsyncReset(),
  36428. .SyncReset(),
  36429. .ShiftData(),
  36430. .SyncLoad(),
  36431. .LutOut(\macro_inst|trig_ctrl_inst|LessThan2~22_combout ),
  36432. .Cout(),
  36433. .Q());
  36434. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .coord_x = 20;
  36435. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .coord_y = 4;
  36436. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .coord_z = 14;
  36437. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .mask = 16'h30F3;
  36438. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .modeMux = 1'b1;
  36439. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .FeedbackMux = 1'b0;
  36440. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .ShiftMux = 1'b0;
  36441. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .BypassEn = 1'b0;
  36442. defparam \macro_inst|trig_ctrl_inst|LessThan2~22 .CarryEnb = 1'b1;
  36443. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~3 (
  36444. .A(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  36445. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [1]),
  36446. .C(vcc),
  36447. .D(vcc),
  36448. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~1_cout ),
  36449. .Qin(),
  36450. .Clk(),
  36451. .AsyncReset(),
  36452. .SyncReset(),
  36453. .ShiftData(),
  36454. .SyncLoad(),
  36455. .LutOut(),
  36456. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~3_cout ),
  36457. .Q());
  36458. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .coord_x = 20;
  36459. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .coord_y = 4;
  36460. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .coord_z = 4;
  36461. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .mask = 16'h004D;
  36462. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .modeMux = 1'b1;
  36463. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .FeedbackMux = 1'b0;
  36464. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .ShiftMux = 1'b0;
  36465. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .BypassEn = 1'b0;
  36466. defparam \macro_inst|trig_ctrl_inst|LessThan2~3 .CarryEnb = 1'b0;
  36467. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~5 (
  36468. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [2]),
  36469. .B(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  36470. .C(vcc),
  36471. .D(vcc),
  36472. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~3_cout ),
  36473. .Qin(),
  36474. .Clk(),
  36475. .AsyncReset(),
  36476. .SyncReset(),
  36477. .ShiftData(),
  36478. .SyncLoad(),
  36479. .LutOut(),
  36480. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~5_cout ),
  36481. .Q());
  36482. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .coord_x = 20;
  36483. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .coord_y = 4;
  36484. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .coord_z = 5;
  36485. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .mask = 16'h004D;
  36486. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .modeMux = 1'b1;
  36487. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .FeedbackMux = 1'b0;
  36488. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .ShiftMux = 1'b0;
  36489. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .BypassEn = 1'b0;
  36490. defparam \macro_inst|trig_ctrl_inst|LessThan2~5 .CarryEnb = 1'b0;
  36491. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~7 (
  36492. .A(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  36493. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [3]),
  36494. .C(vcc),
  36495. .D(vcc),
  36496. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~5_cout ),
  36497. .Qin(),
  36498. .Clk(),
  36499. .AsyncReset(),
  36500. .SyncReset(),
  36501. .ShiftData(),
  36502. .SyncLoad(),
  36503. .LutOut(),
  36504. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~7_cout ),
  36505. .Q());
  36506. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .coord_x = 20;
  36507. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .coord_y = 4;
  36508. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .coord_z = 6;
  36509. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .mask = 16'h004D;
  36510. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .modeMux = 1'b1;
  36511. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .FeedbackMux = 1'b0;
  36512. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .ShiftMux = 1'b0;
  36513. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .BypassEn = 1'b0;
  36514. defparam \macro_inst|trig_ctrl_inst|LessThan2~7 .CarryEnb = 1'b0;
  36515. alta_slice \macro_inst|trig_ctrl_inst|LessThan2~9 (
  36516. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [4]),
  36517. .B(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  36518. .C(vcc),
  36519. .D(vcc),
  36520. .Cin(\macro_inst|trig_ctrl_inst|LessThan2~7_cout ),
  36521. .Qin(),
  36522. .Clk(),
  36523. .AsyncReset(),
  36524. .SyncReset(),
  36525. .ShiftData(),
  36526. .SyncLoad(),
  36527. .LutOut(),
  36528. .Cout(\macro_inst|trig_ctrl_inst|LessThan2~9_cout ),
  36529. .Q());
  36530. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .coord_x = 20;
  36531. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .coord_y = 4;
  36532. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .coord_z = 7;
  36533. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .mask = 16'h004D;
  36534. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .modeMux = 1'b1;
  36535. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .FeedbackMux = 1'b0;
  36536. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .ShiftMux = 1'b0;
  36537. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .BypassEn = 1'b0;
  36538. defparam \macro_inst|trig_ctrl_inst|LessThan2~9 .CarryEnb = 1'b0;
  36539. alta_slice \macro_inst|trig_ctrl_inst|LessThan3~1 (
  36540. .A(\macro_inst|apb_adc0_inst|apb_db [0]),
  36541. .B(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  36542. .C(vcc),
  36543. .D(vcc),
  36544. .Cin(),
  36545. .Qin(),
  36546. .Clk(),
  36547. .AsyncReset(),
  36548. .SyncReset(),
  36549. .ShiftData(),
  36550. .SyncLoad(),
  36551. .LutOut(),
  36552. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~1_cout ),
  36553. .Q());
  36554. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .coord_x = 19;
  36555. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .coord_y = 5;
  36556. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .coord_z = 3;
  36557. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .mask = 16'h0044;
  36558. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .modeMux = 1'b1;
  36559. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .FeedbackMux = 1'b0;
  36560. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .ShiftMux = 1'b0;
  36561. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .BypassEn = 1'b0;
  36562. defparam \macro_inst|trig_ctrl_inst|LessThan3~1 .CarryEnb = 1'b0;
  36563. alta_slice \macro_inst|trig_ctrl_inst|LessThan3~3 (
  36564. .A(\macro_inst|apb_adc0_inst|apb_db [1]),
  36565. .B(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  36566. .C(vcc),
  36567. .D(vcc),
  36568. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~1_cout ),
  36569. .Qin(),
  36570. .Clk(),
  36571. .AsyncReset(),
  36572. .SyncReset(),
  36573. .ShiftData(),
  36574. .SyncLoad(),
  36575. .LutOut(),
  36576. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~3_cout ),
  36577. .Q());
  36578. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .coord_x = 19;
  36579. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .coord_y = 5;
  36580. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .coord_z = 4;
  36581. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .mask = 16'h002B;
  36582. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .modeMux = 1'b1;
  36583. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .FeedbackMux = 1'b0;
  36584. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .ShiftMux = 1'b0;
  36585. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .BypassEn = 1'b0;
  36586. defparam \macro_inst|trig_ctrl_inst|LessThan3~3 .CarryEnb = 1'b0;
  36587. alta_slice \macro_inst|trig_ctrl_inst|LessThan3~5 (
  36588. .A(\macro_inst|apb_adc0_inst|apb_db [2]),
  36589. .B(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  36590. .C(vcc),
  36591. .D(vcc),
  36592. .Cin(\macro_inst|trig_ctrl_inst|LessThan3~3_cout ),
  36593. .Qin(),
  36594. .Clk(),
  36595. .AsyncReset(),
  36596. .SyncReset(),
  36597. .ShiftData(),
  36598. .SyncLoad(),
  36599. .LutOut(),
  36600. .Cout(\macro_inst|trig_ctrl_inst|LessThan3~5_cout ),
  36601. .Q());
  36602. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .coord_x = 19;
  36603. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .coord_y = 5;
  36604. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .coord_z = 5;
  36605. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .mask = 16'h004D;
  36606. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .modeMux = 1'b1;
  36607. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .FeedbackMux = 1'b0;
  36608. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .ShiftMux = 1'b0;
  36609. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .BypassEn = 1'b0;
  36610. defparam \macro_inst|trig_ctrl_inst|LessThan3~5 .CarryEnb = 1'b0;
  36611. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~1 (
  36612. .A(\macro_inst|apb_adc0_inst|apb_db [0]),
  36613. .B(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  36614. .C(vcc),
  36615. .D(vcc),
  36616. .Cin(),
  36617. .Qin(),
  36618. .Clk(),
  36619. .AsyncReset(),
  36620. .SyncReset(),
  36621. .ShiftData(),
  36622. .SyncLoad(),
  36623. .LutOut(),
  36624. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~1_cout ),
  36625. .Q());
  36626. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .coord_x = 20;
  36627. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .coord_y = 5;
  36628. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .coord_z = 0;
  36629. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .mask = 16'h0022;
  36630. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .modeMux = 1'b1;
  36631. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .FeedbackMux = 1'b0;
  36632. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .ShiftMux = 1'b0;
  36633. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .BypassEn = 1'b0;
  36634. defparam \macro_inst|trig_ctrl_inst|LessThan5~1 .CarryEnb = 1'b0;
  36635. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~11 (
  36636. .A(\macro_inst|apb_adc0_inst|apb_db [5]),
  36637. .B(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  36638. .C(vcc),
  36639. .D(vcc),
  36640. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~9_cout ),
  36641. .Qin(),
  36642. .Clk(),
  36643. .AsyncReset(),
  36644. .SyncReset(),
  36645. .ShiftData(),
  36646. .SyncLoad(),
  36647. .LutOut(),
  36648. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~11_cout ),
  36649. .Q());
  36650. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .coord_x = 20;
  36651. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .coord_y = 5;
  36652. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .coord_z = 5;
  36653. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .mask = 16'h004D;
  36654. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .modeMux = 1'b1;
  36655. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .FeedbackMux = 1'b0;
  36656. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .ShiftMux = 1'b0;
  36657. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .BypassEn = 1'b0;
  36658. defparam \macro_inst|trig_ctrl_inst|LessThan5~11 .CarryEnb = 1'b0;
  36659. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~13 (
  36660. .A(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  36661. .B(\macro_inst|apb_adc0_inst|apb_db [6]),
  36662. .C(vcc),
  36663. .D(vcc),
  36664. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~11_cout ),
  36665. .Qin(),
  36666. .Clk(),
  36667. .AsyncReset(),
  36668. .SyncReset(),
  36669. .ShiftData(),
  36670. .SyncLoad(),
  36671. .LutOut(),
  36672. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~13_cout ),
  36673. .Q());
  36674. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .coord_x = 20;
  36675. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .coord_y = 5;
  36676. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .coord_z = 6;
  36677. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .mask = 16'h004D;
  36678. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .modeMux = 1'b1;
  36679. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .FeedbackMux = 1'b0;
  36680. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .ShiftMux = 1'b0;
  36681. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .BypassEn = 1'b0;
  36682. defparam \macro_inst|trig_ctrl_inst|LessThan5~13 .CarryEnb = 1'b0;
  36683. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~17 (
  36684. .A(\macro_inst|apb_adc0_inst|apb_db [8]),
  36685. .B(\macro_inst|cfg_reg_inst|trig_threshold [8]),
  36686. .C(vcc),
  36687. .D(vcc),
  36688. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~15_cout ),
  36689. .Qin(),
  36690. .Clk(),
  36691. .AsyncReset(),
  36692. .SyncReset(),
  36693. .ShiftData(),
  36694. .SyncLoad(),
  36695. .LutOut(),
  36696. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~17_cout ),
  36697. .Q());
  36698. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .coord_x = 20;
  36699. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .coord_y = 5;
  36700. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .coord_z = 8;
  36701. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .mask = 16'h002B;
  36702. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .modeMux = 1'b1;
  36703. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .FeedbackMux = 1'b0;
  36704. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .ShiftMux = 1'b0;
  36705. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .BypassEn = 1'b0;
  36706. defparam \macro_inst|trig_ctrl_inst|LessThan5~17 .CarryEnb = 1'b0;
  36707. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~21 (
  36708. .A(\macro_inst|apb_adc0_inst|apb_db [10]),
  36709. .B(\macro_inst|cfg_reg_inst|trig_threshold [10]),
  36710. .C(vcc),
  36711. .D(vcc),
  36712. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~19_cout ),
  36713. .Qin(),
  36714. .Clk(),
  36715. .AsyncReset(),
  36716. .SyncReset(),
  36717. .ShiftData(),
  36718. .SyncLoad(),
  36719. .LutOut(),
  36720. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~21_cout ),
  36721. .Q());
  36722. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .coord_x = 20;
  36723. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .coord_y = 5;
  36724. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .coord_z = 10;
  36725. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .mask = 16'h002B;
  36726. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .modeMux = 1'b1;
  36727. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .FeedbackMux = 1'b0;
  36728. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .ShiftMux = 1'b0;
  36729. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .BypassEn = 1'b0;
  36730. defparam \macro_inst|trig_ctrl_inst|LessThan5~21 .CarryEnb = 1'b0;
  36731. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~22 (
  36732. .A(vcc),
  36733. .B(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  36734. .C(vcc),
  36735. .D(\macro_inst|apb_adc0_inst|apb_db [11]),
  36736. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~21_cout ),
  36737. .Qin(),
  36738. .Clk(),
  36739. .AsyncReset(),
  36740. .SyncReset(),
  36741. .ShiftData(),
  36742. .SyncLoad(),
  36743. .LutOut(\macro_inst|trig_ctrl_inst|LessThan5~22_combout ),
  36744. .Cout(),
  36745. .Q());
  36746. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .coord_x = 20;
  36747. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .coord_y = 5;
  36748. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .coord_z = 11;
  36749. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .mask = 16'hFCC0;
  36750. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .modeMux = 1'b1;
  36751. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .FeedbackMux = 1'b0;
  36752. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .ShiftMux = 1'b0;
  36753. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .BypassEn = 1'b0;
  36754. defparam \macro_inst|trig_ctrl_inst|LessThan5~22 .CarryEnb = 1'b1;
  36755. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~5 (
  36756. .A(\macro_inst|apb_adc0_inst|apb_db [2]),
  36757. .B(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  36758. .C(vcc),
  36759. .D(vcc),
  36760. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~3_cout ),
  36761. .Qin(),
  36762. .Clk(),
  36763. .AsyncReset(),
  36764. .SyncReset(),
  36765. .ShiftData(),
  36766. .SyncLoad(),
  36767. .LutOut(),
  36768. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~5_cout ),
  36769. .Q());
  36770. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .coord_x = 20;
  36771. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .coord_y = 5;
  36772. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .coord_z = 2;
  36773. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .mask = 16'h002B;
  36774. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .modeMux = 1'b1;
  36775. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .FeedbackMux = 1'b0;
  36776. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .ShiftMux = 1'b0;
  36777. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .BypassEn = 1'b0;
  36778. defparam \macro_inst|trig_ctrl_inst|LessThan5~5 .CarryEnb = 1'b0;
  36779. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~7 (
  36780. .A(\macro_inst|apb_adc0_inst|apb_db [3]),
  36781. .B(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  36782. .C(vcc),
  36783. .D(vcc),
  36784. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~5_cout ),
  36785. .Qin(),
  36786. .Clk(),
  36787. .AsyncReset(),
  36788. .SyncReset(),
  36789. .ShiftData(),
  36790. .SyncLoad(),
  36791. .LutOut(),
  36792. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~7_cout ),
  36793. .Q());
  36794. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .coord_x = 20;
  36795. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .coord_y = 5;
  36796. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .coord_z = 3;
  36797. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .mask = 16'h004D;
  36798. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .modeMux = 1'b1;
  36799. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .FeedbackMux = 1'b0;
  36800. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .ShiftMux = 1'b0;
  36801. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .BypassEn = 1'b0;
  36802. defparam \macro_inst|trig_ctrl_inst|LessThan5~7 .CarryEnb = 1'b0;
  36803. alta_slice \macro_inst|trig_ctrl_inst|LessThan5~9 (
  36804. .A(\macro_inst|apb_adc0_inst|apb_db [4]),
  36805. .B(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  36806. .C(vcc),
  36807. .D(vcc),
  36808. .Cin(\macro_inst|trig_ctrl_inst|LessThan5~7_cout ),
  36809. .Qin(),
  36810. .Clk(),
  36811. .AsyncReset(),
  36812. .SyncReset(),
  36813. .ShiftData(),
  36814. .SyncLoad(),
  36815. .LutOut(),
  36816. .Cout(\macro_inst|trig_ctrl_inst|LessThan5~9_cout ),
  36817. .Q());
  36818. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .coord_x = 20;
  36819. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .coord_y = 5;
  36820. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .coord_z = 4;
  36821. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .mask = 16'h002B;
  36822. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .modeMux = 1'b1;
  36823. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .FeedbackMux = 1'b0;
  36824. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .ShiftMux = 1'b0;
  36825. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .BypassEn = 1'b0;
  36826. defparam \macro_inst|trig_ctrl_inst|LessThan5~9 .CarryEnb = 1'b0;
  36827. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~1 (
  36828. .A(\macro_inst|trig_ctrl_inst|Add3~0_combout ),
  36829. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [0]),
  36830. .C(vcc),
  36831. .D(vcc),
  36832. .Cin(),
  36833. .Qin(),
  36834. .Clk(),
  36835. .AsyncReset(),
  36836. .SyncReset(),
  36837. .ShiftData(),
  36838. .SyncLoad(),
  36839. .LutOut(),
  36840. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~1_cout ),
  36841. .Q());
  36842. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .coord_x = 20;
  36843. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .coord_y = 9;
  36844. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .coord_z = 0;
  36845. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .mask = 16'h0022;
  36846. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .modeMux = 1'b1;
  36847. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .FeedbackMux = 1'b0;
  36848. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .ShiftMux = 1'b0;
  36849. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .BypassEn = 1'b0;
  36850. defparam \macro_inst|trig_ctrl_inst|LessThan6~1 .CarryEnb = 1'b0;
  36851. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~11 (
  36852. .A(\macro_inst|trig_ctrl_inst|Add3~10_combout ),
  36853. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [5]),
  36854. .C(vcc),
  36855. .D(vcc),
  36856. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~9_cout ),
  36857. .Qin(),
  36858. .Clk(),
  36859. .AsyncReset(),
  36860. .SyncReset(),
  36861. .ShiftData(),
  36862. .SyncLoad(),
  36863. .LutOut(),
  36864. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~11_cout ),
  36865. .Q());
  36866. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .coord_x = 20;
  36867. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .coord_y = 9;
  36868. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .coord_z = 5;
  36869. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .mask = 16'h004D;
  36870. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .modeMux = 1'b1;
  36871. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .FeedbackMux = 1'b0;
  36872. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .ShiftMux = 1'b0;
  36873. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .BypassEn = 1'b0;
  36874. defparam \macro_inst|trig_ctrl_inst|LessThan6~11 .CarryEnb = 1'b0;
  36875. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~13 (
  36876. .A(\macro_inst|trig_ctrl_inst|Add3~12_combout ),
  36877. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [6]),
  36878. .C(vcc),
  36879. .D(vcc),
  36880. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~11_cout ),
  36881. .Qin(),
  36882. .Clk(),
  36883. .AsyncReset(),
  36884. .SyncReset(),
  36885. .ShiftData(),
  36886. .SyncLoad(),
  36887. .LutOut(),
  36888. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~13_cout ),
  36889. .Q());
  36890. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .coord_x = 20;
  36891. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .coord_y = 9;
  36892. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .coord_z = 6;
  36893. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .mask = 16'h002B;
  36894. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .modeMux = 1'b1;
  36895. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .FeedbackMux = 1'b0;
  36896. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .ShiftMux = 1'b0;
  36897. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .BypassEn = 1'b0;
  36898. defparam \macro_inst|trig_ctrl_inst|LessThan6~13 .CarryEnb = 1'b0;
  36899. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~15 (
  36900. .A(\macro_inst|trig_ctrl_inst|Add3~14_combout ),
  36901. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [7]),
  36902. .C(vcc),
  36903. .D(vcc),
  36904. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~13_cout ),
  36905. .Qin(),
  36906. .Clk(),
  36907. .AsyncReset(),
  36908. .SyncReset(),
  36909. .ShiftData(),
  36910. .SyncLoad(),
  36911. .LutOut(),
  36912. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~15_cout ),
  36913. .Q());
  36914. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .coord_x = 20;
  36915. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .coord_y = 9;
  36916. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .coord_z = 7;
  36917. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .mask = 16'h004D;
  36918. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .modeMux = 1'b1;
  36919. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .FeedbackMux = 1'b0;
  36920. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .ShiftMux = 1'b0;
  36921. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .BypassEn = 1'b0;
  36922. defparam \macro_inst|trig_ctrl_inst|LessThan6~15 .CarryEnb = 1'b0;
  36923. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~17 (
  36924. .A(\macro_inst|trig_ctrl_inst|Add3~16_combout ),
  36925. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [8]),
  36926. .C(vcc),
  36927. .D(vcc),
  36928. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~15_cout ),
  36929. .Qin(),
  36930. .Clk(),
  36931. .AsyncReset(),
  36932. .SyncReset(),
  36933. .ShiftData(),
  36934. .SyncLoad(),
  36935. .LutOut(),
  36936. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~17_cout ),
  36937. .Q());
  36938. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .coord_x = 20;
  36939. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .coord_y = 9;
  36940. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .coord_z = 8;
  36941. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .mask = 16'h002B;
  36942. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .modeMux = 1'b1;
  36943. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .FeedbackMux = 1'b0;
  36944. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .ShiftMux = 1'b0;
  36945. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .BypassEn = 1'b0;
  36946. defparam \macro_inst|trig_ctrl_inst|LessThan6~17 .CarryEnb = 1'b0;
  36947. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~19 (
  36948. .A(\macro_inst|trig_ctrl_inst|pulse_cnt [9]),
  36949. .B(\macro_inst|trig_ctrl_inst|Add3~18_combout ),
  36950. .C(vcc),
  36951. .D(vcc),
  36952. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~17_cout ),
  36953. .Qin(),
  36954. .Clk(),
  36955. .AsyncReset(),
  36956. .SyncReset(),
  36957. .ShiftData(),
  36958. .SyncLoad(),
  36959. .LutOut(),
  36960. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~19_cout ),
  36961. .Q());
  36962. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .coord_x = 20;
  36963. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .coord_y = 9;
  36964. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .coord_z = 9;
  36965. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .mask = 16'h002B;
  36966. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .modeMux = 1'b1;
  36967. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .FeedbackMux = 1'b0;
  36968. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .ShiftMux = 1'b0;
  36969. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .BypassEn = 1'b0;
  36970. defparam \macro_inst|trig_ctrl_inst|LessThan6~19 .CarryEnb = 1'b0;
  36971. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~21 (
  36972. .A(\macro_inst|trig_ctrl_inst|Add3~20_combout ),
  36973. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [10]),
  36974. .C(vcc),
  36975. .D(vcc),
  36976. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~19_cout ),
  36977. .Qin(),
  36978. .Clk(),
  36979. .AsyncReset(),
  36980. .SyncReset(),
  36981. .ShiftData(),
  36982. .SyncLoad(),
  36983. .LutOut(),
  36984. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~21_cout ),
  36985. .Q());
  36986. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .coord_x = 20;
  36987. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .coord_y = 9;
  36988. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .coord_z = 10;
  36989. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .mask = 16'h002B;
  36990. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .modeMux = 1'b1;
  36991. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .FeedbackMux = 1'b0;
  36992. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .ShiftMux = 1'b0;
  36993. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .BypassEn = 1'b0;
  36994. defparam \macro_inst|trig_ctrl_inst|LessThan6~21 .CarryEnb = 1'b0;
  36995. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~23 (
  36996. .A(\macro_inst|trig_ctrl_inst|Add3~22_combout ),
  36997. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [11]),
  36998. .C(vcc),
  36999. .D(vcc),
  37000. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~21_cout ),
  37001. .Qin(),
  37002. .Clk(),
  37003. .AsyncReset(),
  37004. .SyncReset(),
  37005. .ShiftData(),
  37006. .SyncLoad(),
  37007. .LutOut(),
  37008. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~23_cout ),
  37009. .Q());
  37010. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .coord_x = 20;
  37011. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .coord_y = 9;
  37012. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .coord_z = 11;
  37013. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .mask = 16'h004D;
  37014. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .modeMux = 1'b1;
  37015. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .FeedbackMux = 1'b0;
  37016. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .ShiftMux = 1'b0;
  37017. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .BypassEn = 1'b0;
  37018. defparam \macro_inst|trig_ctrl_inst|LessThan6~23 .CarryEnb = 1'b0;
  37019. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~25 (
  37020. .A(\macro_inst|trig_ctrl_inst|Add3~24_combout ),
  37021. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [12]),
  37022. .C(vcc),
  37023. .D(vcc),
  37024. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~23_cout ),
  37025. .Qin(),
  37026. .Clk(),
  37027. .AsyncReset(),
  37028. .SyncReset(),
  37029. .ShiftData(),
  37030. .SyncLoad(),
  37031. .LutOut(),
  37032. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~25_cout ),
  37033. .Q());
  37034. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .coord_x = 20;
  37035. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .coord_y = 9;
  37036. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .coord_z = 12;
  37037. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .mask = 16'h002B;
  37038. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .modeMux = 1'b1;
  37039. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .FeedbackMux = 1'b0;
  37040. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .ShiftMux = 1'b0;
  37041. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .BypassEn = 1'b0;
  37042. defparam \macro_inst|trig_ctrl_inst|LessThan6~25 .CarryEnb = 1'b0;
  37043. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~27 (
  37044. .A(\macro_inst|trig_ctrl_inst|Add3~26_combout ),
  37045. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [13]),
  37046. .C(vcc),
  37047. .D(vcc),
  37048. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~25_cout ),
  37049. .Qin(),
  37050. .Clk(),
  37051. .AsyncReset(),
  37052. .SyncReset(),
  37053. .ShiftData(),
  37054. .SyncLoad(),
  37055. .LutOut(),
  37056. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~27_cout ),
  37057. .Q());
  37058. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .coord_x = 20;
  37059. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .coord_y = 9;
  37060. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .coord_z = 13;
  37061. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .mask = 16'h004D;
  37062. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .modeMux = 1'b1;
  37063. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .FeedbackMux = 1'b0;
  37064. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .ShiftMux = 1'b0;
  37065. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .BypassEn = 1'b0;
  37066. defparam \macro_inst|trig_ctrl_inst|LessThan6~27 .CarryEnb = 1'b0;
  37067. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~29 (
  37068. .A(\macro_inst|trig_ctrl_inst|Add3~28_combout ),
  37069. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [14]),
  37070. .C(vcc),
  37071. .D(vcc),
  37072. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~27_cout ),
  37073. .Qin(),
  37074. .Clk(),
  37075. .AsyncReset(),
  37076. .SyncReset(),
  37077. .ShiftData(),
  37078. .SyncLoad(),
  37079. .LutOut(),
  37080. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~29_cout ),
  37081. .Q());
  37082. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .coord_x = 20;
  37083. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .coord_y = 9;
  37084. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .coord_z = 14;
  37085. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .mask = 16'h002B;
  37086. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .modeMux = 1'b1;
  37087. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .FeedbackMux = 1'b0;
  37088. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .ShiftMux = 1'b0;
  37089. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .BypassEn = 1'b0;
  37090. defparam \macro_inst|trig_ctrl_inst|LessThan6~29 .CarryEnb = 1'b0;
  37091. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~3 (
  37092. .A(\macro_inst|trig_ctrl_inst|Add3~2_combout ),
  37093. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [1]),
  37094. .C(vcc),
  37095. .D(vcc),
  37096. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~1_cout ),
  37097. .Qin(),
  37098. .Clk(),
  37099. .AsyncReset(),
  37100. .SyncReset(),
  37101. .ShiftData(),
  37102. .SyncLoad(),
  37103. .LutOut(),
  37104. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~3_cout ),
  37105. .Q());
  37106. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .coord_x = 20;
  37107. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .coord_y = 9;
  37108. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .coord_z = 1;
  37109. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .mask = 16'h004D;
  37110. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .modeMux = 1'b1;
  37111. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .FeedbackMux = 1'b0;
  37112. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .ShiftMux = 1'b0;
  37113. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .BypassEn = 1'b0;
  37114. defparam \macro_inst|trig_ctrl_inst|LessThan6~3 .CarryEnb = 1'b0;
  37115. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~30 (
  37116. .A(vcc),
  37117. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [15]),
  37118. .C(vcc),
  37119. .D(\macro_inst|trig_ctrl_inst|Add3~30_combout ),
  37120. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~29_cout ),
  37121. .Qin(),
  37122. .Clk(),
  37123. .AsyncReset(),
  37124. .SyncReset(),
  37125. .ShiftData(),
  37126. .SyncLoad(),
  37127. .LutOut(\macro_inst|trig_ctrl_inst|LessThan6~30_combout ),
  37128. .Cout(),
  37129. .Q());
  37130. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .coord_x = 20;
  37131. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .coord_y = 9;
  37132. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .coord_z = 15;
  37133. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .mask = 16'hF330;
  37134. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .modeMux = 1'b1;
  37135. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .FeedbackMux = 1'b0;
  37136. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .ShiftMux = 1'b0;
  37137. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .BypassEn = 1'b0;
  37138. defparam \macro_inst|trig_ctrl_inst|LessThan6~30 .CarryEnb = 1'b1;
  37139. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~5 (
  37140. .A(\macro_inst|trig_ctrl_inst|Add3~4_combout ),
  37141. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [2]),
  37142. .C(vcc),
  37143. .D(vcc),
  37144. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~3_cout ),
  37145. .Qin(),
  37146. .Clk(),
  37147. .AsyncReset(),
  37148. .SyncReset(),
  37149. .ShiftData(),
  37150. .SyncLoad(),
  37151. .LutOut(),
  37152. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~5_cout ),
  37153. .Q());
  37154. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .coord_x = 20;
  37155. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .coord_y = 9;
  37156. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .coord_z = 2;
  37157. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .mask = 16'h002B;
  37158. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .modeMux = 1'b1;
  37159. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .FeedbackMux = 1'b0;
  37160. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .ShiftMux = 1'b0;
  37161. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .BypassEn = 1'b0;
  37162. defparam \macro_inst|trig_ctrl_inst|LessThan6~5 .CarryEnb = 1'b0;
  37163. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~7 (
  37164. .A(\macro_inst|trig_ctrl_inst|Add3~6_combout ),
  37165. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [3]),
  37166. .C(vcc),
  37167. .D(vcc),
  37168. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~5_cout ),
  37169. .Qin(),
  37170. .Clk(),
  37171. .AsyncReset(),
  37172. .SyncReset(),
  37173. .ShiftData(),
  37174. .SyncLoad(),
  37175. .LutOut(),
  37176. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~7_cout ),
  37177. .Q());
  37178. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .coord_x = 20;
  37179. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .coord_y = 9;
  37180. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .coord_z = 3;
  37181. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .mask = 16'h004D;
  37182. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .modeMux = 1'b1;
  37183. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .FeedbackMux = 1'b0;
  37184. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .ShiftMux = 1'b0;
  37185. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .BypassEn = 1'b0;
  37186. defparam \macro_inst|trig_ctrl_inst|LessThan6~7 .CarryEnb = 1'b0;
  37187. alta_slice \macro_inst|trig_ctrl_inst|LessThan6~9 (
  37188. .A(\macro_inst|trig_ctrl_inst|Add3~8_combout ),
  37189. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [4]),
  37190. .C(vcc),
  37191. .D(vcc),
  37192. .Cin(\macro_inst|trig_ctrl_inst|LessThan6~7_cout ),
  37193. .Qin(),
  37194. .Clk(),
  37195. .AsyncReset(),
  37196. .SyncReset(),
  37197. .ShiftData(),
  37198. .SyncLoad(),
  37199. .LutOut(),
  37200. .Cout(\macro_inst|trig_ctrl_inst|LessThan6~9_cout ),
  37201. .Q());
  37202. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .coord_x = 20;
  37203. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .coord_y = 9;
  37204. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .coord_z = 4;
  37205. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .mask = 16'h002B;
  37206. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .modeMux = 1'b1;
  37207. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .FeedbackMux = 1'b0;
  37208. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .ShiftMux = 1'b0;
  37209. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .BypassEn = 1'b0;
  37210. defparam \macro_inst|trig_ctrl_inst|LessThan6~9 .CarryEnb = 1'b0;
  37211. alta_slice \macro_inst|trig_ctrl_inst|LessThan7~0 (
  37212. .A(\macro_inst|trig_ctrl_inst|gap_cnt_auto [0]),
  37213. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [3]),
  37214. .C(\macro_inst|trig_ctrl_inst|gap_cnt_auto [2]),
  37215. .D(\macro_inst|trig_ctrl_inst|gap_cnt_auto [1]),
  37216. .Cin(),
  37217. .Qin(),
  37218. .Clk(),
  37219. .AsyncReset(),
  37220. .SyncReset(),
  37221. .ShiftData(),
  37222. .SyncLoad(),
  37223. .LutOut(\macro_inst|trig_ctrl_inst|LessThan7~0_combout ),
  37224. .Cout(),
  37225. .Q());
  37226. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .coord_x = 19;
  37227. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .coord_y = 6;
  37228. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .coord_z = 15;
  37229. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .mask = 16'h7FFF;
  37230. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .modeMux = 1'b0;
  37231. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .FeedbackMux = 1'b0;
  37232. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .ShiftMux = 1'b0;
  37233. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .BypassEn = 1'b0;
  37234. defparam \macro_inst|trig_ctrl_inst|LessThan7~0 .CarryEnb = 1'b1;
  37235. alta_slice \macro_inst|trig_ctrl_inst|LessThan7~1 (
  37236. .A(\macro_inst|trig_ctrl_inst|gap_cnt_auto [6]),
  37237. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [5]),
  37238. .C(\macro_inst|trig_ctrl_inst|gap_cnt_auto [4]),
  37239. .D(\macro_inst|trig_ctrl_inst|gap_cnt_auto [7]),
  37240. .Cin(),
  37241. .Qin(),
  37242. .Clk(),
  37243. .AsyncReset(),
  37244. .SyncReset(),
  37245. .ShiftData(),
  37246. .SyncLoad(),
  37247. .LutOut(\macro_inst|trig_ctrl_inst|LessThan7~1_combout ),
  37248. .Cout(),
  37249. .Q());
  37250. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .coord_x = 19;
  37251. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .coord_y = 6;
  37252. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .coord_z = 13;
  37253. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .mask = 16'h7FFF;
  37254. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .modeMux = 1'b0;
  37255. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .FeedbackMux = 1'b0;
  37256. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .ShiftMux = 1'b0;
  37257. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .BypassEn = 1'b0;
  37258. defparam \macro_inst|trig_ctrl_inst|LessThan7~1 .CarryEnb = 1'b1;
  37259. alta_slice \macro_inst|trig_ctrl_inst|LessThan7~2 (
  37260. .A(vcc),
  37261. .B(vcc),
  37262. .C(\macro_inst|trig_ctrl_inst|gap_cnt_auto [8]),
  37263. .D(\macro_inst|trig_ctrl_inst|gap_cnt_auto [9]),
  37264. .Cin(),
  37265. .Qin(),
  37266. .Clk(),
  37267. .AsyncReset(),
  37268. .SyncReset(),
  37269. .ShiftData(),
  37270. .SyncLoad(),
  37271. .LutOut(\macro_inst|trig_ctrl_inst|LessThan7~2_combout ),
  37272. .Cout(),
  37273. .Q());
  37274. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .coord_x = 20;
  37275. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .coord_y = 7;
  37276. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .coord_z = 6;
  37277. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .mask = 16'h0FFF;
  37278. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .modeMux = 1'b0;
  37279. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .FeedbackMux = 1'b0;
  37280. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .ShiftMux = 1'b0;
  37281. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .BypassEn = 1'b0;
  37282. defparam \macro_inst|trig_ctrl_inst|LessThan7~2 .CarryEnb = 1'b1;
  37283. alta_slice \macro_inst|trig_ctrl_inst|LessThan7~3 (
  37284. .A(\macro_inst|trig_ctrl_inst|LessThan7~1_combout ),
  37285. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [10]),
  37286. .C(\macro_inst|trig_ctrl_inst|LessThan7~2_combout ),
  37287. .D(\macro_inst|trig_ctrl_inst|LessThan7~0_combout ),
  37288. .Cin(),
  37289. .Qin(),
  37290. .Clk(),
  37291. .AsyncReset(),
  37292. .SyncReset(),
  37293. .ShiftData(),
  37294. .SyncLoad(),
  37295. .LutOut(\macro_inst|trig_ctrl_inst|LessThan7~3_combout ),
  37296. .Cout(),
  37297. .Q());
  37298. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .coord_x = 20;
  37299. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .coord_y = 7;
  37300. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .coord_z = 4;
  37301. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .mask = 16'h3332;
  37302. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .modeMux = 1'b0;
  37303. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .FeedbackMux = 1'b0;
  37304. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .ShiftMux = 1'b0;
  37305. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .BypassEn = 1'b0;
  37306. defparam \macro_inst|trig_ctrl_inst|LessThan7~3 .CarryEnb = 1'b1;
  37307. alta_slice \macro_inst|trig_ctrl_inst|Selector0~0 (
  37308. .A(\macro_inst|trig_ctrl_inst|trig_hit_reg~q ),
  37309. .B(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  37310. .C(\macro_inst|cfg_reg_inst|adc_en~q ),
  37311. .D(\macro_inst|cfg_reg_inst|adc_run~q ),
  37312. .Cin(),
  37313. .Qin(),
  37314. .Clk(),
  37315. .AsyncReset(),
  37316. .SyncReset(),
  37317. .ShiftData(),
  37318. .SyncLoad(),
  37319. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~0_combout ),
  37320. .Cout(),
  37321. .Q());
  37322. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .coord_x = 18;
  37323. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .coord_y = 6;
  37324. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .coord_z = 1;
  37325. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .mask = 16'hEFFF;
  37326. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .modeMux = 1'b0;
  37327. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .FeedbackMux = 1'b0;
  37328. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .ShiftMux = 1'b0;
  37329. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .BypassEn = 1'b0;
  37330. defparam \macro_inst|trig_ctrl_inst|Selector0~0 .CarryEnb = 1'b1;
  37331. alta_slice \macro_inst|trig_ctrl_inst|Selector0~1 (
  37332. .A(\macro_inst|trig_ctrl_inst|sample_valid~combout ),
  37333. .B(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  37334. .C(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  37335. .D(\macro_inst|trig_ctrl_inst|always5~2_combout ),
  37336. .Cin(),
  37337. .Qin(),
  37338. .Clk(),
  37339. .AsyncReset(),
  37340. .SyncReset(),
  37341. .ShiftData(),
  37342. .SyncLoad(),
  37343. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~1_combout ),
  37344. .Cout(),
  37345. .Q());
  37346. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .coord_x = 18;
  37347. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .coord_y = 6;
  37348. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .coord_z = 4;
  37349. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .mask = 16'h8C0C;
  37350. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .modeMux = 1'b0;
  37351. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .FeedbackMux = 1'b0;
  37352. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .ShiftMux = 1'b0;
  37353. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .BypassEn = 1'b0;
  37354. defparam \macro_inst|trig_ctrl_inst|Selector0~1 .CarryEnb = 1'b1;
  37355. alta_slice \macro_inst|trig_ctrl_inst|Selector0~2 (
  37356. .A(\macro_inst|trig_ctrl_inst|post_trig_cnt [3]),
  37357. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [0]),
  37358. .C(\macro_inst|trig_ctrl_inst|post_trig_cnt [1]),
  37359. .D(\macro_inst|trig_ctrl_inst|post_trig_cnt [2]),
  37360. .Cin(),
  37361. .Qin(),
  37362. .Clk(),
  37363. .AsyncReset(),
  37364. .SyncReset(),
  37365. .ShiftData(),
  37366. .SyncLoad(),
  37367. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~2_combout ),
  37368. .Cout(),
  37369. .Q());
  37370. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .coord_x = 17;
  37371. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .coord_y = 4;
  37372. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .coord_z = 15;
  37373. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .mask = 16'h8000;
  37374. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .modeMux = 1'b0;
  37375. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .FeedbackMux = 1'b0;
  37376. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .ShiftMux = 1'b0;
  37377. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .BypassEn = 1'b0;
  37378. defparam \macro_inst|trig_ctrl_inst|Selector0~2 .CarryEnb = 1'b1;
  37379. alta_slice \macro_inst|trig_ctrl_inst|Selector0~3 (
  37380. .A(\macro_inst|trig_ctrl_inst|post_trig_cnt [7]),
  37381. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [4]),
  37382. .C(\macro_inst|trig_ctrl_inst|post_trig_cnt [5]),
  37383. .D(\macro_inst|trig_ctrl_inst|post_trig_cnt [6]),
  37384. .Cin(),
  37385. .Qin(),
  37386. .Clk(),
  37387. .AsyncReset(),
  37388. .SyncReset(),
  37389. .ShiftData(),
  37390. .SyncLoad(),
  37391. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~3_combout ),
  37392. .Cout(),
  37393. .Q());
  37394. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .coord_x = 17;
  37395. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .coord_y = 4;
  37396. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .coord_z = 12;
  37397. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .mask = 16'h8000;
  37398. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .modeMux = 1'b0;
  37399. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .FeedbackMux = 1'b0;
  37400. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .ShiftMux = 1'b0;
  37401. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .BypassEn = 1'b0;
  37402. defparam \macro_inst|trig_ctrl_inst|Selector0~3 .CarryEnb = 1'b1;
  37403. alta_slice \macro_inst|trig_ctrl_inst|Selector0~4 (
  37404. .A(vcc),
  37405. .B(vcc),
  37406. .C(\macro_inst|trig_ctrl_inst|Selector0~3_combout ),
  37407. .D(\macro_inst|trig_ctrl_inst|post_trig_cnt [8]),
  37408. .Cin(),
  37409. .Qin(),
  37410. .Clk(),
  37411. .AsyncReset(),
  37412. .SyncReset(),
  37413. .ShiftData(),
  37414. .SyncLoad(),
  37415. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~4_combout ),
  37416. .Cout(),
  37417. .Q());
  37418. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .coord_x = 17;
  37419. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .coord_y = 4;
  37420. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .coord_z = 2;
  37421. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .mask = 16'hF000;
  37422. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .modeMux = 1'b0;
  37423. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .FeedbackMux = 1'b0;
  37424. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .ShiftMux = 1'b0;
  37425. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .BypassEn = 1'b0;
  37426. defparam \macro_inst|trig_ctrl_inst|Selector0~4 .CarryEnb = 1'b1;
  37427. alta_slice \macro_inst|trig_ctrl_inst|Selector0~5 (
  37428. .A(\macro_inst|cfg_reg_inst|adc_en~q ),
  37429. .B(\macro_inst|trig_ctrl_inst|Selector0~2_combout ),
  37430. .C(\macro_inst|trig_ctrl_inst|Selector0~4_combout ),
  37431. .D(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  37432. .Cin(),
  37433. .Qin(),
  37434. .Clk(),
  37435. .AsyncReset(),
  37436. .SyncReset(),
  37437. .ShiftData(),
  37438. .SyncLoad(),
  37439. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~5_combout ),
  37440. .Cout(),
  37441. .Q());
  37442. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .coord_x = 17;
  37443. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .coord_y = 6;
  37444. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .coord_z = 0;
  37445. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .mask = 16'hD500;
  37446. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .modeMux = 1'b0;
  37447. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .FeedbackMux = 1'b0;
  37448. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .ShiftMux = 1'b0;
  37449. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .BypassEn = 1'b0;
  37450. defparam \macro_inst|trig_ctrl_inst|Selector0~5 .CarryEnb = 1'b1;
  37451. alta_slice \macro_inst|trig_ctrl_inst|Selector0~6 (
  37452. .A(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ),
  37453. .B(vcc),
  37454. .C(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  37455. .D(\macro_inst|trig_ctrl_inst|Selector1~0_combout ),
  37456. .Cin(),
  37457. .Qin(),
  37458. .Clk(),
  37459. .AsyncReset(),
  37460. .SyncReset(),
  37461. .ShiftData(),
  37462. .SyncLoad(),
  37463. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  37464. .Cout(),
  37465. .Q());
  37466. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .coord_x = 17;
  37467. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .coord_y = 6;
  37468. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .coord_z = 1;
  37469. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .mask = 16'h50FF;
  37470. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .modeMux = 1'b0;
  37471. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .FeedbackMux = 1'b0;
  37472. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .ShiftMux = 1'b0;
  37473. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .BypassEn = 1'b0;
  37474. defparam \macro_inst|trig_ctrl_inst|Selector0~6 .CarryEnb = 1'b1;
  37475. alta_slice \macro_inst|trig_ctrl_inst|Selector0~7 (
  37476. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  37477. .B(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  37478. .C(\macro_inst|cfg_reg_inst|adc_en~q ),
  37479. .D(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  37480. .Cin(),
  37481. .Qin(),
  37482. .Clk(),
  37483. .AsyncReset(),
  37484. .SyncReset(),
  37485. .ShiftData(),
  37486. .SyncLoad(),
  37487. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  37488. .Cout(),
  37489. .Q());
  37490. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .coord_x = 17;
  37491. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .coord_y = 6;
  37492. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .coord_z = 15;
  37493. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .mask = 16'h2F00;
  37494. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .modeMux = 1'b0;
  37495. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .FeedbackMux = 1'b0;
  37496. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .ShiftMux = 1'b0;
  37497. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .BypassEn = 1'b0;
  37498. defparam \macro_inst|trig_ctrl_inst|Selector0~7 .CarryEnb = 1'b1;
  37499. alta_slice \macro_inst|trig_ctrl_inst|Selector0~8 (
  37500. .A(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  37501. .B(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  37502. .C(\macro_inst|trig_ctrl_inst|Selector0~5_combout ),
  37503. .D(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  37504. .Cin(),
  37505. .Qin(),
  37506. .Clk(),
  37507. .AsyncReset(),
  37508. .SyncReset(),
  37509. .ShiftData(),
  37510. .SyncLoad(),
  37511. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~8_combout ),
  37512. .Cout(),
  37513. .Q());
  37514. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .coord_x = 17;
  37515. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .coord_y = 6;
  37516. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .coord_z = 11;
  37517. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .mask = 16'h000E;
  37518. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .modeMux = 1'b0;
  37519. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .FeedbackMux = 1'b0;
  37520. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .ShiftMux = 1'b0;
  37521. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .BypassEn = 1'b0;
  37522. defparam \macro_inst|trig_ctrl_inst|Selector0~8 .CarryEnb = 1'b1;
  37523. alta_slice \macro_inst|trig_ctrl_inst|Selector1~0 (
  37524. .A(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  37525. .B(\macro_inst|trig_ctrl_inst|Selector0~0_combout ),
  37526. .C(\macro_inst|trig_ctrl_inst|Selector0~1_combout ),
  37527. .D(\macro_inst|trig_ctrl_inst|Selector0~5_combout ),
  37528. .Cin(),
  37529. .Qin(),
  37530. .Clk(),
  37531. .AsyncReset(),
  37532. .SyncReset(),
  37533. .ShiftData(),
  37534. .SyncLoad(),
  37535. .LutOut(\macro_inst|trig_ctrl_inst|Selector1~0_combout ),
  37536. .Cout(),
  37537. .Q());
  37538. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .coord_x = 18;
  37539. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .coord_y = 6;
  37540. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .coord_z = 0;
  37541. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .mask = 16'h0007;
  37542. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .modeMux = 1'b0;
  37543. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .FeedbackMux = 1'b0;
  37544. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .ShiftMux = 1'b0;
  37545. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .BypassEn = 1'b0;
  37546. defparam \macro_inst|trig_ctrl_inst|Selector1~0 .CarryEnb = 1'b1;
  37547. alta_slice \macro_inst|trig_ctrl_inst|Selector2~1 (
  37548. .A(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  37549. .B(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  37550. .C(\macro_inst|trig_ctrl_inst|sample_valid~combout ),
  37551. .D(\macro_inst|trig_ctrl_inst|always5~2_combout ),
  37552. .Cin(),
  37553. .Qin(),
  37554. .Clk(),
  37555. .AsyncReset(),
  37556. .SyncReset(),
  37557. .ShiftData(),
  37558. .SyncLoad(),
  37559. .LutOut(\macro_inst|trig_ctrl_inst|Selector2~1_combout ),
  37560. .Cout(),
  37561. .Q());
  37562. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .coord_x = 18;
  37563. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .coord_y = 6;
  37564. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .coord_z = 10;
  37565. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .mask = 16'h8000;
  37566. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .modeMux = 1'b0;
  37567. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .FeedbackMux = 1'b0;
  37568. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .ShiftMux = 1'b0;
  37569. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .BypassEn = 1'b0;
  37570. defparam \macro_inst|trig_ctrl_inst|Selector2~1 .CarryEnb = 1'b1;
  37571. alta_slice \macro_inst|trig_ctrl_inst|Selector3~0 (
  37572. .A(vcc),
  37573. .B(\macro_inst|trig_ctrl_inst|Selector0~0_combout ),
  37574. .C(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  37575. .D(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  37576. .Cin(),
  37577. .Qin(),
  37578. .Clk(),
  37579. .AsyncReset(),
  37580. .SyncReset(),
  37581. .ShiftData(),
  37582. .SyncLoad(),
  37583. .LutOut(\macro_inst|trig_ctrl_inst|Selector3~0_combout ),
  37584. .Cout(),
  37585. .Q());
  37586. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .coord_x = 19;
  37587. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .coord_y = 8;
  37588. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .coord_z = 10;
  37589. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .mask = 16'hC000;
  37590. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .modeMux = 1'b0;
  37591. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .FeedbackMux = 1'b0;
  37592. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .ShiftMux = 1'b0;
  37593. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .BypassEn = 1'b0;
  37594. defparam \macro_inst|trig_ctrl_inst|Selector3~0 .CarryEnb = 1'b1;
  37595. alta_slice \macro_inst|trig_ctrl_inst|Selector4~0 (
  37596. .A(\macro_inst|cfg_reg_inst|adc_en~q ),
  37597. .B(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  37598. .C(\macro_inst|trig_ctrl_inst|Selector0~4_combout ),
  37599. .D(\macro_inst|trig_ctrl_inst|Selector0~2_combout ),
  37600. .Cin(),
  37601. .Qin(),
  37602. .Clk(),
  37603. .AsyncReset(),
  37604. .SyncReset(),
  37605. .ShiftData(),
  37606. .SyncLoad(),
  37607. .LutOut(\macro_inst|trig_ctrl_inst|Selector4~0_combout ),
  37608. .Cout(),
  37609. .Q());
  37610. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .coord_x = 17;
  37611. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .coord_y = 6;
  37612. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .coord_z = 10;
  37613. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .mask = 16'h8000;
  37614. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .modeMux = 1'b0;
  37615. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .FeedbackMux = 1'b0;
  37616. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .ShiftMux = 1'b0;
  37617. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .BypassEn = 1'b0;
  37618. defparam \macro_inst|trig_ctrl_inst|Selector4~0 .CarryEnb = 1'b1;
  37619. alta_slice \macro_inst|trig_ctrl_inst|WideOr0~0 (
  37620. .A(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37621. .B(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37622. .C(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37623. .D(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37624. .Cin(),
  37625. .Qin(),
  37626. .Clk(),
  37627. .AsyncReset(),
  37628. .SyncReset(),
  37629. .ShiftData(),
  37630. .SyncLoad(),
  37631. .LutOut(\macro_inst|trig_ctrl_inst|WideOr0~0_combout ),
  37632. .Cout(),
  37633. .Q());
  37634. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .coord_x = 17;
  37635. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .coord_y = 4;
  37636. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .coord_z = 13;
  37637. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .mask = 16'hD200;
  37638. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .modeMux = 1'b0;
  37639. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .FeedbackMux = 1'b0;
  37640. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .ShiftMux = 1'b0;
  37641. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .BypassEn = 1'b0;
  37642. defparam \macro_inst|trig_ctrl_inst|WideOr0~0 .CarryEnb = 1'b1;
  37643. alta_slice \macro_inst|trig_ctrl_inst|WideOr1~0 (
  37644. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37645. .B(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37646. .C(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37647. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37648. .Cin(),
  37649. .Qin(),
  37650. .Clk(),
  37651. .AsyncReset(),
  37652. .SyncReset(),
  37653. .ShiftData(),
  37654. .SyncLoad(),
  37655. .LutOut(\macro_inst|trig_ctrl_inst|WideOr1~0_combout ),
  37656. .Cout(),
  37657. .Q());
  37658. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .coord_x = 17;
  37659. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .coord_y = 7;
  37660. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .coord_z = 12;
  37661. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .mask = 16'hD0A0;
  37662. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .modeMux = 1'b0;
  37663. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .FeedbackMux = 1'b0;
  37664. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .ShiftMux = 1'b0;
  37665. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .BypassEn = 1'b0;
  37666. defparam \macro_inst|trig_ctrl_inst|WideOr1~0 .CarryEnb = 1'b1;
  37667. alta_slice \macro_inst|trig_ctrl_inst|WideOr2~0 (
  37668. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37669. .B(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37670. .C(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37671. .D(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37672. .Cin(),
  37673. .Qin(),
  37674. .Clk(),
  37675. .AsyncReset(),
  37676. .SyncReset(),
  37677. .ShiftData(),
  37678. .SyncLoad(),
  37679. .LutOut(\macro_inst|trig_ctrl_inst|WideOr2~0_combout ),
  37680. .Cout(),
  37681. .Q());
  37682. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .coord_x = 17;
  37683. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .coord_y = 7;
  37684. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .coord_z = 9;
  37685. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .mask = 16'h30D0;
  37686. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .modeMux = 1'b0;
  37687. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .FeedbackMux = 1'b0;
  37688. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .ShiftMux = 1'b0;
  37689. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .BypassEn = 1'b0;
  37690. defparam \macro_inst|trig_ctrl_inst|WideOr2~0 .CarryEnb = 1'b1;
  37691. alta_slice \macro_inst|trig_ctrl_inst|WideOr3~0 (
  37692. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37693. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37694. .C(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37695. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37696. .Cin(),
  37697. .Qin(),
  37698. .Clk(),
  37699. .AsyncReset(),
  37700. .SyncReset(),
  37701. .ShiftData(),
  37702. .SyncLoad(),
  37703. .LutOut(\macro_inst|trig_ctrl_inst|WideOr3~0_combout ),
  37704. .Cout(),
  37705. .Q());
  37706. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .coord_x = 18;
  37707. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .coord_y = 5;
  37708. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .coord_z = 7;
  37709. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .mask = 16'h0C8C;
  37710. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .modeMux = 1'b0;
  37711. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .FeedbackMux = 1'b0;
  37712. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .ShiftMux = 1'b0;
  37713. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .BypassEn = 1'b0;
  37714. defparam \macro_inst|trig_ctrl_inst|WideOr3~0 .CarryEnb = 1'b1;
  37715. alta_slice \macro_inst|trig_ctrl_inst|WideOr4~0 (
  37716. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37717. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37718. .C(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37719. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37720. .Cin(),
  37721. .Qin(),
  37722. .Clk(),
  37723. .AsyncReset(),
  37724. .SyncReset(),
  37725. .ShiftData(),
  37726. .SyncLoad(),
  37727. .LutOut(\macro_inst|trig_ctrl_inst|WideOr4~0_combout ),
  37728. .Cout(),
  37729. .Q());
  37730. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .coord_x = 18;
  37731. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .coord_y = 5;
  37732. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .coord_z = 1;
  37733. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .mask = 16'h1C08;
  37734. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .modeMux = 1'b0;
  37735. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .FeedbackMux = 1'b0;
  37736. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .ShiftMux = 1'b0;
  37737. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .BypassEn = 1'b0;
  37738. defparam \macro_inst|trig_ctrl_inst|WideOr4~0 .CarryEnb = 1'b1;
  37739. alta_slice \macro_inst|trig_ctrl_inst|WideOr5~0 (
  37740. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37741. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37742. .C(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37743. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37744. .Cin(),
  37745. .Qin(),
  37746. .Clk(),
  37747. .AsyncReset(),
  37748. .SyncReset(),
  37749. .ShiftData(),
  37750. .SyncLoad(),
  37751. .LutOut(\macro_inst|trig_ctrl_inst|WideOr5~0_combout ),
  37752. .Cout(),
  37753. .Q());
  37754. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .coord_x = 18;
  37755. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .coord_y = 5;
  37756. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .coord_z = 6;
  37757. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .mask = 16'hE280;
  37758. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .modeMux = 1'b0;
  37759. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .FeedbackMux = 1'b0;
  37760. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .ShiftMux = 1'b0;
  37761. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .BypassEn = 1'b0;
  37762. defparam \macro_inst|trig_ctrl_inst|WideOr5~0 .CarryEnb = 1'b1;
  37763. alta_slice \macro_inst|trig_ctrl_inst|WideOr6~0 (
  37764. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37765. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37766. .C(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37767. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37768. .Cin(),
  37769. .Qin(),
  37770. .Clk(),
  37771. .AsyncReset(),
  37772. .SyncReset(),
  37773. .ShiftData(),
  37774. .SyncLoad(),
  37775. .LutOut(\macro_inst|trig_ctrl_inst|WideOr6~0_combout ),
  37776. .Cout(),
  37777. .Q());
  37778. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .coord_x = 18;
  37779. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .coord_y = 5;
  37780. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .coord_z = 2;
  37781. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .mask = 16'h040E;
  37782. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .modeMux = 1'b0;
  37783. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .FeedbackMux = 1'b0;
  37784. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .ShiftMux = 1'b0;
  37785. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .BypassEn = 1'b0;
  37786. defparam \macro_inst|trig_ctrl_inst|WideOr6~0 .CarryEnb = 1'b1;
  37787. alta_slice \macro_inst|trig_ctrl_inst|WideOr7~0 (
  37788. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37789. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37790. .C(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37791. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37792. .Cin(),
  37793. .Qin(),
  37794. .Clk(),
  37795. .AsyncReset(),
  37796. .SyncReset(),
  37797. .ShiftData(),
  37798. .SyncLoad(),
  37799. .LutOut(\macro_inst|trig_ctrl_inst|WideOr7~0_combout ),
  37800. .Cout(),
  37801. .Q());
  37802. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .coord_x = 18;
  37803. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .coord_y = 5;
  37804. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .coord_z = 11;
  37805. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .mask = 16'h1110;
  37806. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .modeMux = 1'b0;
  37807. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .FeedbackMux = 1'b0;
  37808. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .ShiftMux = 1'b0;
  37809. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .BypassEn = 1'b0;
  37810. defparam \macro_inst|trig_ctrl_inst|WideOr7~0 .CarryEnb = 1'b1;
  37811. alta_slice \macro_inst|trig_ctrl_inst|WideOr8~0 (
  37812. .A(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  37813. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  37814. .C(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  37815. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  37816. .Cin(),
  37817. .Qin(),
  37818. .Clk(),
  37819. .AsyncReset(),
  37820. .SyncReset(),
  37821. .ShiftData(),
  37822. .SyncLoad(),
  37823. .LutOut(\macro_inst|trig_ctrl_inst|WideOr8~0_combout ),
  37824. .Cout(),
  37825. .Q());
  37826. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .coord_x = 18;
  37827. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .coord_y = 5;
  37828. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .coord_z = 4;
  37829. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .mask = 16'hF7EE;
  37830. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .modeMux = 1'b0;
  37831. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .FeedbackMux = 1'b0;
  37832. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .ShiftMux = 1'b0;
  37833. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .BypassEn = 1'b0;
  37834. defparam \macro_inst|trig_ctrl_inst|WideOr8~0 .CarryEnb = 1'b1;
  37835. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[0] (
  37836. .A(vcc),
  37837. .B(\macro_inst|cfg_reg_inst|trig_threshold [11]),
  37838. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~12_combout ),
  37839. .D(\macro_inst|trig_ctrl_inst|adc_data_prev [11]),
  37840. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~21_cout ),
  37841. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [0]),
  37842. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  37843. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  37844. .SyncReset(SyncReset_X58_Y4_GND),
  37845. .ShiftData(),
  37846. .SyncLoad(SyncLoad_X58_Y4_VCC),
  37847. .LutOut(\macro_inst|trig_ctrl_inst|LessThan4~22_combout ),
  37848. .Cout(),
  37849. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [0]));
  37850. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .coord_x = 19;
  37851. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .coord_y = 4;
  37852. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .coord_z = 12;
  37853. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .mask = 16'hFCC0;
  37854. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .modeMux = 1'b1;
  37855. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .FeedbackMux = 1'b0;
  37856. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .ShiftMux = 1'b0;
  37857. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .BypassEn = 1'b1;
  37858. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[0] .CarryEnb = 1'b1;
  37859. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[10] (
  37860. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  37861. .B(\macro_inst|apb_adc0_inst|apb_db [6]),
  37862. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~2_combout ),
  37863. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  37864. .Cin(),
  37865. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [10]),
  37866. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X59_Y4_SIG_SIG ),
  37867. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
  37868. .SyncReset(SyncReset_X59_Y4_GND),
  37869. .ShiftData(),
  37870. .SyncLoad(SyncLoad_X59_Y4_VCC),
  37871. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~6_combout ),
  37872. .Cout(),
  37873. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [10]));
  37874. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .coord_x = 20;
  37875. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .coord_y = 4;
  37876. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .coord_z = 15;
  37877. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .mask = 16'hCC44;
  37878. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .modeMux = 1'b0;
  37879. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .FeedbackMux = 1'b0;
  37880. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .ShiftMux = 1'b0;
  37881. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .BypassEn = 1'b1;
  37882. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10] .CarryEnb = 1'b1;
  37883. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 (
  37884. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  37885. .B(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  37886. .C(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ),
  37887. .D(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  37888. .Cin(),
  37889. .Qin(),
  37890. .Clk(),
  37891. .AsyncReset(),
  37892. .SyncReset(),
  37893. .ShiftData(),
  37894. .SyncLoad(),
  37895. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout ),
  37896. .Cout(),
  37897. .Q());
  37898. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .coord_x = 17;
  37899. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .coord_y = 6;
  37900. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .coord_z = 4;
  37901. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .mask = 16'hFF20;
  37902. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .modeMux = 1'b0;
  37903. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .FeedbackMux = 1'b0;
  37904. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .ShiftMux = 1'b0;
  37905. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .BypassEn = 1'b0;
  37906. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[10]~1 .CarryEnb = 1'b1;
  37907. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[11] (
  37908. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  37909. .B(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  37910. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~0_combout ),
  37911. .D(\macro_inst|apb_adc0_inst|apb_db [1]),
  37912. .Cin(),
  37913. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [11]),
  37914. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X59_Y4_SIG_SIG ),
  37915. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
  37916. .SyncReset(SyncReset_X59_Y4_GND),
  37917. .ShiftData(),
  37918. .SyncLoad(SyncLoad_X59_Y4_VCC),
  37919. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~11_combout ),
  37920. .Cout(),
  37921. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [11]));
  37922. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .coord_x = 20;
  37923. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .coord_y = 4;
  37924. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .coord_z = 1;
  37925. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .mask = 16'hDD00;
  37926. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .modeMux = 1'b0;
  37927. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .FeedbackMux = 1'b0;
  37928. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .ShiftMux = 1'b0;
  37929. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .BypassEn = 1'b1;
  37930. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[11] .CarryEnb = 1'b1;
  37931. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[1] (
  37932. .A(\macro_inst|cfg_reg_inst|trig_threshold [5]),
  37933. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [5]),
  37934. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~11_combout ),
  37935. .D(vcc),
  37936. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~9_cout ),
  37937. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [1]),
  37938. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  37939. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  37940. .SyncReset(SyncReset_X58_Y4_GND),
  37941. .ShiftData(),
  37942. .SyncLoad(SyncLoad_X58_Y4_VCC),
  37943. .LutOut(),
  37944. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~11_cout ),
  37945. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [1]));
  37946. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .coord_x = 19;
  37947. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .coord_y = 4;
  37948. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .coord_z = 6;
  37949. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .mask = 16'h002B;
  37950. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .modeMux = 1'b1;
  37951. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .FeedbackMux = 1'b0;
  37952. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .ShiftMux = 1'b0;
  37953. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .BypassEn = 1'b1;
  37954. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[1] .CarryEnb = 1'b0;
  37955. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[2] (
  37956. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [6]),
  37957. .B(\macro_inst|cfg_reg_inst|trig_threshold [6]),
  37958. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~10_combout ),
  37959. .D(vcc),
  37960. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~11_cout ),
  37961. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [2]),
  37962. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  37963. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  37964. .SyncReset(SyncReset_X58_Y4_GND),
  37965. .ShiftData(),
  37966. .SyncLoad(SyncLoad_X58_Y4_VCC),
  37967. .LutOut(),
  37968. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~13_cout ),
  37969. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [2]));
  37970. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .coord_x = 19;
  37971. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .coord_y = 4;
  37972. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .coord_z = 7;
  37973. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .mask = 16'h002B;
  37974. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .modeMux = 1'b1;
  37975. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .FeedbackMux = 1'b0;
  37976. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .ShiftMux = 1'b0;
  37977. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .BypassEn = 1'b1;
  37978. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[2] .CarryEnb = 1'b0;
  37979. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[3] (
  37980. .A(\macro_inst|cfg_reg_inst|trig_threshold [9]),
  37981. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [9]),
  37982. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~9_combout ),
  37983. .D(vcc),
  37984. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~17_cout ),
  37985. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [3]),
  37986. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  37987. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  37988. .SyncReset(SyncReset_X58_Y4_GND),
  37989. .ShiftData(),
  37990. .SyncLoad(SyncLoad_X58_Y4_VCC),
  37991. .LutOut(),
  37992. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~19_cout ),
  37993. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [3]));
  37994. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .coord_x = 19;
  37995. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .coord_y = 4;
  37996. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .coord_z = 10;
  37997. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .mask = 16'h002B;
  37998. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .modeMux = 1'b1;
  37999. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .FeedbackMux = 1'b0;
  38000. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .ShiftMux = 1'b0;
  38001. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .BypassEn = 1'b1;
  38002. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[3] .CarryEnb = 1'b0;
  38003. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[4] (
  38004. .A(\macro_inst|cfg_reg_inst|trig_threshold [4]),
  38005. .B(\macro_inst|trig_ctrl_inst|adc_data_prev [4]),
  38006. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~8_combout ),
  38007. .D(vcc),
  38008. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~7_cout ),
  38009. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [4]),
  38010. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38011. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38012. .SyncReset(SyncReset_X58_Y4_GND),
  38013. .ShiftData(),
  38014. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38015. .LutOut(),
  38016. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~9_cout ),
  38017. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [4]));
  38018. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .coord_x = 19;
  38019. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .coord_y = 4;
  38020. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .coord_z = 5;
  38021. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .mask = 16'h004D;
  38022. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .modeMux = 1'b1;
  38023. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .FeedbackMux = 1'b0;
  38024. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .ShiftMux = 1'b0;
  38025. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .BypassEn = 1'b1;
  38026. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[4] .CarryEnb = 1'b0;
  38027. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[5] (
  38028. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [2]),
  38029. .B(\macro_inst|cfg_reg_inst|trig_threshold [2]),
  38030. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~7_combout ),
  38031. .D(vcc),
  38032. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~3_cout ),
  38033. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [5]),
  38034. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38035. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38036. .SyncReset(SyncReset_X58_Y4_GND),
  38037. .ShiftData(),
  38038. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38039. .LutOut(),
  38040. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~5_cout ),
  38041. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [5]));
  38042. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .coord_x = 19;
  38043. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .coord_y = 4;
  38044. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .coord_z = 3;
  38045. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .mask = 16'h002B;
  38046. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .modeMux = 1'b1;
  38047. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .FeedbackMux = 1'b0;
  38048. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .ShiftMux = 1'b0;
  38049. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .BypassEn = 1'b1;
  38050. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[5] .CarryEnb = 1'b0;
  38051. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[6] (
  38052. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [7]),
  38053. .B(\macro_inst|cfg_reg_inst|trig_threshold [7]),
  38054. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~6_combout ),
  38055. .D(vcc),
  38056. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~13_cout ),
  38057. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [6]),
  38058. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38059. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38060. .SyncReset(SyncReset_X58_Y4_GND),
  38061. .ShiftData(),
  38062. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38063. .LutOut(),
  38064. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~15_cout ),
  38065. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [6]));
  38066. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .coord_x = 19;
  38067. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .coord_y = 4;
  38068. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .coord_z = 8;
  38069. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .mask = 16'h004D;
  38070. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .modeMux = 1'b1;
  38071. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .FeedbackMux = 1'b0;
  38072. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .ShiftMux = 1'b0;
  38073. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .BypassEn = 1'b1;
  38074. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[6] .CarryEnb = 1'b0;
  38075. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[7] (
  38076. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [1]),
  38077. .B(\macro_inst|cfg_reg_inst|trig_threshold [1]),
  38078. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~5_combout ),
  38079. .D(vcc),
  38080. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~1_cout ),
  38081. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [7]),
  38082. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38083. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38084. .SyncReset(SyncReset_X58_Y4_GND),
  38085. .ShiftData(),
  38086. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38087. .LutOut(),
  38088. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~3_cout ),
  38089. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [7]));
  38090. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .coord_x = 19;
  38091. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .coord_y = 4;
  38092. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .coord_z = 2;
  38093. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .mask = 16'h004D;
  38094. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .modeMux = 1'b1;
  38095. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .FeedbackMux = 1'b0;
  38096. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .ShiftMux = 1'b0;
  38097. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .BypassEn = 1'b1;
  38098. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[7] .CarryEnb = 1'b0;
  38099. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[8] (
  38100. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [3]),
  38101. .B(\macro_inst|cfg_reg_inst|trig_threshold [3]),
  38102. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~4_combout ),
  38103. .D(vcc),
  38104. .Cin(\macro_inst|trig_ctrl_inst|LessThan4~5_cout ),
  38105. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [8]),
  38106. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38107. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38108. .SyncReset(SyncReset_X58_Y4_GND),
  38109. .ShiftData(),
  38110. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38111. .LutOut(),
  38112. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~7_cout ),
  38113. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [8]));
  38114. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .coord_x = 19;
  38115. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .coord_y = 4;
  38116. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .coord_z = 4;
  38117. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .mask = 16'h004D;
  38118. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .modeMux = 1'b1;
  38119. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .FeedbackMux = 1'b0;
  38120. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .ShiftMux = 1'b0;
  38121. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .BypassEn = 1'b1;
  38122. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[8] .CarryEnb = 1'b0;
  38123. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev[9] (
  38124. .A(\macro_inst|trig_ctrl_inst|adc_data_prev [0]),
  38125. .B(\macro_inst|cfg_reg_inst|trig_threshold [0]),
  38126. .C(\macro_inst|trig_ctrl_inst|adc_data_prev~3_combout ),
  38127. .D(vcc),
  38128. .Cin(),
  38129. .Qin(\macro_inst|trig_ctrl_inst|adc_data_prev [9]),
  38130. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|adc_data_prev[10]~1_combout_X58_Y4_SIG_SIG ),
  38131. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  38132. .SyncReset(SyncReset_X58_Y4_GND),
  38133. .ShiftData(),
  38134. .SyncLoad(SyncLoad_X58_Y4_VCC),
  38135. .LutOut(),
  38136. .Cout(\macro_inst|trig_ctrl_inst|LessThan4~1_cout ),
  38137. .Q(\macro_inst|trig_ctrl_inst|adc_data_prev [9]));
  38138. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .coord_x = 19;
  38139. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .coord_y = 4;
  38140. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .coord_z = 1;
  38141. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .mask = 16'h0022;
  38142. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .modeMux = 1'b1;
  38143. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .FeedbackMux = 1'b0;
  38144. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .ShiftMux = 1'b0;
  38145. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .BypassEn = 1'b1;
  38146. defparam \macro_inst|trig_ctrl_inst|adc_data_prev[9] .CarryEnb = 1'b0;
  38147. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~0 (
  38148. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38149. .B(vcc),
  38150. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38151. .D(\macro_inst|apb_adc0_inst|apb_db [11]),
  38152. .Cin(),
  38153. .Qin(),
  38154. .Clk(),
  38155. .AsyncReset(),
  38156. .SyncReset(),
  38157. .ShiftData(),
  38158. .SyncLoad(),
  38159. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~0_combout ),
  38160. .Cout(),
  38161. .Q());
  38162. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .coord_x = 18;
  38163. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .coord_y = 4;
  38164. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .coord_z = 13;
  38165. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .mask = 16'hF500;
  38166. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .modeMux = 1'b0;
  38167. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .FeedbackMux = 1'b0;
  38168. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .ShiftMux = 1'b0;
  38169. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .BypassEn = 1'b0;
  38170. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~0 .CarryEnb = 1'b1;
  38171. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~10 (
  38172. .A(\macro_inst|apb_adc0_inst|apb_db [2]),
  38173. .B(vcc),
  38174. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38175. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38176. .Cin(),
  38177. .Qin(),
  38178. .Clk(),
  38179. .AsyncReset(),
  38180. .SyncReset(),
  38181. .ShiftData(),
  38182. .SyncLoad(),
  38183. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~10_combout ),
  38184. .Cout(),
  38185. .Q());
  38186. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .coord_x = 18;
  38187. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .coord_y = 4;
  38188. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .coord_z = 9;
  38189. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .mask = 16'hA0AA;
  38190. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .modeMux = 1'b0;
  38191. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .FeedbackMux = 1'b0;
  38192. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .ShiftMux = 1'b0;
  38193. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .BypassEn = 1'b0;
  38194. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~10 .CarryEnb = 1'b1;
  38195. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~12 (
  38196. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38197. .B(vcc),
  38198. .C(\macro_inst|apb_adc0_inst|apb_db [0]),
  38199. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38200. .Cin(),
  38201. .Qin(),
  38202. .Clk(),
  38203. .AsyncReset(),
  38204. .SyncReset(),
  38205. .ShiftData(),
  38206. .SyncLoad(),
  38207. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~12_combout ),
  38208. .Cout(),
  38209. .Q());
  38210. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .coord_x = 20;
  38211. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .coord_y = 4;
  38212. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .coord_z = 0;
  38213. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .mask = 16'hF050;
  38214. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .modeMux = 1'b0;
  38215. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .FeedbackMux = 1'b0;
  38216. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .ShiftMux = 1'b0;
  38217. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .BypassEn = 1'b0;
  38218. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~12 .CarryEnb = 1'b1;
  38219. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~2 (
  38220. .A(vcc),
  38221. .B(\macro_inst|apb_adc0_inst|apb_db [10]),
  38222. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38223. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38224. .Cin(),
  38225. .Qin(),
  38226. .Clk(),
  38227. .AsyncReset(),
  38228. .SyncReset(),
  38229. .ShiftData(),
  38230. .SyncLoad(),
  38231. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~2_combout ),
  38232. .Cout(),
  38233. .Q());
  38234. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .coord_x = 18;
  38235. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .coord_y = 4;
  38236. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .coord_z = 12;
  38237. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .mask = 16'hC0CC;
  38238. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .modeMux = 1'b0;
  38239. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .FeedbackMux = 1'b0;
  38240. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .ShiftMux = 1'b0;
  38241. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .BypassEn = 1'b0;
  38242. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~2 .CarryEnb = 1'b1;
  38243. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~3 (
  38244. .A(vcc),
  38245. .B(\macro_inst|apb_adc0_inst|apb_db [9]),
  38246. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38247. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38248. .Cin(),
  38249. .Qin(),
  38250. .Clk(),
  38251. .AsyncReset(),
  38252. .SyncReset(),
  38253. .ShiftData(),
  38254. .SyncLoad(),
  38255. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~3_combout ),
  38256. .Cout(),
  38257. .Q());
  38258. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .coord_x = 18;
  38259. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .coord_y = 4;
  38260. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .coord_z = 11;
  38261. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .mask = 16'hC0CC;
  38262. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .modeMux = 1'b0;
  38263. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .FeedbackMux = 1'b0;
  38264. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .ShiftMux = 1'b0;
  38265. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .BypassEn = 1'b0;
  38266. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~3 .CarryEnb = 1'b1;
  38267. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~4 (
  38268. .A(vcc),
  38269. .B(\macro_inst|apb_adc0_inst|apb_db [8]),
  38270. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38271. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38272. .Cin(),
  38273. .Qin(),
  38274. .Clk(),
  38275. .AsyncReset(),
  38276. .SyncReset(),
  38277. .ShiftData(),
  38278. .SyncLoad(),
  38279. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~4_combout ),
  38280. .Cout(),
  38281. .Q());
  38282. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .coord_x = 18;
  38283. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .coord_y = 4;
  38284. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .coord_z = 6;
  38285. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .mask = 16'hC0CC;
  38286. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .modeMux = 1'b0;
  38287. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .FeedbackMux = 1'b0;
  38288. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .ShiftMux = 1'b0;
  38289. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .BypassEn = 1'b0;
  38290. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~4 .CarryEnb = 1'b1;
  38291. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~5 (
  38292. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38293. .B(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38294. .C(vcc),
  38295. .D(\macro_inst|apb_adc0_inst|apb_db [7]),
  38296. .Cin(),
  38297. .Qin(),
  38298. .Clk(),
  38299. .AsyncReset(),
  38300. .SyncReset(),
  38301. .ShiftData(),
  38302. .SyncLoad(),
  38303. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~5_combout ),
  38304. .Cout(),
  38305. .Q());
  38306. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .coord_x = 18;
  38307. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .coord_y = 4;
  38308. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .coord_z = 5;
  38309. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .mask = 16'hBB00;
  38310. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .modeMux = 1'b0;
  38311. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .FeedbackMux = 1'b0;
  38312. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .ShiftMux = 1'b0;
  38313. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .BypassEn = 1'b0;
  38314. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~5 .CarryEnb = 1'b1;
  38315. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~7 (
  38316. .A(vcc),
  38317. .B(\macro_inst|apb_adc0_inst|apb_db [5]),
  38318. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38319. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38320. .Cin(),
  38321. .Qin(),
  38322. .Clk(),
  38323. .AsyncReset(),
  38324. .SyncReset(),
  38325. .ShiftData(),
  38326. .SyncLoad(),
  38327. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~7_combout ),
  38328. .Cout(),
  38329. .Q());
  38330. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .coord_x = 18;
  38331. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .coord_y = 4;
  38332. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .coord_z = 4;
  38333. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .mask = 16'hC0CC;
  38334. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .modeMux = 1'b0;
  38335. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .FeedbackMux = 1'b0;
  38336. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .ShiftMux = 1'b0;
  38337. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .BypassEn = 1'b0;
  38338. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~7 .CarryEnb = 1'b1;
  38339. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~8 (
  38340. .A(vcc),
  38341. .B(\macro_inst|apb_adc0_inst|apb_db [4]),
  38342. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38343. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38344. .Cin(),
  38345. .Qin(),
  38346. .Clk(),
  38347. .AsyncReset(),
  38348. .SyncReset(),
  38349. .ShiftData(),
  38350. .SyncLoad(),
  38351. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~8_combout ),
  38352. .Cout(),
  38353. .Q());
  38354. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .coord_x = 18;
  38355. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .coord_y = 4;
  38356. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .coord_z = 1;
  38357. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .mask = 16'hC0CC;
  38358. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .modeMux = 1'b0;
  38359. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .FeedbackMux = 1'b0;
  38360. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .ShiftMux = 1'b0;
  38361. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .BypassEn = 1'b0;
  38362. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~8 .CarryEnb = 1'b1;
  38363. alta_slice \macro_inst|trig_ctrl_inst|adc_data_prev~9 (
  38364. .A(vcc),
  38365. .B(\macro_inst|apb_adc0_inst|apb_db [3]),
  38366. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38367. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38368. .Cin(),
  38369. .Qin(),
  38370. .Clk(),
  38371. .AsyncReset(),
  38372. .SyncReset(),
  38373. .ShiftData(),
  38374. .SyncLoad(),
  38375. .LutOut(\macro_inst|trig_ctrl_inst|adc_data_prev~9_combout ),
  38376. .Cout(),
  38377. .Q());
  38378. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .coord_x = 18;
  38379. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .coord_y = 4;
  38380. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .coord_z = 10;
  38381. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .mask = 16'hC0CC;
  38382. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .modeMux = 1'b0;
  38383. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .FeedbackMux = 1'b0;
  38384. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .ShiftMux = 1'b0;
  38385. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .BypassEn = 1'b0;
  38386. defparam \macro_inst|trig_ctrl_inst|adc_data_prev~9 .CarryEnb = 1'b1;
  38387. alta_slice \macro_inst|trig_ctrl_inst|adc_eoc_sync1 (
  38388. .A(vcc),
  38389. .B(vcc),
  38390. .C(\macro_inst|apb_adc0_inst|adc_inst.eoc ),
  38391. .D(\macro_inst|apb_adc0_inst|apb_eoc~q ),
  38392. .Cin(),
  38393. .Qin(\macro_inst|trig_ctrl_inst|adc_eoc_sync1~q ),
  38394. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X56_Y4_SIG_VCC ),
  38395. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  38396. .SyncReset(),
  38397. .ShiftData(),
  38398. .SyncLoad(),
  38399. .LutOut(\macro_inst|apb_adc0_inst|adc_eoc_out~combout ),
  38400. .Cout(),
  38401. .Q(\macro_inst|trig_ctrl_inst|adc_eoc_sync1~q ));
  38402. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .coord_x = 20;
  38403. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .coord_y = 5;
  38404. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .coord_z = 13;
  38405. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .mask = 16'h0F00;
  38406. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .modeMux = 1'b0;
  38407. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .FeedbackMux = 1'b0;
  38408. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .ShiftMux = 1'b0;
  38409. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .BypassEn = 1'b0;
  38410. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync1 .CarryEnb = 1'b1;
  38411. alta_slice \macro_inst|trig_ctrl_inst|adc_eoc_sync2 (
  38412. .A(\macro_inst|cfg_reg_inst|adc_en~q ),
  38413. .B(\macro_inst|cfg_reg_inst|adc_run~q ),
  38414. .C(\macro_inst|trig_ctrl_inst|adc_eoc_sync1~q ),
  38415. .D(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  38416. .Cin(),
  38417. .Qin(\macro_inst|trig_ctrl_inst|adc_eoc_sync2~q ),
  38418. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ),
  38419. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  38420. .SyncReset(SyncReset_X60_Y3_GND),
  38421. .ShiftData(),
  38422. .SyncLoad(SyncLoad_X60_Y3_VCC),
  38423. .LutOut(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  38424. .Cout(),
  38425. .Q(\macro_inst|trig_ctrl_inst|adc_eoc_sync2~q ));
  38426. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .coord_x = 18;
  38427. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .coord_y = 6;
  38428. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .coord_z = 7;
  38429. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .mask = 16'h0088;
  38430. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .modeMux = 1'b0;
  38431. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .FeedbackMux = 1'b0;
  38432. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .ShiftMux = 1'b0;
  38433. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .BypassEn = 1'b1;
  38434. defparam \macro_inst|trig_ctrl_inst|adc_eoc_sync2 .CarryEnb = 1'b1;
  38435. alta_slice \macro_inst|trig_ctrl_inst|adc_restart_ris (
  38436. .A(vcc),
  38437. .B(vcc),
  38438. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38439. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38440. .Cin(),
  38441. .Qin(),
  38442. .Clk(),
  38443. .AsyncReset(),
  38444. .SyncReset(),
  38445. .ShiftData(),
  38446. .SyncLoad(),
  38447. .LutOut(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  38448. .Cout(),
  38449. .Q());
  38450. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .coord_x = 17;
  38451. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .coord_y = 6;
  38452. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .coord_z = 13;
  38453. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .mask = 16'h00F0;
  38454. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .modeMux = 1'b0;
  38455. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .FeedbackMux = 1'b0;
  38456. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .ShiftMux = 1'b0;
  38457. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .BypassEn = 1'b0;
  38458. defparam \macro_inst|trig_ctrl_inst|adc_restart_ris .CarryEnb = 1'b1;
  38459. alta_slice \macro_inst|trig_ctrl_inst|adc_rst_sync1 (
  38460. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  38461. .B(\macro_inst|trig_ctrl_inst|always4~2_combout ),
  38462. .C(\macro_inst|cfg_reg_inst|adc_restart~q ),
  38463. .D(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  38464. .Cin(),
  38465. .Qin(\macro_inst|trig_ctrl_inst|adc_rst_sync1~q ),
  38466. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ),
  38467. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38468. .SyncReset(SyncReset_X59_Y7_GND),
  38469. .ShiftData(),
  38470. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38471. .LutOut(\macro_inst|trig_ctrl_inst|pulse_active~1_combout ),
  38472. .Cout(),
  38473. .Q(\macro_inst|trig_ctrl_inst|adc_rst_sync1~q ));
  38474. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .coord_x = 20;
  38475. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .coord_y = 6;
  38476. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .coord_z = 0;
  38477. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .mask = 16'h7700;
  38478. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .modeMux = 1'b0;
  38479. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .FeedbackMux = 1'b0;
  38480. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .ShiftMux = 1'b0;
  38481. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .BypassEn = 1'b1;
  38482. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync1 .CarryEnb = 1'b1;
  38483. alta_slice \macro_inst|trig_ctrl_inst|adc_rst_sync2 (
  38484. .A(),
  38485. .B(),
  38486. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync1~q ),
  38487. .D(),
  38488. .Cin(),
  38489. .Qin(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38490. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ),
  38491. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38492. .SyncReset(SyncReset_X59_Y7_GND),
  38493. .ShiftData(),
  38494. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38495. .LutOut(),
  38496. .Cout(),
  38497. .Q(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ));
  38498. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .coord_x = 20;
  38499. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .coord_y = 6;
  38500. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .coord_z = 12;
  38501. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .mask = 16'hFFFF;
  38502. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .modeMux = 1'b1;
  38503. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .FeedbackMux = 1'b0;
  38504. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .ShiftMux = 1'b0;
  38505. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .BypassEn = 1'b1;
  38506. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync2 .CarryEnb = 1'b1;
  38507. alta_slice \macro_inst|trig_ctrl_inst|adc_rst_sync3 (
  38508. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38509. .B(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ),
  38510. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  38511. .D(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  38512. .Cin(),
  38513. .Qin(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  38514. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ),
  38515. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  38516. .SyncReset(SyncReset_X61_Y6_GND),
  38517. .ShiftData(),
  38518. .SyncLoad(SyncLoad_X61_Y6_VCC),
  38519. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout ),
  38520. .Cout(),
  38521. .Q(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ));
  38522. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .coord_x = 17;
  38523. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .coord_y = 6;
  38524. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .coord_z = 9;
  38525. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .mask = 16'h0ACE;
  38526. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .modeMux = 1'b0;
  38527. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .FeedbackMux = 1'b1;
  38528. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .ShiftMux = 1'b0;
  38529. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .BypassEn = 1'b1;
  38530. defparam \macro_inst|trig_ctrl_inst|adc_rst_sync3 .CarryEnb = 1'b1;
  38531. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 (
  38532. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]),
  38533. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [0]),
  38534. .C(vcc),
  38535. .D(vcc),
  38536. .Cin(),
  38537. .Qin(),
  38538. .Clk(),
  38539. .AsyncReset(),
  38540. .SyncReset(),
  38541. .ShiftData(),
  38542. .SyncLoad(),
  38543. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0_combout ),
  38544. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[0]~1 ),
  38545. .Q());
  38546. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .coord_x = 19;
  38547. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .coord_y = 7;
  38548. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .coord_z = 1;
  38549. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .mask = 16'h66BB;
  38550. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .modeMux = 1'b0;
  38551. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .FeedbackMux = 1'b0;
  38552. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .ShiftMux = 1'b0;
  38553. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .BypassEn = 1'b0;
  38554. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[0]~0 .CarryEnb = 1'b0;
  38555. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 (
  38556. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]),
  38557. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [1]),
  38558. .C(vcc),
  38559. .D(vcc),
  38560. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[0]~1 ),
  38561. .Qin(),
  38562. .Clk(),
  38563. .AsyncReset(),
  38564. .SyncReset(),
  38565. .ShiftData(),
  38566. .SyncLoad(),
  38567. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2_combout ),
  38568. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[1]~3 ),
  38569. .Q());
  38570. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .coord_x = 19;
  38571. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .coord_y = 7;
  38572. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .coord_z = 2;
  38573. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .mask = 16'h694D;
  38574. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .modeMux = 1'b1;
  38575. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .FeedbackMux = 1'b0;
  38576. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .ShiftMux = 1'b0;
  38577. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .BypassEn = 1'b0;
  38578. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[1]~2 .CarryEnb = 1'b0;
  38579. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 (
  38580. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]),
  38581. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [2]),
  38582. .C(vcc),
  38583. .D(vcc),
  38584. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[1]~3 ),
  38585. .Qin(),
  38586. .Clk(),
  38587. .AsyncReset(),
  38588. .SyncReset(),
  38589. .ShiftData(),
  38590. .SyncLoad(),
  38591. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4_combout ),
  38592. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[2]~5 ),
  38593. .Q());
  38594. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .coord_x = 19;
  38595. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .coord_y = 7;
  38596. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .coord_z = 3;
  38597. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .mask = 16'h962B;
  38598. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .modeMux = 1'b1;
  38599. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .FeedbackMux = 1'b0;
  38600. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .ShiftMux = 1'b0;
  38601. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .BypassEn = 1'b0;
  38602. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[2]~4 .CarryEnb = 1'b0;
  38603. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 (
  38604. .A(\macro_inst|trig_ctrl_inst|trigger_ptr [3]),
  38605. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]),
  38606. .C(vcc),
  38607. .D(vcc),
  38608. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[2]~5 ),
  38609. .Qin(),
  38610. .Clk(),
  38611. .AsyncReset(),
  38612. .SyncReset(),
  38613. .ShiftData(),
  38614. .SyncLoad(),
  38615. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6_combout ),
  38616. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[3]~7 ),
  38617. .Q());
  38618. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .coord_x = 19;
  38619. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .coord_y = 7;
  38620. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .coord_z = 4;
  38621. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .mask = 16'h692B;
  38622. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .modeMux = 1'b1;
  38623. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .FeedbackMux = 1'b0;
  38624. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .ShiftMux = 1'b0;
  38625. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .BypassEn = 1'b0;
  38626. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[3]~6 .CarryEnb = 1'b0;
  38627. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 (
  38628. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]),
  38629. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [4]),
  38630. .C(vcc),
  38631. .D(vcc),
  38632. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[3]~7 ),
  38633. .Qin(),
  38634. .Clk(),
  38635. .AsyncReset(),
  38636. .SyncReset(),
  38637. .ShiftData(),
  38638. .SyncLoad(),
  38639. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8_combout ),
  38640. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[4]~9 ),
  38641. .Q());
  38642. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .coord_x = 19;
  38643. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .coord_y = 7;
  38644. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .coord_z = 5;
  38645. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .mask = 16'h962B;
  38646. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .modeMux = 1'b1;
  38647. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .FeedbackMux = 1'b0;
  38648. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .ShiftMux = 1'b0;
  38649. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .BypassEn = 1'b0;
  38650. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[4]~8 .CarryEnb = 1'b0;
  38651. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 (
  38652. .A(\macro_inst|trig_ctrl_inst|trigger_ptr [5]),
  38653. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]),
  38654. .C(vcc),
  38655. .D(vcc),
  38656. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[4]~9 ),
  38657. .Qin(),
  38658. .Clk(),
  38659. .AsyncReset(),
  38660. .SyncReset(),
  38661. .ShiftData(),
  38662. .SyncLoad(),
  38663. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10_combout ),
  38664. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[5]~11 ),
  38665. .Q());
  38666. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .coord_x = 19;
  38667. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .coord_y = 7;
  38668. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .coord_z = 6;
  38669. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .mask = 16'h692B;
  38670. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .modeMux = 1'b1;
  38671. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .FeedbackMux = 1'b0;
  38672. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .ShiftMux = 1'b0;
  38673. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .BypassEn = 1'b0;
  38674. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[5]~10 .CarryEnb = 1'b0;
  38675. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 (
  38676. .A(\macro_inst|trig_ctrl_inst|trigger_ptr [6]),
  38677. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]),
  38678. .C(vcc),
  38679. .D(vcc),
  38680. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[5]~11 ),
  38681. .Qin(),
  38682. .Clk(),
  38683. .AsyncReset(),
  38684. .SyncReset(),
  38685. .ShiftData(),
  38686. .SyncLoad(),
  38687. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12_combout ),
  38688. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[6]~13 ),
  38689. .Q());
  38690. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .coord_x = 19;
  38691. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .coord_y = 7;
  38692. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .coord_z = 7;
  38693. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .mask = 16'h964D;
  38694. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .modeMux = 1'b1;
  38695. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .FeedbackMux = 1'b0;
  38696. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .ShiftMux = 1'b0;
  38697. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .BypassEn = 1'b0;
  38698. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[6]~12 .CarryEnb = 1'b0;
  38699. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 (
  38700. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]),
  38701. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [7]),
  38702. .C(vcc),
  38703. .D(vcc),
  38704. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[6]~13 ),
  38705. .Qin(),
  38706. .Clk(),
  38707. .AsyncReset(),
  38708. .SyncReset(),
  38709. .ShiftData(),
  38710. .SyncLoad(),
  38711. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14_combout ),
  38712. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[7]~15 ),
  38713. .Q());
  38714. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .coord_x = 19;
  38715. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .coord_y = 7;
  38716. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .coord_z = 8;
  38717. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .mask = 16'h694D;
  38718. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .modeMux = 1'b1;
  38719. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .FeedbackMux = 1'b0;
  38720. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .ShiftMux = 1'b0;
  38721. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .BypassEn = 1'b0;
  38722. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[7]~14 .CarryEnb = 1'b0;
  38723. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 (
  38724. .A(\macro_inst|trig_ctrl_inst|trigger_ptr [8]),
  38725. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]),
  38726. .C(vcc),
  38727. .D(vcc),
  38728. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[7]~15 ),
  38729. .Qin(),
  38730. .Clk(),
  38731. .AsyncReset(),
  38732. .SyncReset(),
  38733. .ShiftData(),
  38734. .SyncLoad(),
  38735. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16_combout ),
  38736. .Cout(\macro_inst|trig_ctrl_inst|addr_diff_edge[8]~17 ),
  38737. .Q());
  38738. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .coord_x = 19;
  38739. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .coord_y = 7;
  38740. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .coord_z = 9;
  38741. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .mask = 16'h964D;
  38742. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .modeMux = 1'b1;
  38743. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .FeedbackMux = 1'b0;
  38744. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .ShiftMux = 1'b0;
  38745. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .BypassEn = 1'b0;
  38746. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[8]~16 .CarryEnb = 1'b0;
  38747. alta_slice \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 (
  38748. .A(vcc),
  38749. .B(\macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [9]),
  38750. .C(vcc),
  38751. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  38752. .Cin(\macro_inst|trig_ctrl_inst|addr_diff_edge[8]~17 ),
  38753. .Qin(),
  38754. .Clk(),
  38755. .AsyncReset(),
  38756. .SyncReset(),
  38757. .ShiftData(),
  38758. .SyncLoad(),
  38759. .LutOut(\macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18_combout ),
  38760. .Cout(),
  38761. .Q());
  38762. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .coord_x = 19;
  38763. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .coord_y = 7;
  38764. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .coord_z = 10;
  38765. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .mask = 16'h3CC3;
  38766. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .modeMux = 1'b1;
  38767. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .FeedbackMux = 1'b0;
  38768. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .ShiftMux = 1'b0;
  38769. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .BypassEn = 1'b0;
  38770. defparam \macro_inst|trig_ctrl_inst|addr_diff_edge[9]~18 .CarryEnb = 1'b1;
  38771. alta_slice \macro_inst|trig_ctrl_inst|always11~2 (
  38772. .A(\macro_inst|ahb2apb_inst|penable~q ),
  38773. .B(\macro_inst|ahb2apb_inst|pwrite~q ),
  38774. .C(\macro_inst|ShiftLeft0~1_combout ),
  38775. .D(\macro_inst|ahb2apb_inst|psel~q ),
  38776. .Cin(),
  38777. .Qin(),
  38778. .Clk(),
  38779. .AsyncReset(),
  38780. .SyncReset(),
  38781. .ShiftData(),
  38782. .SyncLoad(),
  38783. .LutOut(\macro_inst|trig_ctrl_inst|always11~2_combout ),
  38784. .Cout(),
  38785. .Q());
  38786. defparam \macro_inst|trig_ctrl_inst|always11~2 .coord_x = 16;
  38787. defparam \macro_inst|trig_ctrl_inst|always11~2 .coord_y = 12;
  38788. defparam \macro_inst|trig_ctrl_inst|always11~2 .coord_z = 3;
  38789. defparam \macro_inst|trig_ctrl_inst|always11~2 .mask = 16'h1000;
  38790. defparam \macro_inst|trig_ctrl_inst|always11~2 .modeMux = 1'b0;
  38791. defparam \macro_inst|trig_ctrl_inst|always11~2 .FeedbackMux = 1'b0;
  38792. defparam \macro_inst|trig_ctrl_inst|always11~2 .ShiftMux = 1'b0;
  38793. defparam \macro_inst|trig_ctrl_inst|always11~2 .BypassEn = 1'b0;
  38794. defparam \macro_inst|trig_ctrl_inst|always11~2 .CarryEnb = 1'b1;
  38795. alta_slice \macro_inst|trig_ctrl_inst|always1~1 (
  38796. .A(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  38797. .B(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  38798. .C(\macro_inst|trig_ctrl_inst|adc_eoc_sync1~q ),
  38799. .D(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  38800. .Cin(),
  38801. .Qin(),
  38802. .Clk(),
  38803. .AsyncReset(),
  38804. .SyncReset(),
  38805. .ShiftData(),
  38806. .SyncLoad(),
  38807. .LutOut(\macro_inst|trig_ctrl_inst|always1~1_combout ),
  38808. .Cout(),
  38809. .Q());
  38810. defparam \macro_inst|trig_ctrl_inst|always1~1 .coord_x = 18;
  38811. defparam \macro_inst|trig_ctrl_inst|always1~1 .coord_y = 6;
  38812. defparam \macro_inst|trig_ctrl_inst|always1~1 .coord_z = 11;
  38813. defparam \macro_inst|trig_ctrl_inst|always1~1 .mask = 16'h0F1F;
  38814. defparam \macro_inst|trig_ctrl_inst|always1~1 .modeMux = 1'b0;
  38815. defparam \macro_inst|trig_ctrl_inst|always1~1 .FeedbackMux = 1'b0;
  38816. defparam \macro_inst|trig_ctrl_inst|always1~1 .ShiftMux = 1'b0;
  38817. defparam \macro_inst|trig_ctrl_inst|always1~1 .BypassEn = 1'b0;
  38818. defparam \macro_inst|trig_ctrl_inst|always1~1 .CarryEnb = 1'b1;
  38819. alta_slice \macro_inst|trig_ctrl_inst|always4~1 (
  38820. .A(\macro_inst|cfg_reg_inst|trig_edge [0]),
  38821. .B(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  38822. .C(\macro_inst|cfg_reg_inst|trig_edge [1]),
  38823. .D(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  38824. .Cin(),
  38825. .Qin(),
  38826. .Clk(),
  38827. .AsyncReset(),
  38828. .SyncReset(),
  38829. .ShiftData(),
  38830. .SyncLoad(),
  38831. .LutOut(\macro_inst|trig_ctrl_inst|always4~1_combout ),
  38832. .Cout(),
  38833. .Q());
  38834. defparam \macro_inst|trig_ctrl_inst|always4~1 .coord_x = 19;
  38835. defparam \macro_inst|trig_ctrl_inst|always4~1 .coord_y = 8;
  38836. defparam \macro_inst|trig_ctrl_inst|always4~1 .coord_z = 7;
  38837. defparam \macro_inst|trig_ctrl_inst|always4~1 .mask = 16'h8000;
  38838. defparam \macro_inst|trig_ctrl_inst|always4~1 .modeMux = 1'b0;
  38839. defparam \macro_inst|trig_ctrl_inst|always4~1 .FeedbackMux = 1'b0;
  38840. defparam \macro_inst|trig_ctrl_inst|always4~1 .ShiftMux = 1'b0;
  38841. defparam \macro_inst|trig_ctrl_inst|always4~1 .BypassEn = 1'b0;
  38842. defparam \macro_inst|trig_ctrl_inst|always4~1 .CarryEnb = 1'b1;
  38843. alta_slice \macro_inst|trig_ctrl_inst|always5~0 (
  38844. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]),
  38845. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]),
  38846. .C(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]),
  38847. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]),
  38848. .Cin(),
  38849. .Qin(),
  38850. .Clk(),
  38851. .AsyncReset(),
  38852. .SyncReset(),
  38853. .ShiftData(),
  38854. .SyncLoad(),
  38855. .LutOut(\macro_inst|trig_ctrl_inst|always5~0_combout ),
  38856. .Cout(),
  38857. .Q());
  38858. defparam \macro_inst|trig_ctrl_inst|always5~0 .coord_x = 18;
  38859. defparam \macro_inst|trig_ctrl_inst|always5~0 .coord_y = 7;
  38860. defparam \macro_inst|trig_ctrl_inst|always5~0 .coord_z = 0;
  38861. defparam \macro_inst|trig_ctrl_inst|always5~0 .mask = 16'h8000;
  38862. defparam \macro_inst|trig_ctrl_inst|always5~0 .modeMux = 1'b0;
  38863. defparam \macro_inst|trig_ctrl_inst|always5~0 .FeedbackMux = 1'b0;
  38864. defparam \macro_inst|trig_ctrl_inst|always5~0 .ShiftMux = 1'b0;
  38865. defparam \macro_inst|trig_ctrl_inst|always5~0 .BypassEn = 1'b0;
  38866. defparam \macro_inst|trig_ctrl_inst|always5~0 .CarryEnb = 1'b1;
  38867. alta_slice \macro_inst|trig_ctrl_inst|always5~1 (
  38868. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]),
  38869. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]),
  38870. .C(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]),
  38871. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]),
  38872. .Cin(),
  38873. .Qin(),
  38874. .Clk(),
  38875. .AsyncReset(),
  38876. .SyncReset(),
  38877. .ShiftData(),
  38878. .SyncLoad(),
  38879. .LutOut(\macro_inst|trig_ctrl_inst|always5~1_combout ),
  38880. .Cout(),
  38881. .Q());
  38882. defparam \macro_inst|trig_ctrl_inst|always5~1 .coord_x = 18;
  38883. defparam \macro_inst|trig_ctrl_inst|always5~1 .coord_y = 7;
  38884. defparam \macro_inst|trig_ctrl_inst|always5~1 .coord_z = 2;
  38885. defparam \macro_inst|trig_ctrl_inst|always5~1 .mask = 16'h8000;
  38886. defparam \macro_inst|trig_ctrl_inst|always5~1 .modeMux = 1'b0;
  38887. defparam \macro_inst|trig_ctrl_inst|always5~1 .FeedbackMux = 1'b0;
  38888. defparam \macro_inst|trig_ctrl_inst|always5~1 .ShiftMux = 1'b0;
  38889. defparam \macro_inst|trig_ctrl_inst|always5~1 .BypassEn = 1'b0;
  38890. defparam \macro_inst|trig_ctrl_inst|always5~1 .CarryEnb = 1'b1;
  38891. alta_slice \macro_inst|trig_ctrl_inst|always5~2 (
  38892. .A(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  38893. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]),
  38894. .C(\macro_inst|trig_ctrl_inst|always5~0_combout ),
  38895. .D(\macro_inst|trig_ctrl_inst|always5~1_combout ),
  38896. .Cin(),
  38897. .Qin(),
  38898. .Clk(),
  38899. .AsyncReset(),
  38900. .SyncReset(),
  38901. .ShiftData(),
  38902. .SyncLoad(),
  38903. .LutOut(\macro_inst|trig_ctrl_inst|always5~2_combout ),
  38904. .Cout(),
  38905. .Q());
  38906. defparam \macro_inst|trig_ctrl_inst|always5~2 .coord_x = 18;
  38907. defparam \macro_inst|trig_ctrl_inst|always5~2 .coord_y = 7;
  38908. defparam \macro_inst|trig_ctrl_inst|always5~2 .coord_z = 3;
  38909. defparam \macro_inst|trig_ctrl_inst|always5~2 .mask = 16'h8000;
  38910. defparam \macro_inst|trig_ctrl_inst|always5~2 .modeMux = 1'b0;
  38911. defparam \macro_inst|trig_ctrl_inst|always5~2 .FeedbackMux = 1'b0;
  38912. defparam \macro_inst|trig_ctrl_inst|always5~2 .ShiftMux = 1'b0;
  38913. defparam \macro_inst|trig_ctrl_inst|always5~2 .BypassEn = 1'b0;
  38914. defparam \macro_inst|trig_ctrl_inst|always5~2 .CarryEnb = 1'b1;
  38915. alta_slice \macro_inst|trig_ctrl_inst|always5~3 (
  38916. .A(\macro_inst|cfg_reg_inst|adc_en~q ),
  38917. .B(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  38918. .C(\macro_inst|cfg_reg_inst|adc_run~q ),
  38919. .D(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  38920. .Cin(),
  38921. .Qin(),
  38922. .Clk(),
  38923. .AsyncReset(),
  38924. .SyncReset(),
  38925. .ShiftData(),
  38926. .SyncLoad(),
  38927. .LutOut(\macro_inst|trig_ctrl_inst|always5~3_combout ),
  38928. .Cout(),
  38929. .Q());
  38930. defparam \macro_inst|trig_ctrl_inst|always5~3 .coord_x = 18;
  38931. defparam \macro_inst|trig_ctrl_inst|always5~3 .coord_y = 6;
  38932. defparam \macro_inst|trig_ctrl_inst|always5~3 .coord_z = 15;
  38933. defparam \macro_inst|trig_ctrl_inst|always5~3 .mask = 16'h0080;
  38934. defparam \macro_inst|trig_ctrl_inst|always5~3 .modeMux = 1'b0;
  38935. defparam \macro_inst|trig_ctrl_inst|always5~3 .FeedbackMux = 1'b0;
  38936. defparam \macro_inst|trig_ctrl_inst|always5~3 .ShiftMux = 1'b0;
  38937. defparam \macro_inst|trig_ctrl_inst|always5~3 .BypassEn = 1'b0;
  38938. defparam \macro_inst|trig_ctrl_inst|always5~3 .CarryEnb = 1'b1;
  38939. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] (
  38940. .A(vcc),
  38941. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [0]),
  38942. .C(vcc),
  38943. .D(vcc),
  38944. .Cin(),
  38945. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [0]),
  38946. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  38947. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  38948. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  38949. .ShiftData(),
  38950. .SyncLoad(SyncLoad_X58_Y6_GND),
  38951. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[0]~12_combout ),
  38952. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[0]~13 ),
  38953. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [0]));
  38954. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .coord_x = 20;
  38955. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .coord_y = 8;
  38956. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .coord_z = 0;
  38957. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .mask = 16'h33CC;
  38958. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .modeMux = 1'b0;
  38959. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .FeedbackMux = 1'b0;
  38960. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .ShiftMux = 1'b0;
  38961. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .BypassEn = 1'b1;
  38962. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[0] .CarryEnb = 1'b0;
  38963. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] (
  38964. .A(vcc),
  38965. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [1]),
  38966. .C(vcc),
  38967. .D(vcc),
  38968. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[0]~13 ),
  38969. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [1]),
  38970. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  38971. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  38972. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  38973. .ShiftData(),
  38974. .SyncLoad(SyncLoad_X58_Y6_GND),
  38975. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[1]~14_combout ),
  38976. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[1]~15 ),
  38977. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [1]));
  38978. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .coord_x = 20;
  38979. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .coord_y = 8;
  38980. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .coord_z = 1;
  38981. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .mask = 16'h3C3F;
  38982. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .modeMux = 1'b1;
  38983. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .FeedbackMux = 1'b0;
  38984. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .ShiftMux = 1'b0;
  38985. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .BypassEn = 1'b1;
  38986. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[1] .CarryEnb = 1'b0;
  38987. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] (
  38988. .A(vcc),
  38989. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [2]),
  38990. .C(vcc),
  38991. .D(vcc),
  38992. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[1]~15 ),
  38993. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [2]),
  38994. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  38995. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  38996. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  38997. .ShiftData(),
  38998. .SyncLoad(SyncLoad_X58_Y6_GND),
  38999. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[2]~16_combout ),
  39000. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[2]~17 ),
  39001. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [2]));
  39002. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .coord_x = 20;
  39003. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .coord_y = 8;
  39004. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .coord_z = 2;
  39005. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .mask = 16'hC30C;
  39006. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .modeMux = 1'b1;
  39007. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .FeedbackMux = 1'b0;
  39008. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .ShiftMux = 1'b0;
  39009. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .BypassEn = 1'b1;
  39010. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[2] .CarryEnb = 1'b0;
  39011. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] (
  39012. .A(vcc),
  39013. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [3]),
  39014. .C(vcc),
  39015. .D(vcc),
  39016. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[2]~17 ),
  39017. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [3]),
  39018. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39019. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39020. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39021. .ShiftData(),
  39022. .SyncLoad(SyncLoad_X58_Y6_GND),
  39023. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[3]~18_combout ),
  39024. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[3]~19 ),
  39025. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [3]));
  39026. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .coord_x = 20;
  39027. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .coord_y = 8;
  39028. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .coord_z = 3;
  39029. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .mask = 16'h3C3F;
  39030. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .modeMux = 1'b1;
  39031. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .FeedbackMux = 1'b0;
  39032. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .ShiftMux = 1'b0;
  39033. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .BypassEn = 1'b1;
  39034. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[3] .CarryEnb = 1'b0;
  39035. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] (
  39036. .A(vcc),
  39037. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [4]),
  39038. .C(vcc),
  39039. .D(vcc),
  39040. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[3]~19 ),
  39041. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [4]),
  39042. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39043. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39044. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39045. .ShiftData(),
  39046. .SyncLoad(SyncLoad_X58_Y6_GND),
  39047. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[4]~20_combout ),
  39048. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[4]~21 ),
  39049. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [4]));
  39050. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .coord_x = 20;
  39051. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .coord_y = 8;
  39052. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .coord_z = 4;
  39053. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .mask = 16'hC30C;
  39054. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .modeMux = 1'b1;
  39055. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .FeedbackMux = 1'b0;
  39056. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .ShiftMux = 1'b0;
  39057. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .BypassEn = 1'b1;
  39058. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[4] .CarryEnb = 1'b0;
  39059. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] (
  39060. .A(vcc),
  39061. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [5]),
  39062. .C(vcc),
  39063. .D(vcc),
  39064. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[4]~21 ),
  39065. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [5]),
  39066. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39067. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39068. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39069. .ShiftData(),
  39070. .SyncLoad(SyncLoad_X58_Y6_GND),
  39071. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[5]~22_combout ),
  39072. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[5]~23 ),
  39073. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [5]));
  39074. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .coord_x = 20;
  39075. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .coord_y = 8;
  39076. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .coord_z = 5;
  39077. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .mask = 16'h3C3F;
  39078. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .modeMux = 1'b1;
  39079. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .FeedbackMux = 1'b0;
  39080. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .ShiftMux = 1'b0;
  39081. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .BypassEn = 1'b1;
  39082. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[5] .CarryEnb = 1'b0;
  39083. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] (
  39084. .A(vcc),
  39085. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [6]),
  39086. .C(vcc),
  39087. .D(vcc),
  39088. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[5]~23 ),
  39089. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [6]),
  39090. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39091. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39092. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39093. .ShiftData(),
  39094. .SyncLoad(SyncLoad_X58_Y6_GND),
  39095. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[6]~24_combout ),
  39096. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[6]~25 ),
  39097. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [6]));
  39098. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .coord_x = 20;
  39099. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .coord_y = 8;
  39100. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .coord_z = 6;
  39101. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .mask = 16'hC30C;
  39102. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .modeMux = 1'b1;
  39103. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .FeedbackMux = 1'b0;
  39104. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .ShiftMux = 1'b0;
  39105. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .BypassEn = 1'b1;
  39106. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[6] .CarryEnb = 1'b0;
  39107. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] (
  39108. .A(vcc),
  39109. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [7]),
  39110. .C(vcc),
  39111. .D(vcc),
  39112. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[6]~25 ),
  39113. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [7]),
  39114. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39115. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39116. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39117. .ShiftData(),
  39118. .SyncLoad(SyncLoad_X58_Y6_GND),
  39119. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~26_combout ),
  39120. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~27 ),
  39121. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [7]));
  39122. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .coord_x = 20;
  39123. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .coord_y = 8;
  39124. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .coord_z = 7;
  39125. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .mask = 16'h3C3F;
  39126. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .modeMux = 1'b1;
  39127. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .FeedbackMux = 1'b0;
  39128. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .ShiftMux = 1'b0;
  39129. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .BypassEn = 1'b1;
  39130. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7] .CarryEnb = 1'b0;
  39131. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 (
  39132. .A(vcc),
  39133. .B(\macro_inst|cfg_reg_inst|trig_mode [1]),
  39134. .C(\macro_inst|cfg_reg_inst|trig_mode [0]),
  39135. .D(\macro_inst|trig_ctrl_inst|LessThan7~3_combout ),
  39136. .Cin(),
  39137. .Qin(),
  39138. .Clk(),
  39139. .AsyncReset(),
  39140. .SyncReset(),
  39141. .ShiftData(),
  39142. .SyncLoad(),
  39143. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32_combout ),
  39144. .Cout(),
  39145. .Q());
  39146. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .coord_x = 18;
  39147. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .coord_y = 8;
  39148. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .coord_z = 10;
  39149. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .mask = 16'hFFFC;
  39150. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .modeMux = 1'b0;
  39151. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .FeedbackMux = 1'b0;
  39152. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .ShiftMux = 1'b0;
  39153. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .BypassEn = 1'b0;
  39154. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32 .CarryEnb = 1'b1;
  39155. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 (
  39156. .A(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  39157. .B(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  39158. .C(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  39159. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32_combout ),
  39160. .Cin(),
  39161. .Qin(),
  39162. .Clk(),
  39163. .AsyncReset(),
  39164. .SyncReset(),
  39165. .ShiftData(),
  39166. .SyncLoad(),
  39167. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33_combout ),
  39168. .Cout(),
  39169. .Q());
  39170. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .coord_x = 18;
  39171. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .coord_y = 8;
  39172. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .coord_z = 11;
  39173. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .mask = 16'hBFBB;
  39174. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .modeMux = 1'b0;
  39175. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .FeedbackMux = 1'b0;
  39176. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .ShiftMux = 1'b0;
  39177. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .BypassEn = 1'b0;
  39178. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33 .CarryEnb = 1'b1;
  39179. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 (
  39180. .A(\macro_inst|cfg_reg_inst|adc_run~q ),
  39181. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~33_combout ),
  39182. .C(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~32_combout ),
  39183. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  39184. .Cin(),
  39185. .Qin(),
  39186. .Clk(),
  39187. .AsyncReset(),
  39188. .SyncReset(),
  39189. .ShiftData(),
  39190. .SyncLoad(),
  39191. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34_combout ),
  39192. .Cout(),
  39193. .Q());
  39194. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .coord_x = 18;
  39195. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .coord_y = 8;
  39196. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .coord_z = 12;
  39197. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .mask = 16'h2202;
  39198. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .modeMux = 1'b0;
  39199. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .FeedbackMux = 1'b0;
  39200. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .ShiftMux = 1'b0;
  39201. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .BypassEn = 1'b0;
  39202. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34 .CarryEnb = 1'b1;
  39203. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 (
  39204. .A(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  39205. .B(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  39206. .C(\macro_inst|cfg_reg_inst|adc_en~q ),
  39207. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~34_combout ),
  39208. .Cin(),
  39209. .Qin(),
  39210. .Clk(),
  39211. .AsyncReset(),
  39212. .SyncReset(),
  39213. .ShiftData(),
  39214. .SyncLoad(),
  39215. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout ),
  39216. .Cout(),
  39217. .Q());
  39218. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .coord_x = 20;
  39219. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .coord_y = 8;
  39220. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .coord_z = 10;
  39221. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .mask = 16'hFBBB;
  39222. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .modeMux = 1'b0;
  39223. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .FeedbackMux = 1'b0;
  39224. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .ShiftMux = 1'b0;
  39225. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .BypassEn = 1'b0;
  39226. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35 .CarryEnb = 1'b1;
  39227. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 (
  39228. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  39229. .B(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  39230. .C(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  39231. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  39232. .Cin(),
  39233. .Qin(),
  39234. .Clk(),
  39235. .AsyncReset(),
  39236. .SyncReset(),
  39237. .ShiftData(),
  39238. .SyncLoad(),
  39239. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout ),
  39240. .Cout(),
  39241. .Q());
  39242. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .coord_x = 20;
  39243. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .coord_y = 8;
  39244. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .coord_z = 13;
  39245. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .mask = 16'hFF2F;
  39246. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .modeMux = 1'b0;
  39247. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .FeedbackMux = 1'b0;
  39248. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .ShiftMux = 1'b0;
  39249. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .BypassEn = 1'b0;
  39250. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36 .CarryEnb = 1'b1;
  39251. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] (
  39252. .A(vcc),
  39253. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [8]),
  39254. .C(vcc),
  39255. .D(vcc),
  39256. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~27 ),
  39257. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [8]),
  39258. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39259. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39260. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39261. .ShiftData(),
  39262. .SyncLoad(SyncLoad_X58_Y6_GND),
  39263. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[8]~28_combout ),
  39264. .Cout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[8]~29 ),
  39265. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [8]));
  39266. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .coord_x = 20;
  39267. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .coord_y = 8;
  39268. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .coord_z = 8;
  39269. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .mask = 16'hC30C;
  39270. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .modeMux = 1'b1;
  39271. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .FeedbackMux = 1'b0;
  39272. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .ShiftMux = 1'b0;
  39273. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .BypassEn = 1'b1;
  39274. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[8] .CarryEnb = 1'b0;
  39275. alta_slice \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] (
  39276. .A(vcc),
  39277. .B(vcc),
  39278. .C(vcc),
  39279. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt [9]),
  39280. .Cin(\macro_inst|trig_ctrl_inst|auto_wait_cnt[8]~29 ),
  39281. .Qin(\macro_inst|trig_ctrl_inst|auto_wait_cnt [9]),
  39282. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~35_combout_X58_Y6_SIG_SIG ),
  39283. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  39284. .SyncReset(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ),
  39285. .ShiftData(),
  39286. .SyncLoad(SyncLoad_X58_Y6_GND),
  39287. .LutOut(\macro_inst|trig_ctrl_inst|auto_wait_cnt[9]~30_combout ),
  39288. .Cout(),
  39289. .Q(\macro_inst|trig_ctrl_inst|auto_wait_cnt [9]));
  39290. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .coord_x = 20;
  39291. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .coord_y = 8;
  39292. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .coord_z = 9;
  39293. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .mask = 16'h0FF0;
  39294. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .modeMux = 1'b1;
  39295. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .FeedbackMux = 1'b0;
  39296. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .ShiftMux = 1'b0;
  39297. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .BypassEn = 1'b1;
  39298. defparam \macro_inst|trig_ctrl_inst|auto_wait_cnt[9] .CarryEnb = 1'b1;
  39299. alta_slice \macro_inst|trig_ctrl_inst|curr_state.DONE (
  39300. .A(\macro_inst|trig_ctrl_inst|Selector4~0_combout ),
  39301. .B(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  39302. .C(vcc),
  39303. .D(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  39304. .Cin(),
  39305. .Qin(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  39306. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ),
  39307. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  39308. .SyncReset(),
  39309. .ShiftData(),
  39310. .SyncLoad(),
  39311. .LutOut(\macro_inst|trig_ctrl_inst|Selector4~1_combout ),
  39312. .Cout(),
  39313. .Q(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ));
  39314. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .coord_x = 17;
  39315. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .coord_y = 6;
  39316. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .coord_z = 5;
  39317. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .mask = 16'h2232;
  39318. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .modeMux = 1'b0;
  39319. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .FeedbackMux = 1'b1;
  39320. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .ShiftMux = 1'b0;
  39321. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .BypassEn = 1'b0;
  39322. defparam \macro_inst|trig_ctrl_inst|curr_state.DONE .CarryEnb = 1'b1;
  39323. alta_slice \macro_inst|trig_ctrl_inst|curr_state.IDLE (
  39324. .A(\macro_inst|trig_ctrl_inst|Selector0~9_combout ),
  39325. .B(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  39326. .C(vcc),
  39327. .D(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  39328. .Cin(),
  39329. .Qin(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ),
  39330. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ),
  39331. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  39332. .SyncReset(),
  39333. .ShiftData(),
  39334. .SyncLoad(),
  39335. .LutOut(\macro_inst|trig_ctrl_inst|Selector0~10_combout ),
  39336. .Cout(),
  39337. .Q(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ));
  39338. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .coord_x = 17;
  39339. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .coord_y = 6;
  39340. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .coord_z = 8;
  39341. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .mask = 16'h1130;
  39342. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .modeMux = 1'b0;
  39343. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .FeedbackMux = 1'b1;
  39344. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .ShiftMux = 1'b0;
  39345. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .BypassEn = 1'b0;
  39346. defparam \macro_inst|trig_ctrl_inst|curr_state.IDLE .CarryEnb = 1'b1;
  39347. alta_slice \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG (
  39348. .A(\macro_inst|trig_ctrl_inst|Selector3~0_combout ),
  39349. .B(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  39350. .C(vcc),
  39351. .D(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  39352. .Cin(),
  39353. .Qin(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  39354. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ),
  39355. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  39356. .SyncReset(),
  39357. .ShiftData(),
  39358. .SyncLoad(),
  39359. .LutOut(\macro_inst|trig_ctrl_inst|Selector3~1_combout ),
  39360. .Cout(),
  39361. .Q(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ));
  39362. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .coord_x = 17;
  39363. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .coord_y = 6;
  39364. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .coord_z = 7;
  39365. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .mask = 16'h2232;
  39366. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .modeMux = 1'b0;
  39367. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .FeedbackMux = 1'b1;
  39368. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .ShiftMux = 1'b0;
  39369. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .BypassEn = 1'b0;
  39370. defparam \macro_inst|trig_ctrl_inst|curr_state.POST_TRIG .CarryEnb = 1'b1;
  39371. alta_slice \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL (
  39372. .A(\macro_inst|trig_ctrl_inst|Selector1~0_combout ),
  39373. .B(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  39374. .C(vcc),
  39375. .D(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  39376. .Cin(),
  39377. .Qin(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  39378. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ),
  39379. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  39380. .SyncReset(),
  39381. .ShiftData(),
  39382. .SyncLoad(),
  39383. .LutOut(\macro_inst|trig_ctrl_inst|Selector1~1_combout ),
  39384. .Cout(),
  39385. .Q(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ));
  39386. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .coord_x = 18;
  39387. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .coord_y = 6;
  39388. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .coord_z = 5;
  39389. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .mask = 16'h2230;
  39390. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .modeMux = 1'b0;
  39391. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .FeedbackMux = 1'b1;
  39392. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .ShiftMux = 1'b0;
  39393. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .BypassEn = 1'b0;
  39394. defparam \macro_inst|trig_ctrl_inst|curr_state.PRE_FILL .CarryEnb = 1'b1;
  39395. alta_slice \macro_inst|trig_ctrl_inst|curr_state.SAMPLING (
  39396. .A(\macro_inst|trig_ctrl_inst|Selector2~1_combout ),
  39397. .B(\macro_inst|trig_ctrl_inst|Selector0~7_combout ),
  39398. .C(vcc),
  39399. .D(\macro_inst|trig_ctrl_inst|Selector0~6_combout ),
  39400. .Cin(),
  39401. .Qin(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  39402. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ),
  39403. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  39404. .SyncReset(),
  39405. .ShiftData(),
  39406. .SyncLoad(),
  39407. .LutOut(\macro_inst|trig_ctrl_inst|Selector2~2_combout ),
  39408. .Cout(),
  39409. .Q(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ));
  39410. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .coord_x = 18;
  39411. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .coord_y = 6;
  39412. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .coord_z = 12;
  39413. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .mask = 16'h2232;
  39414. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .modeMux = 1'b0;
  39415. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .FeedbackMux = 1'b1;
  39416. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .ShiftMux = 1'b0;
  39417. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .BypassEn = 1'b0;
  39418. defparam \macro_inst|trig_ctrl_inst|curr_state.SAMPLING .CarryEnb = 1'b1;
  39419. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[0] (
  39420. .A(vcc),
  39421. .B(vcc),
  39422. .C(\macro_inst|trig_ctrl_inst|WideOr8~0_combout ),
  39423. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39424. .Cin(),
  39425. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [0]),
  39426. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39427. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39428. .SyncReset(),
  39429. .ShiftData(),
  39430. .SyncLoad(),
  39431. .LutOut(\macro_inst|trig_ctrl_inst|WideOr8~1_combout ),
  39432. .Cout(),
  39433. .Q(\macro_inst|trig_ctrl_inst|decim_factor [0]));
  39434. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .coord_x = 17;
  39435. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .coord_y = 8;
  39436. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .coord_z = 5;
  39437. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .mask = 16'h00F0;
  39438. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .modeMux = 1'b0;
  39439. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .FeedbackMux = 1'b0;
  39440. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .ShiftMux = 1'b0;
  39441. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .BypassEn = 1'b0;
  39442. defparam \macro_inst|trig_ctrl_inst|decim_factor[0] .CarryEnb = 1'b1;
  39443. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[10] (
  39444. .A(vcc),
  39445. .B(vcc),
  39446. .C(\macro_inst|trig_ctrl_inst|WideOr0~0_combout ),
  39447. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39448. .Cin(),
  39449. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [10]),
  39450. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39451. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39452. .SyncReset(),
  39453. .ShiftData(),
  39454. .SyncLoad(),
  39455. .LutOut(\macro_inst|trig_ctrl_inst|WideOr0~1_combout ),
  39456. .Cout(),
  39457. .Q(\macro_inst|trig_ctrl_inst|decim_factor [10]));
  39458. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .coord_x = 17;
  39459. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .coord_y = 7;
  39460. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .coord_z = 10;
  39461. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .mask = 16'h00F0;
  39462. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .modeMux = 1'b0;
  39463. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .FeedbackMux = 1'b0;
  39464. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .ShiftMux = 1'b0;
  39465. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .BypassEn = 1'b0;
  39466. defparam \macro_inst|trig_ctrl_inst|decim_factor[10] .CarryEnb = 1'b1;
  39467. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[11] (
  39468. .A(vcc),
  39469. .B(\macro_inst|trig_ctrl_inst|decim_factor [11]),
  39470. .C(\macro_inst|trig_ctrl_inst|Decoder1~0_combout ),
  39471. .D(vcc),
  39472. .Cin(\macro_inst|trig_ctrl_inst|Add0~21 ),
  39473. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [11]),
  39474. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39475. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39476. .SyncReset(SyncReset_X62_Y3_GND),
  39477. .ShiftData(),
  39478. .SyncLoad(SyncLoad_X62_Y3_VCC),
  39479. .LutOut(\macro_inst|trig_ctrl_inst|Add0~22_combout ),
  39480. .Cout(\macro_inst|trig_ctrl_inst|Add0~23 ),
  39481. .Q(\macro_inst|trig_ctrl_inst|decim_factor [11]));
  39482. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .coord_x = 17;
  39483. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .coord_y = 7;
  39484. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .coord_z = 3;
  39485. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .mask = 16'hC303;
  39486. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .modeMux = 1'b1;
  39487. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .FeedbackMux = 1'b0;
  39488. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .ShiftMux = 1'b0;
  39489. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .BypassEn = 1'b1;
  39490. defparam \macro_inst|trig_ctrl_inst|decim_factor[11] .CarryEnb = 1'b0;
  39491. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[13] (
  39492. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  39493. .B(vcc),
  39494. .C(vcc),
  39495. .D(\macro_inst|trig_ctrl_inst|Decoder0~1_combout ),
  39496. .Cin(),
  39497. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [13]),
  39498. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39499. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39500. .SyncReset(),
  39501. .ShiftData(),
  39502. .SyncLoad(),
  39503. .LutOut(\macro_inst|trig_ctrl_inst|Decoder0~2_combout ),
  39504. .Cout(),
  39505. .Q(\macro_inst|trig_ctrl_inst|decim_factor [13]));
  39506. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .coord_x = 17;
  39507. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .coord_y = 7;
  39508. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .coord_z = 15;
  39509. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .mask = 16'h5500;
  39510. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .modeMux = 1'b0;
  39511. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .FeedbackMux = 1'b0;
  39512. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .ShiftMux = 1'b0;
  39513. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .BypassEn = 1'b0;
  39514. defparam \macro_inst|trig_ctrl_inst|decim_factor[13] .CarryEnb = 1'b1;
  39515. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[14] (
  39516. .A(vcc),
  39517. .B(vcc),
  39518. .C(\macro_inst|trig_ctrl_inst|Decoder1~0_combout ),
  39519. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  39520. .Cin(),
  39521. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [14]),
  39522. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39523. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39524. .SyncReset(),
  39525. .ShiftData(),
  39526. .SyncLoad(),
  39527. .LutOut(\macro_inst|trig_ctrl_inst|Decoder0~0_combout ),
  39528. .Cout(),
  39529. .Q(\macro_inst|trig_ctrl_inst|decim_factor [14]));
  39530. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .coord_x = 17;
  39531. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .coord_y = 7;
  39532. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .coord_z = 11;
  39533. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .mask = 16'hF000;
  39534. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .modeMux = 1'b0;
  39535. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .FeedbackMux = 1'b0;
  39536. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .ShiftMux = 1'b0;
  39537. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .BypassEn = 1'b0;
  39538. defparam \macro_inst|trig_ctrl_inst|decim_factor[14] .CarryEnb = 1'b1;
  39539. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[1] (
  39540. .A(vcc),
  39541. .B(vcc),
  39542. .C(\macro_inst|trig_ctrl_inst|decim_factor~1_combout ),
  39543. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39544. .Cin(),
  39545. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [1]),
  39546. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39547. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39548. .SyncReset(),
  39549. .ShiftData(),
  39550. .SyncLoad(),
  39551. .LutOut(\macro_inst|trig_ctrl_inst|decim_factor~2_combout ),
  39552. .Cout(),
  39553. .Q(\macro_inst|trig_ctrl_inst|decim_factor [1]));
  39554. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .coord_x = 17;
  39555. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .coord_y = 8;
  39556. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .coord_z = 6;
  39557. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .mask = 16'h00F0;
  39558. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .modeMux = 1'b0;
  39559. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .FeedbackMux = 1'b0;
  39560. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .ShiftMux = 1'b0;
  39561. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .BypassEn = 1'b0;
  39562. defparam \macro_inst|trig_ctrl_inst|decim_factor[1] .CarryEnb = 1'b1;
  39563. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[2] (
  39564. .A(vcc),
  39565. .B(vcc),
  39566. .C(\macro_inst|trig_ctrl_inst|WideOr7~0_combout ),
  39567. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39568. .Cin(),
  39569. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [2]),
  39570. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39571. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39572. .SyncReset(),
  39573. .ShiftData(),
  39574. .SyncLoad(),
  39575. .LutOut(\macro_inst|trig_ctrl_inst|WideOr7~1_combout ),
  39576. .Cout(),
  39577. .Q(\macro_inst|trig_ctrl_inst|decim_factor [2]));
  39578. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .coord_x = 17;
  39579. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .coord_y = 8;
  39580. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .coord_z = 7;
  39581. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .mask = 16'h00F0;
  39582. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .modeMux = 1'b0;
  39583. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .FeedbackMux = 1'b0;
  39584. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .ShiftMux = 1'b0;
  39585. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .BypassEn = 1'b0;
  39586. defparam \macro_inst|trig_ctrl_inst|decim_factor[2] .CarryEnb = 1'b1;
  39587. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[3] (
  39588. .A(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  39589. .B(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39590. .C(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  39591. .D(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  39592. .Cin(),
  39593. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [3]),
  39594. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39595. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39596. .SyncReset(),
  39597. .ShiftData(),
  39598. .SyncLoad(),
  39599. .LutOut(\macro_inst|trig_ctrl_inst|decim_factor~0_combout ),
  39600. .Cout(),
  39601. .Q(\macro_inst|trig_ctrl_inst|decim_factor [3]));
  39602. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .coord_x = 17;
  39603. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .coord_y = 8;
  39604. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .coord_z = 4;
  39605. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .mask = 16'h1020;
  39606. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .modeMux = 1'b0;
  39607. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .FeedbackMux = 1'b0;
  39608. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .ShiftMux = 1'b0;
  39609. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .BypassEn = 1'b0;
  39610. defparam \macro_inst|trig_ctrl_inst|decim_factor[3] .CarryEnb = 1'b1;
  39611. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[4] (
  39612. .A(vcc),
  39613. .B(vcc),
  39614. .C(\macro_inst|trig_ctrl_inst|WideOr6~0_combout ),
  39615. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39616. .Cin(),
  39617. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [4]),
  39618. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39619. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39620. .SyncReset(),
  39621. .ShiftData(),
  39622. .SyncLoad(),
  39623. .LutOut(\macro_inst|trig_ctrl_inst|WideOr6~1_combout ),
  39624. .Cout(),
  39625. .Q(\macro_inst|trig_ctrl_inst|decim_factor [4]));
  39626. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .coord_x = 17;
  39627. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .coord_y = 8;
  39628. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .coord_z = 1;
  39629. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .mask = 16'h00F0;
  39630. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .modeMux = 1'b0;
  39631. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .FeedbackMux = 1'b0;
  39632. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .ShiftMux = 1'b0;
  39633. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .BypassEn = 1'b0;
  39634. defparam \macro_inst|trig_ctrl_inst|decim_factor[4] .CarryEnb = 1'b1;
  39635. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[5] (
  39636. .A(vcc),
  39637. .B(vcc),
  39638. .C(\macro_inst|trig_ctrl_inst|WideOr5~0_combout ),
  39639. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39640. .Cin(),
  39641. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [5]),
  39642. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39643. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39644. .SyncReset(),
  39645. .ShiftData(),
  39646. .SyncLoad(),
  39647. .LutOut(\macro_inst|trig_ctrl_inst|WideOr5~1_combout ),
  39648. .Cout(),
  39649. .Q(\macro_inst|trig_ctrl_inst|decim_factor [5]));
  39650. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .coord_x = 17;
  39651. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .coord_y = 8;
  39652. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .coord_z = 2;
  39653. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .mask = 16'h00F0;
  39654. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .modeMux = 1'b0;
  39655. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .FeedbackMux = 1'b0;
  39656. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .ShiftMux = 1'b0;
  39657. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .BypassEn = 1'b0;
  39658. defparam \macro_inst|trig_ctrl_inst|decim_factor[5] .CarryEnb = 1'b1;
  39659. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[6] (
  39660. .A(vcc),
  39661. .B(vcc),
  39662. .C(\macro_inst|trig_ctrl_inst|WideOr4~0_combout ),
  39663. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39664. .Cin(),
  39665. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [6]),
  39666. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39667. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39668. .SyncReset(),
  39669. .ShiftData(),
  39670. .SyncLoad(),
  39671. .LutOut(\macro_inst|trig_ctrl_inst|WideOr4~1_combout ),
  39672. .Cout(),
  39673. .Q(\macro_inst|trig_ctrl_inst|decim_factor [6]));
  39674. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .coord_x = 17;
  39675. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .coord_y = 8;
  39676. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .coord_z = 0;
  39677. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .mask = 16'h00F0;
  39678. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .modeMux = 1'b0;
  39679. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .FeedbackMux = 1'b0;
  39680. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .ShiftMux = 1'b0;
  39681. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .BypassEn = 1'b0;
  39682. defparam \macro_inst|trig_ctrl_inst|decim_factor[6] .CarryEnb = 1'b1;
  39683. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[7] (
  39684. .A(vcc),
  39685. .B(vcc),
  39686. .C(\macro_inst|trig_ctrl_inst|WideOr3~0_combout ),
  39687. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39688. .Cin(),
  39689. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [7]),
  39690. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y4_SIG_VCC ),
  39691. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  39692. .SyncReset(),
  39693. .ShiftData(),
  39694. .SyncLoad(),
  39695. .LutOut(\macro_inst|trig_ctrl_inst|WideOr3~1_combout ),
  39696. .Cout(),
  39697. .Q(\macro_inst|trig_ctrl_inst|decim_factor [7]));
  39698. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .coord_x = 17;
  39699. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .coord_y = 8;
  39700. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .coord_z = 3;
  39701. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .mask = 16'h00F0;
  39702. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .modeMux = 1'b0;
  39703. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .FeedbackMux = 1'b0;
  39704. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .ShiftMux = 1'b0;
  39705. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .BypassEn = 1'b0;
  39706. defparam \macro_inst|trig_ctrl_inst|decim_factor[7] .CarryEnb = 1'b1;
  39707. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[8] (
  39708. .A(vcc),
  39709. .B(\macro_inst|trig_ctrl_inst|WideOr2~0_combout ),
  39710. .C(vcc),
  39711. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39712. .Cin(),
  39713. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [8]),
  39714. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39715. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39716. .SyncReset(),
  39717. .ShiftData(),
  39718. .SyncLoad(),
  39719. .LutOut(\macro_inst|trig_ctrl_inst|WideOr2~1_combout ),
  39720. .Cout(),
  39721. .Q(\macro_inst|trig_ctrl_inst|decim_factor [8]));
  39722. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .coord_x = 17;
  39723. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .coord_y = 7;
  39724. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .coord_z = 13;
  39725. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .mask = 16'h00CC;
  39726. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .modeMux = 1'b0;
  39727. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .FeedbackMux = 1'b0;
  39728. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .ShiftMux = 1'b0;
  39729. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .BypassEn = 1'b0;
  39730. defparam \macro_inst|trig_ctrl_inst|decim_factor[8] .CarryEnb = 1'b1;
  39731. alta_slice \macro_inst|trig_ctrl_inst|decim_factor[9] (
  39732. .A(vcc),
  39733. .B(vcc),
  39734. .C(\macro_inst|trig_ctrl_inst|WideOr1~0_combout ),
  39735. .D(\macro_inst|cfg_reg_inst|trig_time_slot [4]),
  39736. .Cin(),
  39737. .Qin(\macro_inst|trig_ctrl_inst|decim_factor [9]),
  39738. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X62_Y3_SIG_VCC ),
  39739. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  39740. .SyncReset(),
  39741. .ShiftData(),
  39742. .SyncLoad(),
  39743. .LutOut(\macro_inst|trig_ctrl_inst|WideOr1~1_combout ),
  39744. .Cout(),
  39745. .Q(\macro_inst|trig_ctrl_inst|decim_factor [9]));
  39746. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .coord_x = 17;
  39747. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .coord_y = 7;
  39748. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .coord_z = 14;
  39749. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .mask = 16'h00F0;
  39750. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .modeMux = 1'b0;
  39751. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .FeedbackMux = 1'b0;
  39752. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .ShiftMux = 1'b0;
  39753. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .BypassEn = 1'b0;
  39754. defparam \macro_inst|trig_ctrl_inst|decim_factor[9] .CarryEnb = 1'b1;
  39755. alta_slice \macro_inst|trig_ctrl_inst|decim_factor~1 (
  39756. .A(\macro_inst|cfg_reg_inst|trig_time_slot [0]),
  39757. .B(\macro_inst|cfg_reg_inst|trig_time_slot [3]),
  39758. .C(\macro_inst|cfg_reg_inst|trig_time_slot [2]),
  39759. .D(\macro_inst|cfg_reg_inst|trig_time_slot [1]),
  39760. .Cin(),
  39761. .Qin(),
  39762. .Clk(),
  39763. .AsyncReset(),
  39764. .SyncReset(),
  39765. .ShiftData(),
  39766. .SyncLoad(),
  39767. .LutOut(\macro_inst|trig_ctrl_inst|decim_factor~1_combout ),
  39768. .Cout(),
  39769. .Q());
  39770. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .coord_x = 18;
  39771. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .coord_y = 5;
  39772. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .coord_z = 5;
  39773. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .mask = 16'h0220;
  39774. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .modeMux = 1'b0;
  39775. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .FeedbackMux = 1'b0;
  39776. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .ShiftMux = 1'b0;
  39777. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .BypassEn = 1'b0;
  39778. defparam \macro_inst|trig_ctrl_inst|decim_factor~1 .CarryEnb = 1'b1;
  39779. alta_slice \macro_inst|trig_ctrl_inst|edge_trigger~0 (
  39780. .A(vcc),
  39781. .B(\macro_inst|trig_ctrl_inst|LessThan3~22_combout ),
  39782. .C(\macro_inst|cfg_reg_inst|trig_edge [0]),
  39783. .D(\macro_inst|trig_ctrl_inst|LessThan2~22_combout ),
  39784. .Cin(),
  39785. .Qin(),
  39786. .Clk(),
  39787. .AsyncReset(),
  39788. .SyncReset(),
  39789. .ShiftData(),
  39790. .SyncLoad(),
  39791. .LutOut(\macro_inst|trig_ctrl_inst|edge_trigger~0_combout ),
  39792. .Cout(),
  39793. .Q());
  39794. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .coord_x = 19;
  39795. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .coord_y = 8;
  39796. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .coord_z = 2;
  39797. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .mask = 16'h0300;
  39798. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .modeMux = 1'b0;
  39799. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .FeedbackMux = 1'b0;
  39800. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .ShiftMux = 1'b0;
  39801. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .BypassEn = 1'b0;
  39802. defparam \macro_inst|trig_ctrl_inst|edge_trigger~0 .CarryEnb = 1'b1;
  39803. alta_slice \macro_inst|trig_ctrl_inst|edge_trigger~2 (
  39804. .A(\macro_inst|trig_ctrl_inst|always4~0_combout ),
  39805. .B(\macro_inst|trig_ctrl_inst|LessThan1~2_combout ),
  39806. .C(\macro_inst|trig_ctrl_inst|edge_trigger~0_combout ),
  39807. .D(\macro_inst|trig_ctrl_inst|edge_trigger~1_combout ),
  39808. .Cin(),
  39809. .Qin(),
  39810. .Clk(),
  39811. .AsyncReset(),
  39812. .SyncReset(),
  39813. .ShiftData(),
  39814. .SyncLoad(),
  39815. .LutOut(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  39816. .Cout(),
  39817. .Q());
  39818. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .coord_x = 19;
  39819. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .coord_y = 8;
  39820. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .coord_z = 15;
  39821. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .mask = 16'h1110;
  39822. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .modeMux = 1'b0;
  39823. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .FeedbackMux = 1'b0;
  39824. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .ShiftMux = 1'b0;
  39825. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .BypassEn = 1'b0;
  39826. defparam \macro_inst|trig_ctrl_inst|edge_trigger~2 .CarryEnb = 1'b1;
  39827. alta_slice \macro_inst|trig_ctrl_inst|edge_trigger~3 (
  39828. .A(vcc),
  39829. .B(vcc),
  39830. .C(\macro_inst|trig_ctrl_inst|LessThan2~22_combout ),
  39831. .D(\macro_inst|trig_ctrl_inst|LessThan3~22_combout ),
  39832. .Cin(),
  39833. .Qin(),
  39834. .Clk(),
  39835. .AsyncReset(),
  39836. .SyncReset(),
  39837. .ShiftData(),
  39838. .SyncLoad(),
  39839. .LutOut(\macro_inst|trig_ctrl_inst|edge_trigger~3_combout ),
  39840. .Cout(),
  39841. .Q());
  39842. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .coord_x = 20;
  39843. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .coord_y = 4;
  39844. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .coord_z = 2;
  39845. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .mask = 16'h00F0;
  39846. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .modeMux = 1'b0;
  39847. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .FeedbackMux = 1'b0;
  39848. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .ShiftMux = 1'b0;
  39849. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .BypassEn = 1'b0;
  39850. defparam \macro_inst|trig_ctrl_inst|edge_trigger~3 .CarryEnb = 1'b1;
  39851. alta_slice \macro_inst|trig_ctrl_inst|edge_trigger~4 (
  39852. .A(vcc),
  39853. .B(\macro_inst|trig_ctrl_inst|LessThan5~22_combout ),
  39854. .C(vcc),
  39855. .D(\macro_inst|trig_ctrl_inst|LessThan4~22_combout ),
  39856. .Cin(),
  39857. .Qin(),
  39858. .Clk(),
  39859. .AsyncReset(),
  39860. .SyncReset(),
  39861. .ShiftData(),
  39862. .SyncLoad(),
  39863. .LutOut(\macro_inst|trig_ctrl_inst|edge_trigger~4_combout ),
  39864. .Cout(),
  39865. .Q());
  39866. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .coord_x = 20;
  39867. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .coord_y = 6;
  39868. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .coord_z = 10;
  39869. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .mask = 16'h3300;
  39870. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .modeMux = 1'b0;
  39871. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .FeedbackMux = 1'b0;
  39872. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .ShiftMux = 1'b0;
  39873. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .BypassEn = 1'b0;
  39874. defparam \macro_inst|trig_ctrl_inst|edge_trigger~4 .CarryEnb = 1'b1;
  39875. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[0] (
  39876. .A(vcc),
  39877. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [0]),
  39878. .C(vcc),
  39879. .D(vcc),
  39880. .Cin(),
  39881. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [0]),
  39882. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  39883. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  39884. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  39885. .ShiftData(),
  39886. .SyncLoad(SyncLoad_X59_Y3_GND),
  39887. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[0]~18_combout ),
  39888. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[0]~19 ),
  39889. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [0]));
  39890. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .coord_x = 15;
  39891. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .coord_y = 7;
  39892. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .coord_z = 0;
  39893. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .mask = 16'h33CC;
  39894. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .modeMux = 1'b0;
  39895. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .FeedbackMux = 1'b0;
  39896. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .ShiftMux = 1'b0;
  39897. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .BypassEn = 1'b1;
  39898. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[0] .CarryEnb = 1'b0;
  39899. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[10] (
  39900. .A(vcc),
  39901. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [10]),
  39902. .C(vcc),
  39903. .D(vcc),
  39904. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[9]~37 ),
  39905. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [10]),
  39906. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  39907. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  39908. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  39909. .ShiftData(),
  39910. .SyncLoad(SyncLoad_X59_Y3_GND),
  39911. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[10]~38_combout ),
  39912. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[10]~39 ),
  39913. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [10]));
  39914. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .coord_x = 15;
  39915. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .coord_y = 7;
  39916. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .coord_z = 10;
  39917. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .mask = 16'hC30C;
  39918. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .modeMux = 1'b1;
  39919. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .FeedbackMux = 1'b0;
  39920. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .ShiftMux = 1'b0;
  39921. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .BypassEn = 1'b1;
  39922. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[10] .CarryEnb = 1'b0;
  39923. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[11] (
  39924. .A(vcc),
  39925. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [11]),
  39926. .C(vcc),
  39927. .D(vcc),
  39928. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[10]~39 ),
  39929. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [11]),
  39930. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  39931. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  39932. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  39933. .ShiftData(),
  39934. .SyncLoad(SyncLoad_X59_Y3_GND),
  39935. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[11]~40_combout ),
  39936. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[11]~41 ),
  39937. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [11]));
  39938. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .coord_x = 15;
  39939. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .coord_y = 7;
  39940. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .coord_z = 11;
  39941. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .mask = 16'h3C3F;
  39942. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .modeMux = 1'b1;
  39943. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .FeedbackMux = 1'b0;
  39944. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .ShiftMux = 1'b0;
  39945. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .BypassEn = 1'b1;
  39946. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[11] .CarryEnb = 1'b0;
  39947. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[12] (
  39948. .A(vcc),
  39949. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [12]),
  39950. .C(vcc),
  39951. .D(vcc),
  39952. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[11]~41 ),
  39953. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [12]),
  39954. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  39955. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  39956. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  39957. .ShiftData(),
  39958. .SyncLoad(SyncLoad_X59_Y3_GND),
  39959. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[12]~42_combout ),
  39960. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[12]~43 ),
  39961. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [12]));
  39962. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .coord_x = 15;
  39963. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .coord_y = 7;
  39964. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .coord_z = 12;
  39965. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .mask = 16'hC30C;
  39966. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .modeMux = 1'b1;
  39967. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .FeedbackMux = 1'b0;
  39968. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .ShiftMux = 1'b0;
  39969. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .BypassEn = 1'b1;
  39970. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[12] .CarryEnb = 1'b0;
  39971. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[13] (
  39972. .A(vcc),
  39973. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [13]),
  39974. .C(vcc),
  39975. .D(vcc),
  39976. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[12]~43 ),
  39977. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [13]),
  39978. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  39979. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  39980. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  39981. .ShiftData(),
  39982. .SyncLoad(SyncLoad_X59_Y3_GND),
  39983. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[13]~44_combout ),
  39984. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[13]~45 ),
  39985. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [13]));
  39986. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .coord_x = 15;
  39987. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .coord_y = 7;
  39988. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .coord_z = 13;
  39989. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .mask = 16'h3C3F;
  39990. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .modeMux = 1'b1;
  39991. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .FeedbackMux = 1'b0;
  39992. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .ShiftMux = 1'b0;
  39993. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .BypassEn = 1'b1;
  39994. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[13] .CarryEnb = 1'b0;
  39995. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[14] (
  39996. .A(vcc),
  39997. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [14]),
  39998. .C(vcc),
  39999. .D(vcc),
  40000. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[13]~45 ),
  40001. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [14]),
  40002. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40003. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40004. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40005. .ShiftData(),
  40006. .SyncLoad(SyncLoad_X59_Y3_GND),
  40007. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[14]~46_combout ),
  40008. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[14]~47 ),
  40009. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [14]));
  40010. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .coord_x = 15;
  40011. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .coord_y = 7;
  40012. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .coord_z = 14;
  40013. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .mask = 16'hC30C;
  40014. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .modeMux = 1'b1;
  40015. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .FeedbackMux = 1'b0;
  40016. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .ShiftMux = 1'b0;
  40017. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .BypassEn = 1'b1;
  40018. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[14] .CarryEnb = 1'b0;
  40019. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[15] (
  40020. .A(vcc),
  40021. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [15]),
  40022. .C(vcc),
  40023. .D(vcc),
  40024. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[14]~47 ),
  40025. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [15]),
  40026. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40027. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40028. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40029. .ShiftData(),
  40030. .SyncLoad(SyncLoad_X59_Y3_GND),
  40031. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[15]~48_combout ),
  40032. .Cout(),
  40033. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [15]));
  40034. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .coord_x = 15;
  40035. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .coord_y = 7;
  40036. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .coord_z = 15;
  40037. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .mask = 16'h3C3C;
  40038. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .modeMux = 1'b1;
  40039. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .FeedbackMux = 1'b0;
  40040. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .ShiftMux = 1'b0;
  40041. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .BypassEn = 1'b1;
  40042. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[15] .CarryEnb = 1'b1;
  40043. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[1] (
  40044. .A(vcc),
  40045. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [1]),
  40046. .C(vcc),
  40047. .D(vcc),
  40048. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[0]~19 ),
  40049. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [1]),
  40050. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40051. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40052. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40053. .ShiftData(),
  40054. .SyncLoad(SyncLoad_X59_Y3_GND),
  40055. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[1]~20_combout ),
  40056. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[1]~21 ),
  40057. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [1]));
  40058. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .coord_x = 15;
  40059. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .coord_y = 7;
  40060. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .coord_z = 1;
  40061. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .mask = 16'h3C3F;
  40062. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .modeMux = 1'b1;
  40063. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .FeedbackMux = 1'b0;
  40064. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .ShiftMux = 1'b0;
  40065. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .BypassEn = 1'b1;
  40066. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[1] .CarryEnb = 1'b0;
  40067. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[2] (
  40068. .A(vcc),
  40069. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [2]),
  40070. .C(vcc),
  40071. .D(vcc),
  40072. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[1]~21 ),
  40073. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [2]),
  40074. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40075. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40076. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40077. .ShiftData(),
  40078. .SyncLoad(SyncLoad_X59_Y3_GND),
  40079. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[2]~22_combout ),
  40080. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[2]~23 ),
  40081. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [2]));
  40082. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .coord_x = 15;
  40083. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .coord_y = 7;
  40084. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .coord_z = 2;
  40085. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .mask = 16'hC30C;
  40086. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .modeMux = 1'b1;
  40087. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .FeedbackMux = 1'b0;
  40088. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .ShiftMux = 1'b0;
  40089. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .BypassEn = 1'b1;
  40090. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[2] .CarryEnb = 1'b0;
  40091. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[3] (
  40092. .A(vcc),
  40093. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [3]),
  40094. .C(vcc),
  40095. .D(vcc),
  40096. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[2]~23 ),
  40097. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [3]),
  40098. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40099. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40100. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40101. .ShiftData(),
  40102. .SyncLoad(SyncLoad_X59_Y3_GND),
  40103. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[3]~24_combout ),
  40104. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[3]~25 ),
  40105. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [3]));
  40106. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .coord_x = 15;
  40107. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .coord_y = 7;
  40108. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .coord_z = 3;
  40109. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .mask = 16'h3C3F;
  40110. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .modeMux = 1'b1;
  40111. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .FeedbackMux = 1'b0;
  40112. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .ShiftMux = 1'b0;
  40113. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .BypassEn = 1'b1;
  40114. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[3] .CarryEnb = 1'b0;
  40115. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[4] (
  40116. .A(vcc),
  40117. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [4]),
  40118. .C(vcc),
  40119. .D(vcc),
  40120. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[3]~25 ),
  40121. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [4]),
  40122. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40123. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40124. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40125. .ShiftData(),
  40126. .SyncLoad(SyncLoad_X59_Y3_GND),
  40127. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[4]~26_combout ),
  40128. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[4]~27 ),
  40129. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [4]));
  40130. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .coord_x = 15;
  40131. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .coord_y = 7;
  40132. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .coord_z = 4;
  40133. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .mask = 16'hC30C;
  40134. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .modeMux = 1'b1;
  40135. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .FeedbackMux = 1'b0;
  40136. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .ShiftMux = 1'b0;
  40137. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .BypassEn = 1'b1;
  40138. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[4] .CarryEnb = 1'b0;
  40139. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[5] (
  40140. .A(vcc),
  40141. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [5]),
  40142. .C(vcc),
  40143. .D(vcc),
  40144. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[4]~27 ),
  40145. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [5]),
  40146. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40147. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40148. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40149. .ShiftData(),
  40150. .SyncLoad(SyncLoad_X59_Y3_GND),
  40151. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[5]~28_combout ),
  40152. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[5]~29 ),
  40153. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [5]));
  40154. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .coord_x = 15;
  40155. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .coord_y = 7;
  40156. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .coord_z = 5;
  40157. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .mask = 16'h3C3F;
  40158. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .modeMux = 1'b1;
  40159. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .FeedbackMux = 1'b0;
  40160. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .ShiftMux = 1'b0;
  40161. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .BypassEn = 1'b1;
  40162. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[5] .CarryEnb = 1'b0;
  40163. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[6] (
  40164. .A(vcc),
  40165. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [6]),
  40166. .C(vcc),
  40167. .D(vcc),
  40168. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[5]~29 ),
  40169. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [6]),
  40170. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40171. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40172. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40173. .ShiftData(),
  40174. .SyncLoad(SyncLoad_X59_Y3_GND),
  40175. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[6]~30_combout ),
  40176. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[6]~31 ),
  40177. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [6]));
  40178. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .coord_x = 15;
  40179. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .coord_y = 7;
  40180. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .coord_z = 6;
  40181. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .mask = 16'hC30C;
  40182. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .modeMux = 1'b1;
  40183. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .FeedbackMux = 1'b0;
  40184. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .ShiftMux = 1'b0;
  40185. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .BypassEn = 1'b1;
  40186. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[6] .CarryEnb = 1'b0;
  40187. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[7] (
  40188. .A(vcc),
  40189. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [7]),
  40190. .C(vcc),
  40191. .D(vcc),
  40192. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[6]~31 ),
  40193. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [7]),
  40194. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40195. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40196. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40197. .ShiftData(),
  40198. .SyncLoad(SyncLoad_X59_Y3_GND),
  40199. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[7]~32_combout ),
  40200. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[7]~33 ),
  40201. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [7]));
  40202. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .coord_x = 15;
  40203. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .coord_y = 7;
  40204. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .coord_z = 7;
  40205. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .mask = 16'h3C3F;
  40206. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .modeMux = 1'b1;
  40207. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .FeedbackMux = 1'b0;
  40208. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .ShiftMux = 1'b0;
  40209. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .BypassEn = 1'b1;
  40210. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[7] .CarryEnb = 1'b0;
  40211. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[8] (
  40212. .A(vcc),
  40213. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [8]),
  40214. .C(vcc),
  40215. .D(vcc),
  40216. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[7]~33 ),
  40217. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [8]),
  40218. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40219. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40220. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40221. .ShiftData(),
  40222. .SyncLoad(SyncLoad_X59_Y3_GND),
  40223. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~34_combout ),
  40224. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~35 ),
  40225. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [8]));
  40226. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .coord_x = 15;
  40227. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .coord_y = 7;
  40228. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .coord_z = 8;
  40229. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .mask = 16'hC30C;
  40230. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .modeMux = 1'b1;
  40231. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .FeedbackMux = 1'b0;
  40232. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .ShiftMux = 1'b0;
  40233. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .BypassEn = 1'b1;
  40234. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8] .CarryEnb = 1'b0;
  40235. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 (
  40236. .A(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  40237. .B(\macro_inst|trig_ctrl_inst|always1~1_combout ),
  40238. .C(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  40239. .D(\macro_inst|trig_ctrl_inst|adc_eoc_sync2~q ),
  40240. .Cin(),
  40241. .Qin(),
  40242. .Clk(),
  40243. .AsyncReset(),
  40244. .SyncReset(),
  40245. .ShiftData(),
  40246. .SyncLoad(),
  40247. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout ),
  40248. .Cout(),
  40249. .Q());
  40250. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .coord_x = 18;
  40251. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .coord_y = 6;
  40252. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .coord_z = 2;
  40253. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .mask = 16'hF0F2;
  40254. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .modeMux = 1'b0;
  40255. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .FeedbackMux = 1'b0;
  40256. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .ShiftMux = 1'b0;
  40257. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .BypassEn = 1'b0;
  40258. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~50 .CarryEnb = 1'b1;
  40259. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 (
  40260. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  40261. .B(\macro_inst|trig_ctrl_inst|Add0~32_combout ),
  40262. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  40263. .D(\macro_inst|trig_ctrl_inst|LessThan0~30_combout ),
  40264. .Cin(),
  40265. .Qin(),
  40266. .Clk(),
  40267. .AsyncReset(),
  40268. .SyncReset(),
  40269. .ShiftData(),
  40270. .SyncLoad(),
  40271. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout ),
  40272. .Cout(),
  40273. .Q());
  40274. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .coord_x = 18;
  40275. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .coord_y = 6;
  40276. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .coord_z = 13;
  40277. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .mask = 16'h0ACE;
  40278. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .modeMux = 1'b0;
  40279. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .FeedbackMux = 1'b0;
  40280. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .ShiftMux = 1'b0;
  40281. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .BypassEn = 1'b0;
  40282. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[8]~51 .CarryEnb = 1'b1;
  40283. alta_slice \macro_inst|trig_ctrl_inst|eoc_cnt[9] (
  40284. .A(vcc),
  40285. .B(\macro_inst|trig_ctrl_inst|eoc_cnt [9]),
  40286. .C(vcc),
  40287. .D(vcc),
  40288. .Cin(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~35 ),
  40289. .Qin(\macro_inst|trig_ctrl_inst|eoc_cnt [9]),
  40290. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|eoc_cnt[8]~50_combout_X59_Y3_SIG_SIG ),
  40291. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  40292. .SyncReset(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ),
  40293. .ShiftData(),
  40294. .SyncLoad(SyncLoad_X59_Y3_GND),
  40295. .LutOut(\macro_inst|trig_ctrl_inst|eoc_cnt[9]~36_combout ),
  40296. .Cout(\macro_inst|trig_ctrl_inst|eoc_cnt[9]~37 ),
  40297. .Q(\macro_inst|trig_ctrl_inst|eoc_cnt [9]));
  40298. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .coord_x = 15;
  40299. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .coord_y = 7;
  40300. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .coord_z = 9;
  40301. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .mask = 16'h3C3F;
  40302. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .modeMux = 1'b1;
  40303. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .FeedbackMux = 1'b0;
  40304. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .ShiftMux = 1'b0;
  40305. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .BypassEn = 1'b1;
  40306. defparam \macro_inst|trig_ctrl_inst|eoc_cnt[9] .CarryEnb = 1'b0;
  40307. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] (
  40308. .A(vcc),
  40309. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [0]),
  40310. .C(vcc),
  40311. .D(vcc),
  40312. .Cin(),
  40313. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [0]),
  40314. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40315. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40316. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40317. .ShiftData(),
  40318. .SyncLoad(SyncLoad_X59_Y5_GND),
  40319. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[0]~11_combout ),
  40320. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[0]~12 ),
  40321. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [0]));
  40322. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .coord_x = 19;
  40323. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .coord_y = 6;
  40324. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .coord_z = 0;
  40325. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .mask = 16'h33CC;
  40326. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .modeMux = 1'b0;
  40327. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .FeedbackMux = 1'b0;
  40328. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .ShiftMux = 1'b0;
  40329. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .BypassEn = 1'b1;
  40330. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[0] .CarryEnb = 1'b0;
  40331. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] (
  40332. .A(vcc),
  40333. .B(vcc),
  40334. .C(vcc),
  40335. .D(\macro_inst|trig_ctrl_inst|gap_cnt_auto [10]),
  40336. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[9]~35 ),
  40337. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [10]),
  40338. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40339. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40340. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40341. .ShiftData(),
  40342. .SyncLoad(SyncLoad_X59_Y5_GND),
  40343. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[10]~36_combout ),
  40344. .Cout(),
  40345. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [10]));
  40346. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .coord_x = 19;
  40347. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .coord_y = 6;
  40348. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .coord_z = 10;
  40349. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .mask = 16'hF00F;
  40350. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .modeMux = 1'b1;
  40351. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .FeedbackMux = 1'b0;
  40352. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .ShiftMux = 1'b0;
  40353. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .BypassEn = 1'b1;
  40354. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[10] .CarryEnb = 1'b1;
  40355. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] (
  40356. .A(vcc),
  40357. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [1]),
  40358. .C(vcc),
  40359. .D(vcc),
  40360. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[0]~12 ),
  40361. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [1]),
  40362. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40363. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40364. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40365. .ShiftData(),
  40366. .SyncLoad(SyncLoad_X59_Y5_GND),
  40367. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[1]~18_combout ),
  40368. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[1]~19 ),
  40369. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [1]));
  40370. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .coord_x = 19;
  40371. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .coord_y = 6;
  40372. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .coord_z = 1;
  40373. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .mask = 16'h3C3F;
  40374. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .modeMux = 1'b1;
  40375. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .FeedbackMux = 1'b0;
  40376. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .ShiftMux = 1'b0;
  40377. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .BypassEn = 1'b1;
  40378. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[1] .CarryEnb = 1'b0;
  40379. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] (
  40380. .A(vcc),
  40381. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [2]),
  40382. .C(vcc),
  40383. .D(vcc),
  40384. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[1]~19 ),
  40385. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [2]),
  40386. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40387. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40388. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40389. .ShiftData(),
  40390. .SyncLoad(SyncLoad_X59_Y5_GND),
  40391. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~20_combout ),
  40392. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~21 ),
  40393. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [2]));
  40394. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .coord_x = 19;
  40395. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .coord_y = 6;
  40396. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .coord_z = 2;
  40397. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .mask = 16'hC30C;
  40398. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .modeMux = 1'b1;
  40399. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .FeedbackMux = 1'b0;
  40400. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .ShiftMux = 1'b0;
  40401. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .BypassEn = 1'b1;
  40402. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2] .CarryEnb = 1'b0;
  40403. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 (
  40404. .A(\macro_inst|trig_ctrl_inst|always5~3_combout ),
  40405. .B(\macro_inst|trig_ctrl_inst|always5~2_combout ),
  40406. .C(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  40407. .D(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  40408. .Cin(),
  40409. .Qin(),
  40410. .Clk(),
  40411. .AsyncReset(),
  40412. .SyncReset(),
  40413. .ShiftData(),
  40414. .SyncLoad(),
  40415. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13_combout ),
  40416. .Cout(),
  40417. .Q());
  40418. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .coord_x = 18;
  40419. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .coord_y = 6;
  40420. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .coord_z = 14;
  40421. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .mask = 16'hF8F0;
  40422. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .modeMux = 1'b0;
  40423. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .FeedbackMux = 1'b0;
  40424. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .ShiftMux = 1'b0;
  40425. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .BypassEn = 1'b0;
  40426. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13 .CarryEnb = 1'b1;
  40427. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 (
  40428. .A(vcc),
  40429. .B(vcc),
  40430. .C(\macro_inst|trig_ctrl_inst|pulse_trigger~q ),
  40431. .D(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13_combout ),
  40432. .Cin(),
  40433. .Qin(),
  40434. .Clk(),
  40435. .AsyncReset(),
  40436. .SyncReset(),
  40437. .ShiftData(),
  40438. .SyncLoad(),
  40439. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14_combout ),
  40440. .Cout(),
  40441. .Q());
  40442. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .coord_x = 20;
  40443. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .coord_y = 7;
  40444. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .coord_z = 7;
  40445. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .mask = 16'h000F;
  40446. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .modeMux = 1'b0;
  40447. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .FeedbackMux = 1'b0;
  40448. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .ShiftMux = 1'b0;
  40449. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .BypassEn = 1'b0;
  40450. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14 .CarryEnb = 1'b1;
  40451. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 (
  40452. .A(\macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ),
  40453. .B(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  40454. .C(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~14_combout ),
  40455. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  40456. .Cin(),
  40457. .Qin(),
  40458. .Clk(),
  40459. .AsyncReset(),
  40460. .SyncReset(),
  40461. .ShiftData(),
  40462. .SyncLoad(),
  40463. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout ),
  40464. .Cout(),
  40465. .Q());
  40466. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .coord_x = 19;
  40467. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .coord_y = 6;
  40468. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .coord_z = 11;
  40469. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .mask = 16'hCF8F;
  40470. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .modeMux = 1'b0;
  40471. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .FeedbackMux = 1'b0;
  40472. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .ShiftMux = 1'b0;
  40473. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .BypassEn = 1'b0;
  40474. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15 .CarryEnb = 1'b1;
  40475. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 (
  40476. .A(\macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ),
  40477. .B(\macro_inst|trig_ctrl_inst|pulse_trigger~q ),
  40478. .C(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  40479. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  40480. .Cin(),
  40481. .Qin(),
  40482. .Clk(),
  40483. .AsyncReset(),
  40484. .SyncReset(),
  40485. .ShiftData(),
  40486. .SyncLoad(),
  40487. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16_combout ),
  40488. .Cout(),
  40489. .Q());
  40490. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .coord_x = 19;
  40491. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .coord_y = 6;
  40492. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .coord_z = 12;
  40493. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .mask = 16'hFCEC;
  40494. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .modeMux = 1'b0;
  40495. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .FeedbackMux = 1'b0;
  40496. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .ShiftMux = 1'b0;
  40497. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .BypassEn = 1'b0;
  40498. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16 .CarryEnb = 1'b1;
  40499. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 (
  40500. .A(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  40501. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~13_combout ),
  40502. .C(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~16_combout ),
  40503. .D(\macro_inst|trig_ctrl_inst|sample_valid~combout ),
  40504. .Cin(),
  40505. .Qin(),
  40506. .Clk(),
  40507. .AsyncReset(),
  40508. .SyncReset(),
  40509. .ShiftData(),
  40510. .SyncLoad(),
  40511. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout ),
  40512. .Cout(),
  40513. .Q());
  40514. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .coord_x = 19;
  40515. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .coord_y = 6;
  40516. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .coord_z = 14;
  40517. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .mask = 16'hFECC;
  40518. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .modeMux = 1'b0;
  40519. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .FeedbackMux = 1'b0;
  40520. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .ShiftMux = 1'b0;
  40521. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .BypassEn = 1'b0;
  40522. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17 .CarryEnb = 1'b1;
  40523. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] (
  40524. .A(vcc),
  40525. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [3]),
  40526. .C(vcc),
  40527. .D(vcc),
  40528. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~21 ),
  40529. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [3]),
  40530. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40531. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40532. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40533. .ShiftData(),
  40534. .SyncLoad(SyncLoad_X59_Y5_GND),
  40535. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[3]~22_combout ),
  40536. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[3]~23 ),
  40537. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [3]));
  40538. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .coord_x = 19;
  40539. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .coord_y = 6;
  40540. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .coord_z = 3;
  40541. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .mask = 16'h3C3F;
  40542. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .modeMux = 1'b1;
  40543. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .FeedbackMux = 1'b0;
  40544. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .ShiftMux = 1'b0;
  40545. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .BypassEn = 1'b1;
  40546. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[3] .CarryEnb = 1'b0;
  40547. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] (
  40548. .A(vcc),
  40549. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [4]),
  40550. .C(vcc),
  40551. .D(vcc),
  40552. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[3]~23 ),
  40553. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [4]),
  40554. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40555. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40556. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40557. .ShiftData(),
  40558. .SyncLoad(SyncLoad_X59_Y5_GND),
  40559. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[4]~24_combout ),
  40560. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[4]~25 ),
  40561. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [4]));
  40562. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .coord_x = 19;
  40563. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .coord_y = 6;
  40564. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .coord_z = 4;
  40565. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .mask = 16'hC30C;
  40566. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .modeMux = 1'b1;
  40567. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .FeedbackMux = 1'b0;
  40568. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .ShiftMux = 1'b0;
  40569. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .BypassEn = 1'b1;
  40570. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[4] .CarryEnb = 1'b0;
  40571. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] (
  40572. .A(vcc),
  40573. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [5]),
  40574. .C(vcc),
  40575. .D(vcc),
  40576. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[4]~25 ),
  40577. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [5]),
  40578. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40579. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40580. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40581. .ShiftData(),
  40582. .SyncLoad(SyncLoad_X59_Y5_GND),
  40583. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[5]~26_combout ),
  40584. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[5]~27 ),
  40585. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [5]));
  40586. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .coord_x = 19;
  40587. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .coord_y = 6;
  40588. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .coord_z = 5;
  40589. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .mask = 16'h3C3F;
  40590. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .modeMux = 1'b1;
  40591. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .FeedbackMux = 1'b0;
  40592. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .ShiftMux = 1'b0;
  40593. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .BypassEn = 1'b1;
  40594. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[5] .CarryEnb = 1'b0;
  40595. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] (
  40596. .A(vcc),
  40597. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [6]),
  40598. .C(vcc),
  40599. .D(vcc),
  40600. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[5]~27 ),
  40601. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [6]),
  40602. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40603. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40604. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40605. .ShiftData(),
  40606. .SyncLoad(SyncLoad_X59_Y5_GND),
  40607. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[6]~28_combout ),
  40608. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[6]~29 ),
  40609. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [6]));
  40610. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .coord_x = 19;
  40611. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .coord_y = 6;
  40612. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .coord_z = 6;
  40613. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .mask = 16'hC30C;
  40614. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .modeMux = 1'b1;
  40615. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .FeedbackMux = 1'b0;
  40616. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .ShiftMux = 1'b0;
  40617. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .BypassEn = 1'b1;
  40618. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[6] .CarryEnb = 1'b0;
  40619. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] (
  40620. .A(vcc),
  40621. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [7]),
  40622. .C(vcc),
  40623. .D(vcc),
  40624. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[6]~29 ),
  40625. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [7]),
  40626. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40627. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40628. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40629. .ShiftData(),
  40630. .SyncLoad(SyncLoad_X59_Y5_GND),
  40631. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[7]~30_combout ),
  40632. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[7]~31 ),
  40633. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [7]));
  40634. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .coord_x = 19;
  40635. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .coord_y = 6;
  40636. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .coord_z = 7;
  40637. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .mask = 16'h3C3F;
  40638. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .modeMux = 1'b1;
  40639. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .FeedbackMux = 1'b0;
  40640. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .ShiftMux = 1'b0;
  40641. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .BypassEn = 1'b1;
  40642. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[7] .CarryEnb = 1'b0;
  40643. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] (
  40644. .A(vcc),
  40645. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [8]),
  40646. .C(vcc),
  40647. .D(vcc),
  40648. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[7]~31 ),
  40649. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [8]),
  40650. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40651. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40652. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40653. .ShiftData(),
  40654. .SyncLoad(SyncLoad_X59_Y5_GND),
  40655. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[8]~32_combout ),
  40656. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[8]~33 ),
  40657. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [8]));
  40658. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .coord_x = 19;
  40659. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .coord_y = 6;
  40660. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .coord_z = 8;
  40661. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .mask = 16'hC30C;
  40662. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .modeMux = 1'b1;
  40663. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .FeedbackMux = 1'b0;
  40664. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .ShiftMux = 1'b0;
  40665. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .BypassEn = 1'b1;
  40666. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[8] .CarryEnb = 1'b0;
  40667. alta_slice \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] (
  40668. .A(vcc),
  40669. .B(\macro_inst|trig_ctrl_inst|gap_cnt_auto [9]),
  40670. .C(vcc),
  40671. .D(vcc),
  40672. .Cin(\macro_inst|trig_ctrl_inst|gap_cnt_auto[8]~33 ),
  40673. .Qin(\macro_inst|trig_ctrl_inst|gap_cnt_auto [9]),
  40674. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~17_combout_X59_Y5_SIG_SIG ),
  40675. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  40676. .SyncReset(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ),
  40677. .ShiftData(),
  40678. .SyncLoad(SyncLoad_X59_Y5_GND),
  40679. .LutOut(\macro_inst|trig_ctrl_inst|gap_cnt_auto[9]~34_combout ),
  40680. .Cout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[9]~35 ),
  40681. .Q(\macro_inst|trig_ctrl_inst|gap_cnt_auto [9]));
  40682. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .coord_x = 19;
  40683. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .coord_y = 6;
  40684. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .coord_z = 9;
  40685. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .mask = 16'h3C3F;
  40686. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .modeMux = 1'b1;
  40687. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .FeedbackMux = 1'b0;
  40688. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .ShiftMux = 1'b0;
  40689. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .BypassEn = 1'b1;
  40690. defparam \macro_inst|trig_ctrl_inst|gap_cnt_auto[9] .CarryEnb = 1'b0;
  40691. alta_slice \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] (
  40692. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  40693. .B(vcc),
  40694. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  40695. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  40696. .Cin(),
  40697. .Qin(\macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [9]),
  40698. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  40699. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  40700. .SyncReset(),
  40701. .ShiftData(),
  40702. .SyncLoad(),
  40703. .LutOut(\macro_inst|trig_ctrl_inst|last_trig_end_addr_edge~0_combout ),
  40704. .Cout(),
  40705. .Q(\macro_inst|trig_ctrl_inst|last_trig_end_addr_edge [9]));
  40706. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .coord_x = 20;
  40707. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .coord_y = 7;
  40708. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .coord_z = 9;
  40709. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .mask = 16'h00AF;
  40710. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .modeMux = 1'b0;
  40711. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .FeedbackMux = 1'b0;
  40712. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .ShiftMux = 1'b0;
  40713. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .BypassEn = 1'b0;
  40714. defparam \macro_inst|trig_ctrl_inst|last_trig_end_addr_edge[9] .CarryEnb = 1'b1;
  40715. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[0] (
  40716. .A(vcc),
  40717. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [0]),
  40718. .C(vcc),
  40719. .D(vcc),
  40720. .Cin(),
  40721. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [0]),
  40722. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40723. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40724. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40725. .ShiftData(),
  40726. .SyncLoad(SyncLoad_X62_Y6_GND),
  40727. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[0]~9_combout ),
  40728. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[0]~10 ),
  40729. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [0]));
  40730. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .coord_x = 17;
  40731. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .coord_y = 4;
  40732. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .coord_z = 3;
  40733. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .mask = 16'h33CC;
  40734. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .modeMux = 1'b0;
  40735. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .FeedbackMux = 1'b0;
  40736. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .ShiftMux = 1'b0;
  40737. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .BypassEn = 1'b1;
  40738. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[0] .CarryEnb = 1'b0;
  40739. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[1] (
  40740. .A(vcc),
  40741. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [1]),
  40742. .C(vcc),
  40743. .D(vcc),
  40744. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[0]~10 ),
  40745. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [1]),
  40746. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40747. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40748. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40749. .ShiftData(),
  40750. .SyncLoad(SyncLoad_X62_Y6_GND),
  40751. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[1]~12_combout ),
  40752. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[1]~13 ),
  40753. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [1]));
  40754. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .coord_x = 17;
  40755. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .coord_y = 4;
  40756. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .coord_z = 4;
  40757. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .mask = 16'h3C3F;
  40758. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .modeMux = 1'b1;
  40759. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .FeedbackMux = 1'b0;
  40760. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .ShiftMux = 1'b0;
  40761. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .BypassEn = 1'b1;
  40762. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[1] .CarryEnb = 1'b0;
  40763. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[2] (
  40764. .A(vcc),
  40765. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [2]),
  40766. .C(vcc),
  40767. .D(vcc),
  40768. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[1]~13 ),
  40769. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [2]),
  40770. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40771. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40772. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40773. .ShiftData(),
  40774. .SyncLoad(SyncLoad_X62_Y6_GND),
  40775. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[2]~14_combout ),
  40776. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[2]~15 ),
  40777. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [2]));
  40778. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .coord_x = 17;
  40779. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .coord_y = 4;
  40780. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .coord_z = 5;
  40781. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .mask = 16'hC30C;
  40782. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .modeMux = 1'b1;
  40783. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .FeedbackMux = 1'b0;
  40784. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .ShiftMux = 1'b0;
  40785. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .BypassEn = 1'b1;
  40786. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[2] .CarryEnb = 1'b0;
  40787. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[3] (
  40788. .A(vcc),
  40789. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [3]),
  40790. .C(vcc),
  40791. .D(vcc),
  40792. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[2]~15 ),
  40793. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [3]),
  40794. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40795. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40796. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40797. .ShiftData(),
  40798. .SyncLoad(SyncLoad_X62_Y6_GND),
  40799. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[3]~16_combout ),
  40800. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[3]~17 ),
  40801. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [3]));
  40802. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .coord_x = 17;
  40803. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .coord_y = 4;
  40804. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .coord_z = 6;
  40805. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .mask = 16'h3C3F;
  40806. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .modeMux = 1'b1;
  40807. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .FeedbackMux = 1'b0;
  40808. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .ShiftMux = 1'b0;
  40809. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .BypassEn = 1'b1;
  40810. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[3] .CarryEnb = 1'b0;
  40811. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[4] (
  40812. .A(vcc),
  40813. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [4]),
  40814. .C(vcc),
  40815. .D(vcc),
  40816. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[3]~17 ),
  40817. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [4]),
  40818. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40819. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40820. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40821. .ShiftData(),
  40822. .SyncLoad(SyncLoad_X62_Y6_GND),
  40823. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[4]~18_combout ),
  40824. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[4]~19 ),
  40825. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [4]));
  40826. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .coord_x = 17;
  40827. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .coord_y = 4;
  40828. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .coord_z = 7;
  40829. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .mask = 16'hC30C;
  40830. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .modeMux = 1'b1;
  40831. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .FeedbackMux = 1'b0;
  40832. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .ShiftMux = 1'b0;
  40833. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .BypassEn = 1'b1;
  40834. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[4] .CarryEnb = 1'b0;
  40835. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[5] (
  40836. .A(vcc),
  40837. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [5]),
  40838. .C(vcc),
  40839. .D(vcc),
  40840. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[4]~19 ),
  40841. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [5]),
  40842. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40843. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40844. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40845. .ShiftData(),
  40846. .SyncLoad(SyncLoad_X62_Y6_GND),
  40847. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[5]~20_combout ),
  40848. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[5]~21 ),
  40849. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [5]));
  40850. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .coord_x = 17;
  40851. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .coord_y = 4;
  40852. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .coord_z = 8;
  40853. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .mask = 16'h3C3F;
  40854. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .modeMux = 1'b1;
  40855. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .FeedbackMux = 1'b0;
  40856. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .ShiftMux = 1'b0;
  40857. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .BypassEn = 1'b1;
  40858. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[5] .CarryEnb = 1'b0;
  40859. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[6] (
  40860. .A(vcc),
  40861. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [6]),
  40862. .C(vcc),
  40863. .D(vcc),
  40864. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[5]~21 ),
  40865. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [6]),
  40866. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40867. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40868. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40869. .ShiftData(),
  40870. .SyncLoad(SyncLoad_X62_Y6_GND),
  40871. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[6]~22_combout ),
  40872. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[6]~23 ),
  40873. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [6]));
  40874. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .coord_x = 17;
  40875. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .coord_y = 4;
  40876. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .coord_z = 9;
  40877. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .mask = 16'hC30C;
  40878. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .modeMux = 1'b1;
  40879. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .FeedbackMux = 1'b0;
  40880. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .ShiftMux = 1'b0;
  40881. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .BypassEn = 1'b1;
  40882. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[6] .CarryEnb = 1'b0;
  40883. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[7] (
  40884. .A(vcc),
  40885. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [7]),
  40886. .C(vcc),
  40887. .D(vcc),
  40888. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[6]~23 ),
  40889. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [7]),
  40890. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40891. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40892. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40893. .ShiftData(),
  40894. .SyncLoad(SyncLoad_X62_Y6_GND),
  40895. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[7]~24_combout ),
  40896. .Cout(\macro_inst|trig_ctrl_inst|post_trig_cnt[7]~25 ),
  40897. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [7]));
  40898. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .coord_x = 17;
  40899. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .coord_y = 4;
  40900. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .coord_z = 10;
  40901. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .mask = 16'h3C3F;
  40902. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .modeMux = 1'b1;
  40903. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .FeedbackMux = 1'b0;
  40904. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .ShiftMux = 1'b0;
  40905. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .BypassEn = 1'b1;
  40906. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[7] .CarryEnb = 1'b0;
  40907. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[8] (
  40908. .A(vcc),
  40909. .B(\macro_inst|trig_ctrl_inst|post_trig_cnt [8]),
  40910. .C(vcc),
  40911. .D(vcc),
  40912. .Cin(\macro_inst|trig_ctrl_inst|post_trig_cnt[7]~25 ),
  40913. .Qin(\macro_inst|trig_ctrl_inst|post_trig_cnt [8]),
  40914. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout_X62_Y6_SIG_SIG ),
  40915. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  40916. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ),
  40917. .ShiftData(),
  40918. .SyncLoad(SyncLoad_X62_Y6_GND),
  40919. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[8]~26_combout ),
  40920. .Cout(),
  40921. .Q(\macro_inst|trig_ctrl_inst|post_trig_cnt [8]));
  40922. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .coord_x = 17;
  40923. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .coord_y = 4;
  40924. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .coord_z = 11;
  40925. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .mask = 16'hC3C3;
  40926. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .modeMux = 1'b1;
  40927. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .FeedbackMux = 1'b0;
  40928. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .ShiftMux = 1'b0;
  40929. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .BypassEn = 1'b1;
  40930. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8] .CarryEnb = 1'b1;
  40931. alta_slice \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 (
  40932. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  40933. .B(\macro_inst|trig_ctrl_inst|curr_state.POST_TRIG~q ),
  40934. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  40935. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  40936. .Cin(),
  40937. .Qin(),
  40938. .Clk(),
  40939. .AsyncReset(),
  40940. .SyncReset(),
  40941. .ShiftData(),
  40942. .SyncLoad(),
  40943. .LutOut(\macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11_combout ),
  40944. .Cout(),
  40945. .Q());
  40946. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .coord_x = 17;
  40947. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .coord_y = 6;
  40948. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .coord_z = 14;
  40949. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .mask = 16'h88F8;
  40950. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .modeMux = 1'b0;
  40951. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .FeedbackMux = 1'b0;
  40952. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .ShiftMux = 1'b0;
  40953. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .BypassEn = 1'b0;
  40954. defparam \macro_inst|trig_ctrl_inst|post_trig_cnt[8]~11 .CarryEnb = 1'b1;
  40955. alta_slice \macro_inst|trig_ctrl_inst|prdata[0] (
  40956. .A(\macro_inst|cfg_reg_inst|Equal0~3_combout ),
  40957. .B(\macro_inst|trig_ctrl_inst|trig_done~q ),
  40958. .C(\macro_inst|cfg_reg_inst|Equal1~1_combout ),
  40959. .D(\macro_inst|trig_ctrl_inst|trigger_ptr [0]),
  40960. .Cin(),
  40961. .Qin(\macro_inst|trig_ctrl_inst|prdata [0]),
  40962. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  40963. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  40964. .SyncReset(),
  40965. .ShiftData(),
  40966. .SyncLoad(),
  40967. .LutOut(\macro_inst|trig_ctrl_inst|Selector5~0_combout ),
  40968. .Cout(),
  40969. .Q(\macro_inst|trig_ctrl_inst|prdata [0]));
  40970. defparam \macro_inst|trig_ctrl_inst|prdata[0] .coord_x = 18;
  40971. defparam \macro_inst|trig_ctrl_inst|prdata[0] .coord_y = 11;
  40972. defparam \macro_inst|trig_ctrl_inst|prdata[0] .coord_z = 10;
  40973. defparam \macro_inst|trig_ctrl_inst|prdata[0] .mask = 16'hF888;
  40974. defparam \macro_inst|trig_ctrl_inst|prdata[0] .modeMux = 1'b0;
  40975. defparam \macro_inst|trig_ctrl_inst|prdata[0] .FeedbackMux = 1'b0;
  40976. defparam \macro_inst|trig_ctrl_inst|prdata[0] .ShiftMux = 1'b0;
  40977. defparam \macro_inst|trig_ctrl_inst|prdata[0] .BypassEn = 1'b0;
  40978. defparam \macro_inst|trig_ctrl_inst|prdata[0] .CarryEnb = 1'b1;
  40979. alta_slice \macro_inst|trig_ctrl_inst|prdata[1] (
  40980. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  40981. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  40982. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  40983. .D(\macro_inst|trig_ctrl_inst|trigger_ptr [1]),
  40984. .Cin(),
  40985. .Qin(\macro_inst|trig_ctrl_inst|prdata [1]),
  40986. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  40987. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  40988. .SyncReset(),
  40989. .ShiftData(),
  40990. .SyncLoad(),
  40991. .LutOut(\macro_inst|trig_ctrl_inst|prdata~0_combout ),
  40992. .Cout(),
  40993. .Q(\macro_inst|trig_ctrl_inst|prdata [1]));
  40994. defparam \macro_inst|trig_ctrl_inst|prdata[1] .coord_x = 18;
  40995. defparam \macro_inst|trig_ctrl_inst|prdata[1] .coord_y = 11;
  40996. defparam \macro_inst|trig_ctrl_inst|prdata[1] .coord_z = 0;
  40997. defparam \macro_inst|trig_ctrl_inst|prdata[1] .mask = 16'h0800;
  40998. defparam \macro_inst|trig_ctrl_inst|prdata[1] .modeMux = 1'b0;
  40999. defparam \macro_inst|trig_ctrl_inst|prdata[1] .FeedbackMux = 1'b0;
  41000. defparam \macro_inst|trig_ctrl_inst|prdata[1] .ShiftMux = 1'b0;
  41001. defparam \macro_inst|trig_ctrl_inst|prdata[1] .BypassEn = 1'b0;
  41002. defparam \macro_inst|trig_ctrl_inst|prdata[1] .CarryEnb = 1'b1;
  41003. alta_slice \macro_inst|trig_ctrl_inst|prdata[2] (
  41004. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41005. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [2]),
  41006. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  41007. .D(\macro_inst|ahb2apb_inst|paddr [2]),
  41008. .Cin(),
  41009. .Qin(\macro_inst|trig_ctrl_inst|prdata [2]),
  41010. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  41011. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  41012. .SyncReset(),
  41013. .ShiftData(),
  41014. .SyncLoad(),
  41015. .LutOut(\macro_inst|trig_ctrl_inst|prdata~1_combout ),
  41016. .Cout(),
  41017. .Q(\macro_inst|trig_ctrl_inst|prdata [2]));
  41018. defparam \macro_inst|trig_ctrl_inst|prdata[2] .coord_x = 18;
  41019. defparam \macro_inst|trig_ctrl_inst|prdata[2] .coord_y = 11;
  41020. defparam \macro_inst|trig_ctrl_inst|prdata[2] .coord_z = 5;
  41021. defparam \macro_inst|trig_ctrl_inst|prdata[2] .mask = 16'h0800;
  41022. defparam \macro_inst|trig_ctrl_inst|prdata[2] .modeMux = 1'b0;
  41023. defparam \macro_inst|trig_ctrl_inst|prdata[2] .FeedbackMux = 1'b0;
  41024. defparam \macro_inst|trig_ctrl_inst|prdata[2] .ShiftMux = 1'b0;
  41025. defparam \macro_inst|trig_ctrl_inst|prdata[2] .BypassEn = 1'b0;
  41026. defparam \macro_inst|trig_ctrl_inst|prdata[2] .CarryEnb = 1'b1;
  41027. alta_slice \macro_inst|trig_ctrl_inst|prdata[3] (
  41028. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41029. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  41030. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  41031. .D(\macro_inst|trig_ctrl_inst|trigger_ptr [3]),
  41032. .Cin(),
  41033. .Qin(\macro_inst|trig_ctrl_inst|prdata [3]),
  41034. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  41035. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  41036. .SyncReset(),
  41037. .ShiftData(),
  41038. .SyncLoad(),
  41039. .LutOut(\macro_inst|trig_ctrl_inst|prdata~2_combout ),
  41040. .Cout(),
  41041. .Q(\macro_inst|trig_ctrl_inst|prdata [3]));
  41042. defparam \macro_inst|trig_ctrl_inst|prdata[3] .coord_x = 18;
  41043. defparam \macro_inst|trig_ctrl_inst|prdata[3] .coord_y = 11;
  41044. defparam \macro_inst|trig_ctrl_inst|prdata[3] .coord_z = 12;
  41045. defparam \macro_inst|trig_ctrl_inst|prdata[3] .mask = 16'h0800;
  41046. defparam \macro_inst|trig_ctrl_inst|prdata[3] .modeMux = 1'b0;
  41047. defparam \macro_inst|trig_ctrl_inst|prdata[3] .FeedbackMux = 1'b0;
  41048. defparam \macro_inst|trig_ctrl_inst|prdata[3] .ShiftMux = 1'b0;
  41049. defparam \macro_inst|trig_ctrl_inst|prdata[3] .BypassEn = 1'b0;
  41050. defparam \macro_inst|trig_ctrl_inst|prdata[3] .CarryEnb = 1'b1;
  41051. alta_slice \macro_inst|trig_ctrl_inst|prdata[4] (
  41052. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  41053. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  41054. .C(\macro_inst|trig_ctrl_inst|trigger_ptr [4]),
  41055. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41056. .Cin(),
  41057. .Qin(\macro_inst|trig_ctrl_inst|prdata [4]),
  41058. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ),
  41059. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41060. .SyncReset(),
  41061. .ShiftData(),
  41062. .SyncLoad(),
  41063. .LutOut(\macro_inst|trig_ctrl_inst|prdata~3_combout ),
  41064. .Cout(),
  41065. .Q(\macro_inst|trig_ctrl_inst|prdata [4]));
  41066. defparam \macro_inst|trig_ctrl_inst|prdata[4] .coord_x = 17;
  41067. defparam \macro_inst|trig_ctrl_inst|prdata[4] .coord_y = 11;
  41068. defparam \macro_inst|trig_ctrl_inst|prdata[4] .coord_z = 12;
  41069. defparam \macro_inst|trig_ctrl_inst|prdata[4] .mask = 16'h4000;
  41070. defparam \macro_inst|trig_ctrl_inst|prdata[4] .modeMux = 1'b0;
  41071. defparam \macro_inst|trig_ctrl_inst|prdata[4] .FeedbackMux = 1'b0;
  41072. defparam \macro_inst|trig_ctrl_inst|prdata[4] .ShiftMux = 1'b0;
  41073. defparam \macro_inst|trig_ctrl_inst|prdata[4] .BypassEn = 1'b0;
  41074. defparam \macro_inst|trig_ctrl_inst|prdata[4] .CarryEnb = 1'b1;
  41075. alta_slice \macro_inst|trig_ctrl_inst|prdata[5] (
  41076. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  41077. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [5]),
  41078. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  41079. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41080. .Cin(),
  41081. .Qin(\macro_inst|trig_ctrl_inst|prdata [5]),
  41082. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ),
  41083. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41084. .SyncReset(),
  41085. .ShiftData(),
  41086. .SyncLoad(),
  41087. .LutOut(\macro_inst|trig_ctrl_inst|prdata~4_combout ),
  41088. .Cout(),
  41089. .Q(\macro_inst|trig_ctrl_inst|prdata [5]));
  41090. defparam \macro_inst|trig_ctrl_inst|prdata[5] .coord_x = 17;
  41091. defparam \macro_inst|trig_ctrl_inst|prdata[5] .coord_y = 11;
  41092. defparam \macro_inst|trig_ctrl_inst|prdata[5] .coord_z = 11;
  41093. defparam \macro_inst|trig_ctrl_inst|prdata[5] .mask = 16'h0800;
  41094. defparam \macro_inst|trig_ctrl_inst|prdata[5] .modeMux = 1'b0;
  41095. defparam \macro_inst|trig_ctrl_inst|prdata[5] .FeedbackMux = 1'b0;
  41096. defparam \macro_inst|trig_ctrl_inst|prdata[5] .ShiftMux = 1'b0;
  41097. defparam \macro_inst|trig_ctrl_inst|prdata[5] .BypassEn = 1'b0;
  41098. defparam \macro_inst|trig_ctrl_inst|prdata[5] .CarryEnb = 1'b1;
  41099. alta_slice \macro_inst|trig_ctrl_inst|prdata[6] (
  41100. .A(\macro_inst|ahb2apb_inst|paddr [3]),
  41101. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  41102. .C(\macro_inst|trig_ctrl_inst|trigger_ptr [6]),
  41103. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41104. .Cin(),
  41105. .Qin(\macro_inst|trig_ctrl_inst|prdata [6]),
  41106. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ),
  41107. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41108. .SyncReset(),
  41109. .ShiftData(),
  41110. .SyncLoad(),
  41111. .LutOut(\macro_inst|trig_ctrl_inst|prdata~5_combout ),
  41112. .Cout(),
  41113. .Q(\macro_inst|trig_ctrl_inst|prdata [6]));
  41114. defparam \macro_inst|trig_ctrl_inst|prdata[6] .coord_x = 17;
  41115. defparam \macro_inst|trig_ctrl_inst|prdata[6] .coord_y = 11;
  41116. defparam \macro_inst|trig_ctrl_inst|prdata[6] .coord_z = 8;
  41117. defparam \macro_inst|trig_ctrl_inst|prdata[6] .mask = 16'h4000;
  41118. defparam \macro_inst|trig_ctrl_inst|prdata[6] .modeMux = 1'b0;
  41119. defparam \macro_inst|trig_ctrl_inst|prdata[6] .FeedbackMux = 1'b0;
  41120. defparam \macro_inst|trig_ctrl_inst|prdata[6] .ShiftMux = 1'b0;
  41121. defparam \macro_inst|trig_ctrl_inst|prdata[6] .BypassEn = 1'b0;
  41122. defparam \macro_inst|trig_ctrl_inst|prdata[6] .CarryEnb = 1'b1;
  41123. alta_slice \macro_inst|trig_ctrl_inst|prdata[7] (
  41124. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41125. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  41126. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  41127. .D(\macro_inst|trig_ctrl_inst|trigger_ptr [7]),
  41128. .Cin(),
  41129. .Qin(\macro_inst|trig_ctrl_inst|prdata [7]),
  41130. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  41131. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  41132. .SyncReset(),
  41133. .ShiftData(),
  41134. .SyncLoad(),
  41135. .LutOut(\macro_inst|trig_ctrl_inst|prdata~6_combout ),
  41136. .Cout(),
  41137. .Q(\macro_inst|trig_ctrl_inst|prdata [7]));
  41138. defparam \macro_inst|trig_ctrl_inst|prdata[7] .coord_x = 18;
  41139. defparam \macro_inst|trig_ctrl_inst|prdata[7] .coord_y = 11;
  41140. defparam \macro_inst|trig_ctrl_inst|prdata[7] .coord_z = 13;
  41141. defparam \macro_inst|trig_ctrl_inst|prdata[7] .mask = 16'h0800;
  41142. defparam \macro_inst|trig_ctrl_inst|prdata[7] .modeMux = 1'b0;
  41143. defparam \macro_inst|trig_ctrl_inst|prdata[7] .FeedbackMux = 1'b0;
  41144. defparam \macro_inst|trig_ctrl_inst|prdata[7] .ShiftMux = 1'b0;
  41145. defparam \macro_inst|trig_ctrl_inst|prdata[7] .BypassEn = 1'b0;
  41146. defparam \macro_inst|trig_ctrl_inst|prdata[7] .CarryEnb = 1'b1;
  41147. alta_slice \macro_inst|trig_ctrl_inst|prdata[8] (
  41148. .A(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41149. .B(\macro_inst|ahb2apb_inst|paddr [2]),
  41150. .C(\macro_inst|trig_ctrl_inst|trigger_ptr [8]),
  41151. .D(\macro_inst|ahb2apb_inst|paddr [3]),
  41152. .Cin(),
  41153. .Qin(\macro_inst|trig_ctrl_inst|prdata [8]),
  41154. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X61_Y8_SIG_SIG ),
  41155. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  41156. .SyncReset(),
  41157. .ShiftData(),
  41158. .SyncLoad(),
  41159. .LutOut(\macro_inst|trig_ctrl_inst|prdata~7_combout ),
  41160. .Cout(),
  41161. .Q(\macro_inst|trig_ctrl_inst|prdata [8]));
  41162. defparam \macro_inst|trig_ctrl_inst|prdata[8] .coord_x = 18;
  41163. defparam \macro_inst|trig_ctrl_inst|prdata[8] .coord_y = 11;
  41164. defparam \macro_inst|trig_ctrl_inst|prdata[8] .coord_z = 15;
  41165. defparam \macro_inst|trig_ctrl_inst|prdata[8] .mask = 16'h0080;
  41166. defparam \macro_inst|trig_ctrl_inst|prdata[8] .modeMux = 1'b0;
  41167. defparam \macro_inst|trig_ctrl_inst|prdata[8] .FeedbackMux = 1'b0;
  41168. defparam \macro_inst|trig_ctrl_inst|prdata[8] .ShiftMux = 1'b0;
  41169. defparam \macro_inst|trig_ctrl_inst|prdata[8] .BypassEn = 1'b0;
  41170. defparam \macro_inst|trig_ctrl_inst|prdata[8] .CarryEnb = 1'b1;
  41171. alta_slice \macro_inst|trig_ctrl_inst|prdata[9] (
  41172. .A(\macro_inst|ahb2apb_inst|paddr [2]),
  41173. .B(\macro_inst|trig_ctrl_inst|trigger_ptr [9]),
  41174. .C(\macro_inst|ahb2apb_inst|paddr [3]),
  41175. .D(\macro_inst|cfg_reg_inst|Equal0~2_combout ),
  41176. .Cin(),
  41177. .Qin(\macro_inst|trig_ctrl_inst|prdata [9]),
  41178. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|always11~2_combout_X59_Y8_SIG_SIG ),
  41179. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41180. .SyncReset(),
  41181. .ShiftData(),
  41182. .SyncLoad(),
  41183. .LutOut(\macro_inst|trig_ctrl_inst|prdata~8_combout ),
  41184. .Cout(),
  41185. .Q(\macro_inst|trig_ctrl_inst|prdata [9]));
  41186. defparam \macro_inst|trig_ctrl_inst|prdata[9] .coord_x = 17;
  41187. defparam \macro_inst|trig_ctrl_inst|prdata[9] .coord_y = 11;
  41188. defparam \macro_inst|trig_ctrl_inst|prdata[9] .coord_z = 13;
  41189. defparam \macro_inst|trig_ctrl_inst|prdata[9] .mask = 16'h0800;
  41190. defparam \macro_inst|trig_ctrl_inst|prdata[9] .modeMux = 1'b0;
  41191. defparam \macro_inst|trig_ctrl_inst|prdata[9] .FeedbackMux = 1'b0;
  41192. defparam \macro_inst|trig_ctrl_inst|prdata[9] .ShiftMux = 1'b0;
  41193. defparam \macro_inst|trig_ctrl_inst|prdata[9] .BypassEn = 1'b0;
  41194. defparam \macro_inst|trig_ctrl_inst|prdata[9] .CarryEnb = 1'b1;
  41195. alta_slice \macro_inst|trig_ctrl_inst|pulse_active (
  41196. .A(\macro_inst|trig_ctrl_inst|pulse_active~0_combout ),
  41197. .B(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~53_combout ),
  41198. .C(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~52_combout ),
  41199. .D(\macro_inst|trig_ctrl_inst|pulse_active~2_combout ),
  41200. .Cin(),
  41201. .Qin(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  41202. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ),
  41203. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  41204. .SyncReset(),
  41205. .ShiftData(),
  41206. .SyncLoad(),
  41207. .LutOut(\macro_inst|trig_ctrl_inst|pulse_active~3_combout ),
  41208. .Cout(),
  41209. .Q(\macro_inst|trig_ctrl_inst|pulse_active~q ));
  41210. defparam \macro_inst|trig_ctrl_inst|pulse_active .coord_x = 20;
  41211. defparam \macro_inst|trig_ctrl_inst|pulse_active .coord_y = 6;
  41212. defparam \macro_inst|trig_ctrl_inst|pulse_active .coord_z = 15;
  41213. defparam \macro_inst|trig_ctrl_inst|pulse_active .mask = 16'hF020;
  41214. defparam \macro_inst|trig_ctrl_inst|pulse_active .modeMux = 1'b0;
  41215. defparam \macro_inst|trig_ctrl_inst|pulse_active .FeedbackMux = 1'b0;
  41216. defparam \macro_inst|trig_ctrl_inst|pulse_active .ShiftMux = 1'b0;
  41217. defparam \macro_inst|trig_ctrl_inst|pulse_active .BypassEn = 1'b0;
  41218. defparam \macro_inst|trig_ctrl_inst|pulse_active .CarryEnb = 1'b1;
  41219. alta_slice \macro_inst|trig_ctrl_inst|pulse_active~0 (
  41220. .A(vcc),
  41221. .B(vcc),
  41222. .C(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41223. .D(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  41224. .Cin(),
  41225. .Qin(),
  41226. .Clk(),
  41227. .AsyncReset(),
  41228. .SyncReset(),
  41229. .ShiftData(),
  41230. .SyncLoad(),
  41231. .LutOut(\macro_inst|trig_ctrl_inst|pulse_active~0_combout ),
  41232. .Cout(),
  41233. .Q());
  41234. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .coord_x = 20;
  41235. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .coord_y = 6;
  41236. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .coord_z = 6;
  41237. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .mask = 16'h00F0;
  41238. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .modeMux = 1'b0;
  41239. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .FeedbackMux = 1'b0;
  41240. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .ShiftMux = 1'b0;
  41241. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .BypassEn = 1'b0;
  41242. defparam \macro_inst|trig_ctrl_inst|pulse_active~0 .CarryEnb = 1'b1;
  41243. alta_slice \macro_inst|trig_ctrl_inst|pulse_active~2 (
  41244. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41245. .B(\macro_inst|trig_ctrl_inst|pulse_active~1_combout ),
  41246. .C(\macro_inst|trig_ctrl_inst|Add3~32_combout ),
  41247. .D(\macro_inst|trig_ctrl_inst|LessThan6~30_combout ),
  41248. .Cin(),
  41249. .Qin(),
  41250. .Clk(),
  41251. .AsyncReset(),
  41252. .SyncReset(),
  41253. .ShiftData(),
  41254. .SyncLoad(),
  41255. .LutOut(\macro_inst|trig_ctrl_inst|pulse_active~2_combout ),
  41256. .Cout(),
  41257. .Q());
  41258. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .coord_x = 20;
  41259. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .coord_y = 6;
  41260. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .coord_z = 1;
  41261. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .mask = 16'hCC4C;
  41262. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .modeMux = 1'b0;
  41263. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .FeedbackMux = 1'b0;
  41264. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .ShiftMux = 1'b0;
  41265. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .BypassEn = 1'b0;
  41266. defparam \macro_inst|trig_ctrl_inst|pulse_active~2 .CarryEnb = 1'b1;
  41267. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[0] (
  41268. .A(vcc),
  41269. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [0]),
  41270. .C(vcc),
  41271. .D(vcc),
  41272. .Cin(),
  41273. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [0]),
  41274. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41275. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41276. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41277. .ShiftData(),
  41278. .SyncLoad(SyncLoad_X58_Y7_GND),
  41279. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[0]~19_combout ),
  41280. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[0]~20 ),
  41281. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [0]));
  41282. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .coord_x = 20;
  41283. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .coord_y = 10;
  41284. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .coord_z = 0;
  41285. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .mask = 16'h33CC;
  41286. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .modeMux = 1'b0;
  41287. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .FeedbackMux = 1'b0;
  41288. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .ShiftMux = 1'b0;
  41289. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .BypassEn = 1'b1;
  41290. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[0] .CarryEnb = 1'b0;
  41291. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[10] (
  41292. .A(vcc),
  41293. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [10]),
  41294. .C(vcc),
  41295. .D(vcc),
  41296. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[9]~38 ),
  41297. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [10]),
  41298. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41299. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41300. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41301. .ShiftData(),
  41302. .SyncLoad(SyncLoad_X58_Y7_GND),
  41303. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[10]~39_combout ),
  41304. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[10]~40 ),
  41305. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [10]));
  41306. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .coord_x = 20;
  41307. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .coord_y = 10;
  41308. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .coord_z = 10;
  41309. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .mask = 16'hC30C;
  41310. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .modeMux = 1'b1;
  41311. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .FeedbackMux = 1'b0;
  41312. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .ShiftMux = 1'b0;
  41313. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .BypassEn = 1'b1;
  41314. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[10] .CarryEnb = 1'b0;
  41315. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[11] (
  41316. .A(vcc),
  41317. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [11]),
  41318. .C(vcc),
  41319. .D(vcc),
  41320. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[10]~40 ),
  41321. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [11]),
  41322. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41323. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41324. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41325. .ShiftData(),
  41326. .SyncLoad(SyncLoad_X58_Y7_GND),
  41327. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[11]~41_combout ),
  41328. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[11]~42 ),
  41329. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [11]));
  41330. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .coord_x = 20;
  41331. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .coord_y = 10;
  41332. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .coord_z = 11;
  41333. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .mask = 16'h3C3F;
  41334. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .modeMux = 1'b1;
  41335. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .FeedbackMux = 1'b0;
  41336. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .ShiftMux = 1'b0;
  41337. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .BypassEn = 1'b1;
  41338. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[11] .CarryEnb = 1'b0;
  41339. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12] (
  41340. .A(vcc),
  41341. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [12]),
  41342. .C(vcc),
  41343. .D(vcc),
  41344. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[11]~42 ),
  41345. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [12]),
  41346. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41347. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41348. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41349. .ShiftData(),
  41350. .SyncLoad(SyncLoad_X58_Y7_GND),
  41351. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~43_combout ),
  41352. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~44 ),
  41353. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [12]));
  41354. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .coord_x = 20;
  41355. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .coord_y = 10;
  41356. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .coord_z = 12;
  41357. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .mask = 16'hC30C;
  41358. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .modeMux = 1'b1;
  41359. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .FeedbackMux = 1'b0;
  41360. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .ShiftMux = 1'b0;
  41361. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .BypassEn = 1'b1;
  41362. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12] .CarryEnb = 1'b0;
  41363. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 (
  41364. .A(\macro_inst|trig_ctrl_inst|pulse_level~q ),
  41365. .B(\macro_inst|trig_ctrl_inst|LessThan3~22_combout ),
  41366. .C(\macro_inst|trig_ctrl_inst|LessThan5~22_combout ),
  41367. .D(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~55_combout ),
  41368. .Cin(),
  41369. .Qin(),
  41370. .Clk(),
  41371. .AsyncReset(),
  41372. .SyncReset(),
  41373. .ShiftData(),
  41374. .SyncLoad(),
  41375. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~18_combout ),
  41376. .Cout(),
  41377. .Q());
  41378. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .coord_x = 20;
  41379. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .coord_y = 6;
  41380. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .coord_z = 3;
  41381. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .mask = 16'h2700;
  41382. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .modeMux = 1'b0;
  41383. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .FeedbackMux = 1'b0;
  41384. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .ShiftMux = 1'b0;
  41385. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .BypassEn = 1'b0;
  41386. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~18 .CarryEnb = 1'b1;
  41387. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 (
  41388. .A(vcc),
  41389. .B(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~18_combout ),
  41390. .C(\macro_inst|trig_ctrl_inst|Add3~32_combout ),
  41391. .D(\macro_inst|trig_ctrl_inst|LessThan6~30_combout ),
  41392. .Cin(),
  41393. .Qin(),
  41394. .Clk(),
  41395. .AsyncReset(),
  41396. .SyncReset(),
  41397. .ShiftData(),
  41398. .SyncLoad(),
  41399. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout ),
  41400. .Cout(),
  41401. .Q());
  41402. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .coord_x = 20;
  41403. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .coord_y = 6;
  41404. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .coord_z = 7;
  41405. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .mask = 16'h33F3;
  41406. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .modeMux = 1'b0;
  41407. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .FeedbackMux = 1'b0;
  41408. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .ShiftMux = 1'b0;
  41409. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .BypassEn = 1'b0;
  41410. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~51 .CarryEnb = 1'b1;
  41411. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 (
  41412. .A(\macro_inst|trig_ctrl_inst|always4~0_combout ),
  41413. .B(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  41414. .C(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  41415. .D(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  41416. .Cin(),
  41417. .Qin(),
  41418. .Clk(),
  41419. .AsyncReset(),
  41420. .SyncReset(),
  41421. .ShiftData(),
  41422. .SyncLoad(),
  41423. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~52_combout ),
  41424. .Cout(),
  41425. .Q());
  41426. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .coord_x = 20;
  41427. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .coord_y = 6;
  41428. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .coord_z = 4;
  41429. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .mask = 16'h2000;
  41430. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .modeMux = 1'b0;
  41431. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .FeedbackMux = 1'b0;
  41432. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .ShiftMux = 1'b0;
  41433. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .BypassEn = 1'b0;
  41434. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~52 .CarryEnb = 1'b1;
  41435. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 (
  41436. .A(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  41437. .B(\macro_inst|trig_ctrl_inst|edge_trigger~3_combout ),
  41438. .C(\macro_inst|trig_ctrl_inst|edge_trigger~4_combout ),
  41439. .D(\macro_inst|trig_ctrl_inst|LessThan1~2_combout ),
  41440. .Cin(),
  41441. .Qin(),
  41442. .Clk(),
  41443. .AsyncReset(),
  41444. .SyncReset(),
  41445. .ShiftData(),
  41446. .SyncLoad(),
  41447. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~53_combout ),
  41448. .Cout(),
  41449. .Q());
  41450. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .coord_x = 20;
  41451. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .coord_y = 6;
  41452. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .coord_z = 13;
  41453. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .mask = 16'hFF57;
  41454. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .modeMux = 1'b0;
  41455. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .FeedbackMux = 1'b0;
  41456. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .ShiftMux = 1'b0;
  41457. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .BypassEn = 1'b0;
  41458. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~53 .CarryEnb = 1'b1;
  41459. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 (
  41460. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41461. .B(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  41462. .C(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~52_combout ),
  41463. .D(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~53_combout ),
  41464. .Cin(),
  41465. .Qin(),
  41466. .Clk(),
  41467. .AsyncReset(),
  41468. .SyncReset(),
  41469. .ShiftData(),
  41470. .SyncLoad(),
  41471. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout ),
  41472. .Cout(),
  41473. .Q());
  41474. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .coord_x = 20;
  41475. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .coord_y = 6;
  41476. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .coord_z = 9;
  41477. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .mask = 16'h8FAF;
  41478. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .modeMux = 1'b0;
  41479. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .FeedbackMux = 1'b0;
  41480. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .ShiftMux = 1'b0;
  41481. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .BypassEn = 1'b0;
  41482. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~54 .CarryEnb = 1'b1;
  41483. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 (
  41484. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  41485. .B(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  41486. .C(\macro_inst|trig_ctrl_inst|always4~1_combout ),
  41487. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  41488. .Cin(),
  41489. .Qin(),
  41490. .Clk(),
  41491. .AsyncReset(),
  41492. .SyncReset(),
  41493. .ShiftData(),
  41494. .SyncLoad(),
  41495. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~55_combout ),
  41496. .Cout(),
  41497. .Q());
  41498. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .coord_x = 20;
  41499. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .coord_y = 6;
  41500. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .coord_z = 2;
  41501. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .mask = 16'hC040;
  41502. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .modeMux = 1'b0;
  41503. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .FeedbackMux = 1'b0;
  41504. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .ShiftMux = 1'b0;
  41505. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .BypassEn = 1'b0;
  41506. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[12]~55 .CarryEnb = 1'b1;
  41507. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[13] (
  41508. .A(vcc),
  41509. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [13]),
  41510. .C(vcc),
  41511. .D(vcc),
  41512. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~44 ),
  41513. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [13]),
  41514. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41515. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41516. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41517. .ShiftData(),
  41518. .SyncLoad(SyncLoad_X58_Y7_GND),
  41519. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[13]~45_combout ),
  41520. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[13]~46 ),
  41521. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [13]));
  41522. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .coord_x = 20;
  41523. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .coord_y = 10;
  41524. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .coord_z = 13;
  41525. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .mask = 16'h3C3F;
  41526. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .modeMux = 1'b1;
  41527. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .FeedbackMux = 1'b0;
  41528. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .ShiftMux = 1'b0;
  41529. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .BypassEn = 1'b1;
  41530. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[13] .CarryEnb = 1'b0;
  41531. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[14] (
  41532. .A(vcc),
  41533. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [14]),
  41534. .C(vcc),
  41535. .D(vcc),
  41536. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[13]~46 ),
  41537. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [14]),
  41538. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41539. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41540. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41541. .ShiftData(),
  41542. .SyncLoad(SyncLoad_X58_Y7_GND),
  41543. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[14]~47_combout ),
  41544. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[14]~48 ),
  41545. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [14]));
  41546. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .coord_x = 20;
  41547. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .coord_y = 10;
  41548. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .coord_z = 14;
  41549. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .mask = 16'hC30C;
  41550. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .modeMux = 1'b1;
  41551. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .FeedbackMux = 1'b0;
  41552. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .ShiftMux = 1'b0;
  41553. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .BypassEn = 1'b1;
  41554. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[14] .CarryEnb = 1'b0;
  41555. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[15] (
  41556. .A(vcc),
  41557. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [15]),
  41558. .C(vcc),
  41559. .D(vcc),
  41560. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[14]~48 ),
  41561. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [15]),
  41562. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41563. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41564. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41565. .ShiftData(),
  41566. .SyncLoad(SyncLoad_X58_Y7_GND),
  41567. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[15]~49_combout ),
  41568. .Cout(),
  41569. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [15]));
  41570. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .coord_x = 20;
  41571. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .coord_y = 10;
  41572. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .coord_z = 15;
  41573. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .mask = 16'h3C3C;
  41574. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .modeMux = 1'b1;
  41575. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .FeedbackMux = 1'b0;
  41576. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .ShiftMux = 1'b0;
  41577. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .BypassEn = 1'b1;
  41578. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[15] .CarryEnb = 1'b1;
  41579. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[1] (
  41580. .A(vcc),
  41581. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [1]),
  41582. .C(vcc),
  41583. .D(vcc),
  41584. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[0]~20 ),
  41585. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [1]),
  41586. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41587. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41588. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41589. .ShiftData(),
  41590. .SyncLoad(SyncLoad_X58_Y7_GND),
  41591. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[1]~21_combout ),
  41592. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[1]~22 ),
  41593. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [1]));
  41594. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .coord_x = 20;
  41595. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .coord_y = 10;
  41596. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .coord_z = 1;
  41597. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .mask = 16'h3C3F;
  41598. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .modeMux = 1'b1;
  41599. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .FeedbackMux = 1'b0;
  41600. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .ShiftMux = 1'b0;
  41601. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .BypassEn = 1'b1;
  41602. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[1] .CarryEnb = 1'b0;
  41603. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[2] (
  41604. .A(vcc),
  41605. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [2]),
  41606. .C(vcc),
  41607. .D(vcc),
  41608. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[1]~22 ),
  41609. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [2]),
  41610. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41611. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41612. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41613. .ShiftData(),
  41614. .SyncLoad(SyncLoad_X58_Y7_GND),
  41615. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[2]~23_combout ),
  41616. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[2]~24 ),
  41617. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [2]));
  41618. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .coord_x = 20;
  41619. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .coord_y = 10;
  41620. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .coord_z = 2;
  41621. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .mask = 16'hC30C;
  41622. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .modeMux = 1'b1;
  41623. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .FeedbackMux = 1'b0;
  41624. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .ShiftMux = 1'b0;
  41625. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .BypassEn = 1'b1;
  41626. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[2] .CarryEnb = 1'b0;
  41627. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[3] (
  41628. .A(vcc),
  41629. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [3]),
  41630. .C(vcc),
  41631. .D(vcc),
  41632. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[2]~24 ),
  41633. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [3]),
  41634. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41635. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41636. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41637. .ShiftData(),
  41638. .SyncLoad(SyncLoad_X58_Y7_GND),
  41639. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[3]~25_combout ),
  41640. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[3]~26 ),
  41641. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [3]));
  41642. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .coord_x = 20;
  41643. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .coord_y = 10;
  41644. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .coord_z = 3;
  41645. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .mask = 16'h3C3F;
  41646. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .modeMux = 1'b1;
  41647. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .FeedbackMux = 1'b0;
  41648. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .ShiftMux = 1'b0;
  41649. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .BypassEn = 1'b1;
  41650. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[3] .CarryEnb = 1'b0;
  41651. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[4] (
  41652. .A(vcc),
  41653. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [4]),
  41654. .C(vcc),
  41655. .D(vcc),
  41656. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[3]~26 ),
  41657. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [4]),
  41658. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41659. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41660. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41661. .ShiftData(),
  41662. .SyncLoad(SyncLoad_X58_Y7_GND),
  41663. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[4]~27_combout ),
  41664. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[4]~28 ),
  41665. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [4]));
  41666. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .coord_x = 20;
  41667. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .coord_y = 10;
  41668. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .coord_z = 4;
  41669. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .mask = 16'hC30C;
  41670. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .modeMux = 1'b1;
  41671. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .FeedbackMux = 1'b0;
  41672. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .ShiftMux = 1'b0;
  41673. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .BypassEn = 1'b1;
  41674. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[4] .CarryEnb = 1'b0;
  41675. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[5] (
  41676. .A(vcc),
  41677. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [5]),
  41678. .C(vcc),
  41679. .D(vcc),
  41680. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[4]~28 ),
  41681. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [5]),
  41682. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41683. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41684. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41685. .ShiftData(),
  41686. .SyncLoad(SyncLoad_X58_Y7_GND),
  41687. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[5]~29_combout ),
  41688. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[5]~30 ),
  41689. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [5]));
  41690. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .coord_x = 20;
  41691. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .coord_y = 10;
  41692. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .coord_z = 5;
  41693. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .mask = 16'h3C3F;
  41694. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .modeMux = 1'b1;
  41695. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .FeedbackMux = 1'b0;
  41696. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .ShiftMux = 1'b0;
  41697. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .BypassEn = 1'b1;
  41698. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[5] .CarryEnb = 1'b0;
  41699. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[6] (
  41700. .A(vcc),
  41701. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [6]),
  41702. .C(vcc),
  41703. .D(vcc),
  41704. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[5]~30 ),
  41705. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [6]),
  41706. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41707. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41708. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41709. .ShiftData(),
  41710. .SyncLoad(SyncLoad_X58_Y7_GND),
  41711. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[6]~31_combout ),
  41712. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[6]~32 ),
  41713. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [6]));
  41714. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .coord_x = 20;
  41715. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .coord_y = 10;
  41716. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .coord_z = 6;
  41717. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .mask = 16'hC30C;
  41718. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .modeMux = 1'b1;
  41719. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .FeedbackMux = 1'b0;
  41720. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .ShiftMux = 1'b0;
  41721. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .BypassEn = 1'b1;
  41722. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[6] .CarryEnb = 1'b0;
  41723. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[7] (
  41724. .A(vcc),
  41725. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [7]),
  41726. .C(vcc),
  41727. .D(vcc),
  41728. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[6]~32 ),
  41729. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [7]),
  41730. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41731. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41732. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41733. .ShiftData(),
  41734. .SyncLoad(SyncLoad_X58_Y7_GND),
  41735. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[7]~33_combout ),
  41736. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[7]~34 ),
  41737. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [7]));
  41738. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .coord_x = 20;
  41739. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .coord_y = 10;
  41740. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .coord_z = 7;
  41741. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .mask = 16'h3C3F;
  41742. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .modeMux = 1'b1;
  41743. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .FeedbackMux = 1'b0;
  41744. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .ShiftMux = 1'b0;
  41745. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .BypassEn = 1'b1;
  41746. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[7] .CarryEnb = 1'b0;
  41747. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[8] (
  41748. .A(vcc),
  41749. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [8]),
  41750. .C(vcc),
  41751. .D(vcc),
  41752. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[7]~34 ),
  41753. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [8]),
  41754. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41755. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41756. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41757. .ShiftData(),
  41758. .SyncLoad(SyncLoad_X58_Y7_GND),
  41759. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[8]~35_combout ),
  41760. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[8]~36 ),
  41761. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [8]));
  41762. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .coord_x = 20;
  41763. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .coord_y = 10;
  41764. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .coord_z = 8;
  41765. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .mask = 16'hC30C;
  41766. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .modeMux = 1'b1;
  41767. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .FeedbackMux = 1'b0;
  41768. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .ShiftMux = 1'b0;
  41769. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .BypassEn = 1'b1;
  41770. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[8] .CarryEnb = 1'b0;
  41771. alta_slice \macro_inst|trig_ctrl_inst|pulse_cnt[9] (
  41772. .A(vcc),
  41773. .B(\macro_inst|trig_ctrl_inst|pulse_cnt [9]),
  41774. .C(vcc),
  41775. .D(vcc),
  41776. .Cin(\macro_inst|trig_ctrl_inst|pulse_cnt[8]~36 ),
  41777. .Qin(\macro_inst|trig_ctrl_inst|pulse_cnt [9]),
  41778. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|pulse_cnt[12]~54_combout_X58_Y7_SIG_SIG ),
  41779. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41780. .SyncReset(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ),
  41781. .ShiftData(),
  41782. .SyncLoad(SyncLoad_X58_Y7_GND),
  41783. .LutOut(\macro_inst|trig_ctrl_inst|pulse_cnt[9]~37_combout ),
  41784. .Cout(\macro_inst|trig_ctrl_inst|pulse_cnt[9]~38 ),
  41785. .Q(\macro_inst|trig_ctrl_inst|pulse_cnt [9]));
  41786. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .coord_x = 20;
  41787. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .coord_y = 10;
  41788. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .coord_z = 9;
  41789. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .mask = 16'h3C3F;
  41790. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .modeMux = 1'b1;
  41791. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .FeedbackMux = 1'b0;
  41792. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .ShiftMux = 1'b0;
  41793. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .BypassEn = 1'b1;
  41794. defparam \macro_inst|trig_ctrl_inst|pulse_cnt[9] .CarryEnb = 1'b0;
  41795. alta_slice \macro_inst|trig_ctrl_inst|pulse_level (
  41796. .A(\macro_inst|trig_ctrl_inst|pulse_level~4_combout ),
  41797. .B(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  41798. .C(vcc),
  41799. .D(\macro_inst|trig_ctrl_inst|pulse_level~2_combout ),
  41800. .Cin(),
  41801. .Qin(\macro_inst|trig_ctrl_inst|pulse_level~q ),
  41802. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ),
  41803. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  41804. .SyncReset(),
  41805. .ShiftData(),
  41806. .SyncLoad(),
  41807. .LutOut(\macro_inst|trig_ctrl_inst|pulse_level~3_combout ),
  41808. .Cout(),
  41809. .Q(\macro_inst|trig_ctrl_inst|pulse_level~q ));
  41810. defparam \macro_inst|trig_ctrl_inst|pulse_level .coord_x = 20;
  41811. defparam \macro_inst|trig_ctrl_inst|pulse_level .coord_y = 6;
  41812. defparam \macro_inst|trig_ctrl_inst|pulse_level .coord_z = 8;
  41813. defparam \macro_inst|trig_ctrl_inst|pulse_level .mask = 16'h1230;
  41814. defparam \macro_inst|trig_ctrl_inst|pulse_level .modeMux = 1'b0;
  41815. defparam \macro_inst|trig_ctrl_inst|pulse_level .FeedbackMux = 1'b1;
  41816. defparam \macro_inst|trig_ctrl_inst|pulse_level .ShiftMux = 1'b0;
  41817. defparam \macro_inst|trig_ctrl_inst|pulse_level .BypassEn = 1'b0;
  41818. defparam \macro_inst|trig_ctrl_inst|pulse_level .CarryEnb = 1'b1;
  41819. alta_slice \macro_inst|trig_ctrl_inst|pulse_level~2 (
  41820. .A(\macro_inst|trig_ctrl_inst|edge_trigger~4_combout ),
  41821. .B(\macro_inst|trig_ctrl_inst|edge_trigger~3_combout ),
  41822. .C(\macro_inst|trig_ctrl_inst|pulse_level~q ),
  41823. .D(\macro_inst|trig_ctrl_inst|LessThan1~2_combout ),
  41824. .Cin(),
  41825. .Qin(),
  41826. .Clk(),
  41827. .AsyncReset(),
  41828. .SyncReset(),
  41829. .ShiftData(),
  41830. .SyncLoad(),
  41831. .LutOut(\macro_inst|trig_ctrl_inst|pulse_level~2_combout ),
  41832. .Cout(),
  41833. .Q());
  41834. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .coord_x = 20;
  41835. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .coord_y = 6;
  41836. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .coord_z = 11;
  41837. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .mask = 16'h002C;
  41838. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .modeMux = 1'b0;
  41839. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .FeedbackMux = 1'b0;
  41840. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .ShiftMux = 1'b0;
  41841. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .BypassEn = 1'b0;
  41842. defparam \macro_inst|trig_ctrl_inst|pulse_level~2 .CarryEnb = 1'b1;
  41843. alta_slice \macro_inst|trig_ctrl_inst|pulse_level~4 (
  41844. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41845. .B(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  41846. .C(\macro_inst|trig_ctrl_inst|always4~1_combout ),
  41847. .D(\macro_inst|trig_ctrl_inst|pulse_active~q ),
  41848. .Cin(),
  41849. .Qin(),
  41850. .Clk(),
  41851. .AsyncReset(),
  41852. .SyncReset(),
  41853. .ShiftData(),
  41854. .SyncLoad(),
  41855. .LutOut(\macro_inst|trig_ctrl_inst|pulse_level~4_combout ),
  41856. .Cout(),
  41857. .Q());
  41858. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .coord_x = 20;
  41859. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .coord_y = 6;
  41860. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .coord_z = 14;
  41861. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .mask = 16'h0080;
  41862. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .modeMux = 1'b0;
  41863. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .FeedbackMux = 1'b0;
  41864. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .ShiftMux = 1'b0;
  41865. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .BypassEn = 1'b0;
  41866. defparam \macro_inst|trig_ctrl_inst|pulse_level~4 .CarryEnb = 1'b1;
  41867. alta_slice \macro_inst|trig_ctrl_inst|pulse_trigger (
  41868. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41869. .B(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~18_combout ),
  41870. .C(\macro_inst|trig_ctrl_inst|Add3~32_combout ),
  41871. .D(\macro_inst|trig_ctrl_inst|LessThan6~30_combout ),
  41872. .Cin(),
  41873. .Qin(\macro_inst|trig_ctrl_inst|pulse_trigger~q ),
  41874. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X59_Y7_SIG_VCC ),
  41875. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  41876. .SyncReset(),
  41877. .ShiftData(),
  41878. .SyncLoad(),
  41879. .LutOut(\macro_inst|trig_ctrl_inst|pulse_trigger~0_combout ),
  41880. .Cout(),
  41881. .Q(\macro_inst|trig_ctrl_inst|pulse_trigger~q ));
  41882. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .coord_x = 20;
  41883. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .coord_y = 6;
  41884. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .coord_z = 5;
  41885. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .mask = 16'h0080;
  41886. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .modeMux = 1'b0;
  41887. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .FeedbackMux = 1'b0;
  41888. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .ShiftMux = 1'b0;
  41889. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .BypassEn = 1'b0;
  41890. defparam \macro_inst|trig_ctrl_inst|pulse_trigger .CarryEnb = 1'b1;
  41891. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[0] (
  41892. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  41893. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]),
  41894. .C(vcc),
  41895. .D(vcc),
  41896. .Cin(),
  41897. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]),
  41898. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  41899. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  41900. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  41901. .ShiftData(),
  41902. .SyncLoad(SyncLoad_X62_Y5_GND),
  41903. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[0]~10_combout ),
  41904. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[0]~11 ),
  41905. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]));
  41906. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .coord_x = 18;
  41907. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .coord_y = 7;
  41908. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .coord_z = 5;
  41909. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .mask = 16'h6688;
  41910. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .modeMux = 1'b0;
  41911. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .FeedbackMux = 1'b0;
  41912. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .ShiftMux = 1'b0;
  41913. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .BypassEn = 1'b1;
  41914. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[0] .CarryEnb = 1'b0;
  41915. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[1] (
  41916. .A(vcc),
  41917. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]),
  41918. .C(vcc),
  41919. .D(vcc),
  41920. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[0]~11 ),
  41921. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]),
  41922. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  41923. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  41924. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  41925. .ShiftData(),
  41926. .SyncLoad(SyncLoad_X62_Y5_GND),
  41927. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[1]~13_combout ),
  41928. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[1]~14 ),
  41929. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]));
  41930. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .coord_x = 18;
  41931. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .coord_y = 7;
  41932. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .coord_z = 6;
  41933. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .mask = 16'h3C3F;
  41934. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .modeMux = 1'b1;
  41935. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .FeedbackMux = 1'b0;
  41936. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .ShiftMux = 1'b0;
  41937. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .BypassEn = 1'b1;
  41938. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[1] .CarryEnb = 1'b0;
  41939. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[2] (
  41940. .A(vcc),
  41941. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]),
  41942. .C(vcc),
  41943. .D(vcc),
  41944. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[1]~14 ),
  41945. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]),
  41946. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  41947. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  41948. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  41949. .ShiftData(),
  41950. .SyncLoad(SyncLoad_X62_Y5_GND),
  41951. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[2]~15_combout ),
  41952. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[2]~16 ),
  41953. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]));
  41954. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .coord_x = 18;
  41955. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .coord_y = 7;
  41956. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .coord_z = 7;
  41957. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .mask = 16'hC30C;
  41958. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .modeMux = 1'b1;
  41959. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .FeedbackMux = 1'b0;
  41960. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .ShiftMux = 1'b0;
  41961. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .BypassEn = 1'b1;
  41962. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[2] .CarryEnb = 1'b0;
  41963. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[3] (
  41964. .A(vcc),
  41965. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]),
  41966. .C(vcc),
  41967. .D(vcc),
  41968. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[2]~16 ),
  41969. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]),
  41970. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  41971. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  41972. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  41973. .ShiftData(),
  41974. .SyncLoad(SyncLoad_X62_Y5_GND),
  41975. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[3]~17_combout ),
  41976. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[3]~18 ),
  41977. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]));
  41978. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .coord_x = 18;
  41979. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .coord_y = 7;
  41980. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .coord_z = 8;
  41981. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .mask = 16'h3C3F;
  41982. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .modeMux = 1'b1;
  41983. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .FeedbackMux = 1'b0;
  41984. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .ShiftMux = 1'b0;
  41985. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .BypassEn = 1'b1;
  41986. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[3] .CarryEnb = 1'b0;
  41987. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[4] (
  41988. .A(vcc),
  41989. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]),
  41990. .C(vcc),
  41991. .D(vcc),
  41992. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[3]~18 ),
  41993. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]),
  41994. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  41995. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  41996. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  41997. .ShiftData(),
  41998. .SyncLoad(SyncLoad_X62_Y5_GND),
  41999. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[4]~19_combout ),
  42000. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[4]~20 ),
  42001. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]));
  42002. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .coord_x = 18;
  42003. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .coord_y = 7;
  42004. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .coord_z = 9;
  42005. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .mask = 16'hC30C;
  42006. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .modeMux = 1'b1;
  42007. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .FeedbackMux = 1'b0;
  42008. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .ShiftMux = 1'b0;
  42009. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .BypassEn = 1'b1;
  42010. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[4] .CarryEnb = 1'b0;
  42011. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[5] (
  42012. .A(vcc),
  42013. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]),
  42014. .C(vcc),
  42015. .D(vcc),
  42016. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[4]~20 ),
  42017. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]),
  42018. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  42019. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  42020. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  42021. .ShiftData(),
  42022. .SyncLoad(SyncLoad_X62_Y5_GND),
  42023. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[5]~21_combout ),
  42024. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[5]~22 ),
  42025. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]));
  42026. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .coord_x = 18;
  42027. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .coord_y = 7;
  42028. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .coord_z = 10;
  42029. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .mask = 16'h3C3F;
  42030. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .modeMux = 1'b1;
  42031. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .FeedbackMux = 1'b0;
  42032. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .ShiftMux = 1'b0;
  42033. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .BypassEn = 1'b1;
  42034. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[5] .CarryEnb = 1'b0;
  42035. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[6] (
  42036. .A(vcc),
  42037. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]),
  42038. .C(vcc),
  42039. .D(vcc),
  42040. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[5]~22 ),
  42041. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]),
  42042. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  42043. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  42044. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  42045. .ShiftData(),
  42046. .SyncLoad(SyncLoad_X62_Y5_GND),
  42047. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[6]~23_combout ),
  42048. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[6]~24 ),
  42049. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]));
  42050. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .coord_x = 18;
  42051. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .coord_y = 7;
  42052. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .coord_z = 11;
  42053. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .mask = 16'hC30C;
  42054. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .modeMux = 1'b1;
  42055. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .FeedbackMux = 1'b0;
  42056. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .ShiftMux = 1'b0;
  42057. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .BypassEn = 1'b1;
  42058. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[6] .CarryEnb = 1'b0;
  42059. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[7] (
  42060. .A(vcc),
  42061. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]),
  42062. .C(vcc),
  42063. .D(vcc),
  42064. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[6]~24 ),
  42065. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]),
  42066. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  42067. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  42068. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  42069. .ShiftData(),
  42070. .SyncLoad(SyncLoad_X62_Y5_GND),
  42071. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[7]~25_combout ),
  42072. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[7]~26 ),
  42073. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]));
  42074. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .coord_x = 18;
  42075. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .coord_y = 7;
  42076. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .coord_z = 12;
  42077. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .mask = 16'h3C3F;
  42078. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .modeMux = 1'b1;
  42079. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .FeedbackMux = 1'b0;
  42080. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .ShiftMux = 1'b0;
  42081. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .BypassEn = 1'b1;
  42082. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[7] .CarryEnb = 1'b0;
  42083. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[8] (
  42084. .A(vcc),
  42085. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]),
  42086. .C(vcc),
  42087. .D(vcc),
  42088. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[7]~26 ),
  42089. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]),
  42090. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  42091. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  42092. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  42093. .ShiftData(),
  42094. .SyncLoad(SyncLoad_X62_Y5_GND),
  42095. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[8]~27_combout ),
  42096. .Cout(\macro_inst|trig_ctrl_inst|ram_wr_addr[8]~28 ),
  42097. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]));
  42098. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .coord_x = 18;
  42099. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .coord_y = 7;
  42100. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .coord_z = 13;
  42101. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .mask = 16'hC30C;
  42102. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .modeMux = 1'b1;
  42103. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .FeedbackMux = 1'b0;
  42104. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .ShiftMux = 1'b0;
  42105. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .BypassEn = 1'b1;
  42106. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[8] .CarryEnb = 1'b0;
  42107. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_addr[9] (
  42108. .A(vcc),
  42109. .B(vcc),
  42110. .C(vcc),
  42111. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  42112. .Cin(\macro_inst|trig_ctrl_inst|ram_wr_addr[8]~28 ),
  42113. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  42114. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wr_addr[6]~12_combout_X62_Y5_SIG_SIG ),
  42115. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  42116. .SyncReset(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ),
  42117. .ShiftData(),
  42118. .SyncLoad(SyncLoad_X62_Y5_GND),
  42119. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_addr[9]~29_combout ),
  42120. .Cout(),
  42121. .Q(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]));
  42122. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .coord_x = 18;
  42123. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .coord_y = 7;
  42124. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .coord_z = 14;
  42125. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .mask = 16'h0FF0;
  42126. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .modeMux = 1'b1;
  42127. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .FeedbackMux = 1'b0;
  42128. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .ShiftMux = 1'b0;
  42129. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .BypassEn = 1'b1;
  42130. defparam \macro_inst|trig_ctrl_inst|ram_wr_addr[9] .CarryEnb = 1'b1;
  42131. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] (
  42132. .A(vcc),
  42133. .B(\macro_inst|apb_adc0_inst|apb_db [0]),
  42134. .C(vcc),
  42135. .D(vcc),
  42136. .Cin(),
  42137. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [0]),
  42138. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42139. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42140. .SyncReset(),
  42141. .ShiftData(),
  42142. .SyncLoad(),
  42143. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[0]~feeder_combout ),
  42144. .Cout(),
  42145. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [0]));
  42146. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .coord_x = 14;
  42147. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .coord_y = 4;
  42148. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .coord_z = 10;
  42149. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .mask = 16'hCCCC;
  42150. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .modeMux = 1'b0;
  42151. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .FeedbackMux = 1'b0;
  42152. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .ShiftMux = 1'b0;
  42153. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .BypassEn = 1'b0;
  42154. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[0] .CarryEnb = 1'b1;
  42155. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] (
  42156. .A(vcc),
  42157. .B(vcc),
  42158. .C(vcc),
  42159. .D(\macro_inst|apb_adc0_inst|apb_db [10]),
  42160. .Cin(),
  42161. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [10]),
  42162. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42163. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42164. .SyncReset(),
  42165. .ShiftData(),
  42166. .SyncLoad(),
  42167. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[10]~feeder_combout ),
  42168. .Cout(),
  42169. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [10]));
  42170. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .coord_x = 14;
  42171. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .coord_y = 4;
  42172. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .coord_z = 12;
  42173. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .mask = 16'hFF00;
  42174. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .modeMux = 1'b0;
  42175. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .FeedbackMux = 1'b0;
  42176. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .ShiftMux = 1'b0;
  42177. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .BypassEn = 1'b0;
  42178. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[10] .CarryEnb = 1'b1;
  42179. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] (
  42180. .A(vcc),
  42181. .B(vcc),
  42182. .C(vcc),
  42183. .D(\macro_inst|apb_adc0_inst|apb_db [11]),
  42184. .Cin(),
  42185. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [11]),
  42186. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42187. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42188. .SyncReset(),
  42189. .ShiftData(),
  42190. .SyncLoad(),
  42191. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[11]~feeder_combout ),
  42192. .Cout(),
  42193. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [11]));
  42194. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .coord_x = 14;
  42195. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .coord_y = 4;
  42196. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .coord_z = 9;
  42197. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .mask = 16'hFF00;
  42198. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .modeMux = 1'b0;
  42199. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .FeedbackMux = 1'b0;
  42200. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .ShiftMux = 1'b0;
  42201. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .BypassEn = 1'b0;
  42202. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[11] .CarryEnb = 1'b1;
  42203. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] (
  42204. .A(vcc),
  42205. .B(vcc),
  42206. .C(vcc),
  42207. .D(\macro_inst|apb_adc0_inst|apb_db [1]),
  42208. .Cin(),
  42209. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [1]),
  42210. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42211. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42212. .SyncReset(),
  42213. .ShiftData(),
  42214. .SyncLoad(),
  42215. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[1]~feeder_combout ),
  42216. .Cout(),
  42217. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [1]));
  42218. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .coord_x = 14;
  42219. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .coord_y = 4;
  42220. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .coord_z = 14;
  42221. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .mask = 16'hFF00;
  42222. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .modeMux = 1'b0;
  42223. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .FeedbackMux = 1'b0;
  42224. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .ShiftMux = 1'b0;
  42225. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .BypassEn = 1'b0;
  42226. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[1] .CarryEnb = 1'b1;
  42227. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] (
  42228. .A(vcc),
  42229. .B(vcc),
  42230. .C(\macro_inst|apb_adc0_inst|apb_db [2]),
  42231. .D(vcc),
  42232. .Cin(),
  42233. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [2]),
  42234. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42235. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42236. .SyncReset(),
  42237. .ShiftData(),
  42238. .SyncLoad(),
  42239. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[2]~feeder_combout ),
  42240. .Cout(),
  42241. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [2]));
  42242. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .coord_x = 14;
  42243. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .coord_y = 4;
  42244. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .coord_z = 15;
  42245. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .mask = 16'hF0F0;
  42246. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .modeMux = 1'b0;
  42247. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .FeedbackMux = 1'b0;
  42248. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .ShiftMux = 1'b0;
  42249. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .BypassEn = 1'b0;
  42250. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[2] .CarryEnb = 1'b1;
  42251. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] (
  42252. .A(vcc),
  42253. .B(vcc),
  42254. .C(vcc),
  42255. .D(\macro_inst|apb_adc0_inst|apb_db [3]),
  42256. .Cin(),
  42257. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [3]),
  42258. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42259. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42260. .SyncReset(),
  42261. .ShiftData(),
  42262. .SyncLoad(),
  42263. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[3]~feeder_combout ),
  42264. .Cout(),
  42265. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [3]));
  42266. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .coord_x = 14;
  42267. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .coord_y = 4;
  42268. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .coord_z = 3;
  42269. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .mask = 16'hFF00;
  42270. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .modeMux = 1'b0;
  42271. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .FeedbackMux = 1'b0;
  42272. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .ShiftMux = 1'b0;
  42273. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .BypassEn = 1'b0;
  42274. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[3] .CarryEnb = 1'b1;
  42275. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] (
  42276. .A(vcc),
  42277. .B(vcc),
  42278. .C(vcc),
  42279. .D(\macro_inst|apb_adc0_inst|apb_db [4]),
  42280. .Cin(),
  42281. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [4]),
  42282. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42283. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42284. .SyncReset(),
  42285. .ShiftData(),
  42286. .SyncLoad(),
  42287. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[4]~feeder_combout ),
  42288. .Cout(),
  42289. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [4]));
  42290. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .coord_x = 14;
  42291. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .coord_y = 4;
  42292. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .coord_z = 11;
  42293. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .mask = 16'hFF00;
  42294. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .modeMux = 1'b0;
  42295. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .FeedbackMux = 1'b0;
  42296. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .ShiftMux = 1'b0;
  42297. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .BypassEn = 1'b0;
  42298. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[4] .CarryEnb = 1'b1;
  42299. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] (
  42300. .A(vcc),
  42301. .B(vcc),
  42302. .C(vcc),
  42303. .D(\macro_inst|apb_adc0_inst|apb_db [5]),
  42304. .Cin(),
  42305. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [5]),
  42306. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42307. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42308. .SyncReset(),
  42309. .ShiftData(),
  42310. .SyncLoad(),
  42311. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[5]~feeder_combout ),
  42312. .Cout(),
  42313. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [5]));
  42314. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .coord_x = 14;
  42315. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .coord_y = 4;
  42316. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .coord_z = 8;
  42317. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .mask = 16'hFF00;
  42318. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .modeMux = 1'b0;
  42319. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .FeedbackMux = 1'b0;
  42320. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .ShiftMux = 1'b0;
  42321. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .BypassEn = 1'b0;
  42322. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[5] .CarryEnb = 1'b1;
  42323. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] (
  42324. .A(vcc),
  42325. .B(vcc),
  42326. .C(vcc),
  42327. .D(\macro_inst|apb_adc0_inst|apb_db [6]),
  42328. .Cin(),
  42329. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [6]),
  42330. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42331. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42332. .SyncReset(),
  42333. .ShiftData(),
  42334. .SyncLoad(),
  42335. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[6]~feeder_combout ),
  42336. .Cout(),
  42337. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [6]));
  42338. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .coord_x = 14;
  42339. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .coord_y = 4;
  42340. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .coord_z = 2;
  42341. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .mask = 16'hFF00;
  42342. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .modeMux = 1'b0;
  42343. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .FeedbackMux = 1'b0;
  42344. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .ShiftMux = 1'b0;
  42345. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .BypassEn = 1'b0;
  42346. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[6] .CarryEnb = 1'b1;
  42347. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] (
  42348. .A(vcc),
  42349. .B(vcc),
  42350. .C(vcc),
  42351. .D(\macro_inst|apb_adc0_inst|apb_db [7]),
  42352. .Cin(),
  42353. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [7]),
  42354. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42355. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42356. .SyncReset(),
  42357. .ShiftData(),
  42358. .SyncLoad(),
  42359. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[7]~feeder_combout ),
  42360. .Cout(),
  42361. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [7]));
  42362. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .coord_x = 14;
  42363. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .coord_y = 4;
  42364. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .coord_z = 7;
  42365. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .mask = 16'hFF00;
  42366. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .modeMux = 1'b0;
  42367. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .FeedbackMux = 1'b0;
  42368. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .ShiftMux = 1'b0;
  42369. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .BypassEn = 1'b0;
  42370. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[7] .CarryEnb = 1'b1;
  42371. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] (
  42372. .A(vcc),
  42373. .B(vcc),
  42374. .C(vcc),
  42375. .D(\macro_inst|apb_adc0_inst|apb_db [8]),
  42376. .Cin(),
  42377. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [8]),
  42378. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42379. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42380. .SyncReset(),
  42381. .ShiftData(),
  42382. .SyncLoad(),
  42383. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[8]~feeder_combout ),
  42384. .Cout(),
  42385. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [8]));
  42386. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .coord_x = 14;
  42387. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .coord_y = 4;
  42388. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .coord_z = 6;
  42389. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .mask = 16'hFF00;
  42390. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .modeMux = 1'b0;
  42391. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .FeedbackMux = 1'b0;
  42392. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .ShiftMux = 1'b0;
  42393. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .BypassEn = 1'b0;
  42394. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[8] .CarryEnb = 1'b1;
  42395. alta_slice \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] (
  42396. .A(vcc),
  42397. .B(vcc),
  42398. .C(vcc),
  42399. .D(\macro_inst|apb_adc0_inst|apb_db [9]),
  42400. .Cin(),
  42401. .Qin(\macro_inst|trig_ctrl_inst|ram_wr_data_b [9]),
  42402. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|ram_wren_b~0_combout_X54_Y4_SIG_SIG ),
  42403. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42404. .SyncReset(),
  42405. .ShiftData(),
  42406. .SyncLoad(),
  42407. .LutOut(\macro_inst|trig_ctrl_inst|ram_wr_data_b[9]~feeder_combout ),
  42408. .Cout(),
  42409. .Q(\macro_inst|trig_ctrl_inst|ram_wr_data_b [9]));
  42410. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .coord_x = 14;
  42411. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .coord_y = 4;
  42412. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .coord_z = 4;
  42413. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .mask = 16'hFF00;
  42414. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .modeMux = 1'b0;
  42415. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .FeedbackMux = 1'b0;
  42416. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .ShiftMux = 1'b0;
  42417. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .BypassEn = 1'b0;
  42418. defparam \macro_inst|trig_ctrl_inst|ram_wr_data_b[9] .CarryEnb = 1'b1;
  42419. alta_slice \macro_inst|trig_ctrl_inst|ram_wren_b (
  42420. .A(vcc),
  42421. .B(vcc),
  42422. .C(vcc),
  42423. .D(\macro_inst|trig_ctrl_inst|ram_wren_b~0_combout ),
  42424. .Cin(),
  42425. .Qin(\macro_inst|trig_ctrl_inst|ram_wren_b~q ),
  42426. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X54_Y4_SIG_VCC ),
  42427. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  42428. .SyncReset(),
  42429. .ShiftData(),
  42430. .SyncLoad(),
  42431. .LutOut(\macro_inst|trig_ctrl_inst|ram_wren_b~feeder_combout ),
  42432. .Cout(),
  42433. .Q(\macro_inst|trig_ctrl_inst|ram_wren_b~q ));
  42434. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .coord_x = 14;
  42435. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .coord_y = 4;
  42436. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .coord_z = 5;
  42437. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .mask = 16'hFF00;
  42438. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .modeMux = 1'b0;
  42439. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .FeedbackMux = 1'b0;
  42440. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .ShiftMux = 1'b0;
  42441. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .BypassEn = 1'b0;
  42442. defparam \macro_inst|trig_ctrl_inst|ram_wren_b .CarryEnb = 1'b1;
  42443. alta_slice \macro_inst|trig_ctrl_inst|ram_wren_b~0 (
  42444. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  42445. .B(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  42446. .C(\macro_inst|trig_ctrl_inst|curr_state.IDLE~q ),
  42447. .D(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  42448. .Cin(),
  42449. .Qin(),
  42450. .Clk(),
  42451. .AsyncReset(),
  42452. .SyncReset(),
  42453. .ShiftData(),
  42454. .SyncLoad(),
  42455. .LutOut(\macro_inst|trig_ctrl_inst|ram_wren_b~0_combout ),
  42456. .Cout(),
  42457. .Q());
  42458. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .coord_x = 17;
  42459. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .coord_y = 6;
  42460. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .coord_z = 6;
  42461. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .mask = 16'h0020;
  42462. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .modeMux = 1'b0;
  42463. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .FeedbackMux = 1'b0;
  42464. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .ShiftMux = 1'b0;
  42465. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .BypassEn = 1'b0;
  42466. defparam \macro_inst|trig_ctrl_inst|ram_wren_b~0 .CarryEnb = 1'b1;
  42467. alta_slice \macro_inst|trig_ctrl_inst|sample_valid (
  42468. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  42469. .B(\macro_inst|trig_ctrl_inst|curr_state.PRE_FILL~q ),
  42470. .C(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  42471. .D(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  42472. .Cin(),
  42473. .Qin(),
  42474. .Clk(),
  42475. .AsyncReset(),
  42476. .SyncReset(),
  42477. .ShiftData(),
  42478. .SyncLoad(),
  42479. .LutOut(\macro_inst|trig_ctrl_inst|sample_valid~combout ),
  42480. .Cout(),
  42481. .Q());
  42482. defparam \macro_inst|trig_ctrl_inst|sample_valid .coord_x = 18;
  42483. defparam \macro_inst|trig_ctrl_inst|sample_valid .coord_y = 6;
  42484. defparam \macro_inst|trig_ctrl_inst|sample_valid .coord_z = 6;
  42485. defparam \macro_inst|trig_ctrl_inst|sample_valid .mask = 16'hA800;
  42486. defparam \macro_inst|trig_ctrl_inst|sample_valid .modeMux = 1'b0;
  42487. defparam \macro_inst|trig_ctrl_inst|sample_valid .FeedbackMux = 1'b0;
  42488. defparam \macro_inst|trig_ctrl_inst|sample_valid .ShiftMux = 1'b0;
  42489. defparam \macro_inst|trig_ctrl_inst|sample_valid .BypassEn = 1'b0;
  42490. defparam \macro_inst|trig_ctrl_inst|sample_valid .CarryEnb = 1'b1;
  42491. alta_slice \macro_inst|trig_ctrl_inst|single_shot_lock (
  42492. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42493. .B(\macro_inst|trig_ctrl_inst|single_shot_lock~2_combout ),
  42494. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42495. .D(vcc),
  42496. .Cin(),
  42497. .Qin(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  42498. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ),
  42499. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  42500. .SyncReset(),
  42501. .ShiftData(),
  42502. .SyncLoad(),
  42503. .LutOut(\macro_inst|trig_ctrl_inst|single_shot_lock~3_combout ),
  42504. .Cout(),
  42505. .Q(\macro_inst|trig_ctrl_inst|single_shot_lock~q ));
  42506. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .coord_x = 18;
  42507. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .coord_y = 6;
  42508. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .coord_z = 3;
  42509. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .mask = 16'hC4C4;
  42510. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .modeMux = 1'b0;
  42511. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .FeedbackMux = 1'b0;
  42512. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .ShiftMux = 1'b0;
  42513. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .BypassEn = 1'b0;
  42514. defparam \macro_inst|trig_ctrl_inst|single_shot_lock .CarryEnb = 1'b1;
  42515. alta_slice \macro_inst|trig_ctrl_inst|single_shot_lock~2 (
  42516. .A(\macro_inst|cfg_reg_inst|trig_mode [1]),
  42517. .B(\macro_inst|cfg_reg_inst|trig_mode [0]),
  42518. .C(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  42519. .D(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  42520. .Cin(),
  42521. .Qin(),
  42522. .Clk(),
  42523. .AsyncReset(),
  42524. .SyncReset(),
  42525. .ShiftData(),
  42526. .SyncLoad(),
  42527. .LutOut(\macro_inst|trig_ctrl_inst|single_shot_lock~2_combout ),
  42528. .Cout(),
  42529. .Q());
  42530. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .coord_x = 19;
  42531. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .coord_y = 8;
  42532. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .coord_z = 0;
  42533. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .mask = 16'hF2F0;
  42534. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .modeMux = 1'b0;
  42535. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .FeedbackMux = 1'b0;
  42536. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .ShiftMux = 1'b0;
  42537. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .BypassEn = 1'b0;
  42538. defparam \macro_inst|trig_ctrl_inst|single_shot_lock~2 .CarryEnb = 1'b1;
  42539. alta_slice \macro_inst|trig_ctrl_inst|trig_done (
  42540. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42541. .B(\macro_inst|trig_ctrl_inst|curr_state.DONE~q ),
  42542. .C(vcc),
  42543. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42544. .Cin(),
  42545. .Qin(\macro_inst|trig_ctrl_inst|trig_done~q ),
  42546. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X61_Y6_SIG_VCC ),
  42547. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  42548. .SyncReset(),
  42549. .ShiftData(),
  42550. .SyncLoad(),
  42551. .LutOut(\macro_inst|trig_ctrl_inst|trig_done~0_combout ),
  42552. .Cout(),
  42553. .Q(\macro_inst|trig_ctrl_inst|trig_done~q ));
  42554. defparam \macro_inst|trig_ctrl_inst|trig_done .coord_x = 17;
  42555. defparam \macro_inst|trig_ctrl_inst|trig_done .coord_y = 6;
  42556. defparam \macro_inst|trig_ctrl_inst|trig_done .coord_z = 12;
  42557. defparam \macro_inst|trig_ctrl_inst|trig_done .mask = 16'hFC54;
  42558. defparam \macro_inst|trig_ctrl_inst|trig_done .modeMux = 1'b0;
  42559. defparam \macro_inst|trig_ctrl_inst|trig_done .FeedbackMux = 1'b1;
  42560. defparam \macro_inst|trig_ctrl_inst|trig_done .ShiftMux = 1'b0;
  42561. defparam \macro_inst|trig_ctrl_inst|trig_done .BypassEn = 1'b0;
  42562. defparam \macro_inst|trig_ctrl_inst|trig_done .CarryEnb = 1'b1;
  42563. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~0 (
  42564. .A(\macro_inst|trig_ctrl_inst|auto_wait_cnt [2]),
  42565. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [1]),
  42566. .C(\macro_inst|trig_ctrl_inst|auto_wait_cnt [0]),
  42567. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt [3]),
  42568. .Cin(),
  42569. .Qin(),
  42570. .Clk(),
  42571. .AsyncReset(),
  42572. .SyncReset(),
  42573. .ShiftData(),
  42574. .SyncLoad(),
  42575. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~0_combout ),
  42576. .Cout(),
  42577. .Q());
  42578. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .coord_x = 20;
  42579. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .coord_y = 8;
  42580. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .coord_z = 15;
  42581. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .mask = 16'h8000;
  42582. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .modeMux = 1'b0;
  42583. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .FeedbackMux = 1'b0;
  42584. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .ShiftMux = 1'b0;
  42585. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .BypassEn = 1'b0;
  42586. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~0 .CarryEnb = 1'b1;
  42587. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~1 (
  42588. .A(vcc),
  42589. .B(vcc),
  42590. .C(\macro_inst|trig_ctrl_inst|auto_wait_cnt [6]),
  42591. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt [7]),
  42592. .Cin(),
  42593. .Qin(),
  42594. .Clk(),
  42595. .AsyncReset(),
  42596. .SyncReset(),
  42597. .ShiftData(),
  42598. .SyncLoad(),
  42599. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~1_combout ),
  42600. .Cout(),
  42601. .Q());
  42602. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .coord_x = 20;
  42603. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .coord_y = 8;
  42604. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .coord_z = 12;
  42605. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .mask = 16'hF000;
  42606. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .modeMux = 1'b0;
  42607. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .FeedbackMux = 1'b0;
  42608. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .ShiftMux = 1'b0;
  42609. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .BypassEn = 1'b0;
  42610. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~1 .CarryEnb = 1'b1;
  42611. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~2 (
  42612. .A(\macro_inst|trig_ctrl_inst|auto_wait_cnt [8]),
  42613. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [4]),
  42614. .C(\macro_inst|trig_ctrl_inst|trig_hit_comb~1_combout ),
  42615. .D(\macro_inst|trig_ctrl_inst|auto_wait_cnt [5]),
  42616. .Cin(),
  42617. .Qin(),
  42618. .Clk(),
  42619. .AsyncReset(),
  42620. .SyncReset(),
  42621. .ShiftData(),
  42622. .SyncLoad(),
  42623. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~2_combout ),
  42624. .Cout(),
  42625. .Q());
  42626. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .coord_x = 20;
  42627. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .coord_y = 8;
  42628. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .coord_z = 14;
  42629. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .mask = 16'h8000;
  42630. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .modeMux = 1'b0;
  42631. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .FeedbackMux = 1'b0;
  42632. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .ShiftMux = 1'b0;
  42633. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .BypassEn = 1'b0;
  42634. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~2 .CarryEnb = 1'b1;
  42635. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~3 (
  42636. .A(\macro_inst|trig_ctrl_inst|trig_hit_comb~0_combout ),
  42637. .B(\macro_inst|trig_ctrl_inst|auto_wait_cnt [9]),
  42638. .C(\macro_inst|trig_ctrl_inst|LessThan7~3_combout ),
  42639. .D(\macro_inst|trig_ctrl_inst|trig_hit_comb~2_combout ),
  42640. .Cin(),
  42641. .Qin(),
  42642. .Clk(),
  42643. .AsyncReset(),
  42644. .SyncReset(),
  42645. .ShiftData(),
  42646. .SyncLoad(),
  42647. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ),
  42648. .Cout(),
  42649. .Q());
  42650. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .coord_x = 20;
  42651. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .coord_y = 7;
  42652. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .coord_z = 1;
  42653. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .mask = 16'h0E0C;
  42654. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .modeMux = 1'b0;
  42655. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .FeedbackMux = 1'b0;
  42656. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .ShiftMux = 1'b0;
  42657. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .BypassEn = 1'b0;
  42658. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~3 .CarryEnb = 1'b1;
  42659. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~4 (
  42660. .A(vcc),
  42661. .B(vcc),
  42662. .C(\macro_inst|cfg_reg_inst|adc_en~q ),
  42663. .D(\macro_inst|cfg_reg_inst|adc_run~q ),
  42664. .Cin(),
  42665. .Qin(),
  42666. .Clk(),
  42667. .AsyncReset(),
  42668. .SyncReset(),
  42669. .ShiftData(),
  42670. .SyncLoad(),
  42671. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~4_combout ),
  42672. .Cout(),
  42673. .Q());
  42674. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .coord_x = 17;
  42675. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .coord_y = 6;
  42676. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .coord_z = 3;
  42677. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .mask = 16'hF000;
  42678. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .modeMux = 1'b0;
  42679. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .FeedbackMux = 1'b0;
  42680. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .ShiftMux = 1'b0;
  42681. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .BypassEn = 1'b0;
  42682. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~4 .CarryEnb = 1'b1;
  42683. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_comb~5 (
  42684. .A(\macro_inst|trig_ctrl_inst|trig_hit_comb~4_combout ),
  42685. .B(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  42686. .C(\macro_inst|trig_ctrl_inst|single_shot_lock~q ),
  42687. .D(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  42688. .Cin(),
  42689. .Qin(),
  42690. .Clk(),
  42691. .AsyncReset(),
  42692. .SyncReset(),
  42693. .ShiftData(),
  42694. .SyncLoad(),
  42695. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  42696. .Cout(),
  42697. .Q());
  42698. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .coord_x = 19;
  42699. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .coord_y = 8;
  42700. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .coord_z = 1;
  42701. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .mask = 16'h0800;
  42702. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .modeMux = 1'b0;
  42703. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .FeedbackMux = 1'b0;
  42704. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .ShiftMux = 1'b0;
  42705. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .BypassEn = 1'b0;
  42706. defparam \macro_inst|trig_ctrl_inst|trig_hit_comb~5 .CarryEnb = 1'b1;
  42707. alta_slice \macro_inst|trig_ctrl_inst|trig_hit_reg (
  42708. .A(\macro_inst|trig_ctrl_inst|pulse_trigger~q ),
  42709. .B(\macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ),
  42710. .C(\macro_inst|trig_ctrl_inst|trig_hit_comb~5_combout ),
  42711. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  42712. .Cin(),
  42713. .Qin(\macro_inst|trig_ctrl_inst|trig_hit_reg~q ),
  42714. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y5_SIG_VCC ),
  42715. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42716. .SyncReset(),
  42717. .ShiftData(),
  42718. .SyncLoad(),
  42719. .LutOut(\macro_inst|trig_ctrl_inst|trig_hit_comb~6_combout ),
  42720. .Cout(),
  42721. .Q(\macro_inst|trig_ctrl_inst|trig_hit_reg~q ));
  42722. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .coord_x = 20;
  42723. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .coord_y = 7;
  42724. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .coord_z = 5;
  42725. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .mask = 16'hFAEA;
  42726. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .modeMux = 1'b0;
  42727. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .FeedbackMux = 1'b0;
  42728. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .ShiftMux = 1'b0;
  42729. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .BypassEn = 1'b0;
  42730. defparam \macro_inst|trig_ctrl_inst|trig_hit_reg .CarryEnb = 1'b1;
  42731. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[0] (
  42732. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42733. .B(vcc),
  42734. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42735. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [0]),
  42736. .Cin(),
  42737. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [0]),
  42738. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42739. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42740. .SyncReset(),
  42741. .ShiftData(),
  42742. .SyncLoad(),
  42743. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~0_combout ),
  42744. .Cout(),
  42745. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [0]));
  42746. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .coord_x = 20;
  42747. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .coord_y = 7;
  42748. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .coord_z = 12;
  42749. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .mask = 16'hAF00;
  42750. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .modeMux = 1'b0;
  42751. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .FeedbackMux = 1'b0;
  42752. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .ShiftMux = 1'b0;
  42753. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .BypassEn = 1'b0;
  42754. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[0] .CarryEnb = 1'b1;
  42755. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[1] (
  42756. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42757. .B(vcc),
  42758. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42759. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [1]),
  42760. .Cin(),
  42761. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [1]),
  42762. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42763. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42764. .SyncReset(),
  42765. .ShiftData(),
  42766. .SyncLoad(),
  42767. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~3_combout ),
  42768. .Cout(),
  42769. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [1]));
  42770. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .coord_x = 20;
  42771. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .coord_y = 7;
  42772. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .coord_z = 2;
  42773. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .mask = 16'hAF00;
  42774. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .modeMux = 1'b0;
  42775. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .FeedbackMux = 1'b0;
  42776. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .ShiftMux = 1'b0;
  42777. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .BypassEn = 1'b0;
  42778. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[1] .CarryEnb = 1'b1;
  42779. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[2] (
  42780. .A(vcc),
  42781. .B(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42782. .C(\macro_inst|trig_ctrl_inst|ram_wr_addr [2]),
  42783. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42784. .Cin(),
  42785. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [2]),
  42786. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X61_Y5_SIG_SIG ),
  42787. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  42788. .SyncReset(),
  42789. .ShiftData(),
  42790. .SyncLoad(),
  42791. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~4_combout ),
  42792. .Cout(),
  42793. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [2]));
  42794. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .coord_x = 19;
  42795. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .coord_y = 7;
  42796. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .coord_z = 15;
  42797. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .mask = 16'hC0F0;
  42798. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .modeMux = 1'b0;
  42799. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .FeedbackMux = 1'b0;
  42800. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .ShiftMux = 1'b0;
  42801. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .BypassEn = 1'b0;
  42802. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2] .CarryEnb = 1'b1;
  42803. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 (
  42804. .A(\macro_inst|trig_ctrl_inst|pulse_trigger~q ),
  42805. .B(\macro_inst|trig_ctrl_inst|trig_hit_comb~3_combout ),
  42806. .C(\macro_inst|trig_ctrl_inst|always9~0_combout ),
  42807. .D(\macro_inst|trig_ctrl_inst|edge_trigger~2_combout ),
  42808. .Cin(),
  42809. .Qin(),
  42810. .Clk(),
  42811. .AsyncReset(),
  42812. .SyncReset(),
  42813. .ShiftData(),
  42814. .SyncLoad(),
  42815. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr[2]~1_combout ),
  42816. .Cout(),
  42817. .Q());
  42818. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .coord_x = 20;
  42819. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .coord_y = 7;
  42820. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .coord_z = 15;
  42821. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .mask = 16'hFAEA;
  42822. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .modeMux = 1'b0;
  42823. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .FeedbackMux = 1'b0;
  42824. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .ShiftMux = 1'b0;
  42825. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .BypassEn = 1'b0;
  42826. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~1 .CarryEnb = 1'b1;
  42827. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 (
  42828. .A(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  42829. .B(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  42830. .C(\macro_inst|trig_ctrl_inst|curr_state.SAMPLING~q ),
  42831. .D(\macro_inst|trig_ctrl_inst|trigger_ptr[2]~1_combout ),
  42832. .Cin(),
  42833. .Qin(),
  42834. .Clk(),
  42835. .AsyncReset(),
  42836. .SyncReset(),
  42837. .ShiftData(),
  42838. .SyncLoad(),
  42839. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout ),
  42840. .Cout(),
  42841. .Q());
  42842. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .coord_x = 20;
  42843. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .coord_y = 7;
  42844. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .coord_z = 13;
  42845. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .mask = 16'hECCC;
  42846. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .modeMux = 1'b0;
  42847. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .FeedbackMux = 1'b0;
  42848. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .ShiftMux = 1'b0;
  42849. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .BypassEn = 1'b0;
  42850. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[2]~2 .CarryEnb = 1'b1;
  42851. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[3] (
  42852. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42853. .B(vcc),
  42854. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42855. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [3]),
  42856. .Cin(),
  42857. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [3]),
  42858. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42859. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42860. .SyncReset(),
  42861. .ShiftData(),
  42862. .SyncLoad(),
  42863. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~5_combout ),
  42864. .Cout(),
  42865. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [3]));
  42866. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .coord_x = 20;
  42867. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .coord_y = 7;
  42868. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .coord_z = 3;
  42869. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .mask = 16'hAF00;
  42870. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .modeMux = 1'b0;
  42871. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .FeedbackMux = 1'b0;
  42872. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .ShiftMux = 1'b0;
  42873. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .BypassEn = 1'b0;
  42874. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[3] .CarryEnb = 1'b1;
  42875. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[4] (
  42876. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42877. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [4]),
  42878. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42879. .D(vcc),
  42880. .Cin(),
  42881. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [4]),
  42882. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42883. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42884. .SyncReset(),
  42885. .ShiftData(),
  42886. .SyncLoad(),
  42887. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~6_combout ),
  42888. .Cout(),
  42889. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [4]));
  42890. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .coord_x = 20;
  42891. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .coord_y = 7;
  42892. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .coord_z = 11;
  42893. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .mask = 16'h8C8C;
  42894. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .modeMux = 1'b0;
  42895. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .FeedbackMux = 1'b0;
  42896. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .ShiftMux = 1'b0;
  42897. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .BypassEn = 1'b0;
  42898. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[4] .CarryEnb = 1'b1;
  42899. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[5] (
  42900. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42901. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [5]),
  42902. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42903. .D(vcc),
  42904. .Cin(),
  42905. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [5]),
  42906. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42907. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42908. .SyncReset(),
  42909. .ShiftData(),
  42910. .SyncLoad(),
  42911. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~7_combout ),
  42912. .Cout(),
  42913. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [5]));
  42914. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .coord_x = 20;
  42915. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .coord_y = 7;
  42916. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .coord_z = 8;
  42917. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .mask = 16'h8C8C;
  42918. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .modeMux = 1'b0;
  42919. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .FeedbackMux = 1'b0;
  42920. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .ShiftMux = 1'b0;
  42921. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .BypassEn = 1'b0;
  42922. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[5] .CarryEnb = 1'b1;
  42923. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[6] (
  42924. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42925. .B(vcc),
  42926. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42927. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [6]),
  42928. .Cin(),
  42929. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [6]),
  42930. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42931. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42932. .SyncReset(),
  42933. .ShiftData(),
  42934. .SyncLoad(),
  42935. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~8_combout ),
  42936. .Cout(),
  42937. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [6]));
  42938. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .coord_x = 20;
  42939. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .coord_y = 7;
  42940. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .coord_z = 10;
  42941. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .mask = 16'hAF00;
  42942. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .modeMux = 1'b0;
  42943. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .FeedbackMux = 1'b0;
  42944. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .ShiftMux = 1'b0;
  42945. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .BypassEn = 1'b0;
  42946. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[6] .CarryEnb = 1'b1;
  42947. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[7] (
  42948. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42949. .B(vcc),
  42950. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42951. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [7]),
  42952. .Cin(),
  42953. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [7]),
  42954. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  42955. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  42956. .SyncReset(),
  42957. .ShiftData(),
  42958. .SyncLoad(),
  42959. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~9_combout ),
  42960. .Cout(),
  42961. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [7]));
  42962. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .coord_x = 20;
  42963. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .coord_y = 7;
  42964. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .coord_z = 14;
  42965. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .mask = 16'hAF00;
  42966. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .modeMux = 1'b0;
  42967. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .FeedbackMux = 1'b0;
  42968. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .ShiftMux = 1'b0;
  42969. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .BypassEn = 1'b0;
  42970. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[7] .CarryEnb = 1'b1;
  42971. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[8] (
  42972. .A(vcc),
  42973. .B(\macro_inst|trig_ctrl_inst|ram_wr_addr [8]),
  42974. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42975. .D(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42976. .Cin(),
  42977. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [8]),
  42978. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X61_Y5_SIG_SIG ),
  42979. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  42980. .SyncReset(),
  42981. .ShiftData(),
  42982. .SyncLoad(),
  42983. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~10_combout ),
  42984. .Cout(),
  42985. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [8]));
  42986. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .coord_x = 19;
  42987. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .coord_y = 7;
  42988. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .coord_z = 14;
  42989. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .mask = 16'hC0CC;
  42990. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .modeMux = 1'b0;
  42991. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .FeedbackMux = 1'b0;
  42992. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .ShiftMux = 1'b0;
  42993. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .BypassEn = 1'b0;
  42994. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[8] .CarryEnb = 1'b1;
  42995. alta_slice \macro_inst|trig_ctrl_inst|trigger_ptr[9] (
  42996. .A(\macro_inst|trig_ctrl_inst|adc_rst_sync3~q ),
  42997. .B(vcc),
  42998. .C(\macro_inst|trig_ctrl_inst|adc_rst_sync2~q ),
  42999. .D(\macro_inst|trig_ctrl_inst|ram_wr_addr [9]),
  43000. .Cin(),
  43001. .Qin(\macro_inst|trig_ctrl_inst|trigger_ptr [9]),
  43002. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|trig_ctrl_inst|trigger_ptr[2]~2_combout_X60_Y5_SIG_SIG ),
  43003. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  43004. .SyncReset(),
  43005. .ShiftData(),
  43006. .SyncLoad(),
  43007. .LutOut(\macro_inst|trig_ctrl_inst|trigger_ptr~11_combout ),
  43008. .Cout(),
  43009. .Q(\macro_inst|trig_ctrl_inst|trigger_ptr [9]));
  43010. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .coord_x = 20;
  43011. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .coord_y = 7;
  43012. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .coord_z = 0;
  43013. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .mask = 16'hAF00;
  43014. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .modeMux = 1'b0;
  43015. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .FeedbackMux = 1'b0;
  43016. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .ShiftMux = 1'b0;
  43017. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .BypassEn = 1'b0;
  43018. defparam \macro_inst|trig_ctrl_inst|trigger_ptr[9] .CarryEnb = 1'b1;
  43019. alta_slice \macro_inst|trig_ctrl_inst|write_strobe (
  43020. .A(\macro_inst|trig_ctrl_inst|always1~2_combout ),
  43021. .B(\macro_inst|trig_ctrl_inst|Add0~32_combout ),
  43022. .C(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  43023. .D(\macro_inst|trig_ctrl_inst|LessThan0~30_combout ),
  43024. .Cin(),
  43025. .Qin(\macro_inst|trig_ctrl_inst|write_strobe~q ),
  43026. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X60_Y3_SIG_VCC ),
  43027. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  43028. .SyncReset(),
  43029. .ShiftData(),
  43030. .SyncLoad(),
  43031. .LutOut(\macro_inst|trig_ctrl_inst|write_strobe~0_combout ),
  43032. .Cout(),
  43033. .Q(\macro_inst|trig_ctrl_inst|write_strobe~q ));
  43034. defparam \macro_inst|trig_ctrl_inst|write_strobe .coord_x = 18;
  43035. defparam \macro_inst|trig_ctrl_inst|write_strobe .coord_y = 6;
  43036. defparam \macro_inst|trig_ctrl_inst|write_strobe .coord_z = 9;
  43037. defparam \macro_inst|trig_ctrl_inst|write_strobe .mask = 16'h0004;
  43038. defparam \macro_inst|trig_ctrl_inst|write_strobe .modeMux = 1'b0;
  43039. defparam \macro_inst|trig_ctrl_inst|write_strobe .FeedbackMux = 1'b0;
  43040. defparam \macro_inst|trig_ctrl_inst|write_strobe .ShiftMux = 1'b0;
  43041. defparam \macro_inst|trig_ctrl_inst|write_strobe .BypassEn = 1'b0;
  43042. defparam \macro_inst|trig_ctrl_inst|write_strobe .CarryEnb = 1'b1;
  43043. alta_slice \macro_inst|u_apb2ram|ram_rden~0 (
  43044. .A(\macro_inst|ahb2apb_inst|penable~q ),
  43045. .B(\macro_inst|ahb2apb_inst|pwrite~q ),
  43046. .C(\macro_inst|mem_apb_psel~0_combout ),
  43047. .D(\macro_inst|ahb2apb_inst|paddr [14]),
  43048. .Cin(),
  43049. .Qin(),
  43050. .Clk(),
  43051. .AsyncReset(),
  43052. .SyncReset(),
  43053. .ShiftData(),
  43054. .SyncLoad(),
  43055. .LutOut(\macro_inst|u_apb2ram|ram_rden~0_combout ),
  43056. .Cout(),
  43057. .Q());
  43058. defparam \macro_inst|u_apb2ram|ram_rden~0 .coord_x = 14;
  43059. defparam \macro_inst|u_apb2ram|ram_rden~0 .coord_y = 6;
  43060. defparam \macro_inst|u_apb2ram|ram_rden~0 .coord_z = 2;
  43061. defparam \macro_inst|u_apb2ram|ram_rden~0 .mask = 16'h2000;
  43062. defparam \macro_inst|u_apb2ram|ram_rden~0 .modeMux = 1'b0;
  43063. defparam \macro_inst|u_apb2ram|ram_rden~0 .FeedbackMux = 1'b0;
  43064. defparam \macro_inst|u_apb2ram|ram_rden~0 .ShiftMux = 1'b0;
  43065. defparam \macro_inst|u_apb2ram|ram_rden~0 .BypassEn = 1'b0;
  43066. defparam \macro_inst|u_apb2ram|ram_rden~0 .CarryEnb = 1'b1;
  43067. alta_slice \macro_inst|u_apb2ram|ram_wren~0 (
  43068. .A(\macro_inst|ahb2apb_inst|penable~q ),
  43069. .B(\macro_inst|ahb2apb_inst|pwrite~q ),
  43070. .C(\macro_inst|mem_apb_psel~0_combout ),
  43071. .D(\macro_inst|ahb2apb_inst|paddr [14]),
  43072. .Cin(),
  43073. .Qin(),
  43074. .Clk(),
  43075. .AsyncReset(),
  43076. .SyncReset(),
  43077. .ShiftData(),
  43078. .SyncLoad(),
  43079. .LutOut(\macro_inst|u_apb2ram|ram_wren~0_combout ),
  43080. .Cout(),
  43081. .Q());
  43082. defparam \macro_inst|u_apb2ram|ram_wren~0 .coord_x = 14;
  43083. defparam \macro_inst|u_apb2ram|ram_wren~0 .coord_y = 6;
  43084. defparam \macro_inst|u_apb2ram|ram_wren~0 .coord_z = 3;
  43085. defparam \macro_inst|u_apb2ram|ram_wren~0 .mask = 16'h8000;
  43086. defparam \macro_inst|u_apb2ram|ram_wren~0 .modeMux = 1'b0;
  43087. defparam \macro_inst|u_apb2ram|ram_wren~0 .FeedbackMux = 1'b0;
  43088. defparam \macro_inst|u_apb2ram|ram_wren~0 .ShiftMux = 1'b0;
  43089. defparam \macro_inst|u_apb2ram|ram_wren~0 .BypassEn = 1'b0;
  43090. defparam \macro_inst|u_apb2ram|ram_wren~0 .CarryEnb = 1'b1;
  43091. alta_bram9k \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 (
  43092. .DataInA({\~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout }),
  43093. .DataInB({\macro_inst|trig_ctrl_inst|ram_wr_data_b [8], \macro_inst|trig_ctrl_inst|ram_wr_data_b [7], \macro_inst|trig_ctrl_inst|ram_wr_data_b [6], \macro_inst|trig_ctrl_inst|ram_wr_data_b [5], \macro_inst|trig_ctrl_inst|ram_wr_data_b [4], \macro_inst|trig_ctrl_inst|ram_wr_data_b [3], \macro_inst|trig_ctrl_inst|ram_wr_data_b [2], \macro_inst|trig_ctrl_inst|ram_wr_data_b [1], \macro_inst|trig_ctrl_inst|ram_wr_data_b [0], \macro_inst|trig_ctrl_inst|ram_wr_data_b [8], \macro_inst|trig_ctrl_inst|ram_wr_data_b [7], \macro_inst|trig_ctrl_inst|ram_wr_data_b [6], \macro_inst|trig_ctrl_inst|ram_wr_data_b [5], \macro_inst|trig_ctrl_inst|ram_wr_data_b [4], \macro_inst|trig_ctrl_inst|ram_wr_data_b [3], \macro_inst|trig_ctrl_inst|ram_wr_data_b [2], \macro_inst|trig_ctrl_inst|ram_wr_data_b [1], \macro_inst|trig_ctrl_inst|ram_wr_data_b [0]}),
  43094. .AddressA({\macro_inst|ahb2apb_inst|paddr [10], \macro_inst|ahb2apb_inst|paddr [9], \macro_inst|ahb2apb_inst|paddr [8], \macro_inst|ahb2apb_inst|paddr [7], \macro_inst|ahb2apb_inst|paddr [6], \macro_inst|ahb2apb_inst|paddr [5], \macro_inst|ahb2apb_inst|paddr [4], \macro_inst|ahb2apb_inst|paddr [3], \macro_inst|ahb2apb_inst|paddr [2], \macro_inst|ahb2apb_inst|paddr [1], vcc, vcc, vcc}),
  43095. .AddressB({\macro_inst|trig_ctrl_inst|ram_wr_addr [9], \macro_inst|trig_ctrl_inst|ram_wr_addr [8], \macro_inst|trig_ctrl_inst|ram_wr_addr [7], \macro_inst|trig_ctrl_inst|ram_wr_addr [6], \macro_inst|trig_ctrl_inst|ram_wr_addr [5], \macro_inst|trig_ctrl_inst|ram_wr_addr [4], \macro_inst|trig_ctrl_inst|ram_wr_addr [3], \macro_inst|trig_ctrl_inst|ram_wr_addr [2], \macro_inst|trig_ctrl_inst|ram_wr_addr [1], \macro_inst|trig_ctrl_inst|ram_wr_addr [0], vcc, vcc, vcc}),
  43096. .ByteEnA({vcc, vcc}),
  43097. .ByteEnB({vcc, vcc}),
  43098. .DataOutA({\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [17], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [16], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [15], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [14], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [13], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [12], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [11], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [10], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [9], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [8], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [7], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [6], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [5], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [4], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [3], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [2], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [1], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutA [0]}),
  43099. .DataOutB({\macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [17], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [16], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [15], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [14], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [13], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [12], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [11], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [10], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [9], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [8], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [7], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [6], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [5], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [4], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [3], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [2], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [1], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0__DataOutB [0]}),
  43100. .Clk0(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  43101. .ClkEn0(),
  43102. .AsyncReset0(gnd),
  43103. .Clk1(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  43104. .ClkEn1(),
  43105. .AsyncReset1(gnd),
  43106. .WeA(\macro_inst|u_apb2ram|ram_wren~0_combout ),
  43107. .ReA(\macro_inst|u_apb2ram|ram_rden~0_combout ),
  43108. .WeB(\macro_inst|trig_ctrl_inst|ram_wren_b~q ),
  43109. .ReB(gnd),
  43110. .AddressStallA(gnd),
  43111. .AddressStallB(gnd));
  43112. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .coord_x = 13;
  43113. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .coord_y = 4;
  43114. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .coord_z = 0;
  43115. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .CLKMODE = 2'b01;
  43116. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PACKEDMODE = 1'b0;
  43117. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_CLKIN_EN = 1'b0;
  43118. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_CLKOUT_EN = 1'b0;
  43119. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_CLKIN_EN = 1'b0;
  43120. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_CLKOUT_EN = 1'b0;
  43121. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_RSTIN_EN = 1'b0;
  43122. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_RSTOUT_EN = 1'b0;
  43123. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_RSTIN_EN = 1'b0;
  43124. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_RSTOUT_EN = 1'b0;
  43125. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_WIDTH = 5'b01000;
  43126. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_WIDTH = 5'b01000;
  43127. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_WRITETHRU = 1'b1;
  43128. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_WRITETHRU = 1'b1;
  43129. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTA_OUTREG = 1'b0;
  43130. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .PORTB_OUTREG = 1'b0;
  43131. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .RSEN_DLY = 2'b00;
  43132. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .DLYTIME = 2'b00;
  43133. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a0 .INIT_VAL = 9216'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
  43134. alta_bram9k \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 (
  43135. .DataInA({vcc, vcc, \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , vcc, vcc, \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout }),
  43136. .DataInB({vcc, vcc, \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \macro_inst|trig_ctrl_inst|ram_wr_data_b [11], \macro_inst|trig_ctrl_inst|ram_wr_data_b [10], \macro_inst|trig_ctrl_inst|ram_wr_data_b [9], vcc, vcc, \~GND~combout , \~GND~combout , \~GND~combout , \~GND~combout , \macro_inst|trig_ctrl_inst|ram_wr_data_b [11], \macro_inst|trig_ctrl_inst|ram_wr_data_b [10], \macro_inst|trig_ctrl_inst|ram_wr_data_b [9]}),
  43137. .AddressA({\macro_inst|ahb2apb_inst|paddr [10], \macro_inst|ahb2apb_inst|paddr [9], \macro_inst|ahb2apb_inst|paddr [8], \macro_inst|ahb2apb_inst|paddr [7], \macro_inst|ahb2apb_inst|paddr [6], \macro_inst|ahb2apb_inst|paddr [5], \macro_inst|ahb2apb_inst|paddr [4], \macro_inst|ahb2apb_inst|paddr [3], \macro_inst|ahb2apb_inst|paddr [2], \macro_inst|ahb2apb_inst|paddr [1], vcc, vcc, vcc}),
  43138. .AddressB({\macro_inst|trig_ctrl_inst|ram_wr_addr [9], \macro_inst|trig_ctrl_inst|ram_wr_addr [8], \macro_inst|trig_ctrl_inst|ram_wr_addr [7], \macro_inst|trig_ctrl_inst|ram_wr_addr [6], \macro_inst|trig_ctrl_inst|ram_wr_addr [5], \macro_inst|trig_ctrl_inst|ram_wr_addr [4], \macro_inst|trig_ctrl_inst|ram_wr_addr [3], \macro_inst|trig_ctrl_inst|ram_wr_addr [2], \macro_inst|trig_ctrl_inst|ram_wr_addr [1], \macro_inst|trig_ctrl_inst|ram_wr_addr [0], vcc, vcc, vcc}),
  43139. .ByteEnA({vcc, vcc}),
  43140. .ByteEnB({vcc, vcc}),
  43141. .DataOutA({\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [17], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [16], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [15], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [14], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [13], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [12], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [11], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [10], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [9], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [8], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [7], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [6], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [5], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [4], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [3], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [2], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [1], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutA [0]}),
  43142. .DataOutB({\macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [17], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [16], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [15], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [14], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [13], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [12], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [11], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [10], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [9], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [8], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [7], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [6], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [5], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [4], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [3], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [2], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [1], \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9__DataOutB [0]}),
  43143. .Clk0(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  43144. .ClkEn0(),
  43145. .AsyncReset0(gnd),
  43146. .Clk1(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  43147. .ClkEn1(),
  43148. .AsyncReset1(gnd),
  43149. .WeA(\macro_inst|u_apb2ram|ram_wren~0_combout ),
  43150. .ReA(\macro_inst|u_apb2ram|ram_rden~0_combout ),
  43151. .WeB(\macro_inst|trig_ctrl_inst|ram_wren_b~q ),
  43152. .ReB(gnd),
  43153. .AddressStallA(gnd),
  43154. .AddressStallB(gnd));
  43155. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .coord_x = 13;
  43156. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .coord_y = 3;
  43157. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .coord_z = 0;
  43158. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .CLKMODE = 2'b01;
  43159. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PACKEDMODE = 1'b0;
  43160. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_CLKIN_EN = 1'b0;
  43161. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_CLKOUT_EN = 1'b0;
  43162. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_CLKIN_EN = 1'b0;
  43163. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_CLKOUT_EN = 1'b0;
  43164. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_RSTIN_EN = 1'b0;
  43165. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_RSTOUT_EN = 1'b0;
  43166. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_RSTIN_EN = 1'b0;
  43167. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_RSTOUT_EN = 1'b0;
  43168. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_WIDTH = 5'b01000;
  43169. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_WIDTH = 5'b01000;
  43170. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_WRITETHRU = 1'b1;
  43171. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_WRITETHRU = 1'b1;
  43172. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTA_OUTREG = 1'b0;
  43173. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .PORTB_OUTREG = 1'b0;
  43174. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .RSEN_DLY = 2'b00;
  43175. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .DLYTIME = 2'b00;
  43176. defparam \macro_inst|u_dual_port_ram|auto_generated|ram_block1a9 .INIT_VAL = 9216'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000;
  43177. alta_pllve \pll_inst|auto_generated|pll1 (
  43178. .clkin(\PLL_CLKIN~input_o ),
  43179. .clkfb(\pll_inst|auto_generated|pll1~FBOUT ),
  43180. .pfden(vcc),
  43181. .resetn(!\PLL_ENABLE~combout ),
  43182. .phasecounterselect({gnd, gnd, gnd}),
  43183. .phaseupdown(gnd),
  43184. .phasestep(gnd),
  43185. .scanclk(gnd),
  43186. .scanclkena(vcc),
  43187. .scandata(gnd),
  43188. .configupdate(gnd),
  43189. .scandataout(),
  43190. .scandone(),
  43191. .phasedone(),
  43192. .clkout0(\pll_inst|auto_generated|pll1_CLK_bus [0]),
  43193. .clkout1(\pll_inst|auto_generated|pll1_CLK_bus [1]),
  43194. .clkout2(\pll_inst|auto_generated|pll1_CLK_bus [2]),
  43195. .clkout3(\pll_inst|auto_generated|pll1_CLK_bus [3]),
  43196. .clkout4(\pll_inst|auto_generated|pll1_CLK_bus [4]),
  43197. .clkfbout(\pll_inst|auto_generated|pll1~FBOUT ),
  43198. .lock(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp ));
  43199. defparam \pll_inst|auto_generated|pll1 .coord_x = 22;
  43200. defparam \pll_inst|auto_generated|pll1 .coord_y = 5;
  43201. defparam \pll_inst|auto_generated|pll1 .coord_z = 0;
  43202. defparam \pll_inst|auto_generated|pll1 .CLKIN_HIGH = 8'b11111111;
  43203. defparam \pll_inst|auto_generated|pll1 .CLKIN_LOW = 8'b11111111;
  43204. defparam \pll_inst|auto_generated|pll1 .CLKIN_TRIM = 1'b0;
  43205. defparam \pll_inst|auto_generated|pll1 .CLKIN_BYPASS = 1'b1;
  43206. defparam \pll_inst|auto_generated|pll1 .CLKFB_HIGH = 8'b00011001;
  43207. defparam \pll_inst|auto_generated|pll1 .CLKFB_LOW = 8'b00011001;
  43208. defparam \pll_inst|auto_generated|pll1 .CLKFB_TRIM = 1'b0;
  43209. defparam \pll_inst|auto_generated|pll1 .CLKFB_BYPASS = 1'b0;
  43210. defparam \pll_inst|auto_generated|pll1 .CLKDIV0_EN = 1'b1;
  43211. defparam \pll_inst|auto_generated|pll1 .CLKDIV1_EN = 1'b0;
  43212. defparam \pll_inst|auto_generated|pll1 .CLKDIV2_EN = 1'b0;
  43213. defparam \pll_inst|auto_generated|pll1 .CLKDIV3_EN = 1'b0;
  43214. defparam \pll_inst|auto_generated|pll1 .CLKDIV4_EN = 1'b0;
  43215. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_HIGH = 8'b00000001;
  43216. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_LOW = 8'b00000001;
  43217. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_TRIM = 1'b0;
  43218. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_BYPASS = 1'b0;
  43219. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_HIGH = 8'b11111111;
  43220. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_LOW = 8'b11111111;
  43221. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_TRIM = 1'b0;
  43222. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_BYPASS = 1'b0;
  43223. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_HIGH = 8'b11111111;
  43224. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_LOW = 8'b11111111;
  43225. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_TRIM = 1'b0;
  43226. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_BYPASS = 1'b0;
  43227. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_HIGH = 8'b11111111;
  43228. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_LOW = 8'b11111111;
  43229. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_TRIM = 1'b0;
  43230. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_BYPASS = 1'b0;
  43231. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_HIGH = 8'b11111111;
  43232. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_LOW = 8'b11111111;
  43233. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_TRIM = 1'b0;
  43234. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_BYPASS = 1'b0;
  43235. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_DEL = 8'b00000000;
  43236. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_DEL = 8'b00000000;
  43237. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_DEL = 8'b00000000;
  43238. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_DEL = 8'b00000000;
  43239. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_DEL = 8'b00000000;
  43240. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_PHASE = 3'b000;
  43241. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_PHASE = 3'b000;
  43242. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_PHASE = 3'b000;
  43243. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_PHASE = 3'b000;
  43244. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_PHASE = 3'b000;
  43245. defparam \pll_inst|auto_generated|pll1 .CLKFB_DEL = 8'b00000000;
  43246. defparam \pll_inst|auto_generated|pll1 .CLKFB_PHASE = 3'b000;
  43247. defparam \pll_inst|auto_generated|pll1 .FEEDBACK_MODE = 3'b100;
  43248. defparam \pll_inst|auto_generated|pll1 .FBDELAY_VAL = 3'b100;
  43249. defparam \pll_inst|auto_generated|pll1 .PLLOUTP_EN = 1'b0;
  43250. defparam \pll_inst|auto_generated|pll1 .PLLOUTN_EN = 1'b0;
  43251. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_CASCADE = 1'b0;
  43252. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_CASCADE = 1'b0;
  43253. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_CASCADE = 1'b0;
  43254. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_CASCADE = 1'b0;
  43255. defparam \pll_inst|auto_generated|pll1 .VCO_POST_DIV = 1'b1;
  43256. defparam \pll_inst|auto_generated|pll1 .REG_CTRL = 2'b00;
  43257. defparam \pll_inst|auto_generated|pll1 .CP = 3'b100;
  43258. defparam \pll_inst|auto_generated|pll1 .RREF = 2'b01;
  43259. defparam \pll_inst|auto_generated|pll1 .RVI = 2'b01;
  43260. defparam \pll_inst|auto_generated|pll1 .IVCO = 3'b010;
  43261. defparam \pll_inst|auto_generated|pll1 .PLL_EN_FLAG = 1'b1;
  43262. alta_slice \pll_inst|auto_generated|pll_lock_sync (
  43263. .A(vcc),
  43264. .B(vcc),
  43265. .C(vcc),
  43266. .D(vcc),
  43267. .Cin(),
  43268. .Qin(\pll_inst|auto_generated|pll_lock_sync~q ),
  43269. .Clk(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp_X46_Y1_SIG_VCC ),
  43270. .AsyncReset(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  43271. .SyncReset(),
  43272. .ShiftData(),
  43273. .SyncLoad(),
  43274. .LutOut(\pll_inst|auto_generated|pll_lock_sync~feeder_combout ),
  43275. .Cout(),
  43276. .Q(\pll_inst|auto_generated|pll_lock_sync~q ));
  43277. defparam \pll_inst|auto_generated|pll_lock_sync .coord_x = 20;
  43278. defparam \pll_inst|auto_generated|pll_lock_sync .coord_y = 3;
  43279. defparam \pll_inst|auto_generated|pll_lock_sync .coord_z = 15;
  43280. defparam \pll_inst|auto_generated|pll_lock_sync .mask = 16'hFFFF;
  43281. defparam \pll_inst|auto_generated|pll_lock_sync .modeMux = 1'b0;
  43282. defparam \pll_inst|auto_generated|pll_lock_sync .FeedbackMux = 1'b0;
  43283. defparam \pll_inst|auto_generated|pll_lock_sync .ShiftMux = 1'b0;
  43284. defparam \pll_inst|auto_generated|pll_lock_sync .BypassEn = 1'b0;
  43285. defparam \pll_inst|auto_generated|pll_lock_sync .CarryEnb = 1'b1;
  43286. alta_rv32 rv32(
  43287. .sys_clk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
  43288. .mem_ahb_hready(\rv32.mem_ahb_hready ),
  43289. .mem_ahb_hreadyout(!\macro_inst|ahb2apb_inst|hreadyout~q ),
  43290. .mem_ahb_htrans({\rv32.mem_ahb_htrans[1] , \rv32.mem_ahb_htrans[0] }),
  43291. .mem_ahb_hsize({\rv32.mem_ahb_hsize[2] , \rv32.mem_ahb_hsize[1] , \rv32.mem_ahb_hsize[0] }),
  43292. .mem_ahb_hburst({\rv32.mem_ahb_hburst[2] , \rv32.mem_ahb_hburst[1] , \rv32.mem_ahb_hburst[0] }),
  43293. .mem_ahb_hwrite(\rv32.mem_ahb_hwrite ),
  43294. .mem_ahb_haddr({\rv32.mem_ahb_haddr[31] , \rv32.mem_ahb_haddr[30] , \rv32.mem_ahb_haddr[29] , \rv32.mem_ahb_haddr[28] , \rv32.mem_ahb_haddr[27] , \rv32.mem_ahb_haddr[26] , \rv32.mem_ahb_haddr[25] , \rv32.mem_ahb_haddr[24] , \rv32.mem_ahb_haddr[23] , \rv32.mem_ahb_haddr[22] , \rv32.mem_ahb_haddr[21] , \rv32.mem_ahb_haddr[20] , \rv32.mem_ahb_haddr[19] , \rv32.mem_ahb_haddr[18] , \rv32.mem_ahb_haddr[17] , \rv32.mem_ahb_haddr[16] , \rv32.mem_ahb_haddr[15] , \rv32.mem_ahb_haddr[14] , \rv32.mem_ahb_haddr[13] , \rv32.mem_ahb_haddr[12] , \rv32.mem_ahb_haddr[11] , \rv32.mem_ahb_haddr[10] , \rv32.mem_ahb_haddr[9] , \rv32.mem_ahb_haddr[8] , \rv32.mem_ahb_haddr[7] , \rv32.mem_ahb_haddr[6] , \rv32.mem_ahb_haddr[5] , \rv32.mem_ahb_haddr[4] , \rv32.mem_ahb_haddr[3] , \rv32.mem_ahb_haddr[2] , \rv32.mem_ahb_haddr[1] , \rv32.mem_ahb_haddr[0] }),
  43295. .mem_ahb_hwdata({\rv32.mem_ahb_hwdata[31] , \rv32.mem_ahb_hwdata[30] , \rv32.mem_ahb_hwdata[29] , \rv32.mem_ahb_hwdata[28] , \rv32.mem_ahb_hwdata[27] , \rv32.mem_ahb_hwdata[26] , \rv32.mem_ahb_hwdata[25] , \rv32.mem_ahb_hwdata[24] , \rv32.mem_ahb_hwdata[23] , \rv32.mem_ahb_hwdata[22] , \rv32.mem_ahb_hwdata[21] , \rv32.mem_ahb_hwdata[20] , \rv32.mem_ahb_hwdata[19] , \rv32.mem_ahb_hwdata[18] , \rv32.mem_ahb_hwdata[17] , \rv32.mem_ahb_hwdata[16] , \rv32.mem_ahb_hwdata[15] , \rv32.mem_ahb_hwdata[14] , \rv32.mem_ahb_hwdata[13] , \rv32.mem_ahb_hwdata[12] , \rv32.mem_ahb_hwdata[11] , \rv32.mem_ahb_hwdata[10] , \rv32.mem_ahb_hwdata[9] , \rv32.mem_ahb_hwdata[8] , \rv32.mem_ahb_hwdata[7] , \rv32.mem_ahb_hwdata[6] , \rv32.mem_ahb_hwdata[5] , \rv32.mem_ahb_hwdata[4] , \rv32.mem_ahb_hwdata[3] , \rv32.mem_ahb_hwdata[2] , \rv32.mem_ahb_hwdata[1] , \rv32.mem_ahb_hwdata[0] }),
  43296. .mem_ahb_hresp(gnd),
  43297. .mem_ahb_hrdata({\macro_inst|ahb2apb_inst|prdata [31], \macro_inst|ahb2apb_inst|prdata [30], \macro_inst|ahb2apb_inst|prdata [29], \macro_inst|ahb2apb_inst|prdata [28], \macro_inst|ahb2apb_inst|prdata [27], \macro_inst|ahb2apb_inst|prdata [26], \macro_inst|ahb2apb_inst|prdata [25], \macro_inst|ahb2apb_inst|prdata [24], \macro_inst|ahb2apb_inst|prdata [23], \macro_inst|ahb2apb_inst|prdata [22], \macro_inst|ahb2apb_inst|prdata [21], \macro_inst|ahb2apb_inst|prdata [20], \macro_inst|ahb2apb_inst|prdata [19], \macro_inst|ahb2apb_inst|prdata [18], \macro_inst|ahb2apb_inst|prdata [17], \macro_inst|ahb2apb_inst|prdata [16], \macro_inst|ahb2apb_inst|prdata [15], \macro_inst|ahb2apb_inst|prdata [14], \macro_inst|ahb2apb_inst|prdata [13], \macro_inst|ahb2apb_inst|prdata [12], \macro_inst|ahb2apb_inst|prdata [11], \macro_inst|ahb2apb_inst|prdata [10], \macro_inst|ahb2apb_inst|prdata [9], \macro_inst|ahb2apb_inst|prdata [8], \macro_inst|ahb2apb_inst|prdata [7], \macro_inst|ahb2apb_inst|prdata [6], \macro_inst|ahb2apb_inst|prdata [5], \macro_inst|ahb2apb_inst|prdata [4], \macro_inst|ahb2apb_inst|prdata [3], \macro_inst|ahb2apb_inst|prdata [2], \macro_inst|ahb2apb_inst|prdata [1], \macro_inst|ahb2apb_inst|prdata [0]}),
  43298. .slave_ahb_hsel(gnd),
  43299. .slave_ahb_hready(vcc),
  43300. .slave_ahb_hreadyout(\rv32.slave_ahb_hreadyout ),
  43301. .slave_ahb_htrans({gnd, gnd}),
  43302. .slave_ahb_hsize({gnd, gnd, gnd}),
  43303. .slave_ahb_hburst({gnd, gnd, gnd}),
  43304. .slave_ahb_hwrite(gnd),
  43305. .slave_ahb_haddr({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43306. .slave_ahb_hwdata({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43307. .slave_ahb_hresp(\rv32.slave_ahb_hresp ),
  43308. .slave_ahb_hrdata({\rv32.slave_ahb_hrdata[31] , \rv32.slave_ahb_hrdata[30] , \rv32.slave_ahb_hrdata[29] , \rv32.slave_ahb_hrdata[28] , \rv32.slave_ahb_hrdata[27] , \rv32.slave_ahb_hrdata[26] , \rv32.slave_ahb_hrdata[25] , \rv32.slave_ahb_hrdata[24] , \rv32.slave_ahb_hrdata[23] , \rv32.slave_ahb_hrdata[22] , \rv32.slave_ahb_hrdata[21] , \rv32.slave_ahb_hrdata[20] , \rv32.slave_ahb_hrdata[19] , \rv32.slave_ahb_hrdata[18] , \rv32.slave_ahb_hrdata[17] , \rv32.slave_ahb_hrdata[16] , \rv32.slave_ahb_hrdata[15] , \rv32.slave_ahb_hrdata[14] , \rv32.slave_ahb_hrdata[13] , \rv32.slave_ahb_hrdata[12] , \rv32.slave_ahb_hrdata[11] , \rv32.slave_ahb_hrdata[10] , \rv32.slave_ahb_hrdata[9] , \rv32.slave_ahb_hrdata[8] , \rv32.slave_ahb_hrdata[7] , \rv32.slave_ahb_hrdata[6] , \rv32.slave_ahb_hrdata[5] , \rv32.slave_ahb_hrdata[4] , \rv32.slave_ahb_hrdata[3] , \rv32.slave_ahb_hrdata[2] , \rv32.slave_ahb_hrdata[1] , \rv32.slave_ahb_hrdata[0] }),
  43309. .gpio0_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, \SPI0_SI_IO0~input_o }),
  43310. .gpio0_io_out_data({\rv32.gpio0_io_out_data[7] , \rv32.gpio0_io_out_data[6] , \rv32.gpio0_io_out_data[5] , \rv32.gpio0_io_out_data[4] , \rv32.gpio0_io_out_data[3] , \rv32.gpio0_io_out_data[2] , \rv32.gpio0_io_out_data[1] , \rv32.gpio0_io_out_data[0] }),
  43311. .gpio0_io_out_en({\rv32.gpio0_io_out_en[7] , \rv32.gpio0_io_out_en[6] , \rv32.gpio0_io_out_en[5] , \rv32.gpio0_io_out_en[4] , \rv32.gpio0_io_out_en[3] , \rv32.gpio0_io_out_en[2] , \rv32.gpio0_io_out_en[1] , \rv32.gpio0_io_out_en[0] }),
  43312. .gpio1_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43313. .gpio1_io_out_data({\rv32.gpio1_io_out_data[7] , \rv32.gpio1_io_out_data[6] , \rv32.gpio1_io_out_data[5] , \rv32.gpio1_io_out_data[4] , \rv32.gpio1_io_out_data[3] , \rv32.gpio1_io_out_data[2] , \rv32.gpio1_io_out_data[1] , \rv32.gpio1_io_out_data[0] }),
  43314. .gpio1_io_out_en({\rv32.gpio1_io_out_en[7] , \rv32.gpio1_io_out_en[6] , \rv32.gpio1_io_out_en[5] , \rv32.gpio1_io_out_en[4] , \rv32.gpio1_io_out_en[3] , \rv32.gpio1_io_out_en[2] , \rv32.gpio1_io_out_en[1] , \rv32.gpio1_io_out_en[0] }),
  43315. .sys_ctrl_clkSource({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
  43316. .sys_ctrl_hseEnable(\rv32.sys_ctrl_hseEnable ),
  43317. .sys_ctrl_hseBypass(\rv32.sys_ctrl_hseBypass ),
  43318. .sys_ctrl_pllEnable(\rv32.sys_ctrl_pllEnable ),
  43319. .sys_ctrl_pllReady(\auto_generated_inst.hbo_13_a8f89aa4d95b80e7_bp ),
  43320. .sys_ctrl_sleep(\rv32.sys_ctrl_sleep ),
  43321. .sys_ctrl_stop(\rv32.sys_ctrl_stop ),
  43322. .sys_ctrl_standby(\rv32.sys_ctrl_standby ),
  43323. .gpio2_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43324. .gpio2_io_out_data({\rv32.gpio2_io_out_data[7] , \rv32.gpio2_io_out_data[6] , \rv32.gpio2_io_out_data[5] , \rv32.gpio2_io_out_data[4] , \rv32.gpio2_io_out_data[3] , \rv32.gpio2_io_out_data[2] , \rv32.gpio2_io_out_data[1] , \rv32.gpio2_io_out_data[0] }),
  43325. .gpio2_io_out_en({\rv32.gpio2_io_out_en[7] , \rv32.gpio2_io_out_en[6] , \rv32.gpio2_io_out_en[5] , \rv32.gpio2_io_out_en[4] , \rv32.gpio2_io_out_en[3] , \rv32.gpio2_io_out_en[2] , \rv32.gpio2_io_out_en[1] , \rv32.gpio2_io_out_en[0] }),
  43326. .gpio3_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43327. .gpio3_io_out_data({\rv32.gpio3_io_out_data[7] , \rv32.gpio3_io_out_data[6] , \rv32.gpio3_io_out_data[5] , \rv32.gpio3_io_out_data[4] , \rv32.gpio3_io_out_data[3] , \rv32.gpio3_io_out_data[2] , \rv32.gpio3_io_out_data[1] , \rv32.gpio3_io_out_data[0] }),
  43328. .gpio3_io_out_en({\rv32.gpio3_io_out_en[7] , \rv32.gpio3_io_out_en[6] , \rv32.gpio3_io_out_en[5] , \rv32.gpio3_io_out_en[4] , \rv32.gpio3_io_out_en[3] , \rv32.gpio3_io_out_en[2] , \rv32.gpio3_io_out_en[1] , \rv32.gpio3_io_out_en[0] }),
  43329. .gpio4_io_in({gnd, gnd, gnd, gnd, gnd, \GPIO4_2~input_o , \GPIO4_1~input_o , gnd}),
  43330. .gpio4_io_out_data({\rv32.gpio4_io_out_data[7] , \rv32.gpio4_io_out_data[6] , \rv32.gpio4_io_out_data[5] , \rv32.gpio4_io_out_data[4] , \rv32.gpio4_io_out_data[3] , \rv32.gpio4_io_out_data[2] , \rv32.gpio4_io_out_data[1] , \rv32.gpio4_io_out_data[0] }),
  43331. .gpio4_io_out_en({\rv32.gpio4_io_out_en[7] , \rv32.gpio4_io_out_en[6] , \rv32.gpio4_io_out_en[5] , \rv32.gpio4_io_out_en[4] , \rv32.gpio4_io_out_en[3] , \rv32.gpio4_io_out_en[2] , \rv32.gpio4_io_out_en[1] , \rv32.gpio4_io_out_en[0] }),
  43332. .gpio5_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43333. .gpio5_io_out_data({\rv32.gpio5_io_out_data[7] , \rv32.gpio5_io_out_data[6] , \rv32.gpio5_io_out_data[5] , \rv32.gpio5_io_out_data[4] , \rv32.gpio5_io_out_data[3] , \rv32.gpio5_io_out_data[2] , \rv32.gpio5_io_out_data[1] , \rv32.gpio5_io_out_data[0] }),
  43334. .gpio5_io_out_en({\rv32.gpio5_io_out_en[7] , \rv32.gpio5_io_out_en[6] , \rv32.gpio5_io_out_en[5] , \rv32.gpio5_io_out_en[4] , \rv32.gpio5_io_out_en[3] , \rv32.gpio5_io_out_en[2] , \rv32.gpio5_io_out_en[1] , \rv32.gpio5_io_out_en[0] }),
  43335. .gpio6_io_in({gnd, gnd, gnd, gnd, \UART1_RX~input_o , gnd, \UART0_UARTRXD~input_o , gnd}),
  43336. .gpio6_io_out_data({\rv32.gpio6_io_out_data[7] , \rv32.gpio6_io_out_data[6] , \rv32.gpio6_io_out_data[5] , \rv32.gpio6_io_out_data[4] , \rv32.gpio6_io_out_data[3] , \rv32.gpio6_io_out_data[2] , \rv32.gpio6_io_out_data[1] , \rv32.gpio6_io_out_data[0] }),
  43337. .gpio6_io_out_en({\rv32.gpio6_io_out_en[7] , \rv32.gpio6_io_out_en[6] , \rv32.gpio6_io_out_en[5] , \rv32.gpio6_io_out_en[4] , \rv32.gpio6_io_out_en[3] , \rv32.gpio6_io_out_en[2] , \rv32.gpio6_io_out_en[1] , \rv32.gpio6_io_out_en[0] }),
  43338. .gpio7_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43339. .gpio7_io_out_data({\rv32.gpio7_io_out_data[7] , \rv32.gpio7_io_out_data[6] , \rv32.gpio7_io_out_data[5] , \rv32.gpio7_io_out_data[4] , \rv32.gpio7_io_out_data[3] , \rv32.gpio7_io_out_data[2] , \rv32.gpio7_io_out_data[1] , \rv32.gpio7_io_out_data[0] }),
  43340. .gpio7_io_out_en({\rv32.gpio7_io_out_en[7] , \rv32.gpio7_io_out_en[6] , \rv32.gpio7_io_out_en[5] , \rv32.gpio7_io_out_en[4] , \rv32.gpio7_io_out_en[3] , \rv32.gpio7_io_out_en[2] , \rv32.gpio7_io_out_en[1] , \rv32.gpio7_io_out_en[0] }),
  43341. .gpio8_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43342. .gpio8_io_out_data({\rv32.gpio8_io_out_data[7] , \rv32.gpio8_io_out_data[6] , \rv32.gpio8_io_out_data[5] , \rv32.gpio8_io_out_data[4] , \rv32.gpio8_io_out_data[3] , \rv32.gpio8_io_out_data[2] , \rv32.gpio8_io_out_data[1] , \rv32.gpio8_io_out_data[0] }),
  43343. .gpio8_io_out_en({\rv32.gpio8_io_out_en[7] , \rv32.gpio8_io_out_en[6] , \rv32.gpio8_io_out_en[5] , \rv32.gpio8_io_out_en[4] , \rv32.gpio8_io_out_en[3] , \rv32.gpio8_io_out_en[2] , \rv32.gpio8_io_out_en[1] , \rv32.gpio8_io_out_en[0] }),
  43344. .gpio9_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43345. .gpio9_io_out_data({\rv32.gpio9_io_out_data[7] , \rv32.gpio9_io_out_data[6] , \rv32.gpio9_io_out_data[5] , \rv32.gpio9_io_out_data[4] , \rv32.gpio9_io_out_data[3] , \rv32.gpio9_io_out_data[2] , \rv32.gpio9_io_out_data[1] , \rv32.gpio9_io_out_data[0] }),
  43346. .gpio9_io_out_en({\rv32.gpio9_io_out_en[7] , \rv32.gpio9_io_out_en[6] , \rv32.gpio9_io_out_en[5] , \rv32.gpio9_io_out_en[4] , \rv32.gpio9_io_out_en[3] , \rv32.gpio9_io_out_en[2] , \rv32.gpio9_io_out_en[1] , \rv32.gpio9_io_out_en[0] }),
  43347. .ext_resetn(vcc),
  43348. .resetn_out(\rv32.resetn_out ),
  43349. .dmactive(\rv32.dmactive ),
  43350. .swj_JTAGNSW(\rv32.swj_JTAGNSW ),
  43351. .swj_JTAGSTATE({\rv32.swj_JTAGSTATE[3] , \rv32.swj_JTAGSTATE[2] , \rv32.swj_JTAGSTATE[1] , \rv32.swj_JTAGSTATE[0] }),
  43352. .swj_JTAGIR({\rv32.swj_JTAGIR[3] , \rv32.swj_JTAGIR[2] , \rv32.swj_JTAGIR[1] , \rv32.swj_JTAGIR[0] }),
  43353. .ext_int({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  43354. .ext_dma_DMACBREQ({gnd, gnd, gnd, gnd}),
  43355. .ext_dma_DMACLBREQ({gnd, gnd, gnd, gnd}),
  43356. .ext_dma_DMACSREQ({gnd, gnd, gnd, gnd}),
  43357. .ext_dma_DMACLSREQ({gnd, gnd, gnd, gnd}),
  43358. .ext_dma_DMACCLR({\rv32.ext_dma_DMACCLR[3] , \rv32.ext_dma_DMACCLR[2] , \rv32.ext_dma_DMACCLR[1] , \rv32.ext_dma_DMACCLR[0] }),
  43359. .ext_dma_DMACTC({\rv32.ext_dma_DMACTC[3] , \rv32.ext_dma_DMACTC[2] , \rv32.ext_dma_DMACTC[1] , \rv32.ext_dma_DMACTC[0] }),
  43360. .local_int({gnd, gnd, gnd, gnd}),
  43361. .test_mode({gnd, gnd}),
  43362. .usb0_xcvr_clk(vcc),
  43363. .usb0_id(vcc));
  43364. defparam rv32.coord_x = 0;
  43365. defparam rv32.coord_y = 5;
  43366. defparam rv32.coord_z = 0;
  43367. alta_rio \so_io1~output (
  43368. .padio(so_io1),
  43369. .datain(gnd),
  43370. .oe(gnd),
  43371. .outclk(gnd),
  43372. .outclkena(vcc),
  43373. .inclk(gnd),
  43374. .inclkena(vcc),
  43375. .areset(gnd),
  43376. .sreset(gnd),
  43377. .combout(\so_io1~input_o ),
  43378. .regout());
  43379. defparam \so_io1~output .coord_x = 22;
  43380. defparam \so_io1~output .coord_y = 2;
  43381. defparam \so_io1~output .coord_z = 3;
  43382. defparam \so_io1~output .IN_ASYNC_MODE = 1'b0;
  43383. defparam \so_io1~output .IN_SYNC_MODE = 1'b0;
  43384. defparam \so_io1~output .IN_POWERUP = 1'b0;
  43385. defparam \so_io1~output .OUT_REG_MODE = 1'b0;
  43386. defparam \so_io1~output .OUT_ASYNC_MODE = 1'b0;
  43387. defparam \so_io1~output .OUT_SYNC_MODE = 1'b0;
  43388. defparam \so_io1~output .OUT_POWERUP = 1'b0;
  43389. defparam \so_io1~output .OE_REG_MODE = 1'b0;
  43390. defparam \so_io1~output .OE_ASYNC_MODE = 1'b0;
  43391. defparam \so_io1~output .OE_SYNC_MODE = 1'b0;
  43392. defparam \so_io1~output .OE_POWERUP = 1'b0;
  43393. defparam \so_io1~output .CFG_TRI_INPUT = 1'b0;
  43394. defparam \so_io1~output .CFG_INPUT_EN = 1'b0;
  43395. defparam \so_io1~output .CFG_PULL_UP = 1'b0;
  43396. defparam \so_io1~output .CFG_SLR = 1'b0;
  43397. defparam \so_io1~output .CFG_OPEN_DRAIN = 1'b0;
  43398. defparam \so_io1~output .CFG_PDRCTRL = 4'b0100;
  43399. defparam \so_io1~output .CFG_KEEP = 2'b00;
  43400. defparam \so_io1~output .CFG_LVDS_OUT_EN = 1'b0;
  43401. defparam \so_io1~output .CFG_LVDS_SEL_CUA = 2'b00;
  43402. defparam \so_io1~output .CFG_LVDS_IREF = 10'b0110000000;
  43403. defparam \so_io1~output .CFG_LVDS_IN_EN = 1'b0;
  43404. defparam \so_io1~output .DPCLK_DELAY = 4'b0000;
  43405. defparam \so_io1~output .OUT_DELAY = 1'b0;
  43406. defparam \so_io1~output .IN_DATA_DELAY = 3'b000;
  43407. defparam \so_io1~output .IN_REG_DELAY = 3'b000;
  43408. alta_syncctrl syncload_ctrl_X56_Y11(
  43409. .Din(\macro_inst|mem_apb_psel~combout ),
  43410. .Dout(\macro_inst|mem_apb_psel~combout__SyncLoad_X56_Y11_SIG ));
  43411. defparam syncload_ctrl_X56_Y11.coord_x = 15;
  43412. defparam syncload_ctrl_X56_Y11.coord_y = 11;
  43413. defparam syncload_ctrl_X56_Y11.coord_z = 1;
  43414. defparam syncload_ctrl_X56_Y11.SyncCtrlMux = 2'b10;
  43415. alta_syncctrl syncload_ctrl_X56_Y4(
  43416. .Din(),
  43417. .Dout(SyncLoad_X56_Y4_VCC));
  43418. defparam syncload_ctrl_X56_Y4.coord_x = 20;
  43419. defparam syncload_ctrl_X56_Y4.coord_y = 5;
  43420. defparam syncload_ctrl_X56_Y4.coord_z = 1;
  43421. defparam syncload_ctrl_X56_Y4.SyncCtrlMux = 2'b01;
  43422. alta_syncctrl syncload_ctrl_X56_Y8(
  43423. .Din(),
  43424. .Dout(SyncLoad_X56_Y8_VCC));
  43425. defparam syncload_ctrl_X56_Y8.coord_x = 15;
  43426. defparam syncload_ctrl_X56_Y8.coord_y = 6;
  43427. defparam syncload_ctrl_X56_Y8.coord_z = 1;
  43428. defparam syncload_ctrl_X56_Y8.SyncCtrlMux = 2'b01;
  43429. alta_syncctrl syncload_ctrl_X57_Y11(
  43430. .Din(),
  43431. .Dout(SyncLoad_X57_Y11_VCC));
  43432. defparam syncload_ctrl_X57_Y11.coord_x = 16;
  43433. defparam syncload_ctrl_X57_Y11.coord_y = 11;
  43434. defparam syncload_ctrl_X57_Y11.coord_z = 1;
  43435. defparam syncload_ctrl_X57_Y11.SyncCtrlMux = 2'b01;
  43436. alta_syncctrl syncload_ctrl_X57_Y3(
  43437. .Din(),
  43438. .Dout(SyncLoad_X57_Y3_VCC));
  43439. defparam syncload_ctrl_X57_Y3.coord_x = 17;
  43440. defparam syncload_ctrl_X57_Y3.coord_y = 2;
  43441. defparam syncload_ctrl_X57_Y3.coord_z = 1;
  43442. defparam syncload_ctrl_X57_Y3.SyncCtrlMux = 2'b01;
  43443. alta_syncctrl syncload_ctrl_X57_Y4(
  43444. .Din(),
  43445. .Dout(SyncLoad_X57_Y4_VCC));
  43446. defparam syncload_ctrl_X57_Y4.coord_x = 19;
  43447. defparam syncload_ctrl_X57_Y4.coord_y = 5;
  43448. defparam syncload_ctrl_X57_Y4.coord_z = 1;
  43449. defparam syncload_ctrl_X57_Y4.SyncCtrlMux = 2'b01;
  43450. alta_syncctrl syncload_ctrl_X57_Y6(
  43451. .Din(),
  43452. .Dout(SyncLoad_X57_Y6_VCC));
  43453. defparam syncload_ctrl_X57_Y6.coord_x = 14;
  43454. defparam syncload_ctrl_X57_Y6.coord_y = 5;
  43455. defparam syncload_ctrl_X57_Y6.coord_z = 1;
  43456. defparam syncload_ctrl_X57_Y6.SyncCtrlMux = 2'b01;
  43457. alta_syncctrl syncload_ctrl_X57_Y8(
  43458. .Din(),
  43459. .Dout(SyncLoad_X57_Y8_VCC));
  43460. defparam syncload_ctrl_X57_Y8.coord_x = 15;
  43461. defparam syncload_ctrl_X57_Y8.coord_y = 8;
  43462. defparam syncload_ctrl_X57_Y8.coord_z = 1;
  43463. defparam syncload_ctrl_X57_Y8.SyncCtrlMux = 2'b01;
  43464. alta_syncctrl syncload_ctrl_X57_Y9(
  43465. .Din(),
  43466. .Dout(SyncLoad_X57_Y9_VCC));
  43467. defparam syncload_ctrl_X57_Y9.coord_x = 14;
  43468. defparam syncload_ctrl_X57_Y9.coord_y = 6;
  43469. defparam syncload_ctrl_X57_Y9.coord_z = 1;
  43470. defparam syncload_ctrl_X57_Y9.SyncCtrlMux = 2'b01;
  43471. alta_syncctrl syncload_ctrl_X58_Y10(
  43472. .Din(),
  43473. .Dout(SyncLoad_X58_Y10_GND));
  43474. defparam syncload_ctrl_X58_Y10.coord_x = 15;
  43475. defparam syncload_ctrl_X58_Y10.coord_y = 9;
  43476. defparam syncload_ctrl_X58_Y10.coord_z = 1;
  43477. defparam syncload_ctrl_X58_Y10.SyncCtrlMux = 2'b00;
  43478. alta_syncctrl syncload_ctrl_X58_Y11(
  43479. .Din(),
  43480. .Dout(SyncLoad_X58_Y11_GND));
  43481. defparam syncload_ctrl_X58_Y11.coord_x = 15;
  43482. defparam syncload_ctrl_X58_Y11.coord_y = 10;
  43483. defparam syncload_ctrl_X58_Y11.coord_z = 1;
  43484. defparam syncload_ctrl_X58_Y11.SyncCtrlMux = 2'b00;
  43485. alta_syncctrl syncload_ctrl_X58_Y12(
  43486. .Din(),
  43487. .Dout(SyncLoad_X58_Y12_VCC));
  43488. defparam syncload_ctrl_X58_Y12.coord_x = 15;
  43489. defparam syncload_ctrl_X58_Y12.coord_y = 12;
  43490. defparam syncload_ctrl_X58_Y12.coord_z = 1;
  43491. defparam syncload_ctrl_X58_Y12.SyncCtrlMux = 2'b01;
  43492. alta_syncctrl syncload_ctrl_X58_Y4(
  43493. .Din(),
  43494. .Dout(SyncLoad_X58_Y4_VCC));
  43495. defparam syncload_ctrl_X58_Y4.coord_x = 19;
  43496. defparam syncload_ctrl_X58_Y4.coord_y = 4;
  43497. defparam syncload_ctrl_X58_Y4.coord_z = 1;
  43498. defparam syncload_ctrl_X58_Y4.SyncCtrlMux = 2'b01;
  43499. alta_syncctrl syncload_ctrl_X58_Y6(
  43500. .Din(),
  43501. .Dout(SyncLoad_X58_Y6_GND));
  43502. defparam syncload_ctrl_X58_Y6.coord_x = 20;
  43503. defparam syncload_ctrl_X58_Y6.coord_y = 8;
  43504. defparam syncload_ctrl_X58_Y6.coord_z = 1;
  43505. defparam syncload_ctrl_X58_Y6.SyncCtrlMux = 2'b00;
  43506. alta_syncctrl syncload_ctrl_X58_Y7(
  43507. .Din(),
  43508. .Dout(SyncLoad_X58_Y7_GND));
  43509. defparam syncload_ctrl_X58_Y7.coord_x = 20;
  43510. defparam syncload_ctrl_X58_Y7.coord_y = 10;
  43511. defparam syncload_ctrl_X58_Y7.coord_z = 1;
  43512. defparam syncload_ctrl_X58_Y7.SyncCtrlMux = 2'b00;
  43513. alta_syncctrl syncload_ctrl_X58_Y9(
  43514. .Din(),
  43515. .Dout(SyncLoad_X58_Y9_VCC));
  43516. defparam syncload_ctrl_X58_Y9.coord_x = 16;
  43517. defparam syncload_ctrl_X58_Y9.coord_y = 10;
  43518. defparam syncload_ctrl_X58_Y9.coord_z = 1;
  43519. defparam syncload_ctrl_X58_Y9.SyncCtrlMux = 2'b01;
  43520. alta_syncctrl syncload_ctrl_X59_Y10(
  43521. .Din(),
  43522. .Dout(SyncLoad_X59_Y10_VCC));
  43523. defparam syncload_ctrl_X59_Y10.coord_x = 14;
  43524. defparam syncload_ctrl_X59_Y10.coord_y = 12;
  43525. defparam syncload_ctrl_X59_Y10.coord_z = 1;
  43526. defparam syncload_ctrl_X59_Y10.SyncCtrlMux = 2'b01;
  43527. alta_syncctrl syncload_ctrl_X59_Y11(
  43528. .Din(),
  43529. .Dout(SyncLoad_X59_Y11_VCC));
  43530. defparam syncload_ctrl_X59_Y11.coord_x = 18;
  43531. defparam syncload_ctrl_X59_Y11.coord_y = 10;
  43532. defparam syncload_ctrl_X59_Y11.coord_z = 1;
  43533. defparam syncload_ctrl_X59_Y11.SyncCtrlMux = 2'b01;
  43534. alta_syncctrl syncload_ctrl_X59_Y12(
  43535. .Din(),
  43536. .Dout(SyncLoad_X59_Y12_VCC));
  43537. defparam syncload_ctrl_X59_Y12.coord_x = 16;
  43538. defparam syncload_ctrl_X59_Y12.coord_y = 12;
  43539. defparam syncload_ctrl_X59_Y12.coord_z = 1;
  43540. defparam syncload_ctrl_X59_Y12.SyncCtrlMux = 2'b01;
  43541. alta_syncctrl syncload_ctrl_X59_Y3(
  43542. .Din(),
  43543. .Dout(SyncLoad_X59_Y3_GND));
  43544. defparam syncload_ctrl_X59_Y3.coord_x = 15;
  43545. defparam syncload_ctrl_X59_Y3.coord_y = 7;
  43546. defparam syncload_ctrl_X59_Y3.coord_z = 1;
  43547. defparam syncload_ctrl_X59_Y3.SyncCtrlMux = 2'b00;
  43548. alta_syncctrl syncload_ctrl_X59_Y4(
  43549. .Din(),
  43550. .Dout(SyncLoad_X59_Y4_VCC));
  43551. defparam syncload_ctrl_X59_Y4.coord_x = 20;
  43552. defparam syncload_ctrl_X59_Y4.coord_y = 4;
  43553. defparam syncload_ctrl_X59_Y4.coord_z = 1;
  43554. defparam syncload_ctrl_X59_Y4.SyncCtrlMux = 2'b01;
  43555. alta_syncctrl syncload_ctrl_X59_Y5(
  43556. .Din(),
  43557. .Dout(SyncLoad_X59_Y5_GND));
  43558. defparam syncload_ctrl_X59_Y5.coord_x = 19;
  43559. defparam syncload_ctrl_X59_Y5.coord_y = 6;
  43560. defparam syncload_ctrl_X59_Y5.coord_z = 1;
  43561. defparam syncload_ctrl_X59_Y5.SyncCtrlMux = 2'b00;
  43562. alta_syncctrl syncload_ctrl_X59_Y6(
  43563. .Din(),
  43564. .Dout(SyncLoad_X59_Y6_VCC));
  43565. defparam syncload_ctrl_X59_Y6.coord_x = 18;
  43566. defparam syncload_ctrl_X59_Y6.coord_y = 8;
  43567. defparam syncload_ctrl_X59_Y6.coord_z = 1;
  43568. defparam syncload_ctrl_X59_Y6.SyncCtrlMux = 2'b01;
  43569. alta_syncctrl syncload_ctrl_X59_Y7(
  43570. .Din(),
  43571. .Dout(SyncLoad_X59_Y7_VCC));
  43572. defparam syncload_ctrl_X59_Y7.coord_x = 20;
  43573. defparam syncload_ctrl_X59_Y7.coord_y = 6;
  43574. defparam syncload_ctrl_X59_Y7.coord_z = 1;
  43575. defparam syncload_ctrl_X59_Y7.SyncCtrlMux = 2'b01;
  43576. alta_syncctrl syncload_ctrl_X59_Y8(
  43577. .Din(\macro_inst|mem_apb_psel~combout ),
  43578. .Dout(\macro_inst|mem_apb_psel~combout__SyncLoad_X59_Y8_SIG ));
  43579. defparam syncload_ctrl_X59_Y8.coord_x = 17;
  43580. defparam syncload_ctrl_X59_Y8.coord_y = 11;
  43581. defparam syncload_ctrl_X59_Y8.coord_z = 1;
  43582. defparam syncload_ctrl_X59_Y8.SyncCtrlMux = 2'b10;
  43583. alta_syncctrl syncload_ctrl_X60_Y10(
  43584. .Din(),
  43585. .Dout(SyncLoad_X60_Y10_VCC));
  43586. defparam syncload_ctrl_X60_Y10.coord_x = 17;
  43587. defparam syncload_ctrl_X60_Y10.coord_y = 12;
  43588. defparam syncload_ctrl_X60_Y10.coord_z = 1;
  43589. defparam syncload_ctrl_X60_Y10.SyncCtrlMux = 2'b01;
  43590. alta_syncctrl syncload_ctrl_X60_Y11(
  43591. .Din(),
  43592. .Dout(SyncLoad_X60_Y11_VCC));
  43593. defparam syncload_ctrl_X60_Y11.coord_x = 17;
  43594. defparam syncload_ctrl_X60_Y11.coord_y = 9;
  43595. defparam syncload_ctrl_X60_Y11.coord_z = 1;
  43596. defparam syncload_ctrl_X60_Y11.SyncCtrlMux = 2'b01;
  43597. alta_syncctrl syncload_ctrl_X60_Y3(
  43598. .Din(),
  43599. .Dout(SyncLoad_X60_Y3_VCC));
  43600. defparam syncload_ctrl_X60_Y3.coord_x = 18;
  43601. defparam syncload_ctrl_X60_Y3.coord_y = 6;
  43602. defparam syncload_ctrl_X60_Y3.coord_z = 1;
  43603. defparam syncload_ctrl_X60_Y3.SyncCtrlMux = 2'b01;
  43604. alta_syncctrl syncload_ctrl_X60_Y6(
  43605. .Din(),
  43606. .Dout(SyncLoad_X60_Y6_VCC));
  43607. defparam syncload_ctrl_X60_Y6.coord_x = 19;
  43608. defparam syncload_ctrl_X60_Y6.coord_y = 8;
  43609. defparam syncload_ctrl_X60_Y6.coord_z = 1;
  43610. defparam syncload_ctrl_X60_Y6.SyncCtrlMux = 2'b01;
  43611. alta_syncctrl syncload_ctrl_X60_Y7(
  43612. .Din(),
  43613. .Dout(SyncLoad_X60_Y7_VCC));
  43614. defparam syncload_ctrl_X60_Y7.coord_x = 19;
  43615. defparam syncload_ctrl_X60_Y7.coord_y = 9;
  43616. defparam syncload_ctrl_X60_Y7.coord_z = 1;
  43617. defparam syncload_ctrl_X60_Y7.SyncCtrlMux = 2'b01;
  43618. alta_syncctrl syncload_ctrl_X60_Y8(
  43619. .Din(),
  43620. .Dout(SyncLoad_X60_Y8_VCC));
  43621. defparam syncload_ctrl_X60_Y8.coord_x = 19;
  43622. defparam syncload_ctrl_X60_Y8.coord_y = 10;
  43623. defparam syncload_ctrl_X60_Y8.coord_z = 1;
  43624. defparam syncload_ctrl_X60_Y8.SyncCtrlMux = 2'b01;
  43625. alta_syncctrl syncload_ctrl_X60_Y9(
  43626. .Din(),
  43627. .Dout(SyncLoad_X60_Y9_VCC));
  43628. defparam syncload_ctrl_X60_Y9.coord_x = 18;
  43629. defparam syncload_ctrl_X60_Y9.coord_y = 9;
  43630. defparam syncload_ctrl_X60_Y9.coord_z = 1;
  43631. defparam syncload_ctrl_X60_Y9.SyncCtrlMux = 2'b01;
  43632. alta_syncctrl syncload_ctrl_X61_Y10(
  43633. .Din(),
  43634. .Dout(SyncLoad_X61_Y10_GND));
  43635. defparam syncload_ctrl_X61_Y10.coord_x = 19;
  43636. defparam syncload_ctrl_X61_Y10.coord_y = 11;
  43637. defparam syncload_ctrl_X61_Y10.coord_z = 1;
  43638. defparam syncload_ctrl_X61_Y10.SyncCtrlMux = 2'b00;
  43639. alta_syncctrl syncload_ctrl_X61_Y6(
  43640. .Din(),
  43641. .Dout(SyncLoad_X61_Y6_VCC));
  43642. defparam syncload_ctrl_X61_Y6.coord_x = 17;
  43643. defparam syncload_ctrl_X61_Y6.coord_y = 6;
  43644. defparam syncload_ctrl_X61_Y6.coord_z = 1;
  43645. defparam syncload_ctrl_X61_Y6.SyncCtrlMux = 2'b01;
  43646. alta_syncctrl syncload_ctrl_X61_Y9(
  43647. .Din(),
  43648. .Dout(SyncLoad_X61_Y9_VCC));
  43649. defparam syncload_ctrl_X61_Y9.coord_x = 19;
  43650. defparam syncload_ctrl_X61_Y9.coord_y = 12;
  43651. defparam syncload_ctrl_X61_Y9.coord_z = 1;
  43652. defparam syncload_ctrl_X61_Y9.SyncCtrlMux = 2'b01;
  43653. alta_syncctrl syncload_ctrl_X62_Y10(
  43654. .Din(),
  43655. .Dout(SyncLoad_X62_Y10_GND));
  43656. defparam syncload_ctrl_X62_Y10.coord_x = 20;
  43657. defparam syncload_ctrl_X62_Y10.coord_y = 11;
  43658. defparam syncload_ctrl_X62_Y10.coord_z = 1;
  43659. defparam syncload_ctrl_X62_Y10.SyncCtrlMux = 2'b00;
  43660. alta_syncctrl syncload_ctrl_X62_Y3(
  43661. .Din(),
  43662. .Dout(SyncLoad_X62_Y3_VCC));
  43663. defparam syncload_ctrl_X62_Y3.coord_x = 17;
  43664. defparam syncload_ctrl_X62_Y3.coord_y = 7;
  43665. defparam syncload_ctrl_X62_Y3.coord_z = 1;
  43666. defparam syncload_ctrl_X62_Y3.SyncCtrlMux = 2'b01;
  43667. alta_syncctrl syncload_ctrl_X62_Y5(
  43668. .Din(),
  43669. .Dout(SyncLoad_X62_Y5_GND));
  43670. defparam syncload_ctrl_X62_Y5.coord_x = 18;
  43671. defparam syncload_ctrl_X62_Y5.coord_y = 7;
  43672. defparam syncload_ctrl_X62_Y5.coord_z = 1;
  43673. defparam syncload_ctrl_X62_Y5.SyncCtrlMux = 2'b00;
  43674. alta_syncctrl syncload_ctrl_X62_Y6(
  43675. .Din(),
  43676. .Dout(SyncLoad_X62_Y6_GND));
  43677. defparam syncload_ctrl_X62_Y6.coord_x = 17;
  43678. defparam syncload_ctrl_X62_Y6.coord_y = 4;
  43679. defparam syncload_ctrl_X62_Y6.coord_z = 1;
  43680. defparam syncload_ctrl_X62_Y6.SyncCtrlMux = 2'b00;
  43681. alta_syncctrl syncreset_ctrl_X56_Y11(
  43682. .Din(\macro_inst|ahb2apb_inst|prdata[9]~11_combout ),
  43683. .Dout(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X56_Y11_SIG ));
  43684. defparam syncreset_ctrl_X56_Y11.coord_x = 15;
  43685. defparam syncreset_ctrl_X56_Y11.coord_y = 11;
  43686. defparam syncreset_ctrl_X56_Y11.coord_z = 0;
  43687. defparam syncreset_ctrl_X56_Y11.SyncCtrlMux = 2'b10;
  43688. alta_syncctrl syncreset_ctrl_X56_Y4(
  43689. .Din(),
  43690. .Dout(SyncReset_X56_Y4_GND));
  43691. defparam syncreset_ctrl_X56_Y4.coord_x = 20;
  43692. defparam syncreset_ctrl_X56_Y4.coord_y = 5;
  43693. defparam syncreset_ctrl_X56_Y4.coord_z = 0;
  43694. defparam syncreset_ctrl_X56_Y4.SyncCtrlMux = 2'b00;
  43695. alta_syncctrl syncreset_ctrl_X56_Y8(
  43696. .Din(),
  43697. .Dout(SyncReset_X56_Y8_GND));
  43698. defparam syncreset_ctrl_X56_Y8.coord_x = 15;
  43699. defparam syncreset_ctrl_X56_Y8.coord_y = 6;
  43700. defparam syncreset_ctrl_X56_Y8.coord_z = 0;
  43701. defparam syncreset_ctrl_X56_Y8.SyncCtrlMux = 2'b00;
  43702. alta_syncctrl syncreset_ctrl_X57_Y11(
  43703. .Din(),
  43704. .Dout(SyncReset_X57_Y11_GND));
  43705. defparam syncreset_ctrl_X57_Y11.coord_x = 16;
  43706. defparam syncreset_ctrl_X57_Y11.coord_y = 11;
  43707. defparam syncreset_ctrl_X57_Y11.coord_z = 0;
  43708. defparam syncreset_ctrl_X57_Y11.SyncCtrlMux = 2'b00;
  43709. alta_syncctrl syncreset_ctrl_X57_Y3(
  43710. .Din(),
  43711. .Dout(SyncReset_X57_Y3_GND));
  43712. defparam syncreset_ctrl_X57_Y3.coord_x = 17;
  43713. defparam syncreset_ctrl_X57_Y3.coord_y = 2;
  43714. defparam syncreset_ctrl_X57_Y3.coord_z = 0;
  43715. defparam syncreset_ctrl_X57_Y3.SyncCtrlMux = 2'b00;
  43716. alta_syncctrl syncreset_ctrl_X57_Y4(
  43717. .Din(),
  43718. .Dout(SyncReset_X57_Y4_GND));
  43719. defparam syncreset_ctrl_X57_Y4.coord_x = 19;
  43720. defparam syncreset_ctrl_X57_Y4.coord_y = 5;
  43721. defparam syncreset_ctrl_X57_Y4.coord_z = 0;
  43722. defparam syncreset_ctrl_X57_Y4.SyncCtrlMux = 2'b00;
  43723. alta_syncctrl syncreset_ctrl_X57_Y6(
  43724. .Din(),
  43725. .Dout(SyncReset_X57_Y6_GND));
  43726. defparam syncreset_ctrl_X57_Y6.coord_x = 14;
  43727. defparam syncreset_ctrl_X57_Y6.coord_y = 5;
  43728. defparam syncreset_ctrl_X57_Y6.coord_z = 0;
  43729. defparam syncreset_ctrl_X57_Y6.SyncCtrlMux = 2'b00;
  43730. alta_syncctrl syncreset_ctrl_X57_Y8(
  43731. .Din(),
  43732. .Dout(SyncReset_X57_Y8_GND));
  43733. defparam syncreset_ctrl_X57_Y8.coord_x = 15;
  43734. defparam syncreset_ctrl_X57_Y8.coord_y = 8;
  43735. defparam syncreset_ctrl_X57_Y8.coord_z = 0;
  43736. defparam syncreset_ctrl_X57_Y8.SyncCtrlMux = 2'b00;
  43737. alta_syncctrl syncreset_ctrl_X57_Y9(
  43738. .Din(),
  43739. .Dout(SyncReset_X57_Y9_GND));
  43740. defparam syncreset_ctrl_X57_Y9.coord_x = 14;
  43741. defparam syncreset_ctrl_X57_Y9.coord_y = 6;
  43742. defparam syncreset_ctrl_X57_Y9.coord_z = 0;
  43743. defparam syncreset_ctrl_X57_Y9.SyncCtrlMux = 2'b00;
  43744. alta_syncctrl syncreset_ctrl_X58_Y10(
  43745. .Din(\macro_inst|apb_dac0_inst|always0~0_combout ),
  43746. .Dout(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y10_SIG ));
  43747. defparam syncreset_ctrl_X58_Y10.coord_x = 15;
  43748. defparam syncreset_ctrl_X58_Y10.coord_y = 9;
  43749. defparam syncreset_ctrl_X58_Y10.coord_z = 0;
  43750. defparam syncreset_ctrl_X58_Y10.SyncCtrlMux = 2'b10;
  43751. alta_syncctrl syncreset_ctrl_X58_Y11(
  43752. .Din(\macro_inst|apb_dac0_inst|always0~0_combout ),
  43753. .Dout(\macro_inst|apb_dac0_inst|always0~0_combout__SyncReset_X58_Y11_SIG ));
  43754. defparam syncreset_ctrl_X58_Y11.coord_x = 15;
  43755. defparam syncreset_ctrl_X58_Y11.coord_y = 10;
  43756. defparam syncreset_ctrl_X58_Y11.coord_z = 0;
  43757. defparam syncreset_ctrl_X58_Y11.SyncCtrlMux = 2'b10;
  43758. alta_syncctrl syncreset_ctrl_X58_Y12(
  43759. .Din(),
  43760. .Dout(SyncReset_X58_Y12_GND));
  43761. defparam syncreset_ctrl_X58_Y12.coord_x = 15;
  43762. defparam syncreset_ctrl_X58_Y12.coord_y = 12;
  43763. defparam syncreset_ctrl_X58_Y12.coord_z = 0;
  43764. defparam syncreset_ctrl_X58_Y12.SyncCtrlMux = 2'b00;
  43765. alta_syncctrl syncreset_ctrl_X58_Y4(
  43766. .Din(),
  43767. .Dout(SyncReset_X58_Y4_GND));
  43768. defparam syncreset_ctrl_X58_Y4.coord_x = 19;
  43769. defparam syncreset_ctrl_X58_Y4.coord_y = 4;
  43770. defparam syncreset_ctrl_X58_Y4.coord_z = 0;
  43771. defparam syncreset_ctrl_X58_Y4.SyncCtrlMux = 2'b00;
  43772. alta_syncctrl syncreset_ctrl_X58_Y6(
  43773. .Din(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout ),
  43774. .Dout(\macro_inst|trig_ctrl_inst|auto_wait_cnt[7]~36_combout__SyncReset_X58_Y6_SIG ));
  43775. defparam syncreset_ctrl_X58_Y6.coord_x = 20;
  43776. defparam syncreset_ctrl_X58_Y6.coord_y = 8;
  43777. defparam syncreset_ctrl_X58_Y6.coord_z = 0;
  43778. defparam syncreset_ctrl_X58_Y6.SyncCtrlMux = 2'b10;
  43779. alta_syncctrl syncreset_ctrl_X58_Y7(
  43780. .Din(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout ),
  43781. .Dout(\macro_inst|trig_ctrl_inst|pulse_cnt[12]~51_combout__SyncReset_X58_Y7_SIG ));
  43782. defparam syncreset_ctrl_X58_Y7.coord_x = 20;
  43783. defparam syncreset_ctrl_X58_Y7.coord_y = 10;
  43784. defparam syncreset_ctrl_X58_Y7.coord_z = 0;
  43785. defparam syncreset_ctrl_X58_Y7.SyncCtrlMux = 2'b10;
  43786. alta_syncctrl syncreset_ctrl_X58_Y9(
  43787. .Din(),
  43788. .Dout(SyncReset_X58_Y9_GND));
  43789. defparam syncreset_ctrl_X58_Y9.coord_x = 16;
  43790. defparam syncreset_ctrl_X58_Y9.coord_y = 10;
  43791. defparam syncreset_ctrl_X58_Y9.coord_z = 0;
  43792. defparam syncreset_ctrl_X58_Y9.SyncCtrlMux = 2'b00;
  43793. alta_syncctrl syncreset_ctrl_X59_Y10(
  43794. .Din(),
  43795. .Dout(SyncReset_X59_Y10_GND));
  43796. defparam syncreset_ctrl_X59_Y10.coord_x = 14;
  43797. defparam syncreset_ctrl_X59_Y10.coord_y = 12;
  43798. defparam syncreset_ctrl_X59_Y10.coord_z = 0;
  43799. defparam syncreset_ctrl_X59_Y10.SyncCtrlMux = 2'b00;
  43800. alta_syncctrl syncreset_ctrl_X59_Y11(
  43801. .Din(),
  43802. .Dout(SyncReset_X59_Y11_GND));
  43803. defparam syncreset_ctrl_X59_Y11.coord_x = 18;
  43804. defparam syncreset_ctrl_X59_Y11.coord_y = 10;
  43805. defparam syncreset_ctrl_X59_Y11.coord_z = 0;
  43806. defparam syncreset_ctrl_X59_Y11.SyncCtrlMux = 2'b00;
  43807. alta_syncctrl syncreset_ctrl_X59_Y12(
  43808. .Din(),
  43809. .Dout(SyncReset_X59_Y12_GND));
  43810. defparam syncreset_ctrl_X59_Y12.coord_x = 16;
  43811. defparam syncreset_ctrl_X59_Y12.coord_y = 12;
  43812. defparam syncreset_ctrl_X59_Y12.coord_z = 0;
  43813. defparam syncreset_ctrl_X59_Y12.SyncCtrlMux = 2'b00;
  43814. alta_syncctrl syncreset_ctrl_X59_Y3(
  43815. .Din(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout ),
  43816. .Dout(\macro_inst|trig_ctrl_inst|eoc_cnt[8]~51_combout__SyncReset_X59_Y3_SIG ));
  43817. defparam syncreset_ctrl_X59_Y3.coord_x = 15;
  43818. defparam syncreset_ctrl_X59_Y3.coord_y = 7;
  43819. defparam syncreset_ctrl_X59_Y3.coord_z = 0;
  43820. defparam syncreset_ctrl_X59_Y3.SyncCtrlMux = 2'b10;
  43821. alta_syncctrl syncreset_ctrl_X59_Y4(
  43822. .Din(),
  43823. .Dout(SyncReset_X59_Y4_GND));
  43824. defparam syncreset_ctrl_X59_Y4.coord_x = 20;
  43825. defparam syncreset_ctrl_X59_Y4.coord_y = 4;
  43826. defparam syncreset_ctrl_X59_Y4.coord_z = 0;
  43827. defparam syncreset_ctrl_X59_Y4.SyncCtrlMux = 2'b00;
  43828. alta_syncctrl syncreset_ctrl_X59_Y5(
  43829. .Din(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout ),
  43830. .Dout(\macro_inst|trig_ctrl_inst|gap_cnt_auto[2]~15_combout__SyncReset_X59_Y5_SIG ));
  43831. defparam syncreset_ctrl_X59_Y5.coord_x = 19;
  43832. defparam syncreset_ctrl_X59_Y5.coord_y = 6;
  43833. defparam syncreset_ctrl_X59_Y5.coord_z = 0;
  43834. defparam syncreset_ctrl_X59_Y5.SyncCtrlMux = 2'b10;
  43835. alta_syncctrl syncreset_ctrl_X59_Y6(
  43836. .Din(),
  43837. .Dout(SyncReset_X59_Y6_GND));
  43838. defparam syncreset_ctrl_X59_Y6.coord_x = 18;
  43839. defparam syncreset_ctrl_X59_Y6.coord_y = 8;
  43840. defparam syncreset_ctrl_X59_Y6.coord_z = 0;
  43841. defparam syncreset_ctrl_X59_Y6.SyncCtrlMux = 2'b00;
  43842. alta_syncctrl syncreset_ctrl_X59_Y7(
  43843. .Din(),
  43844. .Dout(SyncReset_X59_Y7_GND));
  43845. defparam syncreset_ctrl_X59_Y7.coord_x = 20;
  43846. defparam syncreset_ctrl_X59_Y7.coord_y = 6;
  43847. defparam syncreset_ctrl_X59_Y7.coord_z = 0;
  43848. defparam syncreset_ctrl_X59_Y7.SyncCtrlMux = 2'b00;
  43849. alta_syncctrl syncreset_ctrl_X59_Y8(
  43850. .Din(\macro_inst|ahb2apb_inst|prdata[9]~11_combout ),
  43851. .Dout(\macro_inst|ahb2apb_inst|prdata[9]~11_combout__SyncReset_X59_Y8_SIG ));
  43852. defparam syncreset_ctrl_X59_Y8.coord_x = 17;
  43853. defparam syncreset_ctrl_X59_Y8.coord_y = 11;
  43854. defparam syncreset_ctrl_X59_Y8.coord_z = 0;
  43855. defparam syncreset_ctrl_X59_Y8.SyncCtrlMux = 2'b10;
  43856. alta_syncctrl syncreset_ctrl_X60_Y10(
  43857. .Din(),
  43858. .Dout(SyncReset_X60_Y10_GND));
  43859. defparam syncreset_ctrl_X60_Y10.coord_x = 17;
  43860. defparam syncreset_ctrl_X60_Y10.coord_y = 12;
  43861. defparam syncreset_ctrl_X60_Y10.coord_z = 0;
  43862. defparam syncreset_ctrl_X60_Y10.SyncCtrlMux = 2'b00;
  43863. alta_syncctrl syncreset_ctrl_X60_Y11(
  43864. .Din(),
  43865. .Dout(SyncReset_X60_Y11_GND));
  43866. defparam syncreset_ctrl_X60_Y11.coord_x = 17;
  43867. defparam syncreset_ctrl_X60_Y11.coord_y = 9;
  43868. defparam syncreset_ctrl_X60_Y11.coord_z = 0;
  43869. defparam syncreset_ctrl_X60_Y11.SyncCtrlMux = 2'b00;
  43870. alta_syncctrl syncreset_ctrl_X60_Y3(
  43871. .Din(),
  43872. .Dout(SyncReset_X60_Y3_GND));
  43873. defparam syncreset_ctrl_X60_Y3.coord_x = 18;
  43874. defparam syncreset_ctrl_X60_Y3.coord_y = 6;
  43875. defparam syncreset_ctrl_X60_Y3.coord_z = 0;
  43876. defparam syncreset_ctrl_X60_Y3.SyncCtrlMux = 2'b00;
  43877. alta_syncctrl syncreset_ctrl_X60_Y6(
  43878. .Din(),
  43879. .Dout(SyncReset_X60_Y6_GND));
  43880. defparam syncreset_ctrl_X60_Y6.coord_x = 19;
  43881. defparam syncreset_ctrl_X60_Y6.coord_y = 8;
  43882. defparam syncreset_ctrl_X60_Y6.coord_z = 0;
  43883. defparam syncreset_ctrl_X60_Y6.SyncCtrlMux = 2'b00;
  43884. alta_syncctrl syncreset_ctrl_X60_Y7(
  43885. .Din(),
  43886. .Dout(SyncReset_X60_Y7_GND));
  43887. defparam syncreset_ctrl_X60_Y7.coord_x = 19;
  43888. defparam syncreset_ctrl_X60_Y7.coord_y = 9;
  43889. defparam syncreset_ctrl_X60_Y7.coord_z = 0;
  43890. defparam syncreset_ctrl_X60_Y7.SyncCtrlMux = 2'b00;
  43891. alta_syncctrl syncreset_ctrl_X60_Y8(
  43892. .Din(),
  43893. .Dout(SyncReset_X60_Y8_GND));
  43894. defparam syncreset_ctrl_X60_Y8.coord_x = 19;
  43895. defparam syncreset_ctrl_X60_Y8.coord_y = 10;
  43896. defparam syncreset_ctrl_X60_Y8.coord_z = 0;
  43897. defparam syncreset_ctrl_X60_Y8.SyncCtrlMux = 2'b00;
  43898. alta_syncctrl syncreset_ctrl_X60_Y9(
  43899. .Din(),
  43900. .Dout(SyncReset_X60_Y9_GND));
  43901. defparam syncreset_ctrl_X60_Y9.coord_x = 18;
  43902. defparam syncreset_ctrl_X60_Y9.coord_y = 9;
  43903. defparam syncreset_ctrl_X60_Y9.coord_z = 0;
  43904. defparam syncreset_ctrl_X60_Y9.SyncCtrlMux = 2'b00;
  43905. alta_syncctrl syncreset_ctrl_X61_Y10(
  43906. .Din(\macro_inst|cfg_reg_inst|adc_en~q ),
  43907. .Dout(\macro_inst|cfg_reg_inst|adc_en~q__SyncReset_X61_Y10_INV ));
  43908. defparam syncreset_ctrl_X61_Y10.coord_x = 19;
  43909. defparam syncreset_ctrl_X61_Y10.coord_y = 11;
  43910. defparam syncreset_ctrl_X61_Y10.coord_z = 0;
  43911. defparam syncreset_ctrl_X61_Y10.SyncCtrlMux = 2'b11;
  43912. alta_syncctrl syncreset_ctrl_X61_Y6(
  43913. .Din(),
  43914. .Dout(SyncReset_X61_Y6_GND));
  43915. defparam syncreset_ctrl_X61_Y6.coord_x = 17;
  43916. defparam syncreset_ctrl_X61_Y6.coord_y = 6;
  43917. defparam syncreset_ctrl_X61_Y6.coord_z = 0;
  43918. defparam syncreset_ctrl_X61_Y6.SyncCtrlMux = 2'b00;
  43919. alta_syncctrl syncreset_ctrl_X61_Y9(
  43920. .Din(),
  43921. .Dout(SyncReset_X61_Y9_GND));
  43922. defparam syncreset_ctrl_X61_Y9.coord_x = 19;
  43923. defparam syncreset_ctrl_X61_Y9.coord_y = 12;
  43924. defparam syncreset_ctrl_X61_Y9.coord_z = 0;
  43925. defparam syncreset_ctrl_X61_Y9.SyncCtrlMux = 2'b00;
  43926. alta_syncctrl syncreset_ctrl_X62_Y10(
  43927. .Din(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout ),
  43928. .Dout(\macro_inst|apb_adc0_inst|sclk_counter[7]~18_combout__SyncReset_X62_Y10_SIG ));
  43929. defparam syncreset_ctrl_X62_Y10.coord_x = 20;
  43930. defparam syncreset_ctrl_X62_Y10.coord_y = 11;
  43931. defparam syncreset_ctrl_X62_Y10.coord_z = 0;
  43932. defparam syncreset_ctrl_X62_Y10.SyncCtrlMux = 2'b10;
  43933. alta_syncctrl syncreset_ctrl_X62_Y3(
  43934. .Din(),
  43935. .Dout(SyncReset_X62_Y3_GND));
  43936. defparam syncreset_ctrl_X62_Y3.coord_x = 17;
  43937. defparam syncreset_ctrl_X62_Y3.coord_y = 7;
  43938. defparam syncreset_ctrl_X62_Y3.coord_z = 0;
  43939. defparam syncreset_ctrl_X62_Y3.SyncCtrlMux = 2'b00;
  43940. alta_syncctrl syncreset_ctrl_X62_Y5(
  43941. .Din(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  43942. .Dout(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y5_SIG ));
  43943. defparam syncreset_ctrl_X62_Y5.coord_x = 18;
  43944. defparam syncreset_ctrl_X62_Y5.coord_y = 7;
  43945. defparam syncreset_ctrl_X62_Y5.coord_z = 0;
  43946. defparam syncreset_ctrl_X62_Y5.SyncCtrlMux = 2'b10;
  43947. alta_syncctrl syncreset_ctrl_X62_Y6(
  43948. .Din(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout ),
  43949. .Dout(\macro_inst|trig_ctrl_inst|adc_restart_ris~combout__SyncReset_X62_Y6_SIG ));
  43950. defparam syncreset_ctrl_X62_Y6.coord_x = 17;
  43951. defparam syncreset_ctrl_X62_Y6.coord_y = 4;
  43952. defparam syncreset_ctrl_X62_Y6.coord_z = 0;
  43953. defparam syncreset_ctrl_X62_Y6.SyncCtrlMux = 2'b10;
  43954. alta_slice sys_resetn(
  43955. .A(vcc),
  43956. .B(vcc),
  43957. .C(vcc),
  43958. .D(\rv32.resetn_out ),
  43959. .Cin(),
  43960. .Qin(),
  43961. .Clk(),
  43962. .AsyncReset(),
  43963. .SyncReset(),
  43964. .ShiftData(),
  43965. .SyncLoad(),
  43966. .LutOut(\sys_resetn~combout ),
  43967. .Cout(),
  43968. .Q());
  43969. defparam sys_resetn.coord_x = 8;
  43970. defparam sys_resetn.coord_y = 4;
  43971. defparam sys_resetn.coord_z = 7;
  43972. defparam sys_resetn.mask = 16'h00FF;
  43973. defparam sys_resetn.modeMux = 1'b0;
  43974. defparam sys_resetn.FeedbackMux = 1'b0;
  43975. defparam sys_resetn.ShiftMux = 1'b0;
  43976. defparam sys_resetn.BypassEn = 1'b0;
  43977. defparam sys_resetn.CarryEnb = 1'b1;
  43978. alta_io_gclk \sys_resetn~clkctrl (
  43979. .inclk(\sys_resetn~combout ),
  43980. .outclk(\sys_resetn~clkctrl_outclk ));
  43981. defparam \sys_resetn~clkctrl .coord_x = 22;
  43982. defparam \sys_resetn~clkctrl .coord_y = 4;
  43983. defparam \sys_resetn~clkctrl .coord_z = 2;
  43984. endmodule