9102_APP/logic/db/example_board.tmw_info

start_full_compilation:s:00:00:52
start_analysis_synthesis:s:00:00:12-start_full_compilation
start_analysis_elaboration:s-start_full_compilation
start_partition_merge:s:00:00:02-start_full_compilation
start_io_assignment_analysis:s:00:00:05-start_full_compilation
start_fitter:s:00:00:26-start_full_compilation
start_timing_analyzer:s:00:00:04-start_full_compilation
start_eda_netlist_writer:s:00:00:03-start_full_compilation