example_board.lpc.html 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242
  1. <TABLE>
  2. <TR bgcolor="#C0C0C0">
  3. <TH>Hierarchy</TH>
  4. <TH>Input</TH>
  5. <TH>Constant Input</TH>
  6. <TH>Unused Input</TH>
  7. <TH>Floating Input</TH>
  8. <TH>Output</TH>
  9. <TH>Constant Output</TH>
  10. <TH>Unused Output</TH>
  11. <TH>Floating Output</TH>
  12. <TH>Bidir</TH>
  13. <TH>Constant Bidir</TH>
  14. <TH>Unused Bidir</TH>
  15. <TH>Input only Bidir</TH>
  16. <TH>Output only Bidir</TH>
  17. </TR>
  18. <TR >
  19. <TD >rv32</TD>
  20. <TD >0</TD>
  21. <TD >0</TD>
  22. <TD >0</TD>
  23. <TD >0</TD>
  24. <TD >0</TD>
  25. <TD >0</TD>
  26. <TD >0</TD>
  27. <TD >0</TD>
  28. <TD >0</TD>
  29. <TD >0</TD>
  30. <TD >0</TD>
  31. <TD >0</TD>
  32. <TD >0</TD>
  33. </TR>
  34. <TR >
  35. <TD >macro_inst|u_apb2ram</TD>
  36. <TD >76</TD>
  37. <TD >2</TD>
  38. <TD >29</TD>
  39. <TD >2</TD>
  40. <TD >64</TD>
  41. <TD >2</TD>
  42. <TD >2</TD>
  43. <TD >2</TD>
  44. <TD >0</TD>
  45. <TD >0</TD>
  46. <TD >0</TD>
  47. <TD >0</TD>
  48. <TD >0</TD>
  49. </TR>
  50. <TR >
  51. <TD >macro_inst|u_dual_port_ram|auto_generated</TD>
  52. <TD >58</TD>
  53. <TD >0</TD>
  54. <TD >0</TD>
  55. <TD >0</TD>
  56. <TD >16</TD>
  57. <TD >0</TD>
  58. <TD >0</TD>
  59. <TD >0</TD>
  60. <TD >0</TD>
  61. <TD >0</TD>
  62. <TD >0</TD>
  63. <TD >0</TD>
  64. <TD >0</TD>
  65. </TR>
  66. <TR >
  67. <TD >macro_inst|u_baud_detect</TD>
  68. <TD >3</TD>
  69. <TD >0</TD>
  70. <TD >0</TD>
  71. <TD >0</TD>
  72. <TD >32</TD>
  73. <TD >0</TD>
  74. <TD >0</TD>
  75. <TD >0</TD>
  76. <TD >0</TD>
  77. <TD >0</TD>
  78. <TD >0</TD>
  79. <TD >0</TD>
  80. <TD >0</TD>
  81. </TR>
  82. <TR >
  83. <TD >macro_inst|apb_dac0_inst|dac_inst</TD>
  84. <TD >0</TD>
  85. <TD >0</TD>
  86. <TD >0</TD>
  87. <TD >0</TD>
  88. <TD >0</TD>
  89. <TD >0</TD>
  90. <TD >0</TD>
  91. <TD >0</TD>
  92. <TD >0</TD>
  93. <TD >0</TD>
  94. <TD >0</TD>
  95. <TD >0</TD>
  96. <TD >0</TD>
  97. </TR>
  98. <TR >
  99. <TD >macro_inst|apb_dac0_inst</TD>
  100. <TD >115</TD>
  101. <TD >33</TD>
  102. <TD >55</TD>
  103. <TD >33</TD>
  104. <TD >32</TD>
  105. <TD >33</TD>
  106. <TD >33</TD>
  107. <TD >33</TD>
  108. <TD >0</TD>
  109. <TD >0</TD>
  110. <TD >0</TD>
  111. <TD >0</TD>
  112. <TD >0</TD>
  113. </TR>
  114. <TR >
  115. <TD >macro_inst|trig_ctrl_inst</TD>
  116. <TD >118</TD>
  117. <TD >0</TD>
  118. <TD >48</TD>
  119. <TD >0</TD>
  120. <TD >59</TD>
  121. <TD >0</TD>
  122. <TD >0</TD>
  123. <TD >0</TD>
  124. <TD >0</TD>
  125. <TD >0</TD>
  126. <TD >0</TD>
  127. <TD >0</TD>
  128. <TD >0</TD>
  129. </TR>
  130. <TR >
  131. <TD >macro_inst|apb_adc0_inst|adc_inst</TD>
  132. <TD >0</TD>
  133. <TD >0</TD>
  134. <TD >0</TD>
  135. <TD >0</TD>
  136. <TD >0</TD>
  137. <TD >0</TD>
  138. <TD >0</TD>
  139. <TD >0</TD>
  140. <TD >0</TD>
  141. <TD >0</TD>
  142. <TD >0</TD>
  143. <TD >0</TD>
  144. <TD >0</TD>
  145. </TR>
  146. <TR >
  147. <TD >macro_inst|apb_adc0_inst</TD>
  148. <TD >64</TD>
  149. <TD >33</TD>
  150. <TD >47</TD>
  151. <TD >33</TD>
  152. <TD >45</TD>
  153. <TD >33</TD>
  154. <TD >33</TD>
  155. <TD >33</TD>
  156. <TD >0</TD>
  157. <TD >0</TD>
  158. <TD >0</TD>
  159. <TD >0</TD>
  160. <TD >0</TD>
  161. </TR>
  162. <TR >
  163. <TD >macro_inst|cfg_reg_inst</TD>
  164. <TD >49</TD>
  165. <TD >0</TD>
  166. <TD >0</TD>
  167. <TD >0</TD>
  168. <TD >164</TD>
  169. <TD >0</TD>
  170. <TD >0</TD>
  171. <TD >0</TD>
  172. <TD >0</TD>
  173. <TD >0</TD>
  174. <TD >0</TD>
  175. <TD >0</TD>
  176. <TD >0</TD>
  177. </TR>
  178. <TR >
  179. <TD >macro_inst|ahb2apb_inst</TD>
  180. <TD >101</TD>
  181. <TD >11</TD>
  182. <TD >4</TD>
  183. <TD >11</TD>
  184. <TD >92</TD>
  185. <TD >11</TD>
  186. <TD >11</TD>
  187. <TD >11</TD>
  188. <TD >0</TD>
  189. <TD >0</TD>
  190. <TD >0</TD>
  191. <TD >0</TD>
  192. <TD >0</TD>
  193. </TR>
  194. <TR >
  195. <TD >macro_inst</TD>
  196. <TD >128</TD>
  197. <TD >96</TD>
  198. <TD >64</TD>
  199. <TD >96</TD>
  200. <TD >131</TD>
  201. <TD >96</TD>
  202. <TD >96</TD>
  203. <TD >96</TD>
  204. <TD >5</TD>
  205. <TD >0</TD>
  206. <TD >2</TD>
  207. <TD >0</TD>
  208. <TD >2</TD>
  209. </TR>
  210. <TR >
  211. <TD >gclksw_inst</TD>
  212. <TD >7</TD>
  213. <TD >1</TD>
  214. <TD >2</TD>
  215. <TD >1</TD>
  216. <TD >1</TD>
  217. <TD >1</TD>
  218. <TD >1</TD>
  219. <TD >1</TD>
  220. <TD >0</TD>
  221. <TD >0</TD>
  222. <TD >0</TD>
  223. <TD >0</TD>
  224. <TD >0</TD>
  225. </TR>
  226. <TR >
  227. <TD >pll_inst|auto_generated</TD>
  228. <TD >3</TD>
  229. <TD >0</TD>
  230. <TD >0</TD>
  231. <TD >0</TD>
  232. <TD >6</TD>
  233. <TD >0</TD>
  234. <TD >0</TD>
  235. <TD >0</TD>
  236. <TD >0</TD>
  237. <TD >0</TD>
  238. <TD >0</TD>
  239. <TD >0</TD>
  240. <TD >0</TD>
  241. </TR>
  242. </TABLE>