iwdg.h 1.8 KB

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  1. #ifndef _AGM_IWDG_H
  2. #define _AGM_IWDG_H
  3. #ifdef __cplusplus
  4. extern "C" {
  5. #endif
  6. #include "util.h"
  7. #include "rtc.h"
  8. #define IWDG_ENABLE (1 << 8)
  9. #define IWDG_STOP_FREEZE (1 << 4)
  10. #define IWDG_STANDBY_FREEZE (1 << 5)
  11. #define IWDG_CLKSEL (1 << 6)
  12. #define IWDG_PRESCALER_MASK 0x7
  13. #define IWDG_RELOAD_MASK 0xf000
  14. #define IWDG_RELOAD_KEY 0xa000
  15. typedef enum
  16. {
  17. IWDG_FREEZE_NONE = 0,
  18. IWDG_FREEZE_STOP = IWDG_STOP_FREEZE,
  19. IWDG_FREEZE_STANDBY = IWDG_STANDBY_FREEZE,
  20. IWDG_FREEZE_ALL = IWDG_STOP_FREEZE | IWDG_STANDBY_FREEZE,
  21. } IWDG_FreezeTypeDef;
  22. #define IWDG_FREEZE_MASK (IWDG_STOP_FREEZE | IWDG_STANDBY_FREEZE)
  23. typedef enum
  24. {
  25. IWDG_CLK_SOURCE_LSI = 0,
  26. IWDG_CLK_SOURCE_LSE = IWDG_CLKSEL,
  27. } IWDG_ClkSourceTypeDef;
  28. typedef enum
  29. {
  30. IWDG_CLK_DIV2 = 0,
  31. IWDG_CLK_DIV4 = 1,
  32. IWDG_CLK_DIV8 = 2,
  33. IWDG_CLK_DIV16 = 3,
  34. IWDG_CLK_DIV32 = 4,
  35. IWDG_CLK_DIV64 = 5,
  36. IWDG_CLK_DIV128 = 6,
  37. IWDG_CLK_DIV256 = 7,
  38. } IWDG_ClkPrescalerTypeDef;
  39. static inline bool IWDG_IsEnabled(void) { return RTC->IWDG & IWDG_ENABLE; }
  40. static inline void IWDG_Enable(void) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_ENABLE, IWDG_ENABLE); }
  41. static inline void IWDG_Disable(void) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_ENABLE, 0); }
  42. static inline void IWDG_ReloadCounter(void) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_RELOAD_MASK, IWDG_RELOAD_KEY); }
  43. static inline void IWDG_SetFreezeMode(IWDG_FreezeTypeDef mode) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_FREEZE_MASK, mode); }
  44. static inline void IWDG_SetPrescaler(IWDG_ClkPrescalerTypeDef prescaler) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_PRESCALER_MASK, prescaler); }
  45. // Clk source is always LSE in standby mode
  46. static inline void IWDG_SetClkSource(IWDG_ClkSourceTypeDef clk_source) { RTC_MODIFY_BIT(RTC->IWDG, IWDG_CLKSEL, clk_source); }
  47. #ifdef __cplusplus
  48. }
  49. #endif
  50. #endif