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- m255
- K4
- z2
- 13
- !s112 1.1
- !i10d 8192
- !i10e 25
- !i10f 100
- cModel Technology
- Z0 dD:/LYW/WBJW/CODE/NEW_TSB_3.0/AG32/example/modelsim
- T_opt
- !s110 1776765916
- V7=i9LLAzmFA9FSnQc2CcL2
- Z1 04 2 4 work tb fast 0
- =1-84a938659e1e-69e74bdb-37e-6ce4
- Z2 o-quiet -auto_acc_if_foreign -work work +acc
- Z3 tCvgOpt 0
- n@_opt
- Z4 OL;O;10.5;63
- R0
- T_opt1
- !s110 1776841774
- V?29aj>_n87I_3808>bV@[3
- R1
- =1-84a938659e1e-69e8742e-164-12e4
- R2
- R3
- n@_opt1
- R4
- R0
- vtb
- Z5 DXx6 sv_std 3 std 0 22 AD7iAPLo6nTIKk<N0eo=D3
- Z6 !s110 1776841784
- !i10b 1
- !s100 1?aO_Ea;BdfDTRbVf7boQ0
- Iz_fXSSKA:NUJKoFa1_3EE1
- Z7 VDg1SIo80bB@j0V0VzS_@n1
- !s105 trig_ctrl_tb_v_unit
- S1
- R0
- w1776841729
- 8trig_ctrl_tb.v
- Ftrig_ctrl_tb.v
- L0 3
- Z8 OL;L;10.5;63
- r1
- !s85 0
- 31
- Z9 !s108 1776841784.000000
- Z10 !s107 ../logic/trig_ctrl.v|trig_ctrl_tb.v|
- Z11 !s90 -reportprogress|300|-sv|-f|tb.f|
- !i113 0
- Z12 o-sv -L mtiAvm -L mtiRnm -L mtiOvm -L mtiUvm -L mtiUPF -L infact
- Z13 !s92 -sv +define+ALTA_SIM +define+ALTA_SYN -L mtiAvm -L mtiRnm -L mtiOvm -L mtiUvm -L mtiUPF -L infact
- R3
- vtrig_ctrl
- R5
- R6
- !i10b 1
- !s100 [ch=UW85[lcc[9Olc1[KJ3
- ITTn_Tc<I58jhC0=WEao?S0
- R7
- !s105 trig_ctrl_v_unit
- S1
- R0
- w1776841704
- 8../logic/trig_ctrl.v
- F../logic/trig_ctrl.v
- L0 2
- R8
- r1
- !s85 0
- 31
- R9
- R10
- R11
- !i113 0
- R12
- R13
- R3
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