example_board.merge.rpt 137 KB

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  1. Partition Merge report for example_board
  2. Sat May 09 14:18:48 2026
  3. Quartus II 64-Bit Version 13.0.0 Build 156 04/24/2013 SJ Full Version
  4. ---------------------
  5. ; Table of Contents ;
  6. ---------------------
  7. 1. Legal Notice
  8. 2. Partition Merge Summary
  9. 3. Partition Merge Netlist Types Used
  10. 4. Partition Merge Partition Warnings
  11. 5. Partition Merge Partition Statistics
  12. 6. Partition Merge Partition Pin Processing
  13. 7. Partition Merge Resource Usage Summary
  14. 8. Partition Merge RAM Summary
  15. 9. Partition Merge Messages
  16. ----------------
  17. ; Legal Notice ;
  18. ----------------
  19. Copyright (C) 1991-2013 Altera Corporation
  20. Your use of Altera Corporation's design tools, logic functions
  21. and other software and tools, and its AMPP partner logic
  22. functions, and any output files from any of the foregoing
  23. (including device programming or simulation files), and any
  24. associated documentation or information are expressly subject
  25. to the terms and conditions of the Altera Program License
  26. Subscription Agreement, Altera MegaCore Function License
  27. Agreement, or other applicable license agreement, including,
  28. without limitation, that your use is for the sole purpose of
  29. programming logic devices manufactured by Altera and sold by
  30. Altera or its authorized distributors. Please refer to the
  31. applicable agreement for further details.
  32. +----------------------------------------------------------------------------------+
  33. ; Partition Merge Summary ;
  34. +------------------------------------+---------------------------------------------+
  35. ; Partition Merge Status ; Successful - Sat May 09 14:18:48 2026 ;
  36. ; Quartus II 64-Bit Version ; 13.0.0 Build 156 04/24/2013 SJ Full Version ;
  37. ; Revision Name ; example_board ;
  38. ; Top-level Entity Name ; example_board ;
  39. ; Family ; Cyclone IV E ;
  40. ; Total logic elements ; 1,722 ;
  41. ; Total combinational functions ; 1,531 ;
  42. ; Dedicated logic registers ; 484 ;
  43. ; Total registers ; 484 ;
  44. ; Total pins ; 15 ;
  45. ; Total virtual pins ; 1 ;
  46. ; Total memory bits ; 16,384 ;
  47. ; Embedded Multiplier 9-bit elements ; 0 ;
  48. ; Total PLLs ; 1 ;
  49. +------------------------------------+---------------------------------------------+
  50. +----------------------------------------------------------------------------------------------------------------------------------------------------------------+
  51. ; Partition Merge Netlist Types Used