AltaRiscv 1.0 AltaRiscv 8 32 0x20 0x0 0xFFFFFFFF CLINT Core local interrupt controller CLINT 0x2000000 0x0 0x10000 registers msip MSIP Bits 0x0 0x20 msip_0 MSIP bit for Hart 0 0 1 read-write mtimecmp_0_0 MTIMECMP for hart 0 0x4000 0x20 mtimecmp_0_0 mtimecmp_0_0 0 8 read-write mtimecmp_0_1 mtimecmp_0_1 8 8 read-write mtimecmp_0_2 mtimecmp_0_2 16 8 read-write mtimecmp_0_3 mtimecmp_0_3 24 8 read-write mtimecmp_0_4 MTIMECMP for hart 0 0x4004 0x20 mtimecmp_0_4 mtimecmp_0_4 0 8 read-write mtimecmp_0_5 mtimecmp_0_5 8 8 read-write mtimecmp_0_6 mtimecmp_0_6 16 8 read-write mtimecmp_0_7 mtimecmp_0_7 24 8 read-write mtime_0 Timer Register 0xBFF8 0x20 mtime_0 mtime_0 0 8 read-write mtime_1 mtime_1 8 8 read-write mtime_2 mtime_2 16 8 read-write mtime_3 mtime_3 24 8 read-write mtime_4 Timer Register 0xBFFC 0x20 mtime_4 mtime_4 0 8 read-write mtime_5 mtime_5 8 8 read-write mtime_6 mtime_6 16 8 read-write mtime_7 mtime_7 24 8 read-write PLIC Platform local interrupt controller PLIC 0xC000000 0x0 0x400000 registers FLASH_PRIORITY Acting priority of interrupt FLASH 0x4 0x20 FLASH_PRIORITY Acting priority of interrupt FLASH 0 4 read-write RTC_PRIORITY Acting priority of interrupt RTC 0x8 0x20 RTC_PRIORITY Acting priority of interrupt RTC 0 4 read-write FCB0_PRIORITY Acting priority of interrupt FCB0 0xC 0x20 FCB0_PRIORITY Acting priority of interrupt FCB0 0 4 read-write WATCHDOG0_PRIORITY Acting priority of interrupt WATCHDOG0 0x10 0x20 WATCHDOG0_PRIORITY Acting priority of interrupt WATCHDOG0 0 4 read-write SPI0_PRIORITY Acting priority of interrupt SPI0 0x14 0x20 SPI0_PRIORITY Acting priority of interrupt SPI0 0 4 read-write SPI1_PRIORITY Acting priority of interrupt SPI1 0x18 0x20 SPI1_PRIORITY Acting priority of interrupt SPI1 0 4 read-write GPIO0_PRIORITY Acting priority of interrupt GPIO0 0x1C 0x20 GPIO0_PRIORITY Acting priority of interrupt GPIO0 0 4 read-write GPIO1_PRIORITY Acting priority of interrupt GPIO1 0x20 0x20 GPIO1_PRIORITY Acting priority of interrupt GPIO1 0 4 read-write GPIO2_PRIORITY Acting priority of interrupt GPIO2 0x24 0x20 GPIO2_PRIORITY Acting priority of interrupt GPIO2 0 4 read-write GPIO3_PRIORITY Acting priority of interrupt GPIO3 0x28 0x20 GPIO3_PRIORITY Acting priority of interrupt GPIO3 0 4 read-write GPIO4_PRIORITY Acting priority of interrupt GPIO4 0x2C 0x20 GPIO4_PRIORITY Acting priority of interrupt GPIO4 0 4 read-write GPIO5_PRIORITY Acting priority of interrupt GPIO5 0x30 0x20 GPIO5_PRIORITY Acting priority of interrupt GPIO5 0 4 read-write GPIO6_PRIORITY Acting priority of interrupt GPIO6 0x34 0x20 GPIO6_PRIORITY Acting priority of interrupt GPIO6 0 4 read-write GPIO7_PRIORITY Acting priority of interrupt GPIO7 0x38 0x20 GPIO7_PRIORITY Acting priority of interrupt GPIO7 0 4 read-write GPIO8_PRIORITY Acting priority of interrupt GPIO8 0x3C 0x20 GPIO8_PRIORITY Acting priority of interrupt GPIO8 0 4 read-write GPIO9_PRIORITY Acting priority of interrupt GPIO9 0x40 0x20 GPIO9_PRIORITY Acting priority of interrupt GPIO9 0 4 read-write TIMER0_PRIORITY Acting priority of interrupt TIMER0 0x44 0x20 TIMER0_PRIORITY Acting priority of interrupt TIMER0 0 4 read-write TIMER1_PRIORITY Acting priority of interrupt TIMER1 0x48 0x20 TIMER1_PRIORITY Acting priority of interrupt TIMER1 0 4 read-write GPTIMER0_PRIORITY Acting priority of interrupt GPTIMER0 0x4C 0x20 GPTIMER0_PRIORITY Acting priority of interrupt GPTIMER0 0 4 read-write GPTIMER1_PRIORITY Acting priority of interrupt GPTIMER1 0x50 0x20 GPTIMER1_PRIORITY Acting priority of interrupt GPTIMER1 0 4 read-write GPTIMER2_PRIORITY Acting priority of interrupt GPTIMER2 0x54 0x20 GPTIMER2_PRIORITY Acting priority of interrupt GPTIMER2 0 4 read-write GPTIMER3_PRIORITY Acting priority of interrupt GPTIMER3 0x58 0x20 GPTIMER3_PRIORITY Acting priority of interrupt GPTIMER3 0 4 read-write GPTIMER4_PRIORITY Acting priority of interrupt GPTIMER4 0x5C 0x20 GPTIMER4_PRIORITY Acting priority of interrupt GPTIMER4 0 4 read-write UART0_PRIORITY Acting priority of interrupt UART0 0x60 0x20 UART0_PRIORITY Acting priority of interrupt UART0 0 4 read-write UART1_PRIORITY Acting priority of interrupt UART1 0x64 0x20 UART1_PRIORITY Acting priority of interrupt UART1 0 4 read-write UART2_PRIORITY Acting priority of interrupt UART2 0x68 0x20 UART2_PRIORITY Acting priority of interrupt UART2 0 4 read-write UART3_PRIORITY Acting priority of interrupt UART3 0x6C 0x20 UART3_PRIORITY Acting priority of interrupt UART3 0 4 read-write UART4_PRIORITY Acting priority of interrupt UART4 0x70 0x20 UART4_PRIORITY Acting priority of interrupt UART4 0 4 read-write CAN0_PRIORITY Acting priority of interrupt CAN0 0x74 0x20 CAN0_PRIORITY Acting priority of interrupt CAN0 0 4 read-write I2C0_PRIORITY Acting priority of interrupt I2C0 0x78 0x20 I2C0_PRIORITY Acting priority of interrupt I2C0 0 4 read-write I2C1_PRIORITY Acting priority of interrupt I2C1 0x7C 0x20 I2C1_PRIORITY Acting priority of interrupt I2C1 0 4 read-write DMAC0_INTR_PRIORITY Acting priority of interrupt DMAC0_INTR 0x80 0x20 DMAC0_INTR_PRIORITY Acting priority of interrupt DMAC0_INTR 0 4 read-write DMAC0_INTTC_PRIORITY Acting priority of interrupt DMAC0_INTTC 0x84 0x20 DMAC0_INTTC_PRIORITY Acting priority of interrupt DMAC0_INTTC 0 4 read-write DMAC0_INTERR_PRIORITY Acting priority of interrupt DMAC0_INTERR 0x88 0x20 DMAC0_INTERR_PRIORITY Acting priority of interrupt DMAC0_INTERR 0 4 read-write USB0_PRIORITY Acting priority of interrupt USB0 0x8C 0x20 USB0_PRIORITY Acting priority of interrupt USB0 0 4 read-write MAC0_PRIORITY Acting priority of interrupt MAC0 0x90 0x20 MAC0_PRIORITY Acting priority of interrupt MAC0 0 4 read-write EXT_INT0_PRIORITY Acting priority of interrupt EXT_INT0 0x94 0x20 EXT_INT0_PRIORITY Acting priority of interrupt EXT_INT0 0 4 read-write EXT_INT1_PRIORITY Acting priority of interrupt EXT_INT1 0x98 0x20 EXT_INT1_PRIORITY Acting priority of interrupt EXT_INT1 0 4 read-write EXT_INT2_PRIORITY Acting priority of interrupt EXT_INT2 0x9C 0x20 EXT_INT2_PRIORITY Acting priority of interrupt EXT_INT2 0 4 read-write EXT_INT3_PRIORITY Acting priority of interrupt EXT_INT3 0xA0 0x20 EXT_INT3_PRIORITY Acting priority of interrupt EXT_INT3 0 4 read-write EXT_INT4_PRIORITY Acting priority of interrupt EXT_INT4 0xA4 0x20 EXT_INT4_PRIORITY Acting priority of interrupt EXT_INT4 0 4 read-write EXT_INT5_PRIORITY Acting priority of interrupt EXT_INT5 0xA8 0x20 EXT_INT5_PRIORITY Acting priority of interrupt EXT_INT5 0 4 read-write EXT_INT6_PRIORITY Acting priority of interrupt EXT_INT6 0xAC 0x20 EXT_INT6_PRIORITY Acting priority of interrupt EXT_INT6 0 4 read-write EXT_INT7_PRIORITY Acting priority of interrupt EXT_INT7 0xB0 0x20 EXT_INT7_PRIORITY Acting priority of interrupt EXT_INT7 0 4 read-write PENDING_0 Pending bit array 0x1000 0x20 FLASH_PENDING Pending bit for interrupt FLASH 1 1 read-only RTC_PENDING Pending bit for interrupt RTC 2 1 read-only FCB0_PENDING Pending bit for interrupt FCB0 3 1 read-only WATCHDOG0_PENDING Pending bit for interrupt WATCHDOG0 4 1 read-only SPI0_PENDING Pending bit for interrupt SPI0 5 1 read-only SPI1_PENDING Pending bit for interrupt SPI1 6 1 read-only GPIO0_PENDING Pending bit for interrupt GPIO0 7 1 read-only GPIO1_PENDING Pending bit for interrupt GPIO1 8 1 read-only GPIO2_PENDING Pending bit for interrupt GPIO2 9 1 read-only GPIO3_PENDING Pending bit for interrupt GPIO3 10 1 read-only GPIO4_PENDING Pending bit for interrupt GPIO4 11 1 read-only GPIO5_PENDING Pending bit for interrupt GPIO5 12 1 read-only GPIO6_PENDING Pending bit for interrupt GPIO6 13 1 read-only GPIO7_PENDING Pending bit for interrupt GPIO7 14 1 read-only GPIO8_PENDING Pending bit for interrupt GPIO8 15 1 read-only GPIO9_PENDING Pending bit for interrupt GPIO9 16 1 read-only TIMER0_PENDING Pending bit for interrupt TIMER0 17 1 read-only TIMER1_PENDING Pending bit for interrupt TIMER1 18 1 read-only GPTIMER0_PENDING Pending bit for interrupt GPTIMER0 19 1 read-only GPTIMER1_PENDING Pending bit for interrupt GPTIMER1 20 1 read-only GPTIMER2_PENDING Pending bit for interrupt GPTIMER2 21 1 read-only GPTIMER3_PENDING Pending bit for interrupt GPTIMER3 22 1 read-only GPTIMER4_PENDING Pending bit for interrupt GPTIMER4 23 1 read-only UART0_PENDING Pending bit for interrupt UART0 24 1 read-only UART1_PENDING Pending bit for interrupt UART1 25 1 read-only UART2_PENDING Pending bit for interrupt UART2 26 1 read-only UART3_PENDING Pending bit for interrupt UART3 27 1 read-only UART4_PENDING Pending bit for interrupt UART4 28 1 read-only CAN0_PENDING Pending bit for interrupt CAN0 29 1 read-only I2C0_PENDING Pending bit for interrupt I2C0 30 1 read-only I2C1_PENDING Pending bit for interrupt I2C1 31 1 read-only PENDING_1 Pending bit array 0x1004 0x20 DMAC0_INTR_PENDING Pending bit for interrupt DMAC0_INTR 0 1 read-only DMAC0_INTTC_PENDING Pending bit for interrupt DMAC0_INTTC 1 1 read-only DMAC0_INTERR_PENDING Pending bit for interrupt DMAC0_INTERR 2 1 read-only USB0_PENDING Pending bit for interrupt USB0 3 1 read-only MAC0_PENDING Pending bit for interrupt MAC0 4 1 read-only EXT_INT0_PENDING Pending bit for interrupt EXT_INT0 5 1 read-only EXT_INT1_PENDING Pending bit for interrupt EXT_INT1 6 1 read-only EXT_INT2_PENDING Pending bit for interrupt EXT_INT2 7 1 read-only EXT_INT3_PENDING Pending bit for interrupt EXT_INT3 8 1 read-only EXT_INT4_PENDING Pending bit for interrupt EXT_INT4 9 1 read-only EXT_INT5_PENDING Pending bit for interrupt EXT_INT5 10 1 read-only EXT_INT6_PENDING Pending bit for interrupt EXT_INT6 11 1 read-only EXT_INT7_PENDING Pending bit for interrupt EXT_INT7 12 1 read-only ENABLE_0 Enable bits for each interrupt source for target 0. 1 bit for each interrupt source. 0x2000 0x20 FLASH_ENABLE Enable bit for interrupt FLASH 1 1 read-write RTC_ENABLE Enable bit for interrupt RTC 2 1 read-write FCB0_ENABLE Enable bit for interrupt FCB0 3 1 read-write WATCHDOG0_ENABLE Enable bit for interrupt WATCHDOG0 4 1 read-write SPI0_ENABLE Enable bit for interrupt SPI0 5 1 read-write SPI1_ENABLE Enable bit for interrupt SPI1 6 1 read-write GPIO0_ENABLE Enable bit for interrupt GPIO0 7 1 read-write GPIO1_ENABLE Enable bit for interrupt GPIO1 8 1 read-write GPIO2_ENABLE Enable bit for interrupt GPIO2 9 1 read-write GPIO3_ENABLE Enable bit for interrupt GPIO3 10 1 read-write GPIO4_ENABLE Enable bit for interrupt GPIO4 11 1 read-write GPIO5_ENABLE Enable bit for interrupt GPIO5 12 1 read-write GPIO6_ENABLE Enable bit for interrupt GPIO6 13 1 read-write GPIO7_ENABLE Enable bit for interrupt GPIO7 14 1 read-write GPIO8_ENABLE Enable bit for interrupt GPIO8 15 1 read-write GPIO9_ENABLE Enable bit for interrupt GPIO9 16 1 read-write TIMER0_ENABLE Enable bit for interrupt TIMER0 17 1 read-write TIMER1_ENABLE Enable bit for interrupt TIMER1 18 1 read-write GPTIMER0_ENABLE Enable bit for interrupt GPTIMER0 19 1 read-write GPTIMER1_ENABLE Enable bit for interrupt GPTIMER1 20 1 read-write GPTIMER2_ENABLE Enable bit for interrupt GPTIMER2 21 1 read-write GPTIMER3_ENABLE Enable bit for interrupt GPTIMER3 22 1 read-write GPTIMER4_ENABLE Enable bit for interrupt GPTIMER4 23 1 read-write UART0_ENABLE Enable bit for interrupt UART0 24 1 read-write UART1_ENABLE Enable bit for interrupt UART1 25 1 read-write UART2_ENABLE Enable bit for interrupt UART2 26 1 read-write UART3_ENABLE Enable bit for interrupt UART3 27 1 read-write UART4_ENABLE Enable bit for interrupt UART4 28 1 read-write CAN0_ENABLE Enable bit for interrupt CAN0 29 1 read-write I2C0_ENABLE Enable bit for interrupt I2C0 30 1 read-write I2C1_ENABLE Enable bit for interrupt I2C1 31 1 read-write ENABLE_4 Enable bits for each interrupt source for target 0. 1 bit for each interrupt source. 0x2004 0x20 DMAC0_INTR_ENABLE Enable bit for interrupt DMAC0_INTR 0 1 read-write DMAC0_INTTC_ENABLE Enable bit for interrupt DMAC0_INTTC 1 1 read-write DMAC0_INTERR_ENABLE Enable bit for interrupt DMAC0_INTERR 2 1 read-write USB0_ENABLE Enable bit for interrupt USB0 3 1 read-write MAC0_ENABLE Enable bit for interrupt MAC0 4 1 read-write EXT_INT0_ENABLE Enable bit for interrupt EXT_INT0 5 1 read-write EXT_INT1_ENABLE Enable bit for interrupt EXT_INT1 6 1 read-write EXT_INT2_ENABLE Enable bit for interrupt EXT_INT2 7 1 read-write EXT_INT3_ENABLE Enable bit for interrupt EXT_INT3 8 1 read-write EXT_INT4_ENABLE Enable bit for interrupt EXT_INT4 9 1 read-write EXT_INT5_ENABLE Enable bit for interrupt EXT_INT5 10 1 read-write EXT_INT6_ENABLE Enable bit for interrupt EXT_INT6 11 1 read-write EXT_INT7_ENABLE Enable bit for interrupt EXT_INT7 12 1 read-write THRESHOLD_0 Interrupt claim threshold for target 0. Maximum value is 15. 0x200000 0x20 THRESHOLD_0 Interrupt claim threshold for target 0. Maximum value is 15. 0 4 read-write CLAIM_COMPLETE_0 Claim/Complete register for Target 0. Reading this register returns the claimed interrupt number and makes it no longer pending.Writing the interrupt number back completes the interrupt. 0x200004 0x20 CLAIM_COMPLETE_0 Claim/Complete register for Target 0. Reading this register returns the claimed interrupt number and makes it no longer pending.Writing the interrupt number back completes the interrupt. 0 32 read-write RTC Real time clock RTC 0x40000000 0x0 0x80 registers RTC_CRH RTC CRH 0x0 0x20 SECIE Second interrupt enable 0 1 read-write ALRIE Alarm interrupt enable 1 1 read-write OWIE Overflow interrupt enable 2 1 read-write RTC_CRL RTC CRL 0x4 0x20 SECF Second flag 0 1 read-write ALRF Alarm flag 1 1 read-write OWF Overflow flag 2 1 read-write RSF Registers synchronized flag 3 1 read-write CNF Configuration flag 4 1 read-write RTOFF RTC operation OFF 5 1 read-only RTC_PRLH RTC prescaler load register high 0x8 0x20 RTC_PRLH RTC prescaler load register high 0 4 read-write RTC_PRLL RTC prescaler load register low 0xC 0x20 RTC_PRLL RTC prescaler load register low 0 16 read-write RTC_DIVH RTC prescaler divider register high 0x10 0x20 RTC_DIVH RTC prescaler divider register high 0 4 read-write RTC_DIVL RTC prescaler divider register low 0x14 0x20 RTC_DIVL RTC prescaler divider register low 0 16 read-write RTC_CNTH RTC counter register high 0x18 0x20 RTC_CNTH RTC counter register high 0 16 read-write RTC_CNTL RTC counter register low 0x1C 0x20 RTC_CNTL RTC counter register low 0 16 read-write RTC_ALRH RTC alarm register high 0x20 0x20 RTC_ALRH RTC alarm register high 0 16 read-write RTC_ALRL RTC alarm register low 0x24 0x20 RTC_ALRL RTC alarm register low 0 16 read-write RTC_RCYC Read minimum cycle 0x28 0x20 RTC_RCYC Read minimum cycle 0 4 read-write RCC_BDCR Backup domain control register 0x30 0x10 LSEON Low speed external oscillator enable 0 1 read-write LSERDY Low speed external oscillator ready 1 1 read-write LSEBYP Low speed external oscillator ready bypass 2 1 read-write RTCSEL RTC source selection 8 2 read-write No clock No clock 0 LSE LSE 1 LSI LSI 2 External External 3 RTCEN RTC enable 15 1 read-write RCC_BDRST Backup domain software reset 0x32 0x10 RCC_BDRST Backup domain software reset 0 1 read-write IWDG_CTRL Independent watchdog control 0x34 0x20 PR Prescaler register 0 3 read-write Div 2 Div 2 0 Div 4 Div 4 1 Div 8 Div 8 2 Div 16 Div 16 3 Div 32 Div 32 4 Div 64 Div 64 5 Div 128 Div 128 6 Div 256 Div 256 7 STOP_FREEZE Freeze IWDG clock in stop mode 4 1 read-write STDBY_FREEZE Freeze IWDG clock in standby mode 5 1 read-write CLKSEL IWDG clock source selection in non-standby mode 6 1 read-write LSI LSI 0 LSE LSE 1 IWDG_EN IWDG enable 8 1 read-write BKP_RTCCR RTC clock calibration register 0x3C 0x20 CAL RTC calibration value 0 7 read-write CCO Calibration clock output 7 1 read-write ASOE Alarm or second output enable 8 1 read-write ASOS Alarm or second output selection 9 1 read-write Alarm output Alarm output 0 Second output Second output 1 BKP_DR0 Backup data register 0 0x40 0x20 BKP_DR0 Backup data register 0 0 16 read-write BKP_DR1 Backup data register 1 0x44 0x20 BKP_DR1 Backup data register 1 0 16 read-write BKP_DR2 Backup data register 2 0x48 0x20 BKP_DR2 Backup data register 2 0 16 read-write BKP_DR3 Backup data register 3 0x4C 0x20 BKP_DR3 Backup data register 3 0 16 read-write BKP_DR4 Backup data register 4 0x50 0x20 BKP_DR4 Backup data register 4 0 16 read-write BKP_DR5 Backup data register 5 0x54 0x20 BKP_DR5 Backup data register 5 0 16 read-write BKP_DR6 Backup data register 6 0x58 0x20 BKP_DR6 Backup data register 6 0 16 read-write BKP_DR7 Backup data register 7 0x5C 0x20 BKP_DR7 Backup data register 7 0 16 read-write BKP_DR8 Backup data register 8 0x60 0x20 BKP_DR8 Backup data register 8 0 16 read-write BKP_DR9 Backup data register 9 0x64 0x20 BKP_DR9 Backup data register 9 0 16 read-write BKP_DR10 Backup data register 10 0x68 0x20 BKP_DR10 Backup data register 10 0 16 read-write BKP_DR11 Backup data register 11 0x6C 0x20 BKP_DR11 Backup data register 11 0 16 read-write BKP_DR12 Backup data register 12 0x70 0x20 BKP_DR12 Backup data register 12 0 16 read-write BKP_DR13 Backup data register 13 0x74 0x20 BKP_DR13 Backup data register 13 0 16 read-write BKP_DR14 Backup data register 14 0x78 0x20 BKP_DR14 Backup data register 14 0 16 read-write BKP_DR15 Backup data register 15 0x7C 0x20 BKP_DR15 Backup data register 15 0 16 read-write SYS System control SYS 0x3000000 0x0 0x1000 registers BOOT_MODE Boot mode 0x0 0x20 BOOT_MODE Boot mode 0 2 read-only RST_CNTL Reset control register 0x4 0x20 SFT_RST Software reset 0 1 read-write EXT_RST_EN External reset enable 1 1 read-write FCB_RST_DIS FCB reset disable 2 1 read-write REMOVE_RST Remove reset flags 24 1 write-only EXT_RST_FLAG External reset flag 25 1 read-only PIN_RST_FLAG Pin reset flag 26 1 read-only POR_RST_FLAG Power on reset flag 27 1 read-only SFT_RST_FLAG Software reset flag 28 1 read-only IWDG_RST_FLAG IWDG reset flag 29 1 read-only WDOG_RST_FLAG Watch dog reset flag 30 1 read-only LP_RST_FLAG Low power reset flag 31 1 read-only PWR_CNTL Power control register 0x8 0x20 SLEEP_DEEP Stop mode enable 0 1 read-write POWER_DOWN Standy mode enable 1 1 read-write CLK_CNTL Clock control register 0xC 0x20 CLK_SOURCE Clock source 0 2 read-write HSI HSI 0 HSE HSE 1 PLL PLL 2 External External 3 HSE_ON HSE clock enable 2 1 read-write HSE_BYP HSE clock bypass 3 1 read-write HSE_RDY HSE clock ready 4 1 read-only PLL_ON PLL clock enable 5 1 read-write PLL_RDY PLL clock ready 6 1 read-only SCLK_DIV Sclk divider 8 8 read-write BUS_CNTL Bus control register 0x10 0x20 EXT_AHB_SEL External AHB select 0 1 read-write SWJ_CNTL SWJ pin control register 0x14 0x20 SWJ_JTCK_DIS Disable JTCK pin and use it as GPIO 0 1 read-write SWJ_JTMS_DIS Disable JTMS pin and use it as GPIO 1 1 read-write SWJ_JTDI_DIS Disable JTDI pin and use it as GPIO 2 1 read-write SWJ_JTDO_DIS Disable JTDO pin and use it as GPIO 3 1 read-write SWJ_NJTRST_DIS Disable NJTRST pin and use it as GPIO 4 1 read-write MISC_CNTL Miscellaneous control register 0x18 0x20 OSC_CNTL Oscillator control 0 4 read-write VOL_CNTL Voltage control 4 1 read-write DBG_CNTL Debug control register 0x1C 0x20 DBG_STOP Debug stop mode 1 1 read-write DBG_STANDBY Debug standby mode 2 1 read-write DBG_IWDG_STOP Stop IWDG during debug 3 1 read-write DBG_RTC_STOP Stop RTC during debug 4 1 read-write WKP_RISE_TRG Wake up rise triggers 0x20 0x20 EXT_INT0_RISE_TRG External interrupt 0 rise trigger 0 1 read-write EXT_INT1_RISE_TRG External interrupt 1 rise trigger 1 1 read-write EXT_INT2_RISE_TRG External interrupt 2 rise trigger 2 1 read-write EXT_INT3_RISE_TRG External interrupt 3 rise trigger 3 1 read-write EXT_INT4_RISE_TRG External interrupt 4 rise trigger 4 1 read-write EXT_INT5_RISE_TRG External interrupt 5 rise trigger 5 1 read-write EXT_INT6_RISE_TRG External interrupt 6 rise trigger 6 1 read-write EXT_INT7_RISE_TRG External interrupt 7 rise trigger 7 1 read-write ALARM_RISE_TRG Alarm rise trigger 8 1 read-write WKP_FALL_TRG Wake up fall triggers 0x24 0x20 EXT_INT0_FALL_TRG External interrupt 0 fall trigger 0 1 read-write EXT_INT1_FALL_TRG External interrupt 1 fall trigger 1 1 read-write EXT_INT2_FALL_TRG External interrupt 2 fall trigger 2 1 read-write EXT_INT3_FALL_TRG External interrupt 3 fall trigger 3 1 read-write EXT_INT4_FALL_TRG External interrupt 4 fall trigger 4 1 read-write EXT_INT5_FALL_TRG External interrupt 5 fall trigger 5 1 read-write EXT_INT6_FALL_TRG External interrupt 6 fall trigger 6 1 read-write EXT_INT7_FALL_TRG External interrupt 7 fall trigger 7 1 read-write ALARM_FALL_TRG Alarm fall trigger 8 1 read-write WKP_PENDING Wake up pending register 0x28 0x20 EXT_INT0_PENDING External interrupt 0 pending 0 1 read-write EXT_INT1_PENDING External interrupt 1 pending 1 1 read-write EXT_INT2_PENDING External interrupt 2 pending 2 1 read-write EXT_INT3_PENDING External interrupt 3 pending 3 1 read-write EXT_INT4_PENDING External interrupt 4 pending 4 1 read-write EXT_INT5_PENDING External interrupt 5 pending 5 1 read-write EXT_INT6_PENDING External interrupt 6 pending 6 1 read-write EXT_INT7_PENDING External interrupt 7 pending 7 1 read-write ALARM_PENDING Alarm pending 8 1 read-write MTIME_PSC Mtime prescaler value 0x30 0x20 MTIME_PSC Mtime prescaler value 0 16 read-write MTIME_OFF Mtime off 30 1 read-write MTIME_DBG_STOP Stop mtime during debug 31 1 read-write MTIME_PSC_CNT Mtime prescaler counter 0x34 0x20 MTIME_PSC_CNT Mtime prescaler counter 0 16 read-only PBUS_DIV Pbus clock divider 0x38 0x20 PBUS_DIV Pbus clock divider 0 4 read-write APB_RST APB peripheral reset 0x40 0x20 APB_RST_FCB0 APB reset for FCB 0 1 read-write APB_RST_WATCHDOG0 APB reset for WATCHDOG 1 1 read-write APB_RST_SPI0 APB reset for SPI 2 1 read-write APB_RST_SPI1 APB reset for SPI 3 1 read-write APB_RST_GPIO0 APB reset for GPIO 4 1 read-write APB_RST_GPIO1 APB reset for GPIO 5 1 read-write APB_RST_GPIO2 APB reset for GPIO 6 1 read-write APB_RST_GPIO3 APB reset for GPIO 7 1 read-write APB_RST_GPIO4 APB reset for GPIO 8 1 read-write APB_RST_GPIO5 APB reset for GPIO 9 1 read-write APB_RST_GPIO6 APB reset for GPIO 10 1 read-write APB_RST_GPIO7 APB reset for GPIO 11 1 read-write APB_RST_GPIO8 APB reset for GPIO 12 1 read-write APB_RST_GPIO9 APB reset for GPIO 13 1 read-write APB_RST_TIMER0 APB reset for TIMER 14 1 read-write APB_RST_TIMER1 APB reset for TIMER 15 1 read-write APB_RST_GPTIMER0 APB reset for GPTIMER 16 1 read-write APB_RST_GPTIMER1 APB reset for GPTIMER 17 1 read-write APB_RST_GPTIMER2 APB reset for GPTIMER 18 1 read-write APB_RST_GPTIMER3 APB reset for GPTIMER 19 1 read-write APB_RST_GPTIMER4 APB reset for GPTIMER 20 1 read-write APB_RST_UART0 APB reset for UART 21 1 read-write APB_RST_UART1 APB reset for UART 22 1 read-write APB_RST_UART2 APB reset for UART 23 1 read-write APB_RST_UART3 APB reset for UART 24 1 read-write APB_RST_UART4 APB reset for UART 25 1 read-write APB_RST_CAN0 APB reset for CAN 26 1 read-write APB_RST_I2C0 APB reset for I2C 27 1 read-write APB_RST_I2C1 APB reset for I2C 28 1 read-write AHB_RST AHB peripheral reset 0x50 0x20 AHB_RST_DMAC0 AHB reset for DMAC 0 1 read-write AHB_RST_USB0 AHB reset for USB 1 1 read-write AHB_RST_CRC0 AHB reset for CRC 2 1 read-write AHB_RST_MAC0 AHB reset for MAC 3 1 read-write APB_CLK_EN APB peripheral clock enable 0x60 0x20 APB_CLK_EN_FCB0 APB clock enable for FCB 0 1 read-write APB_CLK_EN_WATCHDOG0 APB clock enable for WATCHDOG 1 1 read-write APB_CLK_EN_SPI0 APB clock enable for SPI 2 1 read-write APB_CLK_EN_SPI1 APB clock enable for SPI 3 1 read-write APB_CLK_EN_GPIO0 APB clock enable for GPIO 4 1 read-write APB_CLK_EN_GPIO1 APB clock enable for GPIO 5 1 read-write APB_CLK_EN_GPIO2 APB clock enable for GPIO 6 1 read-write APB_CLK_EN_GPIO3 APB clock enable for GPIO 7 1 read-write APB_CLK_EN_GPIO4 APB clock enable for GPIO 8 1 read-write APB_CLK_EN_GPIO5 APB clock enable for GPIO 9 1 read-write APB_CLK_EN_GPIO6 APB clock enable for GPIO 10 1 read-write APB_CLK_EN_GPIO7 APB clock enable for GPIO 11 1 read-write APB_CLK_EN_GPIO8 APB clock enable for GPIO 12 1 read-write APB_CLK_EN_GPIO9 APB clock enable for GPIO 13 1 read-write APB_CLK_EN_TIMER0 APB clock enable for TIMER 14 1 read-write APB_CLK_EN_TIMER1 APB clock enable for TIMER 15 1 read-write APB_CLK_EN_GPTIMER0 APB clock enable for GPTIMER 16 1 read-write APB_CLK_EN_GPTIMER1 APB clock enable for GPTIMER 17 1 read-write APB_CLK_EN_GPTIMER2 APB clock enable for GPTIMER 18 1 read-write APB_CLK_EN_GPTIMER3 APB clock enable for GPTIMER 19 1 read-write APB_CLK_EN_GPTIMER4 APB clock enable for GPTIMER 20 1 read-write APB_CLK_EN_UART0 APB clock enable for UART 21 1 read-write APB_CLK_EN_UART1 APB clock enable for UART 22 1 read-write APB_CLK_EN_UART2 APB clock enable for UART 23 1 read-write APB_CLK_EN_UART3 APB clock enable for UART 24 1 read-write APB_CLK_EN_UART4 APB clock enable for UART 25 1 read-write APB_CLK_EN_CAN0 APB clock enable for CAN 26 1 read-write APB_CLK_EN_I2C0 APB clock enable for I2C 27 1 read-write APB_CLK_EN_I2C1 APB clock enable for I2C 28 1 read-write AHB_CLK_EN AHB peripheral clock enable 0x70 0x20 AHB_CLK_EN_DMAC0 AHB clock enable for DMAC 0 1 read-write AHB_CLK_EN_USB0 AHB clock enable for USB 1 1 read-write AHB_CLK_EN_CRC0 AHB clock enable for CRC 2 1 read-write AHB_CLK_EN_MAC0 AHB clock enable for MAC 3 1 read-write APB_CLK_STOP APB peripheral clock stop during debug 0x80 0x20 APB_CLK_STOP_FCB0 APB clock clock for FCB 0 1 read-write APB_CLK_STOP_WATCHDOG0 APB clock clock for WATCHDOG 1 1 read-write APB_CLK_STOP_SPI0 APB clock clock for SPI 2 1 read-write APB_CLK_STOP_SPI1 APB clock clock for SPI 3 1 read-write APB_CLK_STOP_GPIO0 APB clock clock for GPIO 4 1 read-write APB_CLK_STOP_GPIO1 APB clock clock for GPIO 5 1 read-write APB_CLK_STOP_GPIO2 APB clock clock for GPIO 6 1 read-write APB_CLK_STOP_GPIO3 APB clock clock for GPIO 7 1 read-write APB_CLK_STOP_GPIO4 APB clock clock for GPIO 8 1 read-write APB_CLK_STOP_GPIO5 APB clock clock for GPIO 9 1 read-write APB_CLK_STOP_GPIO6 APB clock clock for GPIO 10 1 read-write APB_CLK_STOP_GPIO7 APB clock clock for GPIO 11 1 read-write APB_CLK_STOP_GPIO8 APB clock clock for GPIO 12 1 read-write APB_CLK_STOP_GPIO9 APB clock clock for GPIO 13 1 read-write APB_CLK_STOP_TIMER0 APB clock clock for TIMER 14 1 read-write APB_CLK_STOP_TIMER1 APB clock clock for TIMER 15 1 read-write APB_CLK_STOP_GPTIMER0 APB clock clock for GPTIMER 16 1 read-write APB_CLK_STOP_GPTIMER1 APB clock clock for GPTIMER 17 1 read-write APB_CLK_STOP_GPTIMER2 APB clock clock for GPTIMER 18 1 read-write APB_CLK_STOP_GPTIMER3 APB clock clock for GPTIMER 19 1 read-write APB_CLK_STOP_GPTIMER4 APB clock clock for GPTIMER 20 1 read-write APB_CLK_STOP_UART0 APB clock clock for UART 21 1 read-write APB_CLK_STOP_UART1 APB clock clock for UART 22 1 read-write APB_CLK_STOP_UART2 APB clock clock for UART 23 1 read-write APB_CLK_STOP_UART3 APB clock clock for UART 24 1 read-write APB_CLK_STOP_UART4 APB clock clock for UART 25 1 read-write APB_CLK_STOP_CAN0 APB clock clock for CAN 26 1 read-write APB_CLK_STOP_I2C0 APB clock clock for I2C 27 1 read-write APB_CLK_STOP_I2C1 APB clock clock for I2C 28 1 read-write DEVICE_ID Device ID code 0x100 0x20 DEVICE_ID Device ID code 0 32 read-only FLASH Flash controller FLASH 0x40001000 0x0 0x1000 registers FLASH_KEYR Flash key register 0x4 0x20 FLASH_KEYR Flash key register 0 32 read-write FLASH_OPTKEYR Flash OPTKEY register 0x8 0x20 FLASH_OPTKEYR Flash OPTKEY register 0 32 read-write FLASH_SR Flash status register 0xC 0x20 FLASH_SR_BSY Flash busy 0 1 read-only FLASH_SR_PGERR Programming error 2 1 read-write FLASH_SR_WRPRTERR Write protection error 4 1 read-write FLASH_SR_EOP End of operation 5 1 read-write FLASH_CR Flash control register 0x10 0x20 FLASH_CR_PG Flash programming 0 1 read-write FLASH_CR_PER Flash page erase 1 1 read-write FLASH_CR_MER Flash mass erase 2 1 read-write FLASH_CR_BER Flash block erase 3 1 read-write FLASH_CR_OPTPG Option byte programming 4 1 read-write FLASH_CR_OPTER Option byte erase 5 1 read-write FLASH_CR_STRT Flash erase start 6 1 read-write FLASH_CR_LOCK Flash lock 7 1 read-write FLASH_CR_OPTWRE Option bytes write enable 9 1 read-write FLASH_CR_ERRIE Error interrupt enable 10 1 read-write FLASH_CR_EOPIE End of operation interrupt enable 12 1 read-write FLASH_CR_READ Flash flexible read 14 1 read-write FLASH_CR_FASTPG Flash fast programming 15 1 read-write FLASH_CR_DMA Flash DMA programming 16 1 read-write FLASH_CR_STDBY Flash standby, which disables fast read 17 1 read-write FLASH_CR_NO_PD Flash no power down 18 1 read-write FLASH_AR Flash address register 0x14 0x20 FLASH_AR Flash address register 0 32 read-write FLASH_OBR Option byte register 0x1C 0x20 OPTERR Option byte load error 0 1 read-only RDPRT Read protection 1 1 read-only nRST_STOP Generate reset when entering stop mode 3 1 read-only nRST_STDBY Generate reset when entering standby mode 4 1 read-only Data0 Data0 10 8 read-only Data1 Data1 18 8 read-only FLASH_WRPR Write protection register 0x20 0x20 FLASH_WRPR Write protection register 0 32 read-only FLASH_CONFIG Flash configuratioin 0x24 0x20 FLASH_CONFIG Flash configuratioin 0 32 read-only FLASH_DMA_DATA Flash dma data 0x28 0x20 FLASH_DMA_DATA Flash dma data 0 32 write-only FLASH_READ_CTRL Flash read ctrl 0x2C 0x20 FLASH_READ_CTRL Flash read ctrl 0 32 read-write FLASH_READ_DATA Flash read data 0x30 0x20 FLASH_READ_DATA Flash read data 0 32 read-only FCB0 FCB registers FCB 0x40010000 0x0 0x1000 registers CTRL Control register 0x0 0x20 INIT Initialize sram 0 1 read-write WRITE Write operation 1 1 read-write READ Read operation 2 1 read-write UPDATE Update current chain 3 1 read-write ACTIVATE Activate the FPGA configuration 4 1 read-write DEACTIVATE De-activate the FPGA configuration 5 1 read-write AUTO Reset auto configuration mode 6 1 read-write DMA Use FCB is tshe dma flow controller 7 1 read-write INIT_EMB INIT_EMB 16 1 read-write CFGDONE CFGDONE 17 1 read-write CHIP_RSTB CHIP_RSTB 18 1 read-write DEVOE DEVOE 19 1 read-write ADDR Address register 0x4 0x20 ADDR Address register 0 32 read-write DATA Data register 0x8 0x20 DATA Data register 0 32 read-write AUTO Auto configuration register 0xC 0x20 AUTO Auto configuration register 0 32 read-write STAT Status register 0x10 0x20 INIT Sram initialization 0 1 read-only ACTIVE FPGA active 1 1 read-only ERR_ID ID error 4 1 read-only ERR_HEADER Header error 5 1 read-only ERR_CRC CRC error 6 1 read-only INIT_EMB INIT_EMB 16 1 read-only CFGDONE CFGDONE 17 1 read-only CHIP_RSTB CHIP_RSTB 18 1 read-only DEVOE DEVOE 19 1 read-only INT Interrupt register 0x14 0x20 INIT_EN Sram initialization interrupt enable 0 1 read-write ACTIVE_EN FPGA active interrupt enable 1 1 read-write ERR_ID_EN ID error interrupt enable 4 1 read-write ERR_HEADER_EN Header error interrupt enable 5 1 read-write ERR_CRC_EN CRC error interrupt enable 6 1 read-write WATCHDOG0 WATCHDOG registers WATCHDOG 0x40011000 0x0 0x1000 registers WdogLoad Load Register 0x0 0x20 WdogLoad Load Register 0 32 read-write WdogValue Value Register 0x4 0x20 WdogValue Value Register 0 32 read-only WdogControl Control register 0x8 0x20 INTEN Interrupt enable 0 1 read-write RESEN Reset enable 1 1 read-write WdogIntClr Interrupt Clear Register 0xC 0x20 WdogIntClr Interrupt Clear Register 0 1 write-only WdogRIS Raw Interrupt Status Register 0x10 0x20 WdogRIS Raw Interrupt Status Register 0 1 read-only WdogMIS Masked Interrupt Status Register 0x14 0x20 WdogMIS Masked Interrupt Status Register 0 1 read-only WdogLock Lock Register 0xC00 0x20 WdogLock Lock Register 0 32 read-write SPI0 SPI registers SPI 0x40012000 0x0 0x100 registers CTRL Control register 0x0 0x20 SPI_START SPI start operation 0 1 read-write SPI_DONE SPI operation done 1 1 read-write SPI_ERROR SPI operation error 2 1 read-write INT_CLR Interrupt clear 3 1 read-write PHASE_CNT Phase count 4 3 read-write DMA_EN DMA enable for last phase 8 1 read-write WP_EN WP enable 9 1 read-write ENDIAN Endian select 10 1 read-write BE BE 0 LE LE 1 SCLK_DIV Sclk divider 12 8 read-write Div 2 Div 2 2 Div 4 Div 4 4 Div 8 Div 8 8 Div 16 Div 16 16 Div 32 Div 32 32 Div 64 Div 64 64 Div 128 Div 128 128 Div 256 Div 256 0 INT_EN Interrupt enable 20 1 read-write SPI_RESET SPI reset 31 1 read-write PHASE_CTRL[0] Phase control 0 0x10 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[1] Phase control 1 0x14 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[2] Phase control 2 0x18 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[3] Phase control 3 0x1C 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[4] Phase control 4 0x20 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[5] Phase control 5 0x24 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[6] Phase control 6 0x28 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_CTRL[7] Phase control 7 0x2C 0x20 PHASE_START Phase start 0 1 read-only PHASE_DONE Phase done 1 1 read-only PHASE_ERROR Phase error 2 1 read-only PHASE_ACTION Phase action 4 2 read-write TX TX 0 Dummy TX Dummy TX 1 RX RX 2 Poll Poll 3 BYTE_CNT Phase byte count 8 12 read-write SPI_MODE SPI mode 20 2 read-write Single Single 0 Dual Dual 1 Quad Quad 2 PHASE_DATA[0] Phase data 0 0x30 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[1] Phase data 1 0x34 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[2] Phase data 2 0x38 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[3] Phase data 3 0x3C 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[4] Phase data 4 0x40 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[5] Phase data 5 0x44 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[6] Phase data 6 0x48 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write PHASE_DATA[7] Phase data 7 0x4C 0x20 POLL_READ Poll read value 0 8 read-write POLL_EXPECT Poll expected value 8 8 read-write POLL_MASK Poll mask 16 8 read-write POLL_LIMIT Poll limit 24 8 read-write SPI1 0x40013000 GPIO0 GPIO registers GPIO 0x40014000 0x0 0x1000 registers DATA Data register 0x3FC 0x20 DATA0 Data register bit 0 0 1 read-write DATA1 Data register bit 1 1 1 read-write DATA2 Data register bit 2 2 1 read-write DATA3 Data register bit 3 3 1 read-write DATA4 Data register bit 4 4 1 read-write DATA5 Data register bit 5 5 1 read-write DATA6 Data register bit 6 6 1 read-write DATA7 Data register bit 7 7 1 read-write DIR Data direction register 0x400 0x20 DIR0 Data direction bit 0 0 1 read-write Input Input 0 Output Output 1 DIR1 Data direction bit 1 1 1 read-write Input Input 0 Output Output 1 DIR2 Data direction bit 2 2 1 read-write Input Input 0 Output Output 1 DIR3 Data direction bit 3 3 1 read-write Input Input 0 Output Output 1 DIR4 Data direction bit 4 4 1 read-write Input Input 0 Output Output 1 DIR5 Data direction bit 5 5 1 read-write Input Input 0 Output Output 1 DIR6 Data direction bit 6 6 1 read-write Input Input 0 Output Output 1 DIR7 Data direction bit 7 7 1 read-write Input Input 0 Output Output 1 IS Interrupt sense register 0x404 0x20 IS0 Interrupt sense bit 0 0 1 read-write Edge Edge 0 Level Level 1 IS1 Interrupt sense bit 1 1 1 read-write Edge Edge 0 Level Level 1 IS2 Interrupt sense bit 2 2 1 read-write Edge Edge 0 Level Level 1 IS3 Interrupt sense bit 3 3 1 read-write Edge Edge 0 Level Level 1 IS4 Interrupt sense bit 4 4 1 read-write Edge Edge 0 Level Level 1 IS5 Interrupt sense bit 5 5 1 read-write Edge Edge 0 Level Level 1 IS6 Interrupt sense bit 6 6 1 read-write Edge Edge 0 Level Level 1 IS7 Interrupt sense bit 7 7 1 read-write Edge Edge 0 Level Level 1 IBE Interrupt both-edges register 0x408 0x20 IBE0 Interrupt both-edges bit 0 0 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE1 Interrupt both-edges bit 1 1 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE2 Interrupt both-edges bit 2 2 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE3 Interrupt both-edges bit 3 3 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE4 Interrupt both-edges bit 4 4 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE5 Interrupt both-edges bit 5 5 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE6 Interrupt both-edges bit 6 6 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IBE7 Interrupt both-edges bit 7 7 1 read-write Single Edge Single Edge 0 Both Edge Both Edge 1 IEV Interrupt event register 0x40C 0x20 IEV0 Interrupt event bit 0 0 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV1 Interrupt event bit 1 1 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV2 Interrupt event bit 2 2 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV3 Interrupt event bit 3 3 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV4 Interrupt event bit 4 4 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV5 Interrupt event bit 5 5 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV6 Interrupt event bit 6 6 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IEV7 Interrupt event bit 7 7 1 read-write Rising Edge/High Level Rising Edge/High Level 0 Falling Edge/Low Level Falling Edge/Low Level 1 IE Interrupt mask register 0x410 0x20 IE0 Interrupt mask bit 0 0 1 read-write IE1 Interrupt mask bit 1 1 1 read-write IE2 Interrupt mask bit 2 2 1 read-write IE3 Interrupt mask bit 3 3 1 read-write IE4 Interrupt mask bit 4 4 1 read-write IE5 Interrupt mask bit 5 5 1 read-write IE6 Interrupt mask bit 6 6 1 read-write IE7 Interrupt mask bit 7 7 1 read-write RIS Raw interrupt status register 0x414 0x20 RIS0 Raw interrupt status bit 0 0 1 read-write RIS1 Raw interrupt status bit 1 1 1 read-write RIS2 Raw interrupt status bit 2 2 1 read-write RIS3 Raw interrupt status bit 3 3 1 read-write RIS4 Raw interrupt status bit 4 4 1 read-write RIS5 Raw interrupt status bit 5 5 1 read-write RIS6 Raw interrupt status bit 6 6 1 read-write RIS7 Raw interrupt status bit 7 7 1 read-write MIS Masked interrupt status register 0x418 0x20 MIS0 Masked interrupt status bit 0 0 1 read-write MIS1 Masked interrupt status bit 1 1 1 read-write MIS2 Masked interrupt status bit 2 2 1 read-write MIS3 Masked interrupt status bit 3 3 1 read-write MIS4 Masked interrupt status bit 4 4 1 read-write MIS5 Masked interrupt status bit 5 5 1 read-write MIS6 Masked interrupt status bit 6 6 1 read-write MIS7 Masked interrupt status bit 7 7 1 read-write IC Interrupt clear register 0x41C 0x20 IC0 Interrupt clear bit 0 0 1 read-write IC1 Interrupt clear bit 1 1 1 read-write IC2 Interrupt clear bit 2 2 1 read-write IC3 Interrupt clear bit 3 3 1 read-write IC4 Interrupt clear bit 4 4 1 read-write IC5 Interrupt clear bit 5 5 1 read-write IC6 Interrupt clear bit 6 6 1 read-write IC7 Interrupt clear bit 7 7 1 read-write AFSEL Mode control select register 0x420 0x20 AFSEL0 Mode control select bit 0 0 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL1 Mode control select bit 1 1 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL2 Mode control select bit 2 2 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL3 Mode control select bit 3 3 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL4 Mode control select bit 4 4 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL5 Mode control select bit 5 5 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL6 Mode control select bit 6 6 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 AFSEL7 Mode control select bit 7 7 1 read-write Software Mode Software Mode 0 Hardware Mode Hardware Mode 1 GPIO1 0x40015000 GPIO2 0x40016000 GPIO3 0x40017000 GPIO4 0x40018000 GPIO5 0x40019000 GPIO6 0x4001A000 GPIO7 0x4001B000 GPIO8 0x4001C000 GPIO9 0x4001D000 TIMER0 TIMER registers TIMER 0x4001E000 0x0 0x1000 registers Timer1Load Load Register 0x0 0x20 Timer1Load Load Register 0 32 read-write Timer1Value Current Value Register 0x4 0x20 Timer1Value Current Value Register 0 32 read-only Timer1Ctrl Control Register 0x8 0x20 OneShot One shot mode 0 1 read-write TimerSize Timer Size 1 1 read-write 16-bit 16-bit 0 32-bit 32-bit 1 TimerPre Prescaler bits 2 2 read-write Div 1 Div 1 0 Div 16 Div 16 1 Div 256 Div 256 2 IntEnable Interrupt enable 5 1 read-write TimerMode Timer Mode 6 1 read-write Free-running Free-running 0 Periodic Periodic 1 TimerEn Timer Enable 7 1 read-write Timer1IntClr Interrupt Clear Register 0xC 0x20 Timer1IntClr Interrupt Clear Register 0 1 write-only Timer1RIS Raw Interrupt Status Register 0x10 0x20 Timer1RIS Raw Interrupt Status Register 0 1 read-only Timer1MIS Masked Interrupt Status Register 0x14 0x20 Timer1MIS Masked Interrupt Status Register 0 1 read-only Timer1BGL Background Load Register 0x18 0x20 Timer1BGL Background Load Register 0 32 read-write Timer2Load Load Register 0x20 0x20 Timer2Load Load Register 0 32 read-write Timer2Value Current Value Register 0x24 0x20 Timer2Value Current Value Register 0 32 read-only Timer2Ctrl Control Register 0x28 0x20 OneShot One shot mode 0 1 read-write TimerSize Timer Size 1 1 read-write 16-bit 16-bit 0 32-bit 32-bit 1 TimerPre Prescaler bits 2 2 read-write Div 1 Div 1 0 Div 16 Div 16 1 Div 256 Div 256 2 IntEnable Interrupt enable 5 1 read-write TimerMode Timer Mode 6 1 read-write Free-running Free-running 0 Periodic Periodic 1 TimerEn Timer Enable 7 1 read-write Timer2IntClr Interrupt Clear Register 0x2C 0x20 Timer2IntClr Interrupt Clear Register 0 1 write-only Timer2RIS Raw Interrupt Status Register 0x30 0x20 Timer2RIS Raw Interrupt Status Register 0 1 read-only Timer2MIS Masked Interrupt Status Register 0x34 0x20 Timer2MIS Masked Interrupt Status Register 0 1 read-only Timer2BGL Background Load Register 0x38 0x20 Timer2BGL Background Load Register 0 32 read-write TIMER1 0x4001F000 GPTIMER0 GPTIMER registers GPTIMER 0x40020000 0x0 0x1000 registers CR1 Control register 1 0x0 0x20 CEN Counter enable 0 1 read-write UDIS Update disable 1 1 read-write UEV enabled UEV enabled 0 UEV disabled UEV disabled 1 URS Update request source 2 1 read-write All sources All sources 0 Counter overflow/underflow Counter overflow/underflow 1 OPM One pulse mode 3 1 read-write DIR Direction 4 1 read-write Up counter Up counter 0 Down counter Down counter 1 CMS Center-aligned mode selection 5 2 read-write Edge-aligned Edge-aligned 0 Center-aligned 1 Center-aligned 1 1 Center-aligned 2 Center-aligned 2 2 Center-aligned 3 Center-aligned 3 3 ARPE Auto-reload preload enable 7 1 read-write CKD Clock division 8 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 CR2 Control register 2 0x4 0x20 CCPC Capture/Compare preloaded control 0 1 read-write CCUS Capture/Compare control update selection 2 1 read-write COMG COMG 0 COMG and TRGI COMG and TRGI 1 CCDS Capture/Compare DMA selection 3 1 read-write CCx CCx 0 Update Update 1 MMS Master mode selection 4 3 read-write Reset Reset 0 Enable Enable 1 Update Update 2 Compare Pulse Compare Pulse 3 OC0REF OC0REF 4 OC1REF OC1REF 5 OC2REF OC2REF 6 OC3REF OC3REF 7 TI0S TI0 selection 7 1 read-write TI0 TI0 0 XOR of TI0/TI1/TI2 XOR of TI0/TI1/TI2 1 OIS0 OC0 idle state 8 1 read-write OIS0N OC0N idle state 9 1 read-write OIS1 OC1 idle state 10 1 read-write OIS1N OC1N idle state 11 1 read-write OIS2 OC2 idle state 12 1 read-write OIS2N OC2N idle state 13 1 read-write OIS4 OC3 idle state 14 1 read-write OIS4N OC3N idle state 15 1 read-write SMCR Slave mode control register 0x8 0x20 SMS Slave mode selection 0 3 read-write Disabled Disabled 0 Encoder 1 Encoder 1 1 Encoder 2 Encoder 2 2 Encoder 3 Encoder 3 3 Reset Reset 4 Gated Gated 5 Trigger Trigger 6 External Clock 1 External Clock 1 7 OCCS OCREF clear selection 3 1 read-write OCREF_CLR OCREF_CLR 0 ETRF ETRF 1 TS Trigger selection 4 3 read-write ITR0 ITR0 0 ITR1 ITR1 1 ITR2 ITR2 2 ITR3 ITR3 3 TI1F_ED TI1F_ED 4 TI0FP0 TI0FP0 5 TI1FP1 TI1FP1 6 ETRF ETRF 7 MSM Master/slave mode 7 1 read-write ETF External trigger filter 8 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 ETPS External trigger prescaler 12 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 ECE External clock enable 14 1 read-write ETP External trigger polarity 15 1 read-write Non-inverted Non-inverted 0 Inverted Inverted 1 DIER DMA/interrupt enable register 0xC 0x20 UIE Update interrupt enable 0 1 read-write CC0IE Capture/Compare 0 interrupt enable 1 1 read-write CC1IE Capture/Compare 1 interrupt enable 2 1 read-write CC2IE Capture/Compare 2 interrupt enable 3 1 read-write CC3IE Capture/Compare 3 interrupt enable 4 1 read-write COMIE COM interrupt enable 5 1 read-write TIE Trigger interrupt enable 6 1 read-write BIE Break interrupt enable 7 1 read-write UDE Update DMA request enable 8 1 read-write CC0DE Capture/Compare 0 DMA request enable 9 1 read-write CC1DE Capture/Compare 1 DMA request enable 10 1 read-write CC2DE Capture/Compare 2 DMA request enable 11 1 read-write CC3DE Capture/Compare 3 DMA request enable 12 1 read-write COMDE COM DMA request enable 13 1 read-write TDE Trigger DMA request enable 14 1 read-write SR Status register 0x10 0x20 UIF Update interrupt flag 0 1 read-write CC0IF Capture/Compare 0 interrupt flag 1 1 read-write CC1IF Capture/Compare 1 interrupt flag 2 1 read-write CC2IF Capture/Compare 2 interrupt flag 3 1 read-write CC3IF Capture/Compare 3 interrupt flag 4 1 read-write COMIF COM interrupt flag 5 1 read-write TIF Trigger interrupt flag 6 1 read-write BIF Break interrupt flag 7 1 read-write CC0OF Capture/Compare 0 overcapture flag 9 1 read-write CC1OF Capture/Compare 1 overcapture flag 10 1 read-write CC2OF Capture/Compare 2 overcapture flag 11 1 read-write CC3OF Capture/Compare 3 overcapture flag 12 1 read-write EGR Event generation register 0x14 0x20 UG Update generation 0 1 write-only CC0G Capture/Compare 0 generation 1 1 write-only CC1G Capture/Compare 1 generation 2 1 write-only CC2G Capture/Compare 2 generation 3 1 write-only CC3G Capture/Compare 3 generation 4 1 write-only COMG Capture/Compare control update generation 5 1 write-only TG Trigger generation 6 1 write-only BG Break generation 7 1 write-only CCMR0_input Capture/compare mode register 0 0x18 0x20 CC0S Capture/Compare 0 selection 0 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 IC0PSC Input capture 0 prescaler 2 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 IC0F Input capture 0 filter 4 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 CC1S Capture/Compare 1 selection 8 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 IC1PSC Input capture 1 prescaler 10 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 IC1F Input capture 1 filter 12 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 CCMR0_output Capture/compare mode register 0 CCMR0_input 0x18 0x20 CC0S Capture/Compare 0 selection 0 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 OC0FE Output compare 0 fast enable 2 1 read-write OC0PE Output compare 0 preload enable 3 1 read-write OC0M Output compare 0 mode 4 3 read-write Frozen Frozen 0 Active Active 1 Inactive Inactive 2 Toggle Toggle 3 Forced inactive Forced inactive 4 Forced active Forced active 5 Pwm1 Pwm1 6 Pwm2 Pwm2 7 OC0CE Output compare 0 clear enable 7 1 read-write CC1S Capture/Compare 1 selection 8 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 OC1FE Output compare 1 fast enable 10 1 read-write OC1PE Output compare 1 preload enable 11 1 read-write OC1M Output compare 1 mode 12 3 read-write Frozen Frozen 0 Active Active 1 Inactive Inactive 2 Toggle Toggle 3 Forced inactive Forced inactive 4 Forced active Forced active 5 Pwm1 Pwm1 6 Pwm2 Pwm2 7 OC1CE Output compare 1 clear enable 15 1 read-write CCMR1_input Capture/compare mode register 1 0x1C 0x20 CC2S Capture/Compare 2 selection 0 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 IC2PSC Input capture 2 prescaler 2 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 IC2F Input capture 2 filter 4 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 CC3S Capture/Compare 3 selection 8 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 IC3PSC Input capture 3 prescaler 10 2 read-write Div 1 Div 1 0 Div 2 Div 2 1 Div 4 Div 4 2 Div 8 Div 8 3 IC3F Input capture 3 filter 12 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 CCMR1_output Capture/compare mode register 1 CCMR1_input 0x1C 0x20 CC2S Capture/Compare 2 selection 0 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 OC2FE Output compare 2 fast enable 2 1 read-write OC2PE Output compare 2 preload enable 3 1 read-write OC2M Output compare 2 mode 4 3 read-write Frozen Frozen 0 Active Active 1 Inactive Inactive 2 Toggle Toggle 3 Forced inactive Forced inactive 4 Forced active Forced active 5 Pwm1 Pwm1 6 Pwm2 Pwm2 7 OC2CE Output compare 2 clear enable 7 1 read-write CC3S Capture/Compare 3 selection 8 2 read-write Output Output 0 Input direct Input direct 1 Input indirect Input indirect 2 Input TRC Input TRC 3 OC3FE Output compare 3 fast enable 10 1 read-write OC3PE Output compare 3 preload enable 11 1 read-write OC3M Output compare 3 mode 12 3 read-write Frozen Frozen 0 Active Active 1 Inactive Inactive 2 Toggle Toggle 3 Forced inactive Forced inactive 4 Forced active Forced active 5 Pwm1 Pwm1 6 Pwm2 Pwm2 7 OC3CE Output compare 3 clear enable 15 1 read-write CCER Capture/compare enable register 0x20 0x20 CC0E Capture/Compare 0 output enable 0 1 read-write CC0P Capture/Compare 0 output polarity 1 1 read-write Active High Active High 0 Active Low Active Low 1 CC0NE Capture/Compare 0 complementary output enable 2 1 read-write CC0NP Capture/Compare 0 complementary output polarity 3 1 read-write Active High Active High 0 Active Low Active Low 1 CC1E Capture/Compare 1 output enable 4 1 read-write CC1P Capture/Compare 1 output polarity 5 1 read-write Active High Active High 0 Active Low Active Low 1 CC1NE Capture/Compare 1 complementary output enable 6 1 read-write CC1NP Capture/Compare 1 complementary output polarity 7 1 read-write Active High Active High 0 Active Low Active Low 1 CC2E Capture/Compare 2 output enable 8 1 read-write CC2P Capture/Compare 2 output polarity 9 1 read-write Active High Active High 0 Active Low Active Low 1 CC2NE Capture/Compare 2 complementary output enable 10 1 read-write CC2NP Capture/Compare 2 complementary output polarity 11 1 read-write Active High Active High 0 Active Low Active Low 1 CC3E Capture/Compare 3 output enable 12 1 read-write CC3P Capture/Compare 3 output polarity 13 1 read-write Active High Active High 0 Active Low Active Low 1 CC3NE Capture/Compare 3 complementary output enable 14 1 read-write CC3NP Capture/Compare 3 complementary output polarity 15 1 read-write Active High Active High 0 Active Low Active Low 1 CNT Counter 0x24 0x20 CNT Counter 0 32 read-write PSC Prescaler 0x28 0x20 PSC Prescaler 0 16 read-write ARR Auto reload register 0x2C 0x20 ARR Auto reload register 0 32 read-write RCR Repetition counter register 0x30 0x20 RCR Repetition counter register 0 16 read-write CCR0 Capture compare register 0 0x34 0x20 CCR0 Capture compare register 0 0 32 read-write CCR1 Capture compare register 1 0x38 0x20 CCR1 Capture compare register 1 0 32 read-write CCR2 Capture compare register 2 0x3C 0x20 CCR2 Capture compare register 2 0 32 read-write CCR3 Capture compare register 3 0x40 0x20 CCR3 Capture compare register 3 0 32 read-write BDTR Break and dead time register 0x44 0x20 DTG Dead-Time generator setup 0 8 read-write LOCK Lock configuration 8 2 read-write Lock Off Lock Off 0 Lock Level 1 Lock Level 1 1 Lock Level 2 Lock Level 2 2 Lock Level 3 Lock Level 3 3 OSSI Off-State selection for idle mode 10 1 read-write OSSR Off-State selection for run mode 11 1 read-write BKE Break enable 12 1 read-write BKP Break polarity 13 1 read-write Active Low Active Low 0 Active High Active High 1 AOE Automatic output enable 14 1 read-write MOE Main output enable 15 1 read-write BKF Break filter 16 4 read-write FDIV1 FDIV1 0 FDIV1_N2 FDIV1_N2 1 FDIV1_N4 FDIV1_N4 2 FDIV1_N8 FDIV1_N8 3 FDIV2_N6 FDIV2_N6 4 FDIV2_N8 FDIV2_N8 5 FDIV4_N6 FDIV4_N6 6 FDIV4_N8 FDIV4_N8 7 FDIV8_N6 FDIV8_N6 8 FDIV8_N8 FDIV8_N8 9 FDIV16_N5 FDIV16_N5 10 FDIV16_N6 FDIV16_N6 11 FDIV16_N8 FDIV16_N8 12 FDIV32_N5 FDIV32_N5 13 FDIV32_N6 FDIV32_N6 14 FDIV32_N8 FDIV32_N8 15 GPTIMER1 0x40021000 GPTIMER2 0x40022000 GPTIMER3 0x40023000 GPTIMER4 0x40024000 UART0 UART registers UART 0x40025000 0x0 0x1000 registers DR Data register 0x0 0x20 DR Data register 0 8 read-write FE Framing error 8 1 read-write PE Parity error 9 1 read-write BE Break error 10 1 read-write OE Overrun error 11 1 read-write RSR_ECR Receive status register/error clear register 0x4 0x20 FE Framing error 0 1 read-write PE Parity error 1 1 read-write BE Break error 2 1 read-write OE Overrun error 3 1 read-write FR Flag register 0x18 0x20 CTS Clear to send 0 1 read-only BUSY UART busy transmitting data 3 1 read-only RXFE Receive FIFO empty 4 1 read-only TXFF Transmit FIFO full 5 1 read-only RXFF Receive FIFO full 6 1 read-only TXFE Transmit FIFO empty 7 1 read-only IBRD Integer baud rate register 0x24 0x20 IBRD Integer baud rate register 0 16 read-write FBRD Fractional baud rate register 0x28 0x20 FBRD Fractional baud rate register 0 6 read-write LCR_H Line control register 0x2C 0x20 BRK Send break 0 1 read-write PEN Parity enable 1 1 read-write EPS Even parity select 2 1 read-write Odd parity Odd parity 0 Even parity Even parity 1 STP2 Two stop bits select 3 1 read-write 1 stop bit 1 stop bit 0 2 stop bits 2 stop bits 1 FEN Enable FIFOs 4 1 read-write WLEN Word length, data bits in a frame 5 2 read-write 5 bits 5 bits 0 6 bits 6 bits 1 7 bits 7 bits 2 8 bits 8 bits 3 SPS Stick parity select 7 1 read-write CR Control register 0x30 0x20 UART_EN UART enable 0 1 read-write LBE Loop back enable 7 1 read-write TXE Transmit enable 8 1 read-write RXE Receive enable 9 1 read-write RTS Request to send 11 1 read-write RTS_EN RTS hardware flow control enable 14 1 read-write CTS_EN CTS hardware flow control enable 15 1 read-write IFLS Interrupt FIFO level select register 0x34 0x20 TXIFLSEL Transmit interrupt FIFO level select 0 3 read-write >= 1/8 >= 1/8 0 >= 1/4 >= 1/4 1 >= 1/2 >= 1/2 2 >= 3/4 >= 3/4 3 >= 7/8 >= 7/8 4 RXIFLSEL Receive interrupt FIFO level select 3 3 read-write >= 1/8 >= 1/8 0 >= 1/4 >= 1/4 1 >= 1/2 >= 1/2 2 >= 3/4 >= 3/4 3 >= 7/8 >= 7/8 4 IMSC Interrupt mask set/clear register 0x38 0x20 CTSM nUARTCTS modem interrupt mask 1 1 read-write RX Receive interrupt mask 4 1 read-write TX Transmit interrupt mask 5 1 read-write RT Receive timeout interrupt mask 6 1 read-write FE Framing error interrupt mask 7 1 read-write PE Parity error interrupt mask 8 1 read-write BE Break error interrupt mask 9 1 read-write OE Overrun error interrupt mask 10 1 read-write RIS Raw interrupt status register 0x3C 0x20 CTSM nUARTCTS modem interrupt status 1 1 read-write RX Receive interrupt status 4 1 read-write TX Transmit interrupt status 5 1 read-write RT Receive timeout interrupt status 6 1 read-write FE Framing error interrupt status 7 1 read-write PE Parity error interrupt status 8 1 read-write BE Break error interrupt status 9 1 read-write OE Overrun error interrupt status 10 1 read-write MIS Masked interrupt status register 0x40 0x20 CTSM nUARTCTS modem masked interrupt status 1 1 read-write RX Receive masked interrupt status 4 1 read-write TX Transmit masked interrupt status 5 1 read-write RT Receive timeout masked interrupt status 6 1 read-write FE Framing error masked interrupt status 7 1 read-write PE Parity error masked interrupt status 8 1 read-write BE Break error masked interrupt status 9 1 read-write OE Overrun error masked interrupt status 10 1 read-write ICR Interrupt clear register 0x44 0x20 CTSM nUARTCTS modem interrupt clear 1 1 read-write RX Receive interrupt clear 4 1 read-write TX Transmit interrupt clear 5 1 read-write RT Receive timeout interrupt clear 6 1 read-write FE Framing error interrupt clear 7 1 read-write PE Parity error interrupt clear 8 1 read-write BE Break error interrupt clear 9 1 read-write OE Overrun error interrupt clear 10 1 read-write DMACR DMA control register 0x48 0x20 RX_EN Receive DMA enable 0 1 read-write TX_EN Transmit DMA enable 1 1 read-write ON_ERR Stop DMA on error 2 1 read-write UART1 0x40026000 UART2 0x40027000 UART3 0x40028000 UART4 0x40029000 CAN0 CAN registers CAN 0x4002A000 0x0 0x400 registers MOD Mode register 0x0 0x20 RM Reset Mode 0 1 read-write LOM Listen Only Mode 1 1 read-write STM Self Test Mode 2 1 read-write AFM Acceptance Filter Mode 3 1 read-write Dual Dual 0 Single Single 1 SM Sleep Mode 4 1 read-write CMR Command register 0x4 0x20 TR Transmission Request 0 1 write-only AT Abort Transmission 1 1 write-only RRB Release Receive Buffer 2 1 write-only CDO Clear Data Overrun 3 1 write-only SRR Self Reception Request 4 1 write-only SR Status register 0x8 0x20 RBS Receive Buffer Status 0 1 read-only DOS Data Overrun Status 1 1 read-only TBS Transmit Buffer Status 2 1 read-only TCS Transmission Complete Status 3 1 read-only RS Receive Status 4 1 read-only TS Transmit Status 5 1 read-only ES Error Status 6 1 read-only BS Bus Status 7 1 read-only IR Interrupt register 0xC 0x20 RI Receive Interrupt 0 1 read-only TI Transmit Interrupt 1 1 read-only EI Error Warning Interrupt 2 1 read-only DOI Data Overrun Interrupt 3 1 read-only WUI Wake-Up Interrupt 4 1 read-only EPI Error Passive Interrupt 5 1 read-only ALI Arbitration Lost Interrupt 6 1 read-only BEI Bus Error Interrupt 7 1 read-only IER Interrupt enable register 0x10 0x20 RIE Receive Interrupt Enable 0 1 read-write TIE Transmit Interrupt Enable 1 1 read-write EIE Error Warning Interrupt Enable 2 1 read-write DOIE Data Overrun Interrupt Enable 3 1 read-write WUIE Wake-Up Interrupt Enable 4 1 read-write EPIE Error Passive Interrupt Enable 5 1 read-write ALIE Arbitration Lost Interrupt Enable 6 1 read-write BEIE Bus Error Interrupt Enable 7 1 read-write BTR0 Bus Timing 0 0x18 0x20 BRP Baud Rate Prescaler 0 6 read-write SJW Synchronization Jump Width 6 2 read-write BTR1 Bus Timing 1 0x1C 0x20 TSEG1 Time Segment 1 0 4 read-write TSEG2 Time Segment 2 4 3 read-write SAM Sampling 7 1 read-write OCR Output Control Register 0x20 0x20 OCR Output Control Register 0 2 read-write Normal Output Mode Normal Output Mode 2 ALC Arbitration Lost Capture 0x2C 0x20 ALC Arbitration Lost Capture 0 5 read-only ECC Error Code Capture 0x30 0x20 Segment Segment code 0 5 read-only Direction When is error occured 5 1 read-only TX TX 0 RX RX 1 Code Error code 6 2 read-only Bit error Bit error 0 Form error Form error 1 Stuff error Stuff error 2 Other error Other error 3 EWLR Error Warning Limit 0x34 0x20 EWLR Error Warning Limit 0 8 read-write RXERR Receive Error Counter 0x38 0x20 RXERR Receive Error Counter 0 8 read-write TXERR Transmit Error Counter 0x3C 0x20 TXERR Transmit Error Counter 0 8 read-write FRAME Transfer Frame Information 0x40 0x20 FRAME Transfer Frame Information 0 8 read-write ACR[0] Acceptance Code Register FRAME 0x40 0x20 ACR[0] Acceptance Code Register 0 0 8 read-write ACR[1] Acceptance Code Register 0x44 0x20 ACR[1] Acceptance Code Register 1 0 8 read-write DATA[0] Transfer Data Information ACR[1] 0x44 0x20 DATA[0] Transfer Data Information 0 0 8 read-write ACR[2] Acceptance Code Register 0x48 0x20 ACR[2] Acceptance Code Register 2 0 8 read-write DATA[1] Transfer Data Information ACR[2] 0x48 0x20 DATA[1] Transfer Data Information 1 0 8 read-write ACR[3] Acceptance Code Register 0x4C 0x20 ACR[3] Acceptance Code Register 3 0 8 read-write DATA[2] Transfer Data Information ACR[3] 0x4C 0x20 DATA[2] Transfer Data Information 2 0 8 read-write AMR[0] Acceptance Mask Register 0x50 0x20 AMR[0] Acceptance Mask Register 0 0 8 read-write DATA[3] Transfer Data Information AMR[0] 0x50 0x20 DATA[3] Transfer Data Information 3 0 8 read-write AMR[1] Acceptance Mask Register 0x54 0x20 AMR[1] Acceptance Mask Register 1 0 8 read-write DATA[4] Transfer Data Information AMR[1] 0x54 0x20 DATA[4] Transfer Data Information 4 0 8 read-write AMR[2] Acceptance Mask Register 0x58 0x20 AMR[2] Acceptance Mask Register 2 0 8 read-write DATA[5] Transfer Data Information AMR[2] 0x58 0x20 DATA[5] Transfer Data Information 5 0 8 read-write AMR[3] Acceptance Mask Register 0x5C 0x20 AMR[3] Acceptance Mask Register 3 0 8 read-write DATA[6] Transfer Data Information AMR[3] 0x5C 0x20 DATA[6] Transfer Data Information 6 0 8 read-write DATA[7] Transfer Data Information 0x60 0x20 DATA[7] Transfer Data Information 7 0 8 read-write DATA[8] Transfer Data Information 0x64 0x20 DATA[8] Transfer Data Information 8 0 8 read-write DATA[9] Transfer Data Information 0x68 0x20 DATA[9] Transfer Data Information 9 0 8 read-write DATA[10] Transfer Data Information 0x6C 0x20 DATA[10] Transfer Data Information 10 0 8 read-write DATA[11] Transfer Data Information 0x70 0x20 DATA[11] Transfer Data Information 11 0 8 read-write RMC Receive Message Counter 0x74 0x20 RMC Receive Message Counter 0 5 read-only RBSA Receive Buffer Start Address 0x78 0x20 RBSA Receive Buffer Start Address 0 6 read-write TX_FRAME Transmit Frame Information 0x180 0x20 TX_FRAME Transmit Frame Information 0 8 read-only TX_DATA[0] Transmit Data Information 0x184 0x20 TX_DATA[0] Transmit Data Information 0 0 8 read-only TX_DATA[1] Transmit Data Information 0x188 0x20 TX_DATA[1] Transmit Data Information 1 0 8 read-only TX_DATA[2] Transmit Data Information 0x18C 0x20 TX_DATA[2] Transmit Data Information 2 0 8 read-only TX_DATA[3] Transmit Data Information 0x190 0x20 TX_DATA[3] Transmit Data Information 3 0 8 read-only TX_DATA[4] Transmit Data Information 0x194 0x20 TX_DATA[4] Transmit Data Information 4 0 8 read-only TX_DATA[5] Transmit Data Information 0x198 0x20 TX_DATA[5] Transmit Data Information 5 0 8 read-only TX_DATA[6] Transmit Data Information 0x19C 0x20 TX_DATA[6] Transmit Data Information 6 0 8 read-only TX_DATA[7] Transmit Data Information 0x1A0 0x20 TX_DATA[7] Transmit Data Information 7 0 8 read-only TX_DATA[8] Transmit Data Information 0x1A4 0x20 TX_DATA[8] Transmit Data Information 8 0 8 read-only TX_DATA[9] Transmit Data Information 0x1A8 0x20 TX_DATA[9] Transmit Data Information 9 0 8 read-only TX_DATA[10] Transmit Data Information 0x1AC 0x20 TX_DATA[10] Transmit Data Information 10 0 8 read-only TX_DATA[11] Transmit Data Information 0x1B0 0x20 TX_DATA[11] Transmit Data Information 11 0 8 read-only I2C0 I2C registers I2C 0x4002B000 0x0 0x100 registers PRERLO Prescaler register lo-byte 0x0 0x20 PRERLO Prescaler register lo-byte 0 8 read-write PRERHI Prescaler register hi-byte 0x4 0x20 PRERHI Prescaler register hi-byte 0 8 read-write CTR Control register 0x8 0x20 IEN Interrupt enable 6 1 read-write EN Core enable 7 1 read-write RXR Receive register 0xC 0x20 RXR Receive register 0 8 read-only TXR Transmit register RXR 0xC 0x20 TXR Transmit register 0 8 write-only CR Command register 0x10 0x20 IACK Interrupt acknowledge 0 1 write-only NACK When a receiver, send ACK(0) or NACK(1) 3 1 write-only WR Write to slave 4 1 write-only RD Read from slave 5 1 write-only STO Generate stop condition 6 1 write-only STA Generate (repeated) start condition 7 1 write-only SR Status register CR 0x10 0x20 IF Interrupt flag. Set when one byte transfer is done or arbitration lost 0 1 read-only TIP Transfer in progress 1 1 read-only AL Arbitration lost 5 1 read-only BUSY I2C bus busy 6 1 read-only RxACK Received acknowledge from slave 7 1 read-only ACK ACK 0 NACK NACK 1 I2C1 0x4002C000 DMAC0 DMAC registers DMAC 0x41000000 0x0 0x1000 registers Channel%s Channel Registers 8 0x20 0x100 SrcAddr Channel Source Address Register 0x0 0x20 SrcAddr SrcAddr 0 32 read-write DstAddr Channel Destination Address Register 0x4 0x20 DstAddr DstAddr 0 32 read-write LLI Channel Linked List Item Register 0x8 0x20 LLI LLI 0 32 read-write Control Channel Control Register 0xC 0x20 TransferSize Transfer size 0 12 read-write SBSize Source burst size 12 3 read-write 1 1 0 4 4 1 8 8 2 16 16 3 32 32 4 64 64 5 128 128 6 256 256 7 DBSize Destination burst size 15 3 read-write 1 1 0 4 4 1 8 8 2 16 16 3 32 32 4 64 64 5 128 128 6 256 256 7 SWidth Source transfer width 18 3 read-write 8-bit 8-bit 0 16-bit 16-bit 1 32-bit 32-bit 2 DWidth Destination transfer width 21 3 read-write 8-bit 8-bit 0 16-bit 16-bit 1 32-bit 32-bit 2 S Source AHB master select 24 1 read-write D Destination AHB master select 25 1 read-write SI Source increment 26 1 read-write DI Destination increment 27 1 read-write I Terminal count interrupt enable 31 1 read-write Configuration Channel Configuration Register 0x10 0x20 E Channel enable 0 1 read-write SrcPeripheral Source peripheral 1 4 read-write DstPeripheral Destination peripheral 6 4 read-write FlowCntrl Flow control 11 3 read-write MEM_TO_MEM_DMA_CTRL MEM_TO_MEM_DMA_CTRL 0 MEM_TO_PER_DMA_CTRL MEM_TO_PER_DMA_CTRL 1 PER_TO_MEM_DMA_CTRL PER_TO_MEM_DMA_CTRL 2 PER_TO_PER_DMA_CTRL PER_TO_PER_DMA_CTRL 3 PER_TO_PER_DST_CTRL PER_TO_PER_DST_CTRL 4 MEM_TO_PER_PER_CTRL MEM_TO_PER_PER_CTRL 5 PER_TO_MEM_PER_CTRL PER_TO_MEM_PER_CTRL 6 PER_TO_PER_SRC_CTRL PER_TO_PER_SRC_CTRL 7 IE Interrupt error mask 14 1 read-write ITC Terminal count interrupt mask 15 1 read-write A Active 17 1 read-only H Halt 18 1 read-write IntStatus Interrupt Status Register 0x0 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only IntTCStatus Interrupt Terminal Count Status Register 0x4 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only IntTCClear Interrupt Terminal Count Clear Register 0x8 0x20 Channel0 Channel0 0 1 write-only Channel1 Channel1 1 1 write-only Channel2 Channel2 2 1 write-only Channel3 Channel3 3 1 write-only Channel4 Channel4 4 1 write-only Channel5 Channel5 5 1 write-only Channel6 Channel6 6 1 write-only Channel7 Channel7 7 1 write-only IntErrorStatus Interrupt Error Status Register 0xC 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only IntErrorClear Interrupt Error Clear Register 0x10 0x20 Channel0 Channel0 0 1 write-only Channel1 Channel1 1 1 write-only Channel2 Channel2 2 1 write-only Channel3 Channel3 3 1 write-only Channel4 Channel4 4 1 write-only Channel5 Channel5 5 1 write-only Channel6 Channel6 6 1 write-only Channel7 Channel7 7 1 write-only RawIntTCStatus Raw Interrupt Terminal Count Status Register 0x14 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only RawIntErrorStatus Raw Error Interrupt Status Register 0x18 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only EnabledChannels Enabled Channel Register 0x1C 0x20 Channel0 Channel0 0 1 read-only Channel1 Channel1 1 1 read-only Channel2 Channel2 2 1 read-only Channel3 Channel3 3 1 read-only Channel4 Channel4 4 1 read-only Channel5 Channel5 5 1 read-only Channel6 Channel6 6 1 read-only Channel7 Channel7 7 1 read-only SoftBReq Software Burst Request Register 0x20 0x20 Request0 Request0 0 1 read-write Request1 Request1 1 1 read-write Request2 Request2 2 1 read-write Request3 Request3 3 1 read-write Request4 Request4 4 1 read-write Request5 Request5 5 1 read-write Request6 Request6 6 1 read-write Request7 Request7 7 1 read-write Request8 Request8 8 1 read-write Request9 Request9 9 1 read-write Request10 Request10 10 1 read-write Request11 Request11 11 1 read-write Request12 Request12 12 1 read-write Request13 Request13 13 1 read-write Request14 Request14 14 1 read-write Request15 Request15 15 1 read-write SoftSReq Software Single Request Register 0x24 0x20 Request0 Request0 0 1 read-write Request1 Request1 1 1 read-write Request2 Request2 2 1 read-write Request3 Request3 3 1 read-write Request4 Request4 4 1 read-write Request5 Request5 5 1 read-write Request6 Request6 6 1 read-write Request7 Request7 7 1 read-write Request8 Request8 8 1 read-write Request9 Request9 9 1 read-write Request10 Request10 10 1 read-write Request11 Request11 11 1 read-write Request12 Request12 12 1 read-write Request13 Request13 13 1 read-write Request14 Request14 14 1 read-write Request15 Request15 15 1 read-write SoftLBReq Software Last Burst Request Register 0x28 0x20 Request0 Request0 0 1 read-write Request1 Request1 1 1 read-write Request2 Request2 2 1 read-write Request3 Request3 3 1 read-write Request4 Request4 4 1 read-write Request5 Request5 5 1 read-write Request6 Request6 6 1 read-write Request7 Request7 7 1 read-write Request8 Request8 8 1 read-write Request9 Request9 9 1 read-write Request10 Request10 10 1 read-write Request11 Request11 11 1 read-write Request12 Request12 12 1 read-write Request13 Request13 13 1 read-write Request14 Request14 14 1 read-write Request15 Request15 15 1 read-write SoftSBReq Software Last Single Request Register 0x2C 0x20 Request0 Request0 0 1 read-write Request1 Request1 1 1 read-write Request2 Request2 2 1 read-write Request3 Request3 3 1 read-write Request4 Request4 4 1 read-write Request5 Request5 5 1 read-write Request6 Request6 6 1 read-write Request7 Request7 7 1 read-write Request8 Request8 8 1 read-write Request9 Request9 9 1 read-write Request10 Request10 10 1 read-write Request11 Request11 11 1 read-write Request12 Request12 12 1 read-write Request13 Request13 13 1 read-write Request14 Request14 14 1 read-write Request15 Request15 15 1 read-write DmacConfiguration Configuration Register 0x30 0x20 E DMAC enable 0 1 read-write M1 AHB Master 1 endianness 1 1 read-write LE LE 0 BE BE 1 M2 AHB Master 2 endianness 2 1 read-write LE LE 0 BE BE 1 Sync Synchronization Register 0x34 0x20 Request0 Request0 0 1 read-write Request1 Request1 1 1 read-write Request2 Request2 2 1 read-write Request3 Request3 3 1 read-write Request4 Request4 4 1 read-write Request5 Request5 5 1 read-write Request6 Request6 6 1 read-write Request7 Request7 7 1 read-write Request8 Request8 8 1 read-write Request9 Request9 9 1 read-write Request10 Request10 10 1 read-write Request11 Request11 11 1 read-write Request12 Request12 12 1 read-write Request13 Request13 13 1 read-write Request14 Request14 14 1 read-write Request15 Request15 15 1 read-write USB0 USB registers USB 0x41001000 0x0 0x200 registers GPTIMER0LD General Purpose Timer #0 Load Register 0x80 0x20 GPTIMER0LD General Purpose Timer #0 Load Register 0 24 read-write GPTIMER0CTRL General Purpose Timer #0 Control Register 0x84 0x20 GPTCNT Timer Counter 0 24 read-only GPTMODE Timer Mode 24 1 read-write One shot One shot 0 Repeat Repeat 1 GPTRST Timer Reset 30 1 read-write GPTRUN Timer Run 31 1 read-write GPTIMER1LD General Purpose Timer #1 Load Register 0x88 0x20 GPTIMER1LD General Purpose Timer #1 Load Register 0 24 read-write GPTIMER1CTRL General Purpose Timer #1 Control Register 0x8C 0x20 GPTCNT Timer Counter 0 24 read-only GPTMODE Timer Mode 24 1 read-write One shot One shot 0 Repeat Repeat 1 GPTRST Timer Reset 30 1 read-write GPTRUN Timer Run 31 1 read-write EHCICAP ECHI Capability register 0x100 0x20 CAPLENGTH Capability Register Length 0 8 read-only HCIVERSION Host Interface Version Number 16 16 read-only HCSPARAMS Host Controller Structural Parameters 0x104 0x20 HCSPARAMS Host Controller Structural Parameters 0 32 read-only HCCPARAMS Host Controller Capability Parameters 0x108 0x20 HCCPARAMS Host Controller Capability Parameters 0 32 read-only USBCMD USB Command 0x140 0x20 RS Run/Stop 0 1 read-write RST Controller Reset 1 1 read-write FS0 Frame List Size Bit 0 2 1 read-write FS1 Frame List Size Bit 1 3 1 read-write PSE Periodic Schedule Enable 4 1 read-write ASE Asynchronous Schedule Enable 5 1 read-write IAA Interrupt on Async Advance Doorbell 6 1 read-write ASP Asynchronous Schedule Park Mode Count 8 2 read-write ASPE Asynchronous Schedule Park Mode Enable 11 1 read-write SUTW Setup TripWire 13 1 read-write ATDTW Add dTD TripWire 14 1 read-write FS2 Frame List Size Bit 2 15 1 read-write ITC Interrupt Threshold Control 16 8 read-write USBSTS USB Status 0x144 0x20 UI USB Interrupt 0 1 read-write UEI USB Error Interrupt 1 1 read-write PCI Port Change Detect 2 1 read-write FRI Frame List Rollover 3 1 read-write SEI System Error (from AHB) 4 1 read-write AAI Interrupt on Async Advance 5 1 read-write URI USB Reset Received 6 1 read-write SRI SOF Received 7 1 read-write SLI DCSuspend 8 1 read-write HCH HCHalted 12 1 read-only RCL Reclamation 13 1 read-only PS Periodic Schedule Status 14 1 read-only AS Asynchronous Schedule Status 15 1 read-only NAKI NAK Interrupt 16 1 read-only UAI USB Host Asynchronous Interrupt 18 1 read-write UPI USB Host Periodic Interrupt 19 1 read-write TI0 General Purpose Timer Interrupt 0 24 1 read-write TI1 General Purpose Timer Interrupt 1 25 1 read-write USBINTR USB Interrupt Enable 0x148 0x20 UE USB Interrupt Enable 0 1 read-write UEE USB Error Interrupt Enable 1 1 read-write PCE Port Change Detect Interrupt Enable 2 1 read-write FRE Frame List Rollover Interrupt Enable 3 1 read-write SEE System Error (from AHB) Interrupt Enable 4 1 read-write AAE Interrupt on Async Advance Enable 5 1 read-write URE USB Reset Received Interrupt Enable 6 1 read-write SRE SOF Received Interrupt Enable 7 1 read-write SLE DCSuspend Interrupt Enable 8 1 read-write NAKE NAK Interrupt Enable 16 1 read-only UAIE USB Host Asynchronous Interrupt Enable 18 1 read-write UPIE USB Host Periodic Interrupt Enable 19 1 read-write TIE0 General Purpose Timer Interrupt Enable 0 24 1 read-write TIE1 General Purpose Timer Interrupt Enable 1 25 1 read-write FRINDEX USB Frame Index 0x14C 0x20 FRINDEX USB Frame Index 0 14 read-write PERIODICLISTBASE Frame List Base Address 0x154 0x20 PERIODICLISTBASE Frame List Base Address 0 32 read-write DEVICEADDR Device Address PERIODICLISTBASE 0x154 0x20 USBADRA Device address advance 24 1 read-write USBADR USB Device address 25 7 read-write ASYNCLISTADDR Asynchronous List Address / Endpoint List Address 0x158 0x20 ASYNCLISTADDR Asynchronous List Address / Endpoint List Address 0 32 read-write BURSTSIZE Programmable Burst Size 0x160 0x20 RXPBURST Programmable RX Burst Length 0 8 read-write TXPBURST Programmable TX Burst Length 8 8 read-write TXFILLTUNING Host Transmit Pre-Buffer Packet Tuning 0x164 0x20 TXSCHOH Scheduler Overhead 0 7 read-write TXSCHHEALTH Scheduler Health Counter 8 5 read-write TXFIFOTHRES FIFO Burst Threshold 16 6 read-write ENDPTNAK Endpoint NAK 0x178 0x20 EPRN0 Endpoing 0 RX NAK 0 1 read-write EPRN1 Endpoing 1 RX NAK 1 1 read-write EPRN2 Endpoing 2 RX NAK 2 1 read-write EPRN3 Endpoing 3 RX NAK 3 1 read-write EPTN0 Endpoing 0 TX NAK 16 1 read-write EPTN1 Endpoing 1 TX NAK 17 1 read-write EPTN2 Endpoing 2 TX NAK 18 1 read-write EPTN3 Endpoing 3 TX NAK 19 1 read-write ENDPTNAKEN Endpoint NAK Enable 0x17C 0x20 EPRNE0 RX Endpoint 0 NAK Interrupt Enable 0 1 read-write EPRNE1 RX Endpoint 1 NAK Interrupt Enable 1 1 read-write EPRNE2 RX Endpoint 2 NAK Interrupt Enable 2 1 read-write EPRNE3 RX Endpoint 3 NAK Interrupt Enable 3 1 read-write EPTNE0 TX Endpoint 0 NAK Interrupt Enable 16 1 read-write EPTNE1 TX Endpoint 1 NAK Interrupt Enable 17 1 read-write EPTNE2 TX Endpoint 2 NAK Interrupt Enable 18 1 read-write EPTNE3 TX Endpoint 3 NAK Interrupt Enable 19 1 read-write PORTSC Port Status/Control 0x184 0x20 CCS Current Connect Status 0 1 read-only No Device No Device 0 Device Attached Device Attached 1 CSC Connect Status Change 1 1 read-write PE Port Enabled 2 1 read-write PEC Port Enabled Change 3 1 read-write OCA Over-current Active 4 1 read-only OCC Over-current Change 5 1 read-write FPR Force Port Resume 6 1 read-write SUSP Suspend 7 1 read-write PR Port Reset 8 1 read-write HSP High-Speed Port 9 1 read-only LS Line Status 10 2 read-only SE0 SE0 0 J-state J-state 1 K-state K-state 2 PP Port Power 12 1 read-write PO Port Owner 13 1 read-only PIC Port Indicator Control 14 2 read-write PTC Port Test Control 16 4 read-write WKCN Wake on Connect Enable 20 1 read-write WKDS Wake on Disconnect Enable 21 1 read-write WKOC Wake on Over-current Enable 22 1 read-write PHCD PHY Low Power Clock Disable 23 1 read-write PSPD Port Speed 26 2 read-write Full Speed Full Speed 0 Low Speed Low Speed 1 High Speed High Speed 2 Not Connected Not Connected 3 OTGSC OTG Status and Control 0x1A4 0x20 HAAR Hardware Assist Auto-Reset 2 1 read-write DP Data Pulsing 4 1 read-write HADP Hardware Assist Data-Pulse 6 1 read-write ID USB ID 8 1 read-only A-device A-device 0 B-device B-device 1 AVV A VBus Valid 9 1 read-only ASV A Session Valid 10 1 read-only BSV B Session Valid 11 1 read-only BSE B Session End 12 1 read-only 1msT 1 millisecond timer toggle 13 1 read-only DPS Data Bus Pulsing Status 14 1 read-only IDIS USB ID Interrupt Status 16 1 read-write 1msS 1 millisecond timer Interrupt Status 21 1 read-write DPIS Data Pulse Interrupt Status 22 1 read-write IDIE USB ID Interrupt Enable 24 1 read-write 1msE 1 millisecond timer Interrupt Enable 29 1 read-write DPIE Data Pulse Interrupt Enable 30 1 read-write USBMODE USB Device Mode 0x1A8 0x20 CM Controller Mode 0 2 read-write Idle Idle 0 Device Mode Device Mode 2 Host Mode Host Mode 3 ES Endian Select 2 1 read-write LE LE 0 BE BE 1 SLOM Setup Lockout Mode 3 1 read-write ON ON 0 OFF OFF 1 ENDPTSETUPSTAT Endpoint Setup Status 0x1AC 0x20 ENDPTSETUPSTAT0 Endpoing 0 Setup Status 0 1 read-write ENDPTSETUPSTAT1 Endpoing 1 Setup Status 1 1 read-write ENDPTSETUPSTAT2 Endpoing 2 Setup Status 2 1 read-write ENDPTSETUPSTAT3 Endpoing 3 Setup Status 3 1 read-write ENDPTPRIME Endpoint Initialization 0x1B0 0x20 PERB0 Prime Endpoint 0 RX Buffer 0 1 read-write PERB1 Prime Endpoint 1 RX Buffer 1 1 read-write PERB2 Prime Endpoint 2 RX Buffer 2 1 read-write PERB3 Prime Endpoint 3 RX Buffer 3 1 read-write PETB0 Prime Endpoint 0 TX Buffer 16 1 read-write PETB1 Prime Endpoint 1 TX Buffer 17 1 read-write PETB2 Prime Endpoint 2 TX Buffer 18 1 read-write PETB3 Prime Endpoint 3 TX Buffer 19 1 read-write ENDPTFLUSH Endpoint De-Initialize 0x1B4 0x20 FERB0 Flush Endpoint 0 RX Buffer 0 1 read-write FERB1 Flush Endpoint 1 RX Buffer 1 1 read-write FERB2 Flush Endpoint 2 RX Buffer 2 1 read-write FERB3 Flush Endpoint 3 RX Buffer 3 1 read-write FETB0 Flush Endpoint 0 TX Buffer 16 1 read-write FETB1 Flush Endpoint 1 TX Buffer 17 1 read-write FETB2 Flush Endpoint 2 TX Buffer 18 1 read-write FETB3 Flush Endpoint 3 TX Buffer 19 1 read-write ENDPTSTATUS Endpoint Status 0x1B8 0x20 ERBR0 Endpoint 0 RX Buffer Ready 0 1 read-write ERBR1 Endpoint 1 RX Buffer Ready 1 1 read-write ERBR2 Endpoint 2 RX Buffer Ready 2 1 read-write ERBR3 Endpoint 3 RX Buffer Ready 3 1 read-write ETBR0 Endpoint 0 TX Buffer Ready 16 1 read-write ETBR1 Endpoint 1 TX Buffer Ready 17 1 read-write ETBR2 Endpoint 2 TX Buffer Ready 18 1 read-write ETBR3 Endpoint 3 TX Buffer Ready 19 1 read-write ENDPTCOMPLETE Endpoint Complete 0x1BC 0x20 ERCE0 Endpoint 0 RX Complete Event 0 1 read-write ERCE1 Endpoint 1 RX Complete Event 1 1 read-write ERCE2 Endpoint 2 RX Complete Event 2 1 read-write ERCE3 Endpoint 3 RX Complete Event 3 1 read-write ETCE0 Endpoint 0 TX Complete Event 16 1 read-write ETCE1 Endpoint 1 TX Complete Event 17 1 read-write ETCE2 Endpoint 2 TX Complete Event 18 1 read-write ETCE3 Endpoint 3 TX Complete Event 19 1 read-write ENDPTCTRL0 Endpoint 0 Control 0x1C0 0x20 RXS RX Endpoint Stall 0 1 read-write RXT RX Endpoint Type 2 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 RXI RX Data Toggle Inhibit 5 1 read-write RXR RX Data Toggle Reset 6 1 read-write RXE RX Endpoint Enable 7 1 read-write TXS TX Endpoint Stall 16 1 read-write TXT TX Endpoint Type 18 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 TXI TX Data Toggle Inhibit 21 1 read-write TXR TX Data Toggle Reset 22 1 read-write TXE TX Endpoint Enable 23 1 read-write ENDPTCTRL1 Endpoint 1 Control 0x1C4 0x20 RXS RX Endpoint Stall 0 1 read-write RXT RX Endpoint Type 2 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 RXI RX Data Toggle Inhibit 5 1 read-write RXR RX Data Toggle Reset 6 1 read-write RXE RX Endpoint Enable 7 1 read-write TXS TX Endpoint Stall 16 1 read-write TXT TX Endpoint Type 18 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 TXI TX Data Toggle Inhibit 21 1 read-write TXR TX Data Toggle Reset 22 1 read-write TXE TX Endpoint Enable 23 1 read-write ENDPTCTRL2 Endpoint 2 Control 0x1C8 0x20 RXS RX Endpoint Stall 0 1 read-write RXT RX Endpoint Type 2 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 RXI RX Data Toggle Inhibit 5 1 read-write RXR RX Data Toggle Reset 6 1 read-write RXE RX Endpoint Enable 7 1 read-write TXS TX Endpoint Stall 16 1 read-write TXT TX Endpoint Type 18 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 TXI TX Data Toggle Inhibit 21 1 read-write TXR TX Data Toggle Reset 22 1 read-write TXE TX Endpoint Enable 23 1 read-write ENDPTCTRL3 Endpoint 3 Control 0x1CC 0x20 RXS RX Endpoint Stall 0 1 read-write RXT RX Endpoint Type 2 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 RXI RX Data Toggle Inhibit 5 1 read-write RXR RX Data Toggle Reset 6 1 read-write RXE RX Endpoint Enable 7 1 read-write TXS TX Endpoint Stall 16 1 read-write TXT TX Endpoint Type 18 2 read-write Control Control 0 Isochronous Isochronous 1 Bulk Bulk 2 Interrupt Interrupt 3 TXI TX Data Toggle Inhibit 21 1 read-write TXR TX Data Toggle Reset 22 1 read-write TXE TX Endpoint Enable 23 1 read-write CRC0 CRC registers CRC 0x41002000 0x0 0x100 registers DR CRC Data register 0x0 0x20 DR CRC Data register 0 32 read-write IDR CRC Independent data register 0x4 0x20 IDR CRC Independent data register 0 8 read-write CR CRC Control register 0x8 0x20 RESET Reset bit 0 1 write-only POLY_SIZE Polynomial size 3 2 read-write 32 bit 32 bit 0 16 bit 16 bit 1 8 bit 8 bit 2 7 bit 7 bit 3 REV_IN Reverse input data 5 2 read-write None None 0 By byte By byte 1 By half-word By half-word 2 By word By word 3 REV_OUT Reverse output data 7 1 read-write None None 0 Reversed Reversed 1 ENDIAN Input Endianness 8 1 read-write BE BE 0 LE LE 1 INIT Initial CRC value register 0x10 0x20 INIT Initial CRC value register 0 32 read-write POL CRC polynomial register 0x14 0x20 POL CRC polynomial register 0 32 read-write MAC0 MAC registers MAC 0x41040000 0x0 0x40000 registers CTRL Control register 0x0 0x20 CTRL_TX_EN Transmit enable 0 1 read-write CTRL_RX_EN Receive enable 1 1 read-write CTRL_TX_INTEN Transmit interrupt enable 2 1 read-write CTRL_RX_INTEN Receive interrupt enable 3 1 read-write CTRL_DUPLEX Duplex mode 4 1 read-write Half duplex Half duplex 0 Full duplex Full duplex 1 CTRL_PROM Promiscuous mode 5 1 read-write CTRL_RESET Reset, self clearing 6 1 read-write CTRL_SPEED Speed 7 1 read-write 10M 10M 0 100M 100M 1 CTRL_PHY_INTEN PHY status change interrupt enable 10 1 read-write CTRL_MULTICAST_EN Multicast enable 11 1 read-write CTRL_RMII_MODE RMII mode 16 1 read-write MII MII 0 RMII RMII 1 STAT Status register 0x4 0x20 STAT_RX_ERR Receive error 0 1 read-write STAT_TX_ERR Transmit error 1 1 read-write STAT_RX_INT Receive interrupt 2 1 read-write STAT_TX_INT Transmit interrupt 3 1 read-write STAT_RX_AHBERR Receive AHB error 4 1 read-write STAT_TX_AHBERR Transmit AHB error 5 1 read-write STAT_TOO_SMALL Too small. Packet received is smaller than minimum size 6 1 read-write STAT_INV_ADDR Invalid address 7 1 read-write STAT_PHY_STAT PHY status change 8 1 read-write MACMSB Mac address MSB 0x8 0x20 MACMSB Mac address MSB 0 32 read-write MACLSB Mac address LSB 0xC 0x20 MACLSB Mac address LSB 0 32 read-write MDIO MDIO control and status register 0x10 0x20 MDIO_WRITE MDIO write 0 1 read-write MDIO_READ MDIO read 1 1 read-write MDIO_LINK_FAIL Link fail, read only 2 1 read-only MDIO_BUSY MDIO busy, read only 3 1 read-only MDIO_MDCSC MDC Scaler 4 2 read-write Div 128 Div 128 0 Div 64 Div 64 1 Div 32 Div 32 2 Div 16 Div 16 3 MDIO_REGADDR Register address 6 5 read-write MDIO_PHYADDR PHY address 11 5 read-write MDIO_DATA Data to/from PHY 16 16 read-write TXBASE Transmit descriptor table base address 0x14 0x20 TXBASE Transmit descriptor table base address 0 32 read-write RXBASE Receive descriptor table base address 0x18 0x20 RXBASE Receive descriptor table base address 0 32 read-write HTMSB Hash table MSB 0x20 0x20 HTMSB Hash table MSB 0 32 read-write HTLSB Hash table LSB 0x24 0x20 HTLSB Hash table LSB 0 32 read-write