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P_2006
/
2006_APP
3
0
Atdalīts 0
Faili Problēmas 0 Izmaiņu pieprasījumi 0 Vikivietne
Atzars: master
Atzari Tagi
2006_APP
/
logic
/
db
/
test_uart.sta.qmsg

test_uart.sta.qmsg 26 KB
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  1. { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1752568029984 ""}
    2. 

  2. { "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 64-Bit " "Running Quartus II 64-Bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Full Version " "Version 13.0.0 Build 156 04/24/2013 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1752568029985 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 15 16:27:09 2025 " "Processing started: Tue Jul 15 16:27:09 2025" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1752568029985 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1752568029985 ""}
    3. 

  3. { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta test_uart -c test_uart " "Command: quartus_sta test_uart -c test_uart" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1752568029985 ""}
    4. 

  4. { "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1752568030097 ""}
    5. 

  5. { "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "4 4 8 " "Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead." {  } {  } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Quartus II" 0 -1 1752568030322 ""}
    6. 

  6. { "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1752568030369 ""}
    7. 

  7. { "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Quartus II" 0 -1 1752568030369 ""}
    8. 

  8. { "Info" "ISTA_SDC_FOUND" "test_uart.sdc " "Reading SDC File: 'test_uart.sdc'" {  } {  } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Quartus II" 0 -1 1752568030715 ""}
    9. 

  9. { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{pll_inst\|auto_generated\|pll1\|inclk\[0\]\} -multiply_by 30 -duty_cycle 50.00 -name \{pll_inst\|auto_generated\|pll1\|clk\[0\]\} \{pll_inst\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{pll_inst\|auto_generated\|pll1\|inclk\[0\]\} -multiply_by 30 -duty_cycle 50.00 -name \{pll_inst\|auto_generated\|pll1\|clk\[0\]\} \{pll_inst\|auto_generated\|pll1\|clk\[0\]\}" {  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1752568030724 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{pll_inst\|auto_generated\|pll1\|inclk\[0\]\} -multiply_by 15 -duty_cycle 50.00 -name \{pll_inst\|auto_generated\|pll1\|clk\[3\]\} \{pll_inst\|auto_generated\|pll1\|clk\[3\]\} " "create_generated_clock -source \{pll_inst\|auto_generated\|pll1\|inclk\[0\]\} -multiply_by 15 -duty_cycle 50.00 -name \{pll_inst\|auto_generated\|pll1\|clk\[3\]\} \{pll_inst\|auto_generated\|pll1\|clk\[3\]\}" {  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1752568030724 ""}  } {  } 0 332110 "%1!s!" 0 0 "Quartus II" 0 -1 1752568030724 ""}
    10. 

  10. { "Warning" "WSTA_FILTER_COULD_NOT_BE_MATCHED_WITH_LOCATION" "test_uart.sdc 13 rv32\|resetn_out clock or keeper or register or port or pin or cell or partition " "Ignored filter at test_uart.sdc(13): rv32\|resetn_out could not be matched with a clock or keeper or register or port or pin or cell or partition" {  } { { "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" 13 -1 0 } }  } 0 332174 "Ignored filter at %1!s!(%2!d!): %3!s! could not be matched with a %4!s!" 0 0 "Quartus II" 0 -1 1752568030725 ""}
    11. 

  11. { "Warning" "WSTA_IGNORED_ASSIGNMENT_WITH_REASON_AND_LOCATION" "set_false_path test_uart.sdc 13 Argument <from> is not an object ID " "Ignored set_false_path at test_uart.sdc(13): Argument <from> is not an object ID" { { "Info" "ISTA_SDC_COMMAND" "set_false_path -from rv32\|resetn_out " "set_false_path -from rv32\|resetn_out" {  } { { "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" 13 -1 0 } }  } 0 332050 "%1!s!" 0 0 "Quartus II" 0 -1 1752568030725 ""}  } { { "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.sdc" 13 -1 0 } }  } 0 332049 "Ignored %1!s! at %2!s!(%3!d!): %4!s!" 0 0 "Quartus II" 0 -1 1752568030725 ""}
    12. 

  12. { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "PIN_HSI (Rise) PIN_HSI (Rise) setup and hold " "From PIN_HSI (Rise) to PIN_HSI (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568030971 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568030971 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568030971 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568030971 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568030971 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "Quartus II" 0 -1 1752568030971 ""}
    13. 

  13. { "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1752568030972 ""}
    14. 

  14. { "Info" "0" "" "Analyzing Slow 1200mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Quartus II" 0 0 1752568030981 ""}
    15. 

  15. { "Info" "ISTA_WORST_CASE_SLACK" "setup 1.455 " "Worst-case setup slack is 1.455" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.455         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    1.455         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.847         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    1.847         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   97.289         0.000 PIN_HSI  " "   97.289         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568031027 ""}
    16. 

  16. { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.426 " "Worst-case hold slack is 0.426" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.426         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    0.426         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.446         0.000 PIN_HSI  " "    0.446         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.446         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    0.446         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568031035 ""}
    17. 

  17. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568031038 ""}
    18. 

  18. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568031040 ""}
    19. 

  19. { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 1.679 " "Worst-case minimum pulse width slack is 1.679" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.817         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    3.817         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.777         0.000 PIN_HSI  " "   49.777         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   62.371         0.000 PIN_HSE  " "   62.371         0.000 PIN_HSE " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568031043 ""}
    20. 

  20. { "Info" "0" "" "Analyzing Slow 1200mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Quartus II" 0 0 1752568031150 ""}
    21. 

  21. { "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1752568031172 ""}
    22. 

  22. { "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1752568031793 ""}
    23. 

  23. { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "PIN_HSI (Rise) PIN_HSI (Rise) setup and hold " "From PIN_HSI (Rise) to PIN_HSI (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568031967 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568031967 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568031967 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568031967 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568031967 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "Quartus II" 0 -1 1752568031967 ""}
    24. 

  24. { "Info" "ISTA_WORST_CASE_SLACK" "setup 1.679 " "Worst-case setup slack is 1.679" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    2.217         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    2.217         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   97.513         0.000 PIN_HSI  " "   97.513         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568031998 ""}
    25. 

  25. { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.375 " "Worst-case hold slack is 0.375" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.375         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    0.375         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.395         0.000 PIN_HSI  " "    0.395         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.395         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    0.395         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568032007 ""}
    26. 

  26. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568032012 ""}
    27. 

  27. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568032016 ""}
    28. 

  28. { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 1.679 " "Worst-case minimum pulse width slack is 1.679" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    1.679         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.802         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    3.802         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.764         0.000 PIN_HSI  " "   49.764         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   62.365         0.000 PIN_HSE  " "   62.365         0.000 PIN_HSE " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568032021 ""}
    29. 

  29. { "Info" "0" "" "Analyzing Fast 1200mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Quartus II" 0 0 1752568032143 ""}
    30. 

  30. { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_PARENT" "" "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." { { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "PIN_HSI (Rise) PIN_HSI (Rise) setup and hold " "From PIN_HSI (Rise) to PIN_HSI (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568032372 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568032372 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568032372 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[0\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568032372 ""} { "Critical Warning" "WSTA_NO_UNCERTAINTY_WAS_SET_CHILD" "pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) setup and hold " "From pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) to pll_inst\|auto_generated\|pll1\|clk\[3\] (Rise) (setup and hold)" {  } {  } 1 332169 "From %1!s! to %2!s! (%3!s!)" 0 0 "Quartus II" 0 -1 1752568032372 ""}  } {  } 1 332168 "The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command." 0 0 "Quartus II" 0 -1 1752568032372 ""}
    31. 

  31. { "Info" "ISTA_WORST_CASE_SLACK" "setup 3.045 " "Worst-case setup slack is 3.045" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.045         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    3.045         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    5.489         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    5.489         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   98.879         0.000 PIN_HSI  " "   98.879         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568032387 ""}
    32. 

  32. { "Info" "ISTA_WORST_CASE_SLACK" "hold 0.153 " "Worst-case hold slack is 0.153" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.153         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    0.153         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.182         0.000 PIN_HSI  " "    0.182         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.182         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    0.182         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568032397 ""}
    33. 

  33. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568032403 ""}
    34. 

  34. { "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1752568032410 ""}
    35. 

  35. { "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 1.864 " "Worst-case minimum pulse width slack is 1.864" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "    Slack End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    1.864         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\]  " "    1.864         0.000 pll_inst\|auto_generated\|pll1\|clk\[0\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    3.947         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\]  " "    3.947         0.000 pll_inst\|auto_generated\|pll1\|clk\[3\] " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.255         0.000 PIN_HSI  " "   49.255         0.000 PIN_HSI " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   61.901         0.000 PIN_HSE  " "   61.901         0.000 PIN_HSE " {  } {  } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1752568032416 ""}
    36. 

  36. { "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1752568032868 ""}
    37. 

  37. { "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1752568032868 ""}
    38. 

  38. { "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 20 s Quartus II 64-Bit " "Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 20 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4711 " "Peak virtual memory: 4711 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1752568032983 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 15 16:27:12 2025 " "Processing ended: Tue Jul 15 16:27:12 2025" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1752568032983 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1752568032983 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Total CPU time (on all processors): 00:00:04" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1752568032983 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1752568032983 ""}
    39.