新版解密机APP程序

zouping 60199543e4 2006_app il y a 4 mois
.vscode 60199543e4 2006_app il y a 4 mois
boards 60199543e4 2006_app il y a 4 mois
frameworks 60199543e4 2006_app il y a 4 mois
logic 60199543e4 2006_app il y a 4 mois
src 60199543e4 2006_app il y a 4 mois
.gitignore 60199543e4 2006_app il y a 4 mois
platformio.ini 60199543e4 2006_app il y a 4 mois
readme.md 60199543e4 2006_app il y a 4 mois
test_uart.ve 60199543e4 2006_app il y a 4 mois

readme.md

  • Multi-UART reference design
    • UARTs are provided in groups.
    • Each group of UART shares the same line controls like baud rate and parity.
    • Each UART has its own data, flags, error registers, and interrupt.
    • There are 4 DMA requests available to logic. They can be used for any MUART's RX or TX data.
    • By default the reference design has 2 groups of UARTs, 5 in each group. Total resource used is about 1.8K LUTs.
  • Files
    • ahb2apb.v: connect system AHB (sys clock domain) to APB (bus clock domain).
    • apb_mux.v: each group of MUARTs is controlled by one set of APB bus.
    • src/*.v: implementation of MUART.
    • multi_uart_ip.v: integrate with MCU core. Parameter that must be defined at compile time:
    • UART_GROUP: Number of MUART groups.
    • UART_COUNT: Number of MUARTs in each group.
    • DATA_WIDTH: data bits in each frame. The default is 8.
    • test_uart.sdc: timing constraint.