test_uart_routed.v 2.8 MB

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  1. `timescale 1 ps/ 1 ps
  2. module test_uart(
  3. GPIO1_0,
  4. GPIO1_1,
  5. GPIO1_2,
  6. GPIO1_3,
  7. GPIO1_4,
  8. GPIO1_5,
  9. GPIO1_6,
  10. GPIO1_7,
  11. GPIO2_0,
  12. GPIO2_1,
  13. GPIO2_2,
  14. GPIO2_3,
  15. GPIO2_4,
  16. GPIO2_5,
  17. GPIO2_6,
  18. GPIO2_7,
  19. GPIO3_0,
  20. GPIO3_1,
  21. GPIO3_2,
  22. GPIO3_3,
  23. GPIO3_4,
  24. GPIO6_0,
  25. GPIO6_2,
  26. GPIO6_4,
  27. GPIO6_6,
  28. GPIO9_0,
  29. GPIO9_1,
  30. GPIO9_2,
  31. GPIO9_3,
  32. GPIO9_4,
  33. GPIO9_5,
  34. GPIO9_6,
  35. GPIO9_7,
  36. PIN_HSE,
  37. PIN_HSI,
  38. PIN_OSC,
  39. SIM_CLK,
  40. SIM_IO,
  41. SIM_IO_12,
  42. SIM_IO_13,
  43. SIM_IO_15,
  44. UART3_UARTRXD,
  45. UART3_UARTTXD,
  46. UART4_UARTRXD,
  47. UART4_UARTTXD,
  48. uart15_rx,
  49. uart15_tx);
  50. output GPIO1_0;
  51. output GPIO1_1;
  52. output GPIO1_2;
  53. output GPIO1_3;
  54. output GPIO1_4;
  55. output GPIO1_5;
  56. output GPIO1_6;
  57. output GPIO1_7;
  58. output GPIO2_0;
  59. output GPIO2_1;
  60. output GPIO2_2;
  61. output GPIO2_3;
  62. output GPIO2_4;
  63. output GPIO2_5;
  64. output GPIO2_6;
  65. output GPIO2_7;
  66. input GPIO3_0;
  67. input GPIO3_1;
  68. input GPIO3_2;
  69. input GPIO3_3;
  70. input GPIO3_4;
  71. output GPIO6_0;
  72. output GPIO6_2;
  73. output GPIO6_4;
  74. inout GPIO6_6;
  75. output GPIO9_0;
  76. inout GPIO9_1;
  77. output GPIO9_2;
  78. output GPIO9_3;
  79. output GPIO9_4;
  80. output GPIO9_5;
  81. output GPIO9_6;
  82. output GPIO9_7;
  83. input PIN_HSE;
  84. input PIN_HSI;
  85. input PIN_OSC;
  86. output SIM_CLK;
  87. inout [11:0] SIM_IO;
  88. inout SIM_IO_12;
  89. inout SIM_IO_13;
  90. inout SIM_IO_15;
  91. input UART3_UARTRXD;
  92. output UART3_UARTTXD;
  93. input UART4_UARTRXD;
  94. output UART4_UARTTXD;
  95. input uart15_rx;
  96. output uart15_tx;
  97. //wire gnd;
  98. //wire vcc;
  99. //wire unknown;
  100. wire AsyncReset_X43_Y1_GND;
  101. wire AsyncReset_X43_Y3_GND;
  102. wire AsyncReset_X44_Y1_GND;
  103. wire AsyncReset_X44_Y2_GND;
  104. wire AsyncReset_X44_Y3_GND;
  105. wire AsyncReset_X44_Y4_GND;
  106. wire AsyncReset_X45_Y1_GND;
  107. wire AsyncReset_X45_Y2_GND;
  108. wire AsyncReset_X46_Y1_GND;
  109. wire AsyncReset_X46_Y2_GND;
  110. wire AsyncReset_X46_Y3_GND;
  111. wire AsyncReset_X47_Y1_GND;
  112. wire AsyncReset_X47_Y2_GND;
  113. wire AsyncReset_X47_Y3_GND;
  114. wire AsyncReset_X47_Y4_GND;
  115. wire AsyncReset_X48_Y2_GND;
  116. wire AsyncReset_X48_Y4_GND;
  117. wire AsyncReset_X49_Y1_GND;
  118. wire AsyncReset_X49_Y4_GND;
  119. wire AsyncReset_X50_Y1_GND;
  120. wire AsyncReset_X50_Y2_GND;
  121. wire AsyncReset_X50_Y3_GND;
  122. wire AsyncReset_X51_Y1_GND;
  123. wire AsyncReset_X51_Y2_GND;
  124. wire AsyncReset_X52_Y1_GND;
  125. wire AsyncReset_X53_Y1_GND;
  126. wire AsyncReset_X53_Y3_GND;
  127. wire AsyncReset_X54_Y1_GND;
  128. wire AsyncReset_X54_Y4_GND;
  129. wire AsyncReset_X56_Y10_GND;
  130. wire AsyncReset_X56_Y11_GND;
  131. wire AsyncReset_X56_Y12_GND;
  132. wire AsyncReset_X56_Y5_GND;
  133. wire AsyncReset_X56_Y6_GND;
  134. wire AsyncReset_X56_Y7_GND;
  135. wire AsyncReset_X56_Y8_GND;
  136. wire AsyncReset_X57_Y10_GND;
  137. wire AsyncReset_X57_Y11_GND;
  138. wire AsyncReset_X57_Y12_GND;
  139. wire AsyncReset_X57_Y1_GND;
  140. wire AsyncReset_X57_Y3_GND;
  141. wire AsyncReset_X57_Y4_GND;
  142. wire AsyncReset_X57_Y6_GND;
  143. wire AsyncReset_X57_Y7_GND;
  144. wire AsyncReset_X57_Y9_GND;
  145. wire AsyncReset_X58_Y10_GND;
  146. wire AsyncReset_X58_Y11_GND;
  147. wire AsyncReset_X58_Y1_GND;
  148. wire AsyncReset_X58_Y3_GND;
  149. wire AsyncReset_X58_Y8_GND;
  150. wire AsyncReset_X59_Y10_GND;
  151. wire AsyncReset_X59_Y11_GND;
  152. wire AsyncReset_X59_Y1_GND;
  153. wire AsyncReset_X59_Y6_GND;
  154. wire AsyncReset_X59_Y9_GND;
  155. wire AsyncReset_X60_Y12_GND;
  156. wire AsyncReset_X60_Y9_GND;
  157. wire AsyncReset_X61_Y10_GND;
  158. wire AsyncReset_X61_Y12_GND;
  159. wire AsyncReset_X61_Y1_GND;
  160. wire AsyncReset_X61_Y4_GND;
  161. wire AsyncReset_X61_Y9_GND;
  162. wire AsyncReset_X62_Y10_GND;
  163. wire AsyncReset_X62_Y11_GND;
  164. wire AsyncReset_X62_Y12_GND;
  165. wire AsyncReset_X62_Y1_GND;
  166. wire AsyncReset_X62_Y3_GND;
  167. wire AsyncReset_X62_Y4_GND;
  168. wire AsyncReset_X62_Y5_GND;
  169. wire AsyncReset_X62_Y6_GND;
  170. wire AsyncReset_X62_Y7_GND;
  171. wire AsyncReset_X62_Y9_GND;
  172. wire \GPIO3_0~input_o ;
  173. wire \GPIO3_1~input_o ;
  174. wire \GPIO3_2~input_o ;
  175. wire \GPIO3_3~input_o ;
  176. wire \GPIO3_4~input_o ;
  177. wire \GPIO6_6~input_o ;
  178. wire \GPIO9_1~input_o ;
  179. wire \PIN_HSE~input_o ;
  180. wire \PIN_HSI~input_o ;
  181. wire \PIN_OSC~input_o ;
  182. wire \PLL_ENABLE~clkctrl_outclk ;
  183. wire \PLL_ENABLE~clkctrl_outclk__AsyncReset_X57_Y5_SIG ;
  184. wire \PLL_ENABLE~combout ;
  185. wire \PLL_LOCK~combout ;
  186. wire \SIM_IO[0]~input_o ;
  187. wire \SIM_IO[10]~input_o ;
  188. wire \SIM_IO[11]~input_o ;
  189. wire \SIM_IO[1]~input_o ;
  190. wire \SIM_IO[2]~input_o ;
  191. wire \SIM_IO[3]~input_o ;
  192. wire \SIM_IO[4]~input_o ;
  193. wire \SIM_IO[5]~input_o ;
  194. wire \SIM_IO[6]~input_o ;
  195. wire \SIM_IO[7]~input_o ;
  196. wire \SIM_IO[8]~input_o ;
  197. wire \SIM_IO[9]~input_o ;
  198. wire \SIM_IO_12~input_o ;
  199. wire \SIM_IO_13~input_o ;
  200. wire \SIM_IO_15~input_o ;
  201. wire SyncLoad_X43_Y1_VCC;
  202. wire SyncLoad_X43_Y2_VCC;
  203. wire SyncLoad_X44_Y1_VCC;
  204. wire SyncLoad_X44_Y2_VCC;
  205. wire SyncLoad_X44_Y3_VCC;
  206. wire SyncLoad_X45_Y1_GND;
  207. wire SyncLoad_X45_Y3_VCC;
  208. wire SyncLoad_X46_Y1_GND;
  209. wire SyncLoad_X46_Y2_VCC;
  210. wire SyncLoad_X46_Y3_VCC;
  211. wire SyncLoad_X46_Y4_VCC;
  212. wire SyncLoad_X47_Y2_VCC;
  213. wire SyncLoad_X47_Y3_VCC;
  214. wire SyncLoad_X47_Y4_VCC;
  215. wire SyncLoad_X48_Y1_VCC;
  216. wire SyncLoad_X48_Y2_VCC;
  217. wire SyncLoad_X48_Y4_VCC;
  218. wire SyncLoad_X49_Y3_VCC;
  219. wire SyncLoad_X50_Y1_VCC;
  220. wire SyncLoad_X50_Y3_VCC;
  221. wire SyncLoad_X50_Y4_VCC;
  222. wire SyncLoad_X51_Y3_GND;
  223. wire SyncLoad_X51_Y4_GND;
  224. wire SyncLoad_X52_Y1_VCC;
  225. wire SyncLoad_X52_Y2_VCC;
  226. wire SyncLoad_X52_Y3_VCC;
  227. wire SyncLoad_X52_Y4_VCC;
  228. wire SyncLoad_X53_Y1_GND;
  229. wire SyncLoad_X53_Y2_VCC;
  230. wire SyncLoad_X53_Y3_VCC;
  231. wire SyncLoad_X53_Y4_VCC;
  232. wire SyncLoad_X54_Y2_VCC;
  233. wire SyncLoad_X56_Y10_VCC;
  234. wire SyncLoad_X56_Y11_VCC;
  235. wire SyncLoad_X56_Y12_VCC;
  236. wire SyncLoad_X56_Y1_VCC;
  237. wire SyncLoad_X56_Y2_VCC;
  238. wire SyncLoad_X56_Y3_VCC;
  239. wire SyncLoad_X56_Y4_VCC;
  240. wire SyncLoad_X56_Y8_GND;
  241. wire SyncLoad_X56_Y9_VCC;
  242. wire SyncLoad_X57_Y10_VCC;
  243. wire SyncLoad_X57_Y11_VCC;
  244. wire SyncLoad_X57_Y12_VCC;
  245. wire SyncLoad_X57_Y1_VCC;
  246. wire SyncLoad_X57_Y2_VCC;
  247. wire SyncLoad_X57_Y3_VCC;
  248. wire SyncLoad_X57_Y6_VCC;
  249. wire SyncLoad_X57_Y8_VCC;
  250. wire SyncLoad_X57_Y9_GND;
  251. wire SyncLoad_X58_Y10_GND;
  252. wire SyncLoad_X58_Y11_VCC;
  253. wire SyncLoad_X58_Y2_VCC;
  254. wire SyncLoad_X58_Y4_VCC;
  255. wire SyncLoad_X58_Y5_VCC;
  256. wire SyncLoad_X58_Y6_VCC;
  257. wire SyncLoad_X58_Y7_VCC;
  258. wire SyncLoad_X58_Y9_VCC;
  259. wire SyncLoad_X59_Y11_VCC;
  260. wire SyncLoad_X59_Y12_VCC;
  261. wire SyncLoad_X59_Y1_VCC;
  262. wire SyncLoad_X59_Y2_VCC;
  263. wire SyncLoad_X59_Y3_VCC;
  264. wire SyncLoad_X59_Y4_VCC;
  265. wire SyncLoad_X59_Y5_VCC;
  266. wire SyncLoad_X59_Y6_VCC;
  267. wire SyncLoad_X59_Y7_VCC;
  268. wire SyncLoad_X59_Y8_VCC;
  269. wire SyncLoad_X60_Y11_VCC;
  270. wire SyncLoad_X60_Y12_VCC;
  271. wire SyncLoad_X60_Y1_VCC;
  272. wire SyncLoad_X60_Y2_VCC;
  273. wire SyncLoad_X60_Y4_VCC;
  274. wire SyncLoad_X60_Y6_VCC;
  275. wire SyncLoad_X60_Y7_VCC;
  276. wire SyncLoad_X60_Y8_VCC;
  277. wire SyncLoad_X60_Y9_VCC;
  278. wire SyncLoad_X61_Y10_GND;
  279. wire SyncLoad_X61_Y11_VCC;
  280. wire SyncLoad_X61_Y12_VCC;
  281. wire SyncLoad_X61_Y1_GND;
  282. wire SyncLoad_X61_Y2_VCC;
  283. wire SyncLoad_X61_Y4_VCC;
  284. wire SyncLoad_X61_Y5_VCC;
  285. wire SyncLoad_X61_Y6_VCC;
  286. wire SyncLoad_X61_Y7_VCC;
  287. wire SyncLoad_X61_Y8_GND;
  288. wire SyncLoad_X61_Y9_VCC;
  289. wire SyncLoad_X62_Y10_GND;
  290. wire SyncLoad_X62_Y12_VCC;
  291. wire SyncLoad_X62_Y1_GND;
  292. wire SyncLoad_X62_Y2_GND;
  293. wire SyncLoad_X62_Y3_GND;
  294. wire SyncLoad_X62_Y4_VCC;
  295. wire SyncLoad_X62_Y5_VCC;
  296. wire SyncLoad_X62_Y6_VCC;
  297. wire SyncLoad_X62_Y7_VCC;
  298. wire SyncLoad_X62_Y9_GND;
  299. wire SyncReset_X43_Y1_GND;
  300. wire SyncReset_X43_Y2_GND;
  301. wire SyncReset_X43_Y3_GND;
  302. wire SyncReset_X44_Y1_GND;
  303. wire SyncReset_X44_Y2_GND;
  304. wire SyncReset_X44_Y3_GND;
  305. wire SyncReset_X45_Y2_GND;
  306. wire SyncReset_X45_Y3_GND;
  307. wire SyncReset_X46_Y2_GND;
  308. wire SyncReset_X46_Y3_GND;
  309. wire SyncReset_X46_Y4_GND;
  310. wire SyncReset_X47_Y1_GND;
  311. wire SyncReset_X47_Y2_GND;
  312. wire SyncReset_X47_Y3_GND;
  313. wire SyncReset_X47_Y4_GND;
  314. wire SyncReset_X48_Y1_GND;
  315. wire SyncReset_X48_Y2_GND;
  316. wire SyncReset_X48_Y4_GND;
  317. wire SyncReset_X49_Y1_GND;
  318. wire SyncReset_X49_Y2_GND;
  319. wire SyncReset_X49_Y3_GND;
  320. wire SyncReset_X50_Y1_GND;
  321. wire SyncReset_X50_Y2_GND;
  322. wire SyncReset_X50_Y3_GND;
  323. wire SyncReset_X50_Y4_GND;
  324. wire SyncReset_X52_Y1_GND;
  325. wire SyncReset_X52_Y2_GND;
  326. wire SyncReset_X52_Y3_GND;
  327. wire SyncReset_X52_Y4_GND;
  328. wire SyncReset_X53_Y2_GND;
  329. wire SyncReset_X53_Y3_GND;
  330. wire SyncReset_X53_Y4_GND;
  331. wire SyncReset_X54_Y2_GND;
  332. wire SyncReset_X54_Y3_GND;
  333. wire SyncReset_X56_Y10_GND;
  334. wire SyncReset_X56_Y11_GND;
  335. wire SyncReset_X56_Y12_GND;
  336. wire SyncReset_X56_Y1_GND;
  337. wire SyncReset_X56_Y2_GND;
  338. wire SyncReset_X56_Y3_GND;
  339. wire SyncReset_X56_Y4_GND;
  340. wire SyncReset_X56_Y5_GND;
  341. wire SyncReset_X56_Y6_GND;
  342. wire SyncReset_X56_Y9_GND;
  343. wire SyncReset_X57_Y10_GND;
  344. wire SyncReset_X57_Y11_GND;
  345. wire SyncReset_X57_Y12_GND;
  346. wire SyncReset_X57_Y1_GND;
  347. wire SyncReset_X57_Y2_GND;
  348. wire SyncReset_X57_Y3_GND;
  349. wire SyncReset_X57_Y4_GND;
  350. wire SyncReset_X57_Y6_GND;
  351. wire SyncReset_X57_Y7_GND;
  352. wire SyncReset_X57_Y8_GND;
  353. wire SyncReset_X58_Y11_GND;
  354. wire SyncReset_X58_Y12_GND;
  355. wire SyncReset_X58_Y1_GND;
  356. wire SyncReset_X58_Y2_GND;
  357. wire SyncReset_X58_Y3_GND;
  358. wire SyncReset_X58_Y4_GND;
  359. wire SyncReset_X58_Y5_GND;
  360. wire SyncReset_X58_Y6_GND;
  361. wire SyncReset_X58_Y7_GND;
  362. wire SyncReset_X58_Y8_GND;
  363. wire SyncReset_X58_Y9_GND;
  364. wire SyncReset_X59_Y11_GND;
  365. wire SyncReset_X59_Y12_GND;
  366. wire SyncReset_X59_Y1_GND;
  367. wire SyncReset_X59_Y2_GND;
  368. wire SyncReset_X59_Y3_GND;
  369. wire SyncReset_X59_Y4_GND;
  370. wire SyncReset_X59_Y5_GND;
  371. wire SyncReset_X59_Y6_GND;
  372. wire SyncReset_X59_Y7_GND;
  373. wire SyncReset_X59_Y8_GND;
  374. wire SyncReset_X60_Y10_GND;
  375. wire SyncReset_X60_Y11_GND;
  376. wire SyncReset_X60_Y12_GND;
  377. wire SyncReset_X60_Y1_GND;
  378. wire SyncReset_X60_Y2_GND;
  379. wire SyncReset_X60_Y4_GND;
  380. wire SyncReset_X60_Y6_GND;
  381. wire SyncReset_X60_Y7_GND;
  382. wire SyncReset_X60_Y8_GND;
  383. wire SyncReset_X60_Y9_GND;
  384. wire SyncReset_X61_Y11_GND;
  385. wire SyncReset_X61_Y12_GND;
  386. wire SyncReset_X61_Y2_GND;
  387. wire SyncReset_X61_Y4_GND;
  388. wire SyncReset_X61_Y5_GND;
  389. wire SyncReset_X61_Y6_GND;
  390. wire SyncReset_X61_Y7_GND;
  391. wire SyncReset_X61_Y9_GND;
  392. wire SyncReset_X62_Y11_GND;
  393. wire SyncReset_X62_Y12_GND;
  394. wire SyncReset_X62_Y4_GND;
  395. wire SyncReset_X62_Y5_GND;
  396. wire SyncReset_X62_Y6_GND;
  397. wire SyncReset_X62_Y7_GND;
  398. wire SyncReset_X62_Y8_GND;
  399. wire \UART3_UARTRXD~input_o ;
  400. wire \UART4_UARTRXD~input_o ;
  401. wire \auto_generated_inst.hbo_13_1797ab7b230f061a_bp ;
  402. wire \auto_generated_inst.hbo_13_1797ab7b230f061a_bp_X57_Y5_SIG_VCC ;
  403. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp ;
  404. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ;
  405. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ;
  406. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ;
  407. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X44_Y4_SIG_VCC ;
  408. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ;
  409. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ;
  410. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ;
  411. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y4_SIG_VCC ;
  412. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ;
  413. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ;
  414. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ;
  415. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ;
  416. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y4_SIG_VCC ;
  417. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ;
  418. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y3_SIG_VCC ;
  419. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y4_SIG_VCC ;
  420. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ;
  421. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ;
  422. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ;
  423. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ;
  424. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ;
  425. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ;
  426. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ;
  427. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ;
  428. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ;
  429. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y4_SIG_VCC ;
  430. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ;
  431. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ;
  432. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ;
  433. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ;
  434. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ;
  435. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ;
  436. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y4_SIG_VCC ;
  437. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ;
  438. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ;
  439. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ;
  440. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ;
  441. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ;
  442. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ;
  443. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ;
  444. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ;
  445. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ;
  446. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ;
  447. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ;
  448. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ;
  449. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ;
  450. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ;
  451. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ;
  452. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ;
  453. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ;
  454. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ;
  455. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ;
  456. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ;
  457. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ;
  458. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ;
  459. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y10_SIG_VCC ;
  460. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y12_SIG_VCC ;
  461. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ;
  462. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ;
  463. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y9_SIG_VCC ;
  464. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ;
  465. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ;
  466. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ;
  467. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ;
  468. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ;
  469. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ;
  470. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ;
  471. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ;
  472. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ;
  473. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ;
  474. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ;
  475. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ;
  476. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ;
  477. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ;
  478. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ;
  479. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ;
  480. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ;
  481. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ;
  482. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ;
  483. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ;
  484. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ;
  485. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ;
  486. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ;
  487. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_apb_mux|always0~0_combout_X61_Y3_SIG_SIG ;
  488. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X43_Y2_SIG_SIG ;
  489. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y1_SIG_SIG ;
  490. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ;
  491. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ;
  492. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ;
  493. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X53_Y1_SIG_SIG ;
  494. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ;
  495. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X62_Y2_SIG_SIG ;
  496. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ;
  497. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ;
  498. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ;
  499. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ;
  500. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ;
  501. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ;
  502. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X61_Y5_SIG_SIG ;
  503. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ;
  504. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ;
  505. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X56_Y2_SIG_SIG ;
  506. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X58_Y4_SIG_SIG ;
  507. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ;
  508. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ;
  509. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ;
  510. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X61_Y2_SIG_SIG ;
  511. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout_X57_Y2_SIG_SIG ;
  512. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout_X57_Y2_SIG_SIG ;
  513. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout_X46_Y4_SIG_SIG ;
  514. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout_X46_Y4_SIG_SIG ;
  515. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout_X57_Y1_SIG_SIG ;
  516. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout_X58_Y4_SIG_SIG ;
  517. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ;
  518. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X45_Y4_SIG_SIG ;
  519. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X47_Y4_SIG_SIG ;
  520. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X48_Y4_SIG_SIG ;
  521. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X50_Y4_SIG_SIG ;
  522. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X52_Y4_SIG_SIG ;
  523. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ;
  524. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ;
  525. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ;
  526. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X56_Y2_SIG_SIG ;
  527. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ;
  528. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ;
  529. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout_X51_Y2_SIG_SIG ;
  530. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ;
  531. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X48_Y2_SIG_SIG ;
  532. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ;
  533. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout_X49_Y4_SIG_SIG ;
  534. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ;
  535. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X47_Y3_SIG_SIG ;
  536. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ;
  537. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ;
  538. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout_X43_Y1_SIG_SIG ;
  539. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ;
  540. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X49_Y1_SIG_SIG ;
  541. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ;
  542. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout_X47_Y1_SIG_SIG ;
  543. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ;
  544. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ;
  545. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout_X49_Y4_SIG_SIG ;
  546. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ;
  547. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ;
  548. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout_X43_Y3_SIG_SIG ;
  549. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ;
  550. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y3_SIG_SIG ;
  551. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout_X54_Y1_SIG_SIG ;
  552. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ;
  553. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ;
  554. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout_X46_Y1_SIG_SIG ;
  555. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ;
  556. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ;
  557. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout_X62_Y1_SIG_SIG ;
  558. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ;
  559. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ;
  560. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout_X62_Y3_SIG_SIG ;
  561. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ;
  562. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ;
  563. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout_X58_Y1_SIG_SIG ;
  564. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ;
  565. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ;
  566. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout_X51_Y1_SIG_SIG ;
  567. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ;
  568. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ;
  569. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X52_Y3_SIG_SIG ;
  570. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ;
  571. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X56_Y9_SIG_SIG ;
  572. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ;
  573. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y3_SIG_SIG ;
  574. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y9_SIG_SIG ;
  575. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y11_SIG_SIG ;
  576. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ;
  577. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ;
  578. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ;
  579. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ;
  580. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ;
  581. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X58_Y5_SIG_SIG ;
  582. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ;
  583. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ;
  584. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ;
  585. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ;
  586. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ;
  587. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ;
  588. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout_X59_Y8_SIG_SIG ;
  589. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout_X59_Y8_SIG_SIG ;
  590. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout_X56_Y4_SIG_SIG ;
  591. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout_X56_Y4_SIG_SIG ;
  592. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout_X46_Y2_SIG_SIG ;
  593. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout_X60_Y4_SIG_SIG ;
  594. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ;
  595. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X60_Y6_SIG_SIG ;
  596. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ;
  597. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X60_Y6_SIG_SIG ;
  598. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y6_SIG_SIG ;
  599. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ;
  600. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X59_Y6_SIG_SIG ;
  601. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ;
  602. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ;
  603. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ;
  604. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y7_SIG_SIG ;
  605. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y7_SIG_SIG ;
  606. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ;
  607. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout_X54_Y4_SIG_SIG ;
  608. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ;
  609. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ;
  610. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X56_Y6_SIG_SIG ;
  611. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X57_Y6_SIG_SIG ;
  612. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ;
  613. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y7_SIG_SIG ;
  614. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ;
  615. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout_X57_Y4_SIG_SIG ;
  616. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ;
  617. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ;
  618. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y6_SIG_SIG ;
  619. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X60_Y10_SIG_SIG ;
  620. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout_X59_Y10_SIG_SIG ;
  621. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ;
  622. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ;
  623. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout_X59_Y9_SIG_SIG ;
  624. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ;
  625. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ;
  626. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout_X62_Y11_SIG_SIG ;
  627. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ;
  628. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout_X57_Y9_SIG_SIG ;
  629. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ;
  630. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ;
  631. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout_X56_Y8_SIG_SIG ;
  632. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ;
  633. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ;
  634. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout_X58_Y10_SIG_SIG ;
  635. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ;
  636. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ;
  637. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout_X62_Y9_SIG_SIG ;
  638. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ;
  639. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ;
  640. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout_X62_Y10_SIG_SIG ;
  641. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ;
  642. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ;
  643. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout_X50_Y3_SIG_SIG ;
  644. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ;
  645. wire \auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ;
  646. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ;
  647. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X50_Y2_SIG_VCC ;
  648. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ;
  649. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X54_Y2_SIG_SIG ;
  650. wire \auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ;
  651. tri1 devclrn;
  652. tri1 devoe;
  653. tri1 devpor;
  654. wire \gclksw_inst|gclk_switch__alta_gclksw__clkout ;
  655. wire [7:0] gpio3_io_in;
  656. //wire gpio3_io_in[0];
  657. //wire gpio3_io_in[1];
  658. //wire gpio3_io_in[2];
  659. //wire gpio3_io_in[3];
  660. //wire gpio3_io_in[4];
  661. //wire gpio3_io_in[5];
  662. //wire gpio3_io_in[6];
  663. //wire gpio3_io_in[7];
  664. wire [7:0] gpio4_io_in;
  665. //wire gpio4_io_in[0];
  666. //wire gpio4_io_in[1];
  667. //wire gpio4_io_in[2];
  668. //wire gpio4_io_in[3];
  669. //wire gpio4_io_in[4];
  670. //wire gpio4_io_in[5];
  671. //wire gpio4_io_in[6];
  672. //wire gpio4_io_in[7];
  673. wire [7:0] gpio5_io_in;
  674. //wire gpio5_io_in[0];
  675. //wire gpio5_io_in[1];
  676. //wire gpio5_io_in[2];
  677. //wire gpio5_io_in[3];
  678. //wire gpio5_io_in[4];
  679. //wire gpio5_io_in[5];
  680. //wire gpio5_io_in[6];
  681. //wire gpio5_io_in[7];
  682. wire [7:0] gpio6_io_in;
  683. //wire gpio6_io_in[0];
  684. //wire gpio6_io_in[1];
  685. //wire gpio6_io_in[2];
  686. //wire gpio6_io_in[3];
  687. //wire gpio6_io_in[4];
  688. //wire gpio6_io_in[5];
  689. //wire gpio6_io_in[6];
  690. //wire gpio6_io_in[7];
  691. wire [7:0] gpio6_io_out_data;
  692. //wire gpio6_io_out_data[0];
  693. //wire gpio6_io_out_data[1];
  694. //wire gpio6_io_out_data[2];
  695. //wire gpio6_io_out_data[3];
  696. //wire gpio6_io_out_data[4];
  697. //wire gpio6_io_out_data[5];
  698. //wire gpio6_io_out_data[6];
  699. //wire gpio6_io_out_data[7];
  700. wire [7:0] gpio6_io_out_en;
  701. //wire gpio6_io_out_en[0];
  702. //wire gpio6_io_out_en[1];
  703. //wire gpio6_io_out_en[2];
  704. //wire gpio6_io_out_en[3];
  705. //wire gpio6_io_out_en[4];
  706. //wire gpio6_io_out_en[5];
  707. //wire gpio6_io_out_en[6];
  708. //wire gpio6_io_out_en[7];
  709. wire [7:0] gpio7_io_in;
  710. //wire gpio7_io_in[0];
  711. //wire gpio7_io_in[1];
  712. //wire gpio7_io_in[2];
  713. //wire gpio7_io_in[3];
  714. //wire gpio7_io_in[4];
  715. //wire gpio7_io_in[5];
  716. //wire gpio7_io_in[6];
  717. //wire gpio7_io_in[7];
  718. wire [7:0] gpio7_io_out_data;
  719. //wire gpio7_io_out_data[0];
  720. //wire gpio7_io_out_data[1];
  721. //wire gpio7_io_out_data[2];
  722. //wire gpio7_io_out_data[3];
  723. //wire gpio7_io_out_data[4];
  724. //wire gpio7_io_out_data[5];
  725. //wire gpio7_io_out_data[6];
  726. //wire gpio7_io_out_data[7];
  727. wire [7:0] gpio7_io_out_en;
  728. //wire gpio7_io_out_en[0];
  729. //wire gpio7_io_out_en[1];
  730. //wire gpio7_io_out_en[2];
  731. //wire gpio7_io_out_en[3];
  732. //wire gpio7_io_out_en[4];
  733. //wire gpio7_io_out_en[5];
  734. //wire gpio7_io_out_en[6];
  735. //wire gpio7_io_out_en[7];
  736. wire [7:0] gpio8_io_out_data;
  737. //wire gpio8_io_out_data[0];
  738. //wire gpio8_io_out_data[1];
  739. //wire gpio8_io_out_data[2];
  740. //wire gpio8_io_out_data[3];
  741. //wire gpio8_io_out_data[4];
  742. //wire gpio8_io_out_data[5];
  743. //wire gpio8_io_out_data[6];
  744. //wire gpio8_io_out_data[7];
  745. wire [7:0] gpio8_io_out_en;
  746. //wire gpio8_io_out_en[0];
  747. //wire gpio8_io_out_en[1];
  748. //wire gpio8_io_out_en[2];
  749. //wire gpio8_io_out_en[3];
  750. //wire gpio8_io_out_en[4];
  751. //wire gpio8_io_out_en[5];
  752. //wire gpio8_io_out_en[6];
  753. //wire gpio8_io_out_en[7];
  754. wire [7:0] gpio9_io_in;
  755. //wire gpio9_io_in[0];
  756. //wire gpio9_io_in[1];
  757. //wire gpio9_io_in[2];
  758. //wire gpio9_io_in[3];
  759. //wire gpio9_io_in[4];
  760. //wire gpio9_io_in[5];
  761. //wire gpio9_io_in[6];
  762. //wire gpio9_io_in[7];
  763. wire hbi_272_0_9cb2c0024f9919c5_bp;
  764. wire hbi_272_1_9cb2c0024f9919c5_bp;
  765. wire \macro_inst|LessThan0~0_combout ;
  766. wire \macro_inst|LessThan0~1_combout ;
  767. wire \macro_inst|LessThan0~2_combout ;
  768. wire \macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ;
  769. wire \macro_inst|SIM_IO_12~1_combout ;
  770. wire \macro_inst|SIM_IO_13~1_combout ;
  771. wire \macro_inst|SIM_IO_15~1_combout ;
  772. wire [7:0] \macro_inst|sim_clk_cnt ;
  773. //wire \macro_inst|sim_clk_cnt [0];
  774. wire \macro_inst|sim_clk_cnt[0]~8_combout ;
  775. wire \macro_inst|sim_clk_cnt[0]~9 ;
  776. //wire \macro_inst|sim_clk_cnt [1];
  777. wire \macro_inst|sim_clk_cnt[1]~10_combout ;
  778. wire \macro_inst|sim_clk_cnt[1]~11 ;
  779. //wire \macro_inst|sim_clk_cnt [2];
  780. wire \macro_inst|sim_clk_cnt[2]~12_combout ;
  781. wire \macro_inst|sim_clk_cnt[2]~13 ;
  782. //wire \macro_inst|sim_clk_cnt [3];
  783. wire \macro_inst|sim_clk_cnt[3]~14_combout ;
  784. wire \macro_inst|sim_clk_cnt[3]~15 ;
  785. //wire \macro_inst|sim_clk_cnt [4];
  786. wire \macro_inst|sim_clk_cnt[4]~16_combout ;
  787. wire \macro_inst|sim_clk_cnt[4]~17 ;
  788. //wire \macro_inst|sim_clk_cnt [5];
  789. wire \macro_inst|sim_clk_cnt[5]~18_combout ;
  790. wire \macro_inst|sim_clk_cnt[5]~19 ;
  791. //wire \macro_inst|sim_clk_cnt [6];
  792. wire \macro_inst|sim_clk_cnt[6]~20_combout ;
  793. wire \macro_inst|sim_clk_cnt[6]~21 ;
  794. //wire \macro_inst|sim_clk_cnt [7];
  795. wire \macro_inst|sim_clk_cnt[7]~22_combout ;
  796. wire \macro_inst|sim_clk_reg~0_combout ;
  797. wire \macro_inst|sim_clk_reg~q ;
  798. wire \macro_inst|u_ahb2apb|Selector0~0_combout ;
  799. wire \macro_inst|u_ahb2apb|Selector22~0_combout ;
  800. wire \macro_inst|u_ahb2apb|Selector2~0_combout ;
  801. wire \macro_inst|u_ahb2apb|always0~0_combout ;
  802. wire \macro_inst|u_ahb2apb|always2~0_combout ;
  803. wire \macro_inst|u_ahb2apb|apbState.apbAccess~q ;
  804. wire \macro_inst|u_ahb2apb|apbState.apbIdle~q ;
  805. wire \macro_inst|u_ahb2apb|apbState.apbSetup~q ;
  806. wire \macro_inst|u_ahb2apb|apb_pdone~combout ;
  807. wire [12:0] \macro_inst|u_ahb2apb|haddr ;
  808. //wire \macro_inst|u_ahb2apb|haddr [0];
  809. //wire \macro_inst|u_ahb2apb|haddr [10];
  810. //wire \macro_inst|u_ahb2apb|haddr [11];
  811. //wire \macro_inst|u_ahb2apb|haddr [12];
  812. //wire \macro_inst|u_ahb2apb|haddr [1];
  813. //wire \macro_inst|u_ahb2apb|haddr [2];
  814. //wire \macro_inst|u_ahb2apb|haddr [3];
  815. //wire \macro_inst|u_ahb2apb|haddr [4];
  816. //wire \macro_inst|u_ahb2apb|haddr [5];
  817. //wire \macro_inst|u_ahb2apb|haddr [6];
  818. //wire \macro_inst|u_ahb2apb|haddr [7];
  819. //wire \macro_inst|u_ahb2apb|haddr [8];
  820. //wire \macro_inst|u_ahb2apb|haddr [9];
  821. wire \macro_inst|u_ahb2apb|hdone~0_combout ;
  822. wire \macro_inst|u_ahb2apb|hdone~q ;
  823. wire \macro_inst|u_ahb2apb|hreadyout~0_combout ;
  824. wire \macro_inst|u_ahb2apb|hreadyout~q ;
  825. wire \macro_inst|u_ahb2apb|hwrite~q ;
  826. wire [12:0] \macro_inst|u_ahb2apb|paddr ;
  827. //wire \macro_inst|u_ahb2apb|paddr [0];
  828. //wire \macro_inst|u_ahb2apb|paddr [10];
  829. wire \macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X56_Y5_INV ;
  830. wire \macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X57_Y7_INV ;
  831. wire \macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y1_INV ;
  832. wire \macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y3_INV ;
  833. //wire \macro_inst|u_ahb2apb|paddr [11];
  834. //wire \macro_inst|u_ahb2apb|paddr [12];
  835. //wire \macro_inst|u_ahb2apb|paddr [1];
  836. //wire \macro_inst|u_ahb2apb|paddr [2];
  837. //wire \macro_inst|u_ahb2apb|paddr [3];
  838. //wire \macro_inst|u_ahb2apb|paddr [4];
  839. //wire \macro_inst|u_ahb2apb|paddr [5];
  840. //wire \macro_inst|u_ahb2apb|paddr [6];
  841. //wire \macro_inst|u_ahb2apb|paddr [7];
  842. wire \macro_inst|u_ahb2apb|paddr[7]__SyncReset_X51_Y4_SIG ;
  843. //wire \macro_inst|u_ahb2apb|paddr [8];
  844. //wire \macro_inst|u_ahb2apb|paddr [9];
  845. wire \macro_inst|u_ahb2apb|pdone~0_combout ;
  846. wire \macro_inst|u_ahb2apb|pdone~q ;
  847. wire \macro_inst|u_ahb2apb|penable~q ;
  848. wire [31:0] \macro_inst|u_ahb2apb|prdata ;
  849. //wire \macro_inst|u_ahb2apb|prdata [0];
  850. //wire \macro_inst|u_ahb2apb|prdata [10];
  851. //wire \macro_inst|u_ahb2apb|prdata [11];
  852. //wire \macro_inst|u_ahb2apb|prdata [12];
  853. //wire \macro_inst|u_ahb2apb|prdata [13];
  854. //wire \macro_inst|u_ahb2apb|prdata [14];
  855. //wire \macro_inst|u_ahb2apb|prdata [15];
  856. //wire \macro_inst|u_ahb2apb|prdata [16];
  857. //wire \macro_inst|u_ahb2apb|prdata [17];
  858. //wire \macro_inst|u_ahb2apb|prdata [18];
  859. //wire \macro_inst|u_ahb2apb|prdata [19];
  860. //wire \macro_inst|u_ahb2apb|prdata [1];
  861. //wire \macro_inst|u_ahb2apb|prdata [20];
  862. //wire \macro_inst|u_ahb2apb|prdata [21];
  863. //wire \macro_inst|u_ahb2apb|prdata [22];
  864. //wire \macro_inst|u_ahb2apb|prdata [23];
  865. //wire \macro_inst|u_ahb2apb|prdata [24];
  866. //wire \macro_inst|u_ahb2apb|prdata [25];
  867. //wire \macro_inst|u_ahb2apb|prdata [26];
  868. //wire \macro_inst|u_ahb2apb|prdata [27];
  869. //wire \macro_inst|u_ahb2apb|prdata [28];
  870. //wire \macro_inst|u_ahb2apb|prdata [29];
  871. //wire \macro_inst|u_ahb2apb|prdata [2];
  872. //wire \macro_inst|u_ahb2apb|prdata [30];
  873. //wire \macro_inst|u_ahb2apb|prdata [31];
  874. //wire \macro_inst|u_ahb2apb|prdata [3];
  875. //wire \macro_inst|u_ahb2apb|prdata [4];
  876. //wire \macro_inst|u_ahb2apb|prdata [5];
  877. //wire \macro_inst|u_ahb2apb|prdata [6];
  878. //wire \macro_inst|u_ahb2apb|prdata [7];
  879. //wire \macro_inst|u_ahb2apb|prdata [8];
  880. //wire \macro_inst|u_ahb2apb|prdata [9];
  881. wire \macro_inst|u_ahb2apb|psel~0_combout ;
  882. wire \macro_inst|u_ahb2apb|psel~1_combout ;
  883. wire \macro_inst|u_ahb2apb|psel~q ;
  884. wire \macro_inst|u_ahb2apb|pvalid~q ;
  885. wire \macro_inst|u_ahb2apb|pwrite~0_combout ;
  886. wire \macro_inst|u_ahb2apb|pwrite~q ;
  887. wire \macro_inst|u_apb_mux|always0~0_combout ;
  888. wire [31:0] \macro_inst|u_apb_mux|apb_in_prdata ;
  889. //wire \macro_inst|u_apb_mux|apb_in_prdata [0];
  890. //wire \macro_inst|u_apb_mux|apb_in_prdata [10];
  891. //wire \macro_inst|u_apb_mux|apb_in_prdata [11];
  892. //wire \macro_inst|u_apb_mux|apb_in_prdata [12];
  893. //wire \macro_inst|u_apb_mux|apb_in_prdata [13];
  894. //wire \macro_inst|u_apb_mux|apb_in_prdata [14];
  895. //wire \macro_inst|u_apb_mux|apb_in_prdata [15];
  896. //wire \macro_inst|u_apb_mux|apb_in_prdata [16];
  897. //wire \macro_inst|u_apb_mux|apb_in_prdata [17];
  898. //wire \macro_inst|u_apb_mux|apb_in_prdata [18];
  899. //wire \macro_inst|u_apb_mux|apb_in_prdata [19];
  900. //wire \macro_inst|u_apb_mux|apb_in_prdata [1];
  901. //wire \macro_inst|u_apb_mux|apb_in_prdata [20];
  902. //wire \macro_inst|u_apb_mux|apb_in_prdata [21];
  903. //wire \macro_inst|u_apb_mux|apb_in_prdata [22];
  904. //wire \macro_inst|u_apb_mux|apb_in_prdata [23];
  905. //wire \macro_inst|u_apb_mux|apb_in_prdata [24];
  906. //wire \macro_inst|u_apb_mux|apb_in_prdata [25];
  907. //wire \macro_inst|u_apb_mux|apb_in_prdata [26];
  908. //wire \macro_inst|u_apb_mux|apb_in_prdata [27];
  909. //wire \macro_inst|u_apb_mux|apb_in_prdata [28];
  910. //wire \macro_inst|u_apb_mux|apb_in_prdata [29];
  911. //wire \macro_inst|u_apb_mux|apb_in_prdata [2];
  912. //wire \macro_inst|u_apb_mux|apb_in_prdata [30];
  913. //wire \macro_inst|u_apb_mux|apb_in_prdata [31];
  914. //wire \macro_inst|u_apb_mux|apb_in_prdata [3];
  915. //wire \macro_inst|u_apb_mux|apb_in_prdata [4];
  916. //wire \macro_inst|u_apb_mux|apb_in_prdata [5];
  917. //wire \macro_inst|u_apb_mux|apb_in_prdata [6];
  918. //wire \macro_inst|u_apb_mux|apb_in_prdata [7];
  919. //wire \macro_inst|u_apb_mux|apb_in_prdata [8];
  920. //wire \macro_inst|u_apb_mux|apb_in_prdata [9];
  921. wire \macro_inst|u_apb_mux|apb_in_pready~0_combout ;
  922. wire [1:0] \macro_inst|u_apb_mux|pr_select ;
  923. //wire \macro_inst|u_apb_mux|pr_select [0];
  924. wire \macro_inst|u_apb_mux|pr_select[0]~0_combout ;
  925. //wire \macro_inst|u_apb_mux|pr_select [1];
  926. wire \macro_inst|u_apb_mux|pr_select[1]~feeder_combout ;
  927. wire \macro_inst|u_uart[0]|u_baud|Equal1~0_combout ;
  928. wire \macro_inst|u_uart[0]|u_baud|Equal1~1_combout ;
  929. wire \macro_inst|u_uart[0]|u_baud|Equal1~2_combout ;
  930. wire \macro_inst|u_uart[0]|u_baud|Equal1~3_combout ;
  931. wire \macro_inst|u_uart[0]|u_baud|Equal1~4_combout ;
  932. wire \macro_inst|u_uart[0]|u_baud|LessThan0~10_combout ;
  933. wire \macro_inst|u_uart[0]|u_baud|LessThan0~1_cout ;
  934. wire \macro_inst|u_uart[0]|u_baud|LessThan0~3_cout ;
  935. wire \macro_inst|u_uart[0]|u_baud|LessThan0~5_cout ;
  936. wire \macro_inst|u_uart[0]|u_baud|LessThan0~7_cout ;
  937. wire \macro_inst|u_uart[0]|u_baud|LessThan0~9_cout ;
  938. wire \macro_inst|u_uart[0]|u_baud|always0~0_combout ;
  939. wire \macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ;
  940. wire \macro_inst|u_uart[0]|u_baud|always2~0_combout ;
  941. wire \macro_inst|u_uart[0]|u_baud|baud16~q ;
  942. wire [5:0] \macro_inst|u_uart[0]|u_baud|f_cnt ;
  943. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [0];
  944. wire \macro_inst|u_uart[0]|u_baud|f_cnt[0]~6_combout ;
  945. wire \macro_inst|u_uart[0]|u_baud|f_cnt[0]~7 ;
  946. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [1];
  947. wire \macro_inst|u_uart[0]|u_baud|f_cnt[1]~8_combout ;
  948. wire \macro_inst|u_uart[0]|u_baud|f_cnt[1]~9 ;
  949. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [2];
  950. wire \macro_inst|u_uart[0]|u_baud|f_cnt[2]~10_combout ;
  951. wire \macro_inst|u_uart[0]|u_baud|f_cnt[2]~11 ;
  952. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [3];
  953. wire \macro_inst|u_uart[0]|u_baud|f_cnt[3]~12_combout ;
  954. wire \macro_inst|u_uart[0]|u_baud|f_cnt[3]~13 ;
  955. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [4];
  956. wire \macro_inst|u_uart[0]|u_baud|f_cnt[4]~14_combout ;
  957. wire \macro_inst|u_uart[0]|u_baud|f_cnt[4]~15 ;
  958. //wire \macro_inst|u_uart[0]|u_baud|f_cnt [5];
  959. wire \macro_inst|u_uart[0]|u_baud|f_cnt[5]~16_combout ;
  960. wire \macro_inst|u_uart[0]|u_baud|f_del~q ;
  961. wire [15:0] \macro_inst|u_uart[0]|u_baud|i_cnt ;
  962. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [0];
  963. wire \macro_inst|u_uart[0]|u_baud|i_cnt[0]~16_combout ;
  964. wire \macro_inst|u_uart[0]|u_baud|i_cnt[0]~17 ;
  965. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [10];
  966. wire \macro_inst|u_uart[0]|u_baud|i_cnt[10]~36_combout ;
  967. wire \macro_inst|u_uart[0]|u_baud|i_cnt[10]~37 ;
  968. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [11];
  969. wire \macro_inst|u_uart[0]|u_baud|i_cnt[11]~38_combout ;
  970. wire \macro_inst|u_uart[0]|u_baud|i_cnt[11]~39 ;
  971. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [12];
  972. wire \macro_inst|u_uart[0]|u_baud|i_cnt[12]~40_combout ;
  973. wire \macro_inst|u_uart[0]|u_baud|i_cnt[12]~41 ;
  974. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [13];
  975. wire \macro_inst|u_uart[0]|u_baud|i_cnt[13]~42_combout ;
  976. wire \macro_inst|u_uart[0]|u_baud|i_cnt[13]~43 ;
  977. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [14];
  978. wire \macro_inst|u_uart[0]|u_baud|i_cnt[14]~44_combout ;
  979. wire \macro_inst|u_uart[0]|u_baud|i_cnt[14]~45 ;
  980. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [15];
  981. wire \macro_inst|u_uart[0]|u_baud|i_cnt[15]~46_combout ;
  982. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [1];
  983. wire \macro_inst|u_uart[0]|u_baud|i_cnt[1]~18_combout ;
  984. wire \macro_inst|u_uart[0]|u_baud|i_cnt[1]~19 ;
  985. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [2];
  986. wire \macro_inst|u_uart[0]|u_baud|i_cnt[2]~20_combout ;
  987. wire \macro_inst|u_uart[0]|u_baud|i_cnt[2]~21 ;
  988. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [3];
  989. wire \macro_inst|u_uart[0]|u_baud|i_cnt[3]~22_combout ;
  990. wire \macro_inst|u_uart[0]|u_baud|i_cnt[3]~23 ;
  991. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [4];
  992. wire \macro_inst|u_uart[0]|u_baud|i_cnt[4]~24_combout ;
  993. wire \macro_inst|u_uart[0]|u_baud|i_cnt[4]~25 ;
  994. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [5];
  995. wire \macro_inst|u_uart[0]|u_baud|i_cnt[5]~26_combout ;
  996. wire \macro_inst|u_uart[0]|u_baud|i_cnt[5]~27 ;
  997. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [6];
  998. wire \macro_inst|u_uart[0]|u_baud|i_cnt[6]~28_combout ;
  999. wire \macro_inst|u_uart[0]|u_baud|i_cnt[6]~29 ;
  1000. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [7];
  1001. wire \macro_inst|u_uart[0]|u_baud|i_cnt[7]~30_combout ;
  1002. wire \macro_inst|u_uart[0]|u_baud|i_cnt[7]~31 ;
  1003. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [8];
  1004. wire \macro_inst|u_uart[0]|u_baud|i_cnt[8]~32_combout ;
  1005. wire \macro_inst|u_uart[0]|u_baud|i_cnt[8]~33 ;
  1006. //wire \macro_inst|u_uart[0]|u_baud|i_cnt [9];
  1007. wire \macro_inst|u_uart[0]|u_baud|i_cnt[9]~34_combout ;
  1008. wire \macro_inst|u_uart[0]|u_baud|i_cnt[9]~35 ;
  1009. wire \macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ;
  1010. wire \macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ;
  1011. wire \macro_inst|u_uart[0]|u_regs|Mux0~2_combout ;
  1012. wire \macro_inst|u_uart[0]|u_regs|Mux0~3_combout ;
  1013. wire \macro_inst|u_uart[0]|u_regs|Mux0~4_combout ;
  1014. wire \macro_inst|u_uart[0]|u_regs|Mux0~5_combout ;
  1015. wire \macro_inst|u_uart[0]|u_regs|Mux10~0_combout ;
  1016. wire \macro_inst|u_uart[0]|u_regs|Mux10~1_combout ;
  1017. wire \macro_inst|u_uart[0]|u_regs|Mux11~0_combout ;
  1018. wire \macro_inst|u_uart[0]|u_regs|Mux11~1_combout ;
  1019. wire \macro_inst|u_uart[0]|u_regs|Mux11~2_combout ;
  1020. wire \macro_inst|u_uart[0]|u_regs|Mux11~3_combout ;
  1021. wire \macro_inst|u_uart[0]|u_regs|Mux12~0_combout ;
  1022. wire \macro_inst|u_uart[0]|u_regs|Mux12~1_combout ;
  1023. wire \macro_inst|u_uart[0]|u_regs|Mux1~2_combout ;
  1024. wire \macro_inst|u_uart[0]|u_regs|Mux1~3_combout ;
  1025. wire \macro_inst|u_uart[0]|u_regs|Mux1~4_combout ;
  1026. wire \macro_inst|u_uart[0]|u_regs|Mux1~5_combout ;
  1027. wire \macro_inst|u_uart[0]|u_regs|Mux2~2_combout ;
  1028. wire \macro_inst|u_uart[0]|u_regs|Mux2~3_combout ;
  1029. wire \macro_inst|u_uart[0]|u_regs|Mux2~4_combout ;
  1030. wire \macro_inst|u_uart[0]|u_regs|Mux2~5_combout ;
  1031. wire \macro_inst|u_uart[0]|u_regs|Mux3~2_combout ;
  1032. wire \macro_inst|u_uart[0]|u_regs|Mux3~3_combout ;
  1033. wire \macro_inst|u_uart[0]|u_regs|Mux3~4_combout ;
  1034. wire \macro_inst|u_uart[0]|u_regs|Mux3~5_combout ;
  1035. wire \macro_inst|u_uart[0]|u_regs|Mux4~2_combout ;
  1036. wire \macro_inst|u_uart[0]|u_regs|Mux4~3_combout ;
  1037. wire \macro_inst|u_uart[0]|u_regs|Mux4~4_combout ;
  1038. wire \macro_inst|u_uart[0]|u_regs|Mux4~5_combout ;
  1039. wire \macro_inst|u_uart[0]|u_regs|Mux5~2_combout ;
  1040. wire \macro_inst|u_uart[0]|u_regs|Mux5~3_combout ;
  1041. wire \macro_inst|u_uart[0]|u_regs|Mux5~4_combout ;
  1042. wire \macro_inst|u_uart[0]|u_regs|Mux5~5_combout ;
  1043. wire \macro_inst|u_uart[0]|u_regs|Mux6~2_combout ;
  1044. wire \macro_inst|u_uart[0]|u_regs|Mux6~3_combout ;
  1045. wire \macro_inst|u_uart[0]|u_regs|Mux6~4_combout ;
  1046. wire \macro_inst|u_uart[0]|u_regs|Mux6~5_combout ;
  1047. wire \macro_inst|u_uart[0]|u_regs|Mux7~2_combout ;
  1048. wire \macro_inst|u_uart[0]|u_regs|Mux7~3_combout ;
  1049. wire \macro_inst|u_uart[0]|u_regs|Mux7~4_combout ;
  1050. wire \macro_inst|u_uart[0]|u_regs|Mux7~5_combout ;
  1051. wire \macro_inst|u_uart[0]|u_regs|Mux8~0_combout ;
  1052. wire \macro_inst|u_uart[0]|u_regs|Selector0~0_combout ;
  1053. wire \macro_inst|u_uart[0]|u_regs|Selector0~1_combout ;
  1054. wire \macro_inst|u_uart[0]|u_regs|Selector0~2_combout ;
  1055. wire \macro_inst|u_uart[0]|u_regs|Selector0~3_combout ;
  1056. wire \macro_inst|u_uart[0]|u_regs|Selector0~4_combout ;
  1057. wire \macro_inst|u_uart[0]|u_regs|Selector10~0_combout ;
  1058. wire \macro_inst|u_uart[0]|u_regs|Selector10~1_combout ;
  1059. wire \macro_inst|u_uart[0]|u_regs|Selector10~2_combout ;
  1060. wire \macro_inst|u_uart[0]|u_regs|Selector10~3_combout ;
  1061. wire \macro_inst|u_uart[0]|u_regs|Selector10~4_combout ;
  1062. wire \macro_inst|u_uart[0]|u_regs|Selector10~5_combout ;
  1063. wire \macro_inst|u_uart[0]|u_regs|Selector10~6_combout ;
  1064. wire \macro_inst|u_uart[0]|u_regs|Selector11~10_combout ;
  1065. wire \macro_inst|u_uart[0]|u_regs|Selector11~11_combout ;
  1066. wire \macro_inst|u_uart[0]|u_regs|Selector11~12_combout ;
  1067. wire \macro_inst|u_uart[0]|u_regs|Selector11~13_combout ;
  1068. wire \macro_inst|u_uart[0]|u_regs|Selector11~2_combout ;
  1069. wire \macro_inst|u_uart[0]|u_regs|Selector11~3_combout ;
  1070. wire \macro_inst|u_uart[0]|u_regs|Selector11~4_combout ;
  1071. wire \macro_inst|u_uart[0]|u_regs|Selector11~5_combout ;
  1072. wire \macro_inst|u_uart[0]|u_regs|Selector11~6_combout ;
  1073. wire \macro_inst|u_uart[0]|u_regs|Selector11~7_combout ;
  1074. wire \macro_inst|u_uart[0]|u_regs|Selector11~8_combout ;
  1075. wire \macro_inst|u_uart[0]|u_regs|Selector11~9_combout ;
  1076. wire \macro_inst|u_uart[0]|u_regs|Selector12~0_combout ;
  1077. wire \macro_inst|u_uart[0]|u_regs|Selector12~10_combout ;
  1078. wire \macro_inst|u_uart[0]|u_regs|Selector12~11_combout ;
  1079. wire \macro_inst|u_uart[0]|u_regs|Selector12~1_combout ;
  1080. wire \macro_inst|u_uart[0]|u_regs|Selector12~2_combout ;
  1081. wire \macro_inst|u_uart[0]|u_regs|Selector12~3_combout ;
  1082. wire \macro_inst|u_uart[0]|u_regs|Selector12~4_combout ;
  1083. wire \macro_inst|u_uart[0]|u_regs|Selector12~5_combout ;
  1084. wire \macro_inst|u_uart[0]|u_regs|Selector12~6_combout ;
  1085. wire \macro_inst|u_uart[0]|u_regs|Selector12~7_combout ;
  1086. wire \macro_inst|u_uart[0]|u_regs|Selector12~8_combout ;
  1087. wire \macro_inst|u_uart[0]|u_regs|Selector12~9_combout ;
  1088. wire \macro_inst|u_uart[0]|u_regs|Selector1~0_combout ;
  1089. wire \macro_inst|u_uart[0]|u_regs|Selector1~1_combout ;
  1090. wire \macro_inst|u_uart[0]|u_regs|Selector1~2_combout ;
  1091. wire \macro_inst|u_uart[0]|u_regs|Selector1~3_combout ;
  1092. wire \macro_inst|u_uart[0]|u_regs|Selector1~4_combout ;
  1093. wire \macro_inst|u_uart[0]|u_regs|Selector2~0_combout ;
  1094. wire \macro_inst|u_uart[0]|u_regs|Selector2~1_combout ;
  1095. wire \macro_inst|u_uart[0]|u_regs|Selector2~2_combout ;
  1096. wire \macro_inst|u_uart[0]|u_regs|Selector2~3_combout ;
  1097. wire \macro_inst|u_uart[0]|u_regs|Selector2~4_combout ;
  1098. wire \macro_inst|u_uart[0]|u_regs|Selector3~0_combout ;
  1099. wire \macro_inst|u_uart[0]|u_regs|Selector3~1_combout ;
  1100. wire \macro_inst|u_uart[0]|u_regs|Selector3~2_combout ;
  1101. wire \macro_inst|u_uart[0]|u_regs|Selector3~3_combout ;
  1102. wire \macro_inst|u_uart[0]|u_regs|Selector3~4_combout ;
  1103. wire \macro_inst|u_uart[0]|u_regs|Selector4~0_combout ;
  1104. wire \macro_inst|u_uart[0]|u_regs|Selector4~1_combout ;
  1105. wire \macro_inst|u_uart[0]|u_regs|Selector4~2_combout ;
  1106. wire \macro_inst|u_uart[0]|u_regs|Selector4~3_combout ;
  1107. wire \macro_inst|u_uart[0]|u_regs|Selector4~4_combout ;
  1108. wire \macro_inst|u_uart[0]|u_regs|Selector5~10_combout ;
  1109. wire \macro_inst|u_uart[0]|u_regs|Selector5~11_combout ;
  1110. wire \macro_inst|u_uart[0]|u_regs|Selector5~12_combout ;
  1111. wire \macro_inst|u_uart[0]|u_regs|Selector5~4_combout ;
  1112. wire \macro_inst|u_uart[0]|u_regs|Selector5~5_combout ;
  1113. wire \macro_inst|u_uart[0]|u_regs|Selector5~6_combout ;
  1114. wire \macro_inst|u_uart[0]|u_regs|Selector5~7_combout ;
  1115. wire \macro_inst|u_uart[0]|u_regs|Selector5~8_combout ;
  1116. wire \macro_inst|u_uart[0]|u_regs|Selector5~9_combout ;
  1117. wire \macro_inst|u_uart[0]|u_regs|Selector6~0_combout ;
  1118. wire \macro_inst|u_uart[0]|u_regs|Selector6~1_combout ;
  1119. wire \macro_inst|u_uart[0]|u_regs|Selector6~2_combout ;
  1120. wire \macro_inst|u_uart[0]|u_regs|Selector6~3_combout ;
  1121. wire \macro_inst|u_uart[0]|u_regs|Selector7~10_combout ;
  1122. wire \macro_inst|u_uart[0]|u_regs|Selector7~11_combout ;
  1123. wire \macro_inst|u_uart[0]|u_regs|Selector7~12_combout ;
  1124. wire \macro_inst|u_uart[0]|u_regs|Selector7~13_combout ;
  1125. wire \macro_inst|u_uart[0]|u_regs|Selector7~14_combout ;
  1126. wire \macro_inst|u_uart[0]|u_regs|Selector7~15_combout ;
  1127. wire \macro_inst|u_uart[0]|u_regs|Selector7~16_combout ;
  1128. wire \macro_inst|u_uart[0]|u_regs|Selector7~17_combout ;
  1129. wire \macro_inst|u_uart[0]|u_regs|Selector7~18_combout ;
  1130. wire \macro_inst|u_uart[0]|u_regs|Selector7~4_combout ;
  1131. wire \macro_inst|u_uart[0]|u_regs|Selector7~5_combout ;
  1132. wire \macro_inst|u_uart[0]|u_regs|Selector7~6_combout ;
  1133. wire \macro_inst|u_uart[0]|u_regs|Selector7~7_combout ;
  1134. wire \macro_inst|u_uart[0]|u_regs|Selector7~8_combout ;
  1135. wire \macro_inst|u_uart[0]|u_regs|Selector7~9_combout ;
  1136. wire \macro_inst|u_uart[0]|u_regs|Selector8~10_combout ;
  1137. wire \macro_inst|u_uart[0]|u_regs|Selector8~11_combout ;
  1138. wire \macro_inst|u_uart[0]|u_regs|Selector8~12_combout ;
  1139. wire \macro_inst|u_uart[0]|u_regs|Selector8~2_combout ;
  1140. wire \macro_inst|u_uart[0]|u_regs|Selector8~3_combout ;
  1141. wire \macro_inst|u_uart[0]|u_regs|Selector8~4_combout ;
  1142. wire \macro_inst|u_uart[0]|u_regs|Selector8~5_combout ;
  1143. wire \macro_inst|u_uart[0]|u_regs|Selector8~6_combout ;
  1144. wire \macro_inst|u_uart[0]|u_regs|Selector8~7_combout ;
  1145. wire \macro_inst|u_uart[0]|u_regs|Selector8~8_combout ;
  1146. wire \macro_inst|u_uart[0]|u_regs|Selector8~9_combout ;
  1147. wire \macro_inst|u_uart[0]|u_regs|Selector9~10_combout ;
  1148. wire \macro_inst|u_uart[0]|u_regs|Selector9~2_combout ;
  1149. wire \macro_inst|u_uart[0]|u_regs|Selector9~3_combout ;
  1150. wire \macro_inst|u_uart[0]|u_regs|Selector9~4_combout ;
  1151. wire \macro_inst|u_uart[0]|u_regs|Selector9~5_combout ;
  1152. wire \macro_inst|u_uart[0]|u_regs|Selector9~6_combout ;
  1153. wire \macro_inst|u_uart[0]|u_regs|Selector9~7_combout ;
  1154. wire \macro_inst|u_uart[0]|u_regs|Selector9~8_combout ;
  1155. wire \macro_inst|u_uart[0]|u_regs|Selector9~9_combout ;
  1156. wire \macro_inst|u_uart[0]|u_regs|always1~0_combout ;
  1157. wire \macro_inst|u_uart[0]|u_regs|always2~0_combout ;
  1158. wire \macro_inst|u_uart[0]|u_regs|always5~0_combout ;
  1159. wire \macro_inst|u_uart[0]|u_regs|always5~1_combout ;
  1160. wire \macro_inst|u_uart[0]|u_regs|always6~0_combout ;
  1161. wire \macro_inst|u_uart[0]|u_regs|always7~0_combout ;
  1162. wire [31:0] \macro_inst|u_uart[0]|u_regs|apb_prdata ;
  1163. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [0];
  1164. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0_combout ;
  1165. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ;
  1166. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ;
  1167. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ;
  1168. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ;
  1169. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ;
  1170. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6_combout ;
  1171. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~7_combout ;
  1172. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8_combout ;
  1173. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [10];
  1174. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [11];
  1175. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [12];
  1176. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [13];
  1177. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [14];
  1178. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [15];
  1179. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [16];
  1180. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [17];
  1181. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [18];
  1182. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [19];
  1183. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [1];
  1184. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~10_combout ;
  1185. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11_combout ;
  1186. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~12_combout ;
  1187. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ;
  1188. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ;
  1189. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15_combout ;
  1190. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9_combout ;
  1191. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [20];
  1192. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [21];
  1193. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [22];
  1194. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [23];
  1195. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [24];
  1196. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [25];
  1197. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [26];
  1198. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [27];
  1199. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [28];
  1200. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [29];
  1201. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [2];
  1202. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [30];
  1203. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [31];
  1204. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [3];
  1205. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [4];
  1206. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ;
  1207. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ;
  1208. wire \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ;
  1209. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [5];
  1210. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [6];
  1211. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [7];
  1212. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [8];
  1213. //wire \macro_inst|u_uart[0]|u_regs|apb_prdata [9];
  1214. wire \macro_inst|u_uart[0]|u_regs|apb_prdata~19_combout ;
  1215. wire \macro_inst|u_uart[0]|u_regs|apb_prdata~20_combout ;
  1216. wire \macro_inst|u_uart[0]|u_regs|apb_prdata~21_combout ;
  1217. wire \macro_inst|u_uart[0]|u_regs|apb_pready~q ;
  1218. wire \macro_inst|u_uart[0]|u_regs|apb_read0~combout ;
  1219. wire \macro_inst|u_uart[0]|u_regs|apb_read1~combout ;
  1220. wire \macro_inst|u_uart[0]|u_regs|apb_write~0_combout ;
  1221. wire [5:0] \macro_inst|u_uart[0]|u_regs|break_error_ie ;
  1222. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [0];
  1223. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [1];
  1224. wire \macro_inst|u_uart[0]|u_regs|break_error_ie[1]__feeder__LutOut ;
  1225. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [2];
  1226. wire \macro_inst|u_uart[0]|u_regs|break_error_ie[2]__feeder__LutOut ;
  1227. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [3];
  1228. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [4];
  1229. //wire \macro_inst|u_uart[0]|u_regs|break_error_ie [5];
  1230. wire \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ;
  1231. wire \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ;
  1232. wire \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ;
  1233. wire \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ;
  1234. wire \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ;
  1235. wire \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ;
  1236. wire \macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ;
  1237. wire [5:0] \macro_inst|u_uart[0]|u_regs|fbrd ;
  1238. //wire \macro_inst|u_uart[0]|u_regs|fbrd [0];
  1239. //wire \macro_inst|u_uart[0]|u_regs|fbrd [1];
  1240. wire \macro_inst|u_uart[0]|u_regs|fbrd[1]__feeder__LutOut ;
  1241. //wire \macro_inst|u_uart[0]|u_regs|fbrd [2];
  1242. wire \macro_inst|u_uart[0]|u_regs|fbrd[2]__feeder__LutOut ;
  1243. //wire \macro_inst|u_uart[0]|u_regs|fbrd [3];
  1244. //wire \macro_inst|u_uart[0]|u_regs|fbrd [4];
  1245. //wire \macro_inst|u_uart[0]|u_regs|fbrd [5];
  1246. wire [5:0] \macro_inst|u_uart[0]|u_regs|framing_error_ie ;
  1247. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [0];
  1248. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [1];
  1249. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [2];
  1250. wire \macro_inst|u_uart[0]|u_regs|framing_error_ie[2]__feeder__LutOut ;
  1251. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [3];
  1252. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [4];
  1253. //wire \macro_inst|u_uart[0]|u_regs|framing_error_ie [5];
  1254. wire [15:0] \macro_inst|u_uart[0]|u_regs|ibrd ;
  1255. //wire \macro_inst|u_uart[0]|u_regs|ibrd [0];
  1256. wire \macro_inst|u_uart[0]|u_regs|ibrd[0]~_wirecell_combout ;
  1257. //wire \macro_inst|u_uart[0]|u_regs|ibrd [10];
  1258. //wire \macro_inst|u_uart[0]|u_regs|ibrd [11];
  1259. //wire \macro_inst|u_uart[0]|u_regs|ibrd [12];
  1260. wire \macro_inst|u_uart[0]|u_regs|ibrd[12]__feeder__LutOut ;
  1261. //wire \macro_inst|u_uart[0]|u_regs|ibrd [13];
  1262. //wire \macro_inst|u_uart[0]|u_regs|ibrd [14];
  1263. //wire \macro_inst|u_uart[0]|u_regs|ibrd [15];
  1264. //wire \macro_inst|u_uart[0]|u_regs|ibrd [1];
  1265. //wire \macro_inst|u_uart[0]|u_regs|ibrd [2];
  1266. //wire \macro_inst|u_uart[0]|u_regs|ibrd [3];
  1267. //wire \macro_inst|u_uart[0]|u_regs|ibrd [4];
  1268. //wire \macro_inst|u_uart[0]|u_regs|ibrd [5];
  1269. wire \macro_inst|u_uart[0]|u_regs|ibrd[5]__feeder__LutOut ;
  1270. //wire \macro_inst|u_uart[0]|u_regs|ibrd [6];
  1271. //wire \macro_inst|u_uart[0]|u_regs|ibrd [7];
  1272. wire \macro_inst|u_uart[0]|u_regs|ibrd[7]__feeder__LutOut ;
  1273. //wire \macro_inst|u_uart[0]|u_regs|ibrd [8];
  1274. //wire \macro_inst|u_uart[0]|u_regs|ibrd [9];
  1275. wire \macro_inst|u_uart[0]|u_regs|ibrd[9]__feeder__LutOut ;
  1276. wire [5:0] \macro_inst|u_uart[0]|u_regs|interrupts ;
  1277. //wire \macro_inst|u_uart[0]|u_regs|interrupts [0];
  1278. //wire \macro_inst|u_uart[0]|u_regs|interrupts [1];
  1279. //wire \macro_inst|u_uart[0]|u_regs|interrupts [2];
  1280. //wire \macro_inst|u_uart[0]|u_regs|interrupts [3];
  1281. //wire \macro_inst|u_uart[0]|u_regs|interrupts [4];
  1282. //wire \macro_inst|u_uart[0]|u_regs|interrupts [5];
  1283. wire \macro_inst|u_uart[0]|u_regs|interrupts~0_combout ;
  1284. wire \macro_inst|u_uart[0]|u_regs|interrupts~10_combout ;
  1285. wire \macro_inst|u_uart[0]|u_regs|interrupts~11_combout ;
  1286. wire \macro_inst|u_uart[0]|u_regs|interrupts~12_combout ;
  1287. wire \macro_inst|u_uart[0]|u_regs|interrupts~13_combout ;
  1288. wire \macro_inst|u_uart[0]|u_regs|interrupts~14_combout ;
  1289. wire \macro_inst|u_uart[0]|u_regs|interrupts~15_combout ;
  1290. wire \macro_inst|u_uart[0]|u_regs|interrupts~16_combout ;
  1291. wire \macro_inst|u_uart[0]|u_regs|interrupts~17_combout ;
  1292. wire \macro_inst|u_uart[0]|u_regs|interrupts~18_combout ;
  1293. wire \macro_inst|u_uart[0]|u_regs|interrupts~19_combout ;
  1294. wire \macro_inst|u_uart[0]|u_regs|interrupts~1_combout ;
  1295. wire \macro_inst|u_uart[0]|u_regs|interrupts~20_combout ;
  1296. wire \macro_inst|u_uart[0]|u_regs|interrupts~21_combout ;
  1297. wire \macro_inst|u_uart[0]|u_regs|interrupts~22_combout ;
  1298. wire \macro_inst|u_uart[0]|u_regs|interrupts~23_combout ;
  1299. wire \macro_inst|u_uart[0]|u_regs|interrupts~24_combout ;
  1300. wire \macro_inst|u_uart[0]|u_regs|interrupts~25_combout ;
  1301. wire \macro_inst|u_uart[0]|u_regs|interrupts~26_combout ;
  1302. wire \macro_inst|u_uart[0]|u_regs|interrupts~27_combout ;
  1303. wire \macro_inst|u_uart[0]|u_regs|interrupts~28_combout ;
  1304. wire \macro_inst|u_uart[0]|u_regs|interrupts~29_combout ;
  1305. wire \macro_inst|u_uart[0]|u_regs|interrupts~2_combout ;
  1306. wire \macro_inst|u_uart[0]|u_regs|interrupts~3_combout ;
  1307. wire \macro_inst|u_uart[0]|u_regs|interrupts~4_combout ;
  1308. wire \macro_inst|u_uart[0]|u_regs|interrupts~5_combout ;
  1309. wire \macro_inst|u_uart[0]|u_regs|interrupts~6_combout ;
  1310. wire \macro_inst|u_uart[0]|u_regs|interrupts~7_combout ;
  1311. wire \macro_inst|u_uart[0]|u_regs|interrupts~8_combout ;
  1312. wire \macro_inst|u_uart[0]|u_regs|interrupts~9_combout ;
  1313. wire \macro_inst|u_uart[0]|u_regs|lcr_eps~q ;
  1314. wire \macro_inst|u_uart[0]|u_regs|lcr_pen~q ;
  1315. wire \macro_inst|u_uart[0]|u_regs|lcr_sps~q ;
  1316. wire \macro_inst|u_uart[0]|u_regs|lcr_stp2~q ;
  1317. wire [5:0] \macro_inst|u_uart[0]|u_regs|overrun_error_ie ;
  1318. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [0];
  1319. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [1];
  1320. wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1]__feeder__LutOut ;
  1321. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [2];
  1322. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [3];
  1323. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [4];
  1324. //wire \macro_inst|u_uart[0]|u_regs|overrun_error_ie [5];
  1325. wire [5:0] \macro_inst|u_uart[0]|u_regs|parity_error_ie ;
  1326. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [0];
  1327. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [1];
  1328. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [2];
  1329. wire \macro_inst|u_uart[0]|u_regs|parity_error_ie[2]__feeder__LutOut ;
  1330. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [3];
  1331. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [4];
  1332. //wire \macro_inst|u_uart[0]|u_regs|parity_error_ie [5];
  1333. wire [5:0] \macro_inst|u_uart[0]|u_regs|rx_dma_en ;
  1334. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [0];
  1335. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout ;
  1336. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [1];
  1337. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout ;
  1338. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [2];
  1339. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout ;
  1340. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [3];
  1341. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout ;
  1342. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [4];
  1343. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout ;
  1344. //wire \macro_inst|u_uart[0]|u_regs|rx_dma_en [5];
  1345. wire \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout ;
  1346. wire [5:0] \macro_inst|u_uart[0]|u_regs|rx_idle_ie ;
  1347. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [0];
  1348. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [1];
  1349. wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1]__feeder__LutOut ;
  1350. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [2];
  1351. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [3];
  1352. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [4];
  1353. wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4]__feeder__LutOut ;
  1354. //wire \macro_inst|u_uart[0]|u_regs|rx_idle_ie [5];
  1355. wire [5:0] \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie ;
  1356. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [0];
  1357. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ;
  1358. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout ;
  1359. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [1];
  1360. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ;
  1361. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ;
  1362. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [2];
  1363. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]__feeder__LutOut ;
  1364. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ;
  1365. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout ;
  1366. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [3];
  1367. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ;
  1368. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout ;
  1369. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [4];
  1370. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]__feeder__LutOut ;
  1371. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout ;
  1372. //wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [5];
  1373. wire \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout ;
  1374. wire [5:0] \macro_inst|u_uart[0]|u_regs|rx_read ;
  1375. //wire \macro_inst|u_uart[0]|u_regs|rx_read [0];
  1376. //wire \macro_inst|u_uart[0]|u_regs|rx_read [1];
  1377. //wire \macro_inst|u_uart[0]|u_regs|rx_read [2];
  1378. //wire \macro_inst|u_uart[0]|u_regs|rx_read [3];
  1379. //wire \macro_inst|u_uart[0]|u_regs|rx_read [4];
  1380. //wire \macro_inst|u_uart[0]|u_regs|rx_read [5];
  1381. wire \macro_inst|u_uart[0]|u_regs|rx_read~0_combout ;
  1382. wire \macro_inst|u_uart[0]|u_regs|rx_read~1_combout ;
  1383. wire \macro_inst|u_uart[0]|u_regs|rx_read~2_combout ;
  1384. wire \macro_inst|u_uart[0]|u_regs|rx_read~3_combout ;
  1385. wire \macro_inst|u_uart[0]|u_regs|rx_read~4_combout ;
  1386. wire \macro_inst|u_uart[0]|u_regs|rx_read~5_combout ;
  1387. wire [7:0] \macro_inst|u_uart[0]|u_regs|rx_reg ;
  1388. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [0];
  1389. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [1];
  1390. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [2];
  1391. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [3];
  1392. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [4];
  1393. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [5];
  1394. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [6];
  1395. //wire \macro_inst|u_uart[0]|u_regs|rx_reg [7];
  1396. wire [4:0] \macro_inst|u_uart[0]|u_regs|status_reg ;
  1397. //wire \macro_inst|u_uart[0]|u_regs|status_reg [0];
  1398. wire \macro_inst|u_uart[0]|u_regs|status_reg[0]~0_combout ;
  1399. //wire \macro_inst|u_uart[0]|u_regs|status_reg [1];
  1400. //wire \macro_inst|u_uart[0]|u_regs|status_reg [2];
  1401. wire \macro_inst|u_uart[0]|u_regs|status_reg[2]~1_combout ;
  1402. wire \macro_inst|u_uart[0]|u_regs|status_reg[2]~feeder_combout ;
  1403. //wire \macro_inst|u_uart[0]|u_regs|status_reg [3];
  1404. //wire \macro_inst|u_uart[0]|u_regs|status_reg [4];
  1405. wire [5:0] \macro_inst|u_uart[0]|u_regs|tx_complete_ie ;
  1406. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [0];
  1407. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [1];
  1408. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [2];
  1409. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [3];
  1410. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [4];
  1411. //wire \macro_inst|u_uart[0]|u_regs|tx_complete_ie [5];
  1412. wire [5:0] \macro_inst|u_uart[0]|u_regs|tx_dma_en ;
  1413. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [0];
  1414. wire \macro_inst|u_uart[0]|u_regs|tx_dma_en[0]__feeder__LutOut ;
  1415. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [1];
  1416. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [2];
  1417. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [3];
  1418. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [4];
  1419. //wire \macro_inst|u_uart[0]|u_regs|tx_dma_en [5];
  1420. wire [5:0] \macro_inst|u_uart[0]|u_regs|tx_not_full_ie ;
  1421. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [0];
  1422. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [1];
  1423. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [2];
  1424. wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2]__feeder__LutOut ;
  1425. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [3];
  1426. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [4];
  1427. //wire \macro_inst|u_uart[0]|u_regs|tx_not_full_ie [5];
  1428. wire [5:0] \macro_inst|u_uart[0]|u_regs|tx_write ;
  1429. //wire \macro_inst|u_uart[0]|u_regs|tx_write [0];
  1430. //wire \macro_inst|u_uart[0]|u_regs|tx_write [1];
  1431. //wire \macro_inst|u_uart[0]|u_regs|tx_write [2];
  1432. //wire \macro_inst|u_uart[0]|u_regs|tx_write [3];
  1433. //wire \macro_inst|u_uart[0]|u_regs|tx_write [4];
  1434. //wire \macro_inst|u_uart[0]|u_regs|tx_write [5];
  1435. wire \macro_inst|u_uart[0]|u_regs|tx_write~0_combout ;
  1436. wire \macro_inst|u_uart[0]|u_regs|tx_write~1_combout ;
  1437. wire \macro_inst|u_uart[0]|u_regs|tx_write~2_combout ;
  1438. wire \macro_inst|u_uart[0]|u_regs|tx_write~3_combout ;
  1439. wire \macro_inst|u_uart[0]|u_regs|tx_write~4_combout ;
  1440. wire \macro_inst|u_uart[0]|u_regs|tx_write~5_combout ;
  1441. wire \macro_inst|u_uart[0]|u_regs|uart_en~0_combout ;
  1442. wire \macro_inst|u_uart[0]|u_regs|uart_en~q ;
  1443. wire \macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ;
  1444. wire \macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ;
  1445. wire \macro_inst|u_uart[0]|u_rx[0]|Add4~0_combout ;
  1446. wire \macro_inst|u_uart[0]|u_rx[0]|Add4~1_combout ;
  1447. wire \macro_inst|u_uart[0]|u_rx[0]|Add4~2_combout ;
  1448. wire \macro_inst|u_uart[0]|u_rx[0]|Selector0~0_combout ;
  1449. wire \macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ;
  1450. wire \macro_inst|u_uart[0]|u_rx[0]|Selector1~2_combout ;
  1451. wire \macro_inst|u_uart[0]|u_rx[0]|Selector1~3_combout ;
  1452. wire \macro_inst|u_uart[0]|u_rx[0]|Selector1~4_combout ;
  1453. wire \macro_inst|u_uart[0]|u_rx[0]|Selector2~0_combout ;
  1454. wire \macro_inst|u_uart[0]|u_rx[0]|Selector2~1_combout ;
  1455. wire \macro_inst|u_uart[0]|u_rx[0]|Selector2~2_combout ;
  1456. wire \macro_inst|u_uart[0]|u_rx[0]|Selector3~0_combout ;
  1457. wire \macro_inst|u_uart[0]|u_rx[0]|Selector4~0_combout ;
  1458. wire \macro_inst|u_uart[0]|u_rx[0]|Selector4~1_combout ;
  1459. wire \macro_inst|u_uart[0]|u_rx[0]|Selector4~2_combout ;
  1460. wire \macro_inst|u_uart[0]|u_rx[0]|Selector4~3_combout ;
  1461. wire \macro_inst|u_uart[0]|u_rx[0]|Selector4~4_combout ;
  1462. wire \macro_inst|u_uart[0]|u_rx[0]|always11~0_combout ;
  1463. wire \macro_inst|u_uart[0]|u_rx[0]|always11~1_combout ;
  1464. wire \macro_inst|u_uart[0]|u_rx[0]|always11~2_combout ;
  1465. wire \macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ;
  1466. wire \macro_inst|u_uart[0]|u_rx[0]|always2~1_combout ;
  1467. wire \macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ;
  1468. wire \macro_inst|u_uart[0]|u_rx[0]|always3~2_combout ;
  1469. wire \macro_inst|u_uart[0]|u_rx[0]|always4~2_combout ;
  1470. wire \macro_inst|u_uart[0]|u_rx[0]|always6~1_combout ;
  1471. wire \macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ;
  1472. wire \macro_inst|u_uart[0]|u_rx[0]|always8~0_combout ;
  1473. wire \macro_inst|u_uart[0]|u_rx[0]|break_error~0_combout ;
  1474. wire \macro_inst|u_uart[0]|u_rx[0]|break_error~q ;
  1475. wire \macro_inst|u_uart[0]|u_rx[0]|framing_error~0_combout ;
  1476. wire \macro_inst|u_uart[0]|u_rx[0]|framing_error~q ;
  1477. wire \macro_inst|u_uart[0]|u_rx[0]|overrun_error~0_combout ;
  1478. wire \macro_inst|u_uart[0]|u_rx[0]|overrun_error~q ;
  1479. wire \macro_inst|u_uart[0]|u_rx[0]|parity_error~0_combout ;
  1480. wire \macro_inst|u_uart[0]|u_rx[0]|parity_error~1_combout ;
  1481. wire \macro_inst|u_uart[0]|u_rx[0]|parity_error~q ;
  1482. wire [3:0] \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt ;
  1483. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0];
  1484. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0]~4_combout ;
  1485. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0]~5 ;
  1486. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1];
  1487. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1]~6_combout ;
  1488. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1]~7 ;
  1489. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2];
  1490. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2]~8_combout ;
  1491. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2]~9 ;
  1492. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3];
  1493. wire \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3]~10_combout ;
  1494. wire \macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ;
  1495. wire [3:0] \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt ;
  1496. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0];
  1497. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1];
  1498. wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout ;
  1499. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2];
  1500. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [3];
  1501. wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~1_combout ;
  1502. wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~2_combout ;
  1503. wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~4_combout ;
  1504. wire \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~5_combout ;
  1505. wire \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~0_combout ;
  1506. wire \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~q ;
  1507. wire [0:0] \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter ;
  1508. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0];
  1509. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter~0_combout ;
  1510. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0]~q ;
  1511. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1]~q ;
  1512. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2]~q ;
  1513. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3]~q ;
  1514. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4]~q ;
  1515. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5]~q ;
  1516. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6]~q ;
  1517. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7]~q ;
  1518. wire \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout ;
  1519. wire \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~0_combout ;
  1520. wire \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~q ;
  1521. wire \macro_inst|u_uart[0]|u_rx[0]|rx_idle~0_combout ;
  1522. wire \macro_inst|u_uart[0]|u_rx[0]|rx_idle~q ;
  1523. wire [4:0] \macro_inst|u_uart[0]|u_rx[0]|rx_in ;
  1524. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_in [0];
  1525. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_in [1];
  1526. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_in [2];
  1527. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_in [3];
  1528. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_in [4];
  1529. wire \macro_inst|u_uart[0]|u_rx[0]|rx_in[4]~0_combout ;
  1530. wire \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0_combout ;
  1531. wire \macro_inst|u_uart[0]|u_rx[0]|rx_parity~1_combout ;
  1532. wire \macro_inst|u_uart[0]|u_rx[0]|rx_parity~q ;
  1533. wire \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0_combout ;
  1534. wire [7:0] \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg ;
  1535. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [0];
  1536. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1];
  1537. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2];
  1538. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [3];
  1539. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4];
  1540. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5];
  1541. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [6];
  1542. //wire \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7];
  1543. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ;
  1544. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ;
  1545. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~0_combout ;
  1546. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~1_combout ;
  1547. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ;
  1548. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ;
  1549. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0_combout ;
  1550. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~1_combout ;
  1551. wire \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ;
  1552. wire \macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ;
  1553. wire \macro_inst|u_uart[0]|u_rx[1]|Add4~0_combout ;
  1554. wire \macro_inst|u_uart[0]|u_rx[1]|Add4~1_combout ;
  1555. wire \macro_inst|u_uart[0]|u_rx[1]|Add4~2_combout ;
  1556. wire \macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ;
  1557. wire \macro_inst|u_uart[0]|u_rx[1]|Selector0~2_combout ;
  1558. wire \macro_inst|u_uart[0]|u_rx[1]|Selector0~3_combout ;
  1559. wire \macro_inst|u_uart[0]|u_rx[1]|Selector0~4_combout ;
  1560. wire \macro_inst|u_uart[0]|u_rx[1]|Selector1~0_combout ;
  1561. wire \macro_inst|u_uart[0]|u_rx[1]|Selector2~0_combout ;
  1562. wire \macro_inst|u_uart[0]|u_rx[1]|Selector2~1_combout ;
  1563. wire \macro_inst|u_uart[0]|u_rx[1]|Selector2~2_combout ;
  1564. wire \macro_inst|u_uart[0]|u_rx[1]|Selector3~0_combout ;
  1565. wire \macro_inst|u_uart[0]|u_rx[1]|Selector4~0_combout ;
  1566. wire \macro_inst|u_uart[0]|u_rx[1]|Selector4~1_combout ;
  1567. wire \macro_inst|u_uart[0]|u_rx[1]|Selector4~2_combout ;
  1568. wire \macro_inst|u_uart[0]|u_rx[1]|Selector4~3_combout ;
  1569. wire \macro_inst|u_uart[0]|u_rx[1]|Selector4~4_combout ;
  1570. wire \macro_inst|u_uart[0]|u_rx[1]|always11~0_combout ;
  1571. wire \macro_inst|u_uart[0]|u_rx[1]|always11~1_combout ;
  1572. wire \macro_inst|u_uart[0]|u_rx[1]|always11~2_combout ;
  1573. wire \macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ;
  1574. wire \macro_inst|u_uart[0]|u_rx[1]|always2~1_combout ;
  1575. wire \macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ;
  1576. wire \macro_inst|u_uart[0]|u_rx[1]|always3~2_combout ;
  1577. wire \macro_inst|u_uart[0]|u_rx[1]|always4~2_combout ;
  1578. wire \macro_inst|u_uart[0]|u_rx[1]|always6~1_combout ;
  1579. wire \macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ;
  1580. wire \macro_inst|u_uart[0]|u_rx[1]|always8~0_combout ;
  1581. wire \macro_inst|u_uart[0]|u_rx[1]|break_error~0_combout ;
  1582. wire \macro_inst|u_uart[0]|u_rx[1]|break_error~q ;
  1583. wire \macro_inst|u_uart[0]|u_rx[1]|framing_error~0_combout ;
  1584. wire \macro_inst|u_uart[0]|u_rx[1]|framing_error~q ;
  1585. wire \macro_inst|u_uart[0]|u_rx[1]|overrun_error~0_combout ;
  1586. wire \macro_inst|u_uart[0]|u_rx[1]|overrun_error~q ;
  1587. wire \macro_inst|u_uart[0]|u_rx[1]|parity_error~0_combout ;
  1588. wire \macro_inst|u_uart[0]|u_rx[1]|parity_error~1_combout ;
  1589. wire \macro_inst|u_uart[0]|u_rx[1]|parity_error~q ;
  1590. wire [3:0] \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt ;
  1591. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0];
  1592. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0]~4_combout ;
  1593. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0]~5 ;
  1594. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1];
  1595. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1]~6_combout ;
  1596. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1]~7 ;
  1597. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2];
  1598. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2]~8_combout ;
  1599. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2]~9 ;
  1600. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3];
  1601. wire \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3]~10_combout ;
  1602. wire \macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ;
  1603. wire [3:0] \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt ;
  1604. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0];
  1605. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1];
  1606. wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout ;
  1607. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2];
  1608. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [3];
  1609. wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~1_combout ;
  1610. wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~2_combout ;
  1611. wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~4_combout ;
  1612. wire \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~5_combout ;
  1613. wire \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~0_combout ;
  1614. wire \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~q ;
  1615. wire [0:0] \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter ;
  1616. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0];
  1617. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter~0_combout ;
  1618. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~feeder_combout ;
  1619. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~q ;
  1620. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1]~q ;
  1621. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~feeder_combout ;
  1622. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~q ;
  1623. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~feeder_combout ;
  1624. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~q ;
  1625. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4]~q ;
  1626. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5]~q ;
  1627. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~feeder_combout ;
  1628. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~q ;
  1629. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7]~q ;
  1630. wire \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout ;
  1631. wire \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~0_combout ;
  1632. wire \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~q ;
  1633. wire \macro_inst|u_uart[0]|u_rx[1]|rx_idle~0_combout ;
  1634. wire \macro_inst|u_uart[0]|u_rx[1]|rx_idle~q ;
  1635. wire [4:0] \macro_inst|u_uart[0]|u_rx[1]|rx_in ;
  1636. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_in [0];
  1637. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_in [1];
  1638. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_in [2];
  1639. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_in [3];
  1640. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_in [4];
  1641. wire \macro_inst|u_uart[0]|u_rx[1]|rx_in[4]~0_combout ;
  1642. wire \macro_inst|u_uart[0]|u_rx[1]|rx_parity~0_combout ;
  1643. wire \macro_inst|u_uart[0]|u_rx[1]|rx_parity~1_combout ;
  1644. wire \macro_inst|u_uart[0]|u_rx[1]|rx_parity~q ;
  1645. wire \macro_inst|u_uart[0]|u_rx[1]|rx_sample~0_combout ;
  1646. wire [7:0] \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg ;
  1647. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [0];
  1648. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1];
  1649. wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1]~feeder_combout ;
  1650. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2];
  1651. wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2]~feeder_combout ;
  1652. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3];
  1653. wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3]~feeder_combout ;
  1654. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [4];
  1655. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5];
  1656. wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5]~feeder_combout ;
  1657. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6];
  1658. wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6]~feeder_combout ;
  1659. //wire \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7];
  1660. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ;
  1661. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ;
  1662. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~0_combout ;
  1663. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~1_combout ;
  1664. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ;
  1665. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ;
  1666. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0_combout ;
  1667. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~1_combout ;
  1668. wire \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ;
  1669. wire \macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ;
  1670. wire \macro_inst|u_uart[0]|u_rx[2]|Add4~0_combout ;
  1671. wire \macro_inst|u_uart[0]|u_rx[2]|Add4~1_combout ;
  1672. wire \macro_inst|u_uart[0]|u_rx[2]|Add4~2_combout ;
  1673. wire \macro_inst|u_uart[0]|u_rx[2]|Selector0~0_combout ;
  1674. wire \macro_inst|u_uart[0]|u_rx[2]|Selector1~0_combout ;
  1675. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ;
  1676. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~2_combout ;
  1677. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~3_combout ;
  1678. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~4_combout ;
  1679. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~5_combout ;
  1680. wire \macro_inst|u_uart[0]|u_rx[2]|Selector2~6_combout ;
  1681. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~0_combout ;
  1682. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~1_combout ;
  1683. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~2_combout ;
  1684. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~3_combout ;
  1685. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~4_combout ;
  1686. wire \macro_inst|u_uart[0]|u_rx[2]|Selector4~5_combout ;
  1687. wire \macro_inst|u_uart[0]|u_rx[2]|always11~0_combout ;
  1688. wire \macro_inst|u_uart[0]|u_rx[2]|always11~1_combout ;
  1689. wire \macro_inst|u_uart[0]|u_rx[2]|always11~2_combout ;
  1690. wire \macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ;
  1691. wire \macro_inst|u_uart[0]|u_rx[2]|always2~1_combout ;
  1692. wire \macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ;
  1693. wire \macro_inst|u_uart[0]|u_rx[2]|always3~2_combout ;
  1694. wire \macro_inst|u_uart[0]|u_rx[2]|always4~2_combout ;
  1695. wire \macro_inst|u_uart[0]|u_rx[2]|always6~1_combout ;
  1696. wire \macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ;
  1697. wire \macro_inst|u_uart[0]|u_rx[2]|always8~0_combout ;
  1698. wire \macro_inst|u_uart[0]|u_rx[2]|break_error~0_combout ;
  1699. wire \macro_inst|u_uart[0]|u_rx[2]|break_error~q ;
  1700. wire \macro_inst|u_uart[0]|u_rx[2]|framing_error~0_combout ;
  1701. wire \macro_inst|u_uart[0]|u_rx[2]|framing_error~q ;
  1702. wire \macro_inst|u_uart[0]|u_rx[2]|overrun_error~0_combout ;
  1703. wire \macro_inst|u_uart[0]|u_rx[2]|overrun_error~q ;
  1704. wire \macro_inst|u_uart[0]|u_rx[2]|parity_error~0_combout ;
  1705. wire \macro_inst|u_uart[0]|u_rx[2]|parity_error~1_combout ;
  1706. wire \macro_inst|u_uart[0]|u_rx[2]|parity_error~q ;
  1707. wire [3:0] \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt ;
  1708. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0];
  1709. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0]~4_combout ;
  1710. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0]~5 ;
  1711. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1];
  1712. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1]~6_combout ;
  1713. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1]~7 ;
  1714. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2];
  1715. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2]~8_combout ;
  1716. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2]~9 ;
  1717. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3];
  1718. wire \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3]~10_combout ;
  1719. wire \macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ;
  1720. wire [3:0] \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt ;
  1721. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0];
  1722. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1];
  1723. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2];
  1724. wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout ;
  1725. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3];
  1726. wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1_combout ;
  1727. wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~2_combout ;
  1728. wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~4_combout ;
  1729. wire \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~5_combout ;
  1730. wire [0:0] \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter ;
  1731. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0];
  1732. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter~0_combout ;
  1733. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~feeder_combout ;
  1734. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~q ;
  1735. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~feeder_combout ;
  1736. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~q ;
  1737. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~feeder_combout ;
  1738. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~q ;
  1739. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~feeder_combout ;
  1740. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~q ;
  1741. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~feeder_combout ;
  1742. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~q ;
  1743. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~feeder_combout ;
  1744. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~q ;
  1745. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~feeder_combout ;
  1746. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~q ;
  1747. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~feeder_combout ;
  1748. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~q ;
  1749. wire \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout ;
  1750. wire \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~0_combout ;
  1751. wire \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~q ;
  1752. wire \macro_inst|u_uart[0]|u_rx[2]|rx_idle~0_combout ;
  1753. wire \macro_inst|u_uart[0]|u_rx[2]|rx_idle~q ;
  1754. wire [4:0] \macro_inst|u_uart[0]|u_rx[2]|rx_in ;
  1755. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_in [0];
  1756. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_in [1];
  1757. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_in [2];
  1758. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_in [3];
  1759. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_in [4];
  1760. wire \macro_inst|u_uart[0]|u_rx[2]|rx_in[4]~0_combout ;
  1761. wire \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0_combout ;
  1762. wire \macro_inst|u_uart[0]|u_rx[2]|rx_parity~1_combout ;
  1763. wire \macro_inst|u_uart[0]|u_rx[2]|rx_parity~q ;
  1764. wire \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0_combout ;
  1765. wire [7:0] \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg ;
  1766. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [0];
  1767. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1];
  1768. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2];
  1769. wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2]~feeder_combout ;
  1770. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3];
  1771. wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3]~feeder_combout ;
  1772. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4];
  1773. wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4]~feeder_combout ;
  1774. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5];
  1775. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6];
  1776. //wire \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7];
  1777. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ;
  1778. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ;
  1779. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0_combout ;
  1780. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~1_combout ;
  1781. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ;
  1782. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ;
  1783. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0_combout ;
  1784. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~1_combout ;
  1785. wire \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ;
  1786. wire \macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ;
  1787. wire \macro_inst|u_uart[0]|u_rx[3]|Add4~0_combout ;
  1788. wire \macro_inst|u_uart[0]|u_rx[3]|Add4~1_combout ;
  1789. wire \macro_inst|u_uart[0]|u_rx[3]|Add4~2_combout ;
  1790. wire \macro_inst|u_uart[0]|u_rx[3]|Selector0~0_combout ;
  1791. wire \macro_inst|u_uart[0]|u_rx[3]|Selector1~0_combout ;
  1792. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ;
  1793. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~2_combout ;
  1794. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~3_combout ;
  1795. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~4_combout ;
  1796. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~5_combout ;
  1797. wire \macro_inst|u_uart[0]|u_rx[3]|Selector2~6_combout ;
  1798. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~0_combout ;
  1799. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~1_combout ;
  1800. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~2_combout ;
  1801. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~3_combout ;
  1802. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~4_combout ;
  1803. wire \macro_inst|u_uart[0]|u_rx[3]|Selector4~5_combout ;
  1804. wire \macro_inst|u_uart[0]|u_rx[3]|always11~0_combout ;
  1805. wire \macro_inst|u_uart[0]|u_rx[3]|always11~1_combout ;
  1806. wire \macro_inst|u_uart[0]|u_rx[3]|always11~2_combout ;
  1807. wire \macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ;
  1808. wire \macro_inst|u_uart[0]|u_rx[3]|always2~1_combout ;
  1809. wire \macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ;
  1810. wire \macro_inst|u_uart[0]|u_rx[3]|always3~2_combout ;
  1811. wire \macro_inst|u_uart[0]|u_rx[3]|always4~2_combout ;
  1812. wire \macro_inst|u_uart[0]|u_rx[3]|always6~1_combout ;
  1813. wire \macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ;
  1814. wire \macro_inst|u_uart[0]|u_rx[3]|always8~0_combout ;
  1815. wire \macro_inst|u_uart[0]|u_rx[3]|break_error~0_combout ;
  1816. wire \macro_inst|u_uart[0]|u_rx[3]|break_error~q ;
  1817. wire \macro_inst|u_uart[0]|u_rx[3]|framing_error~0_combout ;
  1818. wire \macro_inst|u_uart[0]|u_rx[3]|framing_error~q ;
  1819. wire \macro_inst|u_uart[0]|u_rx[3]|overrun_error~0_combout ;
  1820. wire \macro_inst|u_uart[0]|u_rx[3]|overrun_error~q ;
  1821. wire \macro_inst|u_uart[0]|u_rx[3]|parity_error~0_combout ;
  1822. wire \macro_inst|u_uart[0]|u_rx[3]|parity_error~1_combout ;
  1823. wire \macro_inst|u_uart[0]|u_rx[3]|parity_error~q ;
  1824. wire [3:0] \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt ;
  1825. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0];
  1826. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0]~4_combout ;
  1827. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0]~5 ;
  1828. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1];
  1829. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1]~6_combout ;
  1830. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1]~7 ;
  1831. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2];
  1832. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2]~8_combout ;
  1833. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2]~9 ;
  1834. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3];
  1835. wire \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3]~10_combout ;
  1836. wire \macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ;
  1837. wire [3:0] \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt ;
  1838. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0];
  1839. wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout ;
  1840. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1];
  1841. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2];
  1842. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [3];
  1843. wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~1_combout ;
  1844. wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~2_combout ;
  1845. wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~4_combout ;
  1846. wire \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~5_combout ;
  1847. wire [0:0] \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter ;
  1848. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0];
  1849. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter~0_combout ;
  1850. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0]~q ;
  1851. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1]~q ;
  1852. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2]~q ;
  1853. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3]~q ;
  1854. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4]~q ;
  1855. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5]~q ;
  1856. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6]~q ;
  1857. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7]~q ;
  1858. wire \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout ;
  1859. wire \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~0_combout ;
  1860. wire \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~q ;
  1861. wire \macro_inst|u_uart[0]|u_rx[3]|rx_idle~0_combout ;
  1862. wire \macro_inst|u_uart[0]|u_rx[3]|rx_idle~q ;
  1863. wire [4:0] \macro_inst|u_uart[0]|u_rx[3]|rx_in ;
  1864. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_in [0];
  1865. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_in [1];
  1866. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_in [2];
  1867. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_in [3];
  1868. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_in [4];
  1869. wire \macro_inst|u_uart[0]|u_rx[3]|rx_in[4]~0_combout ;
  1870. wire \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0_combout ;
  1871. wire \macro_inst|u_uart[0]|u_rx[3]|rx_parity~1_combout ;
  1872. wire \macro_inst|u_uart[0]|u_rx[3]|rx_parity~q ;
  1873. wire \macro_inst|u_uart[0]|u_rx[3]|rx_sample~0_combout ;
  1874. wire [7:0] \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg ;
  1875. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [0];
  1876. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1];
  1877. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2];
  1878. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3];
  1879. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [4];
  1880. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5];
  1881. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6];
  1882. //wire \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7];
  1883. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ;
  1884. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ;
  1885. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0_combout ;
  1886. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~1_combout ;
  1887. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ;
  1888. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ;
  1889. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0_combout ;
  1890. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~1_combout ;
  1891. wire \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ;
  1892. wire \macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ;
  1893. wire \macro_inst|u_uart[0]|u_rx[4]|Add4~0_combout ;
  1894. wire \macro_inst|u_uart[0]|u_rx[4]|Add4~1_combout ;
  1895. wire \macro_inst|u_uart[0]|u_rx[4]|Add4~2_combout ;
  1896. wire \macro_inst|u_uart[0]|u_rx[4]|Selector0~0_combout ;
  1897. wire \macro_inst|u_uart[0]|u_rx[4]|Selector1~0_combout ;
  1898. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ;
  1899. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~2_combout ;
  1900. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~3_combout ;
  1901. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~4_combout ;
  1902. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~5_combout ;
  1903. wire \macro_inst|u_uart[0]|u_rx[4]|Selector2~6_combout ;
  1904. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~0_combout ;
  1905. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~1_combout ;
  1906. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~2_combout ;
  1907. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~3_combout ;
  1908. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~4_combout ;
  1909. wire \macro_inst|u_uart[0]|u_rx[4]|Selector4~5_combout ;
  1910. wire \macro_inst|u_uart[0]|u_rx[4]|always11~0_combout ;
  1911. wire \macro_inst|u_uart[0]|u_rx[4]|always11~1_combout ;
  1912. wire \macro_inst|u_uart[0]|u_rx[4]|always11~2_combout ;
  1913. wire \macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ;
  1914. wire \macro_inst|u_uart[0]|u_rx[4]|always2~1_combout ;
  1915. wire \macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ;
  1916. wire \macro_inst|u_uart[0]|u_rx[4]|always3~2_combout ;
  1917. wire \macro_inst|u_uart[0]|u_rx[4]|always4~2_combout ;
  1918. wire \macro_inst|u_uart[0]|u_rx[4]|always6~1_combout ;
  1919. wire \macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ;
  1920. wire \macro_inst|u_uart[0]|u_rx[4]|always8~0_combout ;
  1921. wire \macro_inst|u_uart[0]|u_rx[4]|break_error~0_combout ;
  1922. wire \macro_inst|u_uart[0]|u_rx[4]|break_error~q ;
  1923. wire \macro_inst|u_uart[0]|u_rx[4]|framing_error~0_combout ;
  1924. wire \macro_inst|u_uart[0]|u_rx[4]|framing_error~q ;
  1925. wire \macro_inst|u_uart[0]|u_rx[4]|overrun_error~0_combout ;
  1926. wire \macro_inst|u_uart[0]|u_rx[4]|overrun_error~q ;
  1927. wire \macro_inst|u_uart[0]|u_rx[4]|parity_error~0_combout ;
  1928. wire \macro_inst|u_uart[0]|u_rx[4]|parity_error~1_combout ;
  1929. wire \macro_inst|u_uart[0]|u_rx[4]|parity_error~q ;
  1930. wire [3:0] \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt ;
  1931. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0];
  1932. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0]~4_combout ;
  1933. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0]~5 ;
  1934. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1];
  1935. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1]~6_combout ;
  1936. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1]~7 ;
  1937. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2];
  1938. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2]~8_combout ;
  1939. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2]~9 ;
  1940. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3];
  1941. wire \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3]~10_combout ;
  1942. wire \macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ;
  1943. wire [3:0] \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt ;
  1944. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0];
  1945. wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout ;
  1946. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1];
  1947. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2];
  1948. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3];
  1949. wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1_combout ;
  1950. wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~2_combout ;
  1951. wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~4_combout ;
  1952. wire \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~5_combout ;
  1953. wire [0:0] \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter ;
  1954. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0];
  1955. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter~0_combout ;
  1956. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0]~q ;
  1957. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1]~q ;
  1958. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2]~q ;
  1959. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3]~q ;
  1960. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4]~q ;
  1961. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5]~q ;
  1962. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6]~q ;
  1963. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7]~q ;
  1964. wire \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout ;
  1965. wire \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~0_combout ;
  1966. wire \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~q ;
  1967. wire \macro_inst|u_uart[0]|u_rx[4]|rx_idle~0_combout ;
  1968. wire \macro_inst|u_uart[0]|u_rx[4]|rx_idle~q ;
  1969. wire [4:0] \macro_inst|u_uart[0]|u_rx[4]|rx_in ;
  1970. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_in [0];
  1971. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_in [1];
  1972. wire \macro_inst|u_uart[0]|u_rx[4]|rx_in[1]~feeder_combout ;
  1973. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_in [2];
  1974. wire \macro_inst|u_uart[0]|u_rx[4]|rx_in[2]~feeder_combout ;
  1975. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_in [3];
  1976. wire \macro_inst|u_uart[0]|u_rx[4]|rx_in[3]~feeder_combout ;
  1977. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_in [4];
  1978. wire \macro_inst|u_uart[0]|u_rx[4]|rx_in[4]~0_combout ;
  1979. wire \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0_combout ;
  1980. wire \macro_inst|u_uart[0]|u_rx[4]|rx_parity~1_combout ;
  1981. wire \macro_inst|u_uart[0]|u_rx[4]|rx_parity~q ;
  1982. wire \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0_combout ;
  1983. wire [7:0] \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg ;
  1984. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [0];
  1985. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [1];
  1986. wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1]~feeder_combout ;
  1987. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2];
  1988. wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2]~feeder_combout ;
  1989. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3];
  1990. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4];
  1991. wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4]~feeder_combout ;
  1992. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5];
  1993. wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5]~feeder_combout ;
  1994. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6];
  1995. wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6]~feeder_combout ;
  1996. //wire \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7];
  1997. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ;
  1998. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ;
  1999. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0_combout ;
  2000. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~1_combout ;
  2001. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ;
  2002. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ;
  2003. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0_combout ;
  2004. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~1_combout ;
  2005. wire \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ;
  2006. wire \macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ;
  2007. wire \macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ;
  2008. wire \macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ;
  2009. wire \macro_inst|u_uart[0]|u_rx[5]|Add4~0_combout ;
  2010. wire \macro_inst|u_uart[0]|u_rx[5]|Add4~1_combout ;
  2011. wire \macro_inst|u_uart[0]|u_rx[5]|Add4~2_combout ;
  2012. wire \macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ;
  2013. wire \macro_inst|u_uart[0]|u_rx[5]|Selector0~2_combout ;
  2014. wire \macro_inst|u_uart[0]|u_rx[5]|Selector0~3_combout ;
  2015. wire \macro_inst|u_uart[0]|u_rx[5]|Selector0~4_combout ;
  2016. wire \macro_inst|u_uart[0]|u_rx[5]|Selector1~0_combout ;
  2017. wire \macro_inst|u_uart[0]|u_rx[5]|Selector2~0_combout ;
  2018. wire \macro_inst|u_uart[0]|u_rx[5]|Selector2~1_combout ;
  2019. wire \macro_inst|u_uart[0]|u_rx[5]|Selector2~2_combout ;
  2020. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~0_combout ;
  2021. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~1_combout ;
  2022. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~2_combout ;
  2023. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~3_combout ;
  2024. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~4_combout ;
  2025. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~5_combout ;
  2026. wire \macro_inst|u_uart[0]|u_rx[5]|Selector4~6_combout ;
  2027. wire \macro_inst|u_uart[0]|u_rx[5]|always11~0_combout ;
  2028. wire \macro_inst|u_uart[0]|u_rx[5]|always11~1_combout ;
  2029. wire \macro_inst|u_uart[0]|u_rx[5]|always11~2_combout ;
  2030. wire \macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ;
  2031. wire \macro_inst|u_uart[0]|u_rx[5]|always2~1_combout ;
  2032. wire \macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ;
  2033. wire \macro_inst|u_uart[0]|u_rx[5]|always3~2_combout ;
  2034. wire \macro_inst|u_uart[0]|u_rx[5]|always4~2_combout ;
  2035. wire \macro_inst|u_uart[0]|u_rx[5]|always6~1_combout ;
  2036. wire \macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ;
  2037. wire \macro_inst|u_uart[0]|u_rx[5]|always8~0_combout ;
  2038. wire \macro_inst|u_uart[0]|u_rx[5]|break_error~0_combout ;
  2039. wire \macro_inst|u_uart[0]|u_rx[5]|break_error~q ;
  2040. wire \macro_inst|u_uart[0]|u_rx[5]|framing_error~0_combout ;
  2041. wire \macro_inst|u_uart[0]|u_rx[5]|framing_error~q ;
  2042. wire \macro_inst|u_uart[0]|u_rx[5]|overrun_error~0_combout ;
  2043. wire \macro_inst|u_uart[0]|u_rx[5]|overrun_error~q ;
  2044. wire \macro_inst|u_uart[0]|u_rx[5]|parity_error~0_combout ;
  2045. wire \macro_inst|u_uart[0]|u_rx[5]|parity_error~1_combout ;
  2046. wire \macro_inst|u_uart[0]|u_rx[5]|parity_error~q ;
  2047. wire [3:0] \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt ;
  2048. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0];
  2049. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0]~4_combout ;
  2050. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0]~5 ;
  2051. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1];
  2052. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1]~6_combout ;
  2053. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1]~7 ;
  2054. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2];
  2055. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2]~8_combout ;
  2056. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2]~9 ;
  2057. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3];
  2058. wire \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3]~10_combout ;
  2059. wire \macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ;
  2060. wire [3:0] \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt ;
  2061. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0];
  2062. wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout ;
  2063. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1];
  2064. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2];
  2065. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [3];
  2066. wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~1_combout ;
  2067. wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~2_combout ;
  2068. wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~4_combout ;
  2069. wire \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~5_combout ;
  2070. wire [0:0] \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter ;
  2071. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0];
  2072. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter~0_combout ;
  2073. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~feeder_combout ;
  2074. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~q ;
  2075. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1]~q ;
  2076. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~feeder_combout ;
  2077. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~q ;
  2078. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3]~q ;
  2079. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4]~q ;
  2080. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~feeder_combout ;
  2081. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~q ;
  2082. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~feeder_combout ;
  2083. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~q ;
  2084. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7]~q ;
  2085. wire \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout ;
  2086. wire \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~0_combout ;
  2087. wire \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~q ;
  2088. wire \macro_inst|u_uart[0]|u_rx[5]|rx_idle~0_combout ;
  2089. wire \macro_inst|u_uart[0]|u_rx[5]|rx_idle~q ;
  2090. wire [4:0] \macro_inst|u_uart[0]|u_rx[5]|rx_in ;
  2091. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_in [0];
  2092. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_in [1];
  2093. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_in [2];
  2094. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_in [3];
  2095. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_in [4];
  2096. wire \macro_inst|u_uart[0]|u_rx[5]|rx_in[4]~0_combout ;
  2097. wire \macro_inst|u_uart[0]|u_rx[5]|rx_parity~0_combout ;
  2098. wire \macro_inst|u_uart[0]|u_rx[5]|rx_parity~1_combout ;
  2099. wire \macro_inst|u_uart[0]|u_rx[5]|rx_parity~q ;
  2100. wire \macro_inst|u_uart[0]|u_rx[5]|rx_sample~0_combout ;
  2101. wire [7:0] \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg ;
  2102. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [0];
  2103. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1];
  2104. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2];
  2105. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3];
  2106. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [4];
  2107. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5];
  2108. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6];
  2109. //wire \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7];
  2110. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ;
  2111. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ;
  2112. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~0_combout ;
  2113. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~1_combout ;
  2114. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ;
  2115. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ;
  2116. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0_combout ;
  2117. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~1_combout ;
  2118. wire \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ;
  2119. wire \macro_inst|u_uart[0]|u_tx[0]|Selector0~0_combout ;
  2120. wire \macro_inst|u_uart[0]|u_tx[0]|Selector2~0_combout ;
  2121. wire \macro_inst|u_uart[0]|u_tx[0]|Selector3~0_combout ;
  2122. wire \macro_inst|u_uart[0]|u_tx[0]|Selector3~1_combout ;
  2123. wire \macro_inst|u_uart[0]|u_tx[0]|Selector4~0_combout ;
  2124. wire \macro_inst|u_uart[0]|u_tx[0]|Selector4~1_combout ;
  2125. wire \macro_inst|u_uart[0]|u_tx[0]|Selector5~2_combout ;
  2126. wire \macro_inst|u_uart[0]|u_tx[0]|Selector5~3_combout ;
  2127. wire \macro_inst|u_uart[0]|u_tx[0]|Selector5~4_combout ;
  2128. wire \macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ;
  2129. wire \macro_inst|u_uart[0]|u_tx[0]|always6~0_combout ;
  2130. wire \macro_inst|u_uart[0]|u_tx[0]|always6~1_combout ;
  2131. wire \macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ;
  2132. wire \macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ;
  2133. wire [3:0] \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt ;
  2134. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [0];
  2135. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0]~4_combout ;
  2136. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0]~5 ;
  2137. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [1];
  2138. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1]~6_combout ;
  2139. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1]~7 ;
  2140. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [2];
  2141. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2]~8_combout ;
  2142. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2]~9 ;
  2143. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [3];
  2144. wire \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3]~10_combout ;
  2145. wire \macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ;
  2146. wire \macro_inst|u_uart[0]|u_tx[0]|tx_complete~0_combout ;
  2147. wire \macro_inst|u_uart[0]|u_tx[0]|tx_complete~q ;
  2148. wire [2:0] \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt ;
  2149. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0];
  2150. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [1];
  2151. wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout ;
  2152. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [2];
  2153. wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~0_combout ;
  2154. wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~2_combout ;
  2155. wire \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~3_combout ;
  2156. wire \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~0_combout ;
  2157. wire \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~q ;
  2158. wire [0:0] \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter ;
  2159. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0];
  2160. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter~0_combout ;
  2161. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0]~q ;
  2162. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1]~q ;
  2163. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2]~q ;
  2164. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3]~q ;
  2165. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4]~q ;
  2166. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5]~q ;
  2167. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2168. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]~q ;
  2169. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7]~q ;
  2170. wire \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout ;
  2171. wire \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0_combout ;
  2172. wire \macro_inst|u_uart[0]|u_tx[0]|tx_parity~1_combout ;
  2173. wire \macro_inst|u_uart[0]|u_tx[0]|tx_parity~q ;
  2174. wire [7:0] \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg ;
  2175. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0];
  2176. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [1];
  2177. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [2];
  2178. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout ;
  2179. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [3];
  2180. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [4];
  2181. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [5];
  2182. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [6];
  2183. //wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [7];
  2184. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~0_combout ;
  2185. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~2_combout ;
  2186. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~3_combout ;
  2187. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~4_combout ;
  2188. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~5_combout ;
  2189. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~6_combout ;
  2190. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~7_combout ;
  2191. wire \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~8_combout ;
  2192. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ;
  2193. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ;
  2194. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ;
  2195. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0_combout ;
  2196. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~1_combout ;
  2197. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ;
  2198. wire \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ;
  2199. wire \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0_combout ;
  2200. wire \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~1_combout ;
  2201. wire \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ;
  2202. wire \macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout ;
  2203. wire \macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ;
  2204. wire \macro_inst|u_uart[0]|u_tx[0]|uart_txd~q ;
  2205. wire \macro_inst|u_uart[0]|u_tx[1]|Selector0~0_combout ;
  2206. wire \macro_inst|u_uart[0]|u_tx[1]|Selector2~0_combout ;
  2207. wire \macro_inst|u_uart[0]|u_tx[1]|Selector3~0_combout ;
  2208. wire \macro_inst|u_uart[0]|u_tx[1]|Selector3~1_combout ;
  2209. wire \macro_inst|u_uart[0]|u_tx[1]|Selector4~0_combout ;
  2210. wire \macro_inst|u_uart[0]|u_tx[1]|Selector4~1_combout ;
  2211. wire \macro_inst|u_uart[0]|u_tx[1]|Selector5~2_combout ;
  2212. wire \macro_inst|u_uart[0]|u_tx[1]|Selector5~3_combout ;
  2213. wire \macro_inst|u_uart[0]|u_tx[1]|Selector5~4_combout ;
  2214. wire \macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ;
  2215. wire \macro_inst|u_uart[0]|u_tx[1]|always6~0_combout ;
  2216. wire \macro_inst|u_uart[0]|u_tx[1]|always6~1_combout ;
  2217. wire \macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ;
  2218. wire \macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ;
  2219. wire [3:0] \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt ;
  2220. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [0];
  2221. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0]~4_combout ;
  2222. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0]~5 ;
  2223. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [1];
  2224. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1]~6_combout ;
  2225. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1]~7 ;
  2226. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [2];
  2227. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2]~8_combout ;
  2228. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2]~9 ;
  2229. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [3];
  2230. wire \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3]~10_combout ;
  2231. wire \macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ;
  2232. wire \macro_inst|u_uart[0]|u_tx[1]|tx_complete~0_combout ;
  2233. wire \macro_inst|u_uart[0]|u_tx[1]|tx_complete~q ;
  2234. wire [2:0] \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt ;
  2235. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0];
  2236. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [1];
  2237. wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout ;
  2238. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [2];
  2239. wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~0_combout ;
  2240. wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~2_combout ;
  2241. wire \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~3_combout ;
  2242. wire \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~0_combout ;
  2243. wire \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~q ;
  2244. wire [0:0] \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter ;
  2245. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0];
  2246. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter~0_combout ;
  2247. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  2248. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]~q ;
  2249. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1]~q ;
  2250. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2]~q ;
  2251. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3]~q ;
  2252. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  2253. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]~q ;
  2254. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5]~q ;
  2255. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2256. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]~q ;
  2257. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  2258. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]~q ;
  2259. wire \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout ;
  2260. wire \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0_combout ;
  2261. wire \macro_inst|u_uart[0]|u_tx[1]|tx_parity~1_combout ;
  2262. wire \macro_inst|u_uart[0]|u_tx[1]|tx_parity~q ;
  2263. wire [7:0] \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg ;
  2264. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0];
  2265. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [1];
  2266. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [2];
  2267. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [3];
  2268. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [4];
  2269. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [5];
  2270. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [6];
  2271. //wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [7];
  2272. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout ;
  2273. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~0_combout ;
  2274. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~2_combout ;
  2275. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~3_combout ;
  2276. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~4_combout ;
  2277. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~5_combout ;
  2278. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~6_combout ;
  2279. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~7_combout ;
  2280. wire \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~8_combout ;
  2281. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ;
  2282. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ;
  2283. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ;
  2284. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0_combout ;
  2285. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~1_combout ;
  2286. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ;
  2287. wire \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ;
  2288. wire \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0_combout ;
  2289. wire \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~1_combout ;
  2290. wire \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ;
  2291. wire \macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout ;
  2292. wire \macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ;
  2293. wire \macro_inst|u_uart[0]|u_tx[1]|uart_txd~q ;
  2294. wire \macro_inst|u_uart[0]|u_tx[2]|Selector0~0_combout ;
  2295. wire \macro_inst|u_uart[0]|u_tx[2]|Selector2~0_combout ;
  2296. wire \macro_inst|u_uart[0]|u_tx[2]|Selector3~0_combout ;
  2297. wire \macro_inst|u_uart[0]|u_tx[2]|Selector3~1_combout ;
  2298. wire \macro_inst|u_uart[0]|u_tx[2]|Selector4~0_combout ;
  2299. wire \macro_inst|u_uart[0]|u_tx[2]|Selector4~1_combout ;
  2300. wire \macro_inst|u_uart[0]|u_tx[2]|Selector5~2_combout ;
  2301. wire \macro_inst|u_uart[0]|u_tx[2]|Selector5~3_combout ;
  2302. wire \macro_inst|u_uart[0]|u_tx[2]|Selector5~4_combout ;
  2303. wire \macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ;
  2304. wire \macro_inst|u_uart[0]|u_tx[2]|always6~0_combout ;
  2305. wire \macro_inst|u_uart[0]|u_tx[2]|always6~1_combout ;
  2306. wire \macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ;
  2307. wire \macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ;
  2308. wire [3:0] \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt ;
  2309. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [0];
  2310. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0]~4_combout ;
  2311. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0]~5 ;
  2312. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [1];
  2313. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1]~6_combout ;
  2314. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1]~7 ;
  2315. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [2];
  2316. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2]~8_combout ;
  2317. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2]~9 ;
  2318. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [3];
  2319. wire \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3]~10_combout ;
  2320. wire \macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ;
  2321. wire \macro_inst|u_uart[0]|u_tx[2]|tx_complete~0_combout ;
  2322. wire \macro_inst|u_uart[0]|u_tx[2]|tx_complete~q ;
  2323. wire [2:0] \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt ;
  2324. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0];
  2325. wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout ;
  2326. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [1];
  2327. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [2];
  2328. wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~0_combout ;
  2329. wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~2_combout ;
  2330. wire \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~3_combout ;
  2331. wire [0:0] \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter ;
  2332. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0];
  2333. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter~0_combout ;
  2334. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  2335. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]~q ;
  2336. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  2337. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]~q ;
  2338. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2]~q ;
  2339. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  2340. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]~q ;
  2341. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  2342. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]~q ;
  2343. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  2344. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]~q ;
  2345. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2346. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]~q ;
  2347. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  2348. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]~q ;
  2349. wire \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout ;
  2350. wire \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0_combout ;
  2351. wire \macro_inst|u_uart[0]|u_tx[2]|tx_parity~1_combout ;
  2352. wire \macro_inst|u_uart[0]|u_tx[2]|tx_parity~q ;
  2353. wire [7:0] \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg ;
  2354. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0];
  2355. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [1];
  2356. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [2];
  2357. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [3];
  2358. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [4];
  2359. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [5];
  2360. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout ;
  2361. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [6];
  2362. //wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [7];
  2363. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~0_combout ;
  2364. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~2_combout ;
  2365. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~3_combout ;
  2366. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~4_combout ;
  2367. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~5_combout ;
  2368. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~6_combout ;
  2369. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~7_combout ;
  2370. wire \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~8_combout ;
  2371. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ;
  2372. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ;
  2373. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ;
  2374. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0_combout ;
  2375. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~1_combout ;
  2376. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ;
  2377. wire \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ;
  2378. wire \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0_combout ;
  2379. wire \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~1_combout ;
  2380. wire \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ;
  2381. wire \macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout ;
  2382. wire \macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ;
  2383. wire \macro_inst|u_uart[0]|u_tx[2]|uart_txd~q ;
  2384. wire \macro_inst|u_uart[0]|u_tx[3]|Selector0~0_combout ;
  2385. wire \macro_inst|u_uart[0]|u_tx[3]|Selector2~0_combout ;
  2386. wire \macro_inst|u_uart[0]|u_tx[3]|Selector3~0_combout ;
  2387. wire \macro_inst|u_uart[0]|u_tx[3]|Selector3~1_combout ;
  2388. wire \macro_inst|u_uart[0]|u_tx[3]|Selector4~0_combout ;
  2389. wire \macro_inst|u_uart[0]|u_tx[3]|Selector4~1_combout ;
  2390. wire \macro_inst|u_uart[0]|u_tx[3]|Selector5~2_combout ;
  2391. wire \macro_inst|u_uart[0]|u_tx[3]|Selector5~3_combout ;
  2392. wire \macro_inst|u_uart[0]|u_tx[3]|Selector5~4_combout ;
  2393. wire \macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ;
  2394. wire \macro_inst|u_uart[0]|u_tx[3]|always6~0_combout ;
  2395. wire \macro_inst|u_uart[0]|u_tx[3]|always6~1_combout ;
  2396. wire \macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ;
  2397. wire \macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ;
  2398. wire [3:0] \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt ;
  2399. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [0];
  2400. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0]~4_combout ;
  2401. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0]~5 ;
  2402. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [1];
  2403. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1]~6_combout ;
  2404. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1]~7 ;
  2405. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [2];
  2406. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2]~8_combout ;
  2407. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2]~9 ;
  2408. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [3];
  2409. wire \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3]~10_combout ;
  2410. wire \macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ;
  2411. wire \macro_inst|u_uart[0]|u_tx[3]|tx_complete~0_combout ;
  2412. wire \macro_inst|u_uart[0]|u_tx[3]|tx_complete~q ;
  2413. wire [2:0] \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt ;
  2414. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0];
  2415. wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout ;
  2416. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [1];
  2417. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [2];
  2418. wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~0_combout ;
  2419. wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~2_combout ;
  2420. wire \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~3_combout ;
  2421. wire [0:0] \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter ;
  2422. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0];
  2423. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter~0_combout ;
  2424. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  2425. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]~q ;
  2426. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  2427. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]~q ;
  2428. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  2429. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]~q ;
  2430. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  2431. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]~q ;
  2432. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  2433. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]~q ;
  2434. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  2435. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]~q ;
  2436. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2437. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]~q ;
  2438. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7]~q ;
  2439. wire \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout ;
  2440. wire \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0_combout ;
  2441. wire \macro_inst|u_uart[0]|u_tx[3]|tx_parity~1_combout ;
  2442. wire \macro_inst|u_uart[0]|u_tx[3]|tx_parity~q ;
  2443. wire [7:0] \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg ;
  2444. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0];
  2445. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [1];
  2446. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [2];
  2447. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [3];
  2448. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout ;
  2449. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [4];
  2450. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [5];
  2451. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [6];
  2452. //wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [7];
  2453. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~0_combout ;
  2454. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~2_combout ;
  2455. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~3_combout ;
  2456. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~4_combout ;
  2457. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~5_combout ;
  2458. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~6_combout ;
  2459. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~7_combout ;
  2460. wire \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~8_combout ;
  2461. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ;
  2462. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ;
  2463. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ;
  2464. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0_combout ;
  2465. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~1_combout ;
  2466. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ;
  2467. wire \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ;
  2468. wire \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0_combout ;
  2469. wire \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~1_combout ;
  2470. wire \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ;
  2471. wire \macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout ;
  2472. wire \macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ;
  2473. wire \macro_inst|u_uart[0]|u_tx[3]|uart_txd~q ;
  2474. wire \macro_inst|u_uart[0]|u_tx[4]|Selector0~0_combout ;
  2475. wire \macro_inst|u_uart[0]|u_tx[4]|Selector2~0_combout ;
  2476. wire \macro_inst|u_uart[0]|u_tx[4]|Selector3~0_combout ;
  2477. wire \macro_inst|u_uart[0]|u_tx[4]|Selector3~1_combout ;
  2478. wire \macro_inst|u_uart[0]|u_tx[4]|Selector4~0_combout ;
  2479. wire \macro_inst|u_uart[0]|u_tx[4]|Selector4~1_combout ;
  2480. wire \macro_inst|u_uart[0]|u_tx[4]|Selector5~2_combout ;
  2481. wire \macro_inst|u_uart[0]|u_tx[4]|Selector5~3_combout ;
  2482. wire \macro_inst|u_uart[0]|u_tx[4]|Selector5~4_combout ;
  2483. wire \macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ;
  2484. wire \macro_inst|u_uart[0]|u_tx[4]|always6~0_combout ;
  2485. wire \macro_inst|u_uart[0]|u_tx[4]|always6~1_combout ;
  2486. wire \macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ;
  2487. wire \macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ;
  2488. wire [3:0] \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt ;
  2489. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [0];
  2490. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0]~4_combout ;
  2491. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0]~5 ;
  2492. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [1];
  2493. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1]~6_combout ;
  2494. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1]~7 ;
  2495. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [2];
  2496. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2]~8_combout ;
  2497. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2]~9 ;
  2498. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [3];
  2499. wire \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3]~10_combout ;
  2500. wire \macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ;
  2501. wire \macro_inst|u_uart[0]|u_tx[4]|tx_complete~0_combout ;
  2502. wire \macro_inst|u_uart[0]|u_tx[4]|tx_complete~q ;
  2503. wire [2:0] \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt ;
  2504. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0];
  2505. wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout ;
  2506. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [1];
  2507. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [2];
  2508. wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~0_combout ;
  2509. wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~2_combout ;
  2510. wire \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~3_combout ;
  2511. wire [0:0] \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter ;
  2512. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0];
  2513. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter~0_combout ;
  2514. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  2515. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]~q ;
  2516. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  2517. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]~q ;
  2518. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  2519. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]~q ;
  2520. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  2521. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]~q ;
  2522. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  2523. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]~q ;
  2524. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5]~q ;
  2525. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2526. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]~q ;
  2527. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  2528. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]~q ;
  2529. wire \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout ;
  2530. wire \macro_inst|u_uart[0]|u_tx[4]|tx_parity~0_combout ;
  2531. wire \macro_inst|u_uart[0]|u_tx[4]|tx_parity~1_combout ;
  2532. wire \macro_inst|u_uart[0]|u_tx[4]|tx_parity~q ;
  2533. wire [7:0] \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg ;
  2534. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0];
  2535. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [1];
  2536. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [2];
  2537. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [3];
  2538. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout ;
  2539. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [4];
  2540. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [5];
  2541. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [6];
  2542. //wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [7];
  2543. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~0_combout ;
  2544. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~2_combout ;
  2545. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~3_combout ;
  2546. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~4_combout ;
  2547. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~5_combout ;
  2548. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~6_combout ;
  2549. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~7_combout ;
  2550. wire \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~8_combout ;
  2551. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ;
  2552. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ;
  2553. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ;
  2554. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0_combout ;
  2555. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~1_combout ;
  2556. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ;
  2557. wire \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ;
  2558. wire \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0_combout ;
  2559. wire \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~1_combout ;
  2560. wire \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ;
  2561. wire \macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout ;
  2562. wire \macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ;
  2563. wire \macro_inst|u_uart[0]|u_tx[4]|uart_txd~q ;
  2564. wire \macro_inst|u_uart[0]|u_tx[5]|Selector0~0_combout ;
  2565. wire \macro_inst|u_uart[0]|u_tx[5]|Selector2~0_combout ;
  2566. wire \macro_inst|u_uart[0]|u_tx[5]|Selector3~0_combout ;
  2567. wire \macro_inst|u_uart[0]|u_tx[5]|Selector3~1_combout ;
  2568. wire \macro_inst|u_uart[0]|u_tx[5]|Selector4~0_combout ;
  2569. wire \macro_inst|u_uart[0]|u_tx[5]|Selector4~1_combout ;
  2570. wire \macro_inst|u_uart[0]|u_tx[5]|Selector5~2_combout ;
  2571. wire \macro_inst|u_uart[0]|u_tx[5]|Selector5~3_combout ;
  2572. wire \macro_inst|u_uart[0]|u_tx[5]|Selector5~4_combout ;
  2573. wire \macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ;
  2574. wire \macro_inst|u_uart[0]|u_tx[5]|always6~0_combout ;
  2575. wire \macro_inst|u_uart[0]|u_tx[5]|always6~1_combout ;
  2576. wire \macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ;
  2577. wire \macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ;
  2578. wire [3:0] \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt ;
  2579. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [0];
  2580. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0]~4_combout ;
  2581. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0]~5 ;
  2582. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [1];
  2583. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1]~6_combout ;
  2584. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1]~7 ;
  2585. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [2];
  2586. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2]~8_combout ;
  2587. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2]~9 ;
  2588. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [3];
  2589. wire \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3]~10_combout ;
  2590. wire \macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ;
  2591. wire \macro_inst|u_uart[0]|u_tx[5]|tx_complete~0_combout ;
  2592. wire \macro_inst|u_uart[0]|u_tx[5]|tx_complete~q ;
  2593. wire [2:0] \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt ;
  2594. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0];
  2595. wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout ;
  2596. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [1];
  2597. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [2];
  2598. wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~0_combout ;
  2599. wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~2_combout ;
  2600. wire \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~3_combout ;
  2601. wire [0:0] \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter ;
  2602. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0];
  2603. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter~0_combout ;
  2604. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  2605. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]~q ;
  2606. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  2607. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]~q ;
  2608. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  2609. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]~q ;
  2610. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  2611. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]~q ;
  2612. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4]~q ;
  2613. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  2614. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]~q ;
  2615. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  2616. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]~q ;
  2617. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  2618. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]~q ;
  2619. wire \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout ;
  2620. wire \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0_combout ;
  2621. wire \macro_inst|u_uart[0]|u_tx[5]|tx_parity~1_combout ;
  2622. wire \macro_inst|u_uart[0]|u_tx[5]|tx_parity~q ;
  2623. wire [7:0] \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg ;
  2624. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0];
  2625. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [1];
  2626. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [2];
  2627. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [3];
  2628. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [4];
  2629. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [5];
  2630. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout ;
  2631. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [6];
  2632. //wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [7];
  2633. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~0_combout ;
  2634. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~2_combout ;
  2635. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~3_combout ;
  2636. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~4_combout ;
  2637. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~5_combout ;
  2638. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~6_combout ;
  2639. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~7_combout ;
  2640. wire \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~8_combout ;
  2641. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ;
  2642. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ;
  2643. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ;
  2644. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0_combout ;
  2645. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~1_combout ;
  2646. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ;
  2647. wire \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ;
  2648. wire \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0_combout ;
  2649. wire \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~1_combout ;
  2650. wire \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ;
  2651. wire \macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout ;
  2652. wire \macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ;
  2653. wire \macro_inst|u_uart[0]|u_tx[5]|uart_txd~q ;
  2654. wire \macro_inst|u_uart[1]|u_baud|Equal1~0_combout ;
  2655. wire \macro_inst|u_uart[1]|u_baud|Equal1~1_combout ;
  2656. wire \macro_inst|u_uart[1]|u_baud|Equal1~2_combout ;
  2657. wire \macro_inst|u_uart[1]|u_baud|Equal1~3_combout ;
  2658. wire \macro_inst|u_uart[1]|u_baud|Equal1~4_combout ;
  2659. wire \macro_inst|u_uart[1]|u_baud|LessThan0~10_combout ;
  2660. wire \macro_inst|u_uart[1]|u_baud|LessThan0~1_cout ;
  2661. wire \macro_inst|u_uart[1]|u_baud|LessThan0~3_cout ;
  2662. wire \macro_inst|u_uart[1]|u_baud|LessThan0~5_cout ;
  2663. wire \macro_inst|u_uart[1]|u_baud|LessThan0~7_cout ;
  2664. wire \macro_inst|u_uart[1]|u_baud|LessThan0~9_cout ;
  2665. wire \macro_inst|u_uart[1]|u_baud|always0~0_combout ;
  2666. wire \macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ;
  2667. wire \macro_inst|u_uart[1]|u_baud|always2~0_combout ;
  2668. wire \macro_inst|u_uart[1]|u_baud|baud16~q ;
  2669. wire [5:0] \macro_inst|u_uart[1]|u_baud|f_cnt ;
  2670. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [0];
  2671. wire \macro_inst|u_uart[1]|u_baud|f_cnt[0]~6_combout ;
  2672. wire \macro_inst|u_uart[1]|u_baud|f_cnt[0]~7 ;
  2673. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [1];
  2674. wire \macro_inst|u_uart[1]|u_baud|f_cnt[1]~8_combout ;
  2675. wire \macro_inst|u_uart[1]|u_baud|f_cnt[1]~9 ;
  2676. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [2];
  2677. wire \macro_inst|u_uart[1]|u_baud|f_cnt[2]~10_combout ;
  2678. wire \macro_inst|u_uart[1]|u_baud|f_cnt[2]~11 ;
  2679. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [3];
  2680. wire \macro_inst|u_uart[1]|u_baud|f_cnt[3]~12_combout ;
  2681. wire \macro_inst|u_uart[1]|u_baud|f_cnt[3]~13 ;
  2682. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [4];
  2683. wire \macro_inst|u_uart[1]|u_baud|f_cnt[4]~14_combout ;
  2684. wire \macro_inst|u_uart[1]|u_baud|f_cnt[4]~15 ;
  2685. //wire \macro_inst|u_uart[1]|u_baud|f_cnt [5];
  2686. wire \macro_inst|u_uart[1]|u_baud|f_cnt[5]~16_combout ;
  2687. wire \macro_inst|u_uart[1]|u_baud|f_del~q ;
  2688. wire [15:0] \macro_inst|u_uart[1]|u_baud|i_cnt ;
  2689. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [0];
  2690. wire \macro_inst|u_uart[1]|u_baud|i_cnt[0]~16_combout ;
  2691. wire \macro_inst|u_uart[1]|u_baud|i_cnt[0]~17 ;
  2692. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [10];
  2693. wire \macro_inst|u_uart[1]|u_baud|i_cnt[10]~36_combout ;
  2694. wire \macro_inst|u_uart[1]|u_baud|i_cnt[10]~37 ;
  2695. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [11];
  2696. wire \macro_inst|u_uart[1]|u_baud|i_cnt[11]~38_combout ;
  2697. wire \macro_inst|u_uart[1]|u_baud|i_cnt[11]~39 ;
  2698. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [12];
  2699. wire \macro_inst|u_uart[1]|u_baud|i_cnt[12]~40_combout ;
  2700. wire \macro_inst|u_uart[1]|u_baud|i_cnt[12]~41 ;
  2701. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [13];
  2702. wire \macro_inst|u_uart[1]|u_baud|i_cnt[13]~42_combout ;
  2703. wire \macro_inst|u_uart[1]|u_baud|i_cnt[13]~43 ;
  2704. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [14];
  2705. wire \macro_inst|u_uart[1]|u_baud|i_cnt[14]~44_combout ;
  2706. wire \macro_inst|u_uart[1]|u_baud|i_cnt[14]~45 ;
  2707. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [15];
  2708. wire \macro_inst|u_uart[1]|u_baud|i_cnt[15]~46_combout ;
  2709. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [1];
  2710. wire \macro_inst|u_uart[1]|u_baud|i_cnt[1]~18_combout ;
  2711. wire \macro_inst|u_uart[1]|u_baud|i_cnt[1]~19 ;
  2712. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [2];
  2713. wire \macro_inst|u_uart[1]|u_baud|i_cnt[2]~20_combout ;
  2714. wire \macro_inst|u_uart[1]|u_baud|i_cnt[2]~21 ;
  2715. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [3];
  2716. wire \macro_inst|u_uart[1]|u_baud|i_cnt[3]~22_combout ;
  2717. wire \macro_inst|u_uart[1]|u_baud|i_cnt[3]~23 ;
  2718. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [4];
  2719. wire \macro_inst|u_uart[1]|u_baud|i_cnt[4]~24_combout ;
  2720. wire \macro_inst|u_uart[1]|u_baud|i_cnt[4]~25 ;
  2721. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [5];
  2722. wire \macro_inst|u_uart[1]|u_baud|i_cnt[5]~26_combout ;
  2723. wire \macro_inst|u_uart[1]|u_baud|i_cnt[5]~27 ;
  2724. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [6];
  2725. wire \macro_inst|u_uart[1]|u_baud|i_cnt[6]~28_combout ;
  2726. wire \macro_inst|u_uart[1]|u_baud|i_cnt[6]~29 ;
  2727. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [7];
  2728. wire \macro_inst|u_uart[1]|u_baud|i_cnt[7]~30_combout ;
  2729. wire \macro_inst|u_uart[1]|u_baud|i_cnt[7]~31 ;
  2730. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [8];
  2731. wire \macro_inst|u_uart[1]|u_baud|i_cnt[8]~32_combout ;
  2732. wire \macro_inst|u_uart[1]|u_baud|i_cnt[8]~33 ;
  2733. //wire \macro_inst|u_uart[1]|u_baud|i_cnt [9];
  2734. wire \macro_inst|u_uart[1]|u_baud|i_cnt[9]~34_combout ;
  2735. wire \macro_inst|u_uart[1]|u_baud|i_cnt[9]~35 ;
  2736. wire \macro_inst|u_uart[1]|u_regs|Equal2~0_combout ;
  2737. wire \macro_inst|u_uart[1]|u_regs|Equal2~1_combout ;
  2738. wire \macro_inst|u_uart[1]|u_regs|Equal2~2_combout ;
  2739. wire \macro_inst|u_uart[1]|u_regs|Mux0~2_combout ;
  2740. wire \macro_inst|u_uart[1]|u_regs|Mux0~3_combout ;
  2741. wire \macro_inst|u_uart[1]|u_regs|Mux0~4_combout ;
  2742. wire \macro_inst|u_uart[1]|u_regs|Mux0~5_combout ;
  2743. wire \macro_inst|u_uart[1]|u_regs|Mux10~0_combout ;
  2744. wire \macro_inst|u_uart[1]|u_regs|Mux10~1_combout ;
  2745. wire \macro_inst|u_uart[1]|u_regs|Mux11~0_combout ;
  2746. wire \macro_inst|u_uart[1]|u_regs|Mux11~1_combout ;
  2747. wire \macro_inst|u_uart[1]|u_regs|Mux11~2_combout ;
  2748. wire \macro_inst|u_uart[1]|u_regs|Mux11~3_combout ;
  2749. wire \macro_inst|u_uart[1]|u_regs|Mux12~0_combout ;
  2750. wire \macro_inst|u_uart[1]|u_regs|Mux12~1_combout ;
  2751. wire \macro_inst|u_uart[1]|u_regs|Mux1~2_combout ;
  2752. wire \macro_inst|u_uart[1]|u_regs|Mux1~3_combout ;
  2753. wire \macro_inst|u_uart[1]|u_regs|Mux1~4_combout ;
  2754. wire \macro_inst|u_uart[1]|u_regs|Mux1~5_combout ;
  2755. wire \macro_inst|u_uart[1]|u_regs|Mux2~2_combout ;
  2756. wire \macro_inst|u_uart[1]|u_regs|Mux2~3_combout ;
  2757. wire \macro_inst|u_uart[1]|u_regs|Mux2~4_combout ;
  2758. wire \macro_inst|u_uart[1]|u_regs|Mux2~5_combout ;
  2759. wire \macro_inst|u_uart[1]|u_regs|Mux3~2_combout ;
  2760. wire \macro_inst|u_uart[1]|u_regs|Mux3~3_combout ;
  2761. wire \macro_inst|u_uart[1]|u_regs|Mux3~4_combout ;
  2762. wire \macro_inst|u_uart[1]|u_regs|Mux3~5_combout ;
  2763. wire \macro_inst|u_uart[1]|u_regs|Mux4~2_combout ;
  2764. wire \macro_inst|u_uart[1]|u_regs|Mux4~3_combout ;
  2765. wire \macro_inst|u_uart[1]|u_regs|Mux4~4_combout ;
  2766. wire \macro_inst|u_uart[1]|u_regs|Mux4~5_combout ;
  2767. wire \macro_inst|u_uart[1]|u_regs|Mux5~2_combout ;
  2768. wire \macro_inst|u_uart[1]|u_regs|Mux5~3_combout ;
  2769. wire \macro_inst|u_uart[1]|u_regs|Mux5~4_combout ;
  2770. wire \macro_inst|u_uart[1]|u_regs|Mux5~5_combout ;
  2771. wire \macro_inst|u_uart[1]|u_regs|Mux6~2_combout ;
  2772. wire \macro_inst|u_uart[1]|u_regs|Mux6~3_combout ;
  2773. wire \macro_inst|u_uart[1]|u_regs|Mux6~4_combout ;
  2774. wire \macro_inst|u_uart[1]|u_regs|Mux6~5_combout ;
  2775. wire \macro_inst|u_uart[1]|u_regs|Mux7~2_combout ;
  2776. wire \macro_inst|u_uart[1]|u_regs|Mux7~3_combout ;
  2777. wire \macro_inst|u_uart[1]|u_regs|Mux7~4_combout ;
  2778. wire \macro_inst|u_uart[1]|u_regs|Mux7~5_combout ;
  2779. wire \macro_inst|u_uart[1]|u_regs|Mux8~0_combout ;
  2780. wire \macro_inst|u_uart[1]|u_regs|Selector0~0_combout ;
  2781. wire \macro_inst|u_uart[1]|u_regs|Selector0~1_combout ;
  2782. wire \macro_inst|u_uart[1]|u_regs|Selector0~2_combout ;
  2783. wire \macro_inst|u_uart[1]|u_regs|Selector0~3_combout ;
  2784. wire \macro_inst|u_uart[1]|u_regs|Selector0~4_combout ;
  2785. wire \macro_inst|u_uart[1]|u_regs|Selector10~0_combout ;
  2786. wire \macro_inst|u_uart[1]|u_regs|Selector10~1_combout ;
  2787. wire \macro_inst|u_uart[1]|u_regs|Selector10~2_combout ;
  2788. wire \macro_inst|u_uart[1]|u_regs|Selector10~3_combout ;
  2789. wire \macro_inst|u_uart[1]|u_regs|Selector10~4_combout ;
  2790. wire \macro_inst|u_uart[1]|u_regs|Selector10~5_combout ;
  2791. wire \macro_inst|u_uart[1]|u_regs|Selector10~6_combout ;
  2792. wire \macro_inst|u_uart[1]|u_regs|Selector11~0_combout ;
  2793. wire \macro_inst|u_uart[1]|u_regs|Selector11~10_combout ;
  2794. wire \macro_inst|u_uart[1]|u_regs|Selector11~11_combout ;
  2795. wire \macro_inst|u_uart[1]|u_regs|Selector11~12_combout ;
  2796. wire \macro_inst|u_uart[1]|u_regs|Selector11~13_combout ;
  2797. wire \macro_inst|u_uart[1]|u_regs|Selector11~14_combout ;
  2798. wire \macro_inst|u_uart[1]|u_regs|Selector11~15_combout ;
  2799. wire \macro_inst|u_uart[1]|u_regs|Selector11~1_combout ;
  2800. wire \macro_inst|u_uart[1]|u_regs|Selector11~2_combout ;
  2801. wire \macro_inst|u_uart[1]|u_regs|Selector11~3_combout ;
  2802. wire \macro_inst|u_uart[1]|u_regs|Selector11~4_combout ;
  2803. wire \macro_inst|u_uart[1]|u_regs|Selector11~5_combout ;
  2804. wire \macro_inst|u_uart[1]|u_regs|Selector11~6_combout ;
  2805. wire \macro_inst|u_uart[1]|u_regs|Selector11~7_combout ;
  2806. wire \macro_inst|u_uart[1]|u_regs|Selector11~8_combout ;
  2807. wire \macro_inst|u_uart[1]|u_regs|Selector11~9_combout ;
  2808. wire \macro_inst|u_uart[1]|u_regs|Selector12~0_combout ;
  2809. wire \macro_inst|u_uart[1]|u_regs|Selector12~10_combout ;
  2810. wire \macro_inst|u_uart[1]|u_regs|Selector12~11_combout ;
  2811. wire \macro_inst|u_uart[1]|u_regs|Selector12~1_combout ;
  2812. wire \macro_inst|u_uart[1]|u_regs|Selector12~2_combout ;
  2813. wire \macro_inst|u_uart[1]|u_regs|Selector12~3_combout ;
  2814. wire \macro_inst|u_uart[1]|u_regs|Selector12~4_combout ;
  2815. wire \macro_inst|u_uart[1]|u_regs|Selector12~5_combout ;
  2816. wire \macro_inst|u_uart[1]|u_regs|Selector12~6_combout ;
  2817. wire \macro_inst|u_uart[1]|u_regs|Selector12~7_combout ;
  2818. wire \macro_inst|u_uart[1]|u_regs|Selector12~8_combout ;
  2819. wire \macro_inst|u_uart[1]|u_regs|Selector12~9_combout ;
  2820. wire \macro_inst|u_uart[1]|u_regs|Selector1~0_combout ;
  2821. wire \macro_inst|u_uart[1]|u_regs|Selector1~1_combout ;
  2822. wire \macro_inst|u_uart[1]|u_regs|Selector1~2_combout ;
  2823. wire \macro_inst|u_uart[1]|u_regs|Selector1~3_combout ;
  2824. wire \macro_inst|u_uart[1]|u_regs|Selector1~4_combout ;
  2825. wire \macro_inst|u_uart[1]|u_regs|Selector2~0_combout ;
  2826. wire \macro_inst|u_uart[1]|u_regs|Selector2~1_combout ;
  2827. wire \macro_inst|u_uart[1]|u_regs|Selector2~2_combout ;
  2828. wire \macro_inst|u_uart[1]|u_regs|Selector2~3_combout ;
  2829. wire \macro_inst|u_uart[1]|u_regs|Selector2~4_combout ;
  2830. wire \macro_inst|u_uart[1]|u_regs|Selector3~0_combout ;
  2831. wire \macro_inst|u_uart[1]|u_regs|Selector3~1_combout ;
  2832. wire \macro_inst|u_uart[1]|u_regs|Selector3~2_combout ;
  2833. wire \macro_inst|u_uart[1]|u_regs|Selector3~3_combout ;
  2834. wire \macro_inst|u_uart[1]|u_regs|Selector3~4_combout ;
  2835. wire \macro_inst|u_uart[1]|u_regs|Selector4~0_combout ;
  2836. wire \macro_inst|u_uart[1]|u_regs|Selector4~1_combout ;
  2837. wire \macro_inst|u_uart[1]|u_regs|Selector4~2_combout ;
  2838. wire \macro_inst|u_uart[1]|u_regs|Selector4~3_combout ;
  2839. wire \macro_inst|u_uart[1]|u_regs|Selector4~4_combout ;
  2840. wire \macro_inst|u_uart[1]|u_regs|Selector5~10_combout ;
  2841. wire \macro_inst|u_uart[1]|u_regs|Selector5~11_combout ;
  2842. wire \macro_inst|u_uart[1]|u_regs|Selector5~2_combout ;
  2843. wire \macro_inst|u_uart[1]|u_regs|Selector5~3_combout ;
  2844. wire \macro_inst|u_uart[1]|u_regs|Selector5~4_combout ;
  2845. wire \macro_inst|u_uart[1]|u_regs|Selector5~5_combout ;
  2846. wire \macro_inst|u_uart[1]|u_regs|Selector5~6_combout ;
  2847. wire \macro_inst|u_uart[1]|u_regs|Selector5~7_combout ;
  2848. wire \macro_inst|u_uart[1]|u_regs|Selector5~8_combout ;
  2849. wire \macro_inst|u_uart[1]|u_regs|Selector5~9_combout ;
  2850. wire \macro_inst|u_uart[1]|u_regs|Selector6~0_combout ;
  2851. wire \macro_inst|u_uart[1]|u_regs|Selector6~1_combout ;
  2852. wire \macro_inst|u_uart[1]|u_regs|Selector7~10_combout ;
  2853. wire \macro_inst|u_uart[1]|u_regs|Selector7~11_combout ;
  2854. wire \macro_inst|u_uart[1]|u_regs|Selector7~12_combout ;
  2855. wire \macro_inst|u_uart[1]|u_regs|Selector7~13_combout ;
  2856. wire \macro_inst|u_uart[1]|u_regs|Selector7~14_combout ;
  2857. wire \macro_inst|u_uart[1]|u_regs|Selector7~15_combout ;
  2858. wire \macro_inst|u_uart[1]|u_regs|Selector7~4_combout ;
  2859. wire \macro_inst|u_uart[1]|u_regs|Selector7~5_combout ;
  2860. wire \macro_inst|u_uart[1]|u_regs|Selector7~6_combout ;
  2861. wire \macro_inst|u_uart[1]|u_regs|Selector7~7_combout ;
  2862. wire \macro_inst|u_uart[1]|u_regs|Selector7~8_combout ;
  2863. wire \macro_inst|u_uart[1]|u_regs|Selector7~9_combout ;
  2864. wire \macro_inst|u_uart[1]|u_regs|Selector8~10_combout ;
  2865. wire \macro_inst|u_uart[1]|u_regs|Selector8~11_combout ;
  2866. wire \macro_inst|u_uart[1]|u_regs|Selector8~12_combout ;
  2867. wire \macro_inst|u_uart[1]|u_regs|Selector8~13_combout ;
  2868. wire \macro_inst|u_uart[1]|u_regs|Selector8~14_combout ;
  2869. wire \macro_inst|u_uart[1]|u_regs|Selector8~15_combout ;
  2870. wire \macro_inst|u_uart[1]|u_regs|Selector8~4_combout ;
  2871. wire \macro_inst|u_uart[1]|u_regs|Selector8~5_combout ;
  2872. wire \macro_inst|u_uart[1]|u_regs|Selector8~6_combout ;
  2873. wire \macro_inst|u_uart[1]|u_regs|Selector8~7_combout ;
  2874. wire \macro_inst|u_uart[1]|u_regs|Selector8~8_combout ;
  2875. wire \macro_inst|u_uart[1]|u_regs|Selector8~9_combout ;
  2876. wire \macro_inst|u_uart[1]|u_regs|Selector9~0_combout ;
  2877. wire \macro_inst|u_uart[1]|u_regs|Selector9~1_combout ;
  2878. wire \macro_inst|u_uart[1]|u_regs|Selector9~2_combout ;
  2879. wire \macro_inst|u_uart[1]|u_regs|Selector9~3_combout ;
  2880. wire \macro_inst|u_uart[1]|u_regs|Selector9~4_combout ;
  2881. wire \macro_inst|u_uart[1]|u_regs|Selector9~5_combout ;
  2882. wire \macro_inst|u_uart[1]|u_regs|Selector9~6_combout ;
  2883. wire \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ;
  2884. wire \macro_inst|u_uart[1]|u_regs|always1~0_combout ;
  2885. wire \macro_inst|u_uart[1]|u_regs|always2~0_combout ;
  2886. wire \macro_inst|u_uart[1]|u_regs|always5~0_combout ;
  2887. wire \macro_inst|u_uart[1]|u_regs|always7~0_combout ;
  2888. wire \macro_inst|u_uart[1]|u_regs|always8~0_combout ;
  2889. wire \macro_inst|u_uart[1]|u_regs|always8~1_combout ;
  2890. wire [31:0] \macro_inst|u_uart[1]|u_regs|apb_prdata ;
  2891. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [0];
  2892. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [10];
  2893. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [11];
  2894. wire \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ;
  2895. wire \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ;
  2896. wire \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ;
  2897. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [12];
  2898. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [13];
  2899. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [14];
  2900. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [15];
  2901. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [16];
  2902. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [17];
  2903. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [18];
  2904. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [19];
  2905. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [1];
  2906. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [20];
  2907. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [21];
  2908. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [22];
  2909. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [23];
  2910. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [24];
  2911. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [25];
  2912. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [26];
  2913. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [27];
  2914. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [28];
  2915. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [29];
  2916. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [2];
  2917. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [30];
  2918. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [31];
  2919. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [3];
  2920. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [4];
  2921. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [5];
  2922. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [6];
  2923. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [7];
  2924. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [8];
  2925. //wire \macro_inst|u_uart[1]|u_regs|apb_prdata [9];
  2926. wire \macro_inst|u_uart[1]|u_regs|apb_prdata~6_combout ;
  2927. wire \macro_inst|u_uart[1]|u_regs|apb_prdata~7_combout ;
  2928. wire \macro_inst|u_uart[1]|u_regs|apb_prdata~8_combout ;
  2929. wire \macro_inst|u_uart[1]|u_regs|apb_pready~q ;
  2930. wire \macro_inst|u_uart[1]|u_regs|apb_read0~combout ;
  2931. wire \macro_inst|u_uart[1]|u_regs|apb_read1~combout ;
  2932. wire \macro_inst|u_uart[1]|u_regs|apb_write~0_combout ;
  2933. wire [5:0] \macro_inst|u_uart[1]|u_regs|break_error_ie ;
  2934. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [0];
  2935. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [1];
  2936. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [2];
  2937. wire \macro_inst|u_uart[1]|u_regs|break_error_ie[2]__feeder__LutOut ;
  2938. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [3];
  2939. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [4];
  2940. wire \macro_inst|u_uart[1]|u_regs|break_error_ie[4]__feeder__LutOut ;
  2941. //wire \macro_inst|u_uart[1]|u_regs|break_error_ie [5];
  2942. wire \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ;
  2943. wire \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ;
  2944. wire \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ;
  2945. wire \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ;
  2946. wire \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ;
  2947. wire \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ;
  2948. wire \macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ;
  2949. wire [5:0] \macro_inst|u_uart[1]|u_regs|fbrd ;
  2950. //wire \macro_inst|u_uart[1]|u_regs|fbrd [0];
  2951. //wire \macro_inst|u_uart[1]|u_regs|fbrd [1];
  2952. //wire \macro_inst|u_uart[1]|u_regs|fbrd [2];
  2953. //wire \macro_inst|u_uart[1]|u_regs|fbrd [3];
  2954. //wire \macro_inst|u_uart[1]|u_regs|fbrd [4];
  2955. //wire \macro_inst|u_uart[1]|u_regs|fbrd [5];
  2956. wire \macro_inst|u_uart[1]|u_regs|fbrd[5]__feeder__LutOut ;
  2957. wire [5:0] \macro_inst|u_uart[1]|u_regs|framing_error_ie ;
  2958. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [0];
  2959. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [1];
  2960. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [2];
  2961. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [3];
  2962. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [4];
  2963. wire \macro_inst|u_uart[1]|u_regs|framing_error_ie[4]__feeder__LutOut ;
  2964. //wire \macro_inst|u_uart[1]|u_regs|framing_error_ie [5];
  2965. wire [15:0] \macro_inst|u_uart[1]|u_regs|ibrd ;
  2966. //wire \macro_inst|u_uart[1]|u_regs|ibrd [0];
  2967. wire \macro_inst|u_uart[1]|u_regs|ibrd[0]~_wirecell_combout ;
  2968. //wire \macro_inst|u_uart[1]|u_regs|ibrd [10];
  2969. wire \macro_inst|u_uart[1]|u_regs|ibrd[10]__feeder__LutOut ;
  2970. //wire \macro_inst|u_uart[1]|u_regs|ibrd [11];
  2971. //wire \macro_inst|u_uart[1]|u_regs|ibrd [12];
  2972. //wire \macro_inst|u_uart[1]|u_regs|ibrd [13];
  2973. //wire \macro_inst|u_uart[1]|u_regs|ibrd [14];
  2974. //wire \macro_inst|u_uart[1]|u_regs|ibrd [15];
  2975. //wire \macro_inst|u_uart[1]|u_regs|ibrd [1];
  2976. wire \macro_inst|u_uart[1]|u_regs|ibrd[1]__feeder__LutOut ;
  2977. //wire \macro_inst|u_uart[1]|u_regs|ibrd [2];
  2978. //wire \macro_inst|u_uart[1]|u_regs|ibrd [3];
  2979. //wire \macro_inst|u_uart[1]|u_regs|ibrd [4];
  2980. wire \macro_inst|u_uart[1]|u_regs|ibrd[4]__feeder__LutOut ;
  2981. //wire \macro_inst|u_uart[1]|u_regs|ibrd [5];
  2982. wire \macro_inst|u_uart[1]|u_regs|ibrd[5]__feeder__LutOut ;
  2983. //wire \macro_inst|u_uart[1]|u_regs|ibrd [6];
  2984. wire \macro_inst|u_uart[1]|u_regs|ibrd[6]__feeder__LutOut ;
  2985. //wire \macro_inst|u_uart[1]|u_regs|ibrd [7];
  2986. //wire \macro_inst|u_uart[1]|u_regs|ibrd [8];
  2987. //wire \macro_inst|u_uart[1]|u_regs|ibrd [9];
  2988. wire [5:0] \macro_inst|u_uart[1]|u_regs|interrupts ;
  2989. //wire \macro_inst|u_uart[1]|u_regs|interrupts [0];
  2990. //wire \macro_inst|u_uart[1]|u_regs|interrupts [1];
  2991. //wire \macro_inst|u_uart[1]|u_regs|interrupts [2];
  2992. //wire \macro_inst|u_uart[1]|u_regs|interrupts [3];
  2993. //wire \macro_inst|u_uart[1]|u_regs|interrupts [4];
  2994. //wire \macro_inst|u_uart[1]|u_regs|interrupts [5];
  2995. wire \macro_inst|u_uart[1]|u_regs|interrupts~0_combout ;
  2996. wire \macro_inst|u_uart[1]|u_regs|interrupts~10_combout ;
  2997. wire \macro_inst|u_uart[1]|u_regs|interrupts~11_combout ;
  2998. wire \macro_inst|u_uart[1]|u_regs|interrupts~12_combout ;
  2999. wire \macro_inst|u_uart[1]|u_regs|interrupts~13_combout ;
  3000. wire \macro_inst|u_uart[1]|u_regs|interrupts~14_combout ;
  3001. wire \macro_inst|u_uart[1]|u_regs|interrupts~15_combout ;
  3002. wire \macro_inst|u_uart[1]|u_regs|interrupts~16_combout ;
  3003. wire \macro_inst|u_uart[1]|u_regs|interrupts~17_combout ;
  3004. wire \macro_inst|u_uart[1]|u_regs|interrupts~18_combout ;
  3005. wire \macro_inst|u_uart[1]|u_regs|interrupts~19_combout ;
  3006. wire \macro_inst|u_uart[1]|u_regs|interrupts~1_combout ;
  3007. wire \macro_inst|u_uart[1]|u_regs|interrupts~20_combout ;
  3008. wire \macro_inst|u_uart[1]|u_regs|interrupts~21_combout ;
  3009. wire \macro_inst|u_uart[1]|u_regs|interrupts~22_combout ;
  3010. wire \macro_inst|u_uart[1]|u_regs|interrupts~23_combout ;
  3011. wire \macro_inst|u_uart[1]|u_regs|interrupts~24_combout ;
  3012. wire \macro_inst|u_uart[1]|u_regs|interrupts~25_combout ;
  3013. wire \macro_inst|u_uart[1]|u_regs|interrupts~26_combout ;
  3014. wire \macro_inst|u_uart[1]|u_regs|interrupts~27_combout ;
  3015. wire \macro_inst|u_uart[1]|u_regs|interrupts~28_combout ;
  3016. wire \macro_inst|u_uart[1]|u_regs|interrupts~29_combout ;
  3017. wire \macro_inst|u_uart[1]|u_regs|interrupts~2_combout ;
  3018. wire \macro_inst|u_uart[1]|u_regs|interrupts~3_combout ;
  3019. wire \macro_inst|u_uart[1]|u_regs|interrupts~4_combout ;
  3020. wire \macro_inst|u_uart[1]|u_regs|interrupts~5_combout ;
  3021. wire \macro_inst|u_uart[1]|u_regs|interrupts~6_combout ;
  3022. wire \macro_inst|u_uart[1]|u_regs|interrupts~7_combout ;
  3023. wire \macro_inst|u_uart[1]|u_regs|interrupts~8_combout ;
  3024. wire \macro_inst|u_uart[1]|u_regs|interrupts~9_combout ;
  3025. wire \macro_inst|u_uart[1]|u_regs|lcr_eps~q ;
  3026. wire \macro_inst|u_uart[1]|u_regs|lcr_pen~q ;
  3027. wire \macro_inst|u_uart[1]|u_regs|lcr_sps__feeder__LutOut ;
  3028. wire \macro_inst|u_uart[1]|u_regs|lcr_sps~q ;
  3029. wire \macro_inst|u_uart[1]|u_regs|lcr_stp2~q ;
  3030. wire [5:0] \macro_inst|u_uart[1]|u_regs|overrun_error_ie ;
  3031. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [0];
  3032. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [1];
  3033. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [2];
  3034. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [3];
  3035. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [4];
  3036. //wire \macro_inst|u_uart[1]|u_regs|overrun_error_ie [5];
  3037. wire [5:0] \macro_inst|u_uart[1]|u_regs|parity_error_ie ;
  3038. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [0];
  3039. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [1];
  3040. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [2];
  3041. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [3];
  3042. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [4];
  3043. //wire \macro_inst|u_uart[1]|u_regs|parity_error_ie [5];
  3044. wire [5:0] \macro_inst|u_uart[1]|u_regs|rx_dma_en ;
  3045. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [0];
  3046. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout ;
  3047. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [1];
  3048. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout ;
  3049. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [2];
  3050. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[2]__feeder__LutOut ;
  3051. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout ;
  3052. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [3];
  3053. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~5_combout ;
  3054. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout ;
  3055. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [4];
  3056. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]__feeder__LutOut ;
  3057. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout ;
  3058. //wire \macro_inst|u_uart[1]|u_regs|rx_dma_en [5];
  3059. wire \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout ;
  3060. wire [5:0] \macro_inst|u_uart[1]|u_regs|rx_idle_ie ;
  3061. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [0];
  3062. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [1];
  3063. wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1]__feeder__LutOut ;
  3064. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [2];
  3065. wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2]__feeder__LutOut ;
  3066. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [3];
  3067. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [4];
  3068. //wire \macro_inst|u_uart[1]|u_regs|rx_idle_ie [5];
  3069. wire [5:0] \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie ;
  3070. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [0];
  3071. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout ;
  3072. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [1];
  3073. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~16_combout ;
  3074. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout ;
  3075. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [2];
  3076. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]__feeder__LutOut ;
  3077. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout ;
  3078. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [3];
  3079. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout ;
  3080. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [4];
  3081. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~11_combout ;
  3082. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout ;
  3083. //wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [5];
  3084. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~13_combout ;
  3085. wire \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout ;
  3086. wire [5:0] \macro_inst|u_uart[1]|u_regs|rx_read ;
  3087. //wire \macro_inst|u_uart[1]|u_regs|rx_read [0];
  3088. //wire \macro_inst|u_uart[1]|u_regs|rx_read [1];
  3089. //wire \macro_inst|u_uart[1]|u_regs|rx_read [2];
  3090. //wire \macro_inst|u_uart[1]|u_regs|rx_read [3];
  3091. //wire \macro_inst|u_uart[1]|u_regs|rx_read [4];
  3092. //wire \macro_inst|u_uart[1]|u_regs|rx_read [5];
  3093. wire \macro_inst|u_uart[1]|u_regs|rx_read~0_combout ;
  3094. wire \macro_inst|u_uart[1]|u_regs|rx_read~1_combout ;
  3095. wire \macro_inst|u_uart[1]|u_regs|rx_read~2_combout ;
  3096. wire \macro_inst|u_uart[1]|u_regs|rx_read~3_combout ;
  3097. wire \macro_inst|u_uart[1]|u_regs|rx_read~4_combout ;
  3098. wire \macro_inst|u_uart[1]|u_regs|rx_read~5_combout ;
  3099. wire [7:0] \macro_inst|u_uart[1]|u_regs|rx_reg ;
  3100. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [0];
  3101. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [1];
  3102. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [2];
  3103. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [3];
  3104. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [4];
  3105. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [5];
  3106. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [6];
  3107. //wire \macro_inst|u_uart[1]|u_regs|rx_reg [7];
  3108. wire [4:0] \macro_inst|u_uart[1]|u_regs|status_reg ;
  3109. //wire \macro_inst|u_uart[1]|u_regs|status_reg [0];
  3110. wire \macro_inst|u_uart[1]|u_regs|status_reg[0]~0_combout ;
  3111. //wire \macro_inst|u_uart[1]|u_regs|status_reg [1];
  3112. //wire \macro_inst|u_uart[1]|u_regs|status_reg [2];
  3113. wire \macro_inst|u_uart[1]|u_regs|status_reg[2]~1_combout ;
  3114. wire \macro_inst|u_uart[1]|u_regs|status_reg[2]~feeder_combout ;
  3115. //wire \macro_inst|u_uart[1]|u_regs|status_reg [3];
  3116. //wire \macro_inst|u_uart[1]|u_regs|status_reg [4];
  3117. wire [5:0] \macro_inst|u_uart[1]|u_regs|tx_complete_ie ;
  3118. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [0];
  3119. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [1];
  3120. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [2];
  3121. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [3];
  3122. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [4];
  3123. //wire \macro_inst|u_uart[1]|u_regs|tx_complete_ie [5];
  3124. wire [5:0] \macro_inst|u_uart[1]|u_regs|tx_dma_en ;
  3125. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [0];
  3126. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [1];
  3127. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [2];
  3128. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [3];
  3129. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [4];
  3130. wire \macro_inst|u_uart[1]|u_regs|tx_dma_en[4]__feeder__LutOut ;
  3131. //wire \macro_inst|u_uart[1]|u_regs|tx_dma_en [5];
  3132. wire [5:0] \macro_inst|u_uart[1]|u_regs|tx_not_full_ie ;
  3133. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [0];
  3134. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [1];
  3135. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [2];
  3136. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [3];
  3137. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [4];
  3138. //wire \macro_inst|u_uart[1]|u_regs|tx_not_full_ie [5];
  3139. wire [5:0] \macro_inst|u_uart[1]|u_regs|tx_write ;
  3140. //wire \macro_inst|u_uart[1]|u_regs|tx_write [0];
  3141. //wire \macro_inst|u_uart[1]|u_regs|tx_write [1];
  3142. //wire \macro_inst|u_uart[1]|u_regs|tx_write [2];
  3143. //wire \macro_inst|u_uart[1]|u_regs|tx_write [3];
  3144. //wire \macro_inst|u_uart[1]|u_regs|tx_write [4];
  3145. //wire \macro_inst|u_uart[1]|u_regs|tx_write [5];
  3146. wire \macro_inst|u_uart[1]|u_regs|tx_write~0_combout ;
  3147. wire \macro_inst|u_uart[1]|u_regs|tx_write~1_combout ;
  3148. wire \macro_inst|u_uart[1]|u_regs|tx_write~2_combout ;
  3149. wire \macro_inst|u_uart[1]|u_regs|tx_write~3_combout ;
  3150. wire \macro_inst|u_uart[1]|u_regs|tx_write~4_combout ;
  3151. wire \macro_inst|u_uart[1]|u_regs|tx_write~5_combout ;
  3152. wire \macro_inst|u_uart[1]|u_regs|uart_en~0_combout ;
  3153. wire \macro_inst|u_uart[1]|u_regs|uart_en~q ;
  3154. wire \macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ;
  3155. wire \macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ;
  3156. wire \macro_inst|u_uart[1]|u_rx[0]|Add4~0_combout ;
  3157. wire \macro_inst|u_uart[1]|u_rx[0]|Add4~1_combout ;
  3158. wire \macro_inst|u_uart[1]|u_rx[0]|Add4~2_combout ;
  3159. wire \macro_inst|u_uart[1]|u_rx[0]|Selector0~0_combout ;
  3160. wire \macro_inst|u_uart[1]|u_rx[0]|Selector1~0_combout ;
  3161. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ;
  3162. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~2_combout ;
  3163. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~3_combout ;
  3164. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~4_combout ;
  3165. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~5_combout ;
  3166. wire \macro_inst|u_uart[1]|u_rx[0]|Selector2~6_combout ;
  3167. wire \macro_inst|u_uart[1]|u_rx[0]|Selector3~0_combout ;
  3168. wire \macro_inst|u_uart[1]|u_rx[0]|Selector4~0_combout ;
  3169. wire \macro_inst|u_uart[1]|u_rx[0]|Selector4~1_combout ;
  3170. wire \macro_inst|u_uart[1]|u_rx[0]|Selector4~2_combout ;
  3171. wire \macro_inst|u_uart[1]|u_rx[0]|Selector4~3_combout ;
  3172. wire \macro_inst|u_uart[1]|u_rx[0]|Selector4~4_combout ;
  3173. wire \macro_inst|u_uart[1]|u_rx[0]|always11~0_combout ;
  3174. wire \macro_inst|u_uart[1]|u_rx[0]|always11~1_combout ;
  3175. wire \macro_inst|u_uart[1]|u_rx[0]|always11~2_combout ;
  3176. wire \macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ;
  3177. wire \macro_inst|u_uart[1]|u_rx[0]|always2~1_combout ;
  3178. wire \macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ;
  3179. wire \macro_inst|u_uart[1]|u_rx[0]|always3~2_combout ;
  3180. wire \macro_inst|u_uart[1]|u_rx[0]|always4~2_combout ;
  3181. wire \macro_inst|u_uart[1]|u_rx[0]|always6~1_combout ;
  3182. wire \macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ;
  3183. wire \macro_inst|u_uart[1]|u_rx[0]|always8~0_combout ;
  3184. wire \macro_inst|u_uart[1]|u_rx[0]|break_error~0_combout ;
  3185. wire \macro_inst|u_uart[1]|u_rx[0]|break_error~q ;
  3186. wire \macro_inst|u_uart[1]|u_rx[0]|framing_error~0_combout ;
  3187. wire \macro_inst|u_uart[1]|u_rx[0]|framing_error~q ;
  3188. wire \macro_inst|u_uart[1]|u_rx[0]|overrun_error~0_combout ;
  3189. wire \macro_inst|u_uart[1]|u_rx[0]|overrun_error~q ;
  3190. wire \macro_inst|u_uart[1]|u_rx[0]|parity_error~0_combout ;
  3191. wire \macro_inst|u_uart[1]|u_rx[0]|parity_error~1_combout ;
  3192. wire \macro_inst|u_uart[1]|u_rx[0]|parity_error~q ;
  3193. wire [3:0] \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt ;
  3194. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0];
  3195. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0]~4_combout ;
  3196. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0]~5 ;
  3197. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1];
  3198. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1]~6_combout ;
  3199. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1]~7 ;
  3200. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2];
  3201. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2]~8_combout ;
  3202. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2]~9 ;
  3203. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3];
  3204. wire \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3]~10_combout ;
  3205. wire \macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ;
  3206. wire [3:0] \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt ;
  3207. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0];
  3208. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1];
  3209. wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout ;
  3210. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2];
  3211. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [3];
  3212. wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~1_combout ;
  3213. wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~2_combout ;
  3214. wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~4_combout ;
  3215. wire \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~5_combout ;
  3216. wire [0:0] \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter ;
  3217. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0];
  3218. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter~0_combout ;
  3219. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0]~q ;
  3220. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1]~q ;
  3221. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2]~q ;
  3222. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3]~q ;
  3223. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4]~q ;
  3224. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5]~q ;
  3225. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6]~q ;
  3226. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7]~q ;
  3227. wire \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout ;
  3228. wire \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~0_combout ;
  3229. wire \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~q ;
  3230. wire \macro_inst|u_uart[1]|u_rx[0]|rx_idle~0_combout ;
  3231. wire \macro_inst|u_uart[1]|u_rx[0]|rx_idle~q ;
  3232. wire [4:0] \macro_inst|u_uart[1]|u_rx[0]|rx_in ;
  3233. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_in [0];
  3234. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_in [1];
  3235. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_in [2];
  3236. wire \macro_inst|u_uart[1]|u_rx[0]|rx_in[2]~feeder_combout ;
  3237. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_in [3];
  3238. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_in [4];
  3239. wire \macro_inst|u_uart[1]|u_rx[0]|rx_in[4]~0_combout ;
  3240. wire \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0_combout ;
  3241. wire \macro_inst|u_uart[1]|u_rx[0]|rx_parity~1_combout ;
  3242. wire \macro_inst|u_uart[1]|u_rx[0]|rx_parity~q ;
  3243. wire \macro_inst|u_uart[1]|u_rx[0]|rx_sample~0_combout ;
  3244. wire [7:0] \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg ;
  3245. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [0];
  3246. wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0]~feeder_combout ;
  3247. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1];
  3248. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2];
  3249. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [3];
  3250. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4];
  3251. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5];
  3252. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [6];
  3253. //wire \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7];
  3254. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ;
  3255. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ;
  3256. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0_combout ;
  3257. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~1_combout ;
  3258. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ;
  3259. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ;
  3260. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0_combout ;
  3261. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~1_combout ;
  3262. wire \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ;
  3263. wire \macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ;
  3264. wire \macro_inst|u_uart[1]|u_rx[1]|Add4~0_combout ;
  3265. wire \macro_inst|u_uart[1]|u_rx[1]|Add4~1_combout ;
  3266. wire \macro_inst|u_uart[1]|u_rx[1]|Add4~2_combout ;
  3267. wire \macro_inst|u_uart[1]|u_rx[1]|Selector0~0_combout ;
  3268. wire \macro_inst|u_uart[1]|u_rx[1]|Selector1~0_combout ;
  3269. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ;
  3270. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~2_combout ;
  3271. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~3_combout ;
  3272. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~4_combout ;
  3273. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~5_combout ;
  3274. wire \macro_inst|u_uart[1]|u_rx[1]|Selector2~6_combout ;
  3275. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~0_combout ;
  3276. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~1_combout ;
  3277. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~2_combout ;
  3278. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~3_combout ;
  3279. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~4_combout ;
  3280. wire \macro_inst|u_uart[1]|u_rx[1]|Selector4~5_combout ;
  3281. wire \macro_inst|u_uart[1]|u_rx[1]|always10~1_combout ;
  3282. wire \macro_inst|u_uart[1]|u_rx[1]|always10~2_combout ;
  3283. wire \macro_inst|u_uart[1]|u_rx[1]|always11~0_combout ;
  3284. wire \macro_inst|u_uart[1]|u_rx[1]|always11~1_combout ;
  3285. wire \macro_inst|u_uart[1]|u_rx[1]|always11~2_combout ;
  3286. wire \macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ;
  3287. wire \macro_inst|u_uart[1]|u_rx[1]|always2~1_combout ;
  3288. wire \macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ;
  3289. wire \macro_inst|u_uart[1]|u_rx[1]|always3~2_combout ;
  3290. wire \macro_inst|u_uart[1]|u_rx[1]|always4~2_combout ;
  3291. wire \macro_inst|u_uart[1]|u_rx[1]|always6~1_combout ;
  3292. wire \macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ;
  3293. wire \macro_inst|u_uart[1]|u_rx[1]|always8~0_combout ;
  3294. wire \macro_inst|u_uart[1]|u_rx[1]|break_error~0_combout ;
  3295. wire \macro_inst|u_uart[1]|u_rx[1]|break_error~q ;
  3296. wire \macro_inst|u_uart[1]|u_rx[1]|framing_error~0_combout ;
  3297. wire \macro_inst|u_uart[1]|u_rx[1]|framing_error~q ;
  3298. wire \macro_inst|u_uart[1]|u_rx[1]|overrun_error~0_combout ;
  3299. wire \macro_inst|u_uart[1]|u_rx[1]|overrun_error~q ;
  3300. wire \macro_inst|u_uart[1]|u_rx[1]|parity_error~0_combout ;
  3301. wire \macro_inst|u_uart[1]|u_rx[1]|parity_error~q ;
  3302. wire [3:0] \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt ;
  3303. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0];
  3304. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0]~4_combout ;
  3305. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0]~5 ;
  3306. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1];
  3307. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1]~6_combout ;
  3308. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1]~7 ;
  3309. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2];
  3310. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2]~8_combout ;
  3311. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2]~9 ;
  3312. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3];
  3313. wire \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3]~10_combout ;
  3314. wire \macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ;
  3315. wire [3:0] \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt ;
  3316. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0];
  3317. wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout ;
  3318. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1];
  3319. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2];
  3320. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [3];
  3321. wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~1_combout ;
  3322. wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~2_combout ;
  3323. wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~4_combout ;
  3324. wire \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~5_combout ;
  3325. wire [0:0] \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter ;
  3326. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0];
  3327. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter~0_combout ;
  3328. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~feeder_combout ;
  3329. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~q ;
  3330. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~feeder_combout ;
  3331. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~q ;
  3332. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~feeder_combout ;
  3333. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~q ;
  3334. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~feeder_combout ;
  3335. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~q ;
  3336. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~feeder_combout ;
  3337. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~q ;
  3338. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~feeder_combout ;
  3339. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~q ;
  3340. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~feeder_combout ;
  3341. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~q ;
  3342. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~feeder_combout ;
  3343. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~q ;
  3344. wire \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout ;
  3345. wire \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~0_combout ;
  3346. wire \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~q ;
  3347. wire \macro_inst|u_uart[1]|u_rx[1]|rx_idle~0_combout ;
  3348. wire \macro_inst|u_uart[1]|u_rx[1]|rx_idle~q ;
  3349. wire [4:0] \macro_inst|u_uart[1]|u_rx[1]|rx_in ;
  3350. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_in [0];
  3351. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_in [1];
  3352. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_in [2];
  3353. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_in [3];
  3354. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_in [4];
  3355. wire \macro_inst|u_uart[1]|u_rx[1]|rx_in[4]~0_combout ;
  3356. wire \macro_inst|u_uart[1]|u_rx[1]|rx_parity~0_combout ;
  3357. wire \macro_inst|u_uart[1]|u_rx[1]|rx_parity~1_combout ;
  3358. wire \macro_inst|u_uart[1]|u_rx[1]|rx_parity~q ;
  3359. wire \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0_combout ;
  3360. wire [7:0] \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg ;
  3361. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [0];
  3362. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1];
  3363. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2];
  3364. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3];
  3365. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [4];
  3366. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5];
  3367. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6];
  3368. //wire \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7];
  3369. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ;
  3370. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ;
  3371. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~0_combout ;
  3372. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~1_combout ;
  3373. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ;
  3374. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ;
  3375. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0_combout ;
  3376. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~1_combout ;
  3377. wire \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ;
  3378. wire \macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ;
  3379. wire \macro_inst|u_uart[1]|u_rx[2]|Add4~0_combout ;
  3380. wire \macro_inst|u_uart[1]|u_rx[2]|Add4~1_combout ;
  3381. wire \macro_inst|u_uart[1]|u_rx[2]|Add4~2_combout ;
  3382. wire \macro_inst|u_uart[1]|u_rx[2]|Selector0~0_combout ;
  3383. wire \macro_inst|u_uart[1]|u_rx[2]|Selector1~0_combout ;
  3384. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ;
  3385. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~2_combout ;
  3386. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~3_combout ;
  3387. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~4_combout ;
  3388. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~5_combout ;
  3389. wire \macro_inst|u_uart[1]|u_rx[2]|Selector2~6_combout ;
  3390. wire \macro_inst|u_uart[1]|u_rx[2]|Selector3~0_combout ;
  3391. wire \macro_inst|u_uart[1]|u_rx[2]|Selector3~1_combout ;
  3392. wire \macro_inst|u_uart[1]|u_rx[2]|Selector4~0_combout ;
  3393. wire \macro_inst|u_uart[1]|u_rx[2]|Selector4~1_combout ;
  3394. wire \macro_inst|u_uart[1]|u_rx[2]|Selector4~2_combout ;
  3395. wire \macro_inst|u_uart[1]|u_rx[2]|Selector4~3_combout ;
  3396. wire \macro_inst|u_uart[1]|u_rx[2]|Selector4~4_combout ;
  3397. wire \macro_inst|u_uart[1]|u_rx[2]|always10~1_combout ;
  3398. wire \macro_inst|u_uart[1]|u_rx[2]|always10~2_combout ;
  3399. wire \macro_inst|u_uart[1]|u_rx[2]|always11~0_combout ;
  3400. wire \macro_inst|u_uart[1]|u_rx[2]|always11~1_combout ;
  3401. wire \macro_inst|u_uart[1]|u_rx[2]|always11~2_combout ;
  3402. wire \macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ;
  3403. wire \macro_inst|u_uart[1]|u_rx[2]|always2~1_combout ;
  3404. wire \macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ;
  3405. wire \macro_inst|u_uart[1]|u_rx[2]|always3~2_combout ;
  3406. wire \macro_inst|u_uart[1]|u_rx[2]|always4~2_combout ;
  3407. wire \macro_inst|u_uart[1]|u_rx[2]|always6~1_combout ;
  3408. wire \macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ;
  3409. wire \macro_inst|u_uart[1]|u_rx[2]|always8~0_combout ;
  3410. wire \macro_inst|u_uart[1]|u_rx[2]|break_error~0_combout ;
  3411. wire \macro_inst|u_uart[1]|u_rx[2]|break_error~q ;
  3412. wire \macro_inst|u_uart[1]|u_rx[2]|framing_error~0_combout ;
  3413. wire \macro_inst|u_uart[1]|u_rx[2]|framing_error~q ;
  3414. wire \macro_inst|u_uart[1]|u_rx[2]|overrun_error~0_combout ;
  3415. wire \macro_inst|u_uart[1]|u_rx[2]|overrun_error~q ;
  3416. wire \macro_inst|u_uart[1]|u_rx[2]|parity_error~0_combout ;
  3417. wire \macro_inst|u_uart[1]|u_rx[2]|parity_error~q ;
  3418. wire [3:0] \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt ;
  3419. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0];
  3420. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0]~4_combout ;
  3421. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0]~5 ;
  3422. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1];
  3423. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1]~6_combout ;
  3424. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1]~7 ;
  3425. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2];
  3426. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2]~8_combout ;
  3427. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2]~9 ;
  3428. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3];
  3429. wire \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3]~10_combout ;
  3430. wire \macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ;
  3431. wire [3:0] \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt ;
  3432. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0];
  3433. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1];
  3434. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2];
  3435. wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout ;
  3436. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [3];
  3437. wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~1_combout ;
  3438. wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~2_combout ;
  3439. wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~4_combout ;
  3440. wire \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~5_combout ;
  3441. wire [0:0] \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter ;
  3442. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0];
  3443. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter~0_combout ;
  3444. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0]~q ;
  3445. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~feeder_combout ;
  3446. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~q ;
  3447. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~feeder_combout ;
  3448. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~q ;
  3449. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3]~q ;
  3450. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~feeder_combout ;
  3451. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~q ;
  3452. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~feeder_combout ;
  3453. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~q ;
  3454. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6]~q ;
  3455. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~feeder_combout ;
  3456. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~q ;
  3457. wire \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout ;
  3458. wire \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~0_combout ;
  3459. wire \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~q ;
  3460. wire \macro_inst|u_uart[1]|u_rx[2]|rx_idle~0_combout ;
  3461. wire \macro_inst|u_uart[1]|u_rx[2]|rx_idle~q ;
  3462. wire [4:0] \macro_inst|u_uart[1]|u_rx[2]|rx_in ;
  3463. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_in [0];
  3464. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_in [1];
  3465. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_in [2];
  3466. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_in [3];
  3467. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_in [4];
  3468. wire \macro_inst|u_uart[1]|u_rx[2]|rx_in[4]~0_combout ;
  3469. wire \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0_combout ;
  3470. wire \macro_inst|u_uart[1]|u_rx[2]|rx_parity~1_combout ;
  3471. wire \macro_inst|u_uart[1]|u_rx[2]|rx_parity~q ;
  3472. wire \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0_combout ;
  3473. wire [7:0] \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg ;
  3474. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [0];
  3475. wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0]~feeder_combout ;
  3476. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1];
  3477. wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1]~feeder_combout ;
  3478. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2];
  3479. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [3];
  3480. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4];
  3481. wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4]~feeder_combout ;
  3482. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5];
  3483. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [6];
  3484. //wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7];
  3485. wire \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7]~feeder_combout ;
  3486. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ;
  3487. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ;
  3488. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0_combout ;
  3489. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~1_combout ;
  3490. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ;
  3491. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ;
  3492. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0_combout ;
  3493. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~1_combout ;
  3494. wire \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ;
  3495. wire \macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ;
  3496. wire \macro_inst|u_uart[1]|u_rx[3]|Add4~0_combout ;
  3497. wire \macro_inst|u_uart[1]|u_rx[3]|Add4~1_combout ;
  3498. wire \macro_inst|u_uart[1]|u_rx[3]|Add4~2_combout ;
  3499. wire \macro_inst|u_uart[1]|u_rx[3]|Selector0~0_combout ;
  3500. wire \macro_inst|u_uart[1]|u_rx[3]|Selector1~0_combout ;
  3501. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ;
  3502. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~2_combout ;
  3503. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~3_combout ;
  3504. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~4_combout ;
  3505. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~5_combout ;
  3506. wire \macro_inst|u_uart[1]|u_rx[3]|Selector2~6_combout ;
  3507. wire \macro_inst|u_uart[1]|u_rx[3]|Selector3~0_combout ;
  3508. wire \macro_inst|u_uart[1]|u_rx[3]|Selector4~0_combout ;
  3509. wire \macro_inst|u_uart[1]|u_rx[3]|Selector4~1_combout ;
  3510. wire \macro_inst|u_uart[1]|u_rx[3]|Selector4~2_combout ;
  3511. wire \macro_inst|u_uart[1]|u_rx[3]|Selector4~3_combout ;
  3512. wire \macro_inst|u_uart[1]|u_rx[3]|Selector4~4_combout ;
  3513. wire \macro_inst|u_uart[1]|u_rx[3]|always11~0_combout ;
  3514. wire \macro_inst|u_uart[1]|u_rx[3]|always11~1_combout ;
  3515. wire \macro_inst|u_uart[1]|u_rx[3]|always11~2_combout ;
  3516. wire \macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ;
  3517. wire \macro_inst|u_uart[1]|u_rx[3]|always2~1_combout ;
  3518. wire \macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ;
  3519. wire \macro_inst|u_uart[1]|u_rx[3]|always3~2_combout ;
  3520. wire \macro_inst|u_uart[1]|u_rx[3]|always4~2_combout ;
  3521. wire \macro_inst|u_uart[1]|u_rx[3]|always6~1_combout ;
  3522. wire \macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ;
  3523. wire \macro_inst|u_uart[1]|u_rx[3]|always8~0_combout ;
  3524. wire \macro_inst|u_uart[1]|u_rx[3]|break_error~0_combout ;
  3525. wire \macro_inst|u_uart[1]|u_rx[3]|break_error~q ;
  3526. wire \macro_inst|u_uart[1]|u_rx[3]|framing_error~0_combout ;
  3527. wire \macro_inst|u_uart[1]|u_rx[3]|framing_error~q ;
  3528. wire \macro_inst|u_uart[1]|u_rx[3]|overrun_error~0_combout ;
  3529. wire \macro_inst|u_uart[1]|u_rx[3]|overrun_error~q ;
  3530. wire \macro_inst|u_uart[1]|u_rx[3]|parity_error~0_combout ;
  3531. wire \macro_inst|u_uart[1]|u_rx[3]|parity_error~1_combout ;
  3532. wire \macro_inst|u_uart[1]|u_rx[3]|parity_error~q ;
  3533. wire [3:0] \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt ;
  3534. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0];
  3535. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0]~4_combout ;
  3536. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0]~5 ;
  3537. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1];
  3538. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1]~6_combout ;
  3539. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1]~7 ;
  3540. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2];
  3541. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2]~8_combout ;
  3542. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2]~9 ;
  3543. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3];
  3544. wire \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3]~10_combout ;
  3545. wire \macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ;
  3546. wire [3:0] \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt ;
  3547. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0];
  3548. wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout ;
  3549. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1];
  3550. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2];
  3551. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [3];
  3552. wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~1_combout ;
  3553. wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~2_combout ;
  3554. wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~4_combout ;
  3555. wire \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~5_combout ;
  3556. wire [0:0] \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter ;
  3557. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0];
  3558. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter~0_combout ;
  3559. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0]~q ;
  3560. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1]~q ;
  3561. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2]~q ;
  3562. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3]~q ;
  3563. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4]~q ;
  3564. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5]~q ;
  3565. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6]~q ;
  3566. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7]~q ;
  3567. wire \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout ;
  3568. wire \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~0_combout ;
  3569. wire \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~q ;
  3570. wire \macro_inst|u_uart[1]|u_rx[3]|rx_idle~0_combout ;
  3571. wire \macro_inst|u_uart[1]|u_rx[3]|rx_idle~q ;
  3572. wire [4:0] \macro_inst|u_uart[1]|u_rx[3]|rx_in ;
  3573. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_in [0];
  3574. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_in [1];
  3575. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_in [2];
  3576. wire \macro_inst|u_uart[1]|u_rx[3]|rx_in[2]~feeder_combout ;
  3577. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_in [3];
  3578. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_in [4];
  3579. wire \macro_inst|u_uart[1]|u_rx[3]|rx_in[4]~0_combout ;
  3580. wire \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0_combout ;
  3581. wire \macro_inst|u_uart[1]|u_rx[3]|rx_parity~1_combout ;
  3582. wire \macro_inst|u_uart[1]|u_rx[3]|rx_parity~q ;
  3583. wire \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0_combout ;
  3584. wire [7:0] \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg ;
  3585. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [0];
  3586. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1];
  3587. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [2];
  3588. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3];
  3589. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [4];
  3590. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5];
  3591. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6];
  3592. //wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7];
  3593. wire \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7]~feeder_combout ;
  3594. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ;
  3595. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ;
  3596. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~0_combout ;
  3597. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~1_combout ;
  3598. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ;
  3599. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ;
  3600. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0_combout ;
  3601. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~1_combout ;
  3602. wire \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ;
  3603. wire \macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ;
  3604. wire \macro_inst|u_uart[1]|u_rx[4]|Add4~0_combout ;
  3605. wire \macro_inst|u_uart[1]|u_rx[4]|Add4~1_combout ;
  3606. wire \macro_inst|u_uart[1]|u_rx[4]|Add4~2_combout ;
  3607. wire \macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ;
  3608. wire \macro_inst|u_uart[1]|u_rx[4]|Selector0~2_combout ;
  3609. wire \macro_inst|u_uart[1]|u_rx[4]|Selector0~3_combout ;
  3610. wire \macro_inst|u_uart[1]|u_rx[4]|Selector0~4_combout ;
  3611. wire \macro_inst|u_uart[1]|u_rx[4]|Selector1~0_combout ;
  3612. wire \macro_inst|u_uart[1]|u_rx[4]|Selector2~0_combout ;
  3613. wire \macro_inst|u_uart[1]|u_rx[4]|Selector2~1_combout ;
  3614. wire \macro_inst|u_uart[1]|u_rx[4]|Selector2~2_combout ;
  3615. wire \macro_inst|u_uart[1]|u_rx[4]|Selector3~0_combout ;
  3616. wire \macro_inst|u_uart[1]|u_rx[4]|Selector4~0_combout ;
  3617. wire \macro_inst|u_uart[1]|u_rx[4]|Selector4~1_combout ;
  3618. wire \macro_inst|u_uart[1]|u_rx[4]|Selector4~2_combout ;
  3619. wire \macro_inst|u_uart[1]|u_rx[4]|Selector4~3_combout ;
  3620. wire \macro_inst|u_uart[1]|u_rx[4]|Selector4~4_combout ;
  3621. wire \macro_inst|u_uart[1]|u_rx[4]|always11~0_combout ;
  3622. wire \macro_inst|u_uart[1]|u_rx[4]|always11~1_combout ;
  3623. wire \macro_inst|u_uart[1]|u_rx[4]|always11~2_combout ;
  3624. wire \macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ;
  3625. wire \macro_inst|u_uart[1]|u_rx[4]|always2~1_combout ;
  3626. wire \macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ;
  3627. wire \macro_inst|u_uart[1]|u_rx[4]|always3~2_combout ;
  3628. wire \macro_inst|u_uart[1]|u_rx[4]|always4~2_combout ;
  3629. wire \macro_inst|u_uart[1]|u_rx[4]|always6~1_combout ;
  3630. wire \macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ;
  3631. wire \macro_inst|u_uart[1]|u_rx[4]|always8~0_combout ;
  3632. wire \macro_inst|u_uart[1]|u_rx[4]|break_error~0_combout ;
  3633. wire \macro_inst|u_uart[1]|u_rx[4]|break_error~q ;
  3634. wire \macro_inst|u_uart[1]|u_rx[4]|framing_error~0_combout ;
  3635. wire \macro_inst|u_uart[1]|u_rx[4]|framing_error~q ;
  3636. wire \macro_inst|u_uart[1]|u_rx[4]|overrun_error~0_combout ;
  3637. wire \macro_inst|u_uart[1]|u_rx[4]|overrun_error~q ;
  3638. wire \macro_inst|u_uart[1]|u_rx[4]|parity_error~0_combout ;
  3639. wire \macro_inst|u_uart[1]|u_rx[4]|parity_error~1_combout ;
  3640. wire \macro_inst|u_uart[1]|u_rx[4]|parity_error~q ;
  3641. wire [3:0] \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt ;
  3642. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0];
  3643. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0]~4_combout ;
  3644. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0]~5 ;
  3645. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1];
  3646. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1]~6_combout ;
  3647. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1]~7 ;
  3648. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2];
  3649. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2]~8_combout ;
  3650. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2]~9 ;
  3651. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3];
  3652. wire \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3]~10_combout ;
  3653. wire \macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ;
  3654. wire [3:0] \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt ;
  3655. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0];
  3656. wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout ;
  3657. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1];
  3658. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2];
  3659. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [3];
  3660. wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~1_combout ;
  3661. wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~2_combout ;
  3662. wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~4_combout ;
  3663. wire \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~5_combout ;
  3664. wire [0:0] \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter ;
  3665. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0];
  3666. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter~0_combout ;
  3667. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0]~q ;
  3668. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1]~q ;
  3669. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2]~q ;
  3670. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3]~q ;
  3671. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4]~q ;
  3672. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5]~q ;
  3673. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6]~q ;
  3674. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7]~q ;
  3675. wire \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout ;
  3676. wire \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~0_combout ;
  3677. wire \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~q ;
  3678. wire \macro_inst|u_uart[1]|u_rx[4]|rx_idle~0_combout ;
  3679. wire \macro_inst|u_uart[1]|u_rx[4]|rx_idle~q ;
  3680. wire [4:0] \macro_inst|u_uart[1]|u_rx[4]|rx_in ;
  3681. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_in [0];
  3682. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_in [1];
  3683. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_in [2];
  3684. wire \macro_inst|u_uart[1]|u_rx[4]|rx_in[2]~feeder_combout ;
  3685. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_in [3];
  3686. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_in [4];
  3687. wire \macro_inst|u_uart[1]|u_rx[4]|rx_in[4]~0_combout ;
  3688. wire \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0_combout ;
  3689. wire \macro_inst|u_uart[1]|u_rx[4]|rx_parity~1_combout ;
  3690. wire \macro_inst|u_uart[1]|u_rx[4]|rx_parity~q ;
  3691. wire \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0_combout ;
  3692. wire [7:0] \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg ;
  3693. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [0];
  3694. wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0]~feeder_combout ;
  3695. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1];
  3696. wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1]~feeder_combout ;
  3697. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2];
  3698. wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2]~feeder_combout ;
  3699. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [3];
  3700. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4];
  3701. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5];
  3702. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6];
  3703. wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6]~feeder_combout ;
  3704. //wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7];
  3705. wire \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7]~feeder_combout ;
  3706. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ;
  3707. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ;
  3708. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~0_combout ;
  3709. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~1_combout ;
  3710. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ;
  3711. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ;
  3712. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0_combout ;
  3713. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~1_combout ;
  3714. wire \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ;
  3715. wire \macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ;
  3716. wire \macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ;
  3717. wire \macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ;
  3718. wire \macro_inst|u_uart[1]|u_rx[5]|Add4~0_combout ;
  3719. wire \macro_inst|u_uart[1]|u_rx[5]|Add4~1_combout ;
  3720. wire \macro_inst|u_uart[1]|u_rx[5]|Add4~2_combout ;
  3721. wire \macro_inst|u_uart[1]|u_rx[5]|Selector0~0_combout ;
  3722. wire \macro_inst|u_uart[1]|u_rx[5]|Selector1~0_combout ;
  3723. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ;
  3724. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~2_combout ;
  3725. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~3_combout ;
  3726. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~4_combout ;
  3727. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~5_combout ;
  3728. wire \macro_inst|u_uart[1]|u_rx[5]|Selector2~6_combout ;
  3729. wire \macro_inst|u_uart[1]|u_rx[5]|Selector3~0_combout ;
  3730. wire \macro_inst|u_uart[1]|u_rx[5]|Selector3~1_combout ;
  3731. wire \macro_inst|u_uart[1]|u_rx[5]|Selector4~0_combout ;
  3732. wire \macro_inst|u_uart[1]|u_rx[5]|Selector4~1_combout ;
  3733. wire \macro_inst|u_uart[1]|u_rx[5]|Selector4~2_combout ;
  3734. wire \macro_inst|u_uart[1]|u_rx[5]|Selector4~3_combout ;
  3735. wire \macro_inst|u_uart[1]|u_rx[5]|Selector4~4_combout ;
  3736. wire \macro_inst|u_uart[1]|u_rx[5]|always11~0_combout ;
  3737. wire \macro_inst|u_uart[1]|u_rx[5]|always11~1_combout ;
  3738. wire \macro_inst|u_uart[1]|u_rx[5]|always11~2_combout ;
  3739. wire \macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ;
  3740. wire \macro_inst|u_uart[1]|u_rx[5]|always2~1_combout ;
  3741. wire \macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ;
  3742. wire \macro_inst|u_uart[1]|u_rx[5]|always3~2_combout ;
  3743. wire \macro_inst|u_uart[1]|u_rx[5]|always4~2_combout ;
  3744. wire \macro_inst|u_uart[1]|u_rx[5]|always6~1_combout ;
  3745. wire \macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ;
  3746. wire \macro_inst|u_uart[1]|u_rx[5]|always8~0_combout ;
  3747. wire \macro_inst|u_uart[1]|u_rx[5]|break_error~0_combout ;
  3748. wire \macro_inst|u_uart[1]|u_rx[5]|break_error~q ;
  3749. wire \macro_inst|u_uart[1]|u_rx[5]|framing_error~0_combout ;
  3750. wire \macro_inst|u_uart[1]|u_rx[5]|framing_error~q ;
  3751. wire \macro_inst|u_uart[1]|u_rx[5]|overrun_error~0_combout ;
  3752. wire \macro_inst|u_uart[1]|u_rx[5]|overrun_error~q ;
  3753. wire \macro_inst|u_uart[1]|u_rx[5]|parity_error~0_combout ;
  3754. wire \macro_inst|u_uart[1]|u_rx[5]|parity_error~1_combout ;
  3755. wire \macro_inst|u_uart[1]|u_rx[5]|parity_error~q ;
  3756. wire [3:0] \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt ;
  3757. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0];
  3758. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0]~4_combout ;
  3759. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0]~5 ;
  3760. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1];
  3761. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1]~6_combout ;
  3762. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1]~7 ;
  3763. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2];
  3764. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2]~8_combout ;
  3765. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2]~9 ;
  3766. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3];
  3767. wire \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3]~10_combout ;
  3768. wire \macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ;
  3769. wire [3:0] \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt ;
  3770. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0];
  3771. wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout ;
  3772. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1];
  3773. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2];
  3774. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [3];
  3775. wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~1_combout ;
  3776. wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~2_combout ;
  3777. wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~4_combout ;
  3778. wire \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~5_combout ;
  3779. wire [0:0] \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter ;
  3780. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0];
  3781. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter~0_combout ;
  3782. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~feeder_combout ;
  3783. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~q ;
  3784. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~feeder_combout ;
  3785. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~q ;
  3786. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2]~q ;
  3787. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~feeder_combout ;
  3788. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~q ;
  3789. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~feeder_combout ;
  3790. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~q ;
  3791. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~feeder_combout ;
  3792. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~q ;
  3793. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~feeder_combout ;
  3794. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~q ;
  3795. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7]~q ;
  3796. wire \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout ;
  3797. wire \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~0_combout ;
  3798. wire \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~q ;
  3799. wire \macro_inst|u_uart[1]|u_rx[5]|rx_idle~0_combout ;
  3800. wire \macro_inst|u_uart[1]|u_rx[5]|rx_idle~q ;
  3801. wire [4:0] \macro_inst|u_uart[1]|u_rx[5]|rx_in ;
  3802. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_in [0];
  3803. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_in [1];
  3804. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_in [2];
  3805. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_in [3];
  3806. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_in [4];
  3807. wire \macro_inst|u_uart[1]|u_rx[5]|rx_in[4]~0_combout ;
  3808. wire \macro_inst|u_uart[1]|u_rx[5]|rx_parity~0_combout ;
  3809. wire \macro_inst|u_uart[1]|u_rx[5]|rx_parity~1_combout ;
  3810. wire \macro_inst|u_uart[1]|u_rx[5]|rx_parity~q ;
  3811. wire \macro_inst|u_uart[1]|u_rx[5]|rx_sample~0_combout ;
  3812. wire [7:0] \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg ;
  3813. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [0];
  3814. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1];
  3815. wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1]~feeder_combout ;
  3816. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2];
  3817. wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2]~feeder_combout ;
  3818. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3];
  3819. wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3]~feeder_combout ;
  3820. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [4];
  3821. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5];
  3822. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6];
  3823. //wire \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7];
  3824. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ;
  3825. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ;
  3826. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0_combout ;
  3827. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~1_combout ;
  3828. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ;
  3829. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ;
  3830. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0_combout ;
  3831. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~1_combout ;
  3832. wire \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ;
  3833. wire \macro_inst|u_uart[1]|u_tx[0]|Selector0~0_combout ;
  3834. wire \macro_inst|u_uart[1]|u_tx[0]|Selector2~0_combout ;
  3835. wire \macro_inst|u_uart[1]|u_tx[0]|Selector3~0_combout ;
  3836. wire \macro_inst|u_uart[1]|u_tx[0]|Selector3~1_combout ;
  3837. wire \macro_inst|u_uart[1]|u_tx[0]|Selector4~0_combout ;
  3838. wire \macro_inst|u_uart[1]|u_tx[0]|Selector4~1_combout ;
  3839. wire \macro_inst|u_uart[1]|u_tx[0]|Selector5~2_combout ;
  3840. wire \macro_inst|u_uart[1]|u_tx[0]|Selector5~3_combout ;
  3841. wire \macro_inst|u_uart[1]|u_tx[0]|Selector5~4_combout ;
  3842. wire \macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ;
  3843. wire \macro_inst|u_uart[1]|u_tx[0]|always6~0_combout ;
  3844. wire \macro_inst|u_uart[1]|u_tx[0]|always6~1_combout ;
  3845. wire \macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ;
  3846. wire \macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ;
  3847. wire [3:0] \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt ;
  3848. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [0];
  3849. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0]~4_combout ;
  3850. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0]~5 ;
  3851. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [1];
  3852. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1]~6_combout ;
  3853. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1]~7 ;
  3854. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [2];
  3855. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2]~8_combout ;
  3856. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2]~9 ;
  3857. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [3];
  3858. wire \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3]~10_combout ;
  3859. wire \macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ;
  3860. wire \macro_inst|u_uart[1]|u_tx[0]|tx_complete~0_combout ;
  3861. wire \macro_inst|u_uart[1]|u_tx[0]|tx_complete~q ;
  3862. wire [2:0] \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt ;
  3863. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0];
  3864. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [1];
  3865. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [2];
  3866. wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout ;
  3867. wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~0_combout ;
  3868. wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~2_combout ;
  3869. wire \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~3_combout ;
  3870. wire [0:0] \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter ;
  3871. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0];
  3872. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter~0_combout ;
  3873. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  3874. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]~q ;
  3875. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  3876. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]~q ;
  3877. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  3878. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]~q ;
  3879. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3]~q ;
  3880. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  3881. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]~q ;
  3882. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  3883. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]~q ;
  3884. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  3885. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]~q ;
  3886. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  3887. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]~q ;
  3888. wire \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout ;
  3889. wire \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0_combout ;
  3890. wire \macro_inst|u_uart[1]|u_tx[0]|tx_parity~1_combout ;
  3891. wire \macro_inst|u_uart[1]|u_tx[0]|tx_parity~q ;
  3892. wire [7:0] \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg ;
  3893. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0];
  3894. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [1];
  3895. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [2];
  3896. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [3];
  3897. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [4];
  3898. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [5];
  3899. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout ;
  3900. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [6];
  3901. //wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [7];
  3902. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~0_combout ;
  3903. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~2_combout ;
  3904. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~3_combout ;
  3905. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~4_combout ;
  3906. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~5_combout ;
  3907. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~6_combout ;
  3908. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~7_combout ;
  3909. wire \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~8_combout ;
  3910. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ;
  3911. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ;
  3912. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ;
  3913. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0_combout ;
  3914. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~1_combout ;
  3915. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ;
  3916. wire \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ;
  3917. wire \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0_combout ;
  3918. wire \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~1_combout ;
  3919. wire \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ;
  3920. wire \macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout ;
  3921. wire \macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ;
  3922. wire \macro_inst|u_uart[1]|u_tx[0]|uart_txd~q ;
  3923. wire \macro_inst|u_uart[1]|u_tx[1]|Selector0~0_combout ;
  3924. wire \macro_inst|u_uart[1]|u_tx[1]|Selector2~0_combout ;
  3925. wire \macro_inst|u_uart[1]|u_tx[1]|Selector3~0_combout ;
  3926. wire \macro_inst|u_uart[1]|u_tx[1]|Selector3~1_combout ;
  3927. wire \macro_inst|u_uart[1]|u_tx[1]|Selector4~0_combout ;
  3928. wire \macro_inst|u_uart[1]|u_tx[1]|Selector4~1_combout ;
  3929. wire \macro_inst|u_uart[1]|u_tx[1]|Selector5~2_combout ;
  3930. wire \macro_inst|u_uart[1]|u_tx[1]|Selector5~3_combout ;
  3931. wire \macro_inst|u_uart[1]|u_tx[1]|Selector5~4_combout ;
  3932. wire \macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ;
  3933. wire \macro_inst|u_uart[1]|u_tx[1]|always6~0_combout ;
  3934. wire \macro_inst|u_uart[1]|u_tx[1]|always6~1_combout ;
  3935. wire \macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ;
  3936. wire \macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ;
  3937. wire [3:0] \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt ;
  3938. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [0];
  3939. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0]~4_combout ;
  3940. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0]~5 ;
  3941. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [1];
  3942. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1]~6_combout ;
  3943. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1]~7 ;
  3944. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [2];
  3945. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2]~8_combout ;
  3946. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2]~9 ;
  3947. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [3];
  3948. wire \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3]~10_combout ;
  3949. wire \macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ;
  3950. wire \macro_inst|u_uart[1]|u_tx[1]|tx_complete~0_combout ;
  3951. wire \macro_inst|u_uart[1]|u_tx[1]|tx_complete~q ;
  3952. wire [2:0] \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt ;
  3953. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0];
  3954. wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout ;
  3955. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [1];
  3956. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [2];
  3957. wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~0_combout ;
  3958. wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~2_combout ;
  3959. wire \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~3_combout ;
  3960. wire [0:0] \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter ;
  3961. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0];
  3962. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter~0_combout ;
  3963. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  3964. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]~q ;
  3965. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1]~q ;
  3966. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  3967. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]~q ;
  3968. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3]~q ;
  3969. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  3970. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]~q ;
  3971. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  3972. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]~q ;
  3973. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  3974. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]~q ;
  3975. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7]~q ;
  3976. wire \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout ;
  3977. wire \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0_combout ;
  3978. wire \macro_inst|u_uart[1]|u_tx[1]|tx_parity~1_combout ;
  3979. wire \macro_inst|u_uart[1]|u_tx[1]|tx_parity~q ;
  3980. wire [7:0] \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg ;
  3981. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0];
  3982. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [1];
  3983. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [2];
  3984. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [3];
  3985. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [4];
  3986. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [5];
  3987. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [6];
  3988. //wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [7];
  3989. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout ;
  3990. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~0_combout ;
  3991. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~2_combout ;
  3992. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~3_combout ;
  3993. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~4_combout ;
  3994. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~5_combout ;
  3995. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~6_combout ;
  3996. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~7_combout ;
  3997. wire \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~8_combout ;
  3998. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ;
  3999. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ;
  4000. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ;
  4001. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0_combout ;
  4002. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~1_combout ;
  4003. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ;
  4004. wire \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ;
  4005. wire \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0_combout ;
  4006. wire \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~1_combout ;
  4007. wire \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ;
  4008. wire \macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout ;
  4009. wire \macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ;
  4010. wire \macro_inst|u_uart[1]|u_tx[1]|uart_txd~q ;
  4011. wire \macro_inst|u_uart[1]|u_tx[2]|Selector0~0_combout ;
  4012. wire \macro_inst|u_uart[1]|u_tx[2]|Selector2~0_combout ;
  4013. wire \macro_inst|u_uart[1]|u_tx[2]|Selector3~0_combout ;
  4014. wire \macro_inst|u_uart[1]|u_tx[2]|Selector3~1_combout ;
  4015. wire \macro_inst|u_uart[1]|u_tx[2]|Selector4~0_combout ;
  4016. wire \macro_inst|u_uart[1]|u_tx[2]|Selector4~1_combout ;
  4017. wire \macro_inst|u_uart[1]|u_tx[2]|Selector5~2_combout ;
  4018. wire \macro_inst|u_uart[1]|u_tx[2]|Selector5~3_combout ;
  4019. wire \macro_inst|u_uart[1]|u_tx[2]|Selector5~4_combout ;
  4020. wire \macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ;
  4021. wire \macro_inst|u_uart[1]|u_tx[2]|always6~0_combout ;
  4022. wire \macro_inst|u_uart[1]|u_tx[2]|always6~1_combout ;
  4023. wire \macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ;
  4024. wire \macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ;
  4025. wire [3:0] \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt ;
  4026. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [0];
  4027. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0]~4_combout ;
  4028. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0]~5 ;
  4029. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [1];
  4030. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1]~6_combout ;
  4031. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1]~7 ;
  4032. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [2];
  4033. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2]~8_combout ;
  4034. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2]~9 ;
  4035. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [3];
  4036. wire \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3]~10_combout ;
  4037. wire \macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ;
  4038. wire \macro_inst|u_uart[1]|u_tx[2]|tx_complete~0_combout ;
  4039. wire \macro_inst|u_uart[1]|u_tx[2]|tx_complete~q ;
  4040. wire [2:0] \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt ;
  4041. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0];
  4042. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [1];
  4043. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [2];
  4044. wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout ;
  4045. wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~0_combout ;
  4046. wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~2_combout ;
  4047. wire \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~3_combout ;
  4048. wire [0:0] \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter ;
  4049. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0];
  4050. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter~0_combout ;
  4051. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  4052. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]~q ;
  4053. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  4054. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]~q ;
  4055. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  4056. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]~q ;
  4057. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  4058. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]~q ;
  4059. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  4060. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]~q ;
  4061. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  4062. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]~q ;
  4063. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6]~q ;
  4064. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  4065. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]~q ;
  4066. wire \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout ;
  4067. wire \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0_combout ;
  4068. wire \macro_inst|u_uart[1]|u_tx[2]|tx_parity~1_combout ;
  4069. wire \macro_inst|u_uart[1]|u_tx[2]|tx_parity~q ;
  4070. wire [7:0] \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg ;
  4071. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0];
  4072. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [1];
  4073. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [2];
  4074. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [3];
  4075. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [4];
  4076. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [5];
  4077. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [6];
  4078. //wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [7];
  4079. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout ;
  4080. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~0_combout ;
  4081. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~2_combout ;
  4082. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~3_combout ;
  4083. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~4_combout ;
  4084. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~5_combout ;
  4085. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~6_combout ;
  4086. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~7_combout ;
  4087. wire \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~8_combout ;
  4088. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ;
  4089. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ;
  4090. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ;
  4091. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0_combout ;
  4092. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~1_combout ;
  4093. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ;
  4094. wire \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ;
  4095. wire \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0_combout ;
  4096. wire \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~1_combout ;
  4097. wire \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ;
  4098. wire \macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout ;
  4099. wire \macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ;
  4100. wire \macro_inst|u_uart[1]|u_tx[2]|uart_txd~q ;
  4101. wire \macro_inst|u_uart[1]|u_tx[3]|Selector0~0_combout ;
  4102. wire \macro_inst|u_uart[1]|u_tx[3]|Selector2~0_combout ;
  4103. wire \macro_inst|u_uart[1]|u_tx[3]|Selector3~0_combout ;
  4104. wire \macro_inst|u_uart[1]|u_tx[3]|Selector3~1_combout ;
  4105. wire \macro_inst|u_uart[1]|u_tx[3]|Selector4~0_combout ;
  4106. wire \macro_inst|u_uart[1]|u_tx[3]|Selector4~1_combout ;
  4107. wire \macro_inst|u_uart[1]|u_tx[3]|Selector5~2_combout ;
  4108. wire \macro_inst|u_uart[1]|u_tx[3]|Selector5~3_combout ;
  4109. wire \macro_inst|u_uart[1]|u_tx[3]|Selector5~4_combout ;
  4110. wire \macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ;
  4111. wire \macro_inst|u_uart[1]|u_tx[3]|always6~0_combout ;
  4112. wire \macro_inst|u_uart[1]|u_tx[3]|always6~1_combout ;
  4113. wire \macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ;
  4114. wire \macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ;
  4115. wire [3:0] \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt ;
  4116. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [0];
  4117. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0]~4_combout ;
  4118. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0]~5 ;
  4119. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [1];
  4120. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1]~6_combout ;
  4121. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1]~7 ;
  4122. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [2];
  4123. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2]~8_combout ;
  4124. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2]~9 ;
  4125. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [3];
  4126. wire \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3]~10_combout ;
  4127. wire \macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ;
  4128. wire \macro_inst|u_uart[1]|u_tx[3]|tx_complete~0_combout ;
  4129. wire \macro_inst|u_uart[1]|u_tx[3]|tx_complete~q ;
  4130. wire [2:0] \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt ;
  4131. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0];
  4132. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [1];
  4133. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [2];
  4134. wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout ;
  4135. wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~0_combout ;
  4136. wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~2_combout ;
  4137. wire \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~3_combout ;
  4138. wire [0:0] \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter ;
  4139. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0];
  4140. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter~0_combout ;
  4141. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  4142. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]~q ;
  4143. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  4144. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]~q ;
  4145. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2]~q ;
  4146. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  4147. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]~q ;
  4148. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  4149. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]~q ;
  4150. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  4151. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]~q ;
  4152. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  4153. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]~q ;
  4154. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  4155. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]~q ;
  4156. wire \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout ;
  4157. wire \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0_combout ;
  4158. wire \macro_inst|u_uart[1]|u_tx[3]|tx_parity~1_combout ;
  4159. wire \macro_inst|u_uart[1]|u_tx[3]|tx_parity~q ;
  4160. wire [7:0] \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg ;
  4161. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0];
  4162. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [1];
  4163. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [2];
  4164. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout ;
  4165. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [3];
  4166. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [4];
  4167. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [5];
  4168. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [6];
  4169. //wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [7];
  4170. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~0_combout ;
  4171. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~2_combout ;
  4172. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~3_combout ;
  4173. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~4_combout ;
  4174. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~5_combout ;
  4175. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~6_combout ;
  4176. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~7_combout ;
  4177. wire \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~8_combout ;
  4178. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ;
  4179. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ;
  4180. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ;
  4181. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0_combout ;
  4182. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~1_combout ;
  4183. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ;
  4184. wire \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ;
  4185. wire \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0_combout ;
  4186. wire \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~1_combout ;
  4187. wire \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ;
  4188. wire \macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout ;
  4189. wire \macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ;
  4190. wire \macro_inst|u_uart[1]|u_tx[3]|uart_txd~q ;
  4191. wire \macro_inst|u_uart[1]|u_tx[4]|Selector0~0_combout ;
  4192. wire \macro_inst|u_uart[1]|u_tx[4]|Selector2~0_combout ;
  4193. wire \macro_inst|u_uart[1]|u_tx[4]|Selector3~0_combout ;
  4194. wire \macro_inst|u_uart[1]|u_tx[4]|Selector3~1_combout ;
  4195. wire \macro_inst|u_uart[1]|u_tx[4]|Selector4~0_combout ;
  4196. wire \macro_inst|u_uart[1]|u_tx[4]|Selector4~1_combout ;
  4197. wire \macro_inst|u_uart[1]|u_tx[4]|Selector5~2_combout ;
  4198. wire \macro_inst|u_uart[1]|u_tx[4]|Selector5~3_combout ;
  4199. wire \macro_inst|u_uart[1]|u_tx[4]|Selector5~4_combout ;
  4200. wire \macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ;
  4201. wire \macro_inst|u_uart[1]|u_tx[4]|always6~0_combout ;
  4202. wire \macro_inst|u_uart[1]|u_tx[4]|always6~1_combout ;
  4203. wire \macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ;
  4204. wire \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0_combout ;
  4205. wire \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ;
  4206. wire [3:0] \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt ;
  4207. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [0];
  4208. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0]~4_combout ;
  4209. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0]~5 ;
  4210. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [1];
  4211. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1]~6_combout ;
  4212. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1]~7 ;
  4213. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [2];
  4214. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2]~8_combout ;
  4215. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2]~9 ;
  4216. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [3];
  4217. wire \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3]~10_combout ;
  4218. wire \macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ;
  4219. wire \macro_inst|u_uart[1]|u_tx[4]|tx_complete~0_combout ;
  4220. wire \macro_inst|u_uart[1]|u_tx[4]|tx_complete~q ;
  4221. wire [2:0] \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt ;
  4222. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0];
  4223. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [1];
  4224. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [2];
  4225. wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout ;
  4226. wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~0_combout ;
  4227. wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~2_combout ;
  4228. wire \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~3_combout ;
  4229. wire [0:0] \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter ;
  4230. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0];
  4231. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter~0_combout ;
  4232. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  4233. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]~q ;
  4234. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1]~q ;
  4235. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]__feeder__LutOut ;
  4236. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]~q ;
  4237. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  4238. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]~q ;
  4239. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]__feeder__LutOut ;
  4240. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]~q ;
  4241. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  4242. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]~q ;
  4243. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  4244. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]~q ;
  4245. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  4246. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]~q ;
  4247. wire \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout ;
  4248. wire \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0_combout ;
  4249. wire \macro_inst|u_uart[1]|u_tx[4]|tx_parity~1_combout ;
  4250. wire \macro_inst|u_uart[1]|u_tx[4]|tx_parity~q ;
  4251. wire [7:0] \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg ;
  4252. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0];
  4253. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [1];
  4254. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [2];
  4255. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [3];
  4256. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [4];
  4257. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout ;
  4258. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [5];
  4259. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [6];
  4260. //wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [7];
  4261. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~0_combout ;
  4262. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~2_combout ;
  4263. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~3_combout ;
  4264. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~4_combout ;
  4265. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~5_combout ;
  4266. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~6_combout ;
  4267. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~7_combout ;
  4268. wire \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~8_combout ;
  4269. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ;
  4270. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ;
  4271. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ;
  4272. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0_combout ;
  4273. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~1_combout ;
  4274. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ;
  4275. wire \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ;
  4276. wire \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0_combout ;
  4277. wire \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~1_combout ;
  4278. wire \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ;
  4279. wire \macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout ;
  4280. wire \macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ;
  4281. wire \macro_inst|u_uart[1]|u_tx[4]|uart_txd~q ;
  4282. wire \macro_inst|u_uart[1]|u_tx[5]|Selector0~0_combout ;
  4283. wire \macro_inst|u_uart[1]|u_tx[5]|Selector2~0_combout ;
  4284. wire \macro_inst|u_uart[1]|u_tx[5]|Selector3~0_combout ;
  4285. wire \macro_inst|u_uart[1]|u_tx[5]|Selector3~1_combout ;
  4286. wire \macro_inst|u_uart[1]|u_tx[5]|Selector4~0_combout ;
  4287. wire \macro_inst|u_uart[1]|u_tx[5]|Selector4~1_combout ;
  4288. wire \macro_inst|u_uart[1]|u_tx[5]|Selector5~2_combout ;
  4289. wire \macro_inst|u_uart[1]|u_tx[5]|Selector5~3_combout ;
  4290. wire \macro_inst|u_uart[1]|u_tx[5]|Selector5~4_combout ;
  4291. wire \macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ;
  4292. wire \macro_inst|u_uart[1]|u_tx[5]|always6~0_combout ;
  4293. wire \macro_inst|u_uart[1]|u_tx[5]|always6~1_combout ;
  4294. wire \macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ;
  4295. wire \macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ;
  4296. wire [3:0] \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt ;
  4297. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [0];
  4298. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0]~4_combout ;
  4299. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0]~5 ;
  4300. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [1];
  4301. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1]~6_combout ;
  4302. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1]~7 ;
  4303. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [2];
  4304. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2]~8_combout ;
  4305. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2]~9 ;
  4306. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [3];
  4307. wire \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3]~10_combout ;
  4308. wire \macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ;
  4309. wire \macro_inst|u_uart[1]|u_tx[5]|tx_complete~0_combout ;
  4310. wire \macro_inst|u_uart[1]|u_tx[5]|tx_complete~q ;
  4311. wire [2:0] \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt ;
  4312. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0];
  4313. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [1];
  4314. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [2];
  4315. wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout ;
  4316. wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~0_combout ;
  4317. wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~2_combout ;
  4318. wire \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~3_combout ;
  4319. wire [0:0] \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter ;
  4320. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0];
  4321. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter~0_combout ;
  4322. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]__feeder__LutOut ;
  4323. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]~q ;
  4324. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]__feeder__LutOut ;
  4325. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]~q ;
  4326. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2]~q ;
  4327. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]__feeder__LutOut ;
  4328. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]~q ;
  4329. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4]~q ;
  4330. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]__feeder__LutOut ;
  4331. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]~q ;
  4332. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]__feeder__LutOut ;
  4333. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]~q ;
  4334. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]__feeder__LutOut ;
  4335. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]~q ;
  4336. wire \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout ;
  4337. wire \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0_combout ;
  4338. wire \macro_inst|u_uart[1]|u_tx[5]|tx_parity~1_combout ;
  4339. wire \macro_inst|u_uart[1]|u_tx[5]|tx_parity~q ;
  4340. wire [7:0] \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg ;
  4341. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0];
  4342. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [1];
  4343. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [2];
  4344. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [3];
  4345. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout ;
  4346. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [4];
  4347. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [5];
  4348. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [6];
  4349. //wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [7];
  4350. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~0_combout ;
  4351. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~2_combout ;
  4352. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~3_combout ;
  4353. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~4_combout ;
  4354. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~5_combout ;
  4355. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~6_combout ;
  4356. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~7_combout ;
  4357. wire \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~8_combout ;
  4358. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ;
  4359. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ;
  4360. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ;
  4361. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0_combout ;
  4362. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~1_combout ;
  4363. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ;
  4364. wire \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ;
  4365. wire \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0_combout ;
  4366. wire \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~1_combout ;
  4367. wire \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ;
  4368. wire \macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout ;
  4369. wire \macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ;
  4370. wire \macro_inst|u_uart[1]|u_tx[5]|uart_txd~q ;
  4371. wire [11:0] \macro_inst|uart_rxd ;
  4372. //wire \macro_inst|uart_rxd [0];
  4373. //wire \macro_inst|uart_rxd [10];
  4374. //wire \macro_inst|uart_rxd [11];
  4375. //wire \macro_inst|uart_rxd [1];
  4376. //wire \macro_inst|uart_rxd [2];
  4377. //wire \macro_inst|uart_rxd [3];
  4378. //wire \macro_inst|uart_rxd [4];
  4379. //wire \macro_inst|uart_rxd [5];
  4380. //wire \macro_inst|uart_rxd [6];
  4381. //wire \macro_inst|uart_rxd [7];
  4382. //wire \macro_inst|uart_rxd [8];
  4383. //wire \macro_inst|uart_rxd [9];
  4384. wire [4:0] \pll_inst|auto_generated|clk ;
  4385. //wire \pll_inst|auto_generated|clk [0];
  4386. //wire \pll_inst|auto_generated|clk [1];
  4387. //wire \pll_inst|auto_generated|clk [2];
  4388. //wire \pll_inst|auto_generated|clk [3];
  4389. //wire \pll_inst|auto_generated|clk [4];
  4390. wire [4:0] \pll_inst|auto_generated|pll1_CLK_bus ;
  4391. //wire \pll_inst|auto_generated|pll1_CLK_bus [0];
  4392. //wire \pll_inst|auto_generated|pll1_CLK_bus [1];
  4393. //wire \pll_inst|auto_generated|pll1_CLK_bus [2];
  4394. //wire \pll_inst|auto_generated|pll1_CLK_bus [3];
  4395. //wire \pll_inst|auto_generated|pll1_CLK_bus [4];
  4396. wire \pll_inst|auto_generated|pll1~FBOUT ;
  4397. wire \pll_inst|auto_generated|pll_lock_sync~feeder_combout ;
  4398. wire \pll_inst|auto_generated|pll_lock_sync~q ;
  4399. wire \rv32.dmactive ;
  4400. wire \rv32.ext_dma_DMACCLR[0] ;
  4401. wire \rv32.ext_dma_DMACCLR[1] ;
  4402. wire \rv32.ext_dma_DMACCLR[2] ;
  4403. wire \rv32.ext_dma_DMACCLR[3] ;
  4404. wire \rv32.ext_dma_DMACTC[0] ;
  4405. wire \rv32.ext_dma_DMACTC[1] ;
  4406. wire \rv32.ext_dma_DMACTC[2] ;
  4407. wire \rv32.ext_dma_DMACTC[3] ;
  4408. wire \rv32.gpio0_io_out_data[0] ;
  4409. wire \rv32.gpio0_io_out_data[1] ;
  4410. wire \rv32.gpio0_io_out_data[2] ;
  4411. wire \rv32.gpio0_io_out_data[3] ;
  4412. wire \rv32.gpio0_io_out_data[4] ;
  4413. wire \rv32.gpio0_io_out_data[5] ;
  4414. wire \rv32.gpio0_io_out_data[6] ;
  4415. wire \rv32.gpio0_io_out_data[7] ;
  4416. wire \rv32.gpio0_io_out_en[0] ;
  4417. wire \rv32.gpio0_io_out_en[1] ;
  4418. wire \rv32.gpio0_io_out_en[2] ;
  4419. wire \rv32.gpio0_io_out_en[3] ;
  4420. wire \rv32.gpio0_io_out_en[4] ;
  4421. wire \rv32.gpio0_io_out_en[5] ;
  4422. wire \rv32.gpio0_io_out_en[6] ;
  4423. wire \rv32.gpio0_io_out_en[7] ;
  4424. wire \rv32.gpio1_io_out_data[0] ;
  4425. wire \rv32.gpio1_io_out_data[1] ;
  4426. wire \rv32.gpio1_io_out_data[2] ;
  4427. wire \rv32.gpio1_io_out_data[3] ;
  4428. wire \rv32.gpio1_io_out_data[4] ;
  4429. wire \rv32.gpio1_io_out_data[5] ;
  4430. wire \rv32.gpio1_io_out_data[6] ;
  4431. wire \rv32.gpio1_io_out_data[7] ;
  4432. wire \rv32.gpio1_io_out_en[0] ;
  4433. wire \rv32.gpio1_io_out_en[1] ;
  4434. wire \rv32.gpio1_io_out_en[2] ;
  4435. wire \rv32.gpio1_io_out_en[3] ;
  4436. wire \rv32.gpio1_io_out_en[4] ;
  4437. wire \rv32.gpio1_io_out_en[5] ;
  4438. wire \rv32.gpio1_io_out_en[6] ;
  4439. wire \rv32.gpio1_io_out_en[7] ;
  4440. wire \rv32.gpio2_io_out_data[0] ;
  4441. wire \rv32.gpio2_io_out_data[1] ;
  4442. wire \rv32.gpio2_io_out_data[2] ;
  4443. wire \rv32.gpio2_io_out_data[3] ;
  4444. wire \rv32.gpio2_io_out_data[4] ;
  4445. wire \rv32.gpio2_io_out_data[5] ;
  4446. wire \rv32.gpio2_io_out_data[6] ;
  4447. wire \rv32.gpio2_io_out_data[7] ;
  4448. wire \rv32.gpio2_io_out_en[0] ;
  4449. wire \rv32.gpio2_io_out_en[1] ;
  4450. wire \rv32.gpio2_io_out_en[2] ;
  4451. wire \rv32.gpio2_io_out_en[3] ;
  4452. wire \rv32.gpio2_io_out_en[4] ;
  4453. wire \rv32.gpio2_io_out_en[5] ;
  4454. wire \rv32.gpio2_io_out_en[6] ;
  4455. wire \rv32.gpio2_io_out_en[7] ;
  4456. wire \rv32.gpio3_io_out_data[0] ;
  4457. wire \rv32.gpio3_io_out_data[1] ;
  4458. wire \rv32.gpio3_io_out_data[2] ;
  4459. wire \rv32.gpio3_io_out_data[3] ;
  4460. wire \rv32.gpio3_io_out_data[4] ;
  4461. wire \rv32.gpio3_io_out_data[5] ;
  4462. wire \rv32.gpio3_io_out_data[6] ;
  4463. wire \rv32.gpio3_io_out_data[7] ;
  4464. wire \rv32.gpio3_io_out_en[0] ;
  4465. wire \rv32.gpio3_io_out_en[1] ;
  4466. wire \rv32.gpio3_io_out_en[2] ;
  4467. wire \rv32.gpio3_io_out_en[3] ;
  4468. wire \rv32.gpio3_io_out_en[4] ;
  4469. wire \rv32.gpio3_io_out_en[5] ;
  4470. wire \rv32.gpio3_io_out_en[6] ;
  4471. wire \rv32.gpio3_io_out_en[7] ;
  4472. wire \rv32.gpio4_io_out_data[0] ;
  4473. wire \rv32.gpio4_io_out_data[1] ;
  4474. wire \rv32.gpio4_io_out_data[2] ;
  4475. wire \rv32.gpio4_io_out_data[3] ;
  4476. wire \rv32.gpio4_io_out_data[4] ;
  4477. wire \rv32.gpio4_io_out_data[5] ;
  4478. wire \rv32.gpio4_io_out_data[6] ;
  4479. wire \rv32.gpio4_io_out_data[7] ;
  4480. wire \rv32.gpio4_io_out_en[0] ;
  4481. wire \rv32.gpio4_io_out_en[1] ;
  4482. wire \rv32.gpio4_io_out_en[2] ;
  4483. wire \rv32.gpio4_io_out_en[3] ;
  4484. wire \rv32.gpio4_io_out_en[4] ;
  4485. wire \rv32.gpio4_io_out_en[5] ;
  4486. wire \rv32.gpio4_io_out_en[6] ;
  4487. wire \rv32.gpio4_io_out_en[7] ;
  4488. wire \rv32.gpio5_io_out_data[0] ;
  4489. wire \rv32.gpio5_io_out_data[1] ;
  4490. wire \rv32.gpio5_io_out_data[2] ;
  4491. wire \rv32.gpio5_io_out_data[3] ;
  4492. wire \rv32.gpio5_io_out_data[4] ;
  4493. wire \rv32.gpio5_io_out_data[5] ;
  4494. wire \rv32.gpio5_io_out_data[6] ;
  4495. wire \rv32.gpio5_io_out_data[7] ;
  4496. wire \rv32.gpio5_io_out_en[0] ;
  4497. wire \rv32.gpio5_io_out_en[1] ;
  4498. wire \rv32.gpio5_io_out_en[2] ;
  4499. wire \rv32.gpio5_io_out_en[3] ;
  4500. wire \rv32.gpio5_io_out_en[4] ;
  4501. wire \rv32.gpio5_io_out_en[5] ;
  4502. wire \rv32.gpio5_io_out_en[6] ;
  4503. wire \rv32.gpio5_io_out_en[7] ;
  4504. wire \rv32.gpio6_io_out_data[0] ;
  4505. wire \rv32.gpio6_io_out_data[1] ;
  4506. wire \rv32.gpio6_io_out_data[2] ;
  4507. wire \rv32.gpio6_io_out_data[3] ;
  4508. wire \rv32.gpio6_io_out_data[4] ;
  4509. wire \rv32.gpio6_io_out_data[5] ;
  4510. wire \rv32.gpio6_io_out_data[6] ;
  4511. wire \rv32.gpio6_io_out_data[7] ;
  4512. wire \rv32.gpio6_io_out_en[0] ;
  4513. wire \rv32.gpio6_io_out_en[1] ;
  4514. wire \rv32.gpio6_io_out_en[2] ;
  4515. wire \rv32.gpio6_io_out_en[3] ;
  4516. wire \rv32.gpio6_io_out_en[4] ;
  4517. wire \rv32.gpio6_io_out_en[5] ;
  4518. wire \rv32.gpio6_io_out_en[6] ;
  4519. wire \rv32.gpio6_io_out_en[7] ;
  4520. wire \rv32.gpio7_io_out_data[0] ;
  4521. wire \rv32.gpio7_io_out_data[1] ;
  4522. wire \rv32.gpio7_io_out_data[2] ;
  4523. wire \rv32.gpio7_io_out_data[3] ;
  4524. wire \rv32.gpio7_io_out_data[4] ;
  4525. wire \rv32.gpio7_io_out_data[5] ;
  4526. wire \rv32.gpio7_io_out_data[6] ;
  4527. wire \rv32.gpio7_io_out_data[7] ;
  4528. wire \rv32.gpio7_io_out_en[0] ;
  4529. wire \rv32.gpio7_io_out_en[1] ;
  4530. wire \rv32.gpio7_io_out_en[2] ;
  4531. wire \rv32.gpio7_io_out_en[3] ;
  4532. wire \rv32.gpio7_io_out_en[4] ;
  4533. wire \rv32.gpio7_io_out_en[5] ;
  4534. wire \rv32.gpio7_io_out_en[6] ;
  4535. wire \rv32.gpio7_io_out_en[7] ;
  4536. wire \rv32.gpio8_io_out_data[0] ;
  4537. wire \rv32.gpio8_io_out_data[1] ;
  4538. wire \rv32.gpio8_io_out_data[2] ;
  4539. wire \rv32.gpio8_io_out_data[3] ;
  4540. wire \rv32.gpio8_io_out_data[4] ;
  4541. wire \rv32.gpio8_io_out_data[5] ;
  4542. wire \rv32.gpio8_io_out_data[6] ;
  4543. wire \rv32.gpio8_io_out_data[7] ;
  4544. wire \rv32.gpio8_io_out_en[0] ;
  4545. wire \rv32.gpio8_io_out_en[1] ;
  4546. wire \rv32.gpio8_io_out_en[2] ;
  4547. wire \rv32.gpio8_io_out_en[3] ;
  4548. wire \rv32.gpio8_io_out_en[4] ;
  4549. wire \rv32.gpio8_io_out_en[5] ;
  4550. wire \rv32.gpio8_io_out_en[6] ;
  4551. wire \rv32.gpio8_io_out_en[7] ;
  4552. wire \rv32.gpio9_io_out_data[0] ;
  4553. wire \rv32.gpio9_io_out_data[1] ;
  4554. wire \rv32.gpio9_io_out_data[2] ;
  4555. wire \rv32.gpio9_io_out_data[3] ;
  4556. wire \rv32.gpio9_io_out_data[4] ;
  4557. wire \rv32.gpio9_io_out_data[5] ;
  4558. wire \rv32.gpio9_io_out_data[6] ;
  4559. wire \rv32.gpio9_io_out_data[7] ;
  4560. wire \rv32.gpio9_io_out_en[0] ;
  4561. wire \rv32.gpio9_io_out_en[1] ;
  4562. wire \rv32.gpio9_io_out_en[2] ;
  4563. wire \rv32.gpio9_io_out_en[3] ;
  4564. wire \rv32.gpio9_io_out_en[4] ;
  4565. wire \rv32.gpio9_io_out_en[5] ;
  4566. wire \rv32.gpio9_io_out_en[6] ;
  4567. wire \rv32.gpio9_io_out_en[7] ;
  4568. wire \rv32.mem_ahb_haddr[0] ;
  4569. wire \rv32.mem_ahb_haddr[10] ;
  4570. wire \rv32.mem_ahb_haddr[11] ;
  4571. wire \rv32.mem_ahb_haddr[12] ;
  4572. wire \rv32.mem_ahb_haddr[13] ;
  4573. wire \rv32.mem_ahb_haddr[14] ;
  4574. wire \rv32.mem_ahb_haddr[15] ;
  4575. wire \rv32.mem_ahb_haddr[16] ;
  4576. wire \rv32.mem_ahb_haddr[17] ;
  4577. wire \rv32.mem_ahb_haddr[18] ;
  4578. wire \rv32.mem_ahb_haddr[19] ;
  4579. wire \rv32.mem_ahb_haddr[1] ;
  4580. wire \rv32.mem_ahb_haddr[20] ;
  4581. wire \rv32.mem_ahb_haddr[21] ;
  4582. wire \rv32.mem_ahb_haddr[22] ;
  4583. wire \rv32.mem_ahb_haddr[23] ;
  4584. wire \rv32.mem_ahb_haddr[24] ;
  4585. wire \rv32.mem_ahb_haddr[25] ;
  4586. wire \rv32.mem_ahb_haddr[26] ;
  4587. wire \rv32.mem_ahb_haddr[27] ;
  4588. wire \rv32.mem_ahb_haddr[28] ;
  4589. wire \rv32.mem_ahb_haddr[29] ;
  4590. wire \rv32.mem_ahb_haddr[2] ;
  4591. wire \rv32.mem_ahb_haddr[30] ;
  4592. wire \rv32.mem_ahb_haddr[31] ;
  4593. wire \rv32.mem_ahb_haddr[3] ;
  4594. wire \rv32.mem_ahb_haddr[4] ;
  4595. wire \rv32.mem_ahb_haddr[5] ;
  4596. wire \rv32.mem_ahb_haddr[6] ;
  4597. wire \rv32.mem_ahb_haddr[7] ;
  4598. wire \rv32.mem_ahb_haddr[8] ;
  4599. wire \rv32.mem_ahb_haddr[9] ;
  4600. wire \rv32.mem_ahb_hburst[0] ;
  4601. wire \rv32.mem_ahb_hburst[1] ;
  4602. wire \rv32.mem_ahb_hburst[2] ;
  4603. wire \rv32.mem_ahb_hready ;
  4604. wire \rv32.mem_ahb_hsize[0] ;
  4605. wire \rv32.mem_ahb_hsize[1] ;
  4606. wire \rv32.mem_ahb_hsize[2] ;
  4607. wire \rv32.mem_ahb_htrans[0] ;
  4608. wire \rv32.mem_ahb_htrans[1] ;
  4609. wire \rv32.mem_ahb_hwdata[0] ;
  4610. wire \rv32.mem_ahb_hwdata[10] ;
  4611. wire \rv32.mem_ahb_hwdata[11] ;
  4612. wire \rv32.mem_ahb_hwdata[12] ;
  4613. wire \rv32.mem_ahb_hwdata[13] ;
  4614. wire \rv32.mem_ahb_hwdata[14] ;
  4615. wire \rv32.mem_ahb_hwdata[15] ;
  4616. wire \rv32.mem_ahb_hwdata[16] ;
  4617. wire \rv32.mem_ahb_hwdata[17] ;
  4618. wire \rv32.mem_ahb_hwdata[18] ;
  4619. wire \rv32.mem_ahb_hwdata[19] ;
  4620. wire \rv32.mem_ahb_hwdata[1] ;
  4621. wire \rv32.mem_ahb_hwdata[20] ;
  4622. wire \rv32.mem_ahb_hwdata[21] ;
  4623. wire \rv32.mem_ahb_hwdata[22] ;
  4624. wire \rv32.mem_ahb_hwdata[23] ;
  4625. wire \rv32.mem_ahb_hwdata[24] ;
  4626. wire \rv32.mem_ahb_hwdata[25] ;
  4627. wire \rv32.mem_ahb_hwdata[26] ;
  4628. wire \rv32.mem_ahb_hwdata[27] ;
  4629. wire \rv32.mem_ahb_hwdata[28] ;
  4630. wire \rv32.mem_ahb_hwdata[29] ;
  4631. wire \rv32.mem_ahb_hwdata[2] ;
  4632. wire \rv32.mem_ahb_hwdata[30] ;
  4633. wire \rv32.mem_ahb_hwdata[31] ;
  4634. wire \rv32.mem_ahb_hwdata[3] ;
  4635. wire \rv32.mem_ahb_hwdata[4] ;
  4636. wire \rv32.mem_ahb_hwdata[5] ;
  4637. wire \rv32.mem_ahb_hwdata[6] ;
  4638. wire \rv32.mem_ahb_hwdata[7] ;
  4639. wire \rv32.mem_ahb_hwdata[8] ;
  4640. wire \rv32.mem_ahb_hwdata[9] ;
  4641. wire \rv32.mem_ahb_hwrite ;
  4642. wire \rv32.resetn_out ;
  4643. wire \rv32.slave_ahb_hrdata[0] ;
  4644. wire \rv32.slave_ahb_hrdata[10] ;
  4645. wire \rv32.slave_ahb_hrdata[11] ;
  4646. wire \rv32.slave_ahb_hrdata[12] ;
  4647. wire \rv32.slave_ahb_hrdata[13] ;
  4648. wire \rv32.slave_ahb_hrdata[14] ;
  4649. wire \rv32.slave_ahb_hrdata[15] ;
  4650. wire \rv32.slave_ahb_hrdata[16] ;
  4651. wire \rv32.slave_ahb_hrdata[17] ;
  4652. wire \rv32.slave_ahb_hrdata[18] ;
  4653. wire \rv32.slave_ahb_hrdata[19] ;
  4654. wire \rv32.slave_ahb_hrdata[1] ;
  4655. wire \rv32.slave_ahb_hrdata[20] ;
  4656. wire \rv32.slave_ahb_hrdata[21] ;
  4657. wire \rv32.slave_ahb_hrdata[22] ;
  4658. wire \rv32.slave_ahb_hrdata[23] ;
  4659. wire \rv32.slave_ahb_hrdata[24] ;
  4660. wire \rv32.slave_ahb_hrdata[25] ;
  4661. wire \rv32.slave_ahb_hrdata[26] ;
  4662. wire \rv32.slave_ahb_hrdata[27] ;
  4663. wire \rv32.slave_ahb_hrdata[28] ;
  4664. wire \rv32.slave_ahb_hrdata[29] ;
  4665. wire \rv32.slave_ahb_hrdata[2] ;
  4666. wire \rv32.slave_ahb_hrdata[30] ;
  4667. wire \rv32.slave_ahb_hrdata[31] ;
  4668. wire \rv32.slave_ahb_hrdata[3] ;
  4669. wire \rv32.slave_ahb_hrdata[4] ;
  4670. wire \rv32.slave_ahb_hrdata[5] ;
  4671. wire \rv32.slave_ahb_hrdata[6] ;
  4672. wire \rv32.slave_ahb_hrdata[7] ;
  4673. wire \rv32.slave_ahb_hrdata[8] ;
  4674. wire \rv32.slave_ahb_hrdata[9] ;
  4675. wire \rv32.slave_ahb_hreadyout ;
  4676. wire \rv32.slave_ahb_hresp ;
  4677. wire \rv32.swj_JTAGIR[0] ;
  4678. wire \rv32.swj_JTAGIR[1] ;
  4679. wire \rv32.swj_JTAGIR[2] ;
  4680. wire \rv32.swj_JTAGIR[3] ;
  4681. wire \rv32.swj_JTAGNSW ;
  4682. wire \rv32.swj_JTAGSTATE[0] ;
  4683. wire \rv32.swj_JTAGSTATE[1] ;
  4684. wire \rv32.swj_JTAGSTATE[2] ;
  4685. wire \rv32.swj_JTAGSTATE[3] ;
  4686. wire \rv32.sys_ctrl_clkSource[0] ;
  4687. wire \rv32.sys_ctrl_clkSource[1] ;
  4688. wire \rv32.sys_ctrl_hseBypass ;
  4689. wire \rv32.sys_ctrl_hseEnable ;
  4690. wire \rv32.sys_ctrl_pllEnable ;
  4691. wire \rv32.sys_ctrl_sleep ;
  4692. wire \rv32.sys_ctrl_standby ;
  4693. wire \rv32.sys_ctrl_stop ;
  4694. wire \sys_resetn~clkctrl_outclk ;
  4695. wire \sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ;
  4696. wire \sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ;
  4697. wire \sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ;
  4698. wire \sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ;
  4699. wire \sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ;
  4700. wire \sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ;
  4701. wire \sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ;
  4702. wire \sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ;
  4703. wire \sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ;
  4704. wire \sys_resetn~clkctrl_outclk__AsyncReset_X45_Y4_SIG ;
  4705. wire \sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ;
  4706. wire \sys_resetn~clkctrl_outclk__AsyncReset_X46_Y2_SIG ;
  4707. wire \sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ;
  4708. wire \sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ;
  4709. wire \sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ;
  4710. wire \sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ;
  4711. wire \sys_resetn~clkctrl_outclk__AsyncReset_X47_Y4_SIG ;
  4712. wire \sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ;
  4713. wire \sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ;
  4714. wire \sys_resetn~clkctrl_outclk__AsyncReset_X48_Y3_SIG ;
  4715. wire \sys_resetn~clkctrl_outclk__AsyncReset_X48_Y4_SIG ;
  4716. wire \sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ;
  4717. wire \sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ;
  4718. wire \sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ;
  4719. wire \sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ;
  4720. wire \sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ;
  4721. wire \sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ;
  4722. wire \sys_resetn~clkctrl_outclk__AsyncReset_X50_Y4_SIG ;
  4723. wire \sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ;
  4724. wire \sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ;
  4725. wire \sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ;
  4726. wire \sys_resetn~clkctrl_outclk__AsyncReset_X51_Y4_SIG ;
  4727. wire \sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ;
  4728. wire \sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ;
  4729. wire \sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ;
  4730. wire \sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ;
  4731. wire \sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ;
  4732. wire \sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ;
  4733. wire \sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ;
  4734. wire \sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ;
  4735. wire \sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ;
  4736. wire \sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ;
  4737. wire \sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ;
  4738. wire \sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ;
  4739. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ;
  4740. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ;
  4741. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ;
  4742. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ;
  4743. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ;
  4744. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ;
  4745. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ;
  4746. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ;
  4747. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ;
  4748. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ;
  4749. wire \sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ;
  4750. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ;
  4751. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ;
  4752. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ;
  4753. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ;
  4754. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ;
  4755. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ;
  4756. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ;
  4757. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y6_SIG ;
  4758. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ;
  4759. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ;
  4760. wire \sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ;
  4761. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ;
  4762. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ;
  4763. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ;
  4764. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ;
  4765. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ;
  4766. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ;
  4767. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ;
  4768. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ;
  4769. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ;
  4770. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ;
  4771. wire \sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ;
  4772. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ;
  4773. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ;
  4774. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ;
  4775. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ;
  4776. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ;
  4777. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ;
  4778. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ;
  4779. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ;
  4780. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ;
  4781. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ;
  4782. wire \sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ;
  4783. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ;
  4784. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ;
  4785. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ;
  4786. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ;
  4787. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ;
  4788. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ;
  4789. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ;
  4790. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ;
  4791. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ;
  4792. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ;
  4793. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ;
  4794. wire \sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ;
  4795. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ;
  4796. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ;
  4797. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ;
  4798. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ;
  4799. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ;
  4800. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ;
  4801. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ;
  4802. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ;
  4803. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ;
  4804. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ;
  4805. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ;
  4806. wire \sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ;
  4807. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ;
  4808. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ;
  4809. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ;
  4810. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ;
  4811. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ;
  4812. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ;
  4813. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ;
  4814. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ;
  4815. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ;
  4816. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ;
  4817. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ;
  4818. wire \sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ;
  4819. wire \sys_resetn~combout ;
  4820. wire \uart15_rx~input_o ;
  4821. wire \~GND~combout ;
  4822. wire \~VCC~combout ;
  4823. wire vcc;
  4824. wire gnd;
  4825. assign vcc = 1'b1;
  4826. assign gnd = 1'b0;
  4827. wire unknown;
  4828. assign unknown = 1'bx;
  4829. alta_rio \GPIO1_0~output (
  4830. .padio(GPIO1_0),
  4831. .datain(\rv32.gpio1_io_out_data[0] ),
  4832. .oe(\rv32.gpio1_io_out_en[0] ),
  4833. .outclk(gnd),
  4834. .outclkena(vcc),
  4835. .inclk(gnd),
  4836. .inclkena(vcc),
  4837. .areset(gnd),
  4838. .sreset(gnd),
  4839. .combout(),
  4840. .regout());
  4841. defparam \GPIO1_0~output .coord_x = 1;
  4842. defparam \GPIO1_0~output .coord_y = 0;
  4843. defparam \GPIO1_0~output .coord_z = 2;
  4844. defparam \GPIO1_0~output .IN_ASYNC_MODE = 1'b0;
  4845. defparam \GPIO1_0~output .IN_SYNC_MODE = 1'b0;
  4846. defparam \GPIO1_0~output .IN_POWERUP = 1'b0;
  4847. defparam \GPIO1_0~output .OUT_REG_MODE = 1'b0;
  4848. defparam \GPIO1_0~output .OUT_ASYNC_MODE = 1'b0;
  4849. defparam \GPIO1_0~output .OUT_SYNC_MODE = 1'b0;
  4850. defparam \GPIO1_0~output .OUT_POWERUP = 1'b0;
  4851. defparam \GPIO1_0~output .OE_REG_MODE = 1'b0;
  4852. defparam \GPIO1_0~output .OE_ASYNC_MODE = 1'b0;
  4853. defparam \GPIO1_0~output .OE_SYNC_MODE = 1'b0;
  4854. defparam \GPIO1_0~output .OE_POWERUP = 1'b0;
  4855. defparam \GPIO1_0~output .CFG_TRI_INPUT = 1'b0;
  4856. defparam \GPIO1_0~output .CFG_INPUT_EN = 1'b0;
  4857. defparam \GPIO1_0~output .CFG_PULL_UP = 1'b0;
  4858. defparam \GPIO1_0~output .CFG_SLR = 1'b0;
  4859. defparam \GPIO1_0~output .CFG_OPEN_DRAIN = 1'b0;
  4860. defparam \GPIO1_0~output .CFG_PDRCTRL = 4'b0100;
  4861. defparam \GPIO1_0~output .CFG_KEEP = 2'b00;
  4862. defparam \GPIO1_0~output .CFG_LVDS_OUT_EN = 1'b0;
  4863. defparam \GPIO1_0~output .CFG_LVDS_SEL_CUA = 2'b00;
  4864. defparam \GPIO1_0~output .CFG_LVDS_IREF = 10'b0110000000;
  4865. defparam \GPIO1_0~output .CFG_LVDS_IN_EN = 1'b0;
  4866. defparam \GPIO1_0~output .DPCLK_DELAY = 4'b0000;
  4867. defparam \GPIO1_0~output .OUT_DELAY = 1'b0;
  4868. defparam \GPIO1_0~output .IN_DATA_DELAY = 3'b000;
  4869. defparam \GPIO1_0~output .IN_REG_DELAY = 3'b000;
  4870. alta_rio \GPIO1_1~output (
  4871. .padio(GPIO1_1),
  4872. .datain(\rv32.gpio1_io_out_data[1] ),
  4873. .oe(\rv32.gpio1_io_out_en[1] ),
  4874. .outclk(gnd),
  4875. .outclkena(vcc),
  4876. .inclk(gnd),
  4877. .inclkena(vcc),
  4878. .areset(gnd),
  4879. .sreset(gnd),
  4880. .combout(),
  4881. .regout());
  4882. defparam \GPIO1_1~output .coord_x = 7;
  4883. defparam \GPIO1_1~output .coord_y = 0;
  4884. defparam \GPIO1_1~output .coord_z = 0;
  4885. defparam \GPIO1_1~output .IN_ASYNC_MODE = 1'b0;
  4886. defparam \GPIO1_1~output .IN_SYNC_MODE = 1'b0;
  4887. defparam \GPIO1_1~output .IN_POWERUP = 1'b0;
  4888. defparam \GPIO1_1~output .OUT_REG_MODE = 1'b0;
  4889. defparam \GPIO1_1~output .OUT_ASYNC_MODE = 1'b0;
  4890. defparam \GPIO1_1~output .OUT_SYNC_MODE = 1'b0;
  4891. defparam \GPIO1_1~output .OUT_POWERUP = 1'b0;
  4892. defparam \GPIO1_1~output .OE_REG_MODE = 1'b0;
  4893. defparam \GPIO1_1~output .OE_ASYNC_MODE = 1'b0;
  4894. defparam \GPIO1_1~output .OE_SYNC_MODE = 1'b0;
  4895. defparam \GPIO1_1~output .OE_POWERUP = 1'b0;
  4896. defparam \GPIO1_1~output .CFG_TRI_INPUT = 1'b0;
  4897. defparam \GPIO1_1~output .CFG_INPUT_EN = 1'b0;
  4898. defparam \GPIO1_1~output .CFG_PULL_UP = 1'b0;
  4899. defparam \GPIO1_1~output .CFG_SLR = 1'b0;
  4900. defparam \GPIO1_1~output .CFG_OPEN_DRAIN = 1'b0;
  4901. defparam \GPIO1_1~output .CFG_PDRCTRL = 4'b0100;
  4902. defparam \GPIO1_1~output .CFG_KEEP = 2'b00;
  4903. defparam \GPIO1_1~output .CFG_LVDS_OUT_EN = 1'b0;
  4904. defparam \GPIO1_1~output .CFG_LVDS_SEL_CUA = 2'b00;
  4905. defparam \GPIO1_1~output .CFG_LVDS_IREF = 10'b0110000000;
  4906. defparam \GPIO1_1~output .CFG_LVDS_IN_EN = 1'b0;
  4907. defparam \GPIO1_1~output .DPCLK_DELAY = 4'b0000;
  4908. defparam \GPIO1_1~output .OUT_DELAY = 1'b0;
  4909. defparam \GPIO1_1~output .IN_DATA_DELAY = 3'b000;
  4910. defparam \GPIO1_1~output .IN_REG_DELAY = 3'b000;
  4911. alta_rio \GPIO1_2~output (
  4912. .padio(GPIO1_2),
  4913. .datain(\rv32.gpio1_io_out_data[2] ),
  4914. .oe(\rv32.gpio1_io_out_en[2] ),
  4915. .outclk(gnd),
  4916. .outclkena(vcc),
  4917. .inclk(gnd),
  4918. .inclkena(vcc),
  4919. .areset(gnd),
  4920. .sreset(gnd),
  4921. .combout(),
  4922. .regout());
  4923. defparam \GPIO1_2~output .coord_x = 8;
  4924. defparam \GPIO1_2~output .coord_y = 0;
  4925. defparam \GPIO1_2~output .coord_z = 2;
  4926. defparam \GPIO1_2~output .IN_ASYNC_MODE = 1'b0;
  4927. defparam \GPIO1_2~output .IN_SYNC_MODE = 1'b0;
  4928. defparam \GPIO1_2~output .IN_POWERUP = 1'b0;
  4929. defparam \GPIO1_2~output .OUT_REG_MODE = 1'b0;
  4930. defparam \GPIO1_2~output .OUT_ASYNC_MODE = 1'b0;
  4931. defparam \GPIO1_2~output .OUT_SYNC_MODE = 1'b0;
  4932. defparam \GPIO1_2~output .OUT_POWERUP = 1'b0;
  4933. defparam \GPIO1_2~output .OE_REG_MODE = 1'b0;
  4934. defparam \GPIO1_2~output .OE_ASYNC_MODE = 1'b0;
  4935. defparam \GPIO1_2~output .OE_SYNC_MODE = 1'b0;
  4936. defparam \GPIO1_2~output .OE_POWERUP = 1'b0;
  4937. defparam \GPIO1_2~output .CFG_TRI_INPUT = 1'b0;
  4938. defparam \GPIO1_2~output .CFG_INPUT_EN = 1'b0;
  4939. defparam \GPIO1_2~output .CFG_PULL_UP = 1'b0;
  4940. defparam \GPIO1_2~output .CFG_SLR = 1'b0;
  4941. defparam \GPIO1_2~output .CFG_OPEN_DRAIN = 1'b0;
  4942. defparam \GPIO1_2~output .CFG_PDRCTRL = 4'b0100;
  4943. defparam \GPIO1_2~output .CFG_KEEP = 2'b00;
  4944. defparam \GPIO1_2~output .CFG_LVDS_OUT_EN = 1'b0;
  4945. defparam \GPIO1_2~output .CFG_LVDS_SEL_CUA = 2'b00;
  4946. defparam \GPIO1_2~output .CFG_LVDS_IREF = 10'b0110000000;
  4947. defparam \GPIO1_2~output .CFG_LVDS_IN_EN = 1'b0;
  4948. defparam \GPIO1_2~output .DPCLK_DELAY = 4'b0000;
  4949. defparam \GPIO1_2~output .OUT_DELAY = 1'b0;
  4950. defparam \GPIO1_2~output .IN_DATA_DELAY = 3'b000;
  4951. defparam \GPIO1_2~output .IN_REG_DELAY = 3'b000;
  4952. alta_rio \GPIO1_3~output (
  4953. .padio(GPIO1_3),
  4954. .datain(\rv32.gpio1_io_out_data[3] ),
  4955. .oe(\rv32.gpio1_io_out_en[3] ),
  4956. .outclk(gnd),
  4957. .outclkena(vcc),
  4958. .inclk(gnd),
  4959. .inclkena(vcc),
  4960. .areset(gnd),
  4961. .sreset(gnd),
  4962. .combout(),
  4963. .regout());
  4964. defparam \GPIO1_3~output .coord_x = 17;
  4965. defparam \GPIO1_3~output .coord_y = 0;
  4966. defparam \GPIO1_3~output .coord_z = 2;
  4967. defparam \GPIO1_3~output .IN_ASYNC_MODE = 1'b0;
  4968. defparam \GPIO1_3~output .IN_SYNC_MODE = 1'b0;
  4969. defparam \GPIO1_3~output .IN_POWERUP = 1'b0;
  4970. defparam \GPIO1_3~output .OUT_REG_MODE = 1'b0;
  4971. defparam \GPIO1_3~output .OUT_ASYNC_MODE = 1'b0;
  4972. defparam \GPIO1_3~output .OUT_SYNC_MODE = 1'b0;
  4973. defparam \GPIO1_3~output .OUT_POWERUP = 1'b0;
  4974. defparam \GPIO1_3~output .OE_REG_MODE = 1'b0;
  4975. defparam \GPIO1_3~output .OE_ASYNC_MODE = 1'b0;
  4976. defparam \GPIO1_3~output .OE_SYNC_MODE = 1'b0;
  4977. defparam \GPIO1_3~output .OE_POWERUP = 1'b0;
  4978. defparam \GPIO1_3~output .CFG_TRI_INPUT = 1'b0;
  4979. defparam \GPIO1_3~output .CFG_INPUT_EN = 1'b0;
  4980. defparam \GPIO1_3~output .CFG_PULL_UP = 1'b0;
  4981. defparam \GPIO1_3~output .CFG_SLR = 1'b0;
  4982. defparam \GPIO1_3~output .CFG_OPEN_DRAIN = 1'b0;
  4983. defparam \GPIO1_3~output .CFG_PDRCTRL = 4'b0100;
  4984. defparam \GPIO1_3~output .CFG_KEEP = 2'b00;
  4985. defparam \GPIO1_3~output .CFG_LVDS_OUT_EN = 1'b0;
  4986. defparam \GPIO1_3~output .CFG_LVDS_SEL_CUA = 2'b00;
  4987. defparam \GPIO1_3~output .CFG_LVDS_IREF = 10'b0110000000;
  4988. defparam \GPIO1_3~output .CFG_LVDS_IN_EN = 1'b0;
  4989. defparam \GPIO1_3~output .DPCLK_DELAY = 4'b0000;
  4990. defparam \GPIO1_3~output .OUT_DELAY = 1'b0;
  4991. defparam \GPIO1_3~output .IN_DATA_DELAY = 3'b000;
  4992. defparam \GPIO1_3~output .IN_REG_DELAY = 3'b000;
  4993. alta_rio \GPIO1_4~output (
  4994. .padio(GPIO1_4),
  4995. .datain(\rv32.gpio1_io_out_data[4] ),
  4996. .oe(\rv32.gpio1_io_out_en[4] ),
  4997. .outclk(gnd),
  4998. .outclkena(vcc),
  4999. .inclk(gnd),
  5000. .inclkena(vcc),
  5001. .areset(gnd),
  5002. .sreset(gnd),
  5003. .combout(),
  5004. .regout());
  5005. defparam \GPIO1_4~output .coord_x = 6;
  5006. defparam \GPIO1_4~output .coord_y = 0;
  5007. defparam \GPIO1_4~output .coord_z = 0;
  5008. defparam \GPIO1_4~output .IN_ASYNC_MODE = 1'b0;
  5009. defparam \GPIO1_4~output .IN_SYNC_MODE = 1'b0;
  5010. defparam \GPIO1_4~output .IN_POWERUP = 1'b0;
  5011. defparam \GPIO1_4~output .OUT_REG_MODE = 1'b0;
  5012. defparam \GPIO1_4~output .OUT_ASYNC_MODE = 1'b0;
  5013. defparam \GPIO1_4~output .OUT_SYNC_MODE = 1'b0;
  5014. defparam \GPIO1_4~output .OUT_POWERUP = 1'b0;
  5015. defparam \GPIO1_4~output .OE_REG_MODE = 1'b0;
  5016. defparam \GPIO1_4~output .OE_ASYNC_MODE = 1'b0;
  5017. defparam \GPIO1_4~output .OE_SYNC_MODE = 1'b0;
  5018. defparam \GPIO1_4~output .OE_POWERUP = 1'b0;
  5019. defparam \GPIO1_4~output .CFG_TRI_INPUT = 1'b0;
  5020. defparam \GPIO1_4~output .CFG_INPUT_EN = 1'b0;
  5021. defparam \GPIO1_4~output .CFG_PULL_UP = 1'b0;
  5022. defparam \GPIO1_4~output .CFG_SLR = 1'b0;
  5023. defparam \GPIO1_4~output .CFG_OPEN_DRAIN = 1'b0;
  5024. defparam \GPIO1_4~output .CFG_PDRCTRL = 4'b0100;
  5025. defparam \GPIO1_4~output .CFG_KEEP = 2'b00;
  5026. defparam \GPIO1_4~output .CFG_LVDS_OUT_EN = 1'b0;
  5027. defparam \GPIO1_4~output .CFG_LVDS_SEL_CUA = 2'b00;
  5028. defparam \GPIO1_4~output .CFG_LVDS_IREF = 10'b0110000000;
  5029. defparam \GPIO1_4~output .CFG_LVDS_IN_EN = 1'b0;
  5030. defparam \GPIO1_4~output .DPCLK_DELAY = 4'b0000;
  5031. defparam \GPIO1_4~output .OUT_DELAY = 1'b0;
  5032. defparam \GPIO1_4~output .IN_DATA_DELAY = 3'b000;
  5033. defparam \GPIO1_4~output .IN_REG_DELAY = 3'b000;
  5034. alta_rio \GPIO1_5~output (
  5035. .padio(GPIO1_5),
  5036. .datain(\rv32.gpio1_io_out_data[5] ),
  5037. .oe(\rv32.gpio1_io_out_en[5] ),
  5038. .outclk(gnd),
  5039. .outclkena(vcc),
  5040. .inclk(gnd),
  5041. .inclkena(vcc),
  5042. .areset(gnd),
  5043. .sreset(gnd),
  5044. .combout(),
  5045. .regout());
  5046. defparam \GPIO1_5~output .coord_x = 7;
  5047. defparam \GPIO1_5~output .coord_y = 0;
  5048. defparam \GPIO1_5~output .coord_z = 3;
  5049. defparam \GPIO1_5~output .IN_ASYNC_MODE = 1'b0;
  5050. defparam \GPIO1_5~output .IN_SYNC_MODE = 1'b0;
  5051. defparam \GPIO1_5~output .IN_POWERUP = 1'b0;
  5052. defparam \GPIO1_5~output .OUT_REG_MODE = 1'b0;
  5053. defparam \GPIO1_5~output .OUT_ASYNC_MODE = 1'b0;
  5054. defparam \GPIO1_5~output .OUT_SYNC_MODE = 1'b0;
  5055. defparam \GPIO1_5~output .OUT_POWERUP = 1'b0;
  5056. defparam \GPIO1_5~output .OE_REG_MODE = 1'b0;
  5057. defparam \GPIO1_5~output .OE_ASYNC_MODE = 1'b0;
  5058. defparam \GPIO1_5~output .OE_SYNC_MODE = 1'b0;
  5059. defparam \GPIO1_5~output .OE_POWERUP = 1'b0;
  5060. defparam \GPIO1_5~output .CFG_TRI_INPUT = 1'b0;
  5061. defparam \GPIO1_5~output .CFG_INPUT_EN = 1'b0;
  5062. defparam \GPIO1_5~output .CFG_PULL_UP = 1'b0;
  5063. defparam \GPIO1_5~output .CFG_SLR = 1'b0;
  5064. defparam \GPIO1_5~output .CFG_OPEN_DRAIN = 1'b0;
  5065. defparam \GPIO1_5~output .CFG_PDRCTRL = 4'b0100;
  5066. defparam \GPIO1_5~output .CFG_KEEP = 2'b00;
  5067. defparam \GPIO1_5~output .CFG_LVDS_OUT_EN = 1'b0;
  5068. defparam \GPIO1_5~output .CFG_LVDS_SEL_CUA = 2'b00;
  5069. defparam \GPIO1_5~output .CFG_LVDS_IREF = 10'b0110000000;
  5070. defparam \GPIO1_5~output .CFG_LVDS_IN_EN = 1'b0;
  5071. defparam \GPIO1_5~output .DPCLK_DELAY = 4'b0000;
  5072. defparam \GPIO1_5~output .OUT_DELAY = 1'b0;
  5073. defparam \GPIO1_5~output .IN_DATA_DELAY = 3'b000;
  5074. defparam \GPIO1_5~output .IN_REG_DELAY = 3'b000;
  5075. alta_rio \GPIO1_6~output (
  5076. .padio(GPIO1_6),
  5077. .datain(\rv32.gpio1_io_out_data[6] ),
  5078. .oe(\rv32.gpio1_io_out_en[6] ),
  5079. .outclk(gnd),
  5080. .outclkena(vcc),
  5081. .inclk(gnd),
  5082. .inclkena(vcc),
  5083. .areset(gnd),
  5084. .sreset(gnd),
  5085. .combout(),
  5086. .regout());
  5087. defparam \GPIO1_6~output .coord_x = 17;
  5088. defparam \GPIO1_6~output .coord_y = 0;
  5089. defparam \GPIO1_6~output .coord_z = 0;
  5090. defparam \GPIO1_6~output .IN_ASYNC_MODE = 1'b0;
  5091. defparam \GPIO1_6~output .IN_SYNC_MODE = 1'b0;
  5092. defparam \GPIO1_6~output .IN_POWERUP = 1'b0;
  5093. defparam \GPIO1_6~output .OUT_REG_MODE = 1'b0;
  5094. defparam \GPIO1_6~output .OUT_ASYNC_MODE = 1'b0;
  5095. defparam \GPIO1_6~output .OUT_SYNC_MODE = 1'b0;
  5096. defparam \GPIO1_6~output .OUT_POWERUP = 1'b0;
  5097. defparam \GPIO1_6~output .OE_REG_MODE = 1'b0;
  5098. defparam \GPIO1_6~output .OE_ASYNC_MODE = 1'b0;
  5099. defparam \GPIO1_6~output .OE_SYNC_MODE = 1'b0;
  5100. defparam \GPIO1_6~output .OE_POWERUP = 1'b0;
  5101. defparam \GPIO1_6~output .CFG_TRI_INPUT = 1'b0;
  5102. defparam \GPIO1_6~output .CFG_INPUT_EN = 1'b0;
  5103. defparam \GPIO1_6~output .CFG_PULL_UP = 1'b0;
  5104. defparam \GPIO1_6~output .CFG_SLR = 1'b0;
  5105. defparam \GPIO1_6~output .CFG_OPEN_DRAIN = 1'b0;
  5106. defparam \GPIO1_6~output .CFG_PDRCTRL = 4'b0100;
  5107. defparam \GPIO1_6~output .CFG_KEEP = 2'b00;
  5108. defparam \GPIO1_6~output .CFG_LVDS_OUT_EN = 1'b0;
  5109. defparam \GPIO1_6~output .CFG_LVDS_SEL_CUA = 2'b00;
  5110. defparam \GPIO1_6~output .CFG_LVDS_IREF = 10'b0110000000;
  5111. defparam \GPIO1_6~output .CFG_LVDS_IN_EN = 1'b0;
  5112. defparam \GPIO1_6~output .DPCLK_DELAY = 4'b0000;
  5113. defparam \GPIO1_6~output .OUT_DELAY = 1'b0;
  5114. defparam \GPIO1_6~output .IN_DATA_DELAY = 3'b000;
  5115. defparam \GPIO1_6~output .IN_REG_DELAY = 3'b000;
  5116. alta_rio \GPIO1_7~output (
  5117. .padio(GPIO1_7),
  5118. .datain(\rv32.gpio1_io_out_data[7] ),
  5119. .oe(\rv32.gpio1_io_out_en[7] ),
  5120. .outclk(gnd),
  5121. .outclkena(vcc),
  5122. .inclk(gnd),
  5123. .inclkena(vcc),
  5124. .areset(gnd),
  5125. .sreset(gnd),
  5126. .combout(),
  5127. .regout());
  5128. defparam \GPIO1_7~output .coord_x = 18;
  5129. defparam \GPIO1_7~output .coord_y = 0;
  5130. defparam \GPIO1_7~output .coord_z = 1;
  5131. defparam \GPIO1_7~output .IN_ASYNC_MODE = 1'b0;
  5132. defparam \GPIO1_7~output .IN_SYNC_MODE = 1'b0;
  5133. defparam \GPIO1_7~output .IN_POWERUP = 1'b0;
  5134. defparam \GPIO1_7~output .OUT_REG_MODE = 1'b0;
  5135. defparam \GPIO1_7~output .OUT_ASYNC_MODE = 1'b0;
  5136. defparam \GPIO1_7~output .OUT_SYNC_MODE = 1'b0;
  5137. defparam \GPIO1_7~output .OUT_POWERUP = 1'b0;
  5138. defparam \GPIO1_7~output .OE_REG_MODE = 1'b0;
  5139. defparam \GPIO1_7~output .OE_ASYNC_MODE = 1'b0;
  5140. defparam \GPIO1_7~output .OE_SYNC_MODE = 1'b0;
  5141. defparam \GPIO1_7~output .OE_POWERUP = 1'b0;
  5142. defparam \GPIO1_7~output .CFG_TRI_INPUT = 1'b0;
  5143. defparam \GPIO1_7~output .CFG_INPUT_EN = 1'b0;
  5144. defparam \GPIO1_7~output .CFG_PULL_UP = 1'b0;
  5145. defparam \GPIO1_7~output .CFG_SLR = 1'b0;
  5146. defparam \GPIO1_7~output .CFG_OPEN_DRAIN = 1'b0;
  5147. defparam \GPIO1_7~output .CFG_PDRCTRL = 4'b0100;
  5148. defparam \GPIO1_7~output .CFG_KEEP = 2'b00;
  5149. defparam \GPIO1_7~output .CFG_LVDS_OUT_EN = 1'b0;
  5150. defparam \GPIO1_7~output .CFG_LVDS_SEL_CUA = 2'b00;
  5151. defparam \GPIO1_7~output .CFG_LVDS_IREF = 10'b0110000000;
  5152. defparam \GPIO1_7~output .CFG_LVDS_IN_EN = 1'b0;
  5153. defparam \GPIO1_7~output .DPCLK_DELAY = 4'b0000;
  5154. defparam \GPIO1_7~output .OUT_DELAY = 1'b0;
  5155. defparam \GPIO1_7~output .IN_DATA_DELAY = 3'b000;
  5156. defparam \GPIO1_7~output .IN_REG_DELAY = 3'b000;
  5157. alta_rio \GPIO2_0~output (
  5158. .padio(GPIO2_0),
  5159. .datain(\rv32.gpio2_io_out_data[0] ),
  5160. .oe(\rv32.gpio2_io_out_en[0] ),
  5161. .outclk(gnd),
  5162. .outclkena(vcc),
  5163. .inclk(gnd),
  5164. .inclkena(vcc),
  5165. .areset(gnd),
  5166. .sreset(gnd),
  5167. .combout(),
  5168. .regout());
  5169. defparam \GPIO2_0~output .coord_x = 19;
  5170. defparam \GPIO2_0~output .coord_y = 13;
  5171. defparam \GPIO2_0~output .coord_z = 2;
  5172. defparam \GPIO2_0~output .IN_ASYNC_MODE = 1'b0;
  5173. defparam \GPIO2_0~output .IN_SYNC_MODE = 1'b0;
  5174. defparam \GPIO2_0~output .IN_POWERUP = 1'b0;
  5175. defparam \GPIO2_0~output .OUT_REG_MODE = 1'b0;
  5176. defparam \GPIO2_0~output .OUT_ASYNC_MODE = 1'b0;
  5177. defparam \GPIO2_0~output .OUT_SYNC_MODE = 1'b0;
  5178. defparam \GPIO2_0~output .OUT_POWERUP = 1'b0;
  5179. defparam \GPIO2_0~output .OE_REG_MODE = 1'b0;
  5180. defparam \GPIO2_0~output .OE_ASYNC_MODE = 1'b0;
  5181. defparam \GPIO2_0~output .OE_SYNC_MODE = 1'b0;
  5182. defparam \GPIO2_0~output .OE_POWERUP = 1'b0;
  5183. defparam \GPIO2_0~output .CFG_TRI_INPUT = 1'b0;
  5184. defparam \GPIO2_0~output .CFG_INPUT_EN = 1'b0;
  5185. defparam \GPIO2_0~output .CFG_PULL_UP = 1'b0;
  5186. defparam \GPIO2_0~output .CFG_SLR = 1'b0;
  5187. defparam \GPIO2_0~output .CFG_OPEN_DRAIN = 1'b0;
  5188. defparam \GPIO2_0~output .CFG_PDRCTRL = 4'b0100;
  5189. defparam \GPIO2_0~output .CFG_KEEP = 2'b00;
  5190. defparam \GPIO2_0~output .CFG_LVDS_OUT_EN = 1'b0;
  5191. defparam \GPIO2_0~output .CFG_LVDS_SEL_CUA = 2'b00;
  5192. defparam \GPIO2_0~output .CFG_LVDS_IREF = 10'b0110000000;
  5193. defparam \GPIO2_0~output .CFG_LVDS_IN_EN = 1'b0;
  5194. defparam \GPIO2_0~output .DPCLK_DELAY = 4'b0000;
  5195. defparam \GPIO2_0~output .OUT_DELAY = 1'b0;
  5196. defparam \GPIO2_0~output .IN_DATA_DELAY = 3'b000;
  5197. defparam \GPIO2_0~output .IN_REG_DELAY = 3'b000;
  5198. alta_rio \GPIO2_1~output (
  5199. .padio(GPIO2_1),
  5200. .datain(\rv32.gpio2_io_out_data[1] ),
  5201. .oe(\rv32.gpio2_io_out_en[1] ),
  5202. .outclk(gnd),
  5203. .outclkena(vcc),
  5204. .inclk(gnd),
  5205. .inclkena(vcc),
  5206. .areset(gnd),
  5207. .sreset(gnd),
  5208. .combout(),
  5209. .regout());
  5210. defparam \GPIO2_1~output .coord_x = 20;
  5211. defparam \GPIO2_1~output .coord_y = 13;
  5212. defparam \GPIO2_1~output .coord_z = 1;
  5213. defparam \GPIO2_1~output .IN_ASYNC_MODE = 1'b0;
  5214. defparam \GPIO2_1~output .IN_SYNC_MODE = 1'b0;
  5215. defparam \GPIO2_1~output .IN_POWERUP = 1'b0;
  5216. defparam \GPIO2_1~output .OUT_REG_MODE = 1'b0;
  5217. defparam \GPIO2_1~output .OUT_ASYNC_MODE = 1'b0;
  5218. defparam \GPIO2_1~output .OUT_SYNC_MODE = 1'b0;
  5219. defparam \GPIO2_1~output .OUT_POWERUP = 1'b0;
  5220. defparam \GPIO2_1~output .OE_REG_MODE = 1'b0;
  5221. defparam \GPIO2_1~output .OE_ASYNC_MODE = 1'b0;
  5222. defparam \GPIO2_1~output .OE_SYNC_MODE = 1'b0;
  5223. defparam \GPIO2_1~output .OE_POWERUP = 1'b0;
  5224. defparam \GPIO2_1~output .CFG_TRI_INPUT = 1'b0;
  5225. defparam \GPIO2_1~output .CFG_INPUT_EN = 1'b0;
  5226. defparam \GPIO2_1~output .CFG_PULL_UP = 1'b0;
  5227. defparam \GPIO2_1~output .CFG_SLR = 1'b0;
  5228. defparam \GPIO2_1~output .CFG_OPEN_DRAIN = 1'b0;
  5229. defparam \GPIO2_1~output .CFG_PDRCTRL = 4'b0100;
  5230. defparam \GPIO2_1~output .CFG_KEEP = 2'b00;
  5231. defparam \GPIO2_1~output .CFG_LVDS_OUT_EN = 1'b0;
  5232. defparam \GPIO2_1~output .CFG_LVDS_SEL_CUA = 2'b00;
  5233. defparam \GPIO2_1~output .CFG_LVDS_IREF = 10'b0110000000;
  5234. defparam \GPIO2_1~output .CFG_LVDS_IN_EN = 1'b0;
  5235. defparam \GPIO2_1~output .DPCLK_DELAY = 4'b0000;
  5236. defparam \GPIO2_1~output .OUT_DELAY = 1'b0;
  5237. defparam \GPIO2_1~output .IN_DATA_DELAY = 3'b000;
  5238. defparam \GPIO2_1~output .IN_REG_DELAY = 3'b000;
  5239. alta_rio \GPIO2_2~output (
  5240. .padio(GPIO2_2),
  5241. .datain(\rv32.gpio2_io_out_data[2] ),
  5242. .oe(\rv32.gpio2_io_out_en[2] ),
  5243. .outclk(gnd),
  5244. .outclkena(vcc),
  5245. .inclk(gnd),
  5246. .inclkena(vcc),
  5247. .areset(gnd),
  5248. .sreset(gnd),
  5249. .combout(),
  5250. .regout());
  5251. defparam \GPIO2_2~output .coord_x = 22;
  5252. defparam \GPIO2_2~output .coord_y = 3;
  5253. defparam \GPIO2_2~output .coord_z = 3;
  5254. defparam \GPIO2_2~output .IN_ASYNC_MODE = 1'b0;
  5255. defparam \GPIO2_2~output .IN_SYNC_MODE = 1'b0;
  5256. defparam \GPIO2_2~output .IN_POWERUP = 1'b0;
  5257. defparam \GPIO2_2~output .OUT_REG_MODE = 1'b0;
  5258. defparam \GPIO2_2~output .OUT_ASYNC_MODE = 1'b0;
  5259. defparam \GPIO2_2~output .OUT_SYNC_MODE = 1'b0;
  5260. defparam \GPIO2_2~output .OUT_POWERUP = 1'b0;
  5261. defparam \GPIO2_2~output .OE_REG_MODE = 1'b0;
  5262. defparam \GPIO2_2~output .OE_ASYNC_MODE = 1'b0;
  5263. defparam \GPIO2_2~output .OE_SYNC_MODE = 1'b0;
  5264. defparam \GPIO2_2~output .OE_POWERUP = 1'b0;
  5265. defparam \GPIO2_2~output .CFG_TRI_INPUT = 1'b0;
  5266. defparam \GPIO2_2~output .CFG_INPUT_EN = 1'b0;
  5267. defparam \GPIO2_2~output .CFG_PULL_UP = 1'b0;
  5268. defparam \GPIO2_2~output .CFG_SLR = 1'b0;
  5269. defparam \GPIO2_2~output .CFG_OPEN_DRAIN = 1'b0;
  5270. defparam \GPIO2_2~output .CFG_PDRCTRL = 4'b0100;
  5271. defparam \GPIO2_2~output .CFG_KEEP = 2'b00;
  5272. defparam \GPIO2_2~output .CFG_LVDS_OUT_EN = 1'b0;
  5273. defparam \GPIO2_2~output .CFG_LVDS_SEL_CUA = 2'b00;
  5274. defparam \GPIO2_2~output .CFG_LVDS_IREF = 10'b0110000000;
  5275. defparam \GPIO2_2~output .CFG_LVDS_IN_EN = 1'b0;
  5276. defparam \GPIO2_2~output .DPCLK_DELAY = 4'b0000;
  5277. defparam \GPIO2_2~output .OUT_DELAY = 1'b0;
  5278. defparam \GPIO2_2~output .IN_DATA_DELAY = 3'b000;
  5279. defparam \GPIO2_2~output .IN_REG_DELAY = 3'b000;
  5280. alta_rio \GPIO2_3~output (
  5281. .padio(GPIO2_3),
  5282. .datain(\rv32.gpio2_io_out_data[3] ),
  5283. .oe(\rv32.gpio2_io_out_en[3] ),
  5284. .outclk(gnd),
  5285. .outclkena(vcc),
  5286. .inclk(gnd),
  5287. .inclkena(vcc),
  5288. .areset(gnd),
  5289. .sreset(gnd),
  5290. .combout(),
  5291. .regout());
  5292. defparam \GPIO2_3~output .coord_x = 22;
  5293. defparam \GPIO2_3~output .coord_y = 1;
  5294. defparam \GPIO2_3~output .coord_z = 2;
  5295. defparam \GPIO2_3~output .IN_ASYNC_MODE = 1'b0;
  5296. defparam \GPIO2_3~output .IN_SYNC_MODE = 1'b0;
  5297. defparam \GPIO2_3~output .IN_POWERUP = 1'b0;
  5298. defparam \GPIO2_3~output .OUT_REG_MODE = 1'b0;
  5299. defparam \GPIO2_3~output .OUT_ASYNC_MODE = 1'b0;
  5300. defparam \GPIO2_3~output .OUT_SYNC_MODE = 1'b0;
  5301. defparam \GPIO2_3~output .OUT_POWERUP = 1'b0;
  5302. defparam \GPIO2_3~output .OE_REG_MODE = 1'b0;
  5303. defparam \GPIO2_3~output .OE_ASYNC_MODE = 1'b0;
  5304. defparam \GPIO2_3~output .OE_SYNC_MODE = 1'b0;
  5305. defparam \GPIO2_3~output .OE_POWERUP = 1'b0;
  5306. defparam \GPIO2_3~output .CFG_TRI_INPUT = 1'b0;
  5307. defparam \GPIO2_3~output .CFG_INPUT_EN = 1'b0;
  5308. defparam \GPIO2_3~output .CFG_PULL_UP = 1'b0;
  5309. defparam \GPIO2_3~output .CFG_SLR = 1'b0;
  5310. defparam \GPIO2_3~output .CFG_OPEN_DRAIN = 1'b0;
  5311. defparam \GPIO2_3~output .CFG_PDRCTRL = 4'b0100;
  5312. defparam \GPIO2_3~output .CFG_KEEP = 2'b00;
  5313. defparam \GPIO2_3~output .CFG_LVDS_OUT_EN = 1'b0;
  5314. defparam \GPIO2_3~output .CFG_LVDS_SEL_CUA = 2'b00;
  5315. defparam \GPIO2_3~output .CFG_LVDS_IREF = 10'b0110000000;
  5316. defparam \GPIO2_3~output .CFG_LVDS_IN_EN = 1'b0;
  5317. defparam \GPIO2_3~output .DPCLK_DELAY = 4'b0000;
  5318. defparam \GPIO2_3~output .OUT_DELAY = 1'b0;
  5319. defparam \GPIO2_3~output .IN_DATA_DELAY = 3'b000;
  5320. defparam \GPIO2_3~output .IN_REG_DELAY = 3'b000;
  5321. alta_rio \GPIO2_4~output (
  5322. .padio(GPIO2_4),
  5323. .datain(\rv32.gpio2_io_out_data[4] ),
  5324. .oe(\rv32.gpio2_io_out_en[4] ),
  5325. .outclk(gnd),
  5326. .outclkena(vcc),
  5327. .inclk(gnd),
  5328. .inclkena(vcc),
  5329. .areset(gnd),
  5330. .sreset(gnd),
  5331. .combout(),
  5332. .regout());
  5333. defparam \GPIO2_4~output .coord_x = 19;
  5334. defparam \GPIO2_4~output .coord_y = 13;
  5335. defparam \GPIO2_4~output .coord_z = 0;
  5336. defparam \GPIO2_4~output .IN_ASYNC_MODE = 1'b0;
  5337. defparam \GPIO2_4~output .IN_SYNC_MODE = 1'b0;
  5338. defparam \GPIO2_4~output .IN_POWERUP = 1'b0;
  5339. defparam \GPIO2_4~output .OUT_REG_MODE = 1'b0;
  5340. defparam \GPIO2_4~output .OUT_ASYNC_MODE = 1'b0;
  5341. defparam \GPIO2_4~output .OUT_SYNC_MODE = 1'b0;
  5342. defparam \GPIO2_4~output .OUT_POWERUP = 1'b0;
  5343. defparam \GPIO2_4~output .OE_REG_MODE = 1'b0;
  5344. defparam \GPIO2_4~output .OE_ASYNC_MODE = 1'b0;
  5345. defparam \GPIO2_4~output .OE_SYNC_MODE = 1'b0;
  5346. defparam \GPIO2_4~output .OE_POWERUP = 1'b0;
  5347. defparam \GPIO2_4~output .CFG_TRI_INPUT = 1'b0;
  5348. defparam \GPIO2_4~output .CFG_INPUT_EN = 1'b0;
  5349. defparam \GPIO2_4~output .CFG_PULL_UP = 1'b0;
  5350. defparam \GPIO2_4~output .CFG_SLR = 1'b0;
  5351. defparam \GPIO2_4~output .CFG_OPEN_DRAIN = 1'b0;
  5352. defparam \GPIO2_4~output .CFG_PDRCTRL = 4'b0100;
  5353. defparam \GPIO2_4~output .CFG_KEEP = 2'b00;
  5354. defparam \GPIO2_4~output .CFG_LVDS_OUT_EN = 1'b0;
  5355. defparam \GPIO2_4~output .CFG_LVDS_SEL_CUA = 2'b00;
  5356. defparam \GPIO2_4~output .CFG_LVDS_IREF = 10'b0110000000;
  5357. defparam \GPIO2_4~output .CFG_LVDS_IN_EN = 1'b0;
  5358. defparam \GPIO2_4~output .DPCLK_DELAY = 4'b0000;
  5359. defparam \GPIO2_4~output .OUT_DELAY = 1'b0;
  5360. defparam \GPIO2_4~output .IN_DATA_DELAY = 3'b000;
  5361. defparam \GPIO2_4~output .IN_REG_DELAY = 3'b000;
  5362. alta_rio \GPIO2_5~output (
  5363. .padio(GPIO2_5),
  5364. .datain(\rv32.gpio2_io_out_data[5] ),
  5365. .oe(\rv32.gpio2_io_out_en[5] ),
  5366. .outclk(gnd),
  5367. .outclkena(vcc),
  5368. .inclk(gnd),
  5369. .inclkena(vcc),
  5370. .areset(gnd),
  5371. .sreset(gnd),
  5372. .combout(),
  5373. .regout());
  5374. defparam \GPIO2_5~output .coord_x = 20;
  5375. defparam \GPIO2_5~output .coord_y = 13;
  5376. defparam \GPIO2_5~output .coord_z = 3;
  5377. defparam \GPIO2_5~output .IN_ASYNC_MODE = 1'b0;
  5378. defparam \GPIO2_5~output .IN_SYNC_MODE = 1'b0;
  5379. defparam \GPIO2_5~output .IN_POWERUP = 1'b0;
  5380. defparam \GPIO2_5~output .OUT_REG_MODE = 1'b0;
  5381. defparam \GPIO2_5~output .OUT_ASYNC_MODE = 1'b0;
  5382. defparam \GPIO2_5~output .OUT_SYNC_MODE = 1'b0;
  5383. defparam \GPIO2_5~output .OUT_POWERUP = 1'b0;
  5384. defparam \GPIO2_5~output .OE_REG_MODE = 1'b0;
  5385. defparam \GPIO2_5~output .OE_ASYNC_MODE = 1'b0;
  5386. defparam \GPIO2_5~output .OE_SYNC_MODE = 1'b0;
  5387. defparam \GPIO2_5~output .OE_POWERUP = 1'b0;
  5388. defparam \GPIO2_5~output .CFG_TRI_INPUT = 1'b0;
  5389. defparam \GPIO2_5~output .CFG_INPUT_EN = 1'b0;
  5390. defparam \GPIO2_5~output .CFG_PULL_UP = 1'b0;
  5391. defparam \GPIO2_5~output .CFG_SLR = 1'b0;
  5392. defparam \GPIO2_5~output .CFG_OPEN_DRAIN = 1'b0;
  5393. defparam \GPIO2_5~output .CFG_PDRCTRL = 4'b0100;
  5394. defparam \GPIO2_5~output .CFG_KEEP = 2'b00;
  5395. defparam \GPIO2_5~output .CFG_LVDS_OUT_EN = 1'b0;
  5396. defparam \GPIO2_5~output .CFG_LVDS_SEL_CUA = 2'b00;
  5397. defparam \GPIO2_5~output .CFG_LVDS_IREF = 10'b0110000000;
  5398. defparam \GPIO2_5~output .CFG_LVDS_IN_EN = 1'b0;
  5399. defparam \GPIO2_5~output .DPCLK_DELAY = 4'b0000;
  5400. defparam \GPIO2_5~output .OUT_DELAY = 1'b0;
  5401. defparam \GPIO2_5~output .IN_DATA_DELAY = 3'b000;
  5402. defparam \GPIO2_5~output .IN_REG_DELAY = 3'b000;
  5403. alta_rio \GPIO2_6~output (
  5404. .padio(GPIO2_6),
  5405. .datain(\rv32.gpio2_io_out_data[6] ),
  5406. .oe(\rv32.gpio2_io_out_en[6] ),
  5407. .outclk(gnd),
  5408. .outclkena(vcc),
  5409. .inclk(gnd),
  5410. .inclkena(vcc),
  5411. .areset(gnd),
  5412. .sreset(gnd),
  5413. .combout(),
  5414. .regout());
  5415. defparam \GPIO2_6~output .coord_x = 22;
  5416. defparam \GPIO2_6~output .coord_y = 3;
  5417. defparam \GPIO2_6~output .coord_z = 1;
  5418. defparam \GPIO2_6~output .IN_ASYNC_MODE = 1'b0;
  5419. defparam \GPIO2_6~output .IN_SYNC_MODE = 1'b0;
  5420. defparam \GPIO2_6~output .IN_POWERUP = 1'b0;
  5421. defparam \GPIO2_6~output .OUT_REG_MODE = 1'b0;
  5422. defparam \GPIO2_6~output .OUT_ASYNC_MODE = 1'b0;
  5423. defparam \GPIO2_6~output .OUT_SYNC_MODE = 1'b0;
  5424. defparam \GPIO2_6~output .OUT_POWERUP = 1'b0;
  5425. defparam \GPIO2_6~output .OE_REG_MODE = 1'b0;
  5426. defparam \GPIO2_6~output .OE_ASYNC_MODE = 1'b0;
  5427. defparam \GPIO2_6~output .OE_SYNC_MODE = 1'b0;
  5428. defparam \GPIO2_6~output .OE_POWERUP = 1'b0;
  5429. defparam \GPIO2_6~output .CFG_TRI_INPUT = 1'b0;
  5430. defparam \GPIO2_6~output .CFG_INPUT_EN = 1'b0;
  5431. defparam \GPIO2_6~output .CFG_PULL_UP = 1'b0;
  5432. defparam \GPIO2_6~output .CFG_SLR = 1'b0;
  5433. defparam \GPIO2_6~output .CFG_OPEN_DRAIN = 1'b0;
  5434. defparam \GPIO2_6~output .CFG_PDRCTRL = 4'b0100;
  5435. defparam \GPIO2_6~output .CFG_KEEP = 2'b00;
  5436. defparam \GPIO2_6~output .CFG_LVDS_OUT_EN = 1'b0;
  5437. defparam \GPIO2_6~output .CFG_LVDS_SEL_CUA = 2'b00;
  5438. defparam \GPIO2_6~output .CFG_LVDS_IREF = 10'b0110000000;
  5439. defparam \GPIO2_6~output .CFG_LVDS_IN_EN = 1'b0;
  5440. defparam \GPIO2_6~output .DPCLK_DELAY = 4'b0000;
  5441. defparam \GPIO2_6~output .OUT_DELAY = 1'b0;
  5442. defparam \GPIO2_6~output .IN_DATA_DELAY = 3'b000;
  5443. defparam \GPIO2_6~output .IN_REG_DELAY = 3'b000;
  5444. alta_rio \GPIO2_7~output (
  5445. .padio(GPIO2_7),
  5446. .datain(\rv32.gpio2_io_out_data[7] ),
  5447. .oe(\rv32.gpio2_io_out_en[7] ),
  5448. .outclk(gnd),
  5449. .outclkena(vcc),
  5450. .inclk(gnd),
  5451. .inclkena(vcc),
  5452. .areset(gnd),
  5453. .sreset(gnd),
  5454. .combout(),
  5455. .regout());
  5456. defparam \GPIO2_7~output .coord_x = 22;
  5457. defparam \GPIO2_7~output .coord_y = 2;
  5458. defparam \GPIO2_7~output .coord_z = 5;
  5459. defparam \GPIO2_7~output .IN_ASYNC_MODE = 1'b0;
  5460. defparam \GPIO2_7~output .IN_SYNC_MODE = 1'b0;
  5461. defparam \GPIO2_7~output .IN_POWERUP = 1'b0;
  5462. defparam \GPIO2_7~output .OUT_REG_MODE = 1'b0;
  5463. defparam \GPIO2_7~output .OUT_ASYNC_MODE = 1'b0;
  5464. defparam \GPIO2_7~output .OUT_SYNC_MODE = 1'b0;
  5465. defparam \GPIO2_7~output .OUT_POWERUP = 1'b0;
  5466. defparam \GPIO2_7~output .OE_REG_MODE = 1'b0;
  5467. defparam \GPIO2_7~output .OE_ASYNC_MODE = 1'b0;
  5468. defparam \GPIO2_7~output .OE_SYNC_MODE = 1'b0;
  5469. defparam \GPIO2_7~output .OE_POWERUP = 1'b0;
  5470. defparam \GPIO2_7~output .CFG_TRI_INPUT = 1'b0;
  5471. defparam \GPIO2_7~output .CFG_INPUT_EN = 1'b0;
  5472. defparam \GPIO2_7~output .CFG_PULL_UP = 1'b0;
  5473. defparam \GPIO2_7~output .CFG_SLR = 1'b0;
  5474. defparam \GPIO2_7~output .CFG_OPEN_DRAIN = 1'b0;
  5475. defparam \GPIO2_7~output .CFG_PDRCTRL = 4'b0100;
  5476. defparam \GPIO2_7~output .CFG_KEEP = 2'b00;
  5477. defparam \GPIO2_7~output .CFG_LVDS_OUT_EN = 1'b0;
  5478. defparam \GPIO2_7~output .CFG_LVDS_SEL_CUA = 2'b00;
  5479. defparam \GPIO2_7~output .CFG_LVDS_IREF = 10'b0110000000;
  5480. defparam \GPIO2_7~output .CFG_LVDS_IN_EN = 1'b0;
  5481. defparam \GPIO2_7~output .DPCLK_DELAY = 4'b0000;
  5482. defparam \GPIO2_7~output .OUT_DELAY = 1'b0;
  5483. defparam \GPIO2_7~output .IN_DATA_DELAY = 3'b000;
  5484. defparam \GPIO2_7~output .IN_REG_DELAY = 3'b000;
  5485. alta_rio \GPIO3_0~input (
  5486. .padio(GPIO3_0),
  5487. .datain(gnd),
  5488. .oe(gnd),
  5489. .outclk(gnd),
  5490. .outclkena(vcc),
  5491. .inclk(gnd),
  5492. .inclkena(vcc),
  5493. .areset(gnd),
  5494. .sreset(gnd),
  5495. .combout(\GPIO3_0~input_o ),
  5496. .regout());
  5497. defparam \GPIO3_0~input .coord_x = 19;
  5498. defparam \GPIO3_0~input .coord_y = 0;
  5499. defparam \GPIO3_0~input .coord_z = 1;
  5500. defparam \GPIO3_0~input .IN_ASYNC_MODE = 1'b0;
  5501. defparam \GPIO3_0~input .IN_SYNC_MODE = 1'b0;
  5502. defparam \GPIO3_0~input .IN_POWERUP = 1'b0;
  5503. defparam \GPIO3_0~input .OUT_REG_MODE = 1'b0;
  5504. defparam \GPIO3_0~input .OUT_ASYNC_MODE = 1'b0;
  5505. defparam \GPIO3_0~input .OUT_SYNC_MODE = 1'b0;
  5506. defparam \GPIO3_0~input .OUT_POWERUP = 1'b0;
  5507. defparam \GPIO3_0~input .OE_REG_MODE = 1'b0;
  5508. defparam \GPIO3_0~input .OE_ASYNC_MODE = 1'b0;
  5509. defparam \GPIO3_0~input .OE_SYNC_MODE = 1'b0;
  5510. defparam \GPIO3_0~input .OE_POWERUP = 1'b0;
  5511. defparam \GPIO3_0~input .CFG_TRI_INPUT = 1'b0;
  5512. defparam \GPIO3_0~input .CFG_INPUT_EN = 1'b1;
  5513. defparam \GPIO3_0~input .CFG_PULL_UP = 1'b0;
  5514. defparam \GPIO3_0~input .CFG_SLR = 1'b0;
  5515. defparam \GPIO3_0~input .CFG_OPEN_DRAIN = 1'b0;
  5516. defparam \GPIO3_0~input .CFG_PDRCTRL = 4'b0100;
  5517. defparam \GPIO3_0~input .CFG_KEEP = 2'b00;
  5518. defparam \GPIO3_0~input .CFG_LVDS_OUT_EN = 1'b0;
  5519. defparam \GPIO3_0~input .CFG_LVDS_SEL_CUA = 2'b00;
  5520. defparam \GPIO3_0~input .CFG_LVDS_IREF = 10'b0110000000;
  5521. defparam \GPIO3_0~input .CFG_LVDS_IN_EN = 1'b0;
  5522. defparam \GPIO3_0~input .DPCLK_DELAY = 4'b0000;
  5523. defparam \GPIO3_0~input .OUT_DELAY = 1'b0;
  5524. defparam \GPIO3_0~input .IN_DATA_DELAY = 3'b000;
  5525. defparam \GPIO3_0~input .IN_REG_DELAY = 3'b000;
  5526. alta_rio \GPIO3_1~input (
  5527. .padio(GPIO3_1),
  5528. .datain(gnd),
  5529. .oe(gnd),
  5530. .outclk(gnd),
  5531. .outclkena(vcc),
  5532. .inclk(gnd),
  5533. .inclkena(vcc),
  5534. .areset(gnd),
  5535. .sreset(gnd),
  5536. .combout(\GPIO3_1~input_o ),
  5537. .regout());
  5538. defparam \GPIO3_1~input .coord_x = 20;
  5539. defparam \GPIO3_1~input .coord_y = 0;
  5540. defparam \GPIO3_1~input .coord_z = 0;
  5541. defparam \GPIO3_1~input .IN_ASYNC_MODE = 1'b0;
  5542. defparam \GPIO3_1~input .IN_SYNC_MODE = 1'b0;
  5543. defparam \GPIO3_1~input .IN_POWERUP = 1'b0;
  5544. defparam \GPIO3_1~input .OUT_REG_MODE = 1'b0;
  5545. defparam \GPIO3_1~input .OUT_ASYNC_MODE = 1'b0;
  5546. defparam \GPIO3_1~input .OUT_SYNC_MODE = 1'b0;
  5547. defparam \GPIO3_1~input .OUT_POWERUP = 1'b0;
  5548. defparam \GPIO3_1~input .OE_REG_MODE = 1'b0;
  5549. defparam \GPIO3_1~input .OE_ASYNC_MODE = 1'b0;
  5550. defparam \GPIO3_1~input .OE_SYNC_MODE = 1'b0;
  5551. defparam \GPIO3_1~input .OE_POWERUP = 1'b0;
  5552. defparam \GPIO3_1~input .CFG_TRI_INPUT = 1'b0;
  5553. defparam \GPIO3_1~input .CFG_INPUT_EN = 1'b1;
  5554. defparam \GPIO3_1~input .CFG_PULL_UP = 1'b0;
  5555. defparam \GPIO3_1~input .CFG_SLR = 1'b0;
  5556. defparam \GPIO3_1~input .CFG_OPEN_DRAIN = 1'b0;
  5557. defparam \GPIO3_1~input .CFG_PDRCTRL = 4'b0100;
  5558. defparam \GPIO3_1~input .CFG_KEEP = 2'b00;
  5559. defparam \GPIO3_1~input .CFG_LVDS_OUT_EN = 1'b0;
  5560. defparam \GPIO3_1~input .CFG_LVDS_SEL_CUA = 2'b00;
  5561. defparam \GPIO3_1~input .CFG_LVDS_IREF = 10'b0110000000;
  5562. defparam \GPIO3_1~input .CFG_LVDS_IN_EN = 1'b0;
  5563. defparam \GPIO3_1~input .DPCLK_DELAY = 4'b0000;
  5564. defparam \GPIO3_1~input .OUT_DELAY = 1'b0;
  5565. defparam \GPIO3_1~input .IN_DATA_DELAY = 3'b000;
  5566. defparam \GPIO3_1~input .IN_REG_DELAY = 3'b000;
  5567. alta_rio \GPIO3_2~input (
  5568. .padio(GPIO3_2),
  5569. .datain(gnd),
  5570. .oe(gnd),
  5571. .outclk(gnd),
  5572. .outclkena(vcc),
  5573. .inclk(gnd),
  5574. .inclkena(vcc),
  5575. .areset(gnd),
  5576. .sreset(gnd),
  5577. .combout(\GPIO3_2~input_o ),
  5578. .regout());
  5579. defparam \GPIO3_2~input .coord_x = 18;
  5580. defparam \GPIO3_2~input .coord_y = 13;
  5581. defparam \GPIO3_2~input .coord_z = 0;
  5582. defparam \GPIO3_2~input .IN_ASYNC_MODE = 1'b0;
  5583. defparam \GPIO3_2~input .IN_SYNC_MODE = 1'b0;
  5584. defparam \GPIO3_2~input .IN_POWERUP = 1'b0;
  5585. defparam \GPIO3_2~input .OUT_REG_MODE = 1'b0;
  5586. defparam \GPIO3_2~input .OUT_ASYNC_MODE = 1'b0;
  5587. defparam \GPIO3_2~input .OUT_SYNC_MODE = 1'b0;
  5588. defparam \GPIO3_2~input .OUT_POWERUP = 1'b0;
  5589. defparam \GPIO3_2~input .OE_REG_MODE = 1'b0;
  5590. defparam \GPIO3_2~input .OE_ASYNC_MODE = 1'b0;
  5591. defparam \GPIO3_2~input .OE_SYNC_MODE = 1'b0;
  5592. defparam \GPIO3_2~input .OE_POWERUP = 1'b0;
  5593. defparam \GPIO3_2~input .CFG_TRI_INPUT = 1'b0;
  5594. defparam \GPIO3_2~input .CFG_INPUT_EN = 1'b1;
  5595. defparam \GPIO3_2~input .CFG_PULL_UP = 1'b0;
  5596. defparam \GPIO3_2~input .CFG_SLR = 1'b0;
  5597. defparam \GPIO3_2~input .CFG_OPEN_DRAIN = 1'b0;
  5598. defparam \GPIO3_2~input .CFG_PDRCTRL = 4'b0100;
  5599. defparam \GPIO3_2~input .CFG_KEEP = 2'b00;
  5600. defparam \GPIO3_2~input .CFG_LVDS_OUT_EN = 1'b0;
  5601. defparam \GPIO3_2~input .CFG_LVDS_SEL_CUA = 2'b00;
  5602. defparam \GPIO3_2~input .CFG_LVDS_IREF = 10'b0110000000;
  5603. defparam \GPIO3_2~input .CFG_LVDS_IN_EN = 1'b0;
  5604. defparam \GPIO3_2~input .DPCLK_DELAY = 4'b0000;
  5605. defparam \GPIO3_2~input .OUT_DELAY = 1'b0;
  5606. defparam \GPIO3_2~input .IN_DATA_DELAY = 3'b000;
  5607. defparam \GPIO3_2~input .IN_REG_DELAY = 3'b000;
  5608. alta_rio \GPIO3_3~input (
  5609. .padio(GPIO3_3),
  5610. .datain(gnd),
  5611. .oe(gnd),
  5612. .outclk(gnd),
  5613. .outclkena(vcc),
  5614. .inclk(gnd),
  5615. .inclkena(vcc),
  5616. .areset(gnd),
  5617. .sreset(gnd),
  5618. .combout(\GPIO3_3~input_o ),
  5619. .regout());
  5620. defparam \GPIO3_3~input .coord_x = 18;
  5621. defparam \GPIO3_3~input .coord_y = 13;
  5622. defparam \GPIO3_3~input .coord_z = 2;
  5623. defparam \GPIO3_3~input .IN_ASYNC_MODE = 1'b0;
  5624. defparam \GPIO3_3~input .IN_SYNC_MODE = 1'b0;
  5625. defparam \GPIO3_3~input .IN_POWERUP = 1'b0;
  5626. defparam \GPIO3_3~input .OUT_REG_MODE = 1'b0;
  5627. defparam \GPIO3_3~input .OUT_ASYNC_MODE = 1'b0;
  5628. defparam \GPIO3_3~input .OUT_SYNC_MODE = 1'b0;
  5629. defparam \GPIO3_3~input .OUT_POWERUP = 1'b0;
  5630. defparam \GPIO3_3~input .OE_REG_MODE = 1'b0;
  5631. defparam \GPIO3_3~input .OE_ASYNC_MODE = 1'b0;
  5632. defparam \GPIO3_3~input .OE_SYNC_MODE = 1'b0;
  5633. defparam \GPIO3_3~input .OE_POWERUP = 1'b0;
  5634. defparam \GPIO3_3~input .CFG_TRI_INPUT = 1'b0;
  5635. defparam \GPIO3_3~input .CFG_INPUT_EN = 1'b1;
  5636. defparam \GPIO3_3~input .CFG_PULL_UP = 1'b0;
  5637. defparam \GPIO3_3~input .CFG_SLR = 1'b0;
  5638. defparam \GPIO3_3~input .CFG_OPEN_DRAIN = 1'b0;
  5639. defparam \GPIO3_3~input .CFG_PDRCTRL = 4'b0100;
  5640. defparam \GPIO3_3~input .CFG_KEEP = 2'b00;
  5641. defparam \GPIO3_3~input .CFG_LVDS_OUT_EN = 1'b0;
  5642. defparam \GPIO3_3~input .CFG_LVDS_SEL_CUA = 2'b00;
  5643. defparam \GPIO3_3~input .CFG_LVDS_IREF = 10'b0110000000;
  5644. defparam \GPIO3_3~input .CFG_LVDS_IN_EN = 1'b0;
  5645. defparam \GPIO3_3~input .DPCLK_DELAY = 4'b0000;
  5646. defparam \GPIO3_3~input .OUT_DELAY = 1'b0;
  5647. defparam \GPIO3_3~input .IN_DATA_DELAY = 3'b000;
  5648. defparam \GPIO3_3~input .IN_REG_DELAY = 3'b000;
  5649. alta_rio \GPIO3_4~input (
  5650. .padio(GPIO3_4),
  5651. .datain(gnd),
  5652. .oe(gnd),
  5653. .outclk(gnd),
  5654. .outclkena(vcc),
  5655. .inclk(gnd),
  5656. .inclkena(vcc),
  5657. .areset(gnd),
  5658. .sreset(gnd),
  5659. .combout(\GPIO3_4~input_o ),
  5660. .regout());
  5661. defparam \GPIO3_4~input .coord_x = 18;
  5662. defparam \GPIO3_4~input .coord_y = 13;
  5663. defparam \GPIO3_4~input .coord_z = 3;
  5664. defparam \GPIO3_4~input .IN_ASYNC_MODE = 1'b0;
  5665. defparam \GPIO3_4~input .IN_SYNC_MODE = 1'b0;
  5666. defparam \GPIO3_4~input .IN_POWERUP = 1'b0;
  5667. defparam \GPIO3_4~input .OUT_REG_MODE = 1'b0;
  5668. defparam \GPIO3_4~input .OUT_ASYNC_MODE = 1'b0;
  5669. defparam \GPIO3_4~input .OUT_SYNC_MODE = 1'b0;
  5670. defparam \GPIO3_4~input .OUT_POWERUP = 1'b0;
  5671. defparam \GPIO3_4~input .OE_REG_MODE = 1'b0;
  5672. defparam \GPIO3_4~input .OE_ASYNC_MODE = 1'b0;
  5673. defparam \GPIO3_4~input .OE_SYNC_MODE = 1'b0;
  5674. defparam \GPIO3_4~input .OE_POWERUP = 1'b0;
  5675. defparam \GPIO3_4~input .CFG_TRI_INPUT = 1'b0;
  5676. defparam \GPIO3_4~input .CFG_INPUT_EN = 1'b1;
  5677. defparam \GPIO3_4~input .CFG_PULL_UP = 1'b0;
  5678. defparam \GPIO3_4~input .CFG_SLR = 1'b0;
  5679. defparam \GPIO3_4~input .CFG_OPEN_DRAIN = 1'b0;
  5680. defparam \GPIO3_4~input .CFG_PDRCTRL = 4'b0100;
  5681. defparam \GPIO3_4~input .CFG_KEEP = 2'b00;
  5682. defparam \GPIO3_4~input .CFG_LVDS_OUT_EN = 1'b0;
  5683. defparam \GPIO3_4~input .CFG_LVDS_SEL_CUA = 2'b00;
  5684. defparam \GPIO3_4~input .CFG_LVDS_IREF = 10'b0110000000;
  5685. defparam \GPIO3_4~input .CFG_LVDS_IN_EN = 1'b0;
  5686. defparam \GPIO3_4~input .DPCLK_DELAY = 4'b0000;
  5687. defparam \GPIO3_4~input .OUT_DELAY = 1'b0;
  5688. defparam \GPIO3_4~input .IN_DATA_DELAY = 3'b000;
  5689. defparam \GPIO3_4~input .IN_REG_DELAY = 3'b000;
  5690. alta_rio \GPIO6_0~output (
  5691. .padio(GPIO6_0),
  5692. .datain(\rv32.gpio6_io_out_data[0] ),
  5693. .oe(\rv32.gpio6_io_out_en[0] ),
  5694. .outclk(gnd),
  5695. .outclkena(vcc),
  5696. .inclk(gnd),
  5697. .inclkena(vcc),
  5698. .areset(gnd),
  5699. .sreset(gnd),
  5700. .combout(),
  5701. .regout());
  5702. defparam \GPIO6_0~output .coord_x = 0;
  5703. defparam \GPIO6_0~output .coord_y = 4;
  5704. defparam \GPIO6_0~output .coord_z = 0;
  5705. defparam \GPIO6_0~output .IN_ASYNC_MODE = 1'b0;
  5706. defparam \GPIO6_0~output .IN_SYNC_MODE = 1'b0;
  5707. defparam \GPIO6_0~output .IN_POWERUP = 1'b0;
  5708. defparam \GPIO6_0~output .OUT_REG_MODE = 1'b0;
  5709. defparam \GPIO6_0~output .OUT_ASYNC_MODE = 1'b0;
  5710. defparam \GPIO6_0~output .OUT_SYNC_MODE = 1'b0;
  5711. defparam \GPIO6_0~output .OUT_POWERUP = 1'b0;
  5712. defparam \GPIO6_0~output .OE_REG_MODE = 1'b0;
  5713. defparam \GPIO6_0~output .OE_ASYNC_MODE = 1'b0;
  5714. defparam \GPIO6_0~output .OE_SYNC_MODE = 1'b0;
  5715. defparam \GPIO6_0~output .OE_POWERUP = 1'b0;
  5716. defparam \GPIO6_0~output .CFG_TRI_INPUT = 1'b0;
  5717. defparam \GPIO6_0~output .CFG_INPUT_EN = 1'b0;
  5718. defparam \GPIO6_0~output .CFG_PULL_UP = 1'b0;
  5719. defparam \GPIO6_0~output .CFG_SLR = 1'b0;
  5720. defparam \GPIO6_0~output .CFG_OPEN_DRAIN = 1'b0;
  5721. defparam \GPIO6_0~output .CFG_PDRCTRL = 4'b0100;
  5722. defparam \GPIO6_0~output .CFG_KEEP = 2'b00;
  5723. defparam \GPIO6_0~output .CFG_LVDS_OUT_EN = 1'b0;
  5724. defparam \GPIO6_0~output .CFG_LVDS_SEL_CUA = 2'b00;
  5725. defparam \GPIO6_0~output .CFG_LVDS_IREF = 10'b0110000000;
  5726. defparam \GPIO6_0~output .CFG_LVDS_IN_EN = 1'b0;
  5727. defparam \GPIO6_0~output .DPCLK_DELAY = 4'b0000;
  5728. defparam \GPIO6_0~output .OUT_DELAY = 1'b0;
  5729. defparam \GPIO6_0~output .IN_DATA_DELAY = 3'b000;
  5730. defparam \GPIO6_0~output .IN_REG_DELAY = 3'b000;
  5731. alta_rio \GPIO6_2~output (
  5732. .padio(GPIO6_2),
  5733. .datain(\rv32.gpio6_io_out_data[2] ),
  5734. .oe(\rv32.gpio6_io_out_en[2] ),
  5735. .outclk(gnd),
  5736. .outclkena(vcc),
  5737. .inclk(gnd),
  5738. .inclkena(vcc),
  5739. .areset(gnd),
  5740. .sreset(gnd),
  5741. .combout(),
  5742. .regout());
  5743. defparam \GPIO6_2~output .coord_x = 0;
  5744. defparam \GPIO6_2~output .coord_y = 4;
  5745. defparam \GPIO6_2~output .coord_z = 1;
  5746. defparam \GPIO6_2~output .IN_ASYNC_MODE = 1'b0;
  5747. defparam \GPIO6_2~output .IN_SYNC_MODE = 1'b0;
  5748. defparam \GPIO6_2~output .IN_POWERUP = 1'b0;
  5749. defparam \GPIO6_2~output .OUT_REG_MODE = 1'b0;
  5750. defparam \GPIO6_2~output .OUT_ASYNC_MODE = 1'b0;
  5751. defparam \GPIO6_2~output .OUT_SYNC_MODE = 1'b0;
  5752. defparam \GPIO6_2~output .OUT_POWERUP = 1'b0;
  5753. defparam \GPIO6_2~output .OE_REG_MODE = 1'b0;
  5754. defparam \GPIO6_2~output .OE_ASYNC_MODE = 1'b0;
  5755. defparam \GPIO6_2~output .OE_SYNC_MODE = 1'b0;
  5756. defparam \GPIO6_2~output .OE_POWERUP = 1'b0;
  5757. defparam \GPIO6_2~output .CFG_TRI_INPUT = 1'b0;
  5758. defparam \GPIO6_2~output .CFG_INPUT_EN = 1'b0;
  5759. defparam \GPIO6_2~output .CFG_PULL_UP = 1'b0;
  5760. defparam \GPIO6_2~output .CFG_SLR = 1'b0;
  5761. defparam \GPIO6_2~output .CFG_OPEN_DRAIN = 1'b0;
  5762. defparam \GPIO6_2~output .CFG_PDRCTRL = 4'b0100;
  5763. defparam \GPIO6_2~output .CFG_KEEP = 2'b00;
  5764. defparam \GPIO6_2~output .CFG_LVDS_OUT_EN = 1'b0;
  5765. defparam \GPIO6_2~output .CFG_LVDS_SEL_CUA = 2'b00;
  5766. defparam \GPIO6_2~output .CFG_LVDS_IREF = 10'b0110000000;
  5767. defparam \GPIO6_2~output .CFG_LVDS_IN_EN = 1'b0;
  5768. defparam \GPIO6_2~output .DPCLK_DELAY = 4'b0000;
  5769. defparam \GPIO6_2~output .OUT_DELAY = 1'b0;
  5770. defparam \GPIO6_2~output .IN_DATA_DELAY = 3'b000;
  5771. defparam \GPIO6_2~output .IN_REG_DELAY = 3'b000;
  5772. alta_rio \GPIO6_4~output (
  5773. .padio(GPIO6_4),
  5774. .datain(\rv32.gpio6_io_out_data[4] ),
  5775. .oe(\rv32.gpio6_io_out_en[4] ),
  5776. .outclk(gnd),
  5777. .outclkena(vcc),
  5778. .inclk(gnd),
  5779. .inclkena(vcc),
  5780. .areset(gnd),
  5781. .sreset(gnd),
  5782. .combout(),
  5783. .regout());
  5784. defparam \GPIO6_4~output .coord_x = 22;
  5785. defparam \GPIO6_4~output .coord_y = 1;
  5786. defparam \GPIO6_4~output .coord_z = 4;
  5787. defparam \GPIO6_4~output .IN_ASYNC_MODE = 1'b0;
  5788. defparam \GPIO6_4~output .IN_SYNC_MODE = 1'b0;
  5789. defparam \GPIO6_4~output .IN_POWERUP = 1'b0;
  5790. defparam \GPIO6_4~output .OUT_REG_MODE = 1'b0;
  5791. defparam \GPIO6_4~output .OUT_ASYNC_MODE = 1'b0;
  5792. defparam \GPIO6_4~output .OUT_SYNC_MODE = 1'b0;
  5793. defparam \GPIO6_4~output .OUT_POWERUP = 1'b0;
  5794. defparam \GPIO6_4~output .OE_REG_MODE = 1'b0;
  5795. defparam \GPIO6_4~output .OE_ASYNC_MODE = 1'b0;
  5796. defparam \GPIO6_4~output .OE_SYNC_MODE = 1'b0;
  5797. defparam \GPIO6_4~output .OE_POWERUP = 1'b0;
  5798. defparam \GPIO6_4~output .CFG_TRI_INPUT = 1'b0;
  5799. defparam \GPIO6_4~output .CFG_INPUT_EN = 1'b0;
  5800. defparam \GPIO6_4~output .CFG_PULL_UP = 1'b0;
  5801. defparam \GPIO6_4~output .CFG_SLR = 1'b0;
  5802. defparam \GPIO6_4~output .CFG_OPEN_DRAIN = 1'b0;
  5803. defparam \GPIO6_4~output .CFG_PDRCTRL = 4'b0100;
  5804. defparam \GPIO6_4~output .CFG_KEEP = 2'b00;
  5805. defparam \GPIO6_4~output .CFG_LVDS_OUT_EN = 1'b0;
  5806. defparam \GPIO6_4~output .CFG_LVDS_SEL_CUA = 2'b00;
  5807. defparam \GPIO6_4~output .CFG_LVDS_IREF = 10'b0110000000;
  5808. defparam \GPIO6_4~output .CFG_LVDS_IN_EN = 1'b0;
  5809. defparam \GPIO6_4~output .DPCLK_DELAY = 4'b0000;
  5810. defparam \GPIO6_4~output .OUT_DELAY = 1'b0;
  5811. defparam \GPIO6_4~output .IN_DATA_DELAY = 3'b000;
  5812. defparam \GPIO6_4~output .IN_REG_DELAY = 3'b000;
  5813. alta_rio \GPIO6_6~output (
  5814. .padio(GPIO6_6),
  5815. .datain(\rv32.gpio6_io_out_data[6] ),
  5816. .oe(\rv32.gpio6_io_out_en[6] ),
  5817. .outclk(gnd),
  5818. .outclkena(vcc),
  5819. .inclk(gnd),
  5820. .inclkena(vcc),
  5821. .areset(gnd),
  5822. .sreset(gnd),
  5823. .combout(\GPIO6_6~input_o ),
  5824. .regout());
  5825. defparam \GPIO6_6~output .coord_x = 20;
  5826. defparam \GPIO6_6~output .coord_y = 0;
  5827. defparam \GPIO6_6~output .coord_z = 2;
  5828. defparam \GPIO6_6~output .IN_ASYNC_MODE = 1'b0;
  5829. defparam \GPIO6_6~output .IN_SYNC_MODE = 1'b0;
  5830. defparam \GPIO6_6~output .IN_POWERUP = 1'b0;
  5831. defparam \GPIO6_6~output .OUT_REG_MODE = 1'b0;
  5832. defparam \GPIO6_6~output .OUT_ASYNC_MODE = 1'b0;
  5833. defparam \GPIO6_6~output .OUT_SYNC_MODE = 1'b0;
  5834. defparam \GPIO6_6~output .OUT_POWERUP = 1'b0;
  5835. defparam \GPIO6_6~output .OE_REG_MODE = 1'b0;
  5836. defparam \GPIO6_6~output .OE_ASYNC_MODE = 1'b0;
  5837. defparam \GPIO6_6~output .OE_SYNC_MODE = 1'b0;
  5838. defparam \GPIO6_6~output .OE_POWERUP = 1'b0;
  5839. defparam \GPIO6_6~output .CFG_TRI_INPUT = 1'b0;
  5840. defparam \GPIO6_6~output .CFG_INPUT_EN = 1'b1;
  5841. defparam \GPIO6_6~output .CFG_PULL_UP = 1'b0;
  5842. defparam \GPIO6_6~output .CFG_SLR = 1'b0;
  5843. defparam \GPIO6_6~output .CFG_OPEN_DRAIN = 1'b0;
  5844. defparam \GPIO6_6~output .CFG_PDRCTRL = 4'b0100;
  5845. defparam \GPIO6_6~output .CFG_KEEP = 2'b00;
  5846. defparam \GPIO6_6~output .CFG_LVDS_OUT_EN = 1'b0;
  5847. defparam \GPIO6_6~output .CFG_LVDS_SEL_CUA = 2'b00;
  5848. defparam \GPIO6_6~output .CFG_LVDS_IREF = 10'b0110000000;
  5849. defparam \GPIO6_6~output .CFG_LVDS_IN_EN = 1'b0;
  5850. defparam \GPIO6_6~output .DPCLK_DELAY = 4'b0000;
  5851. defparam \GPIO6_6~output .OUT_DELAY = 1'b0;
  5852. defparam \GPIO6_6~output .IN_DATA_DELAY = 3'b000;
  5853. defparam \GPIO6_6~output .IN_REG_DELAY = 3'b000;
  5854. alta_rio \GPIO9_0~output (
  5855. .padio(GPIO9_0),
  5856. .datain(\rv32.gpio9_io_out_data[0] ),
  5857. .oe(\rv32.gpio9_io_out_en[0] ),
  5858. .outclk(gnd),
  5859. .outclkena(vcc),
  5860. .inclk(gnd),
  5861. .inclkena(vcc),
  5862. .areset(gnd),
  5863. .sreset(gnd),
  5864. .combout(),
  5865. .regout());
  5866. defparam \GPIO9_0~output .coord_x = 14;
  5867. defparam \GPIO9_0~output .coord_y = 13;
  5868. defparam \GPIO9_0~output .coord_z = 2;
  5869. defparam \GPIO9_0~output .IN_ASYNC_MODE = 1'b0;
  5870. defparam \GPIO9_0~output .IN_SYNC_MODE = 1'b0;
  5871. defparam \GPIO9_0~output .IN_POWERUP = 1'b0;
  5872. defparam \GPIO9_0~output .OUT_REG_MODE = 1'b0;
  5873. defparam \GPIO9_0~output .OUT_ASYNC_MODE = 1'b0;
  5874. defparam \GPIO9_0~output .OUT_SYNC_MODE = 1'b0;
  5875. defparam \GPIO9_0~output .OUT_POWERUP = 1'b0;
  5876. defparam \GPIO9_0~output .OE_REG_MODE = 1'b0;
  5877. defparam \GPIO9_0~output .OE_ASYNC_MODE = 1'b0;
  5878. defparam \GPIO9_0~output .OE_SYNC_MODE = 1'b0;
  5879. defparam \GPIO9_0~output .OE_POWERUP = 1'b0;
  5880. defparam \GPIO9_0~output .CFG_TRI_INPUT = 1'b0;
  5881. defparam \GPIO9_0~output .CFG_INPUT_EN = 1'b0;
  5882. defparam \GPIO9_0~output .CFG_PULL_UP = 1'b0;
  5883. defparam \GPIO9_0~output .CFG_SLR = 1'b0;
  5884. defparam \GPIO9_0~output .CFG_OPEN_DRAIN = 1'b0;
  5885. defparam \GPIO9_0~output .CFG_PDRCTRL = 4'b0100;
  5886. defparam \GPIO9_0~output .CFG_KEEP = 2'b00;
  5887. defparam \GPIO9_0~output .CFG_LVDS_OUT_EN = 1'b0;
  5888. defparam \GPIO9_0~output .CFG_LVDS_SEL_CUA = 2'b00;
  5889. defparam \GPIO9_0~output .CFG_LVDS_IREF = 10'b0110000000;
  5890. defparam \GPIO9_0~output .CFG_LVDS_IN_EN = 1'b0;
  5891. defparam \GPIO9_0~output .DPCLK_DELAY = 4'b0000;
  5892. defparam \GPIO9_0~output .OUT_DELAY = 1'b0;
  5893. defparam \GPIO9_0~output .IN_DATA_DELAY = 3'b000;
  5894. defparam \GPIO9_0~output .IN_REG_DELAY = 3'b000;
  5895. alta_rio \GPIO9_1~output (
  5896. .padio(GPIO9_1),
  5897. .datain(\rv32.gpio9_io_out_data[1] ),
  5898. .oe(\rv32.gpio9_io_out_en[1] ),
  5899. .outclk(gnd),
  5900. .outclkena(vcc),
  5901. .inclk(gnd),
  5902. .inclkena(vcc),
  5903. .areset(gnd),
  5904. .sreset(gnd),
  5905. .combout(\GPIO9_1~input_o ),
  5906. .regout());
  5907. defparam \GPIO9_1~output .coord_x = 14;
  5908. defparam \GPIO9_1~output .coord_y = 13;
  5909. defparam \GPIO9_1~output .coord_z = 0;
  5910. defparam \GPIO9_1~output .IN_ASYNC_MODE = 1'b0;
  5911. defparam \GPIO9_1~output .IN_SYNC_MODE = 1'b0;
  5912. defparam \GPIO9_1~output .IN_POWERUP = 1'b0;
  5913. defparam \GPIO9_1~output .OUT_REG_MODE = 1'b0;
  5914. defparam \GPIO9_1~output .OUT_ASYNC_MODE = 1'b0;
  5915. defparam \GPIO9_1~output .OUT_SYNC_MODE = 1'b0;
  5916. defparam \GPIO9_1~output .OUT_POWERUP = 1'b0;
  5917. defparam \GPIO9_1~output .OE_REG_MODE = 1'b0;
  5918. defparam \GPIO9_1~output .OE_ASYNC_MODE = 1'b0;
  5919. defparam \GPIO9_1~output .OE_SYNC_MODE = 1'b0;
  5920. defparam \GPIO9_1~output .OE_POWERUP = 1'b0;
  5921. defparam \GPIO9_1~output .CFG_TRI_INPUT = 1'b0;
  5922. defparam \GPIO9_1~output .CFG_INPUT_EN = 1'b1;
  5923. defparam \GPIO9_1~output .CFG_PULL_UP = 1'b0;
  5924. defparam \GPIO9_1~output .CFG_SLR = 1'b0;
  5925. defparam \GPIO9_1~output .CFG_OPEN_DRAIN = 1'b0;
  5926. defparam \GPIO9_1~output .CFG_PDRCTRL = 4'b0100;
  5927. defparam \GPIO9_1~output .CFG_KEEP = 2'b00;
  5928. defparam \GPIO9_1~output .CFG_LVDS_OUT_EN = 1'b0;
  5929. defparam \GPIO9_1~output .CFG_LVDS_SEL_CUA = 2'b00;
  5930. defparam \GPIO9_1~output .CFG_LVDS_IREF = 10'b0110000000;
  5931. defparam \GPIO9_1~output .CFG_LVDS_IN_EN = 1'b0;
  5932. defparam \GPIO9_1~output .DPCLK_DELAY = 4'b0000;
  5933. defparam \GPIO9_1~output .OUT_DELAY = 1'b0;
  5934. defparam \GPIO9_1~output .IN_DATA_DELAY = 3'b000;
  5935. defparam \GPIO9_1~output .IN_REG_DELAY = 3'b000;
  5936. alta_rio \GPIO9_2~output (
  5937. .padio(GPIO9_2),
  5938. .datain(\rv32.gpio9_io_out_data[2] ),
  5939. .oe(\rv32.gpio9_io_out_en[2] ),
  5940. .outclk(gnd),
  5941. .outclkena(vcc),
  5942. .inclk(gnd),
  5943. .inclkena(vcc),
  5944. .areset(gnd),
  5945. .sreset(gnd),
  5946. .combout(),
  5947. .regout());
  5948. defparam \GPIO9_2~output .coord_x = 15;
  5949. defparam \GPIO9_2~output .coord_y = 13;
  5950. defparam \GPIO9_2~output .coord_z = 0;
  5951. defparam \GPIO9_2~output .IN_ASYNC_MODE = 1'b0;
  5952. defparam \GPIO9_2~output .IN_SYNC_MODE = 1'b0;
  5953. defparam \GPIO9_2~output .IN_POWERUP = 1'b0;
  5954. defparam \GPIO9_2~output .OUT_REG_MODE = 1'b0;
  5955. defparam \GPIO9_2~output .OUT_ASYNC_MODE = 1'b0;
  5956. defparam \GPIO9_2~output .OUT_SYNC_MODE = 1'b0;
  5957. defparam \GPIO9_2~output .OUT_POWERUP = 1'b0;
  5958. defparam \GPIO9_2~output .OE_REG_MODE = 1'b0;
  5959. defparam \GPIO9_2~output .OE_ASYNC_MODE = 1'b0;
  5960. defparam \GPIO9_2~output .OE_SYNC_MODE = 1'b0;
  5961. defparam \GPIO9_2~output .OE_POWERUP = 1'b0;
  5962. defparam \GPIO9_2~output .CFG_TRI_INPUT = 1'b0;
  5963. defparam \GPIO9_2~output .CFG_INPUT_EN = 1'b0;
  5964. defparam \GPIO9_2~output .CFG_PULL_UP = 1'b0;
  5965. defparam \GPIO9_2~output .CFG_SLR = 1'b0;
  5966. defparam \GPIO9_2~output .CFG_OPEN_DRAIN = 1'b0;
  5967. defparam \GPIO9_2~output .CFG_PDRCTRL = 4'b0100;
  5968. defparam \GPIO9_2~output .CFG_KEEP = 2'b00;
  5969. defparam \GPIO9_2~output .CFG_LVDS_OUT_EN = 1'b0;
  5970. defparam \GPIO9_2~output .CFG_LVDS_SEL_CUA = 2'b00;
  5971. defparam \GPIO9_2~output .CFG_LVDS_IREF = 10'b0110000000;
  5972. defparam \GPIO9_2~output .CFG_LVDS_IN_EN = 1'b0;
  5973. defparam \GPIO9_2~output .DPCLK_DELAY = 4'b0000;
  5974. defparam \GPIO9_2~output .OUT_DELAY = 1'b0;
  5975. defparam \GPIO9_2~output .IN_DATA_DELAY = 3'b000;
  5976. defparam \GPIO9_2~output .IN_REG_DELAY = 3'b000;
  5977. alta_rio \GPIO9_3~output (
  5978. .padio(GPIO9_3),
  5979. .datain(\rv32.gpio9_io_out_data[3] ),
  5980. .oe(\rv32.gpio9_io_out_en[3] ),
  5981. .outclk(gnd),
  5982. .outclkena(vcc),
  5983. .inclk(gnd),
  5984. .inclkena(vcc),
  5985. .areset(gnd),
  5986. .sreset(gnd),
  5987. .combout(),
  5988. .regout());
  5989. defparam \GPIO9_3~output .coord_x = 19;
  5990. defparam \GPIO9_3~output .coord_y = 0;
  5991. defparam \GPIO9_3~output .coord_z = 3;
  5992. defparam \GPIO9_3~output .IN_ASYNC_MODE = 1'b0;
  5993. defparam \GPIO9_3~output .IN_SYNC_MODE = 1'b0;
  5994. defparam \GPIO9_3~output .IN_POWERUP = 1'b0;
  5995. defparam \GPIO9_3~output .OUT_REG_MODE = 1'b0;
  5996. defparam \GPIO9_3~output .OUT_ASYNC_MODE = 1'b0;
  5997. defparam \GPIO9_3~output .OUT_SYNC_MODE = 1'b0;
  5998. defparam \GPIO9_3~output .OUT_POWERUP = 1'b0;
  5999. defparam \GPIO9_3~output .OE_REG_MODE = 1'b0;
  6000. defparam \GPIO9_3~output .OE_ASYNC_MODE = 1'b0;
  6001. defparam \GPIO9_3~output .OE_SYNC_MODE = 1'b0;
  6002. defparam \GPIO9_3~output .OE_POWERUP = 1'b0;
  6003. defparam \GPIO9_3~output .CFG_TRI_INPUT = 1'b0;
  6004. defparam \GPIO9_3~output .CFG_INPUT_EN = 1'b0;
  6005. defparam \GPIO9_3~output .CFG_PULL_UP = 1'b0;
  6006. defparam \GPIO9_3~output .CFG_SLR = 1'b0;
  6007. defparam \GPIO9_3~output .CFG_OPEN_DRAIN = 1'b0;
  6008. defparam \GPIO9_3~output .CFG_PDRCTRL = 4'b0100;
  6009. defparam \GPIO9_3~output .CFG_KEEP = 2'b00;
  6010. defparam \GPIO9_3~output .CFG_LVDS_OUT_EN = 1'b0;
  6011. defparam \GPIO9_3~output .CFG_LVDS_SEL_CUA = 2'b00;
  6012. defparam \GPIO9_3~output .CFG_LVDS_IREF = 10'b0110000000;
  6013. defparam \GPIO9_3~output .CFG_LVDS_IN_EN = 1'b0;
  6014. defparam \GPIO9_3~output .DPCLK_DELAY = 4'b0000;
  6015. defparam \GPIO9_3~output .OUT_DELAY = 1'b0;
  6016. defparam \GPIO9_3~output .IN_DATA_DELAY = 3'b000;
  6017. defparam \GPIO9_3~output .IN_REG_DELAY = 3'b000;
  6018. alta_rio \GPIO9_4~output (
  6019. .padio(GPIO9_4),
  6020. .datain(\rv32.gpio9_io_out_data[4] ),
  6021. .oe(\rv32.gpio9_io_out_en[4] ),
  6022. .outclk(gnd),
  6023. .outclkena(vcc),
  6024. .inclk(gnd),
  6025. .inclkena(vcc),
  6026. .areset(gnd),
  6027. .sreset(gnd),
  6028. .combout(),
  6029. .regout());
  6030. defparam \GPIO9_4~output .coord_x = 17;
  6031. defparam \GPIO9_4~output .coord_y = 13;
  6032. defparam \GPIO9_4~output .coord_z = 0;
  6033. defparam \GPIO9_4~output .IN_ASYNC_MODE = 1'b0;
  6034. defparam \GPIO9_4~output .IN_SYNC_MODE = 1'b0;
  6035. defparam \GPIO9_4~output .IN_POWERUP = 1'b0;
  6036. defparam \GPIO9_4~output .OUT_REG_MODE = 1'b0;
  6037. defparam \GPIO9_4~output .OUT_ASYNC_MODE = 1'b0;
  6038. defparam \GPIO9_4~output .OUT_SYNC_MODE = 1'b0;
  6039. defparam \GPIO9_4~output .OUT_POWERUP = 1'b0;
  6040. defparam \GPIO9_4~output .OE_REG_MODE = 1'b0;
  6041. defparam \GPIO9_4~output .OE_ASYNC_MODE = 1'b0;
  6042. defparam \GPIO9_4~output .OE_SYNC_MODE = 1'b0;
  6043. defparam \GPIO9_4~output .OE_POWERUP = 1'b0;
  6044. defparam \GPIO9_4~output .CFG_TRI_INPUT = 1'b0;
  6045. defparam \GPIO9_4~output .CFG_INPUT_EN = 1'b0;
  6046. defparam \GPIO9_4~output .CFG_PULL_UP = 1'b0;
  6047. defparam \GPIO9_4~output .CFG_SLR = 1'b0;
  6048. defparam \GPIO9_4~output .CFG_OPEN_DRAIN = 1'b0;
  6049. defparam \GPIO9_4~output .CFG_PDRCTRL = 4'b0100;
  6050. defparam \GPIO9_4~output .CFG_KEEP = 2'b00;
  6051. defparam \GPIO9_4~output .CFG_LVDS_OUT_EN = 1'b0;
  6052. defparam \GPIO9_4~output .CFG_LVDS_SEL_CUA = 2'b00;
  6053. defparam \GPIO9_4~output .CFG_LVDS_IREF = 10'b0110000000;
  6054. defparam \GPIO9_4~output .CFG_LVDS_IN_EN = 1'b0;
  6055. defparam \GPIO9_4~output .DPCLK_DELAY = 4'b0000;
  6056. defparam \GPIO9_4~output .OUT_DELAY = 1'b0;
  6057. defparam \GPIO9_4~output .IN_DATA_DELAY = 3'b000;
  6058. defparam \GPIO9_4~output .IN_REG_DELAY = 3'b000;
  6059. alta_rio \GPIO9_5~output (
  6060. .padio(GPIO9_5),
  6061. .datain(\rv32.gpio9_io_out_data[5] ),
  6062. .oe(\rv32.gpio9_io_out_en[5] ),
  6063. .outclk(gnd),
  6064. .outclkena(vcc),
  6065. .inclk(gnd),
  6066. .inclkena(vcc),
  6067. .areset(gnd),
  6068. .sreset(gnd),
  6069. .combout(),
  6070. .regout());
  6071. defparam \GPIO9_5~output .coord_x = 18;
  6072. defparam \GPIO9_5~output .coord_y = 13;
  6073. defparam \GPIO9_5~output .coord_z = 1;
  6074. defparam \GPIO9_5~output .IN_ASYNC_MODE = 1'b0;
  6075. defparam \GPIO9_5~output .IN_SYNC_MODE = 1'b0;
  6076. defparam \GPIO9_5~output .IN_POWERUP = 1'b0;
  6077. defparam \GPIO9_5~output .OUT_REG_MODE = 1'b0;
  6078. defparam \GPIO9_5~output .OUT_ASYNC_MODE = 1'b0;
  6079. defparam \GPIO9_5~output .OUT_SYNC_MODE = 1'b0;
  6080. defparam \GPIO9_5~output .OUT_POWERUP = 1'b0;
  6081. defparam \GPIO9_5~output .OE_REG_MODE = 1'b0;
  6082. defparam \GPIO9_5~output .OE_ASYNC_MODE = 1'b0;
  6083. defparam \GPIO9_5~output .OE_SYNC_MODE = 1'b0;
  6084. defparam \GPIO9_5~output .OE_POWERUP = 1'b0;
  6085. defparam \GPIO9_5~output .CFG_TRI_INPUT = 1'b0;
  6086. defparam \GPIO9_5~output .CFG_INPUT_EN = 1'b0;
  6087. defparam \GPIO9_5~output .CFG_PULL_UP = 1'b0;
  6088. defparam \GPIO9_5~output .CFG_SLR = 1'b0;
  6089. defparam \GPIO9_5~output .CFG_OPEN_DRAIN = 1'b0;
  6090. defparam \GPIO9_5~output .CFG_PDRCTRL = 4'b0100;
  6091. defparam \GPIO9_5~output .CFG_KEEP = 2'b00;
  6092. defparam \GPIO9_5~output .CFG_LVDS_OUT_EN = 1'b0;
  6093. defparam \GPIO9_5~output .CFG_LVDS_SEL_CUA = 2'b00;
  6094. defparam \GPIO9_5~output .CFG_LVDS_IREF = 10'b0110000000;
  6095. defparam \GPIO9_5~output .CFG_LVDS_IN_EN = 1'b0;
  6096. defparam \GPIO9_5~output .DPCLK_DELAY = 4'b0000;
  6097. defparam \GPIO9_5~output .OUT_DELAY = 1'b0;
  6098. defparam \GPIO9_5~output .IN_DATA_DELAY = 3'b000;
  6099. defparam \GPIO9_5~output .IN_REG_DELAY = 3'b000;
  6100. alta_rio \GPIO9_6~output (
  6101. .padio(GPIO9_6),
  6102. .datain(\rv32.gpio9_io_out_data[6] ),
  6103. .oe(\rv32.gpio9_io_out_en[6] ),
  6104. .outclk(gnd),
  6105. .outclkena(vcc),
  6106. .inclk(gnd),
  6107. .inclkena(vcc),
  6108. .areset(gnd),
  6109. .sreset(gnd),
  6110. .combout(),
  6111. .regout());
  6112. defparam \GPIO9_6~output .coord_x = 0;
  6113. defparam \GPIO9_6~output .coord_y = 1;
  6114. defparam \GPIO9_6~output .coord_z = 3;
  6115. defparam \GPIO9_6~output .IN_ASYNC_MODE = 1'b0;
  6116. defparam \GPIO9_6~output .IN_SYNC_MODE = 1'b0;
  6117. defparam \GPIO9_6~output .IN_POWERUP = 1'b0;
  6118. defparam \GPIO9_6~output .OUT_REG_MODE = 1'b0;
  6119. defparam \GPIO9_6~output .OUT_ASYNC_MODE = 1'b0;
  6120. defparam \GPIO9_6~output .OUT_SYNC_MODE = 1'b0;
  6121. defparam \GPIO9_6~output .OUT_POWERUP = 1'b0;
  6122. defparam \GPIO9_6~output .OE_REG_MODE = 1'b0;
  6123. defparam \GPIO9_6~output .OE_ASYNC_MODE = 1'b0;
  6124. defparam \GPIO9_6~output .OE_SYNC_MODE = 1'b0;
  6125. defparam \GPIO9_6~output .OE_POWERUP = 1'b0;
  6126. defparam \GPIO9_6~output .CFG_TRI_INPUT = 1'b0;
  6127. defparam \GPIO9_6~output .CFG_INPUT_EN = 1'b0;
  6128. defparam \GPIO9_6~output .CFG_PULL_UP = 1'b0;
  6129. defparam \GPIO9_6~output .CFG_SLR = 1'b0;
  6130. defparam \GPIO9_6~output .CFG_OPEN_DRAIN = 1'b0;
  6131. defparam \GPIO9_6~output .CFG_PDRCTRL = 4'b0100;
  6132. defparam \GPIO9_6~output .CFG_KEEP = 2'b00;
  6133. defparam \GPIO9_6~output .CFG_LVDS_OUT_EN = 1'b0;
  6134. defparam \GPIO9_6~output .CFG_LVDS_SEL_CUA = 2'b00;
  6135. defparam \GPIO9_6~output .CFG_LVDS_IREF = 10'b0110000000;
  6136. defparam \GPIO9_6~output .CFG_LVDS_IN_EN = 1'b0;
  6137. defparam \GPIO9_6~output .DPCLK_DELAY = 4'b0000;
  6138. defparam \GPIO9_6~output .OUT_DELAY = 1'b0;
  6139. defparam \GPIO9_6~output .IN_DATA_DELAY = 3'b000;
  6140. defparam \GPIO9_6~output .IN_REG_DELAY = 3'b000;
  6141. alta_rio \GPIO9_7~output (
  6142. .padio(GPIO9_7),
  6143. .datain(\rv32.gpio9_io_out_data[7] ),
  6144. .oe(\rv32.gpio9_io_out_en[7] ),
  6145. .outclk(gnd),
  6146. .outclkena(vcc),
  6147. .inclk(gnd),
  6148. .inclkena(vcc),
  6149. .areset(gnd),
  6150. .sreset(gnd),
  6151. .combout(),
  6152. .regout());
  6153. defparam \GPIO9_7~output .coord_x = 0;
  6154. defparam \GPIO9_7~output .coord_y = 1;
  6155. defparam \GPIO9_7~output .coord_z = 2;
  6156. defparam \GPIO9_7~output .IN_ASYNC_MODE = 1'b0;
  6157. defparam \GPIO9_7~output .IN_SYNC_MODE = 1'b0;
  6158. defparam \GPIO9_7~output .IN_POWERUP = 1'b0;
  6159. defparam \GPIO9_7~output .OUT_REG_MODE = 1'b0;
  6160. defparam \GPIO9_7~output .OUT_ASYNC_MODE = 1'b0;
  6161. defparam \GPIO9_7~output .OUT_SYNC_MODE = 1'b0;
  6162. defparam \GPIO9_7~output .OUT_POWERUP = 1'b0;
  6163. defparam \GPIO9_7~output .OE_REG_MODE = 1'b0;
  6164. defparam \GPIO9_7~output .OE_ASYNC_MODE = 1'b0;
  6165. defparam \GPIO9_7~output .OE_SYNC_MODE = 1'b0;
  6166. defparam \GPIO9_7~output .OE_POWERUP = 1'b0;
  6167. defparam \GPIO9_7~output .CFG_TRI_INPUT = 1'b0;
  6168. defparam \GPIO9_7~output .CFG_INPUT_EN = 1'b0;
  6169. defparam \GPIO9_7~output .CFG_PULL_UP = 1'b0;
  6170. defparam \GPIO9_7~output .CFG_SLR = 1'b0;
  6171. defparam \GPIO9_7~output .CFG_OPEN_DRAIN = 1'b0;
  6172. defparam \GPIO9_7~output .CFG_PDRCTRL = 4'b0100;
  6173. defparam \GPIO9_7~output .CFG_KEEP = 2'b00;
  6174. defparam \GPIO9_7~output .CFG_LVDS_OUT_EN = 1'b0;
  6175. defparam \GPIO9_7~output .CFG_LVDS_SEL_CUA = 2'b00;
  6176. defparam \GPIO9_7~output .CFG_LVDS_IREF = 10'b0110000000;
  6177. defparam \GPIO9_7~output .CFG_LVDS_IN_EN = 1'b0;
  6178. defparam \GPIO9_7~output .DPCLK_DELAY = 4'b0000;
  6179. defparam \GPIO9_7~output .OUT_DELAY = 1'b0;
  6180. defparam \GPIO9_7~output .IN_DATA_DELAY = 3'b000;
  6181. defparam \GPIO9_7~output .IN_REG_DELAY = 3'b000;
  6182. alta_rio \PIN_HSE~input (
  6183. .padio(PIN_HSE),
  6184. .datain(gnd),
  6185. .oe(gnd),
  6186. .outclk(gnd),
  6187. .outclkena(vcc),
  6188. .inclk(gnd),
  6189. .inclkena(vcc),
  6190. .areset(gnd),
  6191. .sreset(gnd),
  6192. .combout(\PIN_HSE~input_o ),
  6193. .regout());
  6194. defparam \PIN_HSE~input .coord_x = 22;
  6195. defparam \PIN_HSE~input .coord_y = 4;
  6196. defparam \PIN_HSE~input .coord_z = 1;
  6197. defparam \PIN_HSE~input .IN_ASYNC_MODE = 1'b0;
  6198. defparam \PIN_HSE~input .IN_SYNC_MODE = 1'b0;
  6199. defparam \PIN_HSE~input .IN_POWERUP = 1'b0;
  6200. defparam \PIN_HSE~input .OUT_REG_MODE = 1'b0;
  6201. defparam \PIN_HSE~input .OUT_ASYNC_MODE = 1'b0;
  6202. defparam \PIN_HSE~input .OUT_SYNC_MODE = 1'b0;
  6203. defparam \PIN_HSE~input .OUT_POWERUP = 1'b0;
  6204. defparam \PIN_HSE~input .OE_REG_MODE = 1'b0;
  6205. defparam \PIN_HSE~input .OE_ASYNC_MODE = 1'b0;
  6206. defparam \PIN_HSE~input .OE_SYNC_MODE = 1'b0;
  6207. defparam \PIN_HSE~input .OE_POWERUP = 1'b0;
  6208. defparam \PIN_HSE~input .CFG_TRI_INPUT = 1'b0;
  6209. defparam \PIN_HSE~input .CFG_PULL_UP = 1'b0;
  6210. defparam \PIN_HSE~input .CFG_SLR = 1'b0;
  6211. defparam \PIN_HSE~input .CFG_OPEN_DRAIN = 1'b0;
  6212. defparam \PIN_HSE~input .CFG_PDRCTRL = 4'b0010;
  6213. defparam \PIN_HSE~input .CFG_KEEP = 2'b00;
  6214. defparam \PIN_HSE~input .CFG_LVDS_OUT_EN = 1'b0;
  6215. defparam \PIN_HSE~input .CFG_LVDS_SEL_CUA = 2'b00;
  6216. defparam \PIN_HSE~input .CFG_LVDS_IREF = 10'b0110000000;
  6217. defparam \PIN_HSE~input .CFG_LVDS_IN_EN = 1'b0;
  6218. defparam \PIN_HSE~input .DPCLK_DELAY = 4'b0000;
  6219. defparam \PIN_HSE~input .OUT_DELAY = 1'b0;
  6220. defparam \PIN_HSE~input .IN_DATA_DELAY = 3'b000;
  6221. defparam \PIN_HSE~input .IN_REG_DELAY = 3'b000;
  6222. alta_rio \PIN_HSI~input (
  6223. .padio(PIN_HSI),
  6224. .datain(gnd),
  6225. .oe(gnd),
  6226. .outclk(gnd),
  6227. .outclkena(vcc),
  6228. .inclk(gnd),
  6229. .inclkena(vcc),
  6230. .areset(gnd),
  6231. .sreset(gnd),
  6232. .combout(\PIN_HSI~input_o ),
  6233. .regout());
  6234. defparam \PIN_HSI~input .coord_x = 22;
  6235. defparam \PIN_HSI~input .coord_y = 4;
  6236. defparam \PIN_HSI~input .coord_z = 0;
  6237. defparam \PIN_HSI~input .IN_ASYNC_MODE = 1'b0;
  6238. defparam \PIN_HSI~input .IN_SYNC_MODE = 1'b0;
  6239. defparam \PIN_HSI~input .IN_POWERUP = 1'b0;
  6240. defparam \PIN_HSI~input .OUT_REG_MODE = 1'b0;
  6241. defparam \PIN_HSI~input .OUT_ASYNC_MODE = 1'b0;
  6242. defparam \PIN_HSI~input .OUT_SYNC_MODE = 1'b0;
  6243. defparam \PIN_HSI~input .OUT_POWERUP = 1'b0;
  6244. defparam \PIN_HSI~input .OE_REG_MODE = 1'b0;
  6245. defparam \PIN_HSI~input .OE_ASYNC_MODE = 1'b0;
  6246. defparam \PIN_HSI~input .OE_SYNC_MODE = 1'b0;
  6247. defparam \PIN_HSI~input .OE_POWERUP = 1'b0;
  6248. defparam \PIN_HSI~input .CFG_TRI_INPUT = 1'b0;
  6249. defparam \PIN_HSI~input .CFG_PULL_UP = 1'b0;
  6250. defparam \PIN_HSI~input .CFG_SLR = 1'b0;
  6251. defparam \PIN_HSI~input .CFG_OPEN_DRAIN = 1'b0;
  6252. defparam \PIN_HSI~input .CFG_PDRCTRL = 4'b0010;
  6253. defparam \PIN_HSI~input .CFG_KEEP = 2'b00;
  6254. defparam \PIN_HSI~input .CFG_LVDS_OUT_EN = 1'b0;
  6255. defparam \PIN_HSI~input .CFG_LVDS_SEL_CUA = 2'b00;
  6256. defparam \PIN_HSI~input .CFG_LVDS_IREF = 10'b0110000000;
  6257. defparam \PIN_HSI~input .CFG_LVDS_IN_EN = 1'b0;
  6258. defparam \PIN_HSI~input .DPCLK_DELAY = 4'b0000;
  6259. defparam \PIN_HSI~input .OUT_DELAY = 1'b0;
  6260. defparam \PIN_HSI~input .IN_DATA_DELAY = 3'b000;
  6261. defparam \PIN_HSI~input .IN_REG_DELAY = 3'b000;
  6262. alta_rio \PIN_OSC~input (
  6263. .padio(PIN_OSC),
  6264. .datain(gnd),
  6265. .oe(gnd),
  6266. .outclk(gnd),
  6267. .outclkena(vcc),
  6268. .inclk(gnd),
  6269. .inclkena(vcc),
  6270. .areset(gnd),
  6271. .sreset(gnd),
  6272. .combout(\PIN_OSC~input_o ),
  6273. .regout());
  6274. defparam \PIN_OSC~input .coord_x = 22;
  6275. defparam \PIN_OSC~input .coord_y = 4;
  6276. defparam \PIN_OSC~input .coord_z = 2;
  6277. defparam \PIN_OSC~input .IN_ASYNC_MODE = 1'b0;
  6278. defparam \PIN_OSC~input .IN_SYNC_MODE = 1'b0;
  6279. defparam \PIN_OSC~input .IN_POWERUP = 1'b0;
  6280. defparam \PIN_OSC~input .OUT_REG_MODE = 1'b0;
  6281. defparam \PIN_OSC~input .OUT_ASYNC_MODE = 1'b0;
  6282. defparam \PIN_OSC~input .OUT_SYNC_MODE = 1'b0;
  6283. defparam \PIN_OSC~input .OUT_POWERUP = 1'b0;
  6284. defparam \PIN_OSC~input .OE_REG_MODE = 1'b0;
  6285. defparam \PIN_OSC~input .OE_ASYNC_MODE = 1'b0;
  6286. defparam \PIN_OSC~input .OE_SYNC_MODE = 1'b0;
  6287. defparam \PIN_OSC~input .OE_POWERUP = 1'b0;
  6288. defparam \PIN_OSC~input .CFG_TRI_INPUT = 1'b0;
  6289. defparam \PIN_OSC~input .CFG_PULL_UP = 1'b0;
  6290. defparam \PIN_OSC~input .CFG_SLR = 1'b0;
  6291. defparam \PIN_OSC~input .CFG_OPEN_DRAIN = 1'b0;
  6292. defparam \PIN_OSC~input .CFG_PDRCTRL = 4'b0010;
  6293. defparam \PIN_OSC~input .CFG_KEEP = 2'b00;
  6294. defparam \PIN_OSC~input .CFG_LVDS_OUT_EN = 1'b0;
  6295. defparam \PIN_OSC~input .CFG_LVDS_SEL_CUA = 2'b00;
  6296. defparam \PIN_OSC~input .CFG_LVDS_IREF = 10'b0110000000;
  6297. defparam \PIN_OSC~input .CFG_LVDS_IN_EN = 1'b0;
  6298. defparam \PIN_OSC~input .DPCLK_DELAY = 4'b0000;
  6299. defparam \PIN_OSC~input .OUT_DELAY = 1'b0;
  6300. defparam \PIN_OSC~input .IN_DATA_DELAY = 3'b000;
  6301. defparam \PIN_OSC~input .IN_REG_DELAY = 3'b000;
  6302. alta_slice PLL_ENABLE(
  6303. .A(vcc),
  6304. .B(vcc),
  6305. .C(vcc),
  6306. .D(\rv32.sys_ctrl_pllEnable ),
  6307. .Cin(),
  6308. .Qin(),
  6309. .Clk(),
  6310. .AsyncReset(),
  6311. .SyncReset(),
  6312. .ShiftData(),
  6313. .SyncLoad(),
  6314. .LutOut(\PLL_ENABLE~combout ),
  6315. .Cout(),
  6316. .Q());
  6317. defparam PLL_ENABLE.coord_x = 18;
  6318. defparam PLL_ENABLE.coord_y = 5;
  6319. defparam PLL_ENABLE.coord_z = 9;
  6320. defparam PLL_ENABLE.mask = 16'h00FF;
  6321. defparam PLL_ENABLE.modeMux = 1'b0;
  6322. defparam PLL_ENABLE.FeedbackMux = 1'b0;
  6323. defparam PLL_ENABLE.ShiftMux = 1'b0;
  6324. defparam PLL_ENABLE.BypassEn = 1'b0;
  6325. defparam PLL_ENABLE.CarryEnb = 1'b1;
  6326. alta_io_gclk \PLL_ENABLE~clkctrl (
  6327. .inclk(\PLL_ENABLE~combout ),
  6328. .outclk(\PLL_ENABLE~clkctrl_outclk ));
  6329. defparam \PLL_ENABLE~clkctrl .coord_x = 22;
  6330. defparam \PLL_ENABLE~clkctrl .coord_y = 4;
  6331. defparam \PLL_ENABLE~clkctrl .coord_z = 4;
  6332. alta_slice PLL_LOCK(
  6333. .A(vcc),
  6334. .B(vcc),
  6335. .C(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp ),
  6336. .D(\pll_inst|auto_generated|pll_lock_sync~q ),
  6337. .Cin(),
  6338. .Qin(),
  6339. .Clk(),
  6340. .AsyncReset(),
  6341. .SyncReset(),
  6342. .ShiftData(),
  6343. .SyncLoad(),
  6344. .LutOut(\PLL_LOCK~combout ),
  6345. .Cout(),
  6346. .Q());
  6347. defparam PLL_LOCK.coord_x = 15;
  6348. defparam PLL_LOCK.coord_y = 7;
  6349. defparam PLL_LOCK.coord_z = 2;
  6350. defparam PLL_LOCK.mask = 16'hF000;
  6351. defparam PLL_LOCK.modeMux = 1'b0;
  6352. defparam PLL_LOCK.FeedbackMux = 1'b0;
  6353. defparam PLL_LOCK.ShiftMux = 1'b0;
  6354. defparam PLL_LOCK.BypassEn = 1'b0;
  6355. defparam PLL_LOCK.CarryEnb = 1'b1;
  6356. alta_rio \SIM_CLK~output (
  6357. .padio(SIM_CLK),
  6358. .datain(\macro_inst|sim_clk_reg~q ),
  6359. .oe(vcc),
  6360. .outclk(gnd),
  6361. .outclkena(vcc),
  6362. .inclk(gnd),
  6363. .inclkena(vcc),
  6364. .areset(gnd),
  6365. .sreset(gnd),
  6366. .combout(),
  6367. .regout());
  6368. defparam \SIM_CLK~output .coord_x = 8;
  6369. defparam \SIM_CLK~output .coord_y = 0;
  6370. defparam \SIM_CLK~output .coord_z = 0;
  6371. defparam \SIM_CLK~output .IN_ASYNC_MODE = 1'b0;
  6372. defparam \SIM_CLK~output .IN_SYNC_MODE = 1'b0;
  6373. defparam \SIM_CLK~output .IN_POWERUP = 1'b0;
  6374. defparam \SIM_CLK~output .OUT_REG_MODE = 1'b0;
  6375. defparam \SIM_CLK~output .OUT_ASYNC_MODE = 1'b0;
  6376. defparam \SIM_CLK~output .OUT_SYNC_MODE = 1'b0;
  6377. defparam \SIM_CLK~output .OUT_POWERUP = 1'b0;
  6378. defparam \SIM_CLK~output .OE_REG_MODE = 1'b0;
  6379. defparam \SIM_CLK~output .OE_ASYNC_MODE = 1'b0;
  6380. defparam \SIM_CLK~output .OE_SYNC_MODE = 1'b0;
  6381. defparam \SIM_CLK~output .OE_POWERUP = 1'b0;
  6382. defparam \SIM_CLK~output .CFG_TRI_INPUT = 1'b0;
  6383. defparam \SIM_CLK~output .CFG_INPUT_EN = 1'b0;
  6384. defparam \SIM_CLK~output .CFG_PULL_UP = 1'b0;
  6385. defparam \SIM_CLK~output .CFG_SLR = 1'b0;
  6386. defparam \SIM_CLK~output .CFG_OPEN_DRAIN = 1'b0;
  6387. defparam \SIM_CLK~output .CFG_PDRCTRL = 4'b0100;
  6388. defparam \SIM_CLK~output .CFG_KEEP = 2'b00;
  6389. defparam \SIM_CLK~output .CFG_LVDS_OUT_EN = 1'b0;
  6390. defparam \SIM_CLK~output .CFG_LVDS_SEL_CUA = 2'b00;
  6391. defparam \SIM_CLK~output .CFG_LVDS_IREF = 10'b0110000000;
  6392. defparam \SIM_CLK~output .CFG_LVDS_IN_EN = 1'b0;
  6393. defparam \SIM_CLK~output .DPCLK_DELAY = 4'b0000;
  6394. defparam \SIM_CLK~output .OUT_DELAY = 1'b0;
  6395. defparam \SIM_CLK~output .IN_DATA_DELAY = 3'b000;
  6396. defparam \SIM_CLK~output .IN_REG_DELAY = 3'b000;
  6397. alta_rio \SIM_IO[0]~output (
  6398. .padio(SIM_IO[0]),
  6399. .datain(!\macro_inst|u_uart[0]|u_tx[0]|uart_txd~q ),
  6400. .oe(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  6401. .outclk(gnd),
  6402. .outclkena(vcc),
  6403. .inclk(gnd),
  6404. .inclkena(vcc),
  6405. .areset(gnd),
  6406. .sreset(gnd),
  6407. .combout(\SIM_IO[0]~input_o ),
  6408. .regout());
  6409. defparam \SIM_IO[0]~output .coord_x = 1;
  6410. defparam \SIM_IO[0]~output .coord_y = 0;
  6411. defparam \SIM_IO[0]~output .coord_z = 1;
  6412. defparam \SIM_IO[0]~output .IN_ASYNC_MODE = 1'b0;
  6413. defparam \SIM_IO[0]~output .IN_SYNC_MODE = 1'b0;
  6414. defparam \SIM_IO[0]~output .IN_POWERUP = 1'b0;
  6415. defparam \SIM_IO[0]~output .OUT_REG_MODE = 1'b0;
  6416. defparam \SIM_IO[0]~output .OUT_ASYNC_MODE = 1'b0;
  6417. defparam \SIM_IO[0]~output .OUT_SYNC_MODE = 1'b0;
  6418. defparam \SIM_IO[0]~output .OUT_POWERUP = 1'b0;
  6419. defparam \SIM_IO[0]~output .OE_REG_MODE = 1'b0;
  6420. defparam \SIM_IO[0]~output .OE_ASYNC_MODE = 1'b0;
  6421. defparam \SIM_IO[0]~output .OE_SYNC_MODE = 1'b0;
  6422. defparam \SIM_IO[0]~output .OE_POWERUP = 1'b0;
  6423. defparam \SIM_IO[0]~output .CFG_TRI_INPUT = 1'b0;
  6424. defparam \SIM_IO[0]~output .CFG_INPUT_EN = 1'b1;
  6425. defparam \SIM_IO[0]~output .CFG_PULL_UP = 1'b1;
  6426. defparam \SIM_IO[0]~output .CFG_SLR = 1'b0;
  6427. defparam \SIM_IO[0]~output .CFG_OPEN_DRAIN = 1'b0;
  6428. defparam \SIM_IO[0]~output .CFG_PDRCTRL = 4'b0100;
  6429. defparam \SIM_IO[0]~output .CFG_KEEP = 2'b00;
  6430. defparam \SIM_IO[0]~output .CFG_LVDS_OUT_EN = 1'b0;
  6431. defparam \SIM_IO[0]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6432. defparam \SIM_IO[0]~output .CFG_LVDS_IREF = 10'b0110000000;
  6433. defparam \SIM_IO[0]~output .CFG_LVDS_IN_EN = 1'b0;
  6434. defparam \SIM_IO[0]~output .DPCLK_DELAY = 4'b0000;
  6435. defparam \SIM_IO[0]~output .OUT_DELAY = 1'b0;
  6436. defparam \SIM_IO[0]~output .IN_DATA_DELAY = 3'b000;
  6437. defparam \SIM_IO[0]~output .IN_REG_DELAY = 3'b000;
  6438. alta_rio \SIM_IO[10]~output (
  6439. .padio(SIM_IO[10]),
  6440. .datain(!\macro_inst|u_uart[1]|u_tx[4]|uart_txd~q ),
  6441. .oe(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  6442. .outclk(gnd),
  6443. .outclkena(vcc),
  6444. .inclk(gnd),
  6445. .inclkena(vcc),
  6446. .areset(gnd),
  6447. .sreset(gnd),
  6448. .combout(\SIM_IO[10]~input_o ),
  6449. .regout());
  6450. defparam \SIM_IO[10]~output .coord_x = 22;
  6451. defparam \SIM_IO[10]~output .coord_y = 2;
  6452. defparam \SIM_IO[10]~output .coord_z = 3;
  6453. defparam \SIM_IO[10]~output .IN_ASYNC_MODE = 1'b0;
  6454. defparam \SIM_IO[10]~output .IN_SYNC_MODE = 1'b0;
  6455. defparam \SIM_IO[10]~output .IN_POWERUP = 1'b0;
  6456. defparam \SIM_IO[10]~output .OUT_REG_MODE = 1'b0;
  6457. defparam \SIM_IO[10]~output .OUT_ASYNC_MODE = 1'b0;
  6458. defparam \SIM_IO[10]~output .OUT_SYNC_MODE = 1'b0;
  6459. defparam \SIM_IO[10]~output .OUT_POWERUP = 1'b0;
  6460. defparam \SIM_IO[10]~output .OE_REG_MODE = 1'b0;
  6461. defparam \SIM_IO[10]~output .OE_ASYNC_MODE = 1'b0;
  6462. defparam \SIM_IO[10]~output .OE_SYNC_MODE = 1'b0;
  6463. defparam \SIM_IO[10]~output .OE_POWERUP = 1'b0;
  6464. defparam \SIM_IO[10]~output .CFG_TRI_INPUT = 1'b0;
  6465. defparam \SIM_IO[10]~output .CFG_INPUT_EN = 1'b1;
  6466. defparam \SIM_IO[10]~output .CFG_PULL_UP = 1'b1;
  6467. defparam \SIM_IO[10]~output .CFG_SLR = 1'b0;
  6468. defparam \SIM_IO[10]~output .CFG_OPEN_DRAIN = 1'b0;
  6469. defparam \SIM_IO[10]~output .CFG_PDRCTRL = 4'b0100;
  6470. defparam \SIM_IO[10]~output .CFG_KEEP = 2'b00;
  6471. defparam \SIM_IO[10]~output .CFG_LVDS_OUT_EN = 1'b0;
  6472. defparam \SIM_IO[10]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6473. defparam \SIM_IO[10]~output .CFG_LVDS_IREF = 10'b0110000000;
  6474. defparam \SIM_IO[10]~output .CFG_LVDS_IN_EN = 1'b0;
  6475. defparam \SIM_IO[10]~output .DPCLK_DELAY = 4'b0000;
  6476. defparam \SIM_IO[10]~output .OUT_DELAY = 1'b0;
  6477. defparam \SIM_IO[10]~output .IN_DATA_DELAY = 3'b000;
  6478. defparam \SIM_IO[10]~output .IN_REG_DELAY = 3'b000;
  6479. alta_rio \SIM_IO[11]~output (
  6480. .padio(SIM_IO[11]),
  6481. .datain(!\macro_inst|u_uart[1]|u_tx[5]|uart_txd~q ),
  6482. .oe(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  6483. .outclk(gnd),
  6484. .outclkena(vcc),
  6485. .inclk(gnd),
  6486. .inclkena(vcc),
  6487. .areset(gnd),
  6488. .sreset(gnd),
  6489. .combout(\SIM_IO[11]~input_o ),
  6490. .regout());
  6491. defparam \SIM_IO[11]~output .coord_x = 22;
  6492. defparam \SIM_IO[11]~output .coord_y = 1;
  6493. defparam \SIM_IO[11]~output .coord_z = 3;
  6494. defparam \SIM_IO[11]~output .IN_ASYNC_MODE = 1'b0;
  6495. defparam \SIM_IO[11]~output .IN_SYNC_MODE = 1'b0;
  6496. defparam \SIM_IO[11]~output .IN_POWERUP = 1'b0;
  6497. defparam \SIM_IO[11]~output .OUT_REG_MODE = 1'b0;
  6498. defparam \SIM_IO[11]~output .OUT_ASYNC_MODE = 1'b0;
  6499. defparam \SIM_IO[11]~output .OUT_SYNC_MODE = 1'b0;
  6500. defparam \SIM_IO[11]~output .OUT_POWERUP = 1'b0;
  6501. defparam \SIM_IO[11]~output .OE_REG_MODE = 1'b0;
  6502. defparam \SIM_IO[11]~output .OE_ASYNC_MODE = 1'b0;
  6503. defparam \SIM_IO[11]~output .OE_SYNC_MODE = 1'b0;
  6504. defparam \SIM_IO[11]~output .OE_POWERUP = 1'b0;
  6505. defparam \SIM_IO[11]~output .CFG_TRI_INPUT = 1'b0;
  6506. defparam \SIM_IO[11]~output .CFG_INPUT_EN = 1'b1;
  6507. defparam \SIM_IO[11]~output .CFG_PULL_UP = 1'b1;
  6508. defparam \SIM_IO[11]~output .CFG_SLR = 1'b0;
  6509. defparam \SIM_IO[11]~output .CFG_OPEN_DRAIN = 1'b0;
  6510. defparam \SIM_IO[11]~output .CFG_PDRCTRL = 4'b0100;
  6511. defparam \SIM_IO[11]~output .CFG_KEEP = 2'b00;
  6512. defparam \SIM_IO[11]~output .CFG_LVDS_OUT_EN = 1'b0;
  6513. defparam \SIM_IO[11]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6514. defparam \SIM_IO[11]~output .CFG_LVDS_IREF = 10'b0110000000;
  6515. defparam \SIM_IO[11]~output .CFG_LVDS_IN_EN = 1'b0;
  6516. defparam \SIM_IO[11]~output .DPCLK_DELAY = 4'b0000;
  6517. defparam \SIM_IO[11]~output .OUT_DELAY = 1'b0;
  6518. defparam \SIM_IO[11]~output .IN_DATA_DELAY = 3'b000;
  6519. defparam \SIM_IO[11]~output .IN_REG_DELAY = 3'b000;
  6520. alta_rio \SIM_IO[1]~output (
  6521. .padio(SIM_IO[1]),
  6522. .datain(!\macro_inst|u_uart[0]|u_tx[1]|uart_txd~q ),
  6523. .oe(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  6524. .outclk(gnd),
  6525. .outclkena(vcc),
  6526. .inclk(gnd),
  6527. .inclkena(vcc),
  6528. .areset(gnd),
  6529. .sreset(gnd),
  6530. .combout(\SIM_IO[1]~input_o ),
  6531. .regout());
  6532. defparam \SIM_IO[1]~output .coord_x = 6;
  6533. defparam \SIM_IO[1]~output .coord_y = 0;
  6534. defparam \SIM_IO[1]~output .coord_z = 3;
  6535. defparam \SIM_IO[1]~output .IN_ASYNC_MODE = 1'b0;
  6536. defparam \SIM_IO[1]~output .IN_SYNC_MODE = 1'b0;
  6537. defparam \SIM_IO[1]~output .IN_POWERUP = 1'b0;
  6538. defparam \SIM_IO[1]~output .OUT_REG_MODE = 1'b0;
  6539. defparam \SIM_IO[1]~output .OUT_ASYNC_MODE = 1'b0;
  6540. defparam \SIM_IO[1]~output .OUT_SYNC_MODE = 1'b0;
  6541. defparam \SIM_IO[1]~output .OUT_POWERUP = 1'b0;
  6542. defparam \SIM_IO[1]~output .OE_REG_MODE = 1'b0;
  6543. defparam \SIM_IO[1]~output .OE_ASYNC_MODE = 1'b0;
  6544. defparam \SIM_IO[1]~output .OE_SYNC_MODE = 1'b0;
  6545. defparam \SIM_IO[1]~output .OE_POWERUP = 1'b0;
  6546. defparam \SIM_IO[1]~output .CFG_TRI_INPUT = 1'b0;
  6547. defparam \SIM_IO[1]~output .CFG_INPUT_EN = 1'b1;
  6548. defparam \SIM_IO[1]~output .CFG_PULL_UP = 1'b1;
  6549. defparam \SIM_IO[1]~output .CFG_SLR = 1'b0;
  6550. defparam \SIM_IO[1]~output .CFG_OPEN_DRAIN = 1'b0;
  6551. defparam \SIM_IO[1]~output .CFG_PDRCTRL = 4'b0100;
  6552. defparam \SIM_IO[1]~output .CFG_KEEP = 2'b00;
  6553. defparam \SIM_IO[1]~output .CFG_LVDS_OUT_EN = 1'b0;
  6554. defparam \SIM_IO[1]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6555. defparam \SIM_IO[1]~output .CFG_LVDS_IREF = 10'b0110000000;
  6556. defparam \SIM_IO[1]~output .CFG_LVDS_IN_EN = 1'b0;
  6557. defparam \SIM_IO[1]~output .DPCLK_DELAY = 4'b0000;
  6558. defparam \SIM_IO[1]~output .OUT_DELAY = 1'b0;
  6559. defparam \SIM_IO[1]~output .IN_DATA_DELAY = 3'b000;
  6560. defparam \SIM_IO[1]~output .IN_REG_DELAY = 3'b000;
  6561. alta_rio \SIM_IO[2]~output (
  6562. .padio(SIM_IO[2]),
  6563. .datain(!\macro_inst|u_uart[0]|u_tx[2]|uart_txd~q ),
  6564. .oe(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  6565. .outclk(gnd),
  6566. .outclkena(vcc),
  6567. .inclk(gnd),
  6568. .inclkena(vcc),
  6569. .areset(gnd),
  6570. .sreset(gnd),
  6571. .combout(\SIM_IO[2]~input_o ),
  6572. .regout());
  6573. defparam \SIM_IO[2]~output .coord_x = 8;
  6574. defparam \SIM_IO[2]~output .coord_y = 0;
  6575. defparam \SIM_IO[2]~output .coord_z = 1;
  6576. defparam \SIM_IO[2]~output .IN_ASYNC_MODE = 1'b0;
  6577. defparam \SIM_IO[2]~output .IN_SYNC_MODE = 1'b0;
  6578. defparam \SIM_IO[2]~output .IN_POWERUP = 1'b0;
  6579. defparam \SIM_IO[2]~output .OUT_REG_MODE = 1'b0;
  6580. defparam \SIM_IO[2]~output .OUT_ASYNC_MODE = 1'b0;
  6581. defparam \SIM_IO[2]~output .OUT_SYNC_MODE = 1'b0;
  6582. defparam \SIM_IO[2]~output .OUT_POWERUP = 1'b0;
  6583. defparam \SIM_IO[2]~output .OE_REG_MODE = 1'b0;
  6584. defparam \SIM_IO[2]~output .OE_ASYNC_MODE = 1'b0;
  6585. defparam \SIM_IO[2]~output .OE_SYNC_MODE = 1'b0;
  6586. defparam \SIM_IO[2]~output .OE_POWERUP = 1'b0;
  6587. defparam \SIM_IO[2]~output .CFG_TRI_INPUT = 1'b0;
  6588. defparam \SIM_IO[2]~output .CFG_INPUT_EN = 1'b1;
  6589. defparam \SIM_IO[2]~output .CFG_PULL_UP = 1'b1;
  6590. defparam \SIM_IO[2]~output .CFG_SLR = 1'b0;
  6591. defparam \SIM_IO[2]~output .CFG_OPEN_DRAIN = 1'b0;
  6592. defparam \SIM_IO[2]~output .CFG_PDRCTRL = 4'b0100;
  6593. defparam \SIM_IO[2]~output .CFG_KEEP = 2'b00;
  6594. defparam \SIM_IO[2]~output .CFG_LVDS_OUT_EN = 1'b0;
  6595. defparam \SIM_IO[2]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6596. defparam \SIM_IO[2]~output .CFG_LVDS_IREF = 10'b0110000000;
  6597. defparam \SIM_IO[2]~output .CFG_LVDS_IN_EN = 1'b0;
  6598. defparam \SIM_IO[2]~output .DPCLK_DELAY = 4'b0000;
  6599. defparam \SIM_IO[2]~output .OUT_DELAY = 1'b0;
  6600. defparam \SIM_IO[2]~output .IN_DATA_DELAY = 3'b000;
  6601. defparam \SIM_IO[2]~output .IN_REG_DELAY = 3'b000;
  6602. alta_rio \SIM_IO[3]~output (
  6603. .padio(SIM_IO[3]),
  6604. .datain(!\macro_inst|u_uart[0]|u_tx[3]|uart_txd~q ),
  6605. .oe(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  6606. .outclk(gnd),
  6607. .outclkena(vcc),
  6608. .inclk(gnd),
  6609. .inclkena(vcc),
  6610. .areset(gnd),
  6611. .sreset(gnd),
  6612. .combout(\SIM_IO[3]~input_o ),
  6613. .regout());
  6614. defparam \SIM_IO[3]~output .coord_x = 17;
  6615. defparam \SIM_IO[3]~output .coord_y = 0;
  6616. defparam \SIM_IO[3]~output .coord_z = 1;
  6617. defparam \SIM_IO[3]~output .IN_ASYNC_MODE = 1'b0;
  6618. defparam \SIM_IO[3]~output .IN_SYNC_MODE = 1'b0;
  6619. defparam \SIM_IO[3]~output .IN_POWERUP = 1'b0;
  6620. defparam \SIM_IO[3]~output .OUT_REG_MODE = 1'b0;
  6621. defparam \SIM_IO[3]~output .OUT_ASYNC_MODE = 1'b0;
  6622. defparam \SIM_IO[3]~output .OUT_SYNC_MODE = 1'b0;
  6623. defparam \SIM_IO[3]~output .OUT_POWERUP = 1'b0;
  6624. defparam \SIM_IO[3]~output .OE_REG_MODE = 1'b0;
  6625. defparam \SIM_IO[3]~output .OE_ASYNC_MODE = 1'b0;
  6626. defparam \SIM_IO[3]~output .OE_SYNC_MODE = 1'b0;
  6627. defparam \SIM_IO[3]~output .OE_POWERUP = 1'b0;
  6628. defparam \SIM_IO[3]~output .CFG_TRI_INPUT = 1'b0;
  6629. defparam \SIM_IO[3]~output .CFG_INPUT_EN = 1'b1;
  6630. defparam \SIM_IO[3]~output .CFG_PULL_UP = 1'b1;
  6631. defparam \SIM_IO[3]~output .CFG_SLR = 1'b0;
  6632. defparam \SIM_IO[3]~output .CFG_OPEN_DRAIN = 1'b0;
  6633. defparam \SIM_IO[3]~output .CFG_PDRCTRL = 4'b0100;
  6634. defparam \SIM_IO[3]~output .CFG_KEEP = 2'b00;
  6635. defparam \SIM_IO[3]~output .CFG_LVDS_OUT_EN = 1'b0;
  6636. defparam \SIM_IO[3]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6637. defparam \SIM_IO[3]~output .CFG_LVDS_IREF = 10'b0110000000;
  6638. defparam \SIM_IO[3]~output .CFG_LVDS_IN_EN = 1'b0;
  6639. defparam \SIM_IO[3]~output .DPCLK_DELAY = 4'b0000;
  6640. defparam \SIM_IO[3]~output .OUT_DELAY = 1'b0;
  6641. defparam \SIM_IO[3]~output .IN_DATA_DELAY = 3'b000;
  6642. defparam \SIM_IO[3]~output .IN_REG_DELAY = 3'b000;
  6643. alta_rio \SIM_IO[4]~output (
  6644. .padio(SIM_IO[4]),
  6645. .datain(!\macro_inst|u_uart[0]|u_tx[4]|uart_txd~q ),
  6646. .oe(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  6647. .outclk(gnd),
  6648. .outclkena(vcc),
  6649. .inclk(gnd),
  6650. .inclkena(vcc),
  6651. .areset(gnd),
  6652. .sreset(gnd),
  6653. .combout(\SIM_IO[4]~input_o ),
  6654. .regout());
  6655. defparam \SIM_IO[4]~output .coord_x = 1;
  6656. defparam \SIM_IO[4]~output .coord_y = 0;
  6657. defparam \SIM_IO[4]~output .coord_z = 3;
  6658. defparam \SIM_IO[4]~output .IN_ASYNC_MODE = 1'b0;
  6659. defparam \SIM_IO[4]~output .IN_SYNC_MODE = 1'b0;
  6660. defparam \SIM_IO[4]~output .IN_POWERUP = 1'b0;
  6661. defparam \SIM_IO[4]~output .OUT_REG_MODE = 1'b0;
  6662. defparam \SIM_IO[4]~output .OUT_ASYNC_MODE = 1'b0;
  6663. defparam \SIM_IO[4]~output .OUT_SYNC_MODE = 1'b0;
  6664. defparam \SIM_IO[4]~output .OUT_POWERUP = 1'b0;
  6665. defparam \SIM_IO[4]~output .OE_REG_MODE = 1'b0;
  6666. defparam \SIM_IO[4]~output .OE_ASYNC_MODE = 1'b0;
  6667. defparam \SIM_IO[4]~output .OE_SYNC_MODE = 1'b0;
  6668. defparam \SIM_IO[4]~output .OE_POWERUP = 1'b0;
  6669. defparam \SIM_IO[4]~output .CFG_TRI_INPUT = 1'b0;
  6670. defparam \SIM_IO[4]~output .CFG_INPUT_EN = 1'b1;
  6671. defparam \SIM_IO[4]~output .CFG_PULL_UP = 1'b1;
  6672. defparam \SIM_IO[4]~output .CFG_SLR = 1'b0;
  6673. defparam \SIM_IO[4]~output .CFG_OPEN_DRAIN = 1'b0;
  6674. defparam \SIM_IO[4]~output .CFG_PDRCTRL = 4'b0100;
  6675. defparam \SIM_IO[4]~output .CFG_KEEP = 2'b00;
  6676. defparam \SIM_IO[4]~output .CFG_LVDS_OUT_EN = 1'b0;
  6677. defparam \SIM_IO[4]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6678. defparam \SIM_IO[4]~output .CFG_LVDS_IREF = 10'b0110000000;
  6679. defparam \SIM_IO[4]~output .CFG_LVDS_IN_EN = 1'b0;
  6680. defparam \SIM_IO[4]~output .DPCLK_DELAY = 4'b0000;
  6681. defparam \SIM_IO[4]~output .OUT_DELAY = 1'b0;
  6682. defparam \SIM_IO[4]~output .IN_DATA_DELAY = 3'b000;
  6683. defparam \SIM_IO[4]~output .IN_REG_DELAY = 3'b000;
  6684. alta_rio \SIM_IO[5]~output (
  6685. .padio(SIM_IO[5]),
  6686. .datain(!\macro_inst|u_uart[0]|u_tx[5]|uart_txd~q ),
  6687. .oe(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  6688. .outclk(gnd),
  6689. .outclkena(vcc),
  6690. .inclk(gnd),
  6691. .inclkena(vcc),
  6692. .areset(gnd),
  6693. .sreset(gnd),
  6694. .combout(\SIM_IO[5]~input_o ),
  6695. .regout());
  6696. defparam \SIM_IO[5]~output .coord_x = 7;
  6697. defparam \SIM_IO[5]~output .coord_y = 0;
  6698. defparam \SIM_IO[5]~output .coord_z = 1;
  6699. defparam \SIM_IO[5]~output .IN_ASYNC_MODE = 1'b0;
  6700. defparam \SIM_IO[5]~output .IN_SYNC_MODE = 1'b0;
  6701. defparam \SIM_IO[5]~output .IN_POWERUP = 1'b0;
  6702. defparam \SIM_IO[5]~output .OUT_REG_MODE = 1'b0;
  6703. defparam \SIM_IO[5]~output .OUT_ASYNC_MODE = 1'b0;
  6704. defparam \SIM_IO[5]~output .OUT_SYNC_MODE = 1'b0;
  6705. defparam \SIM_IO[5]~output .OUT_POWERUP = 1'b0;
  6706. defparam \SIM_IO[5]~output .OE_REG_MODE = 1'b0;
  6707. defparam \SIM_IO[5]~output .OE_ASYNC_MODE = 1'b0;
  6708. defparam \SIM_IO[5]~output .OE_SYNC_MODE = 1'b0;
  6709. defparam \SIM_IO[5]~output .OE_POWERUP = 1'b0;
  6710. defparam \SIM_IO[5]~output .CFG_TRI_INPUT = 1'b0;
  6711. defparam \SIM_IO[5]~output .CFG_INPUT_EN = 1'b1;
  6712. defparam \SIM_IO[5]~output .CFG_PULL_UP = 1'b1;
  6713. defparam \SIM_IO[5]~output .CFG_SLR = 1'b0;
  6714. defparam \SIM_IO[5]~output .CFG_OPEN_DRAIN = 1'b0;
  6715. defparam \SIM_IO[5]~output .CFG_PDRCTRL = 4'b0100;
  6716. defparam \SIM_IO[5]~output .CFG_KEEP = 2'b00;
  6717. defparam \SIM_IO[5]~output .CFG_LVDS_OUT_EN = 1'b0;
  6718. defparam \SIM_IO[5]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6719. defparam \SIM_IO[5]~output .CFG_LVDS_IREF = 10'b0110000000;
  6720. defparam \SIM_IO[5]~output .CFG_LVDS_IN_EN = 1'b0;
  6721. defparam \SIM_IO[5]~output .DPCLK_DELAY = 4'b0000;
  6722. defparam \SIM_IO[5]~output .OUT_DELAY = 1'b0;
  6723. defparam \SIM_IO[5]~output .IN_DATA_DELAY = 3'b000;
  6724. defparam \SIM_IO[5]~output .IN_REG_DELAY = 3'b000;
  6725. alta_rio \SIM_IO[6]~output (
  6726. .padio(SIM_IO[6]),
  6727. .datain(!\macro_inst|u_uart[1]|u_tx[0]|uart_txd~q ),
  6728. .oe(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  6729. .outclk(gnd),
  6730. .outclkena(vcc),
  6731. .inclk(gnd),
  6732. .inclkena(vcc),
  6733. .areset(gnd),
  6734. .sreset(gnd),
  6735. .combout(\SIM_IO[6]~input_o ),
  6736. .regout());
  6737. defparam \SIM_IO[6]~output .coord_x = 8;
  6738. defparam \SIM_IO[6]~output .coord_y = 0;
  6739. defparam \SIM_IO[6]~output .coord_z = 3;
  6740. defparam \SIM_IO[6]~output .IN_ASYNC_MODE = 1'b0;
  6741. defparam \SIM_IO[6]~output .IN_SYNC_MODE = 1'b0;
  6742. defparam \SIM_IO[6]~output .IN_POWERUP = 1'b0;
  6743. defparam \SIM_IO[6]~output .OUT_REG_MODE = 1'b0;
  6744. defparam \SIM_IO[6]~output .OUT_ASYNC_MODE = 1'b0;
  6745. defparam \SIM_IO[6]~output .OUT_SYNC_MODE = 1'b0;
  6746. defparam \SIM_IO[6]~output .OUT_POWERUP = 1'b0;
  6747. defparam \SIM_IO[6]~output .OE_REG_MODE = 1'b0;
  6748. defparam \SIM_IO[6]~output .OE_ASYNC_MODE = 1'b0;
  6749. defparam \SIM_IO[6]~output .OE_SYNC_MODE = 1'b0;
  6750. defparam \SIM_IO[6]~output .OE_POWERUP = 1'b0;
  6751. defparam \SIM_IO[6]~output .CFG_TRI_INPUT = 1'b0;
  6752. defparam \SIM_IO[6]~output .CFG_INPUT_EN = 1'b1;
  6753. defparam \SIM_IO[6]~output .CFG_PULL_UP = 1'b1;
  6754. defparam \SIM_IO[6]~output .CFG_SLR = 1'b0;
  6755. defparam \SIM_IO[6]~output .CFG_OPEN_DRAIN = 1'b0;
  6756. defparam \SIM_IO[6]~output .CFG_PDRCTRL = 4'b0100;
  6757. defparam \SIM_IO[6]~output .CFG_KEEP = 2'b00;
  6758. defparam \SIM_IO[6]~output .CFG_LVDS_OUT_EN = 1'b0;
  6759. defparam \SIM_IO[6]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6760. defparam \SIM_IO[6]~output .CFG_LVDS_IREF = 10'b0110000000;
  6761. defparam \SIM_IO[6]~output .CFG_LVDS_IN_EN = 1'b0;
  6762. defparam \SIM_IO[6]~output .DPCLK_DELAY = 4'b0000;
  6763. defparam \SIM_IO[6]~output .OUT_DELAY = 1'b0;
  6764. defparam \SIM_IO[6]~output .IN_DATA_DELAY = 3'b000;
  6765. defparam \SIM_IO[6]~output .IN_REG_DELAY = 3'b000;
  6766. alta_rio \SIM_IO[7]~output (
  6767. .padio(SIM_IO[7]),
  6768. .datain(!\macro_inst|u_uart[1]|u_tx[1]|uart_txd~q ),
  6769. .oe(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  6770. .outclk(gnd),
  6771. .outclkena(vcc),
  6772. .inclk(gnd),
  6773. .inclkena(vcc),
  6774. .areset(gnd),
  6775. .sreset(gnd),
  6776. .combout(\SIM_IO[7]~input_o ),
  6777. .regout());
  6778. defparam \SIM_IO[7]~output .coord_x = 18;
  6779. defparam \SIM_IO[7]~output .coord_y = 0;
  6780. defparam \SIM_IO[7]~output .coord_z = 0;
  6781. defparam \SIM_IO[7]~output .IN_ASYNC_MODE = 1'b0;
  6782. defparam \SIM_IO[7]~output .IN_SYNC_MODE = 1'b0;
  6783. defparam \SIM_IO[7]~output .IN_POWERUP = 1'b0;
  6784. defparam \SIM_IO[7]~output .OUT_REG_MODE = 1'b0;
  6785. defparam \SIM_IO[7]~output .OUT_ASYNC_MODE = 1'b0;
  6786. defparam \SIM_IO[7]~output .OUT_SYNC_MODE = 1'b0;
  6787. defparam \SIM_IO[7]~output .OUT_POWERUP = 1'b0;
  6788. defparam \SIM_IO[7]~output .OE_REG_MODE = 1'b0;
  6789. defparam \SIM_IO[7]~output .OE_ASYNC_MODE = 1'b0;
  6790. defparam \SIM_IO[7]~output .OE_SYNC_MODE = 1'b0;
  6791. defparam \SIM_IO[7]~output .OE_POWERUP = 1'b0;
  6792. defparam \SIM_IO[7]~output .CFG_TRI_INPUT = 1'b0;
  6793. defparam \SIM_IO[7]~output .CFG_INPUT_EN = 1'b1;
  6794. defparam \SIM_IO[7]~output .CFG_PULL_UP = 1'b1;
  6795. defparam \SIM_IO[7]~output .CFG_SLR = 1'b0;
  6796. defparam \SIM_IO[7]~output .CFG_OPEN_DRAIN = 1'b0;
  6797. defparam \SIM_IO[7]~output .CFG_PDRCTRL = 4'b0100;
  6798. defparam \SIM_IO[7]~output .CFG_KEEP = 2'b00;
  6799. defparam \SIM_IO[7]~output .CFG_LVDS_OUT_EN = 1'b0;
  6800. defparam \SIM_IO[7]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6801. defparam \SIM_IO[7]~output .CFG_LVDS_IREF = 10'b0110000000;
  6802. defparam \SIM_IO[7]~output .CFG_LVDS_IN_EN = 1'b0;
  6803. defparam \SIM_IO[7]~output .DPCLK_DELAY = 4'b0000;
  6804. defparam \SIM_IO[7]~output .OUT_DELAY = 1'b0;
  6805. defparam \SIM_IO[7]~output .IN_DATA_DELAY = 3'b000;
  6806. defparam \SIM_IO[7]~output .IN_REG_DELAY = 3'b000;
  6807. alta_rio \SIM_IO[8]~output (
  6808. .padio(SIM_IO[8]),
  6809. .datain(!\macro_inst|u_uart[1]|u_tx[2]|uart_txd~q ),
  6810. .oe(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  6811. .outclk(gnd),
  6812. .outclkena(vcc),
  6813. .inclk(gnd),
  6814. .inclkena(vcc),
  6815. .areset(gnd),
  6816. .sreset(gnd),
  6817. .combout(\SIM_IO[8]~input_o ),
  6818. .regout());
  6819. defparam \SIM_IO[8]~output .coord_x = 19;
  6820. defparam \SIM_IO[8]~output .coord_y = 13;
  6821. defparam \SIM_IO[8]~output .coord_z = 3;
  6822. defparam \SIM_IO[8]~output .IN_ASYNC_MODE = 1'b0;
  6823. defparam \SIM_IO[8]~output .IN_SYNC_MODE = 1'b0;
  6824. defparam \SIM_IO[8]~output .IN_POWERUP = 1'b0;
  6825. defparam \SIM_IO[8]~output .OUT_REG_MODE = 1'b0;
  6826. defparam \SIM_IO[8]~output .OUT_ASYNC_MODE = 1'b0;
  6827. defparam \SIM_IO[8]~output .OUT_SYNC_MODE = 1'b0;
  6828. defparam \SIM_IO[8]~output .OUT_POWERUP = 1'b0;
  6829. defparam \SIM_IO[8]~output .OE_REG_MODE = 1'b0;
  6830. defparam \SIM_IO[8]~output .OE_ASYNC_MODE = 1'b0;
  6831. defparam \SIM_IO[8]~output .OE_SYNC_MODE = 1'b0;
  6832. defparam \SIM_IO[8]~output .OE_POWERUP = 1'b0;
  6833. defparam \SIM_IO[8]~output .CFG_TRI_INPUT = 1'b0;
  6834. defparam \SIM_IO[8]~output .CFG_INPUT_EN = 1'b1;
  6835. defparam \SIM_IO[8]~output .CFG_PULL_UP = 1'b1;
  6836. defparam \SIM_IO[8]~output .CFG_SLR = 1'b0;
  6837. defparam \SIM_IO[8]~output .CFG_OPEN_DRAIN = 1'b0;
  6838. defparam \SIM_IO[8]~output .CFG_PDRCTRL = 4'b0100;
  6839. defparam \SIM_IO[8]~output .CFG_KEEP = 2'b00;
  6840. defparam \SIM_IO[8]~output .CFG_LVDS_OUT_EN = 1'b0;
  6841. defparam \SIM_IO[8]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6842. defparam \SIM_IO[8]~output .CFG_LVDS_IREF = 10'b0110000000;
  6843. defparam \SIM_IO[8]~output .CFG_LVDS_IN_EN = 1'b0;
  6844. defparam \SIM_IO[8]~output .DPCLK_DELAY = 4'b0000;
  6845. defparam \SIM_IO[8]~output .OUT_DELAY = 1'b0;
  6846. defparam \SIM_IO[8]~output .IN_DATA_DELAY = 3'b000;
  6847. defparam \SIM_IO[8]~output .IN_REG_DELAY = 3'b000;
  6848. alta_rio \SIM_IO[9]~output (
  6849. .padio(SIM_IO[9]),
  6850. .datain(!\macro_inst|u_uart[1]|u_tx[3]|uart_txd~q ),
  6851. .oe(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  6852. .outclk(gnd),
  6853. .outclkena(vcc),
  6854. .inclk(gnd),
  6855. .inclkena(vcc),
  6856. .areset(gnd),
  6857. .sreset(gnd),
  6858. .combout(\SIM_IO[9]~input_o ),
  6859. .regout());
  6860. defparam \SIM_IO[9]~output .coord_x = 22;
  6861. defparam \SIM_IO[9]~output .coord_y = 3;
  6862. defparam \SIM_IO[9]~output .coord_z = 0;
  6863. defparam \SIM_IO[9]~output .IN_ASYNC_MODE = 1'b0;
  6864. defparam \SIM_IO[9]~output .IN_SYNC_MODE = 1'b0;
  6865. defparam \SIM_IO[9]~output .IN_POWERUP = 1'b0;
  6866. defparam \SIM_IO[9]~output .OUT_REG_MODE = 1'b0;
  6867. defparam \SIM_IO[9]~output .OUT_ASYNC_MODE = 1'b0;
  6868. defparam \SIM_IO[9]~output .OUT_SYNC_MODE = 1'b0;
  6869. defparam \SIM_IO[9]~output .OUT_POWERUP = 1'b0;
  6870. defparam \SIM_IO[9]~output .OE_REG_MODE = 1'b0;
  6871. defparam \SIM_IO[9]~output .OE_ASYNC_MODE = 1'b0;
  6872. defparam \SIM_IO[9]~output .OE_SYNC_MODE = 1'b0;
  6873. defparam \SIM_IO[9]~output .OE_POWERUP = 1'b0;
  6874. defparam \SIM_IO[9]~output .CFG_TRI_INPUT = 1'b0;
  6875. defparam \SIM_IO[9]~output .CFG_INPUT_EN = 1'b1;
  6876. defparam \SIM_IO[9]~output .CFG_PULL_UP = 1'b1;
  6877. defparam \SIM_IO[9]~output .CFG_SLR = 1'b0;
  6878. defparam \SIM_IO[9]~output .CFG_OPEN_DRAIN = 1'b0;
  6879. defparam \SIM_IO[9]~output .CFG_PDRCTRL = 4'b0100;
  6880. defparam \SIM_IO[9]~output .CFG_KEEP = 2'b00;
  6881. defparam \SIM_IO[9]~output .CFG_LVDS_OUT_EN = 1'b0;
  6882. defparam \SIM_IO[9]~output .CFG_LVDS_SEL_CUA = 2'b00;
  6883. defparam \SIM_IO[9]~output .CFG_LVDS_IREF = 10'b0110000000;
  6884. defparam \SIM_IO[9]~output .CFG_LVDS_IN_EN = 1'b0;
  6885. defparam \SIM_IO[9]~output .DPCLK_DELAY = 4'b0000;
  6886. defparam \SIM_IO[9]~output .OUT_DELAY = 1'b0;
  6887. defparam \SIM_IO[9]~output .IN_DATA_DELAY = 3'b000;
  6888. defparam \SIM_IO[9]~output .IN_REG_DELAY = 3'b000;
  6889. alta_rio \SIM_IO_12~output (
  6890. .padio(SIM_IO_12),
  6891. .datain(\rv32.gpio8_io_out_data[0] ),
  6892. .oe(\macro_inst|SIM_IO_12~1_combout ),
  6893. .outclk(gnd),
  6894. .outclkena(vcc),
  6895. .inclk(gnd),
  6896. .inclkena(vcc),
  6897. .areset(gnd),
  6898. .sreset(gnd),
  6899. .combout(\SIM_IO_12~input_o ),
  6900. .regout());
  6901. defparam \SIM_IO_12~output .coord_x = 19;
  6902. defparam \SIM_IO_12~output .coord_y = 13;
  6903. defparam \SIM_IO_12~output .coord_z = 1;
  6904. defparam \SIM_IO_12~output .IN_ASYNC_MODE = 1'b0;
  6905. defparam \SIM_IO_12~output .IN_SYNC_MODE = 1'b0;
  6906. defparam \SIM_IO_12~output .IN_POWERUP = 1'b0;
  6907. defparam \SIM_IO_12~output .OUT_REG_MODE = 1'b0;
  6908. defparam \SIM_IO_12~output .OUT_ASYNC_MODE = 1'b0;
  6909. defparam \SIM_IO_12~output .OUT_SYNC_MODE = 1'b0;
  6910. defparam \SIM_IO_12~output .OUT_POWERUP = 1'b0;
  6911. defparam \SIM_IO_12~output .OE_REG_MODE = 1'b0;
  6912. defparam \SIM_IO_12~output .OE_ASYNC_MODE = 1'b0;
  6913. defparam \SIM_IO_12~output .OE_SYNC_MODE = 1'b0;
  6914. defparam \SIM_IO_12~output .OE_POWERUP = 1'b0;
  6915. defparam \SIM_IO_12~output .CFG_TRI_INPUT = 1'b0;
  6916. defparam \SIM_IO_12~output .CFG_INPUT_EN = 1'b1;
  6917. defparam \SIM_IO_12~output .CFG_PULL_UP = 1'b1;
  6918. defparam \SIM_IO_12~output .CFG_SLR = 1'b0;
  6919. defparam \SIM_IO_12~output .CFG_OPEN_DRAIN = 1'b0;
  6920. defparam \SIM_IO_12~output .CFG_PDRCTRL = 4'b0100;
  6921. defparam \SIM_IO_12~output .CFG_KEEP = 2'b00;
  6922. defparam \SIM_IO_12~output .CFG_LVDS_OUT_EN = 1'b0;
  6923. defparam \SIM_IO_12~output .CFG_LVDS_SEL_CUA = 2'b00;
  6924. defparam \SIM_IO_12~output .CFG_LVDS_IREF = 10'b0110000000;
  6925. defparam \SIM_IO_12~output .CFG_LVDS_IN_EN = 1'b0;
  6926. defparam \SIM_IO_12~output .DPCLK_DELAY = 4'b0000;
  6927. defparam \SIM_IO_12~output .OUT_DELAY = 1'b0;
  6928. defparam \SIM_IO_12~output .IN_DATA_DELAY = 3'b000;
  6929. defparam \SIM_IO_12~output .IN_REG_DELAY = 3'b000;
  6930. alta_rio \SIM_IO_13~output (
  6931. .padio(SIM_IO_13),
  6932. .datain(\rv32.gpio8_io_out_data[2] ),
  6933. .oe(\macro_inst|SIM_IO_13~1_combout ),
  6934. .outclk(gnd),
  6935. .outclkena(vcc),
  6936. .inclk(gnd),
  6937. .inclkena(vcc),
  6938. .areset(gnd),
  6939. .sreset(gnd),
  6940. .combout(\SIM_IO_13~input_o ),
  6941. .regout());
  6942. defparam \SIM_IO_13~output .coord_x = 20;
  6943. defparam \SIM_IO_13~output .coord_y = 13;
  6944. defparam \SIM_IO_13~output .coord_z = 2;
  6945. defparam \SIM_IO_13~output .IN_ASYNC_MODE = 1'b0;
  6946. defparam \SIM_IO_13~output .IN_SYNC_MODE = 1'b0;
  6947. defparam \SIM_IO_13~output .IN_POWERUP = 1'b0;
  6948. defparam \SIM_IO_13~output .OUT_REG_MODE = 1'b0;
  6949. defparam \SIM_IO_13~output .OUT_ASYNC_MODE = 1'b0;
  6950. defparam \SIM_IO_13~output .OUT_SYNC_MODE = 1'b0;
  6951. defparam \SIM_IO_13~output .OUT_POWERUP = 1'b0;
  6952. defparam \SIM_IO_13~output .OE_REG_MODE = 1'b0;
  6953. defparam \SIM_IO_13~output .OE_ASYNC_MODE = 1'b0;
  6954. defparam \SIM_IO_13~output .OE_SYNC_MODE = 1'b0;
  6955. defparam \SIM_IO_13~output .OE_POWERUP = 1'b0;
  6956. defparam \SIM_IO_13~output .CFG_TRI_INPUT = 1'b0;
  6957. defparam \SIM_IO_13~output .CFG_INPUT_EN = 1'b1;
  6958. defparam \SIM_IO_13~output .CFG_PULL_UP = 1'b1;
  6959. defparam \SIM_IO_13~output .CFG_SLR = 1'b0;
  6960. defparam \SIM_IO_13~output .CFG_OPEN_DRAIN = 1'b0;
  6961. defparam \SIM_IO_13~output .CFG_PDRCTRL = 4'b0100;
  6962. defparam \SIM_IO_13~output .CFG_KEEP = 2'b00;
  6963. defparam \SIM_IO_13~output .CFG_LVDS_OUT_EN = 1'b0;
  6964. defparam \SIM_IO_13~output .CFG_LVDS_SEL_CUA = 2'b00;
  6965. defparam \SIM_IO_13~output .CFG_LVDS_IREF = 10'b0110000000;
  6966. defparam \SIM_IO_13~output .CFG_LVDS_IN_EN = 1'b0;
  6967. defparam \SIM_IO_13~output .DPCLK_DELAY = 4'b0000;
  6968. defparam \SIM_IO_13~output .OUT_DELAY = 1'b0;
  6969. defparam \SIM_IO_13~output .IN_DATA_DELAY = 3'b000;
  6970. defparam \SIM_IO_13~output .IN_REG_DELAY = 3'b000;
  6971. alta_rio \SIM_IO_15~output (
  6972. .padio(SIM_IO_15),
  6973. .datain(\rv32.gpio7_io_out_data[6] ),
  6974. .oe(\macro_inst|SIM_IO_15~1_combout ),
  6975. .outclk(gnd),
  6976. .outclkena(vcc),
  6977. .inclk(gnd),
  6978. .inclkena(vcc),
  6979. .areset(gnd),
  6980. .sreset(gnd),
  6981. .combout(\SIM_IO_15~input_o ),
  6982. .regout());
  6983. defparam \SIM_IO_15~output .coord_x = 22;
  6984. defparam \SIM_IO_15~output .coord_y = 1;
  6985. defparam \SIM_IO_15~output .coord_z = 0;
  6986. defparam \SIM_IO_15~output .IN_ASYNC_MODE = 1'b0;
  6987. defparam \SIM_IO_15~output .IN_SYNC_MODE = 1'b0;
  6988. defparam \SIM_IO_15~output .IN_POWERUP = 1'b0;
  6989. defparam \SIM_IO_15~output .OUT_REG_MODE = 1'b0;
  6990. defparam \SIM_IO_15~output .OUT_ASYNC_MODE = 1'b0;
  6991. defparam \SIM_IO_15~output .OUT_SYNC_MODE = 1'b0;
  6992. defparam \SIM_IO_15~output .OUT_POWERUP = 1'b0;
  6993. defparam \SIM_IO_15~output .OE_REG_MODE = 1'b0;
  6994. defparam \SIM_IO_15~output .OE_ASYNC_MODE = 1'b0;
  6995. defparam \SIM_IO_15~output .OE_SYNC_MODE = 1'b0;
  6996. defparam \SIM_IO_15~output .OE_POWERUP = 1'b0;
  6997. defparam \SIM_IO_15~output .CFG_TRI_INPUT = 1'b0;
  6998. defparam \SIM_IO_15~output .CFG_INPUT_EN = 1'b1;
  6999. defparam \SIM_IO_15~output .CFG_PULL_UP = 1'b1;
  7000. defparam \SIM_IO_15~output .CFG_SLR = 1'b0;
  7001. defparam \SIM_IO_15~output .CFG_OPEN_DRAIN = 1'b0;
  7002. defparam \SIM_IO_15~output .CFG_PDRCTRL = 4'b0100;
  7003. defparam \SIM_IO_15~output .CFG_KEEP = 2'b00;
  7004. defparam \SIM_IO_15~output .CFG_LVDS_OUT_EN = 1'b0;
  7005. defparam \SIM_IO_15~output .CFG_LVDS_SEL_CUA = 2'b00;
  7006. defparam \SIM_IO_15~output .CFG_LVDS_IREF = 10'b0110000000;
  7007. defparam \SIM_IO_15~output .CFG_LVDS_IN_EN = 1'b0;
  7008. defparam \SIM_IO_15~output .DPCLK_DELAY = 4'b0000;
  7009. defparam \SIM_IO_15~output .OUT_DELAY = 1'b0;
  7010. defparam \SIM_IO_15~output .IN_DATA_DELAY = 3'b000;
  7011. defparam \SIM_IO_15~output .IN_REG_DELAY = 3'b000;
  7012. alta_rio \UART3_UARTRXD~input (
  7013. .padio(UART3_UARTRXD),
  7014. .datain(gnd),
  7015. .oe(gnd),
  7016. .outclk(gnd),
  7017. .outclkena(vcc),
  7018. .inclk(gnd),
  7019. .inclkena(vcc),
  7020. .areset(gnd),
  7021. .sreset(gnd),
  7022. .combout(\UART3_UARTRXD~input_o ),
  7023. .regout());
  7024. defparam \UART3_UARTRXD~input .coord_x = 0;
  7025. defparam \UART3_UARTRXD~input .coord_y = 2;
  7026. defparam \UART3_UARTRXD~input .coord_z = 3;
  7027. defparam \UART3_UARTRXD~input .IN_ASYNC_MODE = 1'b0;
  7028. defparam \UART3_UARTRXD~input .IN_SYNC_MODE = 1'b0;
  7029. defparam \UART3_UARTRXD~input .IN_POWERUP = 1'b0;
  7030. defparam \UART3_UARTRXD~input .OUT_REG_MODE = 1'b0;
  7031. defparam \UART3_UARTRXD~input .OUT_ASYNC_MODE = 1'b0;
  7032. defparam \UART3_UARTRXD~input .OUT_SYNC_MODE = 1'b0;
  7033. defparam \UART3_UARTRXD~input .OUT_POWERUP = 1'b0;
  7034. defparam \UART3_UARTRXD~input .OE_REG_MODE = 1'b0;
  7035. defparam \UART3_UARTRXD~input .OE_ASYNC_MODE = 1'b0;
  7036. defparam \UART3_UARTRXD~input .OE_SYNC_MODE = 1'b0;
  7037. defparam \UART3_UARTRXD~input .OE_POWERUP = 1'b0;
  7038. defparam \UART3_UARTRXD~input .CFG_TRI_INPUT = 1'b0;
  7039. defparam \UART3_UARTRXD~input .CFG_INPUT_EN = 1'b1;
  7040. defparam \UART3_UARTRXD~input .CFG_PULL_UP = 1'b0;
  7041. defparam \UART3_UARTRXD~input .CFG_SLR = 1'b0;
  7042. defparam \UART3_UARTRXD~input .CFG_OPEN_DRAIN = 1'b0;
  7043. defparam \UART3_UARTRXD~input .CFG_PDRCTRL = 4'b0100;
  7044. defparam \UART3_UARTRXD~input .CFG_KEEP = 2'b00;
  7045. defparam \UART3_UARTRXD~input .CFG_LVDS_OUT_EN = 1'b0;
  7046. defparam \UART3_UARTRXD~input .CFG_LVDS_SEL_CUA = 2'b00;
  7047. defparam \UART3_UARTRXD~input .CFG_LVDS_IREF = 10'b0110000000;
  7048. defparam \UART3_UARTRXD~input .CFG_LVDS_IN_EN = 1'b0;
  7049. defparam \UART3_UARTRXD~input .DPCLK_DELAY = 4'b0000;
  7050. defparam \UART3_UARTRXD~input .OUT_DELAY = 1'b0;
  7051. defparam \UART3_UARTRXD~input .IN_DATA_DELAY = 3'b000;
  7052. defparam \UART3_UARTRXD~input .IN_REG_DELAY = 3'b000;
  7053. alta_rio \UART3_UARTTXD~output (
  7054. .padio(UART3_UARTTXD),
  7055. .datain(\rv32.gpio8_io_out_data[4] ),
  7056. .oe(\rv32.gpio8_io_out_en[4] ),
  7057. .outclk(gnd),
  7058. .outclkena(vcc),
  7059. .inclk(gnd),
  7060. .inclkena(vcc),
  7061. .areset(gnd),
  7062. .sreset(gnd),
  7063. .combout(),
  7064. .regout());
  7065. defparam \UART3_UARTTXD~output .coord_x = 0;
  7066. defparam \UART3_UARTTXD~output .coord_y = 2;
  7067. defparam \UART3_UARTTXD~output .coord_z = 4;
  7068. defparam \UART3_UARTTXD~output .IN_ASYNC_MODE = 1'b0;
  7069. defparam \UART3_UARTTXD~output .IN_SYNC_MODE = 1'b0;
  7070. defparam \UART3_UARTTXD~output .IN_POWERUP = 1'b0;
  7071. defparam \UART3_UARTTXD~output .OUT_REG_MODE = 1'b0;
  7072. defparam \UART3_UARTTXD~output .OUT_ASYNC_MODE = 1'b0;
  7073. defparam \UART3_UARTTXD~output .OUT_SYNC_MODE = 1'b0;
  7074. defparam \UART3_UARTTXD~output .OUT_POWERUP = 1'b0;
  7075. defparam \UART3_UARTTXD~output .OE_REG_MODE = 1'b0;
  7076. defparam \UART3_UARTTXD~output .OE_ASYNC_MODE = 1'b0;
  7077. defparam \UART3_UARTTXD~output .OE_SYNC_MODE = 1'b0;
  7078. defparam \UART3_UARTTXD~output .OE_POWERUP = 1'b0;
  7079. defparam \UART3_UARTTXD~output .CFG_TRI_INPUT = 1'b0;
  7080. defparam \UART3_UARTTXD~output .CFG_INPUT_EN = 1'b0;
  7081. defparam \UART3_UARTTXD~output .CFG_PULL_UP = 1'b0;
  7082. defparam \UART3_UARTTXD~output .CFG_SLR = 1'b0;
  7083. defparam \UART3_UARTTXD~output .CFG_OPEN_DRAIN = 1'b0;
  7084. defparam \UART3_UARTTXD~output .CFG_PDRCTRL = 4'b0100;
  7085. defparam \UART3_UARTTXD~output .CFG_KEEP = 2'b00;
  7086. defparam \UART3_UARTTXD~output .CFG_LVDS_OUT_EN = 1'b0;
  7087. defparam \UART3_UARTTXD~output .CFG_LVDS_SEL_CUA = 2'b00;
  7088. defparam \UART3_UARTTXD~output .CFG_LVDS_IREF = 10'b0110000000;
  7089. defparam \UART3_UARTTXD~output .CFG_LVDS_IN_EN = 1'b0;
  7090. defparam \UART3_UARTTXD~output .DPCLK_DELAY = 4'b0000;
  7091. defparam \UART3_UARTTXD~output .OUT_DELAY = 1'b0;
  7092. defparam \UART3_UARTTXD~output .IN_DATA_DELAY = 3'b000;
  7093. defparam \UART3_UARTTXD~output .IN_REG_DELAY = 3'b000;
  7094. alta_rio \UART4_UARTRXD~input (
  7095. .padio(UART4_UARTRXD),
  7096. .datain(gnd),
  7097. .oe(gnd),
  7098. .outclk(gnd),
  7099. .outclkena(vcc),
  7100. .inclk(gnd),
  7101. .inclkena(vcc),
  7102. .areset(gnd),
  7103. .sreset(gnd),
  7104. .combout(\UART4_UARTRXD~input_o ),
  7105. .regout());
  7106. defparam \UART4_UARTRXD~input .coord_x = 17;
  7107. defparam \UART4_UARTRXD~input .coord_y = 13;
  7108. defparam \UART4_UARTRXD~input .coord_z = 1;
  7109. defparam \UART4_UARTRXD~input .IN_ASYNC_MODE = 1'b0;
  7110. defparam \UART4_UARTRXD~input .IN_SYNC_MODE = 1'b0;
  7111. defparam \UART4_UARTRXD~input .IN_POWERUP = 1'b0;
  7112. defparam \UART4_UARTRXD~input .OUT_REG_MODE = 1'b0;
  7113. defparam \UART4_UARTRXD~input .OUT_ASYNC_MODE = 1'b0;
  7114. defparam \UART4_UARTRXD~input .OUT_SYNC_MODE = 1'b0;
  7115. defparam \UART4_UARTRXD~input .OUT_POWERUP = 1'b0;
  7116. defparam \UART4_UARTRXD~input .OE_REG_MODE = 1'b0;
  7117. defparam \UART4_UARTRXD~input .OE_ASYNC_MODE = 1'b0;
  7118. defparam \UART4_UARTRXD~input .OE_SYNC_MODE = 1'b0;
  7119. defparam \UART4_UARTRXD~input .OE_POWERUP = 1'b0;
  7120. defparam \UART4_UARTRXD~input .CFG_TRI_INPUT = 1'b0;
  7121. defparam \UART4_UARTRXD~input .CFG_INPUT_EN = 1'b1;
  7122. defparam \UART4_UARTRXD~input .CFG_PULL_UP = 1'b0;
  7123. defparam \UART4_UARTRXD~input .CFG_SLR = 1'b0;
  7124. defparam \UART4_UARTRXD~input .CFG_OPEN_DRAIN = 1'b0;
  7125. defparam \UART4_UARTRXD~input .CFG_PDRCTRL = 4'b0100;
  7126. defparam \UART4_UARTRXD~input .CFG_KEEP = 2'b00;
  7127. defparam \UART4_UARTRXD~input .CFG_LVDS_OUT_EN = 1'b0;
  7128. defparam \UART4_UARTRXD~input .CFG_LVDS_SEL_CUA = 2'b00;
  7129. defparam \UART4_UARTRXD~input .CFG_LVDS_IREF = 10'b0110000000;
  7130. defparam \UART4_UARTRXD~input .CFG_LVDS_IN_EN = 1'b0;
  7131. defparam \UART4_UARTRXD~input .DPCLK_DELAY = 4'b0000;
  7132. defparam \UART4_UARTRXD~input .OUT_DELAY = 1'b0;
  7133. defparam \UART4_UARTRXD~input .IN_DATA_DELAY = 3'b000;
  7134. defparam \UART4_UARTRXD~input .IN_REG_DELAY = 3'b000;
  7135. alta_rio \UART4_UARTTXD~output (
  7136. .padio(UART4_UARTTXD),
  7137. .datain(\rv32.gpio8_io_out_data[6] ),
  7138. .oe(\rv32.gpio8_io_out_en[6] ),
  7139. .outclk(gnd),
  7140. .outclkena(vcc),
  7141. .inclk(gnd),
  7142. .inclkena(vcc),
  7143. .areset(gnd),
  7144. .sreset(gnd),
  7145. .combout(),
  7146. .regout());
  7147. defparam \UART4_UARTTXD~output .coord_x = 17;
  7148. defparam \UART4_UARTTXD~output .coord_y = 13;
  7149. defparam \UART4_UARTTXD~output .coord_z = 3;
  7150. defparam \UART4_UARTTXD~output .IN_ASYNC_MODE = 1'b0;
  7151. defparam \UART4_UARTTXD~output .IN_SYNC_MODE = 1'b0;
  7152. defparam \UART4_UARTTXD~output .IN_POWERUP = 1'b0;
  7153. defparam \UART4_UARTTXD~output .OUT_REG_MODE = 1'b0;
  7154. defparam \UART4_UARTTXD~output .OUT_ASYNC_MODE = 1'b0;
  7155. defparam \UART4_UARTTXD~output .OUT_SYNC_MODE = 1'b0;
  7156. defparam \UART4_UARTTXD~output .OUT_POWERUP = 1'b0;
  7157. defparam \UART4_UARTTXD~output .OE_REG_MODE = 1'b0;
  7158. defparam \UART4_UARTTXD~output .OE_ASYNC_MODE = 1'b0;
  7159. defparam \UART4_UARTTXD~output .OE_SYNC_MODE = 1'b0;
  7160. defparam \UART4_UARTTXD~output .OE_POWERUP = 1'b0;
  7161. defparam \UART4_UARTTXD~output .CFG_TRI_INPUT = 1'b0;
  7162. defparam \UART4_UARTTXD~output .CFG_INPUT_EN = 1'b0;
  7163. defparam \UART4_UARTTXD~output .CFG_PULL_UP = 1'b0;
  7164. defparam \UART4_UARTTXD~output .CFG_SLR = 1'b0;
  7165. defparam \UART4_UARTTXD~output .CFG_OPEN_DRAIN = 1'b0;
  7166. defparam \UART4_UARTTXD~output .CFG_PDRCTRL = 4'b0100;
  7167. defparam \UART4_UARTTXD~output .CFG_KEEP = 2'b00;
  7168. defparam \UART4_UARTTXD~output .CFG_LVDS_OUT_EN = 1'b0;
  7169. defparam \UART4_UARTTXD~output .CFG_LVDS_SEL_CUA = 2'b00;
  7170. defparam \UART4_UARTTXD~output .CFG_LVDS_IREF = 10'b0110000000;
  7171. defparam \UART4_UARTTXD~output .CFG_LVDS_IN_EN = 1'b0;
  7172. defparam \UART4_UARTTXD~output .DPCLK_DELAY = 4'b0000;
  7173. defparam \UART4_UARTTXD~output .OUT_DELAY = 1'b0;
  7174. defparam \UART4_UARTTXD~output .IN_DATA_DELAY = 3'b000;
  7175. defparam \UART4_UARTTXD~output .IN_REG_DELAY = 3'b000;
  7176. alta_asyncctrl asyncreset_ctrl_X43_Y1_N0(
  7177. .Din(),
  7178. .Dout(AsyncReset_X43_Y1_GND));
  7179. defparam asyncreset_ctrl_X43_Y1_N0.coord_x = 5;
  7180. defparam asyncreset_ctrl_X43_Y1_N0.coord_y = 1;
  7181. defparam asyncreset_ctrl_X43_Y1_N0.coord_z = 0;
  7182. defparam asyncreset_ctrl_X43_Y1_N0.AsyncCtrlMux = 2'b00;
  7183. alta_asyncctrl asyncreset_ctrl_X43_Y1_N1(
  7184. .Din(\sys_resetn~clkctrl_outclk ),
  7185. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ));
  7186. defparam asyncreset_ctrl_X43_Y1_N1.coord_x = 5;
  7187. defparam asyncreset_ctrl_X43_Y1_N1.coord_y = 1;
  7188. defparam asyncreset_ctrl_X43_Y1_N1.coord_z = 1;
  7189. defparam asyncreset_ctrl_X43_Y1_N1.AsyncCtrlMux = 2'b10;
  7190. alta_asyncctrl asyncreset_ctrl_X43_Y2_N0(
  7191. .Din(\sys_resetn~clkctrl_outclk ),
  7192. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ));
  7193. defparam asyncreset_ctrl_X43_Y2_N0.coord_x = 2;
  7194. defparam asyncreset_ctrl_X43_Y2_N0.coord_y = 2;
  7195. defparam asyncreset_ctrl_X43_Y2_N0.coord_z = 0;
  7196. defparam asyncreset_ctrl_X43_Y2_N0.AsyncCtrlMux = 2'b10;
  7197. alta_asyncctrl asyncreset_ctrl_X43_Y3_N0(
  7198. .Din(),
  7199. .Dout(AsyncReset_X43_Y3_GND));
  7200. defparam asyncreset_ctrl_X43_Y3_N0.coord_x = 1;
  7201. defparam asyncreset_ctrl_X43_Y3_N0.coord_y = 1;
  7202. defparam asyncreset_ctrl_X43_Y3_N0.coord_z = 0;
  7203. defparam asyncreset_ctrl_X43_Y3_N0.AsyncCtrlMux = 2'b00;
  7204. alta_asyncctrl asyncreset_ctrl_X43_Y3_N1(
  7205. .Din(\sys_resetn~clkctrl_outclk ),
  7206. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ));
  7207. defparam asyncreset_ctrl_X43_Y3_N1.coord_x = 1;
  7208. defparam asyncreset_ctrl_X43_Y3_N1.coord_y = 1;
  7209. defparam asyncreset_ctrl_X43_Y3_N1.coord_z = 1;
  7210. defparam asyncreset_ctrl_X43_Y3_N1.AsyncCtrlMux = 2'b10;
  7211. alta_asyncctrl asyncreset_ctrl_X43_Y4_N0(
  7212. .Din(\sys_resetn~clkctrl_outclk ),
  7213. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ));
  7214. defparam asyncreset_ctrl_X43_Y4_N0.coord_x = 20;
  7215. defparam asyncreset_ctrl_X43_Y4_N0.coord_y = 2;
  7216. defparam asyncreset_ctrl_X43_Y4_N0.coord_z = 0;
  7217. defparam asyncreset_ctrl_X43_Y4_N0.AsyncCtrlMux = 2'b10;
  7218. alta_asyncctrl asyncreset_ctrl_X44_Y1_N0(
  7219. .Din(),
  7220. .Dout(AsyncReset_X44_Y1_GND));
  7221. defparam asyncreset_ctrl_X44_Y1_N0.coord_x = 4;
  7222. defparam asyncreset_ctrl_X44_Y1_N0.coord_y = 1;
  7223. defparam asyncreset_ctrl_X44_Y1_N0.coord_z = 0;
  7224. defparam asyncreset_ctrl_X44_Y1_N0.AsyncCtrlMux = 2'b00;
  7225. alta_asyncctrl asyncreset_ctrl_X44_Y1_N1(
  7226. .Din(\sys_resetn~clkctrl_outclk ),
  7227. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ));
  7228. defparam asyncreset_ctrl_X44_Y1_N1.coord_x = 4;
  7229. defparam asyncreset_ctrl_X44_Y1_N1.coord_y = 1;
  7230. defparam asyncreset_ctrl_X44_Y1_N1.coord_z = 1;
  7231. defparam asyncreset_ctrl_X44_Y1_N1.AsyncCtrlMux = 2'b10;
  7232. alta_asyncctrl asyncreset_ctrl_X44_Y2_N0(
  7233. .Din(),
  7234. .Dout(AsyncReset_X44_Y2_GND));
  7235. defparam asyncreset_ctrl_X44_Y2_N0.coord_x = 3;
  7236. defparam asyncreset_ctrl_X44_Y2_N0.coord_y = 2;
  7237. defparam asyncreset_ctrl_X44_Y2_N0.coord_z = 0;
  7238. defparam asyncreset_ctrl_X44_Y2_N0.AsyncCtrlMux = 2'b00;
  7239. alta_asyncctrl asyncreset_ctrl_X44_Y3_N0(
  7240. .Din(\sys_resetn~clkctrl_outclk ),
  7241. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ));
  7242. defparam asyncreset_ctrl_X44_Y3_N0.coord_x = 3;
  7243. defparam asyncreset_ctrl_X44_Y3_N0.coord_y = 1;
  7244. defparam asyncreset_ctrl_X44_Y3_N0.coord_z = 0;
  7245. defparam asyncreset_ctrl_X44_Y3_N0.AsyncCtrlMux = 2'b10;
  7246. alta_asyncctrl asyncreset_ctrl_X44_Y3_N1(
  7247. .Din(),
  7248. .Dout(AsyncReset_X44_Y3_GND));
  7249. defparam asyncreset_ctrl_X44_Y3_N1.coord_x = 3;
  7250. defparam asyncreset_ctrl_X44_Y3_N1.coord_y = 1;
  7251. defparam asyncreset_ctrl_X44_Y3_N1.coord_z = 1;
  7252. defparam asyncreset_ctrl_X44_Y3_N1.AsyncCtrlMux = 2'b00;
  7253. alta_asyncctrl asyncreset_ctrl_X44_Y4_N0(
  7254. .Din(),
  7255. .Dout(AsyncReset_X44_Y4_GND));
  7256. defparam asyncreset_ctrl_X44_Y4_N0.coord_x = 1;
  7257. defparam asyncreset_ctrl_X44_Y4_N0.coord_y = 2;
  7258. defparam asyncreset_ctrl_X44_Y4_N0.coord_z = 0;
  7259. defparam asyncreset_ctrl_X44_Y4_N0.AsyncCtrlMux = 2'b00;
  7260. alta_asyncctrl asyncreset_ctrl_X45_Y1_N0(
  7261. .Din(),
  7262. .Dout(AsyncReset_X45_Y1_GND));
  7263. defparam asyncreset_ctrl_X45_Y1_N0.coord_x = 4;
  7264. defparam asyncreset_ctrl_X45_Y1_N0.coord_y = 3;
  7265. defparam asyncreset_ctrl_X45_Y1_N0.coord_z = 0;
  7266. defparam asyncreset_ctrl_X45_Y1_N0.AsyncCtrlMux = 2'b00;
  7267. alta_asyncctrl asyncreset_ctrl_X45_Y1_N1(
  7268. .Din(\sys_resetn~clkctrl_outclk ),
  7269. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ));
  7270. defparam asyncreset_ctrl_X45_Y1_N1.coord_x = 4;
  7271. defparam asyncreset_ctrl_X45_Y1_N1.coord_y = 3;
  7272. defparam asyncreset_ctrl_X45_Y1_N1.coord_z = 1;
  7273. defparam asyncreset_ctrl_X45_Y1_N1.AsyncCtrlMux = 2'b10;
  7274. alta_asyncctrl asyncreset_ctrl_X45_Y2_N0(
  7275. .Din(\sys_resetn~clkctrl_outclk ),
  7276. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ));
  7277. defparam asyncreset_ctrl_X45_Y2_N0.coord_x = 4;
  7278. defparam asyncreset_ctrl_X45_Y2_N0.coord_y = 2;
  7279. defparam asyncreset_ctrl_X45_Y2_N0.coord_z = 0;
  7280. defparam asyncreset_ctrl_X45_Y2_N0.AsyncCtrlMux = 2'b10;
  7281. alta_asyncctrl asyncreset_ctrl_X45_Y2_N1(
  7282. .Din(),
  7283. .Dout(AsyncReset_X45_Y2_GND));
  7284. defparam asyncreset_ctrl_X45_Y2_N1.coord_x = 4;
  7285. defparam asyncreset_ctrl_X45_Y2_N1.coord_y = 2;
  7286. defparam asyncreset_ctrl_X45_Y2_N1.coord_z = 1;
  7287. defparam asyncreset_ctrl_X45_Y2_N1.AsyncCtrlMux = 2'b00;
  7288. alta_asyncctrl asyncreset_ctrl_X45_Y3_N0(
  7289. .Din(\sys_resetn~clkctrl_outclk ),
  7290. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ));
  7291. defparam asyncreset_ctrl_X45_Y3_N0.coord_x = 2;
  7292. defparam asyncreset_ctrl_X45_Y3_N0.coord_y = 1;
  7293. defparam asyncreset_ctrl_X45_Y3_N0.coord_z = 0;
  7294. defparam asyncreset_ctrl_X45_Y3_N0.AsyncCtrlMux = 2'b10;
  7295. alta_asyncctrl asyncreset_ctrl_X45_Y4_N0(
  7296. .Din(\sys_resetn~clkctrl_outclk ),
  7297. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y4_SIG ));
  7298. defparam asyncreset_ctrl_X45_Y4_N0.coord_x = 9;
  7299. defparam asyncreset_ctrl_X45_Y4_N0.coord_y = 4;
  7300. defparam asyncreset_ctrl_X45_Y4_N0.coord_z = 0;
  7301. defparam asyncreset_ctrl_X45_Y4_N0.AsyncCtrlMux = 2'b10;
  7302. alta_asyncctrl asyncreset_ctrl_X46_Y1_N0(
  7303. .Din(\sys_resetn~clkctrl_outclk ),
  7304. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ));
  7305. defparam asyncreset_ctrl_X46_Y1_N0.coord_x = 3;
  7306. defparam asyncreset_ctrl_X46_Y1_N0.coord_y = 3;
  7307. defparam asyncreset_ctrl_X46_Y1_N0.coord_z = 0;
  7308. defparam asyncreset_ctrl_X46_Y1_N0.AsyncCtrlMux = 2'b10;
  7309. alta_asyncctrl asyncreset_ctrl_X46_Y1_N1(
  7310. .Din(),
  7311. .Dout(AsyncReset_X46_Y1_GND));
  7312. defparam asyncreset_ctrl_X46_Y1_N1.coord_x = 3;
  7313. defparam asyncreset_ctrl_X46_Y1_N1.coord_y = 3;
  7314. defparam asyncreset_ctrl_X46_Y1_N1.coord_z = 1;
  7315. defparam asyncreset_ctrl_X46_Y1_N1.AsyncCtrlMux = 2'b00;
  7316. alta_asyncctrl asyncreset_ctrl_X46_Y2_N0(
  7317. .Din(),
  7318. .Dout(AsyncReset_X46_Y2_GND));
  7319. defparam asyncreset_ctrl_X46_Y2_N0.coord_x = 7;
  7320. defparam asyncreset_ctrl_X46_Y2_N0.coord_y = 2;
  7321. defparam asyncreset_ctrl_X46_Y2_N0.coord_z = 0;
  7322. defparam asyncreset_ctrl_X46_Y2_N0.AsyncCtrlMux = 2'b00;
  7323. alta_asyncctrl asyncreset_ctrl_X46_Y2_N1(
  7324. .Din(\sys_resetn~clkctrl_outclk ),
  7325. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y2_SIG ));
  7326. defparam asyncreset_ctrl_X46_Y2_N1.coord_x = 7;
  7327. defparam asyncreset_ctrl_X46_Y2_N1.coord_y = 2;
  7328. defparam asyncreset_ctrl_X46_Y2_N1.coord_z = 1;
  7329. defparam asyncreset_ctrl_X46_Y2_N1.AsyncCtrlMux = 2'b10;
  7330. alta_asyncctrl asyncreset_ctrl_X46_Y3_N0(
  7331. .Din(\sys_resetn~clkctrl_outclk ),
  7332. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ));
  7333. defparam asyncreset_ctrl_X46_Y3_N0.coord_x = 6;
  7334. defparam asyncreset_ctrl_X46_Y3_N0.coord_y = 3;
  7335. defparam asyncreset_ctrl_X46_Y3_N0.coord_z = 0;
  7336. defparam asyncreset_ctrl_X46_Y3_N0.AsyncCtrlMux = 2'b10;
  7337. alta_asyncctrl asyncreset_ctrl_X46_Y3_N1(
  7338. .Din(),
  7339. .Dout(AsyncReset_X46_Y3_GND));
  7340. defparam asyncreset_ctrl_X46_Y3_N1.coord_x = 6;
  7341. defparam asyncreset_ctrl_X46_Y3_N1.coord_y = 3;
  7342. defparam asyncreset_ctrl_X46_Y3_N1.coord_z = 1;
  7343. defparam asyncreset_ctrl_X46_Y3_N1.AsyncCtrlMux = 2'b00;
  7344. alta_asyncctrl asyncreset_ctrl_X46_Y4_N0(
  7345. .Din(\sys_resetn~clkctrl_outclk ),
  7346. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ));
  7347. defparam asyncreset_ctrl_X46_Y4_N0.coord_x = 17;
  7348. defparam asyncreset_ctrl_X46_Y4_N0.coord_y = 2;
  7349. defparam asyncreset_ctrl_X46_Y4_N0.coord_z = 0;
  7350. defparam asyncreset_ctrl_X46_Y4_N0.AsyncCtrlMux = 2'b10;
  7351. alta_asyncctrl asyncreset_ctrl_X47_Y1_N0(
  7352. .Din(),
  7353. .Dout(AsyncReset_X47_Y1_GND));
  7354. defparam asyncreset_ctrl_X47_Y1_N0.coord_x = 2;
  7355. defparam asyncreset_ctrl_X47_Y1_N0.coord_y = 4;
  7356. defparam asyncreset_ctrl_X47_Y1_N0.coord_z = 0;
  7357. defparam asyncreset_ctrl_X47_Y1_N0.AsyncCtrlMux = 2'b00;
  7358. alta_asyncctrl asyncreset_ctrl_X47_Y1_N1(
  7359. .Din(\sys_resetn~clkctrl_outclk ),
  7360. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ));
  7361. defparam asyncreset_ctrl_X47_Y1_N1.coord_x = 2;
  7362. defparam asyncreset_ctrl_X47_Y1_N1.coord_y = 4;
  7363. defparam asyncreset_ctrl_X47_Y1_N1.coord_z = 1;
  7364. defparam asyncreset_ctrl_X47_Y1_N1.AsyncCtrlMux = 2'b10;
  7365. alta_asyncctrl asyncreset_ctrl_X47_Y2_N0(
  7366. .Din(),
  7367. .Dout(AsyncReset_X47_Y2_GND));
  7368. defparam asyncreset_ctrl_X47_Y2_N0.coord_x = 4;
  7369. defparam asyncreset_ctrl_X47_Y2_N0.coord_y = 4;
  7370. defparam asyncreset_ctrl_X47_Y2_N0.coord_z = 0;
  7371. defparam asyncreset_ctrl_X47_Y2_N0.AsyncCtrlMux = 2'b00;
  7372. alta_asyncctrl asyncreset_ctrl_X47_Y3_N0(
  7373. .Din(),
  7374. .Dout(AsyncReset_X47_Y3_GND));
  7375. defparam asyncreset_ctrl_X47_Y3_N0.coord_x = 7;
  7376. defparam asyncreset_ctrl_X47_Y3_N0.coord_y = 3;
  7377. defparam asyncreset_ctrl_X47_Y3_N0.coord_z = 0;
  7378. defparam asyncreset_ctrl_X47_Y3_N0.AsyncCtrlMux = 2'b00;
  7379. alta_asyncctrl asyncreset_ctrl_X47_Y3_N1(
  7380. .Din(\sys_resetn~clkctrl_outclk ),
  7381. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ));
  7382. defparam asyncreset_ctrl_X47_Y3_N1.coord_x = 7;
  7383. defparam asyncreset_ctrl_X47_Y3_N1.coord_y = 3;
  7384. defparam asyncreset_ctrl_X47_Y3_N1.coord_z = 1;
  7385. defparam asyncreset_ctrl_X47_Y3_N1.AsyncCtrlMux = 2'b10;
  7386. alta_asyncctrl asyncreset_ctrl_X47_Y4_N0(
  7387. .Din(\sys_resetn~clkctrl_outclk ),
  7388. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y4_SIG ));
  7389. defparam asyncreset_ctrl_X47_Y4_N0.coord_x = 10;
  7390. defparam asyncreset_ctrl_X47_Y4_N0.coord_y = 4;
  7391. defparam asyncreset_ctrl_X47_Y4_N0.coord_z = 0;
  7392. defparam asyncreset_ctrl_X47_Y4_N0.AsyncCtrlMux = 2'b10;
  7393. alta_asyncctrl asyncreset_ctrl_X47_Y4_N1(
  7394. .Din(),
  7395. .Dout(AsyncReset_X47_Y4_GND));
  7396. defparam asyncreset_ctrl_X47_Y4_N1.coord_x = 10;
  7397. defparam asyncreset_ctrl_X47_Y4_N1.coord_y = 4;
  7398. defparam asyncreset_ctrl_X47_Y4_N1.coord_z = 1;
  7399. defparam asyncreset_ctrl_X47_Y4_N1.AsyncCtrlMux = 2'b00;
  7400. alta_asyncctrl asyncreset_ctrl_X48_Y1_N0(
  7401. .Din(\sys_resetn~clkctrl_outclk ),
  7402. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ));
  7403. defparam asyncreset_ctrl_X48_Y1_N0.coord_x = 3;
  7404. defparam asyncreset_ctrl_X48_Y1_N0.coord_y = 4;
  7405. defparam asyncreset_ctrl_X48_Y1_N0.coord_z = 0;
  7406. defparam asyncreset_ctrl_X48_Y1_N0.AsyncCtrlMux = 2'b10;
  7407. alta_asyncctrl asyncreset_ctrl_X48_Y2_N0(
  7408. .Din(\sys_resetn~clkctrl_outclk ),
  7409. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ));
  7410. defparam asyncreset_ctrl_X48_Y2_N0.coord_x = 6;
  7411. defparam asyncreset_ctrl_X48_Y2_N0.coord_y = 4;
  7412. defparam asyncreset_ctrl_X48_Y2_N0.coord_z = 0;
  7413. defparam asyncreset_ctrl_X48_Y2_N0.AsyncCtrlMux = 2'b10;
  7414. alta_asyncctrl asyncreset_ctrl_X48_Y2_N1(
  7415. .Din(),
  7416. .Dout(AsyncReset_X48_Y2_GND));
  7417. defparam asyncreset_ctrl_X48_Y2_N1.coord_x = 6;
  7418. defparam asyncreset_ctrl_X48_Y2_N1.coord_y = 4;
  7419. defparam asyncreset_ctrl_X48_Y2_N1.coord_z = 1;
  7420. defparam asyncreset_ctrl_X48_Y2_N1.AsyncCtrlMux = 2'b00;
  7421. alta_asyncctrl asyncreset_ctrl_X48_Y3_N0(
  7422. .Din(\sys_resetn~clkctrl_outclk ),
  7423. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y3_SIG ));
  7424. defparam asyncreset_ctrl_X48_Y3_N0.coord_x = 5;
  7425. defparam asyncreset_ctrl_X48_Y3_N0.coord_y = 2;
  7426. defparam asyncreset_ctrl_X48_Y3_N0.coord_z = 0;
  7427. defparam asyncreset_ctrl_X48_Y3_N0.AsyncCtrlMux = 2'b10;
  7428. alta_asyncctrl asyncreset_ctrl_X48_Y4_N0(
  7429. .Din(),
  7430. .Dout(AsyncReset_X48_Y4_GND));
  7431. defparam asyncreset_ctrl_X48_Y4_N0.coord_x = 1;
  7432. defparam asyncreset_ctrl_X48_Y4_N0.coord_y = 3;
  7433. defparam asyncreset_ctrl_X48_Y4_N0.coord_z = 0;
  7434. defparam asyncreset_ctrl_X48_Y4_N0.AsyncCtrlMux = 2'b00;
  7435. alta_asyncctrl asyncreset_ctrl_X48_Y4_N1(
  7436. .Din(\sys_resetn~clkctrl_outclk ),
  7437. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y4_SIG ));
  7438. defparam asyncreset_ctrl_X48_Y4_N1.coord_x = 1;
  7439. defparam asyncreset_ctrl_X48_Y4_N1.coord_y = 3;
  7440. defparam asyncreset_ctrl_X48_Y4_N1.coord_z = 1;
  7441. defparam asyncreset_ctrl_X48_Y4_N1.AsyncCtrlMux = 2'b10;
  7442. alta_asyncctrl asyncreset_ctrl_X49_Y1_N0(
  7443. .Din(),
  7444. .Dout(AsyncReset_X49_Y1_GND));
  7445. defparam asyncreset_ctrl_X49_Y1_N0.coord_x = 6;
  7446. defparam asyncreset_ctrl_X49_Y1_N0.coord_y = 1;
  7447. defparam asyncreset_ctrl_X49_Y1_N0.coord_z = 0;
  7448. defparam asyncreset_ctrl_X49_Y1_N0.AsyncCtrlMux = 2'b00;
  7449. alta_asyncctrl asyncreset_ctrl_X49_Y1_N1(
  7450. .Din(\sys_resetn~clkctrl_outclk ),
  7451. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ));
  7452. defparam asyncreset_ctrl_X49_Y1_N1.coord_x = 6;
  7453. defparam asyncreset_ctrl_X49_Y1_N1.coord_y = 1;
  7454. defparam asyncreset_ctrl_X49_Y1_N1.coord_z = 1;
  7455. defparam asyncreset_ctrl_X49_Y1_N1.AsyncCtrlMux = 2'b10;
  7456. alta_asyncctrl asyncreset_ctrl_X49_Y2_N0(
  7457. .Din(\sys_resetn~clkctrl_outclk ),
  7458. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ));
  7459. defparam asyncreset_ctrl_X49_Y2_N0.coord_x = 7;
  7460. defparam asyncreset_ctrl_X49_Y2_N0.coord_y = 4;
  7461. defparam asyncreset_ctrl_X49_Y2_N0.coord_z = 0;
  7462. defparam asyncreset_ctrl_X49_Y2_N0.AsyncCtrlMux = 2'b10;
  7463. alta_asyncctrl asyncreset_ctrl_X49_Y3_N0(
  7464. .Din(\sys_resetn~clkctrl_outclk ),
  7465. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ));
  7466. defparam asyncreset_ctrl_X49_Y3_N0.coord_x = 6;
  7467. defparam asyncreset_ctrl_X49_Y3_N0.coord_y = 2;
  7468. defparam asyncreset_ctrl_X49_Y3_N0.coord_z = 0;
  7469. defparam asyncreset_ctrl_X49_Y3_N0.AsyncCtrlMux = 2'b10;
  7470. alta_asyncctrl asyncreset_ctrl_X49_Y4_N0(
  7471. .Din(),
  7472. .Dout(AsyncReset_X49_Y4_GND));
  7473. defparam asyncreset_ctrl_X49_Y4_N0.coord_x = 1;
  7474. defparam asyncreset_ctrl_X49_Y4_N0.coord_y = 4;
  7475. defparam asyncreset_ctrl_X49_Y4_N0.coord_z = 0;
  7476. defparam asyncreset_ctrl_X49_Y4_N0.AsyncCtrlMux = 2'b00;
  7477. alta_asyncctrl asyncreset_ctrl_X50_Y1_N0(
  7478. .Din(\sys_resetn~clkctrl_outclk ),
  7479. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ));
  7480. defparam asyncreset_ctrl_X50_Y1_N0.coord_x = 7;
  7481. defparam asyncreset_ctrl_X50_Y1_N0.coord_y = 1;
  7482. defparam asyncreset_ctrl_X50_Y1_N0.coord_z = 0;
  7483. defparam asyncreset_ctrl_X50_Y1_N0.AsyncCtrlMux = 2'b10;
  7484. alta_asyncctrl asyncreset_ctrl_X50_Y1_N1(
  7485. .Din(),
  7486. .Dout(AsyncReset_X50_Y1_GND));
  7487. defparam asyncreset_ctrl_X50_Y1_N1.coord_x = 7;
  7488. defparam asyncreset_ctrl_X50_Y1_N1.coord_y = 1;
  7489. defparam asyncreset_ctrl_X50_Y1_N1.coord_z = 1;
  7490. defparam asyncreset_ctrl_X50_Y1_N1.AsyncCtrlMux = 2'b00;
  7491. alta_asyncctrl asyncreset_ctrl_X50_Y2_N0(
  7492. .Din(\sys_resetn~clkctrl_outclk ),
  7493. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ));
  7494. defparam asyncreset_ctrl_X50_Y2_N0.coord_x = 14;
  7495. defparam asyncreset_ctrl_X50_Y2_N0.coord_y = 4;
  7496. defparam asyncreset_ctrl_X50_Y2_N0.coord_z = 0;
  7497. defparam asyncreset_ctrl_X50_Y2_N0.AsyncCtrlMux = 2'b10;
  7498. alta_asyncctrl asyncreset_ctrl_X50_Y2_N1(
  7499. .Din(),
  7500. .Dout(AsyncReset_X50_Y2_GND));
  7501. defparam asyncreset_ctrl_X50_Y2_N1.coord_x = 14;
  7502. defparam asyncreset_ctrl_X50_Y2_N1.coord_y = 4;
  7503. defparam asyncreset_ctrl_X50_Y2_N1.coord_z = 1;
  7504. defparam asyncreset_ctrl_X50_Y2_N1.AsyncCtrlMux = 2'b00;
  7505. alta_asyncctrl asyncreset_ctrl_X50_Y3_N0(
  7506. .Din(),
  7507. .Dout(AsyncReset_X50_Y3_GND));
  7508. defparam asyncreset_ctrl_X50_Y3_N0.coord_x = 16;
  7509. defparam asyncreset_ctrl_X50_Y3_N0.coord_y = 12;
  7510. defparam asyncreset_ctrl_X50_Y3_N0.coord_z = 0;
  7511. defparam asyncreset_ctrl_X50_Y3_N0.AsyncCtrlMux = 2'b00;
  7512. alta_asyncctrl asyncreset_ctrl_X50_Y3_N1(
  7513. .Din(\sys_resetn~clkctrl_outclk ),
  7514. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ));
  7515. defparam asyncreset_ctrl_X50_Y3_N1.coord_x = 16;
  7516. defparam asyncreset_ctrl_X50_Y3_N1.coord_y = 12;
  7517. defparam asyncreset_ctrl_X50_Y3_N1.coord_z = 1;
  7518. defparam asyncreset_ctrl_X50_Y3_N1.AsyncCtrlMux = 2'b10;
  7519. alta_asyncctrl asyncreset_ctrl_X50_Y4_N0(
  7520. .Din(\sys_resetn~clkctrl_outclk ),
  7521. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y4_SIG ));
  7522. defparam asyncreset_ctrl_X50_Y4_N0.coord_x = 8;
  7523. defparam asyncreset_ctrl_X50_Y4_N0.coord_y = 4;
  7524. defparam asyncreset_ctrl_X50_Y4_N0.coord_z = 0;
  7525. defparam asyncreset_ctrl_X50_Y4_N0.AsyncCtrlMux = 2'b10;
  7526. alta_asyncctrl asyncreset_ctrl_X51_Y1_N0(
  7527. .Din(),
  7528. .Dout(AsyncReset_X51_Y1_GND));
  7529. defparam asyncreset_ctrl_X51_Y1_N0.coord_x = 5;
  7530. defparam asyncreset_ctrl_X51_Y1_N0.coord_y = 4;
  7531. defparam asyncreset_ctrl_X51_Y1_N0.coord_z = 0;
  7532. defparam asyncreset_ctrl_X51_Y1_N0.AsyncCtrlMux = 2'b00;
  7533. alta_asyncctrl asyncreset_ctrl_X51_Y1_N1(
  7534. .Din(\sys_resetn~clkctrl_outclk ),
  7535. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ));
  7536. defparam asyncreset_ctrl_X51_Y1_N1.coord_x = 5;
  7537. defparam asyncreset_ctrl_X51_Y1_N1.coord_y = 4;
  7538. defparam asyncreset_ctrl_X51_Y1_N1.coord_z = 1;
  7539. defparam asyncreset_ctrl_X51_Y1_N1.AsyncCtrlMux = 2'b10;
  7540. alta_asyncctrl asyncreset_ctrl_X51_Y2_N0(
  7541. .Din(\sys_resetn~clkctrl_outclk ),
  7542. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ));
  7543. defparam asyncreset_ctrl_X51_Y2_N0.coord_x = 8;
  7544. defparam asyncreset_ctrl_X51_Y2_N0.coord_y = 3;
  7545. defparam asyncreset_ctrl_X51_Y2_N0.coord_z = 0;
  7546. defparam asyncreset_ctrl_X51_Y2_N0.AsyncCtrlMux = 2'b10;
  7547. alta_asyncctrl asyncreset_ctrl_X51_Y2_N1(
  7548. .Din(),
  7549. .Dout(AsyncReset_X51_Y2_GND));
  7550. defparam asyncreset_ctrl_X51_Y2_N1.coord_x = 8;
  7551. defparam asyncreset_ctrl_X51_Y2_N1.coord_y = 3;
  7552. defparam asyncreset_ctrl_X51_Y2_N1.coord_z = 1;
  7553. defparam asyncreset_ctrl_X51_Y2_N1.AsyncCtrlMux = 2'b00;
  7554. alta_asyncctrl asyncreset_ctrl_X51_Y3_N0(
  7555. .Din(\sys_resetn~clkctrl_outclk ),
  7556. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ));
  7557. defparam asyncreset_ctrl_X51_Y3_N0.coord_x = 5;
  7558. defparam asyncreset_ctrl_X51_Y3_N0.coord_y = 3;
  7559. defparam asyncreset_ctrl_X51_Y3_N0.coord_z = 0;
  7560. defparam asyncreset_ctrl_X51_Y3_N0.AsyncCtrlMux = 2'b10;
  7561. alta_asyncctrl asyncreset_ctrl_X51_Y4_N0(
  7562. .Din(\sys_resetn~clkctrl_outclk ),
  7563. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y4_SIG ));
  7564. defparam asyncreset_ctrl_X51_Y4_N0.coord_x = 16;
  7565. defparam asyncreset_ctrl_X51_Y4_N0.coord_y = 3;
  7566. defparam asyncreset_ctrl_X51_Y4_N0.coord_z = 0;
  7567. defparam asyncreset_ctrl_X51_Y4_N0.AsyncCtrlMux = 2'b10;
  7568. alta_asyncctrl asyncreset_ctrl_X52_Y1_N0(
  7569. .Din(),
  7570. .Dout(AsyncReset_X52_Y1_GND));
  7571. defparam asyncreset_ctrl_X52_Y1_N0.coord_x = 12;
  7572. defparam asyncreset_ctrl_X52_Y1_N0.coord_y = 4;
  7573. defparam asyncreset_ctrl_X52_Y1_N0.coord_z = 0;
  7574. defparam asyncreset_ctrl_X52_Y1_N0.AsyncCtrlMux = 2'b00;
  7575. alta_asyncctrl asyncreset_ctrl_X52_Y1_N1(
  7576. .Din(\sys_resetn~clkctrl_outclk ),
  7577. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ));
  7578. defparam asyncreset_ctrl_X52_Y1_N1.coord_x = 12;
  7579. defparam asyncreset_ctrl_X52_Y1_N1.coord_y = 4;
  7580. defparam asyncreset_ctrl_X52_Y1_N1.coord_z = 1;
  7581. defparam asyncreset_ctrl_X52_Y1_N1.AsyncCtrlMux = 2'b10;
  7582. alta_asyncctrl asyncreset_ctrl_X52_Y2_N0(
  7583. .Din(\sys_resetn~clkctrl_outclk ),
  7584. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ));
  7585. defparam asyncreset_ctrl_X52_Y2_N0.coord_x = 9;
  7586. defparam asyncreset_ctrl_X52_Y2_N0.coord_y = 3;
  7587. defparam asyncreset_ctrl_X52_Y2_N0.coord_z = 0;
  7588. defparam asyncreset_ctrl_X52_Y2_N0.AsyncCtrlMux = 2'b10;
  7589. alta_asyncctrl asyncreset_ctrl_X52_Y3_N0(
  7590. .Din(\sys_resetn~clkctrl_outclk ),
  7591. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ));
  7592. defparam asyncreset_ctrl_X52_Y3_N0.coord_x = 17;
  7593. defparam asyncreset_ctrl_X52_Y3_N0.coord_y = 1;
  7594. defparam asyncreset_ctrl_X52_Y3_N0.coord_z = 0;
  7595. defparam asyncreset_ctrl_X52_Y3_N0.AsyncCtrlMux = 2'b10;
  7596. alta_asyncctrl asyncreset_ctrl_X52_Y4_N0(
  7597. .Din(\sys_resetn~clkctrl_outclk ),
  7598. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ));
  7599. defparam asyncreset_ctrl_X52_Y4_N0.coord_x = 2;
  7600. defparam asyncreset_ctrl_X52_Y4_N0.coord_y = 3;
  7601. defparam asyncreset_ctrl_X52_Y4_N0.coord_z = 0;
  7602. defparam asyncreset_ctrl_X52_Y4_N0.AsyncCtrlMux = 2'b10;
  7603. alta_asyncctrl asyncreset_ctrl_X53_Y1_N0(
  7604. .Din(\sys_resetn~clkctrl_outclk ),
  7605. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ));
  7606. defparam asyncreset_ctrl_X53_Y1_N0.coord_x = 9;
  7607. defparam asyncreset_ctrl_X53_Y1_N0.coord_y = 2;
  7608. defparam asyncreset_ctrl_X53_Y1_N0.coord_z = 0;
  7609. defparam asyncreset_ctrl_X53_Y1_N0.AsyncCtrlMux = 2'b10;
  7610. alta_asyncctrl asyncreset_ctrl_X53_Y1_N1(
  7611. .Din(),
  7612. .Dout(AsyncReset_X53_Y1_GND));
  7613. defparam asyncreset_ctrl_X53_Y1_N1.coord_x = 9;
  7614. defparam asyncreset_ctrl_X53_Y1_N1.coord_y = 2;
  7615. defparam asyncreset_ctrl_X53_Y1_N1.coord_z = 1;
  7616. defparam asyncreset_ctrl_X53_Y1_N1.AsyncCtrlMux = 2'b00;
  7617. alta_asyncctrl asyncreset_ctrl_X53_Y2_N0(
  7618. .Din(\sys_resetn~clkctrl_outclk ),
  7619. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ));
  7620. defparam asyncreset_ctrl_X53_Y2_N0.coord_x = 11;
  7621. defparam asyncreset_ctrl_X53_Y2_N0.coord_y = 3;
  7622. defparam asyncreset_ctrl_X53_Y2_N0.coord_z = 0;
  7623. defparam asyncreset_ctrl_X53_Y2_N0.AsyncCtrlMux = 2'b10;
  7624. alta_asyncctrl asyncreset_ctrl_X53_Y3_N0(
  7625. .Din(),
  7626. .Dout(AsyncReset_X53_Y3_GND));
  7627. defparam asyncreset_ctrl_X53_Y3_N0.coord_x = 14;
  7628. defparam asyncreset_ctrl_X53_Y3_N0.coord_y = 2;
  7629. defparam asyncreset_ctrl_X53_Y3_N0.coord_z = 0;
  7630. defparam asyncreset_ctrl_X53_Y3_N0.AsyncCtrlMux = 2'b00;
  7631. alta_asyncctrl asyncreset_ctrl_X53_Y3_N1(
  7632. .Din(\sys_resetn~clkctrl_outclk ),
  7633. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ));
  7634. defparam asyncreset_ctrl_X53_Y3_N1.coord_x = 14;
  7635. defparam asyncreset_ctrl_X53_Y3_N1.coord_y = 2;
  7636. defparam asyncreset_ctrl_X53_Y3_N1.coord_z = 1;
  7637. defparam asyncreset_ctrl_X53_Y3_N1.AsyncCtrlMux = 2'b10;
  7638. alta_asyncctrl asyncreset_ctrl_X53_Y4_N0(
  7639. .Din(\sys_resetn~clkctrl_outclk ),
  7640. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ));
  7641. defparam asyncreset_ctrl_X53_Y4_N0.coord_x = 18;
  7642. defparam asyncreset_ctrl_X53_Y4_N0.coord_y = 2;
  7643. defparam asyncreset_ctrl_X53_Y4_N0.coord_z = 0;
  7644. defparam asyncreset_ctrl_X53_Y4_N0.AsyncCtrlMux = 2'b10;
  7645. alta_asyncctrl asyncreset_ctrl_X54_Y1_N0(
  7646. .Din(),
  7647. .Dout(AsyncReset_X54_Y1_GND));
  7648. defparam asyncreset_ctrl_X54_Y1_N0.coord_x = 10;
  7649. defparam asyncreset_ctrl_X54_Y1_N0.coord_y = 2;
  7650. defparam asyncreset_ctrl_X54_Y1_N0.coord_z = 0;
  7651. defparam asyncreset_ctrl_X54_Y1_N0.AsyncCtrlMux = 2'b00;
  7652. alta_asyncctrl asyncreset_ctrl_X54_Y1_N1(
  7653. .Din(\sys_resetn~clkctrl_outclk ),
  7654. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ));
  7655. defparam asyncreset_ctrl_X54_Y1_N1.coord_x = 10;
  7656. defparam asyncreset_ctrl_X54_Y1_N1.coord_y = 2;
  7657. defparam asyncreset_ctrl_X54_Y1_N1.coord_z = 1;
  7658. defparam asyncreset_ctrl_X54_Y1_N1.AsyncCtrlMux = 2'b10;
  7659. alta_asyncctrl asyncreset_ctrl_X54_Y2_N0(
  7660. .Din(\sys_resetn~clkctrl_outclk ),
  7661. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ));
  7662. defparam asyncreset_ctrl_X54_Y2_N0.coord_x = 14;
  7663. defparam asyncreset_ctrl_X54_Y2_N0.coord_y = 5;
  7664. defparam asyncreset_ctrl_X54_Y2_N0.coord_z = 0;
  7665. defparam asyncreset_ctrl_X54_Y2_N0.AsyncCtrlMux = 2'b10;
  7666. alta_asyncctrl asyncreset_ctrl_X54_Y3_N0(
  7667. .Din(\sys_resetn~clkctrl_outclk ),
  7668. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ));
  7669. defparam asyncreset_ctrl_X54_Y3_N0.coord_x = 14;
  7670. defparam asyncreset_ctrl_X54_Y3_N0.coord_y = 3;
  7671. defparam asyncreset_ctrl_X54_Y3_N0.coord_z = 0;
  7672. defparam asyncreset_ctrl_X54_Y3_N0.AsyncCtrlMux = 2'b10;
  7673. alta_asyncctrl asyncreset_ctrl_X54_Y4_N0(
  7674. .Din(),
  7675. .Dout(AsyncReset_X54_Y4_GND));
  7676. defparam asyncreset_ctrl_X54_Y4_N0.coord_x = 19;
  7677. defparam asyncreset_ctrl_X54_Y4_N0.coord_y = 2;
  7678. defparam asyncreset_ctrl_X54_Y4_N0.coord_z = 0;
  7679. defparam asyncreset_ctrl_X54_Y4_N0.AsyncCtrlMux = 2'b00;
  7680. alta_asyncctrl asyncreset_ctrl_X54_Y4_N1(
  7681. .Din(\sys_resetn~clkctrl_outclk ),
  7682. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ));
  7683. defparam asyncreset_ctrl_X54_Y4_N1.coord_x = 19;
  7684. defparam asyncreset_ctrl_X54_Y4_N1.coord_y = 2;
  7685. defparam asyncreset_ctrl_X54_Y4_N1.coord_z = 1;
  7686. defparam asyncreset_ctrl_X54_Y4_N1.AsyncCtrlMux = 2'b10;
  7687. alta_asyncctrl asyncreset_ctrl_X56_Y10_N0(
  7688. .Din(\sys_resetn~clkctrl_outclk ),
  7689. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ));
  7690. defparam asyncreset_ctrl_X56_Y10_N0.coord_x = 14;
  7691. defparam asyncreset_ctrl_X56_Y10_N0.coord_y = 12;
  7692. defparam asyncreset_ctrl_X56_Y10_N0.coord_z = 0;
  7693. defparam asyncreset_ctrl_X56_Y10_N0.AsyncCtrlMux = 2'b10;
  7694. alta_asyncctrl asyncreset_ctrl_X56_Y10_N1(
  7695. .Din(),
  7696. .Dout(AsyncReset_X56_Y10_GND));
  7697. defparam asyncreset_ctrl_X56_Y10_N1.coord_x = 14;
  7698. defparam asyncreset_ctrl_X56_Y10_N1.coord_y = 12;
  7699. defparam asyncreset_ctrl_X56_Y10_N1.coord_z = 1;
  7700. defparam asyncreset_ctrl_X56_Y10_N1.AsyncCtrlMux = 2'b00;
  7701. alta_asyncctrl asyncreset_ctrl_X56_Y11_N0(
  7702. .Din(),
  7703. .Dout(AsyncReset_X56_Y11_GND));
  7704. defparam asyncreset_ctrl_X56_Y11_N0.coord_x = 20;
  7705. defparam asyncreset_ctrl_X56_Y11_N0.coord_y = 6;
  7706. defparam asyncreset_ctrl_X56_Y11_N0.coord_z = 0;
  7707. defparam asyncreset_ctrl_X56_Y11_N0.AsyncCtrlMux = 2'b00;
  7708. alta_asyncctrl asyncreset_ctrl_X56_Y12_N0(
  7709. .Din(\sys_resetn~clkctrl_outclk ),
  7710. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ));
  7711. defparam asyncreset_ctrl_X56_Y12_N0.coord_x = 14;
  7712. defparam asyncreset_ctrl_X56_Y12_N0.coord_y = 10;
  7713. defparam asyncreset_ctrl_X56_Y12_N0.coord_z = 0;
  7714. defparam asyncreset_ctrl_X56_Y12_N0.AsyncCtrlMux = 2'b10;
  7715. alta_asyncctrl asyncreset_ctrl_X56_Y12_N1(
  7716. .Din(),
  7717. .Dout(AsyncReset_X56_Y12_GND));
  7718. defparam asyncreset_ctrl_X56_Y12_N1.coord_x = 14;
  7719. defparam asyncreset_ctrl_X56_Y12_N1.coord_y = 10;
  7720. defparam asyncreset_ctrl_X56_Y12_N1.coord_z = 1;
  7721. defparam asyncreset_ctrl_X56_Y12_N1.AsyncCtrlMux = 2'b00;
  7722. alta_asyncctrl asyncreset_ctrl_X56_Y1_N0(
  7723. .Din(\sys_resetn~clkctrl_outclk ),
  7724. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ));
  7725. defparam asyncreset_ctrl_X56_Y1_N0.coord_x = 10;
  7726. defparam asyncreset_ctrl_X56_Y1_N0.coord_y = 3;
  7727. defparam asyncreset_ctrl_X56_Y1_N0.coord_z = 0;
  7728. defparam asyncreset_ctrl_X56_Y1_N0.AsyncCtrlMux = 2'b10;
  7729. alta_asyncctrl asyncreset_ctrl_X56_Y2_N0(
  7730. .Din(\sys_resetn~clkctrl_outclk ),
  7731. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ));
  7732. defparam asyncreset_ctrl_X56_Y2_N0.coord_x = 12;
  7733. defparam asyncreset_ctrl_X56_Y2_N0.coord_y = 1;
  7734. defparam asyncreset_ctrl_X56_Y2_N0.coord_z = 0;
  7735. defparam asyncreset_ctrl_X56_Y2_N0.AsyncCtrlMux = 2'b10;
  7736. alta_asyncctrl asyncreset_ctrl_X56_Y3_N0(
  7737. .Din(\sys_resetn~clkctrl_outclk ),
  7738. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ));
  7739. defparam asyncreset_ctrl_X56_Y3_N0.coord_x = 15;
  7740. defparam asyncreset_ctrl_X56_Y3_N0.coord_y = 2;
  7741. defparam asyncreset_ctrl_X56_Y3_N0.coord_z = 0;
  7742. defparam asyncreset_ctrl_X56_Y3_N0.AsyncCtrlMux = 2'b10;
  7743. alta_asyncctrl asyncreset_ctrl_X56_Y4_N0(
  7744. .Din(\sys_resetn~clkctrl_outclk ),
  7745. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ));
  7746. defparam asyncreset_ctrl_X56_Y4_N0.coord_x = 18;
  7747. defparam asyncreset_ctrl_X56_Y4_N0.coord_y = 5;
  7748. defparam asyncreset_ctrl_X56_Y4_N0.coord_z = 0;
  7749. defparam asyncreset_ctrl_X56_Y4_N0.AsyncCtrlMux = 2'b10;
  7750. alta_asyncctrl asyncreset_ctrl_X56_Y5_N0(
  7751. .Din(\sys_resetn~clkctrl_outclk ),
  7752. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ));
  7753. defparam asyncreset_ctrl_X56_Y5_N0.coord_x = 17;
  7754. defparam asyncreset_ctrl_X56_Y5_N0.coord_y = 3;
  7755. defparam asyncreset_ctrl_X56_Y5_N0.coord_z = 0;
  7756. defparam asyncreset_ctrl_X56_Y5_N0.AsyncCtrlMux = 2'b10;
  7757. alta_asyncctrl asyncreset_ctrl_X56_Y5_N1(
  7758. .Din(),
  7759. .Dout(AsyncReset_X56_Y5_GND));
  7760. defparam asyncreset_ctrl_X56_Y5_N1.coord_x = 17;
  7761. defparam asyncreset_ctrl_X56_Y5_N1.coord_y = 3;
  7762. defparam asyncreset_ctrl_X56_Y5_N1.coord_z = 1;
  7763. defparam asyncreset_ctrl_X56_Y5_N1.AsyncCtrlMux = 2'b00;
  7764. alta_asyncctrl asyncreset_ctrl_X56_Y6_N0(
  7765. .Din(),
  7766. .Dout(AsyncReset_X56_Y6_GND));
  7767. defparam asyncreset_ctrl_X56_Y6_N0.coord_x = 18;
  7768. defparam asyncreset_ctrl_X56_Y6_N0.coord_y = 1;
  7769. defparam asyncreset_ctrl_X56_Y6_N0.coord_z = 0;
  7770. defparam asyncreset_ctrl_X56_Y6_N0.AsyncCtrlMux = 2'b00;
  7771. alta_asyncctrl asyncreset_ctrl_X56_Y6_N1(
  7772. .Din(\sys_resetn~clkctrl_outclk ),
  7773. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ));
  7774. defparam asyncreset_ctrl_X56_Y6_N1.coord_x = 18;
  7775. defparam asyncreset_ctrl_X56_Y6_N1.coord_y = 1;
  7776. defparam asyncreset_ctrl_X56_Y6_N1.coord_z = 1;
  7777. defparam asyncreset_ctrl_X56_Y6_N1.AsyncCtrlMux = 2'b10;
  7778. alta_asyncctrl asyncreset_ctrl_X56_Y7_N0(
  7779. .Din(\sys_resetn~clkctrl_outclk ),
  7780. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ));
  7781. defparam asyncreset_ctrl_X56_Y7_N0.coord_x = 19;
  7782. defparam asyncreset_ctrl_X56_Y7_N0.coord_y = 4;
  7783. defparam asyncreset_ctrl_X56_Y7_N0.coord_z = 0;
  7784. defparam asyncreset_ctrl_X56_Y7_N0.AsyncCtrlMux = 2'b10;
  7785. alta_asyncctrl asyncreset_ctrl_X56_Y7_N1(
  7786. .Din(),
  7787. .Dout(AsyncReset_X56_Y7_GND));
  7788. defparam asyncreset_ctrl_X56_Y7_N1.coord_x = 19;
  7789. defparam asyncreset_ctrl_X56_Y7_N1.coord_y = 4;
  7790. defparam asyncreset_ctrl_X56_Y7_N1.coord_z = 1;
  7791. defparam asyncreset_ctrl_X56_Y7_N1.AsyncCtrlMux = 2'b00;
  7792. alta_asyncctrl asyncreset_ctrl_X56_Y8_N0(
  7793. .Din(\sys_resetn~clkctrl_outclk ),
  7794. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ));
  7795. defparam asyncreset_ctrl_X56_Y8_N0.coord_x = 19;
  7796. defparam asyncreset_ctrl_X56_Y8_N0.coord_y = 7;
  7797. defparam asyncreset_ctrl_X56_Y8_N0.coord_z = 0;
  7798. defparam asyncreset_ctrl_X56_Y8_N0.AsyncCtrlMux = 2'b10;
  7799. alta_asyncctrl asyncreset_ctrl_X56_Y8_N1(
  7800. .Din(),
  7801. .Dout(AsyncReset_X56_Y8_GND));
  7802. defparam asyncreset_ctrl_X56_Y8_N1.coord_x = 19;
  7803. defparam asyncreset_ctrl_X56_Y8_N1.coord_y = 7;
  7804. defparam asyncreset_ctrl_X56_Y8_N1.coord_z = 1;
  7805. defparam asyncreset_ctrl_X56_Y8_N1.AsyncCtrlMux = 2'b00;
  7806. alta_asyncctrl asyncreset_ctrl_X56_Y9_N0(
  7807. .Din(\sys_resetn~clkctrl_outclk ),
  7808. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ));
  7809. defparam asyncreset_ctrl_X56_Y9_N0.coord_x = 19;
  7810. defparam asyncreset_ctrl_X56_Y9_N0.coord_y = 3;
  7811. defparam asyncreset_ctrl_X56_Y9_N0.coord_z = 0;
  7812. defparam asyncreset_ctrl_X56_Y9_N0.AsyncCtrlMux = 2'b10;
  7813. alta_asyncctrl asyncreset_ctrl_X57_Y10_N0(
  7814. .Din(\sys_resetn~clkctrl_outclk ),
  7815. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ));
  7816. defparam asyncreset_ctrl_X57_Y10_N0.coord_x = 19;
  7817. defparam asyncreset_ctrl_X57_Y10_N0.coord_y = 12;
  7818. defparam asyncreset_ctrl_X57_Y10_N0.coord_z = 0;
  7819. defparam asyncreset_ctrl_X57_Y10_N0.AsyncCtrlMux = 2'b10;
  7820. alta_asyncctrl asyncreset_ctrl_X57_Y10_N1(
  7821. .Din(),
  7822. .Dout(AsyncReset_X57_Y10_GND));
  7823. defparam asyncreset_ctrl_X57_Y10_N1.coord_x = 19;
  7824. defparam asyncreset_ctrl_X57_Y10_N1.coord_y = 12;
  7825. defparam asyncreset_ctrl_X57_Y10_N1.coord_z = 1;
  7826. defparam asyncreset_ctrl_X57_Y10_N1.AsyncCtrlMux = 2'b00;
  7827. alta_asyncctrl asyncreset_ctrl_X57_Y11_N0(
  7828. .Din(\sys_resetn~clkctrl_outclk ),
  7829. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ));
  7830. defparam asyncreset_ctrl_X57_Y11_N0.coord_x = 20;
  7831. defparam asyncreset_ctrl_X57_Y11_N0.coord_y = 5;
  7832. defparam asyncreset_ctrl_X57_Y11_N0.coord_z = 0;
  7833. defparam asyncreset_ctrl_X57_Y11_N0.AsyncCtrlMux = 2'b10;
  7834. alta_asyncctrl asyncreset_ctrl_X57_Y11_N1(
  7835. .Din(),
  7836. .Dout(AsyncReset_X57_Y11_GND));
  7837. defparam asyncreset_ctrl_X57_Y11_N1.coord_x = 20;
  7838. defparam asyncreset_ctrl_X57_Y11_N1.coord_y = 5;
  7839. defparam asyncreset_ctrl_X57_Y11_N1.coord_z = 1;
  7840. defparam asyncreset_ctrl_X57_Y11_N1.AsyncCtrlMux = 2'b00;
  7841. alta_asyncctrl asyncreset_ctrl_X57_Y12_N0(
  7842. .Din(\sys_resetn~clkctrl_outclk ),
  7843. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ));
  7844. defparam asyncreset_ctrl_X57_Y12_N0.coord_x = 20;
  7845. defparam asyncreset_ctrl_X57_Y12_N0.coord_y = 4;
  7846. defparam asyncreset_ctrl_X57_Y12_N0.coord_z = 0;
  7847. defparam asyncreset_ctrl_X57_Y12_N0.AsyncCtrlMux = 2'b10;
  7848. alta_asyncctrl asyncreset_ctrl_X57_Y12_N1(
  7849. .Din(),
  7850. .Dout(AsyncReset_X57_Y12_GND));
  7851. defparam asyncreset_ctrl_X57_Y12_N1.coord_x = 20;
  7852. defparam asyncreset_ctrl_X57_Y12_N1.coord_y = 4;
  7853. defparam asyncreset_ctrl_X57_Y12_N1.coord_z = 1;
  7854. defparam asyncreset_ctrl_X57_Y12_N1.AsyncCtrlMux = 2'b00;
  7855. alta_asyncctrl asyncreset_ctrl_X57_Y1_N0(
  7856. .Din(\sys_resetn~clkctrl_outclk ),
  7857. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ));
  7858. defparam asyncreset_ctrl_X57_Y1_N0.coord_x = 12;
  7859. defparam asyncreset_ctrl_X57_Y1_N0.coord_y = 2;
  7860. defparam asyncreset_ctrl_X57_Y1_N0.coord_z = 0;
  7861. defparam asyncreset_ctrl_X57_Y1_N0.AsyncCtrlMux = 2'b10;
  7862. alta_asyncctrl asyncreset_ctrl_X57_Y1_N1(
  7863. .Din(),
  7864. .Dout(AsyncReset_X57_Y1_GND));
  7865. defparam asyncreset_ctrl_X57_Y1_N1.coord_x = 12;
  7866. defparam asyncreset_ctrl_X57_Y1_N1.coord_y = 2;
  7867. defparam asyncreset_ctrl_X57_Y1_N1.coord_z = 1;
  7868. defparam asyncreset_ctrl_X57_Y1_N1.AsyncCtrlMux = 2'b00;
  7869. alta_asyncctrl asyncreset_ctrl_X57_Y2_N0(
  7870. .Din(\sys_resetn~clkctrl_outclk ),
  7871. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ));
  7872. defparam asyncreset_ctrl_X57_Y2_N0.coord_x = 12;
  7873. defparam asyncreset_ctrl_X57_Y2_N0.coord_y = 3;
  7874. defparam asyncreset_ctrl_X57_Y2_N0.coord_z = 0;
  7875. defparam asyncreset_ctrl_X57_Y2_N0.AsyncCtrlMux = 2'b10;
  7876. alta_asyncctrl asyncreset_ctrl_X57_Y3_N0(
  7877. .Din(\sys_resetn~clkctrl_outclk ),
  7878. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ));
  7879. defparam asyncreset_ctrl_X57_Y3_N0.coord_x = 16;
  7880. defparam asyncreset_ctrl_X57_Y3_N0.coord_y = 1;
  7881. defparam asyncreset_ctrl_X57_Y3_N0.coord_z = 0;
  7882. defparam asyncreset_ctrl_X57_Y3_N0.AsyncCtrlMux = 2'b10;
  7883. alta_asyncctrl asyncreset_ctrl_X57_Y3_N1(
  7884. .Din(),
  7885. .Dout(AsyncReset_X57_Y3_GND));
  7886. defparam asyncreset_ctrl_X57_Y3_N1.coord_x = 16;
  7887. defparam asyncreset_ctrl_X57_Y3_N1.coord_y = 1;
  7888. defparam asyncreset_ctrl_X57_Y3_N1.coord_z = 1;
  7889. defparam asyncreset_ctrl_X57_Y3_N1.AsyncCtrlMux = 2'b00;
  7890. alta_asyncctrl asyncreset_ctrl_X57_Y4_N0(
  7891. .Din(),
  7892. .Dout(AsyncReset_X57_Y4_GND));
  7893. defparam asyncreset_ctrl_X57_Y4_N0.coord_x = 19;
  7894. defparam asyncreset_ctrl_X57_Y4_N0.coord_y = 5;
  7895. defparam asyncreset_ctrl_X57_Y4_N0.coord_z = 0;
  7896. defparam asyncreset_ctrl_X57_Y4_N0.AsyncCtrlMux = 2'b00;
  7897. alta_asyncctrl asyncreset_ctrl_X57_Y4_N1(
  7898. .Din(\sys_resetn~clkctrl_outclk ),
  7899. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ));
  7900. defparam asyncreset_ctrl_X57_Y4_N1.coord_x = 19;
  7901. defparam asyncreset_ctrl_X57_Y4_N1.coord_y = 5;
  7902. defparam asyncreset_ctrl_X57_Y4_N1.coord_z = 1;
  7903. defparam asyncreset_ctrl_X57_Y4_N1.AsyncCtrlMux = 2'b10;
  7904. alta_asyncctrl asyncreset_ctrl_X57_Y5_N0(
  7905. .Din(\PLL_ENABLE~clkctrl_outclk ),
  7906. .Dout(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X57_Y5_SIG ));
  7907. defparam asyncreset_ctrl_X57_Y5_N0.coord_x = 15;
  7908. defparam asyncreset_ctrl_X57_Y5_N0.coord_y = 7;
  7909. defparam asyncreset_ctrl_X57_Y5_N0.coord_z = 0;
  7910. defparam asyncreset_ctrl_X57_Y5_N0.AsyncCtrlMux = 2'b10;
  7911. alta_asyncctrl asyncreset_ctrl_X57_Y6_N0(
  7912. .Din(\sys_resetn~clkctrl_outclk ),
  7913. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y6_SIG ));
  7914. defparam asyncreset_ctrl_X57_Y6_N0.coord_x = 19;
  7915. defparam asyncreset_ctrl_X57_Y6_N0.coord_y = 1;
  7916. defparam asyncreset_ctrl_X57_Y6_N0.coord_z = 0;
  7917. defparam asyncreset_ctrl_X57_Y6_N0.AsyncCtrlMux = 2'b10;
  7918. alta_asyncctrl asyncreset_ctrl_X57_Y6_N1(
  7919. .Din(),
  7920. .Dout(AsyncReset_X57_Y6_GND));
  7921. defparam asyncreset_ctrl_X57_Y6_N1.coord_x = 19;
  7922. defparam asyncreset_ctrl_X57_Y6_N1.coord_y = 1;
  7923. defparam asyncreset_ctrl_X57_Y6_N1.coord_z = 1;
  7924. defparam asyncreset_ctrl_X57_Y6_N1.AsyncCtrlMux = 2'b00;
  7925. alta_asyncctrl asyncreset_ctrl_X57_Y7_N0(
  7926. .Din(\sys_resetn~clkctrl_outclk ),
  7927. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ));
  7928. defparam asyncreset_ctrl_X57_Y7_N0.coord_x = 18;
  7929. defparam asyncreset_ctrl_X57_Y7_N0.coord_y = 4;
  7930. defparam asyncreset_ctrl_X57_Y7_N0.coord_z = 0;
  7931. defparam asyncreset_ctrl_X57_Y7_N0.AsyncCtrlMux = 2'b10;
  7932. alta_asyncctrl asyncreset_ctrl_X57_Y7_N1(
  7933. .Din(),
  7934. .Dout(AsyncReset_X57_Y7_GND));
  7935. defparam asyncreset_ctrl_X57_Y7_N1.coord_x = 18;
  7936. defparam asyncreset_ctrl_X57_Y7_N1.coord_y = 4;
  7937. defparam asyncreset_ctrl_X57_Y7_N1.coord_z = 1;
  7938. defparam asyncreset_ctrl_X57_Y7_N1.AsyncCtrlMux = 2'b00;
  7939. alta_asyncctrl asyncreset_ctrl_X57_Y8_N0(
  7940. .Din(\sys_resetn~clkctrl_outclk ),
  7941. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ));
  7942. defparam asyncreset_ctrl_X57_Y8_N0.coord_x = 19;
  7943. defparam asyncreset_ctrl_X57_Y8_N0.coord_y = 6;
  7944. defparam asyncreset_ctrl_X57_Y8_N0.coord_z = 0;
  7945. defparam asyncreset_ctrl_X57_Y8_N0.AsyncCtrlMux = 2'b10;
  7946. alta_asyncctrl asyncreset_ctrl_X57_Y9_N0(
  7947. .Din(\sys_resetn~clkctrl_outclk ),
  7948. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ));
  7949. defparam asyncreset_ctrl_X57_Y9_N0.coord_x = 20;
  7950. defparam asyncreset_ctrl_X57_Y9_N0.coord_y = 3;
  7951. defparam asyncreset_ctrl_X57_Y9_N0.coord_z = 0;
  7952. defparam asyncreset_ctrl_X57_Y9_N0.AsyncCtrlMux = 2'b10;
  7953. alta_asyncctrl asyncreset_ctrl_X57_Y9_N1(
  7954. .Din(),
  7955. .Dout(AsyncReset_X57_Y9_GND));
  7956. defparam asyncreset_ctrl_X57_Y9_N1.coord_x = 20;
  7957. defparam asyncreset_ctrl_X57_Y9_N1.coord_y = 3;
  7958. defparam asyncreset_ctrl_X57_Y9_N1.coord_z = 1;
  7959. defparam asyncreset_ctrl_X57_Y9_N1.AsyncCtrlMux = 2'b00;
  7960. alta_asyncctrl asyncreset_ctrl_X58_Y10_N0(
  7961. .Din(\sys_resetn~clkctrl_outclk ),
  7962. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ));
  7963. defparam asyncreset_ctrl_X58_Y10_N0.coord_x = 20;
  7964. defparam asyncreset_ctrl_X58_Y10_N0.coord_y = 12;
  7965. defparam asyncreset_ctrl_X58_Y10_N0.coord_z = 0;
  7966. defparam asyncreset_ctrl_X58_Y10_N0.AsyncCtrlMux = 2'b10;
  7967. alta_asyncctrl asyncreset_ctrl_X58_Y10_N1(
  7968. .Din(),
  7969. .Dout(AsyncReset_X58_Y10_GND));
  7970. defparam asyncreset_ctrl_X58_Y10_N1.coord_x = 20;
  7971. defparam asyncreset_ctrl_X58_Y10_N1.coord_y = 12;
  7972. defparam asyncreset_ctrl_X58_Y10_N1.coord_z = 1;
  7973. defparam asyncreset_ctrl_X58_Y10_N1.AsyncCtrlMux = 2'b00;
  7974. alta_asyncctrl asyncreset_ctrl_X58_Y11_N0(
  7975. .Din(),
  7976. .Dout(AsyncReset_X58_Y11_GND));
  7977. defparam asyncreset_ctrl_X58_Y11_N0.coord_x = 20;
  7978. defparam asyncreset_ctrl_X58_Y11_N0.coord_y = 7;
  7979. defparam asyncreset_ctrl_X58_Y11_N0.coord_z = 0;
  7980. defparam asyncreset_ctrl_X58_Y11_N0.AsyncCtrlMux = 2'b00;
  7981. alta_asyncctrl asyncreset_ctrl_X58_Y12_N0(
  7982. .Din(\sys_resetn~clkctrl_outclk ),
  7983. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ));
  7984. defparam asyncreset_ctrl_X58_Y12_N0.coord_x = 20;
  7985. defparam asyncreset_ctrl_X58_Y12_N0.coord_y = 10;
  7986. defparam asyncreset_ctrl_X58_Y12_N0.coord_z = 0;
  7987. defparam asyncreset_ctrl_X58_Y12_N0.AsyncCtrlMux = 2'b10;
  7988. alta_asyncctrl asyncreset_ctrl_X58_Y1_N0(
  7989. .Din(),
  7990. .Dout(AsyncReset_X58_Y1_GND));
  7991. defparam asyncreset_ctrl_X58_Y1_N0.coord_x = 10;
  7992. defparam asyncreset_ctrl_X58_Y1_N0.coord_y = 1;
  7993. defparam asyncreset_ctrl_X58_Y1_N0.coord_z = 0;
  7994. defparam asyncreset_ctrl_X58_Y1_N0.AsyncCtrlMux = 2'b00;
  7995. alta_asyncctrl asyncreset_ctrl_X58_Y1_N1(
  7996. .Din(\sys_resetn~clkctrl_outclk ),
  7997. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ));
  7998. defparam asyncreset_ctrl_X58_Y1_N1.coord_x = 10;
  7999. defparam asyncreset_ctrl_X58_Y1_N1.coord_y = 1;
  8000. defparam asyncreset_ctrl_X58_Y1_N1.coord_z = 1;
  8001. defparam asyncreset_ctrl_X58_Y1_N1.AsyncCtrlMux = 2'b10;
  8002. alta_asyncctrl asyncreset_ctrl_X58_Y2_N0(
  8003. .Din(\sys_resetn~clkctrl_outclk ),
  8004. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ));
  8005. defparam asyncreset_ctrl_X58_Y2_N0.coord_x = 15;
  8006. defparam asyncreset_ctrl_X58_Y2_N0.coord_y = 4;
  8007. defparam asyncreset_ctrl_X58_Y2_N0.coord_z = 0;
  8008. defparam asyncreset_ctrl_X58_Y2_N0.AsyncCtrlMux = 2'b10;
  8009. alta_asyncctrl asyncreset_ctrl_X58_Y3_N0(
  8010. .Din(),
  8011. .Dout(AsyncReset_X58_Y3_GND));
  8012. defparam asyncreset_ctrl_X58_Y3_N0.coord_x = 16;
  8013. defparam asyncreset_ctrl_X58_Y3_N0.coord_y = 2;
  8014. defparam asyncreset_ctrl_X58_Y3_N0.coord_z = 0;
  8015. defparam asyncreset_ctrl_X58_Y3_N0.AsyncCtrlMux = 2'b00;
  8016. alta_asyncctrl asyncreset_ctrl_X58_Y3_N1(
  8017. .Din(\sys_resetn~clkctrl_outclk ),
  8018. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ));
  8019. defparam asyncreset_ctrl_X58_Y3_N1.coord_x = 16;
  8020. defparam asyncreset_ctrl_X58_Y3_N1.coord_y = 2;
  8021. defparam asyncreset_ctrl_X58_Y3_N1.coord_z = 1;
  8022. defparam asyncreset_ctrl_X58_Y3_N1.AsyncCtrlMux = 2'b10;
  8023. alta_asyncctrl asyncreset_ctrl_X58_Y4_N0(
  8024. .Din(\sys_resetn~clkctrl_outclk ),
  8025. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ));
  8026. defparam asyncreset_ctrl_X58_Y4_N0.coord_x = 17;
  8027. defparam asyncreset_ctrl_X58_Y4_N0.coord_y = 4;
  8028. defparam asyncreset_ctrl_X58_Y4_N0.coord_z = 0;
  8029. defparam asyncreset_ctrl_X58_Y4_N0.AsyncCtrlMux = 2'b10;
  8030. alta_asyncctrl asyncreset_ctrl_X58_Y5_N0(
  8031. .Din(\sys_resetn~clkctrl_outclk ),
  8032. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ));
  8033. defparam asyncreset_ctrl_X58_Y5_N0.coord_x = 17;
  8034. defparam asyncreset_ctrl_X58_Y5_N0.coord_y = 6;
  8035. defparam asyncreset_ctrl_X58_Y5_N0.coord_z = 0;
  8036. defparam asyncreset_ctrl_X58_Y5_N0.AsyncCtrlMux = 2'b10;
  8037. alta_asyncctrl asyncreset_ctrl_X58_Y6_N0(
  8038. .Din(\sys_resetn~clkctrl_outclk ),
  8039. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ));
  8040. defparam asyncreset_ctrl_X58_Y6_N0.coord_x = 18;
  8041. defparam asyncreset_ctrl_X58_Y6_N0.coord_y = 3;
  8042. defparam asyncreset_ctrl_X58_Y6_N0.coord_z = 0;
  8043. defparam asyncreset_ctrl_X58_Y6_N0.AsyncCtrlMux = 2'b10;
  8044. alta_asyncctrl asyncreset_ctrl_X58_Y7_N0(
  8045. .Din(\sys_resetn~clkctrl_outclk ),
  8046. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ));
  8047. defparam asyncreset_ctrl_X58_Y7_N0.coord_x = 17;
  8048. defparam asyncreset_ctrl_X58_Y7_N0.coord_y = 5;
  8049. defparam asyncreset_ctrl_X58_Y7_N0.coord_z = 0;
  8050. defparam asyncreset_ctrl_X58_Y7_N0.AsyncCtrlMux = 2'b10;
  8051. alta_asyncctrl asyncreset_ctrl_X58_Y8_N0(
  8052. .Din(\sys_resetn~clkctrl_outclk ),
  8053. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ));
  8054. defparam asyncreset_ctrl_X58_Y8_N0.coord_x = 20;
  8055. defparam asyncreset_ctrl_X58_Y8_N0.coord_y = 8;
  8056. defparam asyncreset_ctrl_X58_Y8_N0.coord_z = 0;
  8057. defparam asyncreset_ctrl_X58_Y8_N0.AsyncCtrlMux = 2'b10;
  8058. alta_asyncctrl asyncreset_ctrl_X58_Y8_N1(
  8059. .Din(),
  8060. .Dout(AsyncReset_X58_Y8_GND));
  8061. defparam asyncreset_ctrl_X58_Y8_N1.coord_x = 20;
  8062. defparam asyncreset_ctrl_X58_Y8_N1.coord_y = 8;
  8063. defparam asyncreset_ctrl_X58_Y8_N1.coord_z = 1;
  8064. defparam asyncreset_ctrl_X58_Y8_N1.AsyncCtrlMux = 2'b00;
  8065. alta_asyncctrl asyncreset_ctrl_X58_Y9_N0(
  8066. .Din(\sys_resetn~clkctrl_outclk ),
  8067. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ));
  8068. defparam asyncreset_ctrl_X58_Y9_N0.coord_x = 18;
  8069. defparam asyncreset_ctrl_X58_Y9_N0.coord_y = 8;
  8070. defparam asyncreset_ctrl_X58_Y9_N0.coord_z = 0;
  8071. defparam asyncreset_ctrl_X58_Y9_N0.AsyncCtrlMux = 2'b10;
  8072. alta_asyncctrl asyncreset_ctrl_X59_Y10_N0(
  8073. .Din(\sys_resetn~clkctrl_outclk ),
  8074. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ));
  8075. defparam asyncreset_ctrl_X59_Y10_N0.coord_x = 19;
  8076. defparam asyncreset_ctrl_X59_Y10_N0.coord_y = 9;
  8077. defparam asyncreset_ctrl_X59_Y10_N0.coord_z = 0;
  8078. defparam asyncreset_ctrl_X59_Y10_N0.AsyncCtrlMux = 2'b10;
  8079. alta_asyncctrl asyncreset_ctrl_X59_Y10_N1(
  8080. .Din(),
  8081. .Dout(AsyncReset_X59_Y10_GND));
  8082. defparam asyncreset_ctrl_X59_Y10_N1.coord_x = 19;
  8083. defparam asyncreset_ctrl_X59_Y10_N1.coord_y = 9;
  8084. defparam asyncreset_ctrl_X59_Y10_N1.coord_z = 1;
  8085. defparam asyncreset_ctrl_X59_Y10_N1.AsyncCtrlMux = 2'b00;
  8086. alta_asyncctrl asyncreset_ctrl_X59_Y11_N0(
  8087. .Din(),
  8088. .Dout(AsyncReset_X59_Y11_GND));
  8089. defparam asyncreset_ctrl_X59_Y11_N0.coord_x = 19;
  8090. defparam asyncreset_ctrl_X59_Y11_N0.coord_y = 11;
  8091. defparam asyncreset_ctrl_X59_Y11_N0.coord_z = 0;
  8092. defparam asyncreset_ctrl_X59_Y11_N0.AsyncCtrlMux = 2'b00;
  8093. alta_asyncctrl asyncreset_ctrl_X59_Y12_N0(
  8094. .Din(\sys_resetn~clkctrl_outclk ),
  8095. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ));
  8096. defparam asyncreset_ctrl_X59_Y12_N0.coord_x = 20;
  8097. defparam asyncreset_ctrl_X59_Y12_N0.coord_y = 11;
  8098. defparam asyncreset_ctrl_X59_Y12_N0.coord_z = 0;
  8099. defparam asyncreset_ctrl_X59_Y12_N0.AsyncCtrlMux = 2'b10;
  8100. alta_asyncctrl asyncreset_ctrl_X59_Y1_N0(
  8101. .Din(\sys_resetn~clkctrl_outclk ),
  8102. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ));
  8103. defparam asyncreset_ctrl_X59_Y1_N0.coord_x = 9;
  8104. defparam asyncreset_ctrl_X59_Y1_N0.coord_y = 1;
  8105. defparam asyncreset_ctrl_X59_Y1_N0.coord_z = 0;
  8106. defparam asyncreset_ctrl_X59_Y1_N0.AsyncCtrlMux = 2'b10;
  8107. alta_asyncctrl asyncreset_ctrl_X59_Y1_N1(
  8108. .Din(),
  8109. .Dout(AsyncReset_X59_Y1_GND));
  8110. defparam asyncreset_ctrl_X59_Y1_N1.coord_x = 9;
  8111. defparam asyncreset_ctrl_X59_Y1_N1.coord_y = 1;
  8112. defparam asyncreset_ctrl_X59_Y1_N1.coord_z = 1;
  8113. defparam asyncreset_ctrl_X59_Y1_N1.AsyncCtrlMux = 2'b00;
  8114. alta_asyncctrl asyncreset_ctrl_X59_Y2_N0(
  8115. .Din(\sys_resetn~clkctrl_outclk ),
  8116. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ));
  8117. defparam asyncreset_ctrl_X59_Y2_N0.coord_x = 15;
  8118. defparam asyncreset_ctrl_X59_Y2_N0.coord_y = 5;
  8119. defparam asyncreset_ctrl_X59_Y2_N0.coord_z = 0;
  8120. defparam asyncreset_ctrl_X59_Y2_N0.AsyncCtrlMux = 2'b10;
  8121. alta_asyncctrl asyncreset_ctrl_X59_Y3_N0(
  8122. .Din(\sys_resetn~clkctrl_outclk ),
  8123. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ));
  8124. defparam asyncreset_ctrl_X59_Y3_N0.coord_x = 16;
  8125. defparam asyncreset_ctrl_X59_Y3_N0.coord_y = 4;
  8126. defparam asyncreset_ctrl_X59_Y3_N0.coord_z = 0;
  8127. defparam asyncreset_ctrl_X59_Y3_N0.AsyncCtrlMux = 2'b10;
  8128. alta_asyncctrl asyncreset_ctrl_X59_Y4_N0(
  8129. .Din(\sys_resetn~clkctrl_outclk ),
  8130. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ));
  8131. defparam asyncreset_ctrl_X59_Y4_N0.coord_x = 16;
  8132. defparam asyncreset_ctrl_X59_Y4_N0.coord_y = 5;
  8133. defparam asyncreset_ctrl_X59_Y4_N0.coord_z = 0;
  8134. defparam asyncreset_ctrl_X59_Y4_N0.AsyncCtrlMux = 2'b10;
  8135. alta_asyncctrl asyncreset_ctrl_X59_Y5_N0(
  8136. .Din(\sys_resetn~clkctrl_outclk ),
  8137. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ));
  8138. defparam asyncreset_ctrl_X59_Y5_N0.coord_x = 16;
  8139. defparam asyncreset_ctrl_X59_Y5_N0.coord_y = 6;
  8140. defparam asyncreset_ctrl_X59_Y5_N0.coord_z = 0;
  8141. defparam asyncreset_ctrl_X59_Y5_N0.AsyncCtrlMux = 2'b10;
  8142. alta_asyncctrl asyncreset_ctrl_X59_Y6_N0(
  8143. .Din(\sys_resetn~clkctrl_outclk ),
  8144. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ));
  8145. defparam asyncreset_ctrl_X59_Y6_N0.coord_x = 18;
  8146. defparam asyncreset_ctrl_X59_Y6_N0.coord_y = 6;
  8147. defparam asyncreset_ctrl_X59_Y6_N0.coord_z = 0;
  8148. defparam asyncreset_ctrl_X59_Y6_N0.AsyncCtrlMux = 2'b10;
  8149. alta_asyncctrl asyncreset_ctrl_X59_Y6_N1(
  8150. .Din(),
  8151. .Dout(AsyncReset_X59_Y6_GND));
  8152. defparam asyncreset_ctrl_X59_Y6_N1.coord_x = 18;
  8153. defparam asyncreset_ctrl_X59_Y6_N1.coord_y = 6;
  8154. defparam asyncreset_ctrl_X59_Y6_N1.coord_z = 1;
  8155. defparam asyncreset_ctrl_X59_Y6_N1.AsyncCtrlMux = 2'b00;
  8156. alta_asyncctrl asyncreset_ctrl_X59_Y7_N0(
  8157. .Din(\sys_resetn~clkctrl_outclk ),
  8158. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ));
  8159. defparam asyncreset_ctrl_X59_Y7_N0.coord_x = 17;
  8160. defparam asyncreset_ctrl_X59_Y7_N0.coord_y = 7;
  8161. defparam asyncreset_ctrl_X59_Y7_N0.coord_z = 0;
  8162. defparam asyncreset_ctrl_X59_Y7_N0.AsyncCtrlMux = 2'b10;
  8163. alta_asyncctrl asyncreset_ctrl_X59_Y8_N0(
  8164. .Din(\sys_resetn~clkctrl_outclk ),
  8165. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ));
  8166. defparam asyncreset_ctrl_X59_Y8_N0.coord_x = 19;
  8167. defparam asyncreset_ctrl_X59_Y8_N0.coord_y = 8;
  8168. defparam asyncreset_ctrl_X59_Y8_N0.coord_z = 0;
  8169. defparam asyncreset_ctrl_X59_Y8_N0.AsyncCtrlMux = 2'b10;
  8170. alta_asyncctrl asyncreset_ctrl_X59_Y9_N0(
  8171. .Din(),
  8172. .Dout(AsyncReset_X59_Y9_GND));
  8173. defparam asyncreset_ctrl_X59_Y9_N0.coord_x = 19;
  8174. defparam asyncreset_ctrl_X59_Y9_N0.coord_y = 10;
  8175. defparam asyncreset_ctrl_X59_Y9_N0.coord_z = 0;
  8176. defparam asyncreset_ctrl_X59_Y9_N0.AsyncCtrlMux = 2'b00;
  8177. alta_asyncctrl asyncreset_ctrl_X59_Y9_N1(
  8178. .Din(\sys_resetn~clkctrl_outclk ),
  8179. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ));
  8180. defparam asyncreset_ctrl_X59_Y9_N1.coord_x = 19;
  8181. defparam asyncreset_ctrl_X59_Y9_N1.coord_y = 10;
  8182. defparam asyncreset_ctrl_X59_Y9_N1.coord_z = 1;
  8183. defparam asyncreset_ctrl_X59_Y9_N1.AsyncCtrlMux = 2'b10;
  8184. alta_asyncctrl asyncreset_ctrl_X60_Y10_N1(
  8185. .Din(\sys_resetn~clkctrl_outclk ),
  8186. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ));
  8187. defparam asyncreset_ctrl_X60_Y10_N1.coord_x = 20;
  8188. defparam asyncreset_ctrl_X60_Y10_N1.coord_y = 9;
  8189. defparam asyncreset_ctrl_X60_Y10_N1.coord_z = 1;
  8190. defparam asyncreset_ctrl_X60_Y10_N1.AsyncCtrlMux = 2'b10;
  8191. alta_asyncctrl asyncreset_ctrl_X60_Y11_N0(
  8192. .Din(\sys_resetn~clkctrl_outclk ),
  8193. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ));
  8194. defparam asyncreset_ctrl_X60_Y11_N0.coord_x = 18;
  8195. defparam asyncreset_ctrl_X60_Y11_N0.coord_y = 11;
  8196. defparam asyncreset_ctrl_X60_Y11_N0.coord_z = 0;
  8197. defparam asyncreset_ctrl_X60_Y11_N0.AsyncCtrlMux = 2'b10;
  8198. alta_asyncctrl asyncreset_ctrl_X60_Y12_N0(
  8199. .Din(\sys_resetn~clkctrl_outclk ),
  8200. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ));
  8201. defparam asyncreset_ctrl_X60_Y12_N0.coord_x = 15;
  8202. defparam asyncreset_ctrl_X60_Y12_N0.coord_y = 12;
  8203. defparam asyncreset_ctrl_X60_Y12_N0.coord_z = 0;
  8204. defparam asyncreset_ctrl_X60_Y12_N0.AsyncCtrlMux = 2'b10;
  8205. alta_asyncctrl asyncreset_ctrl_X60_Y12_N1(
  8206. .Din(),
  8207. .Dout(AsyncReset_X60_Y12_GND));
  8208. defparam asyncreset_ctrl_X60_Y12_N1.coord_x = 15;
  8209. defparam asyncreset_ctrl_X60_Y12_N1.coord_y = 12;
  8210. defparam asyncreset_ctrl_X60_Y12_N1.coord_z = 1;
  8211. defparam asyncreset_ctrl_X60_Y12_N1.AsyncCtrlMux = 2'b00;
  8212. alta_asyncctrl asyncreset_ctrl_X60_Y1_N0(
  8213. .Din(\sys_resetn~clkctrl_outclk ),
  8214. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ));
  8215. defparam asyncreset_ctrl_X60_Y1_N0.coord_x = 11;
  8216. defparam asyncreset_ctrl_X60_Y1_N0.coord_y = 1;
  8217. defparam asyncreset_ctrl_X60_Y1_N0.coord_z = 0;
  8218. defparam asyncreset_ctrl_X60_Y1_N0.AsyncCtrlMux = 2'b10;
  8219. alta_asyncctrl asyncreset_ctrl_X60_Y2_N0(
  8220. .Din(\sys_resetn~clkctrl_outclk ),
  8221. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ));
  8222. defparam asyncreset_ctrl_X60_Y2_N0.coord_x = 15;
  8223. defparam asyncreset_ctrl_X60_Y2_N0.coord_y = 3;
  8224. defparam asyncreset_ctrl_X60_Y2_N0.coord_z = 0;
  8225. defparam asyncreset_ctrl_X60_Y2_N0.AsyncCtrlMux = 2'b10;
  8226. alta_asyncctrl asyncreset_ctrl_X60_Y3_N0(
  8227. .Din(\sys_resetn~clkctrl_outclk ),
  8228. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ));
  8229. defparam asyncreset_ctrl_X60_Y3_N0.coord_x = 14;
  8230. defparam asyncreset_ctrl_X60_Y3_N0.coord_y = 6;
  8231. defparam asyncreset_ctrl_X60_Y3_N0.coord_z = 0;
  8232. defparam asyncreset_ctrl_X60_Y3_N0.AsyncCtrlMux = 2'b10;
  8233. alta_asyncctrl asyncreset_ctrl_X60_Y4_N0(
  8234. .Din(\sys_resetn~clkctrl_outclk ),
  8235. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ));
  8236. defparam asyncreset_ctrl_X60_Y4_N0.coord_x = 16;
  8237. defparam asyncreset_ctrl_X60_Y4_N0.coord_y = 7;
  8238. defparam asyncreset_ctrl_X60_Y4_N0.coord_z = 0;
  8239. defparam asyncreset_ctrl_X60_Y4_N0.AsyncCtrlMux = 2'b10;
  8240. alta_asyncctrl asyncreset_ctrl_X60_Y5_N0(
  8241. .Din(\sys_resetn~clkctrl_outclk ),
  8242. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ));
  8243. defparam asyncreset_ctrl_X60_Y5_N0.coord_x = 15;
  8244. defparam asyncreset_ctrl_X60_Y5_N0.coord_y = 6;
  8245. defparam asyncreset_ctrl_X60_Y5_N0.coord_z = 0;
  8246. defparam asyncreset_ctrl_X60_Y5_N0.AsyncCtrlMux = 2'b10;
  8247. alta_asyncctrl asyncreset_ctrl_X60_Y6_N0(
  8248. .Din(\sys_resetn~clkctrl_outclk ),
  8249. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ));
  8250. defparam asyncreset_ctrl_X60_Y6_N0.coord_x = 18;
  8251. defparam asyncreset_ctrl_X60_Y6_N0.coord_y = 7;
  8252. defparam asyncreset_ctrl_X60_Y6_N0.coord_z = 0;
  8253. defparam asyncreset_ctrl_X60_Y6_N0.AsyncCtrlMux = 2'b10;
  8254. alta_asyncctrl asyncreset_ctrl_X60_Y7_N0(
  8255. .Din(\sys_resetn~clkctrl_outclk ),
  8256. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ));
  8257. defparam asyncreset_ctrl_X60_Y7_N0.coord_x = 18;
  8258. defparam asyncreset_ctrl_X60_Y7_N0.coord_y = 9;
  8259. defparam asyncreset_ctrl_X60_Y7_N0.coord_z = 0;
  8260. defparam asyncreset_ctrl_X60_Y7_N0.AsyncCtrlMux = 2'b10;
  8261. alta_asyncctrl asyncreset_ctrl_X60_Y8_N0(
  8262. .Din(\sys_resetn~clkctrl_outclk ),
  8263. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ));
  8264. defparam asyncreset_ctrl_X60_Y8_N0.coord_x = 17;
  8265. defparam asyncreset_ctrl_X60_Y8_N0.coord_y = 8;
  8266. defparam asyncreset_ctrl_X60_Y8_N0.coord_z = 0;
  8267. defparam asyncreset_ctrl_X60_Y8_N0.AsyncCtrlMux = 2'b10;
  8268. alta_asyncctrl asyncreset_ctrl_X60_Y9_N0(
  8269. .Din(\sys_resetn~clkctrl_outclk ),
  8270. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ));
  8271. defparam asyncreset_ctrl_X60_Y9_N0.coord_x = 18;
  8272. defparam asyncreset_ctrl_X60_Y9_N0.coord_y = 10;
  8273. defparam asyncreset_ctrl_X60_Y9_N0.coord_z = 0;
  8274. defparam asyncreset_ctrl_X60_Y9_N0.AsyncCtrlMux = 2'b10;
  8275. alta_asyncctrl asyncreset_ctrl_X60_Y9_N1(
  8276. .Din(),
  8277. .Dout(AsyncReset_X60_Y9_GND));
  8278. defparam asyncreset_ctrl_X60_Y9_N1.coord_x = 18;
  8279. defparam asyncreset_ctrl_X60_Y9_N1.coord_y = 10;
  8280. defparam asyncreset_ctrl_X60_Y9_N1.coord_z = 1;
  8281. defparam asyncreset_ctrl_X60_Y9_N1.AsyncCtrlMux = 2'b00;
  8282. alta_asyncctrl asyncreset_ctrl_X61_Y10_N0(
  8283. .Din(),
  8284. .Dout(AsyncReset_X61_Y10_GND));
  8285. defparam asyncreset_ctrl_X61_Y10_N0.coord_x = 17;
  8286. defparam asyncreset_ctrl_X61_Y10_N0.coord_y = 10;
  8287. defparam asyncreset_ctrl_X61_Y10_N0.coord_z = 0;
  8288. defparam asyncreset_ctrl_X61_Y10_N0.AsyncCtrlMux = 2'b00;
  8289. alta_asyncctrl asyncreset_ctrl_X61_Y10_N1(
  8290. .Din(\sys_resetn~clkctrl_outclk ),
  8291. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ));
  8292. defparam asyncreset_ctrl_X61_Y10_N1.coord_x = 17;
  8293. defparam asyncreset_ctrl_X61_Y10_N1.coord_y = 10;
  8294. defparam asyncreset_ctrl_X61_Y10_N1.coord_z = 1;
  8295. defparam asyncreset_ctrl_X61_Y10_N1.AsyncCtrlMux = 2'b10;
  8296. alta_asyncctrl asyncreset_ctrl_X61_Y11_N0(
  8297. .Din(\sys_resetn~clkctrl_outclk ),
  8298. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ));
  8299. defparam asyncreset_ctrl_X61_Y11_N0.coord_x = 17;
  8300. defparam asyncreset_ctrl_X61_Y11_N0.coord_y = 11;
  8301. defparam asyncreset_ctrl_X61_Y11_N0.coord_z = 0;
  8302. defparam asyncreset_ctrl_X61_Y11_N0.AsyncCtrlMux = 2'b10;
  8303. alta_asyncctrl asyncreset_ctrl_X61_Y12_N0(
  8304. .Din(),
  8305. .Dout(AsyncReset_X61_Y12_GND));
  8306. defparam asyncreset_ctrl_X61_Y12_N0.coord_x = 14;
  8307. defparam asyncreset_ctrl_X61_Y12_N0.coord_y = 8;
  8308. defparam asyncreset_ctrl_X61_Y12_N0.coord_z = 0;
  8309. defparam asyncreset_ctrl_X61_Y12_N0.AsyncCtrlMux = 2'b00;
  8310. alta_asyncctrl asyncreset_ctrl_X61_Y12_N1(
  8311. .Din(\sys_resetn~clkctrl_outclk ),
  8312. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ));
  8313. defparam asyncreset_ctrl_X61_Y12_N1.coord_x = 14;
  8314. defparam asyncreset_ctrl_X61_Y12_N1.coord_y = 8;
  8315. defparam asyncreset_ctrl_X61_Y12_N1.coord_z = 1;
  8316. defparam asyncreset_ctrl_X61_Y12_N1.AsyncCtrlMux = 2'b10;
  8317. alta_asyncctrl asyncreset_ctrl_X61_Y1_N0(
  8318. .Din(\sys_resetn~clkctrl_outclk ),
  8319. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ));
  8320. defparam asyncreset_ctrl_X61_Y1_N0.coord_x = 8;
  8321. defparam asyncreset_ctrl_X61_Y1_N0.coord_y = 2;
  8322. defparam asyncreset_ctrl_X61_Y1_N0.coord_z = 0;
  8323. defparam asyncreset_ctrl_X61_Y1_N0.AsyncCtrlMux = 2'b10;
  8324. alta_asyncctrl asyncreset_ctrl_X61_Y1_N1(
  8325. .Din(),
  8326. .Dout(AsyncReset_X61_Y1_GND));
  8327. defparam asyncreset_ctrl_X61_Y1_N1.coord_x = 8;
  8328. defparam asyncreset_ctrl_X61_Y1_N1.coord_y = 2;
  8329. defparam asyncreset_ctrl_X61_Y1_N1.coord_z = 1;
  8330. defparam asyncreset_ctrl_X61_Y1_N1.AsyncCtrlMux = 2'b00;
  8331. alta_asyncctrl asyncreset_ctrl_X61_Y2_N0(
  8332. .Din(\sys_resetn~clkctrl_outclk ),
  8333. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ));
  8334. defparam asyncreset_ctrl_X61_Y2_N0.coord_x = 15;
  8335. defparam asyncreset_ctrl_X61_Y2_N0.coord_y = 1;
  8336. defparam asyncreset_ctrl_X61_Y2_N0.coord_z = 0;
  8337. defparam asyncreset_ctrl_X61_Y2_N0.AsyncCtrlMux = 2'b10;
  8338. alta_asyncctrl asyncreset_ctrl_X61_Y3_N0(
  8339. .Din(\sys_resetn~clkctrl_outclk ),
  8340. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ));
  8341. defparam asyncreset_ctrl_X61_Y3_N0.coord_x = 14;
  8342. defparam asyncreset_ctrl_X61_Y3_N0.coord_y = 7;
  8343. defparam asyncreset_ctrl_X61_Y3_N0.coord_z = 0;
  8344. defparam asyncreset_ctrl_X61_Y3_N0.AsyncCtrlMux = 2'b10;
  8345. alta_asyncctrl asyncreset_ctrl_X61_Y4_N0(
  8346. .Din(\sys_resetn~clkctrl_outclk ),
  8347. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ));
  8348. defparam asyncreset_ctrl_X61_Y4_N0.coord_x = 14;
  8349. defparam asyncreset_ctrl_X61_Y4_N0.coord_y = 9;
  8350. defparam asyncreset_ctrl_X61_Y4_N0.coord_z = 0;
  8351. defparam asyncreset_ctrl_X61_Y4_N0.AsyncCtrlMux = 2'b10;
  8352. alta_asyncctrl asyncreset_ctrl_X61_Y4_N1(
  8353. .Din(),
  8354. .Dout(AsyncReset_X61_Y4_GND));
  8355. defparam asyncreset_ctrl_X61_Y4_N1.coord_x = 14;
  8356. defparam asyncreset_ctrl_X61_Y4_N1.coord_y = 9;
  8357. defparam asyncreset_ctrl_X61_Y4_N1.coord_z = 1;
  8358. defparam asyncreset_ctrl_X61_Y4_N1.AsyncCtrlMux = 2'b00;
  8359. alta_asyncctrl asyncreset_ctrl_X61_Y5_N0(
  8360. .Din(\sys_resetn~clkctrl_outclk ),
  8361. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ));
  8362. defparam asyncreset_ctrl_X61_Y5_N0.coord_x = 15;
  8363. defparam asyncreset_ctrl_X61_Y5_N0.coord_y = 8;
  8364. defparam asyncreset_ctrl_X61_Y5_N0.coord_z = 0;
  8365. defparam asyncreset_ctrl_X61_Y5_N0.AsyncCtrlMux = 2'b10;
  8366. alta_asyncctrl asyncreset_ctrl_X61_Y6_N0(
  8367. .Din(\sys_resetn~clkctrl_outclk ),
  8368. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ));
  8369. defparam asyncreset_ctrl_X61_Y6_N0.coord_x = 16;
  8370. defparam asyncreset_ctrl_X61_Y6_N0.coord_y = 8;
  8371. defparam asyncreset_ctrl_X61_Y6_N0.coord_z = 0;
  8372. defparam asyncreset_ctrl_X61_Y6_N0.AsyncCtrlMux = 2'b10;
  8373. alta_asyncctrl asyncreset_ctrl_X61_Y7_N0(
  8374. .Din(\sys_resetn~clkctrl_outclk ),
  8375. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ));
  8376. defparam asyncreset_ctrl_X61_Y7_N0.coord_x = 17;
  8377. defparam asyncreset_ctrl_X61_Y7_N0.coord_y = 9;
  8378. defparam asyncreset_ctrl_X61_Y7_N0.coord_z = 0;
  8379. defparam asyncreset_ctrl_X61_Y7_N0.AsyncCtrlMux = 2'b10;
  8380. alta_asyncctrl asyncreset_ctrl_X61_Y8_N0(
  8381. .Din(\sys_resetn~clkctrl_outclk ),
  8382. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ));
  8383. defparam asyncreset_ctrl_X61_Y8_N0.coord_x = 15;
  8384. defparam asyncreset_ctrl_X61_Y8_N0.coord_y = 9;
  8385. defparam asyncreset_ctrl_X61_Y8_N0.coord_z = 0;
  8386. defparam asyncreset_ctrl_X61_Y8_N0.AsyncCtrlMux = 2'b10;
  8387. alta_asyncctrl asyncreset_ctrl_X61_Y9_N0(
  8388. .Din(\sys_resetn~clkctrl_outclk ),
  8389. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ));
  8390. defparam asyncreset_ctrl_X61_Y9_N0.coord_x = 15;
  8391. defparam asyncreset_ctrl_X61_Y9_N0.coord_y = 10;
  8392. defparam asyncreset_ctrl_X61_Y9_N0.coord_z = 0;
  8393. defparam asyncreset_ctrl_X61_Y9_N0.AsyncCtrlMux = 2'b10;
  8394. alta_asyncctrl asyncreset_ctrl_X61_Y9_N1(
  8395. .Din(),
  8396. .Dout(AsyncReset_X61_Y9_GND));
  8397. defparam asyncreset_ctrl_X61_Y9_N1.coord_x = 15;
  8398. defparam asyncreset_ctrl_X61_Y9_N1.coord_y = 10;
  8399. defparam asyncreset_ctrl_X61_Y9_N1.coord_z = 1;
  8400. defparam asyncreset_ctrl_X61_Y9_N1.AsyncCtrlMux = 2'b00;
  8401. alta_asyncctrl asyncreset_ctrl_X62_Y10_N0(
  8402. .Din(\sys_resetn~clkctrl_outclk ),
  8403. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ));
  8404. defparam asyncreset_ctrl_X62_Y10_N0.coord_x = 16;
  8405. defparam asyncreset_ctrl_X62_Y10_N0.coord_y = 11;
  8406. defparam asyncreset_ctrl_X62_Y10_N0.coord_z = 0;
  8407. defparam asyncreset_ctrl_X62_Y10_N0.AsyncCtrlMux = 2'b10;
  8408. alta_asyncctrl asyncreset_ctrl_X62_Y10_N1(
  8409. .Din(),
  8410. .Dout(AsyncReset_X62_Y10_GND));
  8411. defparam asyncreset_ctrl_X62_Y10_N1.coord_x = 16;
  8412. defparam asyncreset_ctrl_X62_Y10_N1.coord_y = 11;
  8413. defparam asyncreset_ctrl_X62_Y10_N1.coord_z = 1;
  8414. defparam asyncreset_ctrl_X62_Y10_N1.AsyncCtrlMux = 2'b00;
  8415. alta_asyncctrl asyncreset_ctrl_X62_Y11_N0(
  8416. .Din(),
  8417. .Dout(AsyncReset_X62_Y11_GND));
  8418. defparam asyncreset_ctrl_X62_Y11_N0.coord_x = 18;
  8419. defparam asyncreset_ctrl_X62_Y11_N0.coord_y = 12;
  8420. defparam asyncreset_ctrl_X62_Y11_N0.coord_z = 0;
  8421. defparam asyncreset_ctrl_X62_Y11_N0.AsyncCtrlMux = 2'b00;
  8422. alta_asyncctrl asyncreset_ctrl_X62_Y11_N1(
  8423. .Din(\sys_resetn~clkctrl_outclk ),
  8424. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ));
  8425. defparam asyncreset_ctrl_X62_Y11_N1.coord_x = 18;
  8426. defparam asyncreset_ctrl_X62_Y11_N1.coord_y = 12;
  8427. defparam asyncreset_ctrl_X62_Y11_N1.coord_z = 1;
  8428. defparam asyncreset_ctrl_X62_Y11_N1.AsyncCtrlMux = 2'b10;
  8429. alta_asyncctrl asyncreset_ctrl_X62_Y12_N0(
  8430. .Din(),
  8431. .Dout(AsyncReset_X62_Y12_GND));
  8432. defparam asyncreset_ctrl_X62_Y12_N0.coord_x = 14;
  8433. defparam asyncreset_ctrl_X62_Y12_N0.coord_y = 11;
  8434. defparam asyncreset_ctrl_X62_Y12_N0.coord_z = 0;
  8435. defparam asyncreset_ctrl_X62_Y12_N0.AsyncCtrlMux = 2'b00;
  8436. alta_asyncctrl asyncreset_ctrl_X62_Y12_N1(
  8437. .Din(\sys_resetn~clkctrl_outclk ),
  8438. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ));
  8439. defparam asyncreset_ctrl_X62_Y12_N1.coord_x = 14;
  8440. defparam asyncreset_ctrl_X62_Y12_N1.coord_y = 11;
  8441. defparam asyncreset_ctrl_X62_Y12_N1.coord_z = 1;
  8442. defparam asyncreset_ctrl_X62_Y12_N1.AsyncCtrlMux = 2'b10;
  8443. alta_asyncctrl asyncreset_ctrl_X62_Y1_N0(
  8444. .Din(\sys_resetn~clkctrl_outclk ),
  8445. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ));
  8446. defparam asyncreset_ctrl_X62_Y1_N0.coord_x = 8;
  8447. defparam asyncreset_ctrl_X62_Y1_N0.coord_y = 1;
  8448. defparam asyncreset_ctrl_X62_Y1_N0.coord_z = 0;
  8449. defparam asyncreset_ctrl_X62_Y1_N0.AsyncCtrlMux = 2'b10;
  8450. alta_asyncctrl asyncreset_ctrl_X62_Y1_N1(
  8451. .Din(),
  8452. .Dout(AsyncReset_X62_Y1_GND));
  8453. defparam asyncreset_ctrl_X62_Y1_N1.coord_x = 8;
  8454. defparam asyncreset_ctrl_X62_Y1_N1.coord_y = 1;
  8455. defparam asyncreset_ctrl_X62_Y1_N1.coord_z = 1;
  8456. defparam asyncreset_ctrl_X62_Y1_N1.AsyncCtrlMux = 2'b00;
  8457. alta_asyncctrl asyncreset_ctrl_X62_Y2_N0(
  8458. .Din(\sys_resetn~clkctrl_outclk ),
  8459. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ));
  8460. defparam asyncreset_ctrl_X62_Y2_N0.coord_x = 11;
  8461. defparam asyncreset_ctrl_X62_Y2_N0.coord_y = 2;
  8462. defparam asyncreset_ctrl_X62_Y2_N0.coord_z = 0;
  8463. defparam asyncreset_ctrl_X62_Y2_N0.AsyncCtrlMux = 2'b10;
  8464. alta_asyncctrl asyncreset_ctrl_X62_Y3_N0(
  8465. .Din(\sys_resetn~clkctrl_outclk ),
  8466. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ));
  8467. defparam asyncreset_ctrl_X62_Y3_N0.coord_x = 11;
  8468. defparam asyncreset_ctrl_X62_Y3_N0.coord_y = 4;
  8469. defparam asyncreset_ctrl_X62_Y3_N0.coord_z = 0;
  8470. defparam asyncreset_ctrl_X62_Y3_N0.AsyncCtrlMux = 2'b10;
  8471. alta_asyncctrl asyncreset_ctrl_X62_Y3_N1(
  8472. .Din(),
  8473. .Dout(AsyncReset_X62_Y3_GND));
  8474. defparam asyncreset_ctrl_X62_Y3_N1.coord_x = 11;
  8475. defparam asyncreset_ctrl_X62_Y3_N1.coord_y = 4;
  8476. defparam asyncreset_ctrl_X62_Y3_N1.coord_z = 1;
  8477. defparam asyncreset_ctrl_X62_Y3_N1.AsyncCtrlMux = 2'b00;
  8478. alta_asyncctrl asyncreset_ctrl_X62_Y4_N0(
  8479. .Din(),
  8480. .Dout(AsyncReset_X62_Y4_GND));
  8481. defparam asyncreset_ctrl_X62_Y4_N0.coord_x = 20;
  8482. defparam asyncreset_ctrl_X62_Y4_N0.coord_y = 1;
  8483. defparam asyncreset_ctrl_X62_Y4_N0.coord_z = 0;
  8484. defparam asyncreset_ctrl_X62_Y4_N0.AsyncCtrlMux = 2'b00;
  8485. alta_asyncctrl asyncreset_ctrl_X62_Y4_N1(
  8486. .Din(\sys_resetn~clkctrl_outclk ),
  8487. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ));
  8488. defparam asyncreset_ctrl_X62_Y4_N1.coord_x = 20;
  8489. defparam asyncreset_ctrl_X62_Y4_N1.coord_y = 1;
  8490. defparam asyncreset_ctrl_X62_Y4_N1.coord_z = 1;
  8491. defparam asyncreset_ctrl_X62_Y4_N1.AsyncCtrlMux = 2'b10;
  8492. alta_asyncctrl asyncreset_ctrl_X62_Y5_N0(
  8493. .Din(),
  8494. .Dout(AsyncReset_X62_Y5_GND));
  8495. defparam asyncreset_ctrl_X62_Y5_N0.coord_x = 14;
  8496. defparam asyncreset_ctrl_X62_Y5_N0.coord_y = 1;
  8497. defparam asyncreset_ctrl_X62_Y5_N0.coord_z = 0;
  8498. defparam asyncreset_ctrl_X62_Y5_N0.AsyncCtrlMux = 2'b00;
  8499. alta_asyncctrl asyncreset_ctrl_X62_Y5_N1(
  8500. .Din(\sys_resetn~clkctrl_outclk ),
  8501. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ));
  8502. defparam asyncreset_ctrl_X62_Y5_N1.coord_x = 14;
  8503. defparam asyncreset_ctrl_X62_Y5_N1.coord_y = 1;
  8504. defparam asyncreset_ctrl_X62_Y5_N1.coord_z = 1;
  8505. defparam asyncreset_ctrl_X62_Y5_N1.AsyncCtrlMux = 2'b10;
  8506. alta_asyncctrl asyncreset_ctrl_X62_Y6_N0(
  8507. .Din(\sys_resetn~clkctrl_outclk ),
  8508. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ));
  8509. defparam asyncreset_ctrl_X62_Y6_N0.coord_x = 15;
  8510. defparam asyncreset_ctrl_X62_Y6_N0.coord_y = 11;
  8511. defparam asyncreset_ctrl_X62_Y6_N0.coord_z = 0;
  8512. defparam asyncreset_ctrl_X62_Y6_N0.AsyncCtrlMux = 2'b10;
  8513. alta_asyncctrl asyncreset_ctrl_X62_Y6_N1(
  8514. .Din(),
  8515. .Dout(AsyncReset_X62_Y6_GND));
  8516. defparam asyncreset_ctrl_X62_Y6_N1.coord_x = 15;
  8517. defparam asyncreset_ctrl_X62_Y6_N1.coord_y = 11;
  8518. defparam asyncreset_ctrl_X62_Y6_N1.coord_z = 1;
  8519. defparam asyncreset_ctrl_X62_Y6_N1.AsyncCtrlMux = 2'b00;
  8520. alta_asyncctrl asyncreset_ctrl_X62_Y7_N0(
  8521. .Din(\sys_resetn~clkctrl_outclk ),
  8522. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ));
  8523. defparam asyncreset_ctrl_X62_Y7_N0.coord_x = 17;
  8524. defparam asyncreset_ctrl_X62_Y7_N0.coord_y = 12;
  8525. defparam asyncreset_ctrl_X62_Y7_N0.coord_z = 0;
  8526. defparam asyncreset_ctrl_X62_Y7_N0.AsyncCtrlMux = 2'b10;
  8527. alta_asyncctrl asyncreset_ctrl_X62_Y7_N1(
  8528. .Din(),
  8529. .Dout(AsyncReset_X62_Y7_GND));
  8530. defparam asyncreset_ctrl_X62_Y7_N1.coord_x = 17;
  8531. defparam asyncreset_ctrl_X62_Y7_N1.coord_y = 12;
  8532. defparam asyncreset_ctrl_X62_Y7_N1.coord_z = 1;
  8533. defparam asyncreset_ctrl_X62_Y7_N1.AsyncCtrlMux = 2'b00;
  8534. alta_asyncctrl asyncreset_ctrl_X62_Y8_N0(
  8535. .Din(\sys_resetn~clkctrl_outclk ),
  8536. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ));
  8537. defparam asyncreset_ctrl_X62_Y8_N0.coord_x = 16;
  8538. defparam asyncreset_ctrl_X62_Y8_N0.coord_y = 9;
  8539. defparam asyncreset_ctrl_X62_Y8_N0.coord_z = 0;
  8540. defparam asyncreset_ctrl_X62_Y8_N0.AsyncCtrlMux = 2'b10;
  8541. alta_asyncctrl asyncreset_ctrl_X62_Y9_N0(
  8542. .Din(\sys_resetn~clkctrl_outclk ),
  8543. .Dout(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ));
  8544. defparam asyncreset_ctrl_X62_Y9_N0.coord_x = 16;
  8545. defparam asyncreset_ctrl_X62_Y9_N0.coord_y = 10;
  8546. defparam asyncreset_ctrl_X62_Y9_N0.coord_z = 0;
  8547. defparam asyncreset_ctrl_X62_Y9_N0.AsyncCtrlMux = 2'b10;
  8548. alta_asyncctrl asyncreset_ctrl_X62_Y9_N1(
  8549. .Din(),
  8550. .Dout(AsyncReset_X62_Y9_GND));
  8551. defparam asyncreset_ctrl_X62_Y9_N1.coord_x = 16;
  8552. defparam asyncreset_ctrl_X62_Y9_N1.coord_y = 10;
  8553. defparam asyncreset_ctrl_X62_Y9_N1.coord_z = 1;
  8554. defparam asyncreset_ctrl_X62_Y9_N1.AsyncCtrlMux = 2'b00;
  8555. alta_io_gclk bus_clk_gclk(
  8556. .inclk(\pll_inst|auto_generated|pll1_CLK_bus [3]),
  8557. .outclk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ));
  8558. defparam bus_clk_gclk.coord_x = 22;
  8559. defparam bus_clk_gclk.coord_y = 4;
  8560. defparam bus_clk_gclk.coord_z = 1;
  8561. alta_clkenctrl clken_ctrl_X43_Y1_N0(
  8562. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8563. .ClkEn(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout ),
  8564. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout_X43_Y1_SIG_SIG ));
  8565. defparam clken_ctrl_X43_Y1_N0.coord_x = 5;
  8566. defparam clken_ctrl_X43_Y1_N0.coord_y = 1;
  8567. defparam clken_ctrl_X43_Y1_N0.coord_z = 0;
  8568. defparam clken_ctrl_X43_Y1_N0.ClkMux = 2'b10;
  8569. defparam clken_ctrl_X43_Y1_N0.ClkEnMux = 2'b10;
  8570. alta_clkenctrl clken_ctrl_X43_Y1_N1(
  8571. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8572. .ClkEn(),
  8573. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ));
  8574. defparam clken_ctrl_X43_Y1_N1.coord_x = 5;
  8575. defparam clken_ctrl_X43_Y1_N1.coord_y = 1;
  8576. defparam clken_ctrl_X43_Y1_N1.coord_z = 1;
  8577. defparam clken_ctrl_X43_Y1_N1.ClkMux = 2'b10;
  8578. defparam clken_ctrl_X43_Y1_N1.ClkEnMux = 2'b01;
  8579. alta_clkenctrl clken_ctrl_X43_Y2_N0(
  8580. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8581. .ClkEn(\macro_inst|u_uart[0]|u_rx[4]|always4~2_combout ),
  8582. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ));
  8583. defparam clken_ctrl_X43_Y2_N0.coord_x = 2;
  8584. defparam clken_ctrl_X43_Y2_N0.coord_y = 2;
  8585. defparam clken_ctrl_X43_Y2_N0.coord_z = 0;
  8586. defparam clken_ctrl_X43_Y2_N0.ClkMux = 2'b10;
  8587. defparam clken_ctrl_X43_Y2_N0.ClkEnMux = 2'b10;
  8588. alta_clkenctrl clken_ctrl_X43_Y2_N1(
  8589. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8590. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  8591. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X43_Y2_SIG_SIG ));
  8592. defparam clken_ctrl_X43_Y2_N1.coord_x = 2;
  8593. defparam clken_ctrl_X43_Y2_N1.coord_y = 2;
  8594. defparam clken_ctrl_X43_Y2_N1.coord_z = 1;
  8595. defparam clken_ctrl_X43_Y2_N1.ClkMux = 2'b10;
  8596. defparam clken_ctrl_X43_Y2_N1.ClkEnMux = 2'b10;
  8597. alta_clkenctrl clken_ctrl_X43_Y3_N0(
  8598. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8599. .ClkEn(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout ),
  8600. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout_X43_Y3_SIG_SIG ));
  8601. defparam clken_ctrl_X43_Y3_N0.coord_x = 1;
  8602. defparam clken_ctrl_X43_Y3_N0.coord_y = 1;
  8603. defparam clken_ctrl_X43_Y3_N0.coord_z = 0;
  8604. defparam clken_ctrl_X43_Y3_N0.ClkMux = 2'b10;
  8605. defparam clken_ctrl_X43_Y3_N0.ClkEnMux = 2'b10;
  8606. alta_clkenctrl clken_ctrl_X43_Y3_N1(
  8607. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8608. .ClkEn(),
  8609. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ));
  8610. defparam clken_ctrl_X43_Y3_N1.coord_x = 1;
  8611. defparam clken_ctrl_X43_Y3_N1.coord_y = 1;
  8612. defparam clken_ctrl_X43_Y3_N1.coord_z = 1;
  8613. defparam clken_ctrl_X43_Y3_N1.ClkMux = 2'b10;
  8614. defparam clken_ctrl_X43_Y3_N1.ClkEnMux = 2'b01;
  8615. alta_clkenctrl clken_ctrl_X43_Y4_N0(
  8616. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8617. .ClkEn(),
  8618. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ));
  8619. defparam clken_ctrl_X43_Y4_N0.coord_x = 20;
  8620. defparam clken_ctrl_X43_Y4_N0.coord_y = 2;
  8621. defparam clken_ctrl_X43_Y4_N0.coord_z = 0;
  8622. defparam clken_ctrl_X43_Y4_N0.ClkMux = 2'b10;
  8623. defparam clken_ctrl_X43_Y4_N0.ClkEnMux = 2'b01;
  8624. alta_clkenctrl clken_ctrl_X44_Y1_N0(
  8625. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8626. .ClkEn(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout ),
  8627. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ));
  8628. defparam clken_ctrl_X44_Y1_N0.coord_x = 4;
  8629. defparam clken_ctrl_X44_Y1_N0.coord_y = 1;
  8630. defparam clken_ctrl_X44_Y1_N0.coord_z = 0;
  8631. defparam clken_ctrl_X44_Y1_N0.ClkMux = 2'b10;
  8632. defparam clken_ctrl_X44_Y1_N0.ClkEnMux = 2'b10;
  8633. alta_clkenctrl clken_ctrl_X44_Y1_N1(
  8634. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8635. .ClkEn(\macro_inst|u_uart[0]|u_rx[2]|always4~2_combout ),
  8636. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ));
  8637. defparam clken_ctrl_X44_Y1_N1.coord_x = 4;
  8638. defparam clken_ctrl_X44_Y1_N1.coord_y = 1;
  8639. defparam clken_ctrl_X44_Y1_N1.coord_z = 1;
  8640. defparam clken_ctrl_X44_Y1_N1.ClkMux = 2'b10;
  8641. defparam clken_ctrl_X44_Y1_N1.ClkEnMux = 2'b10;
  8642. alta_clkenctrl clken_ctrl_X44_Y2_N0(
  8643. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8644. .ClkEn(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout ),
  8645. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ));
  8646. defparam clken_ctrl_X44_Y2_N0.coord_x = 3;
  8647. defparam clken_ctrl_X44_Y2_N0.coord_y = 2;
  8648. defparam clken_ctrl_X44_Y2_N0.coord_z = 0;
  8649. defparam clken_ctrl_X44_Y2_N0.ClkMux = 2'b10;
  8650. defparam clken_ctrl_X44_Y2_N0.ClkEnMux = 2'b10;
  8651. alta_clkenctrl clken_ctrl_X44_Y2_N1(
  8652. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8653. .ClkEn(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout ),
  8654. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ));
  8655. defparam clken_ctrl_X44_Y2_N1.coord_x = 3;
  8656. defparam clken_ctrl_X44_Y2_N1.coord_y = 2;
  8657. defparam clken_ctrl_X44_Y2_N1.coord_z = 1;
  8658. defparam clken_ctrl_X44_Y2_N1.ClkMux = 2'b10;
  8659. defparam clken_ctrl_X44_Y2_N1.ClkEnMux = 2'b10;
  8660. alta_clkenctrl clken_ctrl_X44_Y3_N0(
  8661. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8662. .ClkEn(\macro_inst|u_uart[0]|u_rx[5]|always4~2_combout ),
  8663. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ));
  8664. defparam clken_ctrl_X44_Y3_N0.coord_x = 3;
  8665. defparam clken_ctrl_X44_Y3_N0.coord_y = 1;
  8666. defparam clken_ctrl_X44_Y3_N0.coord_z = 0;
  8667. defparam clken_ctrl_X44_Y3_N0.ClkMux = 2'b10;
  8668. defparam clken_ctrl_X44_Y3_N0.ClkEnMux = 2'b10;
  8669. alta_clkenctrl clken_ctrl_X44_Y3_N1(
  8670. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8671. .ClkEn(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout ),
  8672. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y3_SIG_SIG ));
  8673. defparam clken_ctrl_X44_Y3_N1.coord_x = 3;
  8674. defparam clken_ctrl_X44_Y3_N1.coord_y = 1;
  8675. defparam clken_ctrl_X44_Y3_N1.coord_z = 1;
  8676. defparam clken_ctrl_X44_Y3_N1.ClkMux = 2'b10;
  8677. defparam clken_ctrl_X44_Y3_N1.ClkEnMux = 2'b10;
  8678. alta_clkenctrl clken_ctrl_X44_Y4_N0(
  8679. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8680. .ClkEn(),
  8681. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X44_Y4_SIG_VCC ));
  8682. defparam clken_ctrl_X44_Y4_N0.coord_x = 1;
  8683. defparam clken_ctrl_X44_Y4_N0.coord_y = 2;
  8684. defparam clken_ctrl_X44_Y4_N0.coord_z = 0;
  8685. defparam clken_ctrl_X44_Y4_N0.ClkMux = 2'b10;
  8686. defparam clken_ctrl_X44_Y4_N0.ClkEnMux = 2'b01;
  8687. alta_clkenctrl clken_ctrl_X45_Y1_N0(
  8688. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8689. .ClkEn(),
  8690. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ));
  8691. defparam clken_ctrl_X45_Y1_N0.coord_x = 4;
  8692. defparam clken_ctrl_X45_Y1_N0.coord_y = 3;
  8693. defparam clken_ctrl_X45_Y1_N0.coord_z = 0;
  8694. defparam clken_ctrl_X45_Y1_N0.ClkMux = 2'b10;
  8695. defparam clken_ctrl_X45_Y1_N0.ClkEnMux = 2'b01;
  8696. alta_clkenctrl clken_ctrl_X45_Y1_N1(
  8697. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8698. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  8699. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y1_SIG_SIG ));
  8700. defparam clken_ctrl_X45_Y1_N1.coord_x = 4;
  8701. defparam clken_ctrl_X45_Y1_N1.coord_y = 3;
  8702. defparam clken_ctrl_X45_Y1_N1.coord_z = 1;
  8703. defparam clken_ctrl_X45_Y1_N1.ClkMux = 2'b10;
  8704. defparam clken_ctrl_X45_Y1_N1.ClkEnMux = 2'b10;
  8705. alta_clkenctrl clken_ctrl_X45_Y2_N0(
  8706. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8707. .ClkEn(),
  8708. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ));
  8709. defparam clken_ctrl_X45_Y2_N0.coord_x = 4;
  8710. defparam clken_ctrl_X45_Y2_N0.coord_y = 2;
  8711. defparam clken_ctrl_X45_Y2_N0.coord_z = 0;
  8712. defparam clken_ctrl_X45_Y2_N0.ClkMux = 2'b10;
  8713. defparam clken_ctrl_X45_Y2_N0.ClkEnMux = 2'b01;
  8714. alta_clkenctrl clken_ctrl_X45_Y3_N0(
  8715. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8716. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  8717. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ));
  8718. defparam clken_ctrl_X45_Y3_N0.coord_x = 2;
  8719. defparam clken_ctrl_X45_Y3_N0.coord_y = 1;
  8720. defparam clken_ctrl_X45_Y3_N0.coord_z = 0;
  8721. defparam clken_ctrl_X45_Y3_N0.ClkMux = 2'b10;
  8722. defparam clken_ctrl_X45_Y3_N0.ClkEnMux = 2'b10;
  8723. alta_clkenctrl clken_ctrl_X45_Y3_N1(
  8724. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8725. .ClkEn(),
  8726. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ));
  8727. defparam clken_ctrl_X45_Y3_N1.coord_x = 2;
  8728. defparam clken_ctrl_X45_Y3_N1.coord_y = 1;
  8729. defparam clken_ctrl_X45_Y3_N1.coord_z = 1;
  8730. defparam clken_ctrl_X45_Y3_N1.ClkMux = 2'b10;
  8731. defparam clken_ctrl_X45_Y3_N1.ClkEnMux = 2'b01;
  8732. alta_clkenctrl clken_ctrl_X45_Y4_N0(
  8733. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8734. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  8735. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X45_Y4_SIG_SIG ));
  8736. defparam clken_ctrl_X45_Y4_N0.coord_x = 9;
  8737. defparam clken_ctrl_X45_Y4_N0.coord_y = 4;
  8738. defparam clken_ctrl_X45_Y4_N0.coord_z = 0;
  8739. defparam clken_ctrl_X45_Y4_N0.ClkMux = 2'b10;
  8740. defparam clken_ctrl_X45_Y4_N0.ClkEnMux = 2'b10;
  8741. alta_clkenctrl clken_ctrl_X45_Y4_N1(
  8742. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8743. .ClkEn(),
  8744. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y4_SIG_VCC ));
  8745. defparam clken_ctrl_X45_Y4_N1.coord_x = 9;
  8746. defparam clken_ctrl_X45_Y4_N1.coord_y = 4;
  8747. defparam clken_ctrl_X45_Y4_N1.coord_z = 1;
  8748. defparam clken_ctrl_X45_Y4_N1.ClkMux = 2'b10;
  8749. defparam clken_ctrl_X45_Y4_N1.ClkEnMux = 2'b01;
  8750. alta_clkenctrl clken_ctrl_X46_Y1_N0(
  8751. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8752. .ClkEn(),
  8753. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ));
  8754. defparam clken_ctrl_X46_Y1_N0.coord_x = 3;
  8755. defparam clken_ctrl_X46_Y1_N0.coord_y = 3;
  8756. defparam clken_ctrl_X46_Y1_N0.coord_z = 0;
  8757. defparam clken_ctrl_X46_Y1_N0.ClkMux = 2'b10;
  8758. defparam clken_ctrl_X46_Y1_N0.ClkEnMux = 2'b01;
  8759. alta_clkenctrl clken_ctrl_X46_Y1_N1(
  8760. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8761. .ClkEn(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout ),
  8762. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout_X46_Y1_SIG_SIG ));
  8763. defparam clken_ctrl_X46_Y1_N1.coord_x = 3;
  8764. defparam clken_ctrl_X46_Y1_N1.coord_y = 3;
  8765. defparam clken_ctrl_X46_Y1_N1.coord_z = 1;
  8766. defparam clken_ctrl_X46_Y1_N1.ClkMux = 2'b10;
  8767. defparam clken_ctrl_X46_Y1_N1.ClkEnMux = 2'b10;
  8768. alta_clkenctrl clken_ctrl_X46_Y2_N0(
  8769. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8770. .ClkEn(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout ),
  8771. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ));
  8772. defparam clken_ctrl_X46_Y2_N0.coord_x = 7;
  8773. defparam clken_ctrl_X46_Y2_N0.coord_y = 2;
  8774. defparam clken_ctrl_X46_Y2_N0.coord_z = 0;
  8775. defparam clken_ctrl_X46_Y2_N0.ClkMux = 2'b10;
  8776. defparam clken_ctrl_X46_Y2_N0.ClkEnMux = 2'b10;
  8777. alta_clkenctrl clken_ctrl_X46_Y2_N1(
  8778. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8779. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout ),
  8780. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout_X46_Y2_SIG_SIG ));
  8781. defparam clken_ctrl_X46_Y2_N1.coord_x = 7;
  8782. defparam clken_ctrl_X46_Y2_N1.coord_y = 2;
  8783. defparam clken_ctrl_X46_Y2_N1.coord_z = 1;
  8784. defparam clken_ctrl_X46_Y2_N1.ClkMux = 2'b10;
  8785. defparam clken_ctrl_X46_Y2_N1.ClkEnMux = 2'b10;
  8786. alta_clkenctrl clken_ctrl_X46_Y3_N0(
  8787. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8788. .ClkEn(\macro_inst|u_uart[0]|u_rx[1]|always4~2_combout ),
  8789. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ));
  8790. defparam clken_ctrl_X46_Y3_N0.coord_x = 6;
  8791. defparam clken_ctrl_X46_Y3_N0.coord_y = 3;
  8792. defparam clken_ctrl_X46_Y3_N0.coord_z = 0;
  8793. defparam clken_ctrl_X46_Y3_N0.ClkMux = 2'b10;
  8794. defparam clken_ctrl_X46_Y3_N0.ClkEnMux = 2'b10;
  8795. alta_clkenctrl clken_ctrl_X46_Y3_N1(
  8796. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8797. .ClkEn(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  8798. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ));
  8799. defparam clken_ctrl_X46_Y3_N1.coord_x = 6;
  8800. defparam clken_ctrl_X46_Y3_N1.coord_y = 3;
  8801. defparam clken_ctrl_X46_Y3_N1.coord_z = 1;
  8802. defparam clken_ctrl_X46_Y3_N1.ClkMux = 2'b10;
  8803. defparam clken_ctrl_X46_Y3_N1.ClkEnMux = 2'b10;
  8804. alta_clkenctrl clken_ctrl_X46_Y4_N0(
  8805. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8806. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout ),
  8807. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout_X46_Y4_SIG_SIG ));
  8808. defparam clken_ctrl_X46_Y4_N0.coord_x = 17;
  8809. defparam clken_ctrl_X46_Y4_N0.coord_y = 2;
  8810. defparam clken_ctrl_X46_Y4_N0.coord_z = 0;
  8811. defparam clken_ctrl_X46_Y4_N0.ClkMux = 2'b10;
  8812. defparam clken_ctrl_X46_Y4_N0.ClkEnMux = 2'b10;
  8813. alta_clkenctrl clken_ctrl_X46_Y4_N1(
  8814. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8815. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout ),
  8816. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout_X46_Y4_SIG_SIG ));
  8817. defparam clken_ctrl_X46_Y4_N1.coord_x = 17;
  8818. defparam clken_ctrl_X46_Y4_N1.coord_y = 2;
  8819. defparam clken_ctrl_X46_Y4_N1.coord_z = 1;
  8820. defparam clken_ctrl_X46_Y4_N1.ClkMux = 2'b10;
  8821. defparam clken_ctrl_X46_Y4_N1.ClkEnMux = 2'b10;
  8822. alta_clkenctrl clken_ctrl_X47_Y1_N0(
  8823. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8824. .ClkEn(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout ),
  8825. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout_X47_Y1_SIG_SIG ));
  8826. defparam clken_ctrl_X47_Y1_N0.coord_x = 2;
  8827. defparam clken_ctrl_X47_Y1_N0.coord_y = 4;
  8828. defparam clken_ctrl_X47_Y1_N0.coord_z = 0;
  8829. defparam clken_ctrl_X47_Y1_N0.ClkMux = 2'b10;
  8830. defparam clken_ctrl_X47_Y1_N0.ClkEnMux = 2'b10;
  8831. alta_clkenctrl clken_ctrl_X47_Y1_N1(
  8832. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8833. .ClkEn(),
  8834. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ));
  8835. defparam clken_ctrl_X47_Y1_N1.coord_x = 2;
  8836. defparam clken_ctrl_X47_Y1_N1.coord_y = 4;
  8837. defparam clken_ctrl_X47_Y1_N1.coord_z = 1;
  8838. defparam clken_ctrl_X47_Y1_N1.ClkMux = 2'b10;
  8839. defparam clken_ctrl_X47_Y1_N1.ClkEnMux = 2'b01;
  8840. alta_clkenctrl clken_ctrl_X47_Y2_N0(
  8841. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8842. .ClkEn(),
  8843. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ));
  8844. defparam clken_ctrl_X47_Y2_N0.coord_x = 4;
  8845. defparam clken_ctrl_X47_Y2_N0.coord_y = 4;
  8846. defparam clken_ctrl_X47_Y2_N0.coord_z = 0;
  8847. defparam clken_ctrl_X47_Y2_N0.ClkMux = 2'b10;
  8848. defparam clken_ctrl_X47_Y2_N0.ClkEnMux = 2'b01;
  8849. alta_clkenctrl clken_ctrl_X47_Y2_N1(
  8850. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8851. .ClkEn(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout ),
  8852. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ));
  8853. defparam clken_ctrl_X47_Y2_N1.coord_x = 4;
  8854. defparam clken_ctrl_X47_Y2_N1.coord_y = 4;
  8855. defparam clken_ctrl_X47_Y2_N1.coord_z = 1;
  8856. defparam clken_ctrl_X47_Y2_N1.ClkMux = 2'b10;
  8857. defparam clken_ctrl_X47_Y2_N1.ClkEnMux = 2'b10;
  8858. alta_clkenctrl clken_ctrl_X47_Y3_N0(
  8859. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8860. .ClkEn(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  8861. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X47_Y3_SIG_SIG ));
  8862. defparam clken_ctrl_X47_Y3_N0.coord_x = 7;
  8863. defparam clken_ctrl_X47_Y3_N0.coord_y = 3;
  8864. defparam clken_ctrl_X47_Y3_N0.coord_z = 0;
  8865. defparam clken_ctrl_X47_Y3_N0.ClkMux = 2'b10;
  8866. defparam clken_ctrl_X47_Y3_N0.ClkEnMux = 2'b10;
  8867. alta_clkenctrl clken_ctrl_X47_Y3_N1(
  8868. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8869. .ClkEn(),
  8870. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ));
  8871. defparam clken_ctrl_X47_Y3_N1.coord_x = 7;
  8872. defparam clken_ctrl_X47_Y3_N1.coord_y = 3;
  8873. defparam clken_ctrl_X47_Y3_N1.coord_z = 1;
  8874. defparam clken_ctrl_X47_Y3_N1.ClkMux = 2'b10;
  8875. defparam clken_ctrl_X47_Y3_N1.ClkEnMux = 2'b01;
  8876. alta_clkenctrl clken_ctrl_X47_Y4_N0(
  8877. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8878. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  8879. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X47_Y4_SIG_SIG ));
  8880. defparam clken_ctrl_X47_Y4_N0.coord_x = 10;
  8881. defparam clken_ctrl_X47_Y4_N0.coord_y = 4;
  8882. defparam clken_ctrl_X47_Y4_N0.coord_z = 0;
  8883. defparam clken_ctrl_X47_Y4_N0.ClkMux = 2'b10;
  8884. defparam clken_ctrl_X47_Y4_N0.ClkEnMux = 2'b10;
  8885. alta_clkenctrl clken_ctrl_X47_Y4_N1(
  8886. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8887. .ClkEn(),
  8888. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y4_SIG_VCC ));
  8889. defparam clken_ctrl_X47_Y4_N1.coord_x = 10;
  8890. defparam clken_ctrl_X47_Y4_N1.coord_y = 4;
  8891. defparam clken_ctrl_X47_Y4_N1.coord_z = 1;
  8892. defparam clken_ctrl_X47_Y4_N1.ClkMux = 2'b10;
  8893. defparam clken_ctrl_X47_Y4_N1.ClkEnMux = 2'b01;
  8894. alta_clkenctrl clken_ctrl_X48_Y1_N0(
  8895. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8896. .ClkEn(\macro_inst|u_uart[0]|u_rx[3]|always4~2_combout ),
  8897. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ));
  8898. defparam clken_ctrl_X48_Y1_N0.coord_x = 3;
  8899. defparam clken_ctrl_X48_Y1_N0.coord_y = 4;
  8900. defparam clken_ctrl_X48_Y1_N0.coord_z = 0;
  8901. defparam clken_ctrl_X48_Y1_N0.ClkMux = 2'b10;
  8902. defparam clken_ctrl_X48_Y1_N0.ClkEnMux = 2'b10;
  8903. alta_clkenctrl clken_ctrl_X48_Y1_N1(
  8904. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8905. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  8906. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ));
  8907. defparam clken_ctrl_X48_Y1_N1.coord_x = 3;
  8908. defparam clken_ctrl_X48_Y1_N1.coord_y = 4;
  8909. defparam clken_ctrl_X48_Y1_N1.coord_z = 1;
  8910. defparam clken_ctrl_X48_Y1_N1.ClkMux = 2'b10;
  8911. defparam clken_ctrl_X48_Y1_N1.ClkEnMux = 2'b10;
  8912. alta_clkenctrl clken_ctrl_X48_Y2_N0(
  8913. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8914. .ClkEn(),
  8915. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ));
  8916. defparam clken_ctrl_X48_Y2_N0.coord_x = 6;
  8917. defparam clken_ctrl_X48_Y2_N0.coord_y = 4;
  8918. defparam clken_ctrl_X48_Y2_N0.coord_z = 0;
  8919. defparam clken_ctrl_X48_Y2_N0.ClkMux = 2'b10;
  8920. defparam clken_ctrl_X48_Y2_N0.ClkEnMux = 2'b01;
  8921. alta_clkenctrl clken_ctrl_X48_Y2_N1(
  8922. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8923. .ClkEn(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout ),
  8924. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X48_Y2_SIG_SIG ));
  8925. defparam clken_ctrl_X48_Y2_N1.coord_x = 6;
  8926. defparam clken_ctrl_X48_Y2_N1.coord_y = 4;
  8927. defparam clken_ctrl_X48_Y2_N1.coord_z = 1;
  8928. defparam clken_ctrl_X48_Y2_N1.ClkMux = 2'b10;
  8929. defparam clken_ctrl_X48_Y2_N1.ClkEnMux = 2'b10;
  8930. alta_clkenctrl clken_ctrl_X48_Y3_N0(
  8931. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8932. .ClkEn(),
  8933. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y3_SIG_VCC ));
  8934. defparam clken_ctrl_X48_Y3_N0.coord_x = 5;
  8935. defparam clken_ctrl_X48_Y3_N0.coord_y = 2;
  8936. defparam clken_ctrl_X48_Y3_N0.coord_z = 0;
  8937. defparam clken_ctrl_X48_Y3_N0.ClkMux = 2'b10;
  8938. defparam clken_ctrl_X48_Y3_N0.ClkEnMux = 2'b01;
  8939. alta_clkenctrl clken_ctrl_X48_Y4_N0(
  8940. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8941. .ClkEn(),
  8942. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y4_SIG_VCC ));
  8943. defparam clken_ctrl_X48_Y4_N0.coord_x = 1;
  8944. defparam clken_ctrl_X48_Y4_N0.coord_y = 3;
  8945. defparam clken_ctrl_X48_Y4_N0.coord_z = 0;
  8946. defparam clken_ctrl_X48_Y4_N0.ClkMux = 2'b10;
  8947. defparam clken_ctrl_X48_Y4_N0.ClkEnMux = 2'b01;
  8948. alta_clkenctrl clken_ctrl_X48_Y4_N1(
  8949. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8950. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  8951. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X48_Y4_SIG_SIG ));
  8952. defparam clken_ctrl_X48_Y4_N1.coord_x = 1;
  8953. defparam clken_ctrl_X48_Y4_N1.coord_y = 3;
  8954. defparam clken_ctrl_X48_Y4_N1.coord_z = 1;
  8955. defparam clken_ctrl_X48_Y4_N1.ClkMux = 2'b10;
  8956. defparam clken_ctrl_X48_Y4_N1.ClkEnMux = 2'b10;
  8957. alta_clkenctrl clken_ctrl_X49_Y1_N0(
  8958. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8959. .ClkEn(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout ),
  8960. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X49_Y1_SIG_SIG ));
  8961. defparam clken_ctrl_X49_Y1_N0.coord_x = 6;
  8962. defparam clken_ctrl_X49_Y1_N0.coord_y = 1;
  8963. defparam clken_ctrl_X49_Y1_N0.coord_z = 0;
  8964. defparam clken_ctrl_X49_Y1_N0.ClkMux = 2'b10;
  8965. defparam clken_ctrl_X49_Y1_N0.ClkEnMux = 2'b10;
  8966. alta_clkenctrl clken_ctrl_X49_Y1_N1(
  8967. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8968. .ClkEn(),
  8969. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ));
  8970. defparam clken_ctrl_X49_Y1_N1.coord_x = 6;
  8971. defparam clken_ctrl_X49_Y1_N1.coord_y = 1;
  8972. defparam clken_ctrl_X49_Y1_N1.coord_z = 1;
  8973. defparam clken_ctrl_X49_Y1_N1.ClkMux = 2'b10;
  8974. defparam clken_ctrl_X49_Y1_N1.ClkEnMux = 2'b01;
  8975. alta_clkenctrl clken_ctrl_X49_Y2_N0(
  8976. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8977. .ClkEn(),
  8978. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ));
  8979. defparam clken_ctrl_X49_Y2_N0.coord_x = 7;
  8980. defparam clken_ctrl_X49_Y2_N0.coord_y = 4;
  8981. defparam clken_ctrl_X49_Y2_N0.coord_z = 0;
  8982. defparam clken_ctrl_X49_Y2_N0.ClkMux = 2'b10;
  8983. defparam clken_ctrl_X49_Y2_N0.ClkEnMux = 2'b01;
  8984. alta_clkenctrl clken_ctrl_X49_Y3_N0(
  8985. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8986. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  8987. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ));
  8988. defparam clken_ctrl_X49_Y3_N0.coord_x = 6;
  8989. defparam clken_ctrl_X49_Y3_N0.coord_y = 2;
  8990. defparam clken_ctrl_X49_Y3_N0.coord_z = 0;
  8991. defparam clken_ctrl_X49_Y3_N0.ClkMux = 2'b10;
  8992. defparam clken_ctrl_X49_Y3_N0.ClkEnMux = 2'b10;
  8993. alta_clkenctrl clken_ctrl_X49_Y3_N1(
  8994. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  8995. .ClkEn(\macro_inst|u_uart[0]|u_rx[0]|always4~2_combout ),
  8996. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ));
  8997. defparam clken_ctrl_X49_Y3_N1.coord_x = 6;
  8998. defparam clken_ctrl_X49_Y3_N1.coord_y = 2;
  8999. defparam clken_ctrl_X49_Y3_N1.coord_z = 1;
  9000. defparam clken_ctrl_X49_Y3_N1.ClkMux = 2'b10;
  9001. defparam clken_ctrl_X49_Y3_N1.ClkEnMux = 2'b10;
  9002. alta_clkenctrl clken_ctrl_X49_Y4_N0(
  9003. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9004. .ClkEn(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout ),
  9005. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout_X49_Y4_SIG_SIG ));
  9006. defparam clken_ctrl_X49_Y4_N0.coord_x = 1;
  9007. defparam clken_ctrl_X49_Y4_N0.coord_y = 4;
  9008. defparam clken_ctrl_X49_Y4_N0.coord_z = 0;
  9009. defparam clken_ctrl_X49_Y4_N0.ClkMux = 2'b10;
  9010. defparam clken_ctrl_X49_Y4_N0.ClkEnMux = 2'b10;
  9011. alta_clkenctrl clken_ctrl_X49_Y4_N1(
  9012. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9013. .ClkEn(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout ),
  9014. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout_X49_Y4_SIG_SIG ));
  9015. defparam clken_ctrl_X49_Y4_N1.coord_x = 1;
  9016. defparam clken_ctrl_X49_Y4_N1.coord_y = 4;
  9017. defparam clken_ctrl_X49_Y4_N1.coord_z = 1;
  9018. defparam clken_ctrl_X49_Y4_N1.ClkMux = 2'b10;
  9019. defparam clken_ctrl_X49_Y4_N1.ClkEnMux = 2'b10;
  9020. alta_clkenctrl clken_ctrl_X50_Y1_N0(
  9021. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9022. .ClkEn(\macro_inst|u_uart[0]|u_rx[2]|always4~2_combout ),
  9023. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ));
  9024. defparam clken_ctrl_X50_Y1_N0.coord_x = 7;
  9025. defparam clken_ctrl_X50_Y1_N0.coord_y = 1;
  9026. defparam clken_ctrl_X50_Y1_N0.coord_z = 0;
  9027. defparam clken_ctrl_X50_Y1_N0.ClkMux = 2'b10;
  9028. defparam clken_ctrl_X50_Y1_N0.ClkEnMux = 2'b10;
  9029. alta_clkenctrl clken_ctrl_X50_Y1_N1(
  9030. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9031. .ClkEn(),
  9032. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ));
  9033. defparam clken_ctrl_X50_Y1_N1.coord_x = 7;
  9034. defparam clken_ctrl_X50_Y1_N1.coord_y = 1;
  9035. defparam clken_ctrl_X50_Y1_N1.coord_z = 1;
  9036. defparam clken_ctrl_X50_Y1_N1.ClkMux = 2'b10;
  9037. defparam clken_ctrl_X50_Y1_N1.ClkEnMux = 2'b01;
  9038. alta_clkenctrl clken_ctrl_X50_Y2_N0(
  9039. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9040. .ClkEn(),
  9041. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ));
  9042. defparam clken_ctrl_X50_Y2_N0.coord_x = 14;
  9043. defparam clken_ctrl_X50_Y2_N0.coord_y = 4;
  9044. defparam clken_ctrl_X50_Y2_N0.coord_z = 0;
  9045. defparam clken_ctrl_X50_Y2_N0.ClkMux = 2'b10;
  9046. defparam clken_ctrl_X50_Y2_N0.ClkEnMux = 2'b01;
  9047. alta_clkenctrl clken_ctrl_X50_Y2_N1(
  9048. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  9049. .ClkEn(),
  9050. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X50_Y2_SIG_VCC ));
  9051. defparam clken_ctrl_X50_Y2_N1.coord_x = 14;
  9052. defparam clken_ctrl_X50_Y2_N1.coord_y = 4;
  9053. defparam clken_ctrl_X50_Y2_N1.coord_z = 1;
  9054. defparam clken_ctrl_X50_Y2_N1.ClkMux = 2'b10;
  9055. defparam clken_ctrl_X50_Y2_N1.ClkEnMux = 2'b01;
  9056. alta_clkenctrl clken_ctrl_X50_Y3_N0(
  9057. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9058. .ClkEn(),
  9059. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ));
  9060. defparam clken_ctrl_X50_Y3_N0.coord_x = 16;
  9061. defparam clken_ctrl_X50_Y3_N0.coord_y = 12;
  9062. defparam clken_ctrl_X50_Y3_N0.coord_z = 0;
  9063. defparam clken_ctrl_X50_Y3_N0.ClkMux = 2'b10;
  9064. defparam clken_ctrl_X50_Y3_N0.ClkEnMux = 2'b01;
  9065. alta_clkenctrl clken_ctrl_X50_Y3_N1(
  9066. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9067. .ClkEn(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout ),
  9068. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout_X50_Y3_SIG_SIG ));
  9069. defparam clken_ctrl_X50_Y3_N1.coord_x = 16;
  9070. defparam clken_ctrl_X50_Y3_N1.coord_y = 12;
  9071. defparam clken_ctrl_X50_Y3_N1.coord_z = 1;
  9072. defparam clken_ctrl_X50_Y3_N1.ClkMux = 2'b10;
  9073. defparam clken_ctrl_X50_Y3_N1.ClkEnMux = 2'b10;
  9074. alta_clkenctrl clken_ctrl_X50_Y4_N0(
  9075. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9076. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  9077. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X50_Y4_SIG_SIG ));
  9078. defparam clken_ctrl_X50_Y4_N0.coord_x = 8;
  9079. defparam clken_ctrl_X50_Y4_N0.coord_y = 4;
  9080. defparam clken_ctrl_X50_Y4_N0.coord_z = 0;
  9081. defparam clken_ctrl_X50_Y4_N0.ClkMux = 2'b10;
  9082. defparam clken_ctrl_X50_Y4_N0.ClkEnMux = 2'b10;
  9083. alta_clkenctrl clken_ctrl_X51_Y1_N0(
  9084. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9085. .ClkEn(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout ),
  9086. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout_X51_Y1_SIG_SIG ));
  9087. defparam clken_ctrl_X51_Y1_N0.coord_x = 5;
  9088. defparam clken_ctrl_X51_Y1_N0.coord_y = 4;
  9089. defparam clken_ctrl_X51_Y1_N0.coord_z = 0;
  9090. defparam clken_ctrl_X51_Y1_N0.ClkMux = 2'b10;
  9091. defparam clken_ctrl_X51_Y1_N0.ClkEnMux = 2'b10;
  9092. alta_clkenctrl clken_ctrl_X51_Y1_N1(
  9093. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9094. .ClkEn(),
  9095. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ));
  9096. defparam clken_ctrl_X51_Y1_N1.coord_x = 5;
  9097. defparam clken_ctrl_X51_Y1_N1.coord_y = 4;
  9098. defparam clken_ctrl_X51_Y1_N1.coord_z = 1;
  9099. defparam clken_ctrl_X51_Y1_N1.ClkMux = 2'b10;
  9100. defparam clken_ctrl_X51_Y1_N1.ClkEnMux = 2'b01;
  9101. alta_clkenctrl clken_ctrl_X51_Y2_N0(
  9102. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9103. .ClkEn(),
  9104. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ));
  9105. defparam clken_ctrl_X51_Y2_N0.coord_x = 8;
  9106. defparam clken_ctrl_X51_Y2_N0.coord_y = 3;
  9107. defparam clken_ctrl_X51_Y2_N0.coord_z = 0;
  9108. defparam clken_ctrl_X51_Y2_N0.ClkMux = 2'b10;
  9109. defparam clken_ctrl_X51_Y2_N0.ClkEnMux = 2'b01;
  9110. alta_clkenctrl clken_ctrl_X51_Y2_N1(
  9111. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9112. .ClkEn(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout ),
  9113. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout_X51_Y2_SIG_SIG ));
  9114. defparam clken_ctrl_X51_Y2_N1.coord_x = 8;
  9115. defparam clken_ctrl_X51_Y2_N1.coord_y = 3;
  9116. defparam clken_ctrl_X51_Y2_N1.coord_z = 1;
  9117. defparam clken_ctrl_X51_Y2_N1.ClkMux = 2'b10;
  9118. defparam clken_ctrl_X51_Y2_N1.ClkEnMux = 2'b10;
  9119. alta_clkenctrl clken_ctrl_X51_Y3_N0(
  9120. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  9121. .ClkEn(),
  9122. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ));
  9123. defparam clken_ctrl_X51_Y3_N0.coord_x = 5;
  9124. defparam clken_ctrl_X51_Y3_N0.coord_y = 3;
  9125. defparam clken_ctrl_X51_Y3_N0.coord_z = 0;
  9126. defparam clken_ctrl_X51_Y3_N0.ClkMux = 2'b10;
  9127. defparam clken_ctrl_X51_Y3_N0.ClkEnMux = 2'b01;
  9128. alta_clkenctrl clken_ctrl_X51_Y4_N0(
  9129. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9130. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  9131. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ));
  9132. defparam clken_ctrl_X51_Y4_N0.coord_x = 16;
  9133. defparam clken_ctrl_X51_Y4_N0.coord_y = 3;
  9134. defparam clken_ctrl_X51_Y4_N0.coord_z = 0;
  9135. defparam clken_ctrl_X51_Y4_N0.ClkMux = 2'b10;
  9136. defparam clken_ctrl_X51_Y4_N0.ClkEnMux = 2'b10;
  9137. alta_clkenctrl clken_ctrl_X51_Y4_N1(
  9138. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9139. .ClkEn(\macro_inst|u_uart[1]|u_regs|apb_read1~combout ),
  9140. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ));
  9141. defparam clken_ctrl_X51_Y4_N1.coord_x = 16;
  9142. defparam clken_ctrl_X51_Y4_N1.coord_y = 3;
  9143. defparam clken_ctrl_X51_Y4_N1.coord_z = 1;
  9144. defparam clken_ctrl_X51_Y4_N1.ClkMux = 2'b10;
  9145. defparam clken_ctrl_X51_Y4_N1.ClkEnMux = 2'b10;
  9146. alta_clkenctrl clken_ctrl_X52_Y1_N0(
  9147. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9148. .ClkEn(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout ),
  9149. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ));
  9150. defparam clken_ctrl_X52_Y1_N0.coord_x = 12;
  9151. defparam clken_ctrl_X52_Y1_N0.coord_y = 4;
  9152. defparam clken_ctrl_X52_Y1_N0.coord_z = 0;
  9153. defparam clken_ctrl_X52_Y1_N0.ClkMux = 2'b10;
  9154. defparam clken_ctrl_X52_Y1_N0.ClkEnMux = 2'b10;
  9155. alta_clkenctrl clken_ctrl_X52_Y1_N1(
  9156. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9157. .ClkEn(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout ),
  9158. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ));
  9159. defparam clken_ctrl_X52_Y1_N1.coord_x = 12;
  9160. defparam clken_ctrl_X52_Y1_N1.coord_y = 4;
  9161. defparam clken_ctrl_X52_Y1_N1.coord_z = 1;
  9162. defparam clken_ctrl_X52_Y1_N1.ClkMux = 2'b10;
  9163. defparam clken_ctrl_X52_Y1_N1.ClkEnMux = 2'b10;
  9164. alta_clkenctrl clken_ctrl_X52_Y2_N0(
  9165. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9166. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout ),
  9167. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ));
  9168. defparam clken_ctrl_X52_Y2_N0.coord_x = 9;
  9169. defparam clken_ctrl_X52_Y2_N0.coord_y = 3;
  9170. defparam clken_ctrl_X52_Y2_N0.coord_z = 0;
  9171. defparam clken_ctrl_X52_Y2_N0.ClkMux = 2'b10;
  9172. defparam clken_ctrl_X52_Y2_N0.ClkEnMux = 2'b10;
  9173. alta_clkenctrl clken_ctrl_X52_Y2_N1(
  9174. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9175. .ClkEn(),
  9176. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ));
  9177. defparam clken_ctrl_X52_Y2_N1.coord_x = 9;
  9178. defparam clken_ctrl_X52_Y2_N1.coord_y = 3;
  9179. defparam clken_ctrl_X52_Y2_N1.coord_z = 1;
  9180. defparam clken_ctrl_X52_Y2_N1.ClkMux = 2'b10;
  9181. defparam clken_ctrl_X52_Y2_N1.ClkEnMux = 2'b01;
  9182. alta_clkenctrl clken_ctrl_X52_Y3_N0(
  9183. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9184. .ClkEn(),
  9185. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ));
  9186. defparam clken_ctrl_X52_Y3_N0.coord_x = 17;
  9187. defparam clken_ctrl_X52_Y3_N0.coord_y = 1;
  9188. defparam clken_ctrl_X52_Y3_N0.coord_z = 0;
  9189. defparam clken_ctrl_X52_Y3_N0.ClkMux = 2'b10;
  9190. defparam clken_ctrl_X52_Y3_N0.ClkEnMux = 2'b01;
  9191. alta_clkenctrl clken_ctrl_X52_Y3_N1(
  9192. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9193. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9194. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X52_Y3_SIG_SIG ));
  9195. defparam clken_ctrl_X52_Y3_N1.coord_x = 17;
  9196. defparam clken_ctrl_X52_Y3_N1.coord_y = 1;
  9197. defparam clken_ctrl_X52_Y3_N1.coord_z = 1;
  9198. defparam clken_ctrl_X52_Y3_N1.ClkMux = 2'b10;
  9199. defparam clken_ctrl_X52_Y3_N1.ClkEnMux = 2'b10;
  9200. alta_clkenctrl clken_ctrl_X52_Y4_N0(
  9201. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9202. .ClkEn(),
  9203. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y4_SIG_VCC ));
  9204. defparam clken_ctrl_X52_Y4_N0.coord_x = 2;
  9205. defparam clken_ctrl_X52_Y4_N0.coord_y = 3;
  9206. defparam clken_ctrl_X52_Y4_N0.coord_z = 0;
  9207. defparam clken_ctrl_X52_Y4_N0.ClkMux = 2'b10;
  9208. defparam clken_ctrl_X52_Y4_N0.ClkEnMux = 2'b01;
  9209. alta_clkenctrl clken_ctrl_X52_Y4_N1(
  9210. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9211. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  9212. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X52_Y4_SIG_SIG ));
  9213. defparam clken_ctrl_X52_Y4_N1.coord_x = 2;
  9214. defparam clken_ctrl_X52_Y4_N1.coord_y = 3;
  9215. defparam clken_ctrl_X52_Y4_N1.coord_z = 1;
  9216. defparam clken_ctrl_X52_Y4_N1.ClkMux = 2'b10;
  9217. defparam clken_ctrl_X52_Y4_N1.ClkEnMux = 2'b10;
  9218. alta_clkenctrl clken_ctrl_X53_Y1_N0(
  9219. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9220. .ClkEn(),
  9221. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ));
  9222. defparam clken_ctrl_X53_Y1_N0.coord_x = 9;
  9223. defparam clken_ctrl_X53_Y1_N0.coord_y = 2;
  9224. defparam clken_ctrl_X53_Y1_N0.coord_z = 0;
  9225. defparam clken_ctrl_X53_Y1_N0.ClkMux = 2'b10;
  9226. defparam clken_ctrl_X53_Y1_N0.ClkEnMux = 2'b01;
  9227. alta_clkenctrl clken_ctrl_X53_Y1_N1(
  9228. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9229. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  9230. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X53_Y1_SIG_SIG ));
  9231. defparam clken_ctrl_X53_Y1_N1.coord_x = 9;
  9232. defparam clken_ctrl_X53_Y1_N1.coord_y = 2;
  9233. defparam clken_ctrl_X53_Y1_N1.coord_z = 1;
  9234. defparam clken_ctrl_X53_Y1_N1.ClkMux = 2'b10;
  9235. defparam clken_ctrl_X53_Y1_N1.ClkEnMux = 2'b10;
  9236. alta_clkenctrl clken_ctrl_X53_Y2_N0(
  9237. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9238. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout ),
  9239. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ));
  9240. defparam clken_ctrl_X53_Y2_N0.coord_x = 11;
  9241. defparam clken_ctrl_X53_Y2_N0.coord_y = 3;
  9242. defparam clken_ctrl_X53_Y2_N0.coord_z = 0;
  9243. defparam clken_ctrl_X53_Y2_N0.ClkMux = 2'b10;
  9244. defparam clken_ctrl_X53_Y2_N0.ClkEnMux = 2'b10;
  9245. alta_clkenctrl clken_ctrl_X53_Y2_N1(
  9246. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9247. .ClkEn(),
  9248. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ));
  9249. defparam clken_ctrl_X53_Y2_N1.coord_x = 11;
  9250. defparam clken_ctrl_X53_Y2_N1.coord_y = 3;
  9251. defparam clken_ctrl_X53_Y2_N1.coord_z = 1;
  9252. defparam clken_ctrl_X53_Y2_N1.ClkMux = 2'b10;
  9253. defparam clken_ctrl_X53_Y2_N1.ClkEnMux = 2'b01;
  9254. alta_clkenctrl clken_ctrl_X53_Y3_N0(
  9255. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9256. .ClkEn(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout ),
  9257. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ));
  9258. defparam clken_ctrl_X53_Y3_N0.coord_x = 14;
  9259. defparam clken_ctrl_X53_Y3_N0.coord_y = 2;
  9260. defparam clken_ctrl_X53_Y3_N0.coord_z = 0;
  9261. defparam clken_ctrl_X53_Y3_N0.ClkMux = 2'b10;
  9262. defparam clken_ctrl_X53_Y3_N0.ClkEnMux = 2'b10;
  9263. alta_clkenctrl clken_ctrl_X53_Y3_N1(
  9264. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9265. .ClkEn(),
  9266. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ));
  9267. defparam clken_ctrl_X53_Y3_N1.coord_x = 14;
  9268. defparam clken_ctrl_X53_Y3_N1.coord_y = 2;
  9269. defparam clken_ctrl_X53_Y3_N1.coord_z = 1;
  9270. defparam clken_ctrl_X53_Y3_N1.ClkMux = 2'b10;
  9271. defparam clken_ctrl_X53_Y3_N1.ClkEnMux = 2'b01;
  9272. alta_clkenctrl clken_ctrl_X53_Y4_N0(
  9273. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9274. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9275. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ));
  9276. defparam clken_ctrl_X53_Y4_N0.coord_x = 18;
  9277. defparam clken_ctrl_X53_Y4_N0.coord_y = 2;
  9278. defparam clken_ctrl_X53_Y4_N0.coord_z = 0;
  9279. defparam clken_ctrl_X53_Y4_N0.ClkMux = 2'b10;
  9280. defparam clken_ctrl_X53_Y4_N0.ClkEnMux = 2'b10;
  9281. alta_clkenctrl clken_ctrl_X53_Y4_N1(
  9282. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9283. .ClkEn(),
  9284. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ));
  9285. defparam clken_ctrl_X53_Y4_N1.coord_x = 18;
  9286. defparam clken_ctrl_X53_Y4_N1.coord_y = 2;
  9287. defparam clken_ctrl_X53_Y4_N1.coord_z = 1;
  9288. defparam clken_ctrl_X53_Y4_N1.ClkMux = 2'b10;
  9289. defparam clken_ctrl_X53_Y4_N1.ClkEnMux = 2'b01;
  9290. alta_clkenctrl clken_ctrl_X54_Y1_N0(
  9291. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9292. .ClkEn(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout ),
  9293. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout_X54_Y1_SIG_SIG ));
  9294. defparam clken_ctrl_X54_Y1_N0.coord_x = 10;
  9295. defparam clken_ctrl_X54_Y1_N0.coord_y = 2;
  9296. defparam clken_ctrl_X54_Y1_N0.coord_z = 0;
  9297. defparam clken_ctrl_X54_Y1_N0.ClkMux = 2'b10;
  9298. defparam clken_ctrl_X54_Y1_N0.ClkEnMux = 2'b10;
  9299. alta_clkenctrl clken_ctrl_X54_Y1_N1(
  9300. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9301. .ClkEn(),
  9302. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ));
  9303. defparam clken_ctrl_X54_Y1_N1.coord_x = 10;
  9304. defparam clken_ctrl_X54_Y1_N1.coord_y = 2;
  9305. defparam clken_ctrl_X54_Y1_N1.coord_z = 1;
  9306. defparam clken_ctrl_X54_Y1_N1.ClkMux = 2'b10;
  9307. defparam clken_ctrl_X54_Y1_N1.ClkEnMux = 2'b01;
  9308. alta_clkenctrl clken_ctrl_X54_Y2_N0(
  9309. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  9310. .ClkEn(\macro_inst|u_ahb2apb|always0~0_combout ),
  9311. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X54_Y2_SIG_SIG ));
  9312. defparam clken_ctrl_X54_Y2_N0.coord_x = 14;
  9313. defparam clken_ctrl_X54_Y2_N0.coord_y = 5;
  9314. defparam clken_ctrl_X54_Y2_N0.coord_z = 0;
  9315. defparam clken_ctrl_X54_Y2_N0.ClkMux = 2'b10;
  9316. defparam clken_ctrl_X54_Y2_N0.ClkEnMux = 2'b10;
  9317. alta_clkenctrl clken_ctrl_X54_Y2_N1(
  9318. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9319. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout ),
  9320. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ));
  9321. defparam clken_ctrl_X54_Y2_N1.coord_x = 14;
  9322. defparam clken_ctrl_X54_Y2_N1.coord_y = 5;
  9323. defparam clken_ctrl_X54_Y2_N1.coord_z = 1;
  9324. defparam clken_ctrl_X54_Y2_N1.ClkMux = 2'b10;
  9325. defparam clken_ctrl_X54_Y2_N1.ClkEnMux = 2'b10;
  9326. alta_clkenctrl clken_ctrl_X54_Y3_N0(
  9327. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9328. .ClkEn(),
  9329. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ));
  9330. defparam clken_ctrl_X54_Y3_N0.coord_x = 14;
  9331. defparam clken_ctrl_X54_Y3_N0.coord_y = 3;
  9332. defparam clken_ctrl_X54_Y3_N0.coord_z = 0;
  9333. defparam clken_ctrl_X54_Y3_N0.ClkMux = 2'b10;
  9334. defparam clken_ctrl_X54_Y3_N0.ClkEnMux = 2'b01;
  9335. alta_clkenctrl clken_ctrl_X54_Y4_N0(
  9336. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9337. .ClkEn(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout ),
  9338. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout_X54_Y4_SIG_SIG ));
  9339. defparam clken_ctrl_X54_Y4_N0.coord_x = 19;
  9340. defparam clken_ctrl_X54_Y4_N0.coord_y = 2;
  9341. defparam clken_ctrl_X54_Y4_N0.coord_z = 0;
  9342. defparam clken_ctrl_X54_Y4_N0.ClkMux = 2'b10;
  9343. defparam clken_ctrl_X54_Y4_N0.ClkEnMux = 2'b10;
  9344. alta_clkenctrl clken_ctrl_X54_Y4_N1(
  9345. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9346. .ClkEn(),
  9347. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y4_SIG_VCC ));
  9348. defparam clken_ctrl_X54_Y4_N1.coord_x = 19;
  9349. defparam clken_ctrl_X54_Y4_N1.coord_y = 2;
  9350. defparam clken_ctrl_X54_Y4_N1.coord_z = 1;
  9351. defparam clken_ctrl_X54_Y4_N1.ClkMux = 2'b10;
  9352. defparam clken_ctrl_X54_Y4_N1.ClkEnMux = 2'b01;
  9353. alta_clkenctrl clken_ctrl_X56_Y10_N0(
  9354. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9355. .ClkEn(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout ),
  9356. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ));
  9357. defparam clken_ctrl_X56_Y10_N0.coord_x = 14;
  9358. defparam clken_ctrl_X56_Y10_N0.coord_y = 12;
  9359. defparam clken_ctrl_X56_Y10_N0.coord_z = 0;
  9360. defparam clken_ctrl_X56_Y10_N0.ClkMux = 2'b10;
  9361. defparam clken_ctrl_X56_Y10_N0.ClkEnMux = 2'b10;
  9362. alta_clkenctrl clken_ctrl_X56_Y10_N1(
  9363. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9364. .ClkEn(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout ),
  9365. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ));
  9366. defparam clken_ctrl_X56_Y10_N1.coord_x = 14;
  9367. defparam clken_ctrl_X56_Y10_N1.coord_y = 12;
  9368. defparam clken_ctrl_X56_Y10_N1.coord_z = 1;
  9369. defparam clken_ctrl_X56_Y10_N1.ClkMux = 2'b10;
  9370. defparam clken_ctrl_X56_Y10_N1.ClkEnMux = 2'b10;
  9371. alta_clkenctrl clken_ctrl_X56_Y11_N0(
  9372. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9373. .ClkEn(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  9374. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ));
  9375. defparam clken_ctrl_X56_Y11_N0.coord_x = 20;
  9376. defparam clken_ctrl_X56_Y11_N0.coord_y = 6;
  9377. defparam clken_ctrl_X56_Y11_N0.coord_z = 0;
  9378. defparam clken_ctrl_X56_Y11_N0.ClkMux = 2'b10;
  9379. defparam clken_ctrl_X56_Y11_N0.ClkEnMux = 2'b10;
  9380. alta_clkenctrl clken_ctrl_X56_Y11_N1(
  9381. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9382. .ClkEn(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout ),
  9383. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ));
  9384. defparam clken_ctrl_X56_Y11_N1.coord_x = 20;
  9385. defparam clken_ctrl_X56_Y11_N1.coord_y = 6;
  9386. defparam clken_ctrl_X56_Y11_N1.coord_z = 1;
  9387. defparam clken_ctrl_X56_Y11_N1.ClkMux = 2'b10;
  9388. defparam clken_ctrl_X56_Y11_N1.ClkEnMux = 2'b10;
  9389. alta_clkenctrl clken_ctrl_X56_Y12_N0(
  9390. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9391. .ClkEn(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout ),
  9392. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ));
  9393. defparam clken_ctrl_X56_Y12_N0.coord_x = 14;
  9394. defparam clken_ctrl_X56_Y12_N0.coord_y = 10;
  9395. defparam clken_ctrl_X56_Y12_N0.coord_z = 0;
  9396. defparam clken_ctrl_X56_Y12_N0.ClkMux = 2'b10;
  9397. defparam clken_ctrl_X56_Y12_N0.ClkEnMux = 2'b10;
  9398. alta_clkenctrl clken_ctrl_X56_Y12_N1(
  9399. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9400. .ClkEn(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout ),
  9401. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ));
  9402. defparam clken_ctrl_X56_Y12_N1.coord_x = 14;
  9403. defparam clken_ctrl_X56_Y12_N1.coord_y = 10;
  9404. defparam clken_ctrl_X56_Y12_N1.coord_z = 1;
  9405. defparam clken_ctrl_X56_Y12_N1.ClkMux = 2'b10;
  9406. defparam clken_ctrl_X56_Y12_N1.ClkEnMux = 2'b10;
  9407. alta_clkenctrl clken_ctrl_X56_Y1_N0(
  9408. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9409. .ClkEn(),
  9410. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ));
  9411. defparam clken_ctrl_X56_Y1_N0.coord_x = 10;
  9412. defparam clken_ctrl_X56_Y1_N0.coord_y = 3;
  9413. defparam clken_ctrl_X56_Y1_N0.coord_z = 0;
  9414. defparam clken_ctrl_X56_Y1_N0.ClkMux = 2'b10;
  9415. defparam clken_ctrl_X56_Y1_N0.ClkEnMux = 2'b01;
  9416. alta_clkenctrl clken_ctrl_X56_Y1_N1(
  9417. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9418. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  9419. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ));
  9420. defparam clken_ctrl_X56_Y1_N1.coord_x = 10;
  9421. defparam clken_ctrl_X56_Y1_N1.coord_y = 3;
  9422. defparam clken_ctrl_X56_Y1_N1.coord_z = 1;
  9423. defparam clken_ctrl_X56_Y1_N1.ClkMux = 2'b10;
  9424. defparam clken_ctrl_X56_Y1_N1.ClkEnMux = 2'b10;
  9425. alta_clkenctrl clken_ctrl_X56_Y2_N0(
  9426. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9427. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout ),
  9428. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X56_Y2_SIG_SIG ));
  9429. defparam clken_ctrl_X56_Y2_N0.coord_x = 12;
  9430. defparam clken_ctrl_X56_Y2_N0.coord_y = 1;
  9431. defparam clken_ctrl_X56_Y2_N0.coord_z = 0;
  9432. defparam clken_ctrl_X56_Y2_N0.ClkMux = 2'b10;
  9433. defparam clken_ctrl_X56_Y2_N0.ClkEnMux = 2'b10;
  9434. alta_clkenctrl clken_ctrl_X56_Y2_N1(
  9435. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9436. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  9437. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X56_Y2_SIG_SIG ));
  9438. defparam clken_ctrl_X56_Y2_N1.coord_x = 12;
  9439. defparam clken_ctrl_X56_Y2_N1.coord_y = 1;
  9440. defparam clken_ctrl_X56_Y2_N1.coord_z = 1;
  9441. defparam clken_ctrl_X56_Y2_N1.ClkMux = 2'b10;
  9442. defparam clken_ctrl_X56_Y2_N1.ClkEnMux = 2'b10;
  9443. alta_clkenctrl clken_ctrl_X56_Y3_N0(
  9444. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9445. .ClkEn(),
  9446. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ));
  9447. defparam clken_ctrl_X56_Y3_N0.coord_x = 15;
  9448. defparam clken_ctrl_X56_Y3_N0.coord_y = 2;
  9449. defparam clken_ctrl_X56_Y3_N0.coord_z = 0;
  9450. defparam clken_ctrl_X56_Y3_N0.ClkMux = 2'b10;
  9451. defparam clken_ctrl_X56_Y3_N0.ClkEnMux = 2'b01;
  9452. alta_clkenctrl clken_ctrl_X56_Y3_N1(
  9453. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9454. .ClkEn(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout ),
  9455. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ));
  9456. defparam clken_ctrl_X56_Y3_N1.coord_x = 15;
  9457. defparam clken_ctrl_X56_Y3_N1.coord_y = 2;
  9458. defparam clken_ctrl_X56_Y3_N1.coord_z = 1;
  9459. defparam clken_ctrl_X56_Y3_N1.ClkMux = 2'b10;
  9460. defparam clken_ctrl_X56_Y3_N1.ClkEnMux = 2'b10;
  9461. alta_clkenctrl clken_ctrl_X56_Y4_N0(
  9462. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9463. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout ),
  9464. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout_X56_Y4_SIG_SIG ));
  9465. defparam clken_ctrl_X56_Y4_N0.coord_x = 18;
  9466. defparam clken_ctrl_X56_Y4_N0.coord_y = 5;
  9467. defparam clken_ctrl_X56_Y4_N0.coord_z = 0;
  9468. defparam clken_ctrl_X56_Y4_N0.ClkMux = 2'b10;
  9469. defparam clken_ctrl_X56_Y4_N0.ClkEnMux = 2'b10;
  9470. alta_clkenctrl clken_ctrl_X56_Y4_N1(
  9471. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9472. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout ),
  9473. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout_X56_Y4_SIG_SIG ));
  9474. defparam clken_ctrl_X56_Y4_N1.coord_x = 18;
  9475. defparam clken_ctrl_X56_Y4_N1.coord_y = 5;
  9476. defparam clken_ctrl_X56_Y4_N1.coord_z = 1;
  9477. defparam clken_ctrl_X56_Y4_N1.ClkMux = 2'b10;
  9478. defparam clken_ctrl_X56_Y4_N1.ClkEnMux = 2'b10;
  9479. alta_clkenctrl clken_ctrl_X56_Y5_N0(
  9480. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9481. .ClkEn(),
  9482. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ));
  9483. defparam clken_ctrl_X56_Y5_N0.coord_x = 17;
  9484. defparam clken_ctrl_X56_Y5_N0.coord_y = 3;
  9485. defparam clken_ctrl_X56_Y5_N0.coord_z = 0;
  9486. defparam clken_ctrl_X56_Y5_N0.ClkMux = 2'b10;
  9487. defparam clken_ctrl_X56_Y5_N0.ClkEnMux = 2'b01;
  9488. alta_clkenctrl clken_ctrl_X56_Y6_N0(
  9489. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9490. .ClkEn(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout ),
  9491. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X56_Y6_SIG_SIG ));
  9492. defparam clken_ctrl_X56_Y6_N0.coord_x = 18;
  9493. defparam clken_ctrl_X56_Y6_N0.coord_y = 1;
  9494. defparam clken_ctrl_X56_Y6_N0.coord_z = 0;
  9495. defparam clken_ctrl_X56_Y6_N0.ClkMux = 2'b10;
  9496. defparam clken_ctrl_X56_Y6_N0.ClkEnMux = 2'b10;
  9497. alta_clkenctrl clken_ctrl_X56_Y6_N1(
  9498. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9499. .ClkEn(),
  9500. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ));
  9501. defparam clken_ctrl_X56_Y6_N1.coord_x = 18;
  9502. defparam clken_ctrl_X56_Y6_N1.coord_y = 1;
  9503. defparam clken_ctrl_X56_Y6_N1.coord_z = 1;
  9504. defparam clken_ctrl_X56_Y6_N1.ClkMux = 2'b10;
  9505. defparam clken_ctrl_X56_Y6_N1.ClkEnMux = 2'b01;
  9506. alta_clkenctrl clken_ctrl_X56_Y7_N0(
  9507. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9508. .ClkEn(),
  9509. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ));
  9510. defparam clken_ctrl_X56_Y7_N0.coord_x = 19;
  9511. defparam clken_ctrl_X56_Y7_N0.coord_y = 4;
  9512. defparam clken_ctrl_X56_Y7_N0.coord_z = 0;
  9513. defparam clken_ctrl_X56_Y7_N0.ClkMux = 2'b10;
  9514. defparam clken_ctrl_X56_Y7_N0.ClkEnMux = 2'b01;
  9515. alta_clkenctrl clken_ctrl_X56_Y7_N1(
  9516. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9517. .ClkEn(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  9518. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y7_SIG_SIG ));
  9519. defparam clken_ctrl_X56_Y7_N1.coord_x = 19;
  9520. defparam clken_ctrl_X56_Y7_N1.coord_y = 4;
  9521. defparam clken_ctrl_X56_Y7_N1.coord_z = 1;
  9522. defparam clken_ctrl_X56_Y7_N1.ClkMux = 2'b10;
  9523. defparam clken_ctrl_X56_Y7_N1.ClkEnMux = 2'b10;
  9524. alta_clkenctrl clken_ctrl_X56_Y8_N0(
  9525. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9526. .ClkEn(),
  9527. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ));
  9528. defparam clken_ctrl_X56_Y8_N0.coord_x = 19;
  9529. defparam clken_ctrl_X56_Y8_N0.coord_y = 7;
  9530. defparam clken_ctrl_X56_Y8_N0.coord_z = 0;
  9531. defparam clken_ctrl_X56_Y8_N0.ClkMux = 2'b10;
  9532. defparam clken_ctrl_X56_Y8_N0.ClkEnMux = 2'b01;
  9533. alta_clkenctrl clken_ctrl_X56_Y8_N1(
  9534. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9535. .ClkEn(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout ),
  9536. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout_X56_Y8_SIG_SIG ));
  9537. defparam clken_ctrl_X56_Y8_N1.coord_x = 19;
  9538. defparam clken_ctrl_X56_Y8_N1.coord_y = 7;
  9539. defparam clken_ctrl_X56_Y8_N1.coord_z = 1;
  9540. defparam clken_ctrl_X56_Y8_N1.ClkMux = 2'b10;
  9541. defparam clken_ctrl_X56_Y8_N1.ClkEnMux = 2'b10;
  9542. alta_clkenctrl clken_ctrl_X56_Y9_N0(
  9543. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9544. .ClkEn(\macro_inst|u_uart[1]|u_rx[1]|always4~2_combout ),
  9545. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ));
  9546. defparam clken_ctrl_X56_Y9_N0.coord_x = 19;
  9547. defparam clken_ctrl_X56_Y9_N0.coord_y = 3;
  9548. defparam clken_ctrl_X56_Y9_N0.coord_z = 0;
  9549. defparam clken_ctrl_X56_Y9_N0.ClkMux = 2'b10;
  9550. defparam clken_ctrl_X56_Y9_N0.ClkEnMux = 2'b10;
  9551. alta_clkenctrl clken_ctrl_X56_Y9_N1(
  9552. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9553. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9554. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X56_Y9_SIG_SIG ));
  9555. defparam clken_ctrl_X56_Y9_N1.coord_x = 19;
  9556. defparam clken_ctrl_X56_Y9_N1.coord_y = 3;
  9557. defparam clken_ctrl_X56_Y9_N1.coord_z = 1;
  9558. defparam clken_ctrl_X56_Y9_N1.ClkMux = 2'b10;
  9559. defparam clken_ctrl_X56_Y9_N1.ClkEnMux = 2'b10;
  9560. alta_clkenctrl clken_ctrl_X57_Y10_N0(
  9561. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9562. .ClkEn(\macro_inst|u_uart[1]|u_rx[3]|always4~2_combout ),
  9563. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ));
  9564. defparam clken_ctrl_X57_Y10_N0.coord_x = 19;
  9565. defparam clken_ctrl_X57_Y10_N0.coord_y = 12;
  9566. defparam clken_ctrl_X57_Y10_N0.coord_z = 0;
  9567. defparam clken_ctrl_X57_Y10_N0.ClkMux = 2'b10;
  9568. defparam clken_ctrl_X57_Y10_N0.ClkEnMux = 2'b10;
  9569. alta_clkenctrl clken_ctrl_X57_Y10_N1(
  9570. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9571. .ClkEn(),
  9572. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ));
  9573. defparam clken_ctrl_X57_Y10_N1.coord_x = 19;
  9574. defparam clken_ctrl_X57_Y10_N1.coord_y = 12;
  9575. defparam clken_ctrl_X57_Y10_N1.coord_z = 1;
  9576. defparam clken_ctrl_X57_Y10_N1.ClkMux = 2'b10;
  9577. defparam clken_ctrl_X57_Y10_N1.ClkEnMux = 2'b01;
  9578. alta_clkenctrl clken_ctrl_X57_Y11_N0(
  9579. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9580. .ClkEn(\macro_inst|u_uart[1]|u_rx[2]|always4~2_combout ),
  9581. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ));
  9582. defparam clken_ctrl_X57_Y11_N0.coord_x = 20;
  9583. defparam clken_ctrl_X57_Y11_N0.coord_y = 5;
  9584. defparam clken_ctrl_X57_Y11_N0.coord_z = 0;
  9585. defparam clken_ctrl_X57_Y11_N0.ClkMux = 2'b10;
  9586. defparam clken_ctrl_X57_Y11_N0.ClkEnMux = 2'b10;
  9587. alta_clkenctrl clken_ctrl_X57_Y11_N1(
  9588. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9589. .ClkEn(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout ),
  9590. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ));
  9591. defparam clken_ctrl_X57_Y11_N1.coord_x = 20;
  9592. defparam clken_ctrl_X57_Y11_N1.coord_y = 5;
  9593. defparam clken_ctrl_X57_Y11_N1.coord_z = 1;
  9594. defparam clken_ctrl_X57_Y11_N1.ClkMux = 2'b10;
  9595. defparam clken_ctrl_X57_Y11_N1.ClkEnMux = 2'b10;
  9596. alta_clkenctrl clken_ctrl_X57_Y12_N0(
  9597. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9598. .ClkEn(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout ),
  9599. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ));
  9600. defparam clken_ctrl_X57_Y12_N0.coord_x = 20;
  9601. defparam clken_ctrl_X57_Y12_N0.coord_y = 4;
  9602. defparam clken_ctrl_X57_Y12_N0.coord_z = 0;
  9603. defparam clken_ctrl_X57_Y12_N0.ClkMux = 2'b10;
  9604. defparam clken_ctrl_X57_Y12_N0.ClkEnMux = 2'b10;
  9605. alta_clkenctrl clken_ctrl_X57_Y12_N1(
  9606. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9607. .ClkEn(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout ),
  9608. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ));
  9609. defparam clken_ctrl_X57_Y12_N1.coord_x = 20;
  9610. defparam clken_ctrl_X57_Y12_N1.coord_y = 4;
  9611. defparam clken_ctrl_X57_Y12_N1.coord_z = 1;
  9612. defparam clken_ctrl_X57_Y12_N1.ClkMux = 2'b10;
  9613. defparam clken_ctrl_X57_Y12_N1.ClkEnMux = 2'b10;
  9614. alta_clkenctrl clken_ctrl_X57_Y1_N0(
  9615. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9616. .ClkEn(),
  9617. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ));
  9618. defparam clken_ctrl_X57_Y1_N0.coord_x = 12;
  9619. defparam clken_ctrl_X57_Y1_N0.coord_y = 2;
  9620. defparam clken_ctrl_X57_Y1_N0.coord_z = 0;
  9621. defparam clken_ctrl_X57_Y1_N0.ClkMux = 2'b10;
  9622. defparam clken_ctrl_X57_Y1_N0.ClkEnMux = 2'b01;
  9623. alta_clkenctrl clken_ctrl_X57_Y1_N1(
  9624. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9625. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout ),
  9626. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout_X57_Y1_SIG_SIG ));
  9627. defparam clken_ctrl_X57_Y1_N1.coord_x = 12;
  9628. defparam clken_ctrl_X57_Y1_N1.coord_y = 2;
  9629. defparam clken_ctrl_X57_Y1_N1.coord_z = 1;
  9630. defparam clken_ctrl_X57_Y1_N1.ClkMux = 2'b10;
  9631. defparam clken_ctrl_X57_Y1_N1.ClkEnMux = 2'b10;
  9632. alta_clkenctrl clken_ctrl_X57_Y2_N0(
  9633. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9634. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout ),
  9635. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout_X57_Y2_SIG_SIG ));
  9636. defparam clken_ctrl_X57_Y2_N0.coord_x = 12;
  9637. defparam clken_ctrl_X57_Y2_N0.coord_y = 3;
  9638. defparam clken_ctrl_X57_Y2_N0.coord_z = 0;
  9639. defparam clken_ctrl_X57_Y2_N0.ClkMux = 2'b10;
  9640. defparam clken_ctrl_X57_Y2_N0.ClkEnMux = 2'b10;
  9641. alta_clkenctrl clken_ctrl_X57_Y2_N1(
  9642. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9643. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout ),
  9644. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout_X57_Y2_SIG_SIG ));
  9645. defparam clken_ctrl_X57_Y2_N1.coord_x = 12;
  9646. defparam clken_ctrl_X57_Y2_N1.coord_y = 3;
  9647. defparam clken_ctrl_X57_Y2_N1.coord_z = 1;
  9648. defparam clken_ctrl_X57_Y2_N1.ClkMux = 2'b10;
  9649. defparam clken_ctrl_X57_Y2_N1.ClkEnMux = 2'b10;
  9650. alta_clkenctrl clken_ctrl_X57_Y3_N0(
  9651. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9652. .ClkEn(),
  9653. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ));
  9654. defparam clken_ctrl_X57_Y3_N0.coord_x = 16;
  9655. defparam clken_ctrl_X57_Y3_N0.coord_y = 1;
  9656. defparam clken_ctrl_X57_Y3_N0.coord_z = 0;
  9657. defparam clken_ctrl_X57_Y3_N0.ClkMux = 2'b10;
  9658. defparam clken_ctrl_X57_Y3_N0.ClkEnMux = 2'b01;
  9659. alta_clkenctrl clken_ctrl_X57_Y3_N1(
  9660. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9661. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout ),
  9662. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ));
  9663. defparam clken_ctrl_X57_Y3_N1.coord_x = 16;
  9664. defparam clken_ctrl_X57_Y3_N1.coord_y = 1;
  9665. defparam clken_ctrl_X57_Y3_N1.coord_z = 1;
  9666. defparam clken_ctrl_X57_Y3_N1.ClkMux = 2'b10;
  9667. defparam clken_ctrl_X57_Y3_N1.ClkEnMux = 2'b10;
  9668. alta_clkenctrl clken_ctrl_X57_Y4_N0(
  9669. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9670. .ClkEn(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout ),
  9671. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout_X57_Y4_SIG_SIG ));
  9672. defparam clken_ctrl_X57_Y4_N0.coord_x = 19;
  9673. defparam clken_ctrl_X57_Y4_N0.coord_y = 5;
  9674. defparam clken_ctrl_X57_Y4_N0.coord_z = 0;
  9675. defparam clken_ctrl_X57_Y4_N0.ClkMux = 2'b10;
  9676. defparam clken_ctrl_X57_Y4_N0.ClkEnMux = 2'b10;
  9677. alta_clkenctrl clken_ctrl_X57_Y4_N1(
  9678. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9679. .ClkEn(),
  9680. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ));
  9681. defparam clken_ctrl_X57_Y4_N1.coord_x = 19;
  9682. defparam clken_ctrl_X57_Y4_N1.coord_y = 5;
  9683. defparam clken_ctrl_X57_Y4_N1.coord_z = 1;
  9684. defparam clken_ctrl_X57_Y4_N1.ClkMux = 2'b10;
  9685. defparam clken_ctrl_X57_Y4_N1.ClkEnMux = 2'b01;
  9686. alta_clkenctrl clken_ctrl_X57_Y5_N0(
  9687. .ClkIn(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp ),
  9688. .ClkEn(),
  9689. .ClkOut(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp_X57_Y5_SIG_VCC ));
  9690. defparam clken_ctrl_X57_Y5_N0.coord_x = 15;
  9691. defparam clken_ctrl_X57_Y5_N0.coord_y = 7;
  9692. defparam clken_ctrl_X57_Y5_N0.coord_z = 0;
  9693. defparam clken_ctrl_X57_Y5_N0.ClkMux = 2'b10;
  9694. defparam clken_ctrl_X57_Y5_N0.ClkEnMux = 2'b01;
  9695. alta_clkenctrl clken_ctrl_X57_Y6_N0(
  9696. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9697. .ClkEn(\macro_inst|u_uart[1]|u_rx[3]|always4~2_combout ),
  9698. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y6_SIG_SIG ));
  9699. defparam clken_ctrl_X57_Y6_N0.coord_x = 19;
  9700. defparam clken_ctrl_X57_Y6_N0.coord_y = 1;
  9701. defparam clken_ctrl_X57_Y6_N0.coord_z = 0;
  9702. defparam clken_ctrl_X57_Y6_N0.ClkMux = 2'b10;
  9703. defparam clken_ctrl_X57_Y6_N0.ClkEnMux = 2'b10;
  9704. alta_clkenctrl clken_ctrl_X57_Y6_N1(
  9705. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9706. .ClkEn(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout ),
  9707. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X57_Y6_SIG_SIG ));
  9708. defparam clken_ctrl_X57_Y6_N1.coord_x = 19;
  9709. defparam clken_ctrl_X57_Y6_N1.coord_y = 1;
  9710. defparam clken_ctrl_X57_Y6_N1.coord_z = 1;
  9711. defparam clken_ctrl_X57_Y6_N1.ClkMux = 2'b10;
  9712. defparam clken_ctrl_X57_Y6_N1.ClkEnMux = 2'b10;
  9713. alta_clkenctrl clken_ctrl_X57_Y7_N0(
  9714. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9715. .ClkEn(\macro_inst|u_uart[1]|u_rx[0]|always4~2_combout ),
  9716. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y7_SIG_SIG ));
  9717. defparam clken_ctrl_X57_Y7_N0.coord_x = 18;
  9718. defparam clken_ctrl_X57_Y7_N0.coord_y = 4;
  9719. defparam clken_ctrl_X57_Y7_N0.coord_z = 0;
  9720. defparam clken_ctrl_X57_Y7_N0.ClkMux = 2'b10;
  9721. defparam clken_ctrl_X57_Y7_N0.ClkEnMux = 2'b10;
  9722. alta_clkenctrl clken_ctrl_X57_Y7_N1(
  9723. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9724. .ClkEn(),
  9725. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ));
  9726. defparam clken_ctrl_X57_Y7_N1.coord_x = 18;
  9727. defparam clken_ctrl_X57_Y7_N1.coord_y = 4;
  9728. defparam clken_ctrl_X57_Y7_N1.coord_z = 1;
  9729. defparam clken_ctrl_X57_Y7_N1.ClkMux = 2'b10;
  9730. defparam clken_ctrl_X57_Y7_N1.ClkEnMux = 2'b01;
  9731. alta_clkenctrl clken_ctrl_X57_Y8_N0(
  9732. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9733. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9734. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ));
  9735. defparam clken_ctrl_X57_Y8_N0.coord_x = 19;
  9736. defparam clken_ctrl_X57_Y8_N0.coord_y = 6;
  9737. defparam clken_ctrl_X57_Y8_N0.coord_z = 0;
  9738. defparam clken_ctrl_X57_Y8_N0.ClkMux = 2'b10;
  9739. defparam clken_ctrl_X57_Y8_N0.ClkEnMux = 2'b10;
  9740. alta_clkenctrl clken_ctrl_X57_Y8_N1(
  9741. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9742. .ClkEn(\macro_inst|u_uart[1]|u_rx[0]|always4~2_combout ),
  9743. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ));
  9744. defparam clken_ctrl_X57_Y8_N1.coord_x = 19;
  9745. defparam clken_ctrl_X57_Y8_N1.coord_y = 6;
  9746. defparam clken_ctrl_X57_Y8_N1.coord_z = 1;
  9747. defparam clken_ctrl_X57_Y8_N1.ClkMux = 2'b10;
  9748. defparam clken_ctrl_X57_Y8_N1.ClkEnMux = 2'b10;
  9749. alta_clkenctrl clken_ctrl_X57_Y9_N0(
  9750. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9751. .ClkEn(),
  9752. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ));
  9753. defparam clken_ctrl_X57_Y9_N0.coord_x = 20;
  9754. defparam clken_ctrl_X57_Y9_N0.coord_y = 3;
  9755. defparam clken_ctrl_X57_Y9_N0.coord_z = 0;
  9756. defparam clken_ctrl_X57_Y9_N0.ClkMux = 2'b10;
  9757. defparam clken_ctrl_X57_Y9_N0.ClkEnMux = 2'b01;
  9758. alta_clkenctrl clken_ctrl_X57_Y9_N1(
  9759. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9760. .ClkEn(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout ),
  9761. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout_X57_Y9_SIG_SIG ));
  9762. defparam clken_ctrl_X57_Y9_N1.coord_x = 20;
  9763. defparam clken_ctrl_X57_Y9_N1.coord_y = 3;
  9764. defparam clken_ctrl_X57_Y9_N1.coord_z = 1;
  9765. defparam clken_ctrl_X57_Y9_N1.ClkMux = 2'b10;
  9766. defparam clken_ctrl_X57_Y9_N1.ClkEnMux = 2'b10;
  9767. alta_clkenctrl clken_ctrl_X58_Y10_N0(
  9768. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9769. .ClkEn(),
  9770. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ));
  9771. defparam clken_ctrl_X58_Y10_N0.coord_x = 20;
  9772. defparam clken_ctrl_X58_Y10_N0.coord_y = 12;
  9773. defparam clken_ctrl_X58_Y10_N0.coord_z = 0;
  9774. defparam clken_ctrl_X58_Y10_N0.ClkMux = 2'b10;
  9775. defparam clken_ctrl_X58_Y10_N0.ClkEnMux = 2'b01;
  9776. alta_clkenctrl clken_ctrl_X58_Y10_N1(
  9777. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9778. .ClkEn(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout ),
  9779. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout_X58_Y10_SIG_SIG ));
  9780. defparam clken_ctrl_X58_Y10_N1.coord_x = 20;
  9781. defparam clken_ctrl_X58_Y10_N1.coord_y = 12;
  9782. defparam clken_ctrl_X58_Y10_N1.coord_z = 1;
  9783. defparam clken_ctrl_X58_Y10_N1.ClkMux = 2'b10;
  9784. defparam clken_ctrl_X58_Y10_N1.ClkEnMux = 2'b10;
  9785. alta_clkenctrl clken_ctrl_X58_Y11_N0(
  9786. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9787. .ClkEn(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout ),
  9788. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ));
  9789. defparam clken_ctrl_X58_Y11_N0.coord_x = 20;
  9790. defparam clken_ctrl_X58_Y11_N0.coord_y = 7;
  9791. defparam clken_ctrl_X58_Y11_N0.coord_z = 0;
  9792. defparam clken_ctrl_X58_Y11_N0.ClkMux = 2'b10;
  9793. defparam clken_ctrl_X58_Y11_N0.ClkEnMux = 2'b10;
  9794. alta_clkenctrl clken_ctrl_X58_Y11_N1(
  9795. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9796. .ClkEn(),
  9797. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ));
  9798. defparam clken_ctrl_X58_Y11_N1.coord_x = 20;
  9799. defparam clken_ctrl_X58_Y11_N1.coord_y = 7;
  9800. defparam clken_ctrl_X58_Y11_N1.coord_z = 1;
  9801. defparam clken_ctrl_X58_Y11_N1.ClkMux = 2'b10;
  9802. defparam clken_ctrl_X58_Y11_N1.ClkEnMux = 2'b01;
  9803. alta_clkenctrl clken_ctrl_X58_Y12_N0(
  9804. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9805. .ClkEn(),
  9806. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ));
  9807. defparam clken_ctrl_X58_Y12_N0.coord_x = 20;
  9808. defparam clken_ctrl_X58_Y12_N0.coord_y = 10;
  9809. defparam clken_ctrl_X58_Y12_N0.coord_z = 0;
  9810. defparam clken_ctrl_X58_Y12_N0.ClkMux = 2'b10;
  9811. defparam clken_ctrl_X58_Y12_N0.ClkEnMux = 2'b01;
  9812. alta_clkenctrl clken_ctrl_X58_Y1_N0(
  9813. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9814. .ClkEn(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout ),
  9815. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout_X58_Y1_SIG_SIG ));
  9816. defparam clken_ctrl_X58_Y1_N0.coord_x = 10;
  9817. defparam clken_ctrl_X58_Y1_N0.coord_y = 1;
  9818. defparam clken_ctrl_X58_Y1_N0.coord_z = 0;
  9819. defparam clken_ctrl_X58_Y1_N0.ClkMux = 2'b10;
  9820. defparam clken_ctrl_X58_Y1_N0.ClkEnMux = 2'b10;
  9821. alta_clkenctrl clken_ctrl_X58_Y1_N1(
  9822. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9823. .ClkEn(),
  9824. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ));
  9825. defparam clken_ctrl_X58_Y1_N1.coord_x = 10;
  9826. defparam clken_ctrl_X58_Y1_N1.coord_y = 1;
  9827. defparam clken_ctrl_X58_Y1_N1.coord_z = 1;
  9828. defparam clken_ctrl_X58_Y1_N1.ClkMux = 2'b10;
  9829. defparam clken_ctrl_X58_Y1_N1.ClkEnMux = 2'b01;
  9830. alta_clkenctrl clken_ctrl_X58_Y2_N0(
  9831. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9832. .ClkEn(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  9833. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ));
  9834. defparam clken_ctrl_X58_Y2_N0.coord_x = 15;
  9835. defparam clken_ctrl_X58_Y2_N0.coord_y = 4;
  9836. defparam clken_ctrl_X58_Y2_N0.coord_z = 0;
  9837. defparam clken_ctrl_X58_Y2_N0.ClkMux = 2'b10;
  9838. defparam clken_ctrl_X58_Y2_N0.ClkEnMux = 2'b10;
  9839. alta_clkenctrl clken_ctrl_X58_Y2_N1(
  9840. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9841. .ClkEn(\macro_inst|u_uart[1]|u_regs|always1~0_combout ),
  9842. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ));
  9843. defparam clken_ctrl_X58_Y2_N1.coord_x = 15;
  9844. defparam clken_ctrl_X58_Y2_N1.coord_y = 4;
  9845. defparam clken_ctrl_X58_Y2_N1.coord_z = 1;
  9846. defparam clken_ctrl_X58_Y2_N1.ClkMux = 2'b10;
  9847. defparam clken_ctrl_X58_Y2_N1.ClkEnMux = 2'b10;
  9848. alta_clkenctrl clken_ctrl_X58_Y3_N0(
  9849. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9850. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9851. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y3_SIG_SIG ));
  9852. defparam clken_ctrl_X58_Y3_N0.coord_x = 16;
  9853. defparam clken_ctrl_X58_Y3_N0.coord_y = 2;
  9854. defparam clken_ctrl_X58_Y3_N0.coord_z = 0;
  9855. defparam clken_ctrl_X58_Y3_N0.ClkMux = 2'b10;
  9856. defparam clken_ctrl_X58_Y3_N0.ClkEnMux = 2'b10;
  9857. alta_clkenctrl clken_ctrl_X58_Y3_N1(
  9858. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9859. .ClkEn(),
  9860. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ));
  9861. defparam clken_ctrl_X58_Y3_N1.coord_x = 16;
  9862. defparam clken_ctrl_X58_Y3_N1.coord_y = 2;
  9863. defparam clken_ctrl_X58_Y3_N1.coord_z = 1;
  9864. defparam clken_ctrl_X58_Y3_N1.ClkMux = 2'b10;
  9865. defparam clken_ctrl_X58_Y3_N1.ClkEnMux = 2'b01;
  9866. alta_clkenctrl clken_ctrl_X58_Y4_N0(
  9867. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9868. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout ),
  9869. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout_X58_Y4_SIG_SIG ));
  9870. defparam clken_ctrl_X58_Y4_N0.coord_x = 17;
  9871. defparam clken_ctrl_X58_Y4_N0.coord_y = 4;
  9872. defparam clken_ctrl_X58_Y4_N0.coord_z = 0;
  9873. defparam clken_ctrl_X58_Y4_N0.ClkMux = 2'b10;
  9874. defparam clken_ctrl_X58_Y4_N0.ClkEnMux = 2'b10;
  9875. alta_clkenctrl clken_ctrl_X58_Y4_N1(
  9876. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9877. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  9878. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X58_Y4_SIG_SIG ));
  9879. defparam clken_ctrl_X58_Y4_N1.coord_x = 17;
  9880. defparam clken_ctrl_X58_Y4_N1.coord_y = 4;
  9881. defparam clken_ctrl_X58_Y4_N1.coord_z = 1;
  9882. defparam clken_ctrl_X58_Y4_N1.ClkMux = 2'b10;
  9883. defparam clken_ctrl_X58_Y4_N1.ClkEnMux = 2'b10;
  9884. alta_clkenctrl clken_ctrl_X58_Y5_N0(
  9885. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9886. .ClkEn(),
  9887. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ));
  9888. defparam clken_ctrl_X58_Y5_N0.coord_x = 17;
  9889. defparam clken_ctrl_X58_Y5_N0.coord_y = 6;
  9890. defparam clken_ctrl_X58_Y5_N0.coord_z = 0;
  9891. defparam clken_ctrl_X58_Y5_N0.ClkMux = 2'b10;
  9892. defparam clken_ctrl_X58_Y5_N0.ClkEnMux = 2'b01;
  9893. alta_clkenctrl clken_ctrl_X58_Y5_N1(
  9894. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9895. .ClkEn(\macro_inst|u_uart[1]|u_regs|always2~0_combout ),
  9896. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X58_Y5_SIG_SIG ));
  9897. defparam clken_ctrl_X58_Y5_N1.coord_x = 17;
  9898. defparam clken_ctrl_X58_Y5_N1.coord_y = 6;
  9899. defparam clken_ctrl_X58_Y5_N1.coord_z = 1;
  9900. defparam clken_ctrl_X58_Y5_N1.ClkMux = 2'b10;
  9901. defparam clken_ctrl_X58_Y5_N1.ClkEnMux = 2'b10;
  9902. alta_clkenctrl clken_ctrl_X58_Y6_N0(
  9903. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9904. .ClkEn(),
  9905. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ));
  9906. defparam clken_ctrl_X58_Y6_N0.coord_x = 18;
  9907. defparam clken_ctrl_X58_Y6_N0.coord_y = 3;
  9908. defparam clken_ctrl_X58_Y6_N0.coord_z = 0;
  9909. defparam clken_ctrl_X58_Y6_N0.ClkMux = 2'b10;
  9910. defparam clken_ctrl_X58_Y6_N0.ClkEnMux = 2'b01;
  9911. alta_clkenctrl clken_ctrl_X58_Y6_N1(
  9912. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9913. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout ),
  9914. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y6_SIG_SIG ));
  9915. defparam clken_ctrl_X58_Y6_N1.coord_x = 18;
  9916. defparam clken_ctrl_X58_Y6_N1.coord_y = 3;
  9917. defparam clken_ctrl_X58_Y6_N1.coord_z = 1;
  9918. defparam clken_ctrl_X58_Y6_N1.ClkMux = 2'b10;
  9919. defparam clken_ctrl_X58_Y6_N1.ClkEnMux = 2'b10;
  9920. alta_clkenctrl clken_ctrl_X58_Y7_N0(
  9921. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9922. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout ),
  9923. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ));
  9924. defparam clken_ctrl_X58_Y7_N0.coord_x = 17;
  9925. defparam clken_ctrl_X58_Y7_N0.coord_y = 5;
  9926. defparam clken_ctrl_X58_Y7_N0.coord_z = 0;
  9927. defparam clken_ctrl_X58_Y7_N0.ClkMux = 2'b10;
  9928. defparam clken_ctrl_X58_Y7_N0.ClkEnMux = 2'b10;
  9929. alta_clkenctrl clken_ctrl_X58_Y7_N1(
  9930. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9931. .ClkEn(),
  9932. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ));
  9933. defparam clken_ctrl_X58_Y7_N1.coord_x = 17;
  9934. defparam clken_ctrl_X58_Y7_N1.coord_y = 5;
  9935. defparam clken_ctrl_X58_Y7_N1.coord_z = 1;
  9936. defparam clken_ctrl_X58_Y7_N1.ClkMux = 2'b10;
  9937. defparam clken_ctrl_X58_Y7_N1.ClkEnMux = 2'b01;
  9938. alta_clkenctrl clken_ctrl_X58_Y8_N0(
  9939. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9940. .ClkEn(),
  9941. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ));
  9942. defparam clken_ctrl_X58_Y8_N0.coord_x = 20;
  9943. defparam clken_ctrl_X58_Y8_N0.coord_y = 8;
  9944. defparam clken_ctrl_X58_Y8_N0.coord_z = 0;
  9945. defparam clken_ctrl_X58_Y8_N0.ClkMux = 2'b10;
  9946. defparam clken_ctrl_X58_Y8_N0.ClkEnMux = 2'b01;
  9947. alta_clkenctrl clken_ctrl_X58_Y9_N0(
  9948. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9949. .ClkEn(),
  9950. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ));
  9951. defparam clken_ctrl_X58_Y9_N0.coord_x = 18;
  9952. defparam clken_ctrl_X58_Y9_N0.coord_y = 8;
  9953. defparam clken_ctrl_X58_Y9_N0.coord_z = 0;
  9954. defparam clken_ctrl_X58_Y9_N0.ClkMux = 2'b10;
  9955. defparam clken_ctrl_X58_Y9_N0.ClkEnMux = 2'b01;
  9956. alta_clkenctrl clken_ctrl_X58_Y9_N1(
  9957. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9958. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  9959. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y9_SIG_SIG ));
  9960. defparam clken_ctrl_X58_Y9_N1.coord_x = 18;
  9961. defparam clken_ctrl_X58_Y9_N1.coord_y = 8;
  9962. defparam clken_ctrl_X58_Y9_N1.coord_z = 1;
  9963. defparam clken_ctrl_X58_Y9_N1.ClkMux = 2'b10;
  9964. defparam clken_ctrl_X58_Y9_N1.ClkEnMux = 2'b10;
  9965. alta_clkenctrl clken_ctrl_X59_Y10_N0(
  9966. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9967. .ClkEn(),
  9968. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y10_SIG_VCC ));
  9969. defparam clken_ctrl_X59_Y10_N0.coord_x = 19;
  9970. defparam clken_ctrl_X59_Y10_N0.coord_y = 9;
  9971. defparam clken_ctrl_X59_Y10_N0.coord_z = 0;
  9972. defparam clken_ctrl_X59_Y10_N0.ClkMux = 2'b10;
  9973. defparam clken_ctrl_X59_Y10_N0.ClkEnMux = 2'b01;
  9974. alta_clkenctrl clken_ctrl_X59_Y10_N1(
  9975. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9976. .ClkEn(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout ),
  9977. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout_X59_Y10_SIG_SIG ));
  9978. defparam clken_ctrl_X59_Y10_N1.coord_x = 19;
  9979. defparam clken_ctrl_X59_Y10_N1.coord_y = 9;
  9980. defparam clken_ctrl_X59_Y10_N1.coord_z = 1;
  9981. defparam clken_ctrl_X59_Y10_N1.ClkMux = 2'b10;
  9982. defparam clken_ctrl_X59_Y10_N1.ClkEnMux = 2'b10;
  9983. alta_clkenctrl clken_ctrl_X59_Y11_N0(
  9984. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9985. .ClkEn(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout ),
  9986. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ));
  9987. defparam clken_ctrl_X59_Y11_N0.coord_x = 19;
  9988. defparam clken_ctrl_X59_Y11_N0.coord_y = 11;
  9989. defparam clken_ctrl_X59_Y11_N0.coord_z = 0;
  9990. defparam clken_ctrl_X59_Y11_N0.ClkMux = 2'b10;
  9991. defparam clken_ctrl_X59_Y11_N0.ClkEnMux = 2'b10;
  9992. alta_clkenctrl clken_ctrl_X59_Y11_N1(
  9993. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  9994. .ClkEn(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout ),
  9995. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ));
  9996. defparam clken_ctrl_X59_Y11_N1.coord_x = 19;
  9997. defparam clken_ctrl_X59_Y11_N1.coord_y = 11;
  9998. defparam clken_ctrl_X59_Y11_N1.coord_z = 1;
  9999. defparam clken_ctrl_X59_Y11_N1.ClkMux = 2'b10;
  10000. defparam clken_ctrl_X59_Y11_N1.ClkEnMux = 2'b10;
  10001. alta_clkenctrl clken_ctrl_X59_Y12_N0(
  10002. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10003. .ClkEn(\macro_inst|u_uart[1]|u_rx[4]|always4~2_combout ),
  10004. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ));
  10005. defparam clken_ctrl_X59_Y12_N0.coord_x = 20;
  10006. defparam clken_ctrl_X59_Y12_N0.coord_y = 11;
  10007. defparam clken_ctrl_X59_Y12_N0.coord_z = 0;
  10008. defparam clken_ctrl_X59_Y12_N0.ClkMux = 2'b10;
  10009. defparam clken_ctrl_X59_Y12_N0.ClkEnMux = 2'b10;
  10010. alta_clkenctrl clken_ctrl_X59_Y12_N1(
  10011. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10012. .ClkEn(),
  10013. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y12_SIG_VCC ));
  10014. defparam clken_ctrl_X59_Y12_N1.coord_x = 20;
  10015. defparam clken_ctrl_X59_Y12_N1.coord_y = 11;
  10016. defparam clken_ctrl_X59_Y12_N1.coord_z = 1;
  10017. defparam clken_ctrl_X59_Y12_N1.ClkMux = 2'b10;
  10018. defparam clken_ctrl_X59_Y12_N1.ClkEnMux = 2'b01;
  10019. alta_clkenctrl clken_ctrl_X59_Y1_N0(
  10020. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10021. .ClkEn(\macro_inst|u_uart[0]|u_regs|always5~1_combout ),
  10022. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ));
  10023. defparam clken_ctrl_X59_Y1_N0.coord_x = 9;
  10024. defparam clken_ctrl_X59_Y1_N0.coord_y = 1;
  10025. defparam clken_ctrl_X59_Y1_N0.coord_z = 0;
  10026. defparam clken_ctrl_X59_Y1_N0.ClkMux = 2'b10;
  10027. defparam clken_ctrl_X59_Y1_N0.ClkEnMux = 2'b10;
  10028. alta_clkenctrl clken_ctrl_X59_Y1_N1(
  10029. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10030. .ClkEn(),
  10031. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ));
  10032. defparam clken_ctrl_X59_Y1_N1.coord_x = 9;
  10033. defparam clken_ctrl_X59_Y1_N1.coord_y = 1;
  10034. defparam clken_ctrl_X59_Y1_N1.coord_z = 1;
  10035. defparam clken_ctrl_X59_Y1_N1.ClkMux = 2'b10;
  10036. defparam clken_ctrl_X59_Y1_N1.ClkEnMux = 2'b01;
  10037. alta_clkenctrl clken_ctrl_X59_Y2_N0(
  10038. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10039. .ClkEn(\macro_inst|u_ahb2apb|psel~1_combout ),
  10040. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ));
  10041. defparam clken_ctrl_X59_Y2_N0.coord_x = 15;
  10042. defparam clken_ctrl_X59_Y2_N0.coord_y = 5;
  10043. defparam clken_ctrl_X59_Y2_N0.coord_z = 0;
  10044. defparam clken_ctrl_X59_Y2_N0.ClkMux = 2'b10;
  10045. defparam clken_ctrl_X59_Y2_N0.ClkEnMux = 2'b10;
  10046. alta_clkenctrl clken_ctrl_X59_Y2_N1(
  10047. .ClkIn(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ),
  10048. .ClkEn(\macro_inst|u_ahb2apb|always0~0_combout ),
  10049. .ClkOut(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ));
  10050. defparam clken_ctrl_X59_Y2_N1.coord_x = 15;
  10051. defparam clken_ctrl_X59_Y2_N1.coord_y = 5;
  10052. defparam clken_ctrl_X59_Y2_N1.coord_z = 1;
  10053. defparam clken_ctrl_X59_Y2_N1.ClkMux = 2'b10;
  10054. defparam clken_ctrl_X59_Y2_N1.ClkEnMux = 2'b10;
  10055. alta_clkenctrl clken_ctrl_X59_Y3_N0(
  10056. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10057. .ClkEn(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  10058. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ));
  10059. defparam clken_ctrl_X59_Y3_N0.coord_x = 16;
  10060. defparam clken_ctrl_X59_Y3_N0.coord_y = 4;
  10061. defparam clken_ctrl_X59_Y3_N0.coord_z = 0;
  10062. defparam clken_ctrl_X59_Y3_N0.ClkMux = 2'b10;
  10063. defparam clken_ctrl_X59_Y3_N0.ClkEnMux = 2'b10;
  10064. alta_clkenctrl clken_ctrl_X59_Y3_N1(
  10065. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10066. .ClkEn(\macro_inst|u_ahb2apb|psel~1_combout ),
  10067. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ));
  10068. defparam clken_ctrl_X59_Y3_N1.coord_x = 16;
  10069. defparam clken_ctrl_X59_Y3_N1.coord_y = 4;
  10070. defparam clken_ctrl_X59_Y3_N1.coord_z = 1;
  10071. defparam clken_ctrl_X59_Y3_N1.ClkMux = 2'b10;
  10072. defparam clken_ctrl_X59_Y3_N1.ClkEnMux = 2'b10;
  10073. alta_clkenctrl clken_ctrl_X59_Y4_N0(
  10074. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10075. .ClkEn(\macro_inst|u_uart[1]|u_regs|always1~0_combout ),
  10076. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ));
  10077. defparam clken_ctrl_X59_Y4_N0.coord_x = 16;
  10078. defparam clken_ctrl_X59_Y4_N0.coord_y = 5;
  10079. defparam clken_ctrl_X59_Y4_N0.coord_z = 0;
  10080. defparam clken_ctrl_X59_Y4_N0.ClkMux = 2'b10;
  10081. defparam clken_ctrl_X59_Y4_N0.ClkEnMux = 2'b10;
  10082. alta_clkenctrl clken_ctrl_X59_Y4_N1(
  10083. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10084. .ClkEn(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  10085. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ));
  10086. defparam clken_ctrl_X59_Y4_N1.coord_x = 16;
  10087. defparam clken_ctrl_X59_Y4_N1.coord_y = 5;
  10088. defparam clken_ctrl_X59_Y4_N1.coord_z = 1;
  10089. defparam clken_ctrl_X59_Y4_N1.ClkMux = 2'b10;
  10090. defparam clken_ctrl_X59_Y4_N1.ClkEnMux = 2'b10;
  10091. alta_clkenctrl clken_ctrl_X59_Y5_N0(
  10092. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10093. .ClkEn(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  10094. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ));
  10095. defparam clken_ctrl_X59_Y5_N0.coord_x = 16;
  10096. defparam clken_ctrl_X59_Y5_N0.coord_y = 6;
  10097. defparam clken_ctrl_X59_Y5_N0.coord_z = 0;
  10098. defparam clken_ctrl_X59_Y5_N0.ClkMux = 2'b10;
  10099. defparam clken_ctrl_X59_Y5_N0.ClkEnMux = 2'b10;
  10100. alta_clkenctrl clken_ctrl_X59_Y5_N1(
  10101. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10102. .ClkEn(\macro_inst|u_uart[1]|u_regs|always1~0_combout ),
  10103. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ));
  10104. defparam clken_ctrl_X59_Y5_N1.coord_x = 16;
  10105. defparam clken_ctrl_X59_Y5_N1.coord_y = 6;
  10106. defparam clken_ctrl_X59_Y5_N1.coord_z = 1;
  10107. defparam clken_ctrl_X59_Y5_N1.ClkMux = 2'b10;
  10108. defparam clken_ctrl_X59_Y5_N1.ClkEnMux = 2'b10;
  10109. alta_clkenctrl clken_ctrl_X59_Y6_N0(
  10110. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10111. .ClkEn(),
  10112. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ));
  10113. defparam clken_ctrl_X59_Y6_N0.coord_x = 18;
  10114. defparam clken_ctrl_X59_Y6_N0.coord_y = 6;
  10115. defparam clken_ctrl_X59_Y6_N0.coord_z = 0;
  10116. defparam clken_ctrl_X59_Y6_N0.ClkMux = 2'b10;
  10117. defparam clken_ctrl_X59_Y6_N0.ClkEnMux = 2'b01;
  10118. alta_clkenctrl clken_ctrl_X59_Y6_N1(
  10119. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10120. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout ),
  10121. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X59_Y6_SIG_SIG ));
  10122. defparam clken_ctrl_X59_Y6_N1.coord_x = 18;
  10123. defparam clken_ctrl_X59_Y6_N1.coord_y = 6;
  10124. defparam clken_ctrl_X59_Y6_N1.coord_z = 1;
  10125. defparam clken_ctrl_X59_Y6_N1.ClkMux = 2'b10;
  10126. defparam clken_ctrl_X59_Y6_N1.ClkEnMux = 2'b10;
  10127. alta_clkenctrl clken_ctrl_X59_Y7_N0(
  10128. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10129. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout ),
  10130. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ));
  10131. defparam clken_ctrl_X59_Y7_N0.coord_x = 17;
  10132. defparam clken_ctrl_X59_Y7_N0.coord_y = 7;
  10133. defparam clken_ctrl_X59_Y7_N0.coord_z = 0;
  10134. defparam clken_ctrl_X59_Y7_N0.ClkMux = 2'b10;
  10135. defparam clken_ctrl_X59_Y7_N0.ClkEnMux = 2'b10;
  10136. alta_clkenctrl clken_ctrl_X59_Y7_N1(
  10137. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10138. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout ),
  10139. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ));
  10140. defparam clken_ctrl_X59_Y7_N1.coord_x = 17;
  10141. defparam clken_ctrl_X59_Y7_N1.coord_y = 7;
  10142. defparam clken_ctrl_X59_Y7_N1.coord_z = 1;
  10143. defparam clken_ctrl_X59_Y7_N1.ClkMux = 2'b10;
  10144. defparam clken_ctrl_X59_Y7_N1.ClkEnMux = 2'b10;
  10145. alta_clkenctrl clken_ctrl_X59_Y8_N0(
  10146. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10147. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout ),
  10148. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout_X59_Y8_SIG_SIG ));
  10149. defparam clken_ctrl_X59_Y8_N0.coord_x = 19;
  10150. defparam clken_ctrl_X59_Y8_N0.coord_y = 8;
  10151. defparam clken_ctrl_X59_Y8_N0.coord_z = 0;
  10152. defparam clken_ctrl_X59_Y8_N0.ClkMux = 2'b10;
  10153. defparam clken_ctrl_X59_Y8_N0.ClkEnMux = 2'b10;
  10154. alta_clkenctrl clken_ctrl_X59_Y8_N1(
  10155. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10156. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout ),
  10157. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout_X59_Y8_SIG_SIG ));
  10158. defparam clken_ctrl_X59_Y8_N1.coord_x = 19;
  10159. defparam clken_ctrl_X59_Y8_N1.coord_y = 8;
  10160. defparam clken_ctrl_X59_Y8_N1.coord_z = 1;
  10161. defparam clken_ctrl_X59_Y8_N1.ClkMux = 2'b10;
  10162. defparam clken_ctrl_X59_Y8_N1.ClkEnMux = 2'b10;
  10163. alta_clkenctrl clken_ctrl_X59_Y9_N0(
  10164. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10165. .ClkEn(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout ),
  10166. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout_X59_Y9_SIG_SIG ));
  10167. defparam clken_ctrl_X59_Y9_N0.coord_x = 19;
  10168. defparam clken_ctrl_X59_Y9_N0.coord_y = 10;
  10169. defparam clken_ctrl_X59_Y9_N0.coord_z = 0;
  10170. defparam clken_ctrl_X59_Y9_N0.ClkMux = 2'b10;
  10171. defparam clken_ctrl_X59_Y9_N0.ClkEnMux = 2'b10;
  10172. alta_clkenctrl clken_ctrl_X59_Y9_N1(
  10173. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10174. .ClkEn(),
  10175. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y9_SIG_VCC ));
  10176. defparam clken_ctrl_X59_Y9_N1.coord_x = 19;
  10177. defparam clken_ctrl_X59_Y9_N1.coord_y = 10;
  10178. defparam clken_ctrl_X59_Y9_N1.coord_z = 1;
  10179. defparam clken_ctrl_X59_Y9_N1.ClkMux = 2'b10;
  10180. defparam clken_ctrl_X59_Y9_N1.ClkEnMux = 2'b01;
  10181. alta_clkenctrl clken_ctrl_X60_Y10_N0(
  10182. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10183. .ClkEn(\macro_inst|u_uart[1]|u_rx[3]|always4~2_combout ),
  10184. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X60_Y10_SIG_SIG ));
  10185. defparam clken_ctrl_X60_Y10_N0.coord_x = 20;
  10186. defparam clken_ctrl_X60_Y10_N0.coord_y = 9;
  10187. defparam clken_ctrl_X60_Y10_N0.coord_z = 0;
  10188. defparam clken_ctrl_X60_Y10_N0.ClkMux = 2'b10;
  10189. defparam clken_ctrl_X60_Y10_N0.ClkEnMux = 2'b10;
  10190. alta_clkenctrl clken_ctrl_X60_Y10_N1(
  10191. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10192. .ClkEn(),
  10193. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ));
  10194. defparam clken_ctrl_X60_Y10_N1.coord_x = 20;
  10195. defparam clken_ctrl_X60_Y10_N1.coord_y = 9;
  10196. defparam clken_ctrl_X60_Y10_N1.coord_z = 1;
  10197. defparam clken_ctrl_X60_Y10_N1.ClkMux = 2'b10;
  10198. defparam clken_ctrl_X60_Y10_N1.ClkEnMux = 2'b01;
  10199. alta_clkenctrl clken_ctrl_X60_Y11_N0(
  10200. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10201. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  10202. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y11_SIG_SIG ));
  10203. defparam clken_ctrl_X60_Y11_N0.coord_x = 18;
  10204. defparam clken_ctrl_X60_Y11_N0.coord_y = 11;
  10205. defparam clken_ctrl_X60_Y11_N0.coord_z = 0;
  10206. defparam clken_ctrl_X60_Y11_N0.ClkMux = 2'b10;
  10207. defparam clken_ctrl_X60_Y11_N0.ClkEnMux = 2'b10;
  10208. alta_clkenctrl clken_ctrl_X60_Y11_N1(
  10209. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10210. .ClkEn(\macro_inst|u_uart[1]|u_rx[5]|always4~2_combout ),
  10211. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ));
  10212. defparam clken_ctrl_X60_Y11_N1.coord_x = 18;
  10213. defparam clken_ctrl_X60_Y11_N1.coord_y = 11;
  10214. defparam clken_ctrl_X60_Y11_N1.coord_z = 1;
  10215. defparam clken_ctrl_X60_Y11_N1.ClkMux = 2'b10;
  10216. defparam clken_ctrl_X60_Y11_N1.ClkEnMux = 2'b10;
  10217. alta_clkenctrl clken_ctrl_X60_Y12_N0(
  10218. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10219. .ClkEn(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout ),
  10220. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ));
  10221. defparam clken_ctrl_X60_Y12_N0.coord_x = 15;
  10222. defparam clken_ctrl_X60_Y12_N0.coord_y = 12;
  10223. defparam clken_ctrl_X60_Y12_N0.coord_z = 0;
  10224. defparam clken_ctrl_X60_Y12_N0.ClkMux = 2'b10;
  10225. defparam clken_ctrl_X60_Y12_N0.ClkEnMux = 2'b10;
  10226. alta_clkenctrl clken_ctrl_X60_Y12_N1(
  10227. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10228. .ClkEn(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout ),
  10229. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ));
  10230. defparam clken_ctrl_X60_Y12_N1.coord_x = 15;
  10231. defparam clken_ctrl_X60_Y12_N1.coord_y = 12;
  10232. defparam clken_ctrl_X60_Y12_N1.coord_z = 1;
  10233. defparam clken_ctrl_X60_Y12_N1.ClkMux = 2'b10;
  10234. defparam clken_ctrl_X60_Y12_N1.ClkEnMux = 2'b10;
  10235. alta_clkenctrl clken_ctrl_X60_Y1_N0(
  10236. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10237. .ClkEn(\macro_inst|u_uart[0]|u_regs|always2~0_combout ),
  10238. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ));
  10239. defparam clken_ctrl_X60_Y1_N0.coord_x = 11;
  10240. defparam clken_ctrl_X60_Y1_N0.coord_y = 1;
  10241. defparam clken_ctrl_X60_Y1_N0.coord_z = 0;
  10242. defparam clken_ctrl_X60_Y1_N0.ClkMux = 2'b10;
  10243. defparam clken_ctrl_X60_Y1_N0.ClkEnMux = 2'b10;
  10244. alta_clkenctrl clken_ctrl_X60_Y1_N1(
  10245. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10246. .ClkEn(),
  10247. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ));
  10248. defparam clken_ctrl_X60_Y1_N1.coord_x = 11;
  10249. defparam clken_ctrl_X60_Y1_N1.coord_y = 1;
  10250. defparam clken_ctrl_X60_Y1_N1.coord_z = 1;
  10251. defparam clken_ctrl_X60_Y1_N1.ClkMux = 2'b10;
  10252. defparam clken_ctrl_X60_Y1_N1.ClkEnMux = 2'b01;
  10253. alta_clkenctrl clken_ctrl_X60_Y2_N0(
  10254. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10255. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  10256. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ));
  10257. defparam clken_ctrl_X60_Y2_N0.coord_x = 15;
  10258. defparam clken_ctrl_X60_Y2_N0.coord_y = 3;
  10259. defparam clken_ctrl_X60_Y2_N0.coord_z = 0;
  10260. defparam clken_ctrl_X60_Y2_N0.ClkMux = 2'b10;
  10261. defparam clken_ctrl_X60_Y2_N0.ClkEnMux = 2'b10;
  10262. alta_clkenctrl clken_ctrl_X60_Y2_N1(
  10263. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10264. .ClkEn(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout ),
  10265. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ));
  10266. defparam clken_ctrl_X60_Y2_N1.coord_x = 15;
  10267. defparam clken_ctrl_X60_Y2_N1.coord_y = 3;
  10268. defparam clken_ctrl_X60_Y2_N1.coord_z = 1;
  10269. defparam clken_ctrl_X60_Y2_N1.ClkMux = 2'b10;
  10270. defparam clken_ctrl_X60_Y2_N1.ClkEnMux = 2'b10;
  10271. alta_clkenctrl clken_ctrl_X60_Y3_N0(
  10272. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10273. .ClkEn(\macro_inst|u_ahb2apb|apb_pdone~combout ),
  10274. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ));
  10275. defparam clken_ctrl_X60_Y3_N0.coord_x = 14;
  10276. defparam clken_ctrl_X60_Y3_N0.coord_y = 6;
  10277. defparam clken_ctrl_X60_Y3_N0.coord_z = 0;
  10278. defparam clken_ctrl_X60_Y3_N0.ClkMux = 2'b10;
  10279. defparam clken_ctrl_X60_Y3_N0.ClkEnMux = 2'b10;
  10280. alta_clkenctrl clken_ctrl_X60_Y3_N1(
  10281. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10282. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  10283. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ));
  10284. defparam clken_ctrl_X60_Y3_N1.coord_x = 14;
  10285. defparam clken_ctrl_X60_Y3_N1.coord_y = 6;
  10286. defparam clken_ctrl_X60_Y3_N1.coord_z = 1;
  10287. defparam clken_ctrl_X60_Y3_N1.ClkMux = 2'b10;
  10288. defparam clken_ctrl_X60_Y3_N1.ClkEnMux = 2'b10;
  10289. alta_clkenctrl clken_ctrl_X60_Y4_N0(
  10290. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10291. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout ),
  10292. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout_X60_Y4_SIG_SIG ));
  10293. defparam clken_ctrl_X60_Y4_N0.coord_x = 16;
  10294. defparam clken_ctrl_X60_Y4_N0.coord_y = 7;
  10295. defparam clken_ctrl_X60_Y4_N0.coord_z = 0;
  10296. defparam clken_ctrl_X60_Y4_N0.ClkMux = 2'b10;
  10297. defparam clken_ctrl_X60_Y4_N0.ClkEnMux = 2'b10;
  10298. alta_clkenctrl clken_ctrl_X60_Y4_N1(
  10299. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10300. .ClkEn(\macro_inst|u_uart[1]|u_regs|apb_read1~combout ),
  10301. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ));
  10302. defparam clken_ctrl_X60_Y4_N1.coord_x = 16;
  10303. defparam clken_ctrl_X60_Y4_N1.coord_y = 7;
  10304. defparam clken_ctrl_X60_Y4_N1.coord_z = 1;
  10305. defparam clken_ctrl_X60_Y4_N1.ClkMux = 2'b10;
  10306. defparam clken_ctrl_X60_Y4_N1.ClkEnMux = 2'b10;
  10307. alta_clkenctrl clken_ctrl_X60_Y5_N0(
  10308. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10309. .ClkEn(\macro_inst|u_uart[1]|u_regs|apb_read1~combout ),
  10310. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ));
  10311. defparam clken_ctrl_X60_Y5_N0.coord_x = 15;
  10312. defparam clken_ctrl_X60_Y5_N0.coord_y = 6;
  10313. defparam clken_ctrl_X60_Y5_N0.coord_z = 0;
  10314. defparam clken_ctrl_X60_Y5_N0.ClkMux = 2'b10;
  10315. defparam clken_ctrl_X60_Y5_N0.ClkEnMux = 2'b10;
  10316. alta_clkenctrl clken_ctrl_X60_Y5_N1(
  10317. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10318. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  10319. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ));
  10320. defparam clken_ctrl_X60_Y5_N1.coord_x = 15;
  10321. defparam clken_ctrl_X60_Y5_N1.coord_y = 6;
  10322. defparam clken_ctrl_X60_Y5_N1.coord_z = 1;
  10323. defparam clken_ctrl_X60_Y5_N1.ClkMux = 2'b10;
  10324. defparam clken_ctrl_X60_Y5_N1.ClkEnMux = 2'b10;
  10325. alta_clkenctrl clken_ctrl_X60_Y6_N0(
  10326. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10327. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout ),
  10328. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X60_Y6_SIG_SIG ));
  10329. defparam clken_ctrl_X60_Y6_N0.coord_x = 18;
  10330. defparam clken_ctrl_X60_Y6_N0.coord_y = 7;
  10331. defparam clken_ctrl_X60_Y6_N0.coord_z = 0;
  10332. defparam clken_ctrl_X60_Y6_N0.ClkMux = 2'b10;
  10333. defparam clken_ctrl_X60_Y6_N0.ClkEnMux = 2'b10;
  10334. alta_clkenctrl clken_ctrl_X60_Y6_N1(
  10335. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10336. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout ),
  10337. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X60_Y6_SIG_SIG ));
  10338. defparam clken_ctrl_X60_Y6_N1.coord_x = 18;
  10339. defparam clken_ctrl_X60_Y6_N1.coord_y = 7;
  10340. defparam clken_ctrl_X60_Y6_N1.coord_z = 1;
  10341. defparam clken_ctrl_X60_Y6_N1.ClkMux = 2'b10;
  10342. defparam clken_ctrl_X60_Y6_N1.ClkEnMux = 2'b10;
  10343. alta_clkenctrl clken_ctrl_X60_Y7_N0(
  10344. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10345. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout ),
  10346. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ));
  10347. defparam clken_ctrl_X60_Y7_N0.coord_x = 18;
  10348. defparam clken_ctrl_X60_Y7_N0.coord_y = 9;
  10349. defparam clken_ctrl_X60_Y7_N0.coord_z = 0;
  10350. defparam clken_ctrl_X60_Y7_N0.ClkMux = 2'b10;
  10351. defparam clken_ctrl_X60_Y7_N0.ClkEnMux = 2'b10;
  10352. alta_clkenctrl clken_ctrl_X60_Y7_N1(
  10353. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10354. .ClkEn(),
  10355. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ));
  10356. defparam clken_ctrl_X60_Y7_N1.coord_x = 18;
  10357. defparam clken_ctrl_X60_Y7_N1.coord_y = 9;
  10358. defparam clken_ctrl_X60_Y7_N1.coord_z = 1;
  10359. defparam clken_ctrl_X60_Y7_N1.ClkMux = 2'b10;
  10360. defparam clken_ctrl_X60_Y7_N1.ClkEnMux = 2'b01;
  10361. alta_clkenctrl clken_ctrl_X60_Y8_N0(
  10362. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10363. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout ),
  10364. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ));
  10365. defparam clken_ctrl_X60_Y8_N0.coord_x = 17;
  10366. defparam clken_ctrl_X60_Y8_N0.coord_y = 8;
  10367. defparam clken_ctrl_X60_Y8_N0.coord_z = 0;
  10368. defparam clken_ctrl_X60_Y8_N0.ClkMux = 2'b10;
  10369. defparam clken_ctrl_X60_Y8_N0.ClkEnMux = 2'b10;
  10370. alta_clkenctrl clken_ctrl_X60_Y8_N1(
  10371. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10372. .ClkEn(),
  10373. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ));
  10374. defparam clken_ctrl_X60_Y8_N1.coord_x = 17;
  10375. defparam clken_ctrl_X60_Y8_N1.coord_y = 8;
  10376. defparam clken_ctrl_X60_Y8_N1.coord_z = 1;
  10377. defparam clken_ctrl_X60_Y8_N1.ClkMux = 2'b10;
  10378. defparam clken_ctrl_X60_Y8_N1.ClkEnMux = 2'b01;
  10379. alta_clkenctrl clken_ctrl_X60_Y9_N0(
  10380. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10381. .ClkEn(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  10382. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ));
  10383. defparam clken_ctrl_X60_Y9_N0.coord_x = 18;
  10384. defparam clken_ctrl_X60_Y9_N0.coord_y = 10;
  10385. defparam clken_ctrl_X60_Y9_N0.coord_z = 0;
  10386. defparam clken_ctrl_X60_Y9_N0.ClkMux = 2'b10;
  10387. defparam clken_ctrl_X60_Y9_N0.ClkEnMux = 2'b10;
  10388. alta_clkenctrl clken_ctrl_X60_Y9_N1(
  10389. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10390. .ClkEn(),
  10391. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ));
  10392. defparam clken_ctrl_X60_Y9_N1.coord_x = 18;
  10393. defparam clken_ctrl_X60_Y9_N1.coord_y = 10;
  10394. defparam clken_ctrl_X60_Y9_N1.coord_z = 1;
  10395. defparam clken_ctrl_X60_Y9_N1.ClkMux = 2'b10;
  10396. defparam clken_ctrl_X60_Y9_N1.ClkEnMux = 2'b01;
  10397. alta_clkenctrl clken_ctrl_X61_Y10_N0(
  10398. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10399. .ClkEn(),
  10400. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ));
  10401. defparam clken_ctrl_X61_Y10_N0.coord_x = 17;
  10402. defparam clken_ctrl_X61_Y10_N0.coord_y = 10;
  10403. defparam clken_ctrl_X61_Y10_N0.coord_z = 0;
  10404. defparam clken_ctrl_X61_Y10_N0.ClkMux = 2'b10;
  10405. defparam clken_ctrl_X61_Y10_N0.ClkEnMux = 2'b01;
  10406. alta_clkenctrl clken_ctrl_X61_Y11_N0(
  10407. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10408. .ClkEn(),
  10409. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ));
  10410. defparam clken_ctrl_X61_Y11_N0.coord_x = 17;
  10411. defparam clken_ctrl_X61_Y11_N0.coord_y = 11;
  10412. defparam clken_ctrl_X61_Y11_N0.coord_z = 0;
  10413. defparam clken_ctrl_X61_Y11_N0.ClkMux = 2'b10;
  10414. defparam clken_ctrl_X61_Y11_N0.ClkEnMux = 2'b01;
  10415. alta_clkenctrl clken_ctrl_X61_Y12_N0(
  10416. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10417. .ClkEn(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout ),
  10418. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ));
  10419. defparam clken_ctrl_X61_Y12_N0.coord_x = 14;
  10420. defparam clken_ctrl_X61_Y12_N0.coord_y = 8;
  10421. defparam clken_ctrl_X61_Y12_N0.coord_z = 0;
  10422. defparam clken_ctrl_X61_Y12_N0.ClkMux = 2'b10;
  10423. defparam clken_ctrl_X61_Y12_N0.ClkEnMux = 2'b10;
  10424. alta_clkenctrl clken_ctrl_X61_Y12_N1(
  10425. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10426. .ClkEn(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout ),
  10427. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ));
  10428. defparam clken_ctrl_X61_Y12_N1.coord_x = 14;
  10429. defparam clken_ctrl_X61_Y12_N1.coord_y = 8;
  10430. defparam clken_ctrl_X61_Y12_N1.coord_z = 1;
  10431. defparam clken_ctrl_X61_Y12_N1.ClkMux = 2'b10;
  10432. defparam clken_ctrl_X61_Y12_N1.ClkEnMux = 2'b10;
  10433. alta_clkenctrl clken_ctrl_X61_Y1_N0(
  10434. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10435. .ClkEn(),
  10436. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ));
  10437. defparam clken_ctrl_X61_Y1_N0.coord_x = 8;
  10438. defparam clken_ctrl_X61_Y1_N0.coord_y = 2;
  10439. defparam clken_ctrl_X61_Y1_N0.coord_z = 0;
  10440. defparam clken_ctrl_X61_Y1_N0.ClkMux = 2'b10;
  10441. defparam clken_ctrl_X61_Y1_N0.ClkEnMux = 2'b01;
  10442. alta_clkenctrl clken_ctrl_X61_Y2_N0(
  10443. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10444. .ClkEn(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  10445. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X61_Y2_SIG_SIG ));
  10446. defparam clken_ctrl_X61_Y2_N0.coord_x = 15;
  10447. defparam clken_ctrl_X61_Y2_N0.coord_y = 1;
  10448. defparam clken_ctrl_X61_Y2_N0.coord_z = 0;
  10449. defparam clken_ctrl_X61_Y2_N0.ClkMux = 2'b10;
  10450. defparam clken_ctrl_X61_Y2_N0.ClkEnMux = 2'b10;
  10451. alta_clkenctrl clken_ctrl_X61_Y2_N1(
  10452. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10453. .ClkEn(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  10454. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ));
  10455. defparam clken_ctrl_X61_Y2_N1.coord_x = 15;
  10456. defparam clken_ctrl_X61_Y2_N1.coord_y = 1;
  10457. defparam clken_ctrl_X61_Y2_N1.coord_z = 1;
  10458. defparam clken_ctrl_X61_Y2_N1.ClkMux = 2'b10;
  10459. defparam clken_ctrl_X61_Y2_N1.ClkEnMux = 2'b10;
  10460. alta_clkenctrl clken_ctrl_X61_Y3_N0(
  10461. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10462. .ClkEn(\macro_inst|u_ahb2apb|apb_pdone~combout ),
  10463. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ));
  10464. defparam clken_ctrl_X61_Y3_N0.coord_x = 14;
  10465. defparam clken_ctrl_X61_Y3_N0.coord_y = 7;
  10466. defparam clken_ctrl_X61_Y3_N0.coord_z = 0;
  10467. defparam clken_ctrl_X61_Y3_N0.ClkMux = 2'b10;
  10468. defparam clken_ctrl_X61_Y3_N0.ClkEnMux = 2'b10;
  10469. alta_clkenctrl clken_ctrl_X61_Y3_N1(
  10470. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10471. .ClkEn(\macro_inst|u_apb_mux|always0~0_combout ),
  10472. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_apb_mux|always0~0_combout_X61_Y3_SIG_SIG ));
  10473. defparam clken_ctrl_X61_Y3_N1.coord_x = 14;
  10474. defparam clken_ctrl_X61_Y3_N1.coord_y = 7;
  10475. defparam clken_ctrl_X61_Y3_N1.coord_z = 1;
  10476. defparam clken_ctrl_X61_Y3_N1.ClkMux = 2'b10;
  10477. defparam clken_ctrl_X61_Y3_N1.ClkEnMux = 2'b10;
  10478. alta_clkenctrl clken_ctrl_X61_Y4_N0(
  10479. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10480. .ClkEn(),
  10481. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ));
  10482. defparam clken_ctrl_X61_Y4_N0.coord_x = 14;
  10483. defparam clken_ctrl_X61_Y4_N0.coord_y = 9;
  10484. defparam clken_ctrl_X61_Y4_N0.coord_z = 0;
  10485. defparam clken_ctrl_X61_Y4_N0.ClkMux = 2'b10;
  10486. defparam clken_ctrl_X61_Y4_N0.ClkEnMux = 2'b01;
  10487. alta_clkenctrl clken_ctrl_X61_Y4_N1(
  10488. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10489. .ClkEn(\macro_inst|u_uart[1]|u_regs|always2~0_combout ),
  10490. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ));
  10491. defparam clken_ctrl_X61_Y4_N1.coord_x = 14;
  10492. defparam clken_ctrl_X61_Y4_N1.coord_y = 9;
  10493. defparam clken_ctrl_X61_Y4_N1.coord_z = 1;
  10494. defparam clken_ctrl_X61_Y4_N1.ClkMux = 2'b10;
  10495. defparam clken_ctrl_X61_Y4_N1.ClkEnMux = 2'b10;
  10496. alta_clkenctrl clken_ctrl_X61_Y5_N0(
  10497. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10498. .ClkEn(\macro_inst|u_uart[1]|u_regs|always1~0_combout ),
  10499. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ));
  10500. defparam clken_ctrl_X61_Y5_N0.coord_x = 15;
  10501. defparam clken_ctrl_X61_Y5_N0.coord_y = 8;
  10502. defparam clken_ctrl_X61_Y5_N0.coord_z = 0;
  10503. defparam clken_ctrl_X61_Y5_N0.ClkMux = 2'b10;
  10504. defparam clken_ctrl_X61_Y5_N0.ClkEnMux = 2'b10;
  10505. alta_clkenctrl clken_ctrl_X61_Y5_N1(
  10506. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10507. .ClkEn(\macro_inst|u_uart[0]|u_regs|always2~0_combout ),
  10508. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X61_Y5_SIG_SIG ));
  10509. defparam clken_ctrl_X61_Y5_N1.coord_x = 15;
  10510. defparam clken_ctrl_X61_Y5_N1.coord_y = 8;
  10511. defparam clken_ctrl_X61_Y5_N1.coord_z = 1;
  10512. defparam clken_ctrl_X61_Y5_N1.ClkMux = 2'b10;
  10513. defparam clken_ctrl_X61_Y5_N1.ClkEnMux = 2'b10;
  10514. alta_clkenctrl clken_ctrl_X61_Y6_N0(
  10515. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10516. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout ),
  10517. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ));
  10518. defparam clken_ctrl_X61_Y6_N0.coord_x = 16;
  10519. defparam clken_ctrl_X61_Y6_N0.coord_y = 8;
  10520. defparam clken_ctrl_X61_Y6_N0.coord_z = 0;
  10521. defparam clken_ctrl_X61_Y6_N0.ClkMux = 2'b10;
  10522. defparam clken_ctrl_X61_Y6_N0.ClkEnMux = 2'b10;
  10523. alta_clkenctrl clken_ctrl_X61_Y6_N1(
  10524. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10525. .ClkEn(\macro_inst|u_uart[1]|u_regs|apb_read1~combout ),
  10526. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ));
  10527. defparam clken_ctrl_X61_Y6_N1.coord_x = 16;
  10528. defparam clken_ctrl_X61_Y6_N1.coord_y = 8;
  10529. defparam clken_ctrl_X61_Y6_N1.coord_z = 1;
  10530. defparam clken_ctrl_X61_Y6_N1.ClkMux = 2'b10;
  10531. defparam clken_ctrl_X61_Y6_N1.ClkEnMux = 2'b10;
  10532. alta_clkenctrl clken_ctrl_X61_Y7_N0(
  10533. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10534. .ClkEn(),
  10535. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ));
  10536. defparam clken_ctrl_X61_Y7_N0.coord_x = 17;
  10537. defparam clken_ctrl_X61_Y7_N0.coord_y = 9;
  10538. defparam clken_ctrl_X61_Y7_N0.coord_z = 0;
  10539. defparam clken_ctrl_X61_Y7_N0.ClkMux = 2'b10;
  10540. defparam clken_ctrl_X61_Y7_N0.ClkEnMux = 2'b01;
  10541. alta_clkenctrl clken_ctrl_X61_Y7_N1(
  10542. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10543. .ClkEn(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout ),
  10544. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y7_SIG_SIG ));
  10545. defparam clken_ctrl_X61_Y7_N1.coord_x = 17;
  10546. defparam clken_ctrl_X61_Y7_N1.coord_y = 9;
  10547. defparam clken_ctrl_X61_Y7_N1.coord_z = 1;
  10548. defparam clken_ctrl_X61_Y7_N1.ClkMux = 2'b10;
  10549. defparam clken_ctrl_X61_Y7_N1.ClkEnMux = 2'b10;
  10550. alta_clkenctrl clken_ctrl_X61_Y8_N0(
  10551. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10552. .ClkEn(),
  10553. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ));
  10554. defparam clken_ctrl_X61_Y8_N0.coord_x = 15;
  10555. defparam clken_ctrl_X61_Y8_N0.coord_y = 9;
  10556. defparam clken_ctrl_X61_Y8_N0.coord_z = 0;
  10557. defparam clken_ctrl_X61_Y8_N0.ClkMux = 2'b10;
  10558. defparam clken_ctrl_X61_Y8_N0.ClkEnMux = 2'b01;
  10559. alta_clkenctrl clken_ctrl_X61_Y9_N0(
  10560. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10561. .ClkEn(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout ),
  10562. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ));
  10563. defparam clken_ctrl_X61_Y9_N0.coord_x = 15;
  10564. defparam clken_ctrl_X61_Y9_N0.coord_y = 10;
  10565. defparam clken_ctrl_X61_Y9_N0.coord_z = 0;
  10566. defparam clken_ctrl_X61_Y9_N0.ClkMux = 2'b10;
  10567. defparam clken_ctrl_X61_Y9_N0.ClkEnMux = 2'b10;
  10568. alta_clkenctrl clken_ctrl_X61_Y9_N1(
  10569. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10570. .ClkEn(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout ),
  10571. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ));
  10572. defparam clken_ctrl_X61_Y9_N1.coord_x = 15;
  10573. defparam clken_ctrl_X61_Y9_N1.coord_y = 10;
  10574. defparam clken_ctrl_X61_Y9_N1.coord_z = 1;
  10575. defparam clken_ctrl_X61_Y9_N1.ClkMux = 2'b10;
  10576. defparam clken_ctrl_X61_Y9_N1.ClkEnMux = 2'b10;
  10577. alta_clkenctrl clken_ctrl_X62_Y10_N0(
  10578. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10579. .ClkEn(),
  10580. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ));
  10581. defparam clken_ctrl_X62_Y10_N0.coord_x = 16;
  10582. defparam clken_ctrl_X62_Y10_N0.coord_y = 11;
  10583. defparam clken_ctrl_X62_Y10_N0.coord_z = 0;
  10584. defparam clken_ctrl_X62_Y10_N0.ClkMux = 2'b10;
  10585. defparam clken_ctrl_X62_Y10_N0.ClkEnMux = 2'b01;
  10586. alta_clkenctrl clken_ctrl_X62_Y10_N1(
  10587. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10588. .ClkEn(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout ),
  10589. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout_X62_Y10_SIG_SIG ));
  10590. defparam clken_ctrl_X62_Y10_N1.coord_x = 16;
  10591. defparam clken_ctrl_X62_Y10_N1.coord_y = 11;
  10592. defparam clken_ctrl_X62_Y10_N1.coord_z = 1;
  10593. defparam clken_ctrl_X62_Y10_N1.ClkMux = 2'b10;
  10594. defparam clken_ctrl_X62_Y10_N1.ClkEnMux = 2'b10;
  10595. alta_clkenctrl clken_ctrl_X62_Y11_N0(
  10596. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10597. .ClkEn(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout ),
  10598. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout_X62_Y11_SIG_SIG ));
  10599. defparam clken_ctrl_X62_Y11_N0.coord_x = 18;
  10600. defparam clken_ctrl_X62_Y11_N0.coord_y = 12;
  10601. defparam clken_ctrl_X62_Y11_N0.coord_z = 0;
  10602. defparam clken_ctrl_X62_Y11_N0.ClkMux = 2'b10;
  10603. defparam clken_ctrl_X62_Y11_N0.ClkEnMux = 2'b10;
  10604. alta_clkenctrl clken_ctrl_X62_Y11_N1(
  10605. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10606. .ClkEn(),
  10607. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ));
  10608. defparam clken_ctrl_X62_Y11_N1.coord_x = 18;
  10609. defparam clken_ctrl_X62_Y11_N1.coord_y = 12;
  10610. defparam clken_ctrl_X62_Y11_N1.coord_z = 1;
  10611. defparam clken_ctrl_X62_Y11_N1.ClkMux = 2'b10;
  10612. defparam clken_ctrl_X62_Y11_N1.ClkEnMux = 2'b01;
  10613. alta_clkenctrl clken_ctrl_X62_Y12_N0(
  10614. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10615. .ClkEn(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout ),
  10616. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ));
  10617. defparam clken_ctrl_X62_Y12_N0.coord_x = 14;
  10618. defparam clken_ctrl_X62_Y12_N0.coord_y = 11;
  10619. defparam clken_ctrl_X62_Y12_N0.coord_z = 0;
  10620. defparam clken_ctrl_X62_Y12_N0.ClkMux = 2'b10;
  10621. defparam clken_ctrl_X62_Y12_N0.ClkEnMux = 2'b10;
  10622. alta_clkenctrl clken_ctrl_X62_Y12_N1(
  10623. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10624. .ClkEn(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout ),
  10625. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ));
  10626. defparam clken_ctrl_X62_Y12_N1.coord_x = 14;
  10627. defparam clken_ctrl_X62_Y12_N1.coord_y = 11;
  10628. defparam clken_ctrl_X62_Y12_N1.coord_z = 1;
  10629. defparam clken_ctrl_X62_Y12_N1.ClkMux = 2'b10;
  10630. defparam clken_ctrl_X62_Y12_N1.ClkEnMux = 2'b10;
  10631. alta_clkenctrl clken_ctrl_X62_Y1_N0(
  10632. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10633. .ClkEn(),
  10634. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ));
  10635. defparam clken_ctrl_X62_Y1_N0.coord_x = 8;
  10636. defparam clken_ctrl_X62_Y1_N0.coord_y = 1;
  10637. defparam clken_ctrl_X62_Y1_N0.coord_z = 0;
  10638. defparam clken_ctrl_X62_Y1_N0.ClkMux = 2'b10;
  10639. defparam clken_ctrl_X62_Y1_N0.ClkEnMux = 2'b01;
  10640. alta_clkenctrl clken_ctrl_X62_Y1_N1(
  10641. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10642. .ClkEn(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout ),
  10643. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout_X62_Y1_SIG_SIG ));
  10644. defparam clken_ctrl_X62_Y1_N1.coord_x = 8;
  10645. defparam clken_ctrl_X62_Y1_N1.coord_y = 1;
  10646. defparam clken_ctrl_X62_Y1_N1.coord_z = 1;
  10647. defparam clken_ctrl_X62_Y1_N1.ClkMux = 2'b10;
  10648. defparam clken_ctrl_X62_Y1_N1.ClkEnMux = 2'b10;
  10649. alta_clkenctrl clken_ctrl_X62_Y2_N0(
  10650. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10651. .ClkEn(),
  10652. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ));
  10653. defparam clken_ctrl_X62_Y2_N0.coord_x = 11;
  10654. defparam clken_ctrl_X62_Y2_N0.coord_y = 2;
  10655. defparam clken_ctrl_X62_Y2_N0.coord_z = 0;
  10656. defparam clken_ctrl_X62_Y2_N0.ClkMux = 2'b10;
  10657. defparam clken_ctrl_X62_Y2_N0.ClkEnMux = 2'b01;
  10658. alta_clkenctrl clken_ctrl_X62_Y2_N1(
  10659. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10660. .ClkEn(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  10661. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X62_Y2_SIG_SIG ));
  10662. defparam clken_ctrl_X62_Y2_N1.coord_x = 11;
  10663. defparam clken_ctrl_X62_Y2_N1.coord_y = 2;
  10664. defparam clken_ctrl_X62_Y2_N1.coord_z = 1;
  10665. defparam clken_ctrl_X62_Y2_N1.ClkMux = 2'b10;
  10666. defparam clken_ctrl_X62_Y2_N1.ClkEnMux = 2'b10;
  10667. alta_clkenctrl clken_ctrl_X62_Y3_N0(
  10668. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10669. .ClkEn(),
  10670. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ));
  10671. defparam clken_ctrl_X62_Y3_N0.coord_x = 11;
  10672. defparam clken_ctrl_X62_Y3_N0.coord_y = 4;
  10673. defparam clken_ctrl_X62_Y3_N0.coord_z = 0;
  10674. defparam clken_ctrl_X62_Y3_N0.ClkMux = 2'b10;
  10675. defparam clken_ctrl_X62_Y3_N0.ClkEnMux = 2'b01;
  10676. alta_clkenctrl clken_ctrl_X62_Y3_N1(
  10677. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10678. .ClkEn(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout ),
  10679. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout_X62_Y3_SIG_SIG ));
  10680. defparam clken_ctrl_X62_Y3_N1.coord_x = 11;
  10681. defparam clken_ctrl_X62_Y3_N1.coord_y = 4;
  10682. defparam clken_ctrl_X62_Y3_N1.coord_z = 1;
  10683. defparam clken_ctrl_X62_Y3_N1.ClkMux = 2'b10;
  10684. defparam clken_ctrl_X62_Y3_N1.ClkEnMux = 2'b10;
  10685. alta_clkenctrl clken_ctrl_X62_Y4_N0(
  10686. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10687. .ClkEn(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout ),
  10688. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ));
  10689. defparam clken_ctrl_X62_Y4_N0.coord_x = 20;
  10690. defparam clken_ctrl_X62_Y4_N0.coord_y = 1;
  10691. defparam clken_ctrl_X62_Y4_N0.coord_z = 0;
  10692. defparam clken_ctrl_X62_Y4_N0.ClkMux = 2'b10;
  10693. defparam clken_ctrl_X62_Y4_N0.ClkEnMux = 2'b10;
  10694. alta_clkenctrl clken_ctrl_X62_Y4_N1(
  10695. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10696. .ClkEn(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout ),
  10697. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ));
  10698. defparam clken_ctrl_X62_Y4_N1.coord_x = 20;
  10699. defparam clken_ctrl_X62_Y4_N1.coord_y = 1;
  10700. defparam clken_ctrl_X62_Y4_N1.coord_z = 1;
  10701. defparam clken_ctrl_X62_Y4_N1.ClkMux = 2'b10;
  10702. defparam clken_ctrl_X62_Y4_N1.ClkEnMux = 2'b10;
  10703. alta_clkenctrl clken_ctrl_X62_Y5_N0(
  10704. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10705. .ClkEn(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout ),
  10706. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ));
  10707. defparam clken_ctrl_X62_Y5_N0.coord_x = 14;
  10708. defparam clken_ctrl_X62_Y5_N0.coord_y = 1;
  10709. defparam clken_ctrl_X62_Y5_N0.coord_z = 0;
  10710. defparam clken_ctrl_X62_Y5_N0.ClkMux = 2'b10;
  10711. defparam clken_ctrl_X62_Y5_N0.ClkEnMux = 2'b10;
  10712. alta_clkenctrl clken_ctrl_X62_Y5_N1(
  10713. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10714. .ClkEn(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout ),
  10715. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ));
  10716. defparam clken_ctrl_X62_Y5_N1.coord_x = 14;
  10717. defparam clken_ctrl_X62_Y5_N1.coord_y = 1;
  10718. defparam clken_ctrl_X62_Y5_N1.coord_z = 1;
  10719. defparam clken_ctrl_X62_Y5_N1.ClkMux = 2'b10;
  10720. defparam clken_ctrl_X62_Y5_N1.ClkEnMux = 2'b10;
  10721. alta_clkenctrl clken_ctrl_X62_Y6_N0(
  10722. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10723. .ClkEn(),
  10724. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ));
  10725. defparam clken_ctrl_X62_Y6_N0.coord_x = 15;
  10726. defparam clken_ctrl_X62_Y6_N0.coord_y = 11;
  10727. defparam clken_ctrl_X62_Y6_N0.coord_z = 0;
  10728. defparam clken_ctrl_X62_Y6_N0.ClkMux = 2'b10;
  10729. defparam clken_ctrl_X62_Y6_N0.ClkEnMux = 2'b01;
  10730. alta_clkenctrl clken_ctrl_X62_Y6_N1(
  10731. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10732. .ClkEn(\macro_inst|u_uart[1]|u_regs|always5~0_combout ),
  10733. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ));
  10734. defparam clken_ctrl_X62_Y6_N1.coord_x = 15;
  10735. defparam clken_ctrl_X62_Y6_N1.coord_y = 11;
  10736. defparam clken_ctrl_X62_Y6_N1.coord_z = 1;
  10737. defparam clken_ctrl_X62_Y6_N1.ClkMux = 2'b10;
  10738. defparam clken_ctrl_X62_Y6_N1.ClkEnMux = 2'b10;
  10739. alta_clkenctrl clken_ctrl_X62_Y7_N0(
  10740. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10741. .ClkEn(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout ),
  10742. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ));
  10743. defparam clken_ctrl_X62_Y7_N0.coord_x = 17;
  10744. defparam clken_ctrl_X62_Y7_N0.coord_y = 12;
  10745. defparam clken_ctrl_X62_Y7_N0.coord_z = 0;
  10746. defparam clken_ctrl_X62_Y7_N0.ClkMux = 2'b10;
  10747. defparam clken_ctrl_X62_Y7_N0.ClkEnMux = 2'b10;
  10748. alta_clkenctrl clken_ctrl_X62_Y7_N1(
  10749. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10750. .ClkEn(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout ),
  10751. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ));
  10752. defparam clken_ctrl_X62_Y7_N1.coord_x = 17;
  10753. defparam clken_ctrl_X62_Y7_N1.coord_y = 12;
  10754. defparam clken_ctrl_X62_Y7_N1.coord_z = 1;
  10755. defparam clken_ctrl_X62_Y7_N1.ClkMux = 2'b10;
  10756. defparam clken_ctrl_X62_Y7_N1.ClkEnMux = 2'b10;
  10757. alta_clkenctrl clken_ctrl_X62_Y8_N0(
  10758. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10759. .ClkEn(),
  10760. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ));
  10761. defparam clken_ctrl_X62_Y8_N0.coord_x = 16;
  10762. defparam clken_ctrl_X62_Y8_N0.coord_y = 9;
  10763. defparam clken_ctrl_X62_Y8_N0.coord_z = 0;
  10764. defparam clken_ctrl_X62_Y8_N0.ClkMux = 2'b10;
  10765. defparam clken_ctrl_X62_Y8_N0.ClkEnMux = 2'b01;
  10766. alta_clkenctrl clken_ctrl_X62_Y9_N0(
  10767. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10768. .ClkEn(),
  10769. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ));
  10770. defparam clken_ctrl_X62_Y9_N0.coord_x = 16;
  10771. defparam clken_ctrl_X62_Y9_N0.coord_y = 10;
  10772. defparam clken_ctrl_X62_Y9_N0.coord_z = 0;
  10773. defparam clken_ctrl_X62_Y9_N0.ClkMux = 2'b10;
  10774. defparam clken_ctrl_X62_Y9_N0.ClkEnMux = 2'b01;
  10775. alta_clkenctrl clken_ctrl_X62_Y9_N1(
  10776. .ClkIn(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp ),
  10777. .ClkEn(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout ),
  10778. .ClkOut(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout_X62_Y9_SIG_SIG ));
  10779. defparam clken_ctrl_X62_Y9_N1.coord_x = 16;
  10780. defparam clken_ctrl_X62_Y9_N1.coord_y = 10;
  10781. defparam clken_ctrl_X62_Y9_N1.coord_z = 1;
  10782. defparam clken_ctrl_X62_Y9_N1.ClkMux = 2'b10;
  10783. defparam clken_ctrl_X62_Y9_N1.ClkEnMux = 2'b10;
  10784. alta_io_gclk \gclksw_inst|gclk_switch (
  10785. .inclk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
  10786. .outclk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp ));
  10787. defparam \gclksw_inst|gclk_switch .coord_x = 22;
  10788. defparam \gclksw_inst|gclk_switch .coord_y = 4;
  10789. defparam \gclksw_inst|gclk_switch .coord_z = 5;
  10790. alta_gclksw \gclksw_inst|gclk_switch__alta_gclksw (
  10791. .resetn(\rv32.resetn_out ),
  10792. .clkin0(\PIN_HSI~input_o ),
  10793. .clkin1(\PIN_HSE~input_o ),
  10794. .clkin2(\pll_inst|auto_generated|pll1_CLK_bus [0]),
  10795. .clkin3(1'bx),
  10796. .select({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
  10797. .clkout(\gclksw_inst|gclk_switch__alta_gclksw__clkout ));
  10798. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_x = 22;
  10799. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_y = 4;
  10800. defparam \gclksw_inst|gclk_switch__alta_gclksw .coord_z = 0;
  10801. alta_slice \gpio6_io_in[1] (
  10802. .A(vcc),
  10803. .B(\SIM_IO_15~input_o ),
  10804. .C(\uart15_rx~input_o ),
  10805. .D(gpio8_io_out_en[7]),
  10806. .Cin(),
  10807. .Qin(),
  10808. .Clk(),
  10809. .AsyncReset(),
  10810. .SyncReset(),
  10811. .ShiftData(),
  10812. .SyncLoad(),
  10813. .LutOut(gpio6_io_in[1]),
  10814. .Cout(),
  10815. .Q());
  10816. defparam \gpio6_io_in[1] .coord_x = 10;
  10817. defparam \gpio6_io_in[1] .coord_y = 4;
  10818. defparam \gpio6_io_in[1] .coord_z = 1;
  10819. defparam \gpio6_io_in[1] .mask = 16'hF0CC;
  10820. defparam \gpio6_io_in[1] .modeMux = 1'b0;
  10821. defparam \gpio6_io_in[1] .FeedbackMux = 1'b0;
  10822. defparam \gpio6_io_in[1] .ShiftMux = 1'b0;
  10823. defparam \gpio6_io_in[1] .BypassEn = 1'b0;
  10824. defparam \gpio6_io_in[1] .CarryEnb = 1'b1;
  10825. alta_slice \gpio6_io_in[3] (
  10826. .A(vcc),
  10827. .B(\rv32.gpio8_io_out_en[1] ),
  10828. .C(\SIM_IO_12~input_o ),
  10829. .D(\rv32.gpio8_io_out_data[1] ),
  10830. .Cin(),
  10831. .Qin(),
  10832. .Clk(),
  10833. .AsyncReset(),
  10834. .SyncReset(),
  10835. .ShiftData(),
  10836. .SyncLoad(),
  10837. .LutOut(gpio6_io_in[3]),
  10838. .Cout(),
  10839. .Q());
  10840. defparam \gpio6_io_in[3] .coord_x = 10;
  10841. defparam \gpio6_io_in[3] .coord_y = 4;
  10842. defparam \gpio6_io_in[3] .coord_z = 5;
  10843. defparam \gpio6_io_in[3] .mask = 16'hFCF0;
  10844. defparam \gpio6_io_in[3] .modeMux = 1'b0;
  10845. defparam \gpio6_io_in[3] .FeedbackMux = 1'b0;
  10846. defparam \gpio6_io_in[3] .ShiftMux = 1'b0;
  10847. defparam \gpio6_io_in[3] .BypassEn = 1'b0;
  10848. defparam \gpio6_io_in[3] .CarryEnb = 1'b1;
  10849. alta_slice \gpio6_io_in[5] (
  10850. .A(\rv32.gpio8_io_out_en[3] ),
  10851. .B(\rv32.gpio8_io_out_data[3] ),
  10852. .C(\SIM_IO_13~input_o ),
  10853. .D(vcc),
  10854. .Cin(),
  10855. .Qin(),
  10856. .Clk(),
  10857. .AsyncReset(),
  10858. .SyncReset(),
  10859. .ShiftData(),
  10860. .SyncLoad(),
  10861. .LutOut(gpio6_io_in[5]),
  10862. .Cout(),
  10863. .Q());
  10864. defparam \gpio6_io_in[5] .coord_x = 10;
  10865. defparam \gpio6_io_in[5] .coord_y = 4;
  10866. defparam \gpio6_io_in[5] .coord_z = 10;
  10867. defparam \gpio6_io_in[5] .mask = 16'hF8F8;
  10868. defparam \gpio6_io_in[5] .modeMux = 1'b0;
  10869. defparam \gpio6_io_in[5] .FeedbackMux = 1'b0;
  10870. defparam \gpio6_io_in[5] .ShiftMux = 1'b0;
  10871. defparam \gpio6_io_in[5] .BypassEn = 1'b0;
  10872. defparam \gpio6_io_in[5] .CarryEnb = 1'b1;
  10873. alta_slice \gpio8_io_out_en[7] (
  10874. .A(vcc),
  10875. .B(vcc),
  10876. .C(vcc),
  10877. .D(\rv32.gpio8_io_out_en[7] ),
  10878. .Cin(),
  10879. .Qin(),
  10880. .Clk(),
  10881. .AsyncReset(),
  10882. .SyncReset(),
  10883. .ShiftData(),
  10884. .SyncLoad(),
  10885. .LutOut(gpio8_io_out_en[7]),
  10886. .Cout(),
  10887. .Q());
  10888. defparam \gpio8_io_out_en[7] .coord_x = 5;
  10889. defparam \gpio8_io_out_en[7] .coord_y = 3;
  10890. defparam \gpio8_io_out_en[7] .coord_z = 0;
  10891. defparam \gpio8_io_out_en[7] .mask = 16'h00FF;
  10892. defparam \gpio8_io_out_en[7] .modeMux = 1'b0;
  10893. defparam \gpio8_io_out_en[7] .FeedbackMux = 1'b0;
  10894. defparam \gpio8_io_out_en[7] .ShiftMux = 1'b0;
  10895. defparam \gpio8_io_out_en[7] .BypassEn = 1'b0;
  10896. defparam \gpio8_io_out_en[7] .CarryEnb = 1'b1;
  10897. alta_slice \macro_inst|LessThan0~0 (
  10898. .A(\macro_inst|sim_clk_cnt [0]),
  10899. .B(\macro_inst|sim_clk_cnt [3]),
  10900. .C(\macro_inst|sim_clk_cnt [2]),
  10901. .D(\macro_inst|sim_clk_cnt [1]),
  10902. .Cin(),
  10903. .Qin(),
  10904. .Clk(),
  10905. .AsyncReset(),
  10906. .SyncReset(),
  10907. .ShiftData(),
  10908. .SyncLoad(),
  10909. .LutOut(\macro_inst|LessThan0~0_combout ),
  10910. .Cout(),
  10911. .Q());
  10912. defparam \macro_inst|LessThan0~0 .coord_x = 5;
  10913. defparam \macro_inst|LessThan0~0 .coord_y = 3;
  10914. defparam \macro_inst|LessThan0~0 .coord_z = 15;
  10915. defparam \macro_inst|LessThan0~0 .mask = 16'h1333;
  10916. defparam \macro_inst|LessThan0~0 .modeMux = 1'b0;
  10917. defparam \macro_inst|LessThan0~0 .FeedbackMux = 1'b0;
  10918. defparam \macro_inst|LessThan0~0 .ShiftMux = 1'b0;
  10919. defparam \macro_inst|LessThan0~0 .BypassEn = 1'b0;
  10920. defparam \macro_inst|LessThan0~0 .CarryEnb = 1'b1;
  10921. alta_slice \macro_inst|LessThan0~1 (
  10922. .A(\macro_inst|sim_clk_cnt [4]),
  10923. .B(\macro_inst|sim_clk_cnt [5]),
  10924. .C(\macro_inst|sim_clk_cnt [6]),
  10925. .D(\macro_inst|sim_clk_cnt [7]),
  10926. .Cin(),
  10927. .Qin(),
  10928. .Clk(),
  10929. .AsyncReset(),
  10930. .SyncReset(),
  10931. .ShiftData(),
  10932. .SyncLoad(),
  10933. .LutOut(\macro_inst|LessThan0~1_combout ),
  10934. .Cout(),
  10935. .Q());
  10936. defparam \macro_inst|LessThan0~1 .coord_x = 5;
  10937. defparam \macro_inst|LessThan0~1 .coord_y = 3;
  10938. defparam \macro_inst|LessThan0~1 .coord_z = 12;
  10939. defparam \macro_inst|LessThan0~1 .mask = 16'h0001;
  10940. defparam \macro_inst|LessThan0~1 .modeMux = 1'b0;
  10941. defparam \macro_inst|LessThan0~1 .FeedbackMux = 1'b0;
  10942. defparam \macro_inst|LessThan0~1 .ShiftMux = 1'b0;
  10943. defparam \macro_inst|LessThan0~1 .BypassEn = 1'b0;
  10944. defparam \macro_inst|LessThan0~1 .CarryEnb = 1'b1;
  10945. alta_slice \macro_inst|LessThan0~2 (
  10946. .A(vcc),
  10947. .B(vcc),
  10948. .C(\macro_inst|LessThan0~1_combout ),
  10949. .D(\macro_inst|LessThan0~0_combout ),
  10950. .Cin(),
  10951. .Qin(),
  10952. .Clk(),
  10953. .AsyncReset(),
  10954. .SyncReset(),
  10955. .ShiftData(),
  10956. .SyncLoad(),
  10957. .LutOut(\macro_inst|LessThan0~2_combout ),
  10958. .Cout(),
  10959. .Q());
  10960. defparam \macro_inst|LessThan0~2 .coord_x = 5;
  10961. defparam \macro_inst|LessThan0~2 .coord_y = 3;
  10962. defparam \macro_inst|LessThan0~2 .coord_z = 14;
  10963. defparam \macro_inst|LessThan0~2 .mask = 16'h0FFF;
  10964. defparam \macro_inst|LessThan0~2 .modeMux = 1'b0;
  10965. defparam \macro_inst|LessThan0~2 .FeedbackMux = 1'b0;
  10966. defparam \macro_inst|LessThan0~2 .ShiftMux = 1'b0;
  10967. defparam \macro_inst|LessThan0~2 .BypassEn = 1'b0;
  10968. defparam \macro_inst|LessThan0~2 .CarryEnb = 1'b1;
  10969. alta_slice \macro_inst|sim_clk_cnt[0] (
  10970. .A(vcc),
  10971. .B(\macro_inst|sim_clk_cnt [0]),
  10972. .C(vcc),
  10973. .D(vcc),
  10974. .Cin(),
  10975. .Qin(\macro_inst|sim_clk_cnt [0]),
  10976. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  10977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  10978. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  10979. .ShiftData(),
  10980. .SyncLoad(SyncLoad_X51_Y3_GND),
  10981. .LutOut(\macro_inst|sim_clk_cnt[0]~8_combout ),
  10982. .Cout(\macro_inst|sim_clk_cnt[0]~9 ),
  10983. .Q(\macro_inst|sim_clk_cnt [0]));
  10984. defparam \macro_inst|sim_clk_cnt[0] .coord_x = 5;
  10985. defparam \macro_inst|sim_clk_cnt[0] .coord_y = 3;
  10986. defparam \macro_inst|sim_clk_cnt[0] .coord_z = 4;
  10987. defparam \macro_inst|sim_clk_cnt[0] .mask = 16'h33CC;
  10988. defparam \macro_inst|sim_clk_cnt[0] .modeMux = 1'b0;
  10989. defparam \macro_inst|sim_clk_cnt[0] .FeedbackMux = 1'b0;
  10990. defparam \macro_inst|sim_clk_cnt[0] .ShiftMux = 1'b0;
  10991. defparam \macro_inst|sim_clk_cnt[0] .BypassEn = 1'b1;
  10992. defparam \macro_inst|sim_clk_cnt[0] .CarryEnb = 1'b0;
  10993. alta_slice \macro_inst|sim_clk_cnt[1] (
  10994. .A(vcc),
  10995. .B(\macro_inst|sim_clk_cnt [1]),
  10996. .C(vcc),
  10997. .D(vcc),
  10998. .Cin(\macro_inst|sim_clk_cnt[0]~9 ),
  10999. .Qin(\macro_inst|sim_clk_cnt [1]),
  11000. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11002. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11003. .ShiftData(),
  11004. .SyncLoad(SyncLoad_X51_Y3_GND),
  11005. .LutOut(\macro_inst|sim_clk_cnt[1]~10_combout ),
  11006. .Cout(\macro_inst|sim_clk_cnt[1]~11 ),
  11007. .Q(\macro_inst|sim_clk_cnt [1]));
  11008. defparam \macro_inst|sim_clk_cnt[1] .coord_x = 5;
  11009. defparam \macro_inst|sim_clk_cnt[1] .coord_y = 3;
  11010. defparam \macro_inst|sim_clk_cnt[1] .coord_z = 5;
  11011. defparam \macro_inst|sim_clk_cnt[1] .mask = 16'h3C3F;
  11012. defparam \macro_inst|sim_clk_cnt[1] .modeMux = 1'b1;
  11013. defparam \macro_inst|sim_clk_cnt[1] .FeedbackMux = 1'b0;
  11014. defparam \macro_inst|sim_clk_cnt[1] .ShiftMux = 1'b0;
  11015. defparam \macro_inst|sim_clk_cnt[1] .BypassEn = 1'b1;
  11016. defparam \macro_inst|sim_clk_cnt[1] .CarryEnb = 1'b0;
  11017. alta_slice \macro_inst|sim_clk_cnt[2] (
  11018. .A(vcc),
  11019. .B(\macro_inst|sim_clk_cnt [2]),
  11020. .C(vcc),
  11021. .D(vcc),
  11022. .Cin(\macro_inst|sim_clk_cnt[1]~11 ),
  11023. .Qin(\macro_inst|sim_clk_cnt [2]),
  11024. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11026. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11027. .ShiftData(),
  11028. .SyncLoad(SyncLoad_X51_Y3_GND),
  11029. .LutOut(\macro_inst|sim_clk_cnt[2]~12_combout ),
  11030. .Cout(\macro_inst|sim_clk_cnt[2]~13 ),
  11031. .Q(\macro_inst|sim_clk_cnt [2]));
  11032. defparam \macro_inst|sim_clk_cnt[2] .coord_x = 5;
  11033. defparam \macro_inst|sim_clk_cnt[2] .coord_y = 3;
  11034. defparam \macro_inst|sim_clk_cnt[2] .coord_z = 6;
  11035. defparam \macro_inst|sim_clk_cnt[2] .mask = 16'hC30C;
  11036. defparam \macro_inst|sim_clk_cnt[2] .modeMux = 1'b1;
  11037. defparam \macro_inst|sim_clk_cnt[2] .FeedbackMux = 1'b0;
  11038. defparam \macro_inst|sim_clk_cnt[2] .ShiftMux = 1'b0;
  11039. defparam \macro_inst|sim_clk_cnt[2] .BypassEn = 1'b1;
  11040. defparam \macro_inst|sim_clk_cnt[2] .CarryEnb = 1'b0;
  11041. alta_slice \macro_inst|sim_clk_cnt[3] (
  11042. .A(vcc),
  11043. .B(\macro_inst|sim_clk_cnt [3]),
  11044. .C(vcc),
  11045. .D(vcc),
  11046. .Cin(\macro_inst|sim_clk_cnt[2]~13 ),
  11047. .Qin(\macro_inst|sim_clk_cnt [3]),
  11048. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11050. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11051. .ShiftData(),
  11052. .SyncLoad(SyncLoad_X51_Y3_GND),
  11053. .LutOut(\macro_inst|sim_clk_cnt[3]~14_combout ),
  11054. .Cout(\macro_inst|sim_clk_cnt[3]~15 ),
  11055. .Q(\macro_inst|sim_clk_cnt [3]));
  11056. defparam \macro_inst|sim_clk_cnt[3] .coord_x = 5;
  11057. defparam \macro_inst|sim_clk_cnt[3] .coord_y = 3;
  11058. defparam \macro_inst|sim_clk_cnt[3] .coord_z = 7;
  11059. defparam \macro_inst|sim_clk_cnt[3] .mask = 16'h3C3F;
  11060. defparam \macro_inst|sim_clk_cnt[3] .modeMux = 1'b1;
  11061. defparam \macro_inst|sim_clk_cnt[3] .FeedbackMux = 1'b0;
  11062. defparam \macro_inst|sim_clk_cnt[3] .ShiftMux = 1'b0;
  11063. defparam \macro_inst|sim_clk_cnt[3] .BypassEn = 1'b1;
  11064. defparam \macro_inst|sim_clk_cnt[3] .CarryEnb = 1'b0;
  11065. alta_slice \macro_inst|sim_clk_cnt[4] (
  11066. .A(vcc),
  11067. .B(\macro_inst|sim_clk_cnt [4]),
  11068. .C(vcc),
  11069. .D(vcc),
  11070. .Cin(\macro_inst|sim_clk_cnt[3]~15 ),
  11071. .Qin(\macro_inst|sim_clk_cnt [4]),
  11072. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11074. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11075. .ShiftData(),
  11076. .SyncLoad(SyncLoad_X51_Y3_GND),
  11077. .LutOut(\macro_inst|sim_clk_cnt[4]~16_combout ),
  11078. .Cout(\macro_inst|sim_clk_cnt[4]~17 ),
  11079. .Q(\macro_inst|sim_clk_cnt [4]));
  11080. defparam \macro_inst|sim_clk_cnt[4] .coord_x = 5;
  11081. defparam \macro_inst|sim_clk_cnt[4] .coord_y = 3;
  11082. defparam \macro_inst|sim_clk_cnt[4] .coord_z = 8;
  11083. defparam \macro_inst|sim_clk_cnt[4] .mask = 16'hC30C;
  11084. defparam \macro_inst|sim_clk_cnt[4] .modeMux = 1'b1;
  11085. defparam \macro_inst|sim_clk_cnt[4] .FeedbackMux = 1'b0;
  11086. defparam \macro_inst|sim_clk_cnt[4] .ShiftMux = 1'b0;
  11087. defparam \macro_inst|sim_clk_cnt[4] .BypassEn = 1'b1;
  11088. defparam \macro_inst|sim_clk_cnt[4] .CarryEnb = 1'b0;
  11089. alta_slice \macro_inst|sim_clk_cnt[5] (
  11090. .A(vcc),
  11091. .B(\macro_inst|sim_clk_cnt [5]),
  11092. .C(vcc),
  11093. .D(vcc),
  11094. .Cin(\macro_inst|sim_clk_cnt[4]~17 ),
  11095. .Qin(\macro_inst|sim_clk_cnt [5]),
  11096. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11098. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11099. .ShiftData(),
  11100. .SyncLoad(SyncLoad_X51_Y3_GND),
  11101. .LutOut(\macro_inst|sim_clk_cnt[5]~18_combout ),
  11102. .Cout(\macro_inst|sim_clk_cnt[5]~19 ),
  11103. .Q(\macro_inst|sim_clk_cnt [5]));
  11104. defparam \macro_inst|sim_clk_cnt[5] .coord_x = 5;
  11105. defparam \macro_inst|sim_clk_cnt[5] .coord_y = 3;
  11106. defparam \macro_inst|sim_clk_cnt[5] .coord_z = 9;
  11107. defparam \macro_inst|sim_clk_cnt[5] .mask = 16'h3C3F;
  11108. defparam \macro_inst|sim_clk_cnt[5] .modeMux = 1'b1;
  11109. defparam \macro_inst|sim_clk_cnt[5] .FeedbackMux = 1'b0;
  11110. defparam \macro_inst|sim_clk_cnt[5] .ShiftMux = 1'b0;
  11111. defparam \macro_inst|sim_clk_cnt[5] .BypassEn = 1'b1;
  11112. defparam \macro_inst|sim_clk_cnt[5] .CarryEnb = 1'b0;
  11113. alta_slice \macro_inst|sim_clk_cnt[6] (
  11114. .A(vcc),
  11115. .B(\macro_inst|sim_clk_cnt [6]),
  11116. .C(vcc),
  11117. .D(vcc),
  11118. .Cin(\macro_inst|sim_clk_cnt[5]~19 ),
  11119. .Qin(\macro_inst|sim_clk_cnt [6]),
  11120. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11122. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11123. .ShiftData(),
  11124. .SyncLoad(SyncLoad_X51_Y3_GND),
  11125. .LutOut(\macro_inst|sim_clk_cnt[6]~20_combout ),
  11126. .Cout(\macro_inst|sim_clk_cnt[6]~21 ),
  11127. .Q(\macro_inst|sim_clk_cnt [6]));
  11128. defparam \macro_inst|sim_clk_cnt[6] .coord_x = 5;
  11129. defparam \macro_inst|sim_clk_cnt[6] .coord_y = 3;
  11130. defparam \macro_inst|sim_clk_cnt[6] .coord_z = 10;
  11131. defparam \macro_inst|sim_clk_cnt[6] .mask = 16'hC30C;
  11132. defparam \macro_inst|sim_clk_cnt[6] .modeMux = 1'b1;
  11133. defparam \macro_inst|sim_clk_cnt[6] .FeedbackMux = 1'b0;
  11134. defparam \macro_inst|sim_clk_cnt[6] .ShiftMux = 1'b0;
  11135. defparam \macro_inst|sim_clk_cnt[6] .BypassEn = 1'b1;
  11136. defparam \macro_inst|sim_clk_cnt[6] .CarryEnb = 1'b0;
  11137. alta_slice \macro_inst|sim_clk_cnt[7] (
  11138. .A(vcc),
  11139. .B(\macro_inst|sim_clk_cnt [7]),
  11140. .C(vcc),
  11141. .D(vcc),
  11142. .Cin(\macro_inst|sim_clk_cnt[6]~21 ),
  11143. .Qin(\macro_inst|sim_clk_cnt [7]),
  11144. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11146. .SyncReset(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ),
  11147. .ShiftData(),
  11148. .SyncLoad(SyncLoad_X51_Y3_GND),
  11149. .LutOut(\macro_inst|sim_clk_cnt[7]~22_combout ),
  11150. .Cout(),
  11151. .Q(\macro_inst|sim_clk_cnt [7]));
  11152. defparam \macro_inst|sim_clk_cnt[7] .coord_x = 5;
  11153. defparam \macro_inst|sim_clk_cnt[7] .coord_y = 3;
  11154. defparam \macro_inst|sim_clk_cnt[7] .coord_z = 11;
  11155. defparam \macro_inst|sim_clk_cnt[7] .mask = 16'h3C3C;
  11156. defparam \macro_inst|sim_clk_cnt[7] .modeMux = 1'b1;
  11157. defparam \macro_inst|sim_clk_cnt[7] .FeedbackMux = 1'b0;
  11158. defparam \macro_inst|sim_clk_cnt[7] .ShiftMux = 1'b0;
  11159. defparam \macro_inst|sim_clk_cnt[7] .BypassEn = 1'b1;
  11160. defparam \macro_inst|sim_clk_cnt[7] .CarryEnb = 1'b1;
  11161. alta_slice \macro_inst|sim_clk_reg (
  11162. .A(\macro_inst|LessThan0~1_combout ),
  11163. .B(vcc),
  11164. .C(vcc),
  11165. .D(\macro_inst|LessThan0~0_combout ),
  11166. .Cin(),
  11167. .Qin(\macro_inst|sim_clk_reg~q ),
  11168. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X51_Y3_SIG_VCC ),
  11169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y3_SIG ),
  11170. .SyncReset(),
  11171. .ShiftData(),
  11172. .SyncLoad(),
  11173. .LutOut(\macro_inst|sim_clk_reg~0_combout ),
  11174. .Cout(),
  11175. .Q(\macro_inst|sim_clk_reg~q ));
  11176. defparam \macro_inst|sim_clk_reg .coord_x = 5;
  11177. defparam \macro_inst|sim_clk_reg .coord_y = 3;
  11178. defparam \macro_inst|sim_clk_reg .coord_z = 13;
  11179. defparam \macro_inst|sim_clk_reg .mask = 16'hA50F;
  11180. defparam \macro_inst|sim_clk_reg .modeMux = 1'b0;
  11181. defparam \macro_inst|sim_clk_reg .FeedbackMux = 1'b1;
  11182. defparam \macro_inst|sim_clk_reg .ShiftMux = 1'b0;
  11183. defparam \macro_inst|sim_clk_reg .BypassEn = 1'b0;
  11184. defparam \macro_inst|sim_clk_reg .CarryEnb = 1'b1;
  11185. alta_slice \macro_inst|u_ahb2apb|apbState.apbAccess (
  11186. .A(vcc),
  11187. .B(\macro_inst|u_ahb2apb|apbState.apbSetup~q ),
  11188. .C(vcc),
  11189. .D(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  11190. .Cin(),
  11191. .Qin(\macro_inst|u_ahb2apb|apbState.apbAccess~q ),
  11192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  11193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  11194. .SyncReset(),
  11195. .ShiftData(),
  11196. .SyncLoad(),
  11197. .LutOut(\macro_inst|u_ahb2apb|Selector2~0_combout ),
  11198. .Cout(),
  11199. .Q(\macro_inst|u_ahb2apb|apbState.apbAccess~q ));
  11200. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .coord_x = 15;
  11201. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .coord_y = 2;
  11202. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .coord_z = 0;
  11203. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .mask = 16'hCCFC;
  11204. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .modeMux = 1'b0;
  11205. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .FeedbackMux = 1'b1;
  11206. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .ShiftMux = 1'b0;
  11207. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .BypassEn = 1'b0;
  11208. defparam \macro_inst|u_ahb2apb|apbState.apbAccess .CarryEnb = 1'b1;
  11209. alta_slice \macro_inst|u_ahb2apb|apbState.apbIdle (
  11210. .A(\macro_inst|u_ahb2apb|apbState.apbAccess~q ),
  11211. .B(\macro_inst|u_ahb2apb|pvalid~q ),
  11212. .C(vcc),
  11213. .D(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  11214. .Cin(),
  11215. .Qin(\macro_inst|u_ahb2apb|apbState.apbIdle~q ),
  11216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  11217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  11218. .SyncReset(),
  11219. .ShiftData(),
  11220. .SyncLoad(),
  11221. .LutOut(\macro_inst|u_ahb2apb|Selector0~0_combout ),
  11222. .Cout(),
  11223. .Q(\macro_inst|u_ahb2apb|apbState.apbIdle~q ));
  11224. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .coord_x = 15;
  11225. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .coord_y = 2;
  11226. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .coord_z = 10;
  11227. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .mask = 16'hDCFC;
  11228. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .modeMux = 1'b0;
  11229. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .FeedbackMux = 1'b1;
  11230. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .ShiftMux = 1'b0;
  11231. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .BypassEn = 1'b0;
  11232. defparam \macro_inst|u_ahb2apb|apbState.apbIdle .CarryEnb = 1'b1;
  11233. alta_slice \macro_inst|u_ahb2apb|apbState.apbSetup (
  11234. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  11235. .B(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  11236. .C(\macro_inst|u_ahb2apb|psel~1_combout ),
  11237. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  11238. .Cin(),
  11239. .Qin(\macro_inst|u_ahb2apb|apbState.apbSetup~q ),
  11240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  11241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  11242. .SyncReset(SyncReset_X56_Y3_GND),
  11243. .ShiftData(),
  11244. .SyncLoad(SyncLoad_X56_Y3_VCC),
  11245. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout ),
  11246. .Cout(),
  11247. .Q(\macro_inst|u_ahb2apb|apbState.apbSetup~q ));
  11248. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .coord_x = 15;
  11249. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .coord_y = 2;
  11250. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .coord_z = 7;
  11251. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .mask = 16'hEECC;
  11252. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .modeMux = 1'b0;
  11253. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .FeedbackMux = 1'b0;
  11254. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .ShiftMux = 1'b0;
  11255. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .BypassEn = 1'b1;
  11256. defparam \macro_inst|u_ahb2apb|apbState.apbSetup .CarryEnb = 1'b1;
  11257. alta_slice \macro_inst|u_ahb2apb|apb_pdone (
  11258. .A(\macro_inst|u_ahb2apb|psel~q ),
  11259. .B(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  11260. .C(\macro_inst|u_ahb2apb|penable~q ),
  11261. .D(vcc),
  11262. .Cin(),
  11263. .Qin(),
  11264. .Clk(),
  11265. .AsyncReset(),
  11266. .SyncReset(),
  11267. .ShiftData(),
  11268. .SyncLoad(),
  11269. .LutOut(\macro_inst|u_ahb2apb|apb_pdone~combout ),
  11270. .Cout(),
  11271. .Q());
  11272. defparam \macro_inst|u_ahb2apb|apb_pdone .coord_x = 14;
  11273. defparam \macro_inst|u_ahb2apb|apb_pdone .coord_y = 6;
  11274. defparam \macro_inst|u_ahb2apb|apb_pdone .coord_z = 12;
  11275. defparam \macro_inst|u_ahb2apb|apb_pdone .mask = 16'h8080;
  11276. defparam \macro_inst|u_ahb2apb|apb_pdone .modeMux = 1'b0;
  11277. defparam \macro_inst|u_ahb2apb|apb_pdone .FeedbackMux = 1'b0;
  11278. defparam \macro_inst|u_ahb2apb|apb_pdone .ShiftMux = 1'b0;
  11279. defparam \macro_inst|u_ahb2apb|apb_pdone .BypassEn = 1'b0;
  11280. defparam \macro_inst|u_ahb2apb|apb_pdone .CarryEnb = 1'b1;
  11281. alta_slice \macro_inst|u_ahb2apb|haddr[10] (
  11282. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  11283. .B(\macro_inst|u_uart[1]|u_regs|ibrd [1]),
  11284. .C(\rv32.mem_ahb_haddr[10] ),
  11285. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  11286. .Cin(),
  11287. .Qin(\macro_inst|u_ahb2apb|haddr [10]),
  11288. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11290. .SyncReset(SyncReset_X59_Y2_GND),
  11291. .ShiftData(),
  11292. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11293. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~0_combout ),
  11294. .Cout(),
  11295. .Q(\macro_inst|u_ahb2apb|haddr [10]));
  11296. defparam \macro_inst|u_ahb2apb|haddr[10] .coord_x = 15;
  11297. defparam \macro_inst|u_ahb2apb|haddr[10] .coord_y = 5;
  11298. defparam \macro_inst|u_ahb2apb|haddr[10] .coord_z = 14;
  11299. defparam \macro_inst|u_ahb2apb|haddr[10] .mask = 16'h7722;
  11300. defparam \macro_inst|u_ahb2apb|haddr[10] .modeMux = 1'b0;
  11301. defparam \macro_inst|u_ahb2apb|haddr[10] .FeedbackMux = 1'b0;
  11302. defparam \macro_inst|u_ahb2apb|haddr[10] .ShiftMux = 1'b0;
  11303. defparam \macro_inst|u_ahb2apb|haddr[10] .BypassEn = 1'b1;
  11304. defparam \macro_inst|u_ahb2apb|haddr[10] .CarryEnb = 1'b1;
  11305. alta_slice \macro_inst|u_ahb2apb|haddr[12] (
  11306. .A(),
  11307. .B(),
  11308. .C(\rv32.mem_ahb_haddr[12] ),
  11309. .D(),
  11310. .Cin(),
  11311. .Qin(\macro_inst|u_ahb2apb|haddr [12]),
  11312. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X54_Y2_SIG_SIG ),
  11313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  11314. .SyncReset(SyncReset_X54_Y2_GND),
  11315. .ShiftData(),
  11316. .SyncLoad(SyncLoad_X54_Y2_VCC),
  11317. .LutOut(),
  11318. .Cout(),
  11319. .Q(\macro_inst|u_ahb2apb|haddr [12]));
  11320. defparam \macro_inst|u_ahb2apb|haddr[12] .coord_x = 14;
  11321. defparam \macro_inst|u_ahb2apb|haddr[12] .coord_y = 5;
  11322. defparam \macro_inst|u_ahb2apb|haddr[12] .coord_z = 4;
  11323. defparam \macro_inst|u_ahb2apb|haddr[12] .mask = 16'hFFFF;
  11324. defparam \macro_inst|u_ahb2apb|haddr[12] .modeMux = 1'b1;
  11325. defparam \macro_inst|u_ahb2apb|haddr[12] .FeedbackMux = 1'b0;
  11326. defparam \macro_inst|u_ahb2apb|haddr[12] .ShiftMux = 1'b0;
  11327. defparam \macro_inst|u_ahb2apb|haddr[12] .BypassEn = 1'b1;
  11328. defparam \macro_inst|u_ahb2apb|haddr[12] .CarryEnb = 1'b1;
  11329. alta_slice \macro_inst|u_ahb2apb|haddr[2] (
  11330. .A(vcc),
  11331. .B(\macro_inst|u_ahb2apb|paddr [5]),
  11332. .C(\rv32.mem_ahb_haddr[2] ),
  11333. .D(\macro_inst|u_ahb2apb|paddr [4]),
  11334. .Cin(),
  11335. .Qin(\macro_inst|u_ahb2apb|haddr [2]),
  11336. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11338. .SyncReset(SyncReset_X59_Y2_GND),
  11339. .ShiftData(),
  11340. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11341. .LutOut(\macro_inst|u_uart[1]|u_regs|Equal2~0_combout ),
  11342. .Cout(),
  11343. .Q(\macro_inst|u_ahb2apb|haddr [2]));
  11344. defparam \macro_inst|u_ahb2apb|haddr[2] .coord_x = 15;
  11345. defparam \macro_inst|u_ahb2apb|haddr[2] .coord_y = 5;
  11346. defparam \macro_inst|u_ahb2apb|haddr[2] .coord_z = 2;
  11347. defparam \macro_inst|u_ahb2apb|haddr[2] .mask = 16'h0033;
  11348. defparam \macro_inst|u_ahb2apb|haddr[2] .modeMux = 1'b0;
  11349. defparam \macro_inst|u_ahb2apb|haddr[2] .FeedbackMux = 1'b0;
  11350. defparam \macro_inst|u_ahb2apb|haddr[2] .ShiftMux = 1'b0;
  11351. defparam \macro_inst|u_ahb2apb|haddr[2] .BypassEn = 1'b1;
  11352. defparam \macro_inst|u_ahb2apb|haddr[2] .CarryEnb = 1'b1;
  11353. alta_slice \macro_inst|u_ahb2apb|haddr[3] (
  11354. .A(\macro_inst|u_ahb2apb|paddr [3]),
  11355. .B(\macro_inst|u_ahb2apb|paddr [5]),
  11356. .C(\rv32.mem_ahb_haddr[3] ),
  11357. .D(\macro_inst|u_ahb2apb|paddr [4]),
  11358. .Cin(),
  11359. .Qin(\macro_inst|u_ahb2apb|haddr [3]),
  11360. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11362. .SyncReset(SyncReset_X59_Y2_GND),
  11363. .ShiftData(),
  11364. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11365. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  11366. .Cout(),
  11367. .Q(\macro_inst|u_ahb2apb|haddr [3]));
  11368. defparam \macro_inst|u_ahb2apb|haddr[3] .coord_x = 15;
  11369. defparam \macro_inst|u_ahb2apb|haddr[3] .coord_y = 5;
  11370. defparam \macro_inst|u_ahb2apb|haddr[3] .coord_z = 6;
  11371. defparam \macro_inst|u_ahb2apb|haddr[3] .mask = 16'hFF44;
  11372. defparam \macro_inst|u_ahb2apb|haddr[3] .modeMux = 1'b0;
  11373. defparam \macro_inst|u_ahb2apb|haddr[3] .FeedbackMux = 1'b0;
  11374. defparam \macro_inst|u_ahb2apb|haddr[3] .ShiftMux = 1'b0;
  11375. defparam \macro_inst|u_ahb2apb|haddr[3] .BypassEn = 1'b1;
  11376. defparam \macro_inst|u_ahb2apb|haddr[3] .CarryEnb = 1'b1;
  11377. alta_slice \macro_inst|u_ahb2apb|haddr[4] (
  11378. .A(vcc),
  11379. .B(\macro_inst|u_ahb2apb|paddr [2]),
  11380. .C(\rv32.mem_ahb_haddr[4] ),
  11381. .D(\macro_inst|u_ahb2apb|paddr [10]),
  11382. .Cin(),
  11383. .Qin(\macro_inst|u_ahb2apb|haddr [4]),
  11384. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11386. .SyncReset(SyncReset_X59_Y2_GND),
  11387. .ShiftData(),
  11388. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11389. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  11390. .Cout(),
  11391. .Q(\macro_inst|u_ahb2apb|haddr [4]));
  11392. defparam \macro_inst|u_ahb2apb|haddr[4] .coord_x = 15;
  11393. defparam \macro_inst|u_ahb2apb|haddr[4] .coord_y = 5;
  11394. defparam \macro_inst|u_ahb2apb|haddr[4] .coord_z = 9;
  11395. defparam \macro_inst|u_ahb2apb|haddr[4] .mask = 16'hCC00;
  11396. defparam \macro_inst|u_ahb2apb|haddr[4] .modeMux = 1'b0;
  11397. defparam \macro_inst|u_ahb2apb|haddr[4] .FeedbackMux = 1'b0;
  11398. defparam \macro_inst|u_ahb2apb|haddr[4] .ShiftMux = 1'b0;
  11399. defparam \macro_inst|u_ahb2apb|haddr[4] .BypassEn = 1'b1;
  11400. defparam \macro_inst|u_ahb2apb|haddr[4] .CarryEnb = 1'b1;
  11401. alta_slice \macro_inst|u_ahb2apb|haddr[5] (
  11402. .A(\macro_inst|u_ahb2apb|paddr [4]),
  11403. .B(\macro_inst|u_ahb2apb|paddr [3]),
  11404. .C(\rv32.mem_ahb_haddr[5] ),
  11405. .D(\macro_inst|u_ahb2apb|paddr [2]),
  11406. .Cin(),
  11407. .Qin(\macro_inst|u_ahb2apb|haddr [5]),
  11408. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11410. .SyncReset(SyncReset_X59_Y2_GND),
  11411. .ShiftData(),
  11412. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11413. .LutOut(\macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ),
  11414. .Cout(),
  11415. .Q(\macro_inst|u_ahb2apb|haddr [5]));
  11416. defparam \macro_inst|u_ahb2apb|haddr[5] .coord_x = 15;
  11417. defparam \macro_inst|u_ahb2apb|haddr[5] .coord_y = 5;
  11418. defparam \macro_inst|u_ahb2apb|haddr[5] .coord_z = 4;
  11419. defparam \macro_inst|u_ahb2apb|haddr[5] .mask = 16'h1100;
  11420. defparam \macro_inst|u_ahb2apb|haddr[5] .modeMux = 1'b0;
  11421. defparam \macro_inst|u_ahb2apb|haddr[5] .FeedbackMux = 1'b0;
  11422. defparam \macro_inst|u_ahb2apb|haddr[5] .ShiftMux = 1'b0;
  11423. defparam \macro_inst|u_ahb2apb|haddr[5] .BypassEn = 1'b1;
  11424. defparam \macro_inst|u_ahb2apb|haddr[5] .CarryEnb = 1'b1;
  11425. alta_slice \macro_inst|u_ahb2apb|haddr[6] (
  11426. .A(\macro_inst|u_ahb2apb|paddr [10]),
  11427. .B(\macro_inst|u_ahb2apb|paddr [8]),
  11428. .C(\rv32.mem_ahb_haddr[6] ),
  11429. .D(\macro_inst|u_ahb2apb|paddr [5]),
  11430. .Cin(),
  11431. .Qin(\macro_inst|u_ahb2apb|haddr [6]),
  11432. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11434. .SyncReset(SyncReset_X59_Y2_GND),
  11435. .ShiftData(),
  11436. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11437. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  11438. .Cout(),
  11439. .Q(\macro_inst|u_ahb2apb|haddr [6]));
  11440. defparam \macro_inst|u_ahb2apb|haddr[6] .coord_x = 15;
  11441. defparam \macro_inst|u_ahb2apb|haddr[6] .coord_y = 5;
  11442. defparam \macro_inst|u_ahb2apb|haddr[6] .coord_z = 11;
  11443. defparam \macro_inst|u_ahb2apb|haddr[6] .mask = 16'hDD00;
  11444. defparam \macro_inst|u_ahb2apb|haddr[6] .modeMux = 1'b0;
  11445. defparam \macro_inst|u_ahb2apb|haddr[6] .FeedbackMux = 1'b0;
  11446. defparam \macro_inst|u_ahb2apb|haddr[6] .ShiftMux = 1'b0;
  11447. defparam \macro_inst|u_ahb2apb|haddr[6] .BypassEn = 1'b1;
  11448. defparam \macro_inst|u_ahb2apb|haddr[6] .CarryEnb = 1'b1;
  11449. alta_slice \macro_inst|u_ahb2apb|haddr[7] (
  11450. .A(vcc),
  11451. .B(\rv32.mem_ahb_htrans[1] ),
  11452. .C(\rv32.mem_ahb_haddr[7] ),
  11453. .D(\macro_inst|u_ahb2apb|hreadyout~q ),
  11454. .Cin(),
  11455. .Qin(\macro_inst|u_ahb2apb|haddr [7]),
  11456. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X54_Y2_SIG_SIG ),
  11457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  11458. .SyncReset(SyncReset_X54_Y2_GND),
  11459. .ShiftData(),
  11460. .SyncLoad(SyncLoad_X54_Y2_VCC),
  11461. .LutOut(\macro_inst|u_ahb2apb|always0~0_combout ),
  11462. .Cout(),
  11463. .Q(\macro_inst|u_ahb2apb|haddr [7]));
  11464. defparam \macro_inst|u_ahb2apb|haddr[7] .coord_x = 14;
  11465. defparam \macro_inst|u_ahb2apb|haddr[7] .coord_y = 5;
  11466. defparam \macro_inst|u_ahb2apb|haddr[7] .coord_z = 13;
  11467. defparam \macro_inst|u_ahb2apb|haddr[7] .mask = 16'h00CC;
  11468. defparam \macro_inst|u_ahb2apb|haddr[7] .modeMux = 1'b0;
  11469. defparam \macro_inst|u_ahb2apb|haddr[7] .FeedbackMux = 1'b0;
  11470. defparam \macro_inst|u_ahb2apb|haddr[7] .ShiftMux = 1'b0;
  11471. defparam \macro_inst|u_ahb2apb|haddr[7] .BypassEn = 1'b1;
  11472. defparam \macro_inst|u_ahb2apb|haddr[7] .CarryEnb = 1'b1;
  11473. alta_slice \macro_inst|u_ahb2apb|haddr[8] (
  11474. .A(\macro_inst|u_ahb2apb|paddr [2]),
  11475. .B(\macro_inst|u_ahb2apb|paddr [5]),
  11476. .C(\rv32.mem_ahb_haddr[8] ),
  11477. .D(\macro_inst|u_ahb2apb|paddr [3]),
  11478. .Cin(),
  11479. .Qin(\macro_inst|u_ahb2apb|haddr [8]),
  11480. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11482. .SyncReset(SyncReset_X59_Y2_GND),
  11483. .ShiftData(),
  11484. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11485. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  11486. .Cout(),
  11487. .Q(\macro_inst|u_ahb2apb|haddr [8]));
  11488. defparam \macro_inst|u_ahb2apb|haddr[8] .coord_x = 15;
  11489. defparam \macro_inst|u_ahb2apb|haddr[8] .coord_y = 5;
  11490. defparam \macro_inst|u_ahb2apb|haddr[8] .coord_z = 1;
  11491. defparam \macro_inst|u_ahb2apb|haddr[8] .mask = 16'hAACC;
  11492. defparam \macro_inst|u_ahb2apb|haddr[8] .modeMux = 1'b0;
  11493. defparam \macro_inst|u_ahb2apb|haddr[8] .FeedbackMux = 1'b0;
  11494. defparam \macro_inst|u_ahb2apb|haddr[8] .ShiftMux = 1'b0;
  11495. defparam \macro_inst|u_ahb2apb|haddr[8] .BypassEn = 1'b1;
  11496. defparam \macro_inst|u_ahb2apb|haddr[8] .CarryEnb = 1'b1;
  11497. alta_slice \macro_inst|u_ahb2apb|haddr[9] (
  11498. .A(\macro_inst|u_ahb2apb|paddr [5]),
  11499. .B(\macro_inst|u_ahb2apb|paddr [3]),
  11500. .C(\rv32.mem_ahb_haddr[9] ),
  11501. .D(\macro_inst|u_ahb2apb|paddr [2]),
  11502. .Cin(),
  11503. .Qin(\macro_inst|u_ahb2apb|haddr [9]),
  11504. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X59_Y2_SIG_SIG ),
  11505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11506. .SyncReset(SyncReset_X59_Y2_GND),
  11507. .ShiftData(),
  11508. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11509. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  11510. .Cout(),
  11511. .Q(\macro_inst|u_ahb2apb|haddr [9]));
  11512. defparam \macro_inst|u_ahb2apb|haddr[9] .coord_x = 15;
  11513. defparam \macro_inst|u_ahb2apb|haddr[9] .coord_y = 5;
  11514. defparam \macro_inst|u_ahb2apb|haddr[9] .coord_z = 12;
  11515. defparam \macro_inst|u_ahb2apb|haddr[9] .mask = 16'h3311;
  11516. defparam \macro_inst|u_ahb2apb|haddr[9] .modeMux = 1'b0;
  11517. defparam \macro_inst|u_ahb2apb|haddr[9] .FeedbackMux = 1'b0;
  11518. defparam \macro_inst|u_ahb2apb|haddr[9] .ShiftMux = 1'b0;
  11519. defparam \macro_inst|u_ahb2apb|haddr[9] .BypassEn = 1'b1;
  11520. defparam \macro_inst|u_ahb2apb|haddr[9] .CarryEnb = 1'b1;
  11521. alta_slice \macro_inst|u_ahb2apb|hdone (
  11522. .A(\macro_inst|u_ahb2apb|pvalid~q ),
  11523. .B(vcc),
  11524. .C(vcc),
  11525. .D(\macro_inst|u_ahb2apb|hreadyout~q ),
  11526. .Cin(),
  11527. .Qin(\macro_inst|u_ahb2apb|hdone~q ),
  11528. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X50_Y2_SIG_VCC ),
  11529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  11530. .SyncReset(),
  11531. .ShiftData(),
  11532. .SyncLoad(),
  11533. .LutOut(\macro_inst|u_ahb2apb|hdone~0_combout ),
  11534. .Cout(),
  11535. .Q(\macro_inst|u_ahb2apb|hdone~q ));
  11536. defparam \macro_inst|u_ahb2apb|hdone .coord_x = 14;
  11537. defparam \macro_inst|u_ahb2apb|hdone .coord_y = 4;
  11538. defparam \macro_inst|u_ahb2apb|hdone .coord_z = 14;
  11539. defparam \macro_inst|u_ahb2apb|hdone .mask = 16'hFA00;
  11540. defparam \macro_inst|u_ahb2apb|hdone .modeMux = 1'b0;
  11541. defparam \macro_inst|u_ahb2apb|hdone .FeedbackMux = 1'b1;
  11542. defparam \macro_inst|u_ahb2apb|hdone .ShiftMux = 1'b0;
  11543. defparam \macro_inst|u_ahb2apb|hdone .BypassEn = 1'b0;
  11544. defparam \macro_inst|u_ahb2apb|hdone .CarryEnb = 1'b1;
  11545. alta_slice \macro_inst|u_ahb2apb|hreadyout (
  11546. .A(\macro_inst|u_ahb2apb|hdone~q ),
  11547. .B(\macro_inst|u_ahb2apb|pdone~q ),
  11548. .C(vcc),
  11549. .D(\rv32.mem_ahb_htrans[1] ),
  11550. .Cin(),
  11551. .Qin(\macro_inst|u_ahb2apb|hreadyout~q ),
  11552. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp_X50_Y2_SIG_VCC ),
  11553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  11554. .SyncReset(),
  11555. .ShiftData(),
  11556. .SyncLoad(),
  11557. .LutOut(\macro_inst|u_ahb2apb|hreadyout~0_combout ),
  11558. .Cout(),
  11559. .Q(\macro_inst|u_ahb2apb|hreadyout~q ));
  11560. defparam \macro_inst|u_ahb2apb|hreadyout .coord_x = 14;
  11561. defparam \macro_inst|u_ahb2apb|hreadyout .coord_y = 4;
  11562. defparam \macro_inst|u_ahb2apb|hreadyout .coord_z = 3;
  11563. defparam \macro_inst|u_ahb2apb|hreadyout .mask = 16'h7F70;
  11564. defparam \macro_inst|u_ahb2apb|hreadyout .modeMux = 1'b0;
  11565. defparam \macro_inst|u_ahb2apb|hreadyout .FeedbackMux = 1'b1;
  11566. defparam \macro_inst|u_ahb2apb|hreadyout .ShiftMux = 1'b0;
  11567. defparam \macro_inst|u_ahb2apb|hreadyout .BypassEn = 1'b0;
  11568. defparam \macro_inst|u_ahb2apb|hreadyout .CarryEnb = 1'b1;
  11569. alta_slice \macro_inst|u_ahb2apb|hwrite (
  11570. .A(vcc),
  11571. .B(vcc),
  11572. .C(\rv32.mem_ahb_hwrite ),
  11573. .D(vcc),
  11574. .Cin(),
  11575. .Qin(\macro_inst|u_ahb2apb|hwrite~q ),
  11576. .Clk(\auto_generated_inst.hbo_22_f9ff3d300b43c0f2_bp__macro_inst|u_ahb2apb|always0~0_combout_X54_Y2_SIG_SIG ),
  11577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  11578. .SyncReset(SyncReset_X54_Y2_GND),
  11579. .ShiftData(),
  11580. .SyncLoad(SyncLoad_X54_Y2_VCC),
  11581. .LutOut(\~GND~combout ),
  11582. .Cout(),
  11583. .Q(\macro_inst|u_ahb2apb|hwrite~q ));
  11584. defparam \macro_inst|u_ahb2apb|hwrite .coord_x = 14;
  11585. defparam \macro_inst|u_ahb2apb|hwrite .coord_y = 5;
  11586. defparam \macro_inst|u_ahb2apb|hwrite .coord_z = 3;
  11587. defparam \macro_inst|u_ahb2apb|hwrite .mask = 16'h0000;
  11588. defparam \macro_inst|u_ahb2apb|hwrite .modeMux = 1'b0;
  11589. defparam \macro_inst|u_ahb2apb|hwrite .FeedbackMux = 1'b0;
  11590. defparam \macro_inst|u_ahb2apb|hwrite .ShiftMux = 1'b0;
  11591. defparam \macro_inst|u_ahb2apb|hwrite .BypassEn = 1'b1;
  11592. defparam \macro_inst|u_ahb2apb|hwrite .CarryEnb = 1'b1;
  11593. alta_slice \macro_inst|u_ahb2apb|paddr[10] (
  11594. .A(vcc),
  11595. .B(\macro_inst|u_ahb2apb|paddr [8]),
  11596. .C(\macro_inst|u_ahb2apb|haddr [10]),
  11597. .D(\macro_inst|u_ahb2apb|paddr [9]),
  11598. .Cin(),
  11599. .Qin(\macro_inst|u_ahb2apb|paddr [10]),
  11600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11602. .SyncReset(SyncReset_X59_Y2_GND),
  11603. .ShiftData(),
  11604. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11605. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  11606. .Cout(),
  11607. .Q(\macro_inst|u_ahb2apb|paddr [10]));
  11608. defparam \macro_inst|u_ahb2apb|paddr[10] .coord_x = 15;
  11609. defparam \macro_inst|u_ahb2apb|paddr[10] .coord_y = 5;
  11610. defparam \macro_inst|u_ahb2apb|paddr[10] .coord_z = 8;
  11611. defparam \macro_inst|u_ahb2apb|paddr[10] .mask = 16'h0C00;
  11612. defparam \macro_inst|u_ahb2apb|paddr[10] .modeMux = 1'b0;
  11613. defparam \macro_inst|u_ahb2apb|paddr[10] .FeedbackMux = 1'b1;
  11614. defparam \macro_inst|u_ahb2apb|paddr[10] .ShiftMux = 1'b0;
  11615. defparam \macro_inst|u_ahb2apb|paddr[10] .BypassEn = 1'b1;
  11616. defparam \macro_inst|u_ahb2apb|paddr[10] .CarryEnb = 1'b1;
  11617. alta_slice \macro_inst|u_ahb2apb|paddr[12] (
  11618. .A(\macro_inst|u_ahb2apb|psel~q ),
  11619. .B(\macro_inst|u_ahb2apb|pwrite~q ),
  11620. .C(\macro_inst|u_ahb2apb|haddr [12]),
  11621. .D(\macro_inst|u_ahb2apb|penable~q ),
  11622. .Cin(),
  11623. .Qin(\macro_inst|u_ahb2apb|paddr [12]),
  11624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ),
  11625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  11626. .SyncReset(SyncReset_X59_Y3_GND),
  11627. .ShiftData(),
  11628. .SyncLoad(SyncLoad_X59_Y3_VCC),
  11629. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_read1~combout ),
  11630. .Cout(),
  11631. .Q(\macro_inst|u_ahb2apb|paddr [12]));
  11632. defparam \macro_inst|u_ahb2apb|paddr[12] .coord_x = 16;
  11633. defparam \macro_inst|u_ahb2apb|paddr[12] .coord_y = 4;
  11634. defparam \macro_inst|u_ahb2apb|paddr[12] .coord_z = 8;
  11635. defparam \macro_inst|u_ahb2apb|paddr[12] .mask = 16'h2000;
  11636. defparam \macro_inst|u_ahb2apb|paddr[12] .modeMux = 1'b0;
  11637. defparam \macro_inst|u_ahb2apb|paddr[12] .FeedbackMux = 1'b1;
  11638. defparam \macro_inst|u_ahb2apb|paddr[12] .ShiftMux = 1'b0;
  11639. defparam \macro_inst|u_ahb2apb|paddr[12] .BypassEn = 1'b1;
  11640. defparam \macro_inst|u_ahb2apb|paddr[12] .CarryEnb = 1'b1;
  11641. alta_slice \macro_inst|u_ahb2apb|paddr[2] (
  11642. .A(\macro_inst|u_ahb2apb|paddr [3]),
  11643. .B(\macro_inst|u_ahb2apb|paddr [6]),
  11644. .C(\macro_inst|u_ahb2apb|haddr [2]),
  11645. .D(\macro_inst|u_ahb2apb|paddr [10]),
  11646. .Cin(),
  11647. .Qin(\macro_inst|u_ahb2apb|paddr [2]),
  11648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ),
  11649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  11650. .SyncReset(SyncReset_X59_Y3_GND),
  11651. .ShiftData(),
  11652. .SyncLoad(SyncLoad_X59_Y3_VCC),
  11653. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~10_combout ),
  11654. .Cout(),
  11655. .Q(\macro_inst|u_ahb2apb|paddr [2]));
  11656. defparam \macro_inst|u_ahb2apb|paddr[2] .coord_x = 16;
  11657. defparam \macro_inst|u_ahb2apb|paddr[2] .coord_y = 4;
  11658. defparam \macro_inst|u_ahb2apb|paddr[2] .coord_z = 0;
  11659. defparam \macro_inst|u_ahb2apb|paddr[2] .mask = 16'h0800;
  11660. defparam \macro_inst|u_ahb2apb|paddr[2] .modeMux = 1'b0;
  11661. defparam \macro_inst|u_ahb2apb|paddr[2] .FeedbackMux = 1'b1;
  11662. defparam \macro_inst|u_ahb2apb|paddr[2] .ShiftMux = 1'b0;
  11663. defparam \macro_inst|u_ahb2apb|paddr[2] .BypassEn = 1'b1;
  11664. defparam \macro_inst|u_ahb2apb|paddr[2] .CarryEnb = 1'b1;
  11665. alta_slice \macro_inst|u_ahb2apb|paddr[3] (
  11666. .A(),
  11667. .B(),
  11668. .C(\macro_inst|u_ahb2apb|haddr [3]),
  11669. .D(),
  11670. .Cin(),
  11671. .Qin(\macro_inst|u_ahb2apb|paddr [3]),
  11672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11674. .SyncReset(SyncReset_X59_Y2_GND),
  11675. .ShiftData(),
  11676. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11677. .LutOut(),
  11678. .Cout(),
  11679. .Q(\macro_inst|u_ahb2apb|paddr [3]));
  11680. defparam \macro_inst|u_ahb2apb|paddr[3] .coord_x = 15;
  11681. defparam \macro_inst|u_ahb2apb|paddr[3] .coord_y = 5;
  11682. defparam \macro_inst|u_ahb2apb|paddr[3] .coord_z = 7;
  11683. defparam \macro_inst|u_ahb2apb|paddr[3] .mask = 16'hFFFF;
  11684. defparam \macro_inst|u_ahb2apb|paddr[3] .modeMux = 1'b1;
  11685. defparam \macro_inst|u_ahb2apb|paddr[3] .FeedbackMux = 1'b0;
  11686. defparam \macro_inst|u_ahb2apb|paddr[3] .ShiftMux = 1'b0;
  11687. defparam \macro_inst|u_ahb2apb|paddr[3] .BypassEn = 1'b1;
  11688. defparam \macro_inst|u_ahb2apb|paddr[3] .CarryEnb = 1'b1;
  11689. alta_slice \macro_inst|u_ahb2apb|paddr[4] (
  11690. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  11691. .B(\macro_inst|u_ahb2apb|paddr [2]),
  11692. .C(\macro_inst|u_ahb2apb|haddr [4]),
  11693. .D(\macro_inst|u_ahb2apb|paddr [5]),
  11694. .Cin(),
  11695. .Qin(\macro_inst|u_ahb2apb|paddr [4]),
  11696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11698. .SyncReset(SyncReset_X59_Y2_GND),
  11699. .ShiftData(),
  11700. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11701. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~4_combout ),
  11702. .Cout(),
  11703. .Q(\macro_inst|u_ahb2apb|paddr [4]));
  11704. defparam \macro_inst|u_ahb2apb|paddr[4] .coord_x = 15;
  11705. defparam \macro_inst|u_ahb2apb|paddr[4] .coord_y = 5;
  11706. defparam \macro_inst|u_ahb2apb|paddr[4] .coord_z = 15;
  11707. defparam \macro_inst|u_ahb2apb|paddr[4] .mask = 16'h8800;
  11708. defparam \macro_inst|u_ahb2apb|paddr[4] .modeMux = 1'b0;
  11709. defparam \macro_inst|u_ahb2apb|paddr[4] .FeedbackMux = 1'b0;
  11710. defparam \macro_inst|u_ahb2apb|paddr[4] .ShiftMux = 1'b0;
  11711. defparam \macro_inst|u_ahb2apb|paddr[4] .BypassEn = 1'b1;
  11712. defparam \macro_inst|u_ahb2apb|paddr[4] .CarryEnb = 1'b1;
  11713. alta_slice \macro_inst|u_ahb2apb|paddr[5] (
  11714. .A(vcc),
  11715. .B(vcc),
  11716. .C(\macro_inst|u_ahb2apb|haddr [5]),
  11717. .D(\macro_inst|u_ahb2apb|paddr [3]),
  11718. .Cin(),
  11719. .Qin(\macro_inst|u_ahb2apb|paddr [5]),
  11720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11722. .SyncReset(SyncReset_X59_Y2_GND),
  11723. .ShiftData(),
  11724. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11725. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~12_combout ),
  11726. .Cout(),
  11727. .Q(\macro_inst|u_ahb2apb|paddr [5]));
  11728. defparam \macro_inst|u_ahb2apb|paddr[5] .coord_x = 15;
  11729. defparam \macro_inst|u_ahb2apb|paddr[5] .coord_y = 5;
  11730. defparam \macro_inst|u_ahb2apb|paddr[5] .coord_z = 3;
  11731. defparam \macro_inst|u_ahb2apb|paddr[5] .mask = 16'hF0FF;
  11732. defparam \macro_inst|u_ahb2apb|paddr[5] .modeMux = 1'b0;
  11733. defparam \macro_inst|u_ahb2apb|paddr[5] .FeedbackMux = 1'b1;
  11734. defparam \macro_inst|u_ahb2apb|paddr[5] .ShiftMux = 1'b0;
  11735. defparam \macro_inst|u_ahb2apb|paddr[5] .BypassEn = 1'b1;
  11736. defparam \macro_inst|u_ahb2apb|paddr[5] .CarryEnb = 1'b1;
  11737. alta_slice \macro_inst|u_ahb2apb|paddr[6] (
  11738. .A(\macro_inst|u_ahb2apb|paddr [5]),
  11739. .B(\macro_inst|u_ahb2apb|paddr [4]),
  11740. .C(\macro_inst|u_ahb2apb|haddr [6]),
  11741. .D(\macro_inst|u_ahb2apb|paddr [7]),
  11742. .Cin(),
  11743. .Qin(\macro_inst|u_ahb2apb|paddr [6]),
  11744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ),
  11745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  11746. .SyncReset(SyncReset_X59_Y3_GND),
  11747. .ShiftData(),
  11748. .SyncLoad(SyncLoad_X59_Y3_VCC),
  11749. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~16_combout ),
  11750. .Cout(),
  11751. .Q(\macro_inst|u_ahb2apb|paddr [6]));
  11752. defparam \macro_inst|u_ahb2apb|paddr[6] .coord_x = 16;
  11753. defparam \macro_inst|u_ahb2apb|paddr[6] .coord_y = 4;
  11754. defparam \macro_inst|u_ahb2apb|paddr[6] .coord_z = 9;
  11755. defparam \macro_inst|u_ahb2apb|paddr[6] .mask = 16'h0008;
  11756. defparam \macro_inst|u_ahb2apb|paddr[6] .modeMux = 1'b0;
  11757. defparam \macro_inst|u_ahb2apb|paddr[6] .FeedbackMux = 1'b1;
  11758. defparam \macro_inst|u_ahb2apb|paddr[6] .ShiftMux = 1'b0;
  11759. defparam \macro_inst|u_ahb2apb|paddr[6] .BypassEn = 1'b1;
  11760. defparam \macro_inst|u_ahb2apb|paddr[6] .CarryEnb = 1'b1;
  11761. alta_slice \macro_inst|u_ahb2apb|paddr[7] (
  11762. .A(\macro_inst|u_ahb2apb|psel~q ),
  11763. .B(vcc),
  11764. .C(\macro_inst|u_ahb2apb|haddr [7]),
  11765. .D(\macro_inst|u_ahb2apb|penable~q ),
  11766. .Cin(),
  11767. .Qin(\macro_inst|u_ahb2apb|paddr [7]),
  11768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ),
  11769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  11770. .SyncReset(SyncReset_X59_Y3_GND),
  11771. .ShiftData(),
  11772. .SyncLoad(SyncLoad_X59_Y3_VCC),
  11773. .LutOut(\macro_inst|u_apb_mux|always0~0_combout ),
  11774. .Cout(),
  11775. .Q(\macro_inst|u_ahb2apb|paddr [7]));
  11776. defparam \macro_inst|u_ahb2apb|paddr[7] .coord_x = 16;
  11777. defparam \macro_inst|u_ahb2apb|paddr[7] .coord_y = 4;
  11778. defparam \macro_inst|u_ahb2apb|paddr[7] .coord_z = 7;
  11779. defparam \macro_inst|u_ahb2apb|paddr[7] .mask = 16'h00AA;
  11780. defparam \macro_inst|u_ahb2apb|paddr[7] .modeMux = 1'b0;
  11781. defparam \macro_inst|u_ahb2apb|paddr[7] .FeedbackMux = 1'b0;
  11782. defparam \macro_inst|u_ahb2apb|paddr[7] .ShiftMux = 1'b0;
  11783. defparam \macro_inst|u_ahb2apb|paddr[7] .BypassEn = 1'b1;
  11784. defparam \macro_inst|u_ahb2apb|paddr[7] .CarryEnb = 1'b1;
  11785. alta_slice \macro_inst|u_ahb2apb|paddr[8] (
  11786. .A(\macro_inst|u_uart[0]|u_rx[0]|parity_error~q ),
  11787. .B(\macro_inst|u_ahb2apb|paddr [9]),
  11788. .C(\macro_inst|u_ahb2apb|haddr [8]),
  11789. .D(\macro_inst|u_uart[0]|u_rx[1]|parity_error~q ),
  11790. .Cin(),
  11791. .Qin(\macro_inst|u_ahb2apb|paddr [8]),
  11792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11794. .SyncReset(SyncReset_X59_Y2_GND),
  11795. .ShiftData(),
  11796. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11797. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~4_combout ),
  11798. .Cout(),
  11799. .Q(\macro_inst|u_ahb2apb|paddr [8]));
  11800. defparam \macro_inst|u_ahb2apb|paddr[8] .coord_x = 15;
  11801. defparam \macro_inst|u_ahb2apb|paddr[8] .coord_y = 5;
  11802. defparam \macro_inst|u_ahb2apb|paddr[8] .coord_z = 5;
  11803. defparam \macro_inst|u_ahb2apb|paddr[8] .mask = 16'hF2C2;
  11804. defparam \macro_inst|u_ahb2apb|paddr[8] .modeMux = 1'b0;
  11805. defparam \macro_inst|u_ahb2apb|paddr[8] .FeedbackMux = 1'b1;
  11806. defparam \macro_inst|u_ahb2apb|paddr[8] .ShiftMux = 1'b0;
  11807. defparam \macro_inst|u_ahb2apb|paddr[8] .BypassEn = 1'b1;
  11808. defparam \macro_inst|u_ahb2apb|paddr[8] .CarryEnb = 1'b1;
  11809. alta_slice \macro_inst|u_ahb2apb|paddr[9] (
  11810. .A(\macro_inst|u_uart[1]|u_rx[0]|parity_error~q ),
  11811. .B(\macro_inst|u_ahb2apb|paddr [8]),
  11812. .C(\macro_inst|u_ahb2apb|haddr [9]),
  11813. .D(\macro_inst|u_uart[1]|u_rx[1]|parity_error~q ),
  11814. .Cin(),
  11815. .Qin(\macro_inst|u_ahb2apb|paddr [9]),
  11816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y2_SIG_SIG ),
  11817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y2_SIG ),
  11818. .SyncReset(SyncReset_X59_Y2_GND),
  11819. .ShiftData(),
  11820. .SyncLoad(SyncLoad_X59_Y2_VCC),
  11821. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~3_combout ),
  11822. .Cout(),
  11823. .Q(\macro_inst|u_ahb2apb|paddr [9]));
  11824. defparam \macro_inst|u_ahb2apb|paddr[9] .coord_x = 15;
  11825. defparam \macro_inst|u_ahb2apb|paddr[9] .coord_y = 5;
  11826. defparam \macro_inst|u_ahb2apb|paddr[9] .coord_z = 13;
  11827. defparam \macro_inst|u_ahb2apb|paddr[9] .mask = 16'hCEC2;
  11828. defparam \macro_inst|u_ahb2apb|paddr[9] .modeMux = 1'b0;
  11829. defparam \macro_inst|u_ahb2apb|paddr[9] .FeedbackMux = 1'b1;
  11830. defparam \macro_inst|u_ahb2apb|paddr[9] .ShiftMux = 1'b0;
  11831. defparam \macro_inst|u_ahb2apb|paddr[9] .BypassEn = 1'b1;
  11832. defparam \macro_inst|u_ahb2apb|paddr[9] .CarryEnb = 1'b1;
  11833. alta_slice \macro_inst|u_ahb2apb|pdone (
  11834. .A(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  11835. .B(\macro_inst|u_ahb2apb|penable~q ),
  11836. .C(vcc),
  11837. .D(\macro_inst|u_ahb2apb|psel~q ),
  11838. .Cin(),
  11839. .Qin(\macro_inst|u_ahb2apb|pdone~q ),
  11840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  11841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  11842. .SyncReset(),
  11843. .ShiftData(),
  11844. .SyncLoad(),
  11845. .LutOut(\macro_inst|u_ahb2apb|pdone~0_combout ),
  11846. .Cout(),
  11847. .Q(\macro_inst|u_ahb2apb|pdone~q ));
  11848. defparam \macro_inst|u_ahb2apb|pdone .coord_x = 16;
  11849. defparam \macro_inst|u_ahb2apb|pdone .coord_y = 2;
  11850. defparam \macro_inst|u_ahb2apb|pdone .coord_z = 1;
  11851. defparam \macro_inst|u_ahb2apb|pdone .mask = 16'h0800;
  11852. defparam \macro_inst|u_ahb2apb|pdone .modeMux = 1'b0;
  11853. defparam \macro_inst|u_ahb2apb|pdone .FeedbackMux = 1'b1;
  11854. defparam \macro_inst|u_ahb2apb|pdone .ShiftMux = 1'b0;
  11855. defparam \macro_inst|u_ahb2apb|pdone .BypassEn = 1'b0;
  11856. defparam \macro_inst|u_ahb2apb|pdone .CarryEnb = 1'b1;
  11857. alta_slice \macro_inst|u_ahb2apb|penable (
  11858. .A(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  11859. .B(\macro_inst|u_ahb2apb|apbState.apbIdle~q ),
  11860. .C(vcc),
  11861. .D(\macro_inst|u_ahb2apb|apbState.apbAccess~q ),
  11862. .Cin(),
  11863. .Qin(\macro_inst|u_ahb2apb|penable~q ),
  11864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  11865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  11866. .SyncReset(),
  11867. .ShiftData(),
  11868. .SyncLoad(),
  11869. .LutOut(\macro_inst|u_ahb2apb|Selector22~0_combout ),
  11870. .Cout(),
  11871. .Q(\macro_inst|u_ahb2apb|penable~q ));
  11872. defparam \macro_inst|u_ahb2apb|penable .coord_x = 16;
  11873. defparam \macro_inst|u_ahb2apb|penable .coord_y = 2;
  11874. defparam \macro_inst|u_ahb2apb|penable .coord_z = 3;
  11875. defparam \macro_inst|u_ahb2apb|penable .mask = 16'h50FC;
  11876. defparam \macro_inst|u_ahb2apb|penable .modeMux = 1'b0;
  11877. defparam \macro_inst|u_ahb2apb|penable .FeedbackMux = 1'b1;
  11878. defparam \macro_inst|u_ahb2apb|penable .ShiftMux = 1'b0;
  11879. defparam \macro_inst|u_ahb2apb|penable .BypassEn = 1'b0;
  11880. defparam \macro_inst|u_ahb2apb|penable .CarryEnb = 1'b1;
  11881. alta_slice \macro_inst|u_ahb2apb|prdata[0] (
  11882. .A(\macro_inst|u_apb_mux|pr_select [1]),
  11883. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata [0]),
  11884. .C(\macro_inst|u_apb_mux|pr_select [0]),
  11885. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [0]),
  11886. .Cin(),
  11887. .Qin(\macro_inst|u_ahb2apb|prdata [0]),
  11888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  11889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  11890. .SyncReset(),
  11891. .ShiftData(),
  11892. .SyncLoad(),
  11893. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [0]),
  11894. .Cout(),
  11895. .Q(\macro_inst|u_ahb2apb|prdata [0]));
  11896. defparam \macro_inst|u_ahb2apb|prdata[0] .coord_x = 14;
  11897. defparam \macro_inst|u_ahb2apb|prdata[0] .coord_y = 6;
  11898. defparam \macro_inst|u_ahb2apb|prdata[0] .coord_z = 8;
  11899. defparam \macro_inst|u_ahb2apb|prdata[0] .mask = 16'hEAC0;
  11900. defparam \macro_inst|u_ahb2apb|prdata[0] .modeMux = 1'b0;
  11901. defparam \macro_inst|u_ahb2apb|prdata[0] .FeedbackMux = 1'b0;
  11902. defparam \macro_inst|u_ahb2apb|prdata[0] .ShiftMux = 1'b0;
  11903. defparam \macro_inst|u_ahb2apb|prdata[0] .BypassEn = 1'b0;
  11904. defparam \macro_inst|u_ahb2apb|prdata[0] .CarryEnb = 1'b1;
  11905. alta_slice \macro_inst|u_ahb2apb|prdata[10] (
  11906. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata [10]),
  11907. .B(\macro_inst|u_apb_mux|pr_select [1]),
  11908. .C(\macro_inst|u_apb_mux|pr_select [0]),
  11909. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [10]),
  11910. .Cin(),
  11911. .Qin(\macro_inst|u_ahb2apb|prdata [10]),
  11912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  11913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  11914. .SyncReset(),
  11915. .ShiftData(),
  11916. .SyncLoad(),
  11917. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [10]),
  11918. .Cout(),
  11919. .Q(\macro_inst|u_ahb2apb|prdata [10]));
  11920. defparam \macro_inst|u_ahb2apb|prdata[10] .coord_x = 14;
  11921. defparam \macro_inst|u_ahb2apb|prdata[10] .coord_y = 7;
  11922. defparam \macro_inst|u_ahb2apb|prdata[10] .coord_z = 13;
  11923. defparam \macro_inst|u_ahb2apb|prdata[10] .mask = 16'hECA0;
  11924. defparam \macro_inst|u_ahb2apb|prdata[10] .modeMux = 1'b0;
  11925. defparam \macro_inst|u_ahb2apb|prdata[10] .FeedbackMux = 1'b0;
  11926. defparam \macro_inst|u_ahb2apb|prdata[10] .ShiftMux = 1'b0;
  11927. defparam \macro_inst|u_ahb2apb|prdata[10] .BypassEn = 1'b0;
  11928. defparam \macro_inst|u_ahb2apb|prdata[10] .CarryEnb = 1'b1;
  11929. alta_slice \macro_inst|u_ahb2apb|prdata[11] (
  11930. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata [11]),
  11931. .B(\macro_inst|u_apb_mux|pr_select [1]),
  11932. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [11]),
  11933. .D(\macro_inst|u_apb_mux|pr_select [0]),
  11934. .Cin(),
  11935. .Qin(\macro_inst|u_ahb2apb|prdata [11]),
  11936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  11937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  11938. .SyncReset(),
  11939. .ShiftData(),
  11940. .SyncLoad(),
  11941. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [11]),
  11942. .Cout(),
  11943. .Q(\macro_inst|u_ahb2apb|prdata [11]));
  11944. defparam \macro_inst|u_ahb2apb|prdata[11] .coord_x = 14;
  11945. defparam \macro_inst|u_ahb2apb|prdata[11] .coord_y = 7;
  11946. defparam \macro_inst|u_ahb2apb|prdata[11] .coord_z = 5;
  11947. defparam \macro_inst|u_ahb2apb|prdata[11] .mask = 16'hF888;
  11948. defparam \macro_inst|u_ahb2apb|prdata[11] .modeMux = 1'b0;
  11949. defparam \macro_inst|u_ahb2apb|prdata[11] .FeedbackMux = 1'b0;
  11950. defparam \macro_inst|u_ahb2apb|prdata[11] .ShiftMux = 1'b0;
  11951. defparam \macro_inst|u_ahb2apb|prdata[11] .BypassEn = 1'b0;
  11952. defparam \macro_inst|u_ahb2apb|prdata[11] .CarryEnb = 1'b1;
  11953. alta_slice \macro_inst|u_ahb2apb|prdata[12] (
  11954. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata [12]),
  11955. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata [12]),
  11956. .C(\macro_inst|u_apb_mux|pr_select [0]),
  11957. .D(\macro_inst|u_apb_mux|pr_select [1]),
  11958. .Cin(),
  11959. .Qin(\macro_inst|u_ahb2apb|prdata [12]),
  11960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  11961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  11962. .SyncReset(),
  11963. .ShiftData(),
  11964. .SyncLoad(),
  11965. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [12]),
  11966. .Cout(),
  11967. .Q(\macro_inst|u_ahb2apb|prdata [12]));
  11968. defparam \macro_inst|u_ahb2apb|prdata[12] .coord_x = 14;
  11969. defparam \macro_inst|u_ahb2apb|prdata[12] .coord_y = 7;
  11970. defparam \macro_inst|u_ahb2apb|prdata[12] .coord_z = 0;
  11971. defparam \macro_inst|u_ahb2apb|prdata[12] .mask = 16'hECA0;
  11972. defparam \macro_inst|u_ahb2apb|prdata[12] .modeMux = 1'b0;
  11973. defparam \macro_inst|u_ahb2apb|prdata[12] .FeedbackMux = 1'b0;
  11974. defparam \macro_inst|u_ahb2apb|prdata[12] .ShiftMux = 1'b0;
  11975. defparam \macro_inst|u_ahb2apb|prdata[12] .BypassEn = 1'b0;
  11976. defparam \macro_inst|u_ahb2apb|prdata[12] .CarryEnb = 1'b1;
  11977. alta_slice \macro_inst|u_ahb2apb|prdata[13] (
  11978. .A(\macro_inst|u_apb_mux|pr_select [0]),
  11979. .B(\macro_inst|u_apb_mux|pr_select [1]),
  11980. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [13]),
  11981. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [13]),
  11982. .Cin(),
  11983. .Qin(\macro_inst|u_ahb2apb|prdata [13]),
  11984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  11985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  11986. .SyncReset(),
  11987. .ShiftData(),
  11988. .SyncLoad(),
  11989. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [13]),
  11990. .Cout(),
  11991. .Q(\macro_inst|u_ahb2apb|prdata [13]));
  11992. defparam \macro_inst|u_ahb2apb|prdata[13] .coord_x = 14;
  11993. defparam \macro_inst|u_ahb2apb|prdata[13] .coord_y = 6;
  11994. defparam \macro_inst|u_ahb2apb|prdata[13] .coord_z = 9;
  11995. defparam \macro_inst|u_ahb2apb|prdata[13] .mask = 16'hECA0;
  11996. defparam \macro_inst|u_ahb2apb|prdata[13] .modeMux = 1'b0;
  11997. defparam \macro_inst|u_ahb2apb|prdata[13] .FeedbackMux = 1'b0;
  11998. defparam \macro_inst|u_ahb2apb|prdata[13] .ShiftMux = 1'b0;
  11999. defparam \macro_inst|u_ahb2apb|prdata[13] .BypassEn = 1'b0;
  12000. defparam \macro_inst|u_ahb2apb|prdata[13] .CarryEnb = 1'b1;
  12001. alta_slice \macro_inst|u_ahb2apb|prdata[14] (
  12002. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12003. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata [14]),
  12004. .C(\macro_inst|u_apb_mux|pr_select [1]),
  12005. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata [14]),
  12006. .Cin(),
  12007. .Qin(\macro_inst|u_ahb2apb|prdata [14]),
  12008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12010. .SyncReset(),
  12011. .ShiftData(),
  12012. .SyncLoad(),
  12013. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [14]),
  12014. .Cout(),
  12015. .Q(\macro_inst|u_ahb2apb|prdata [14]));
  12016. defparam \macro_inst|u_ahb2apb|prdata[14] .coord_x = 14;
  12017. defparam \macro_inst|u_ahb2apb|prdata[14] .coord_y = 6;
  12018. defparam \macro_inst|u_ahb2apb|prdata[14] .coord_z = 13;
  12019. defparam \macro_inst|u_ahb2apb|prdata[14] .mask = 16'hEAC0;
  12020. defparam \macro_inst|u_ahb2apb|prdata[14] .modeMux = 1'b0;
  12021. defparam \macro_inst|u_ahb2apb|prdata[14] .FeedbackMux = 1'b0;
  12022. defparam \macro_inst|u_ahb2apb|prdata[14] .ShiftMux = 1'b0;
  12023. defparam \macro_inst|u_ahb2apb|prdata[14] .BypassEn = 1'b0;
  12024. defparam \macro_inst|u_ahb2apb|prdata[14] .CarryEnb = 1'b1;
  12025. alta_slice \macro_inst|u_ahb2apb|prdata[15] (
  12026. .A(\macro_inst|u_apb_mux|pr_select [1]),
  12027. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata [15]),
  12028. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata [15]),
  12029. .D(\macro_inst|u_apb_mux|pr_select [0]),
  12030. .Cin(),
  12031. .Qin(\macro_inst|u_ahb2apb|prdata [15]),
  12032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12034. .SyncReset(),
  12035. .ShiftData(),
  12036. .SyncLoad(),
  12037. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [15]),
  12038. .Cout(),
  12039. .Q(\macro_inst|u_ahb2apb|prdata [15]));
  12040. defparam \macro_inst|u_ahb2apb|prdata[15] .coord_x = 14;
  12041. defparam \macro_inst|u_ahb2apb|prdata[15] .coord_y = 6;
  12042. defparam \macro_inst|u_ahb2apb|prdata[15] .coord_z = 10;
  12043. defparam \macro_inst|u_ahb2apb|prdata[15] .mask = 16'hECA0;
  12044. defparam \macro_inst|u_ahb2apb|prdata[15] .modeMux = 1'b0;
  12045. defparam \macro_inst|u_ahb2apb|prdata[15] .FeedbackMux = 1'b0;
  12046. defparam \macro_inst|u_ahb2apb|prdata[15] .ShiftMux = 1'b0;
  12047. defparam \macro_inst|u_ahb2apb|prdata[15] .BypassEn = 1'b0;
  12048. defparam \macro_inst|u_ahb2apb|prdata[15] .CarryEnb = 1'b1;
  12049. alta_slice \macro_inst|u_ahb2apb|prdata[1] (
  12050. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12051. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata [1]),
  12052. .C(\macro_inst|u_apb_mux|pr_select [1]),
  12053. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata [1]),
  12054. .Cin(),
  12055. .Qin(\macro_inst|u_ahb2apb|prdata [1]),
  12056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12058. .SyncReset(),
  12059. .ShiftData(),
  12060. .SyncLoad(),
  12061. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [1]),
  12062. .Cout(),
  12063. .Q(\macro_inst|u_ahb2apb|prdata [1]));
  12064. defparam \macro_inst|u_ahb2apb|prdata[1] .coord_x = 14;
  12065. defparam \macro_inst|u_ahb2apb|prdata[1] .coord_y = 6;
  12066. defparam \macro_inst|u_ahb2apb|prdata[1] .coord_z = 11;
  12067. defparam \macro_inst|u_ahb2apb|prdata[1] .mask = 16'hEAC0;
  12068. defparam \macro_inst|u_ahb2apb|prdata[1] .modeMux = 1'b0;
  12069. defparam \macro_inst|u_ahb2apb|prdata[1] .FeedbackMux = 1'b0;
  12070. defparam \macro_inst|u_ahb2apb|prdata[1] .ShiftMux = 1'b0;
  12071. defparam \macro_inst|u_ahb2apb|prdata[1] .BypassEn = 1'b0;
  12072. defparam \macro_inst|u_ahb2apb|prdata[1] .CarryEnb = 1'b1;
  12073. alta_slice \macro_inst|u_ahb2apb|prdata[2] (
  12074. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12075. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12076. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [2]),
  12077. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [2]),
  12078. .Cin(),
  12079. .Qin(\macro_inst|u_ahb2apb|prdata [2]),
  12080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12082. .SyncReset(),
  12083. .ShiftData(),
  12084. .SyncLoad(),
  12085. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [2]),
  12086. .Cout(),
  12087. .Q(\macro_inst|u_ahb2apb|prdata [2]));
  12088. defparam \macro_inst|u_ahb2apb|prdata[2] .coord_x = 14;
  12089. defparam \macro_inst|u_ahb2apb|prdata[2] .coord_y = 6;
  12090. defparam \macro_inst|u_ahb2apb|prdata[2] .coord_z = 14;
  12091. defparam \macro_inst|u_ahb2apb|prdata[2] .mask = 16'hECA0;
  12092. defparam \macro_inst|u_ahb2apb|prdata[2] .modeMux = 1'b0;
  12093. defparam \macro_inst|u_ahb2apb|prdata[2] .FeedbackMux = 1'b0;
  12094. defparam \macro_inst|u_ahb2apb|prdata[2] .ShiftMux = 1'b0;
  12095. defparam \macro_inst|u_ahb2apb|prdata[2] .BypassEn = 1'b0;
  12096. defparam \macro_inst|u_ahb2apb|prdata[2] .CarryEnb = 1'b1;
  12097. alta_slice \macro_inst|u_ahb2apb|prdata[3] (
  12098. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12099. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata [3]),
  12100. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata [3]),
  12101. .D(\macro_inst|u_apb_mux|pr_select [1]),
  12102. .Cin(),
  12103. .Qin(\macro_inst|u_ahb2apb|prdata [3]),
  12104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  12105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12106. .SyncReset(),
  12107. .ShiftData(),
  12108. .SyncLoad(),
  12109. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [3]),
  12110. .Cout(),
  12111. .Q(\macro_inst|u_ahb2apb|prdata [3]));
  12112. defparam \macro_inst|u_ahb2apb|prdata[3] .coord_x = 14;
  12113. defparam \macro_inst|u_ahb2apb|prdata[3] .coord_y = 7;
  12114. defparam \macro_inst|u_ahb2apb|prdata[3] .coord_z = 14;
  12115. defparam \macro_inst|u_ahb2apb|prdata[3] .mask = 16'hF888;
  12116. defparam \macro_inst|u_ahb2apb|prdata[3] .modeMux = 1'b0;
  12117. defparam \macro_inst|u_ahb2apb|prdata[3] .FeedbackMux = 1'b0;
  12118. defparam \macro_inst|u_ahb2apb|prdata[3] .ShiftMux = 1'b0;
  12119. defparam \macro_inst|u_ahb2apb|prdata[3] .BypassEn = 1'b0;
  12120. defparam \macro_inst|u_ahb2apb|prdata[3] .CarryEnb = 1'b1;
  12121. alta_slice \macro_inst|u_ahb2apb|prdata[4] (
  12122. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata [4]),
  12123. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12124. .C(\macro_inst|u_apb_mux|pr_select [0]),
  12125. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata [4]),
  12126. .Cin(),
  12127. .Qin(\macro_inst|u_ahb2apb|prdata [4]),
  12128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  12129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12130. .SyncReset(),
  12131. .ShiftData(),
  12132. .SyncLoad(),
  12133. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [4]),
  12134. .Cout(),
  12135. .Q(\macro_inst|u_ahb2apb|prdata [4]));
  12136. defparam \macro_inst|u_ahb2apb|prdata[4] .coord_x = 14;
  12137. defparam \macro_inst|u_ahb2apb|prdata[4] .coord_y = 7;
  12138. defparam \macro_inst|u_ahb2apb|prdata[4] .coord_z = 6;
  12139. defparam \macro_inst|u_ahb2apb|prdata[4] .mask = 16'hF888;
  12140. defparam \macro_inst|u_ahb2apb|prdata[4] .modeMux = 1'b0;
  12141. defparam \macro_inst|u_ahb2apb|prdata[4] .FeedbackMux = 1'b0;
  12142. defparam \macro_inst|u_ahb2apb|prdata[4] .ShiftMux = 1'b0;
  12143. defparam \macro_inst|u_ahb2apb|prdata[4] .BypassEn = 1'b0;
  12144. defparam \macro_inst|u_ahb2apb|prdata[4] .CarryEnb = 1'b1;
  12145. alta_slice \macro_inst|u_ahb2apb|prdata[5] (
  12146. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata [5]),
  12147. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12148. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [5]),
  12149. .D(\macro_inst|u_apb_mux|pr_select [0]),
  12150. .Cin(),
  12151. .Qin(\macro_inst|u_ahb2apb|prdata [5]),
  12152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12154. .SyncReset(),
  12155. .ShiftData(),
  12156. .SyncLoad(),
  12157. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [5]),
  12158. .Cout(),
  12159. .Q(\macro_inst|u_ahb2apb|prdata [5]));
  12160. defparam \macro_inst|u_ahb2apb|prdata[5] .coord_x = 14;
  12161. defparam \macro_inst|u_ahb2apb|prdata[5] .coord_y = 6;
  12162. defparam \macro_inst|u_ahb2apb|prdata[5] .coord_z = 5;
  12163. defparam \macro_inst|u_ahb2apb|prdata[5] .mask = 16'hF888;
  12164. defparam \macro_inst|u_ahb2apb|prdata[5] .modeMux = 1'b0;
  12165. defparam \macro_inst|u_ahb2apb|prdata[5] .FeedbackMux = 1'b0;
  12166. defparam \macro_inst|u_ahb2apb|prdata[5] .ShiftMux = 1'b0;
  12167. defparam \macro_inst|u_ahb2apb|prdata[5] .BypassEn = 1'b0;
  12168. defparam \macro_inst|u_ahb2apb|prdata[5] .CarryEnb = 1'b1;
  12169. alta_slice \macro_inst|u_ahb2apb|prdata[6] (
  12170. .A(\macro_inst|u_apb_mux|pr_select [1]),
  12171. .B(\macro_inst|u_apb_mux|pr_select [0]),
  12172. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [6]),
  12173. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [6]),
  12174. .Cin(),
  12175. .Qin(\macro_inst|u_ahb2apb|prdata [6]),
  12176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12178. .SyncReset(),
  12179. .ShiftData(),
  12180. .SyncLoad(),
  12181. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [6]),
  12182. .Cout(),
  12183. .Q(\macro_inst|u_ahb2apb|prdata [6]));
  12184. defparam \macro_inst|u_ahb2apb|prdata[6] .coord_x = 14;
  12185. defparam \macro_inst|u_ahb2apb|prdata[6] .coord_y = 6;
  12186. defparam \macro_inst|u_ahb2apb|prdata[6] .coord_z = 4;
  12187. defparam \macro_inst|u_ahb2apb|prdata[6] .mask = 16'hEAC0;
  12188. defparam \macro_inst|u_ahb2apb|prdata[6] .modeMux = 1'b0;
  12189. defparam \macro_inst|u_ahb2apb|prdata[6] .FeedbackMux = 1'b0;
  12190. defparam \macro_inst|u_ahb2apb|prdata[6] .ShiftMux = 1'b0;
  12191. defparam \macro_inst|u_ahb2apb|prdata[6] .BypassEn = 1'b0;
  12192. defparam \macro_inst|u_ahb2apb|prdata[6] .CarryEnb = 1'b1;
  12193. alta_slice \macro_inst|u_ahb2apb|prdata[7] (
  12194. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12195. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12196. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata [7]),
  12197. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata [7]),
  12198. .Cin(),
  12199. .Qin(\macro_inst|u_ahb2apb|prdata [7]),
  12200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X60_Y3_SIG_SIG ),
  12201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  12202. .SyncReset(),
  12203. .ShiftData(),
  12204. .SyncLoad(),
  12205. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [7]),
  12206. .Cout(),
  12207. .Q(\macro_inst|u_ahb2apb|prdata [7]));
  12208. defparam \macro_inst|u_ahb2apb|prdata[7] .coord_x = 14;
  12209. defparam \macro_inst|u_ahb2apb|prdata[7] .coord_y = 6;
  12210. defparam \macro_inst|u_ahb2apb|prdata[7] .coord_z = 1;
  12211. defparam \macro_inst|u_ahb2apb|prdata[7] .mask = 16'hECA0;
  12212. defparam \macro_inst|u_ahb2apb|prdata[7] .modeMux = 1'b0;
  12213. defparam \macro_inst|u_ahb2apb|prdata[7] .FeedbackMux = 1'b0;
  12214. defparam \macro_inst|u_ahb2apb|prdata[7] .ShiftMux = 1'b0;
  12215. defparam \macro_inst|u_ahb2apb|prdata[7] .BypassEn = 1'b0;
  12216. defparam \macro_inst|u_ahb2apb|prdata[7] .CarryEnb = 1'b1;
  12217. alta_slice \macro_inst|u_ahb2apb|prdata[8] (
  12218. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12219. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12220. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata [8]),
  12221. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata [8]),
  12222. .Cin(),
  12223. .Qin(\macro_inst|u_ahb2apb|prdata [8]),
  12224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  12225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12226. .SyncReset(),
  12227. .ShiftData(),
  12228. .SyncLoad(),
  12229. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [8]),
  12230. .Cout(),
  12231. .Q(\macro_inst|u_ahb2apb|prdata [8]));
  12232. defparam \macro_inst|u_ahb2apb|prdata[8] .coord_x = 14;
  12233. defparam \macro_inst|u_ahb2apb|prdata[8] .coord_y = 7;
  12234. defparam \macro_inst|u_ahb2apb|prdata[8] .coord_z = 7;
  12235. defparam \macro_inst|u_ahb2apb|prdata[8] .mask = 16'hEAC0;
  12236. defparam \macro_inst|u_ahb2apb|prdata[8] .modeMux = 1'b0;
  12237. defparam \macro_inst|u_ahb2apb|prdata[8] .FeedbackMux = 1'b0;
  12238. defparam \macro_inst|u_ahb2apb|prdata[8] .ShiftMux = 1'b0;
  12239. defparam \macro_inst|u_ahb2apb|prdata[8] .BypassEn = 1'b0;
  12240. defparam \macro_inst|u_ahb2apb|prdata[8] .CarryEnb = 1'b1;
  12241. alta_slice \macro_inst|u_ahb2apb|prdata[9] (
  12242. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata [9]),
  12243. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12244. .C(\macro_inst|u_apb_mux|pr_select [0]),
  12245. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata [9]),
  12246. .Cin(),
  12247. .Qin(\macro_inst|u_ahb2apb|prdata [9]),
  12248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|apb_pdone~combout_X61_Y3_SIG_SIG ),
  12249. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12250. .SyncReset(),
  12251. .ShiftData(),
  12252. .SyncLoad(),
  12253. .LutOut(\macro_inst|u_apb_mux|apb_in_prdata [9]),
  12254. .Cout(),
  12255. .Q(\macro_inst|u_ahb2apb|prdata [9]));
  12256. defparam \macro_inst|u_ahb2apb|prdata[9] .coord_x = 14;
  12257. defparam \macro_inst|u_ahb2apb|prdata[9] .coord_y = 7;
  12258. defparam \macro_inst|u_ahb2apb|prdata[9] .coord_z = 10;
  12259. defparam \macro_inst|u_ahb2apb|prdata[9] .mask = 16'hF888;
  12260. defparam \macro_inst|u_ahb2apb|prdata[9] .modeMux = 1'b0;
  12261. defparam \macro_inst|u_ahb2apb|prdata[9] .FeedbackMux = 1'b0;
  12262. defparam \macro_inst|u_ahb2apb|prdata[9] .ShiftMux = 1'b0;
  12263. defparam \macro_inst|u_ahb2apb|prdata[9] .BypassEn = 1'b0;
  12264. defparam \macro_inst|u_ahb2apb|prdata[9] .CarryEnb = 1'b1;
  12265. alta_slice \macro_inst|u_ahb2apb|psel (
  12266. .A(\macro_inst|u_ahb2apb|apbState.apbIdle~q ),
  12267. .B(\macro_inst|u_ahb2apb|pvalid~q ),
  12268. .C(vcc),
  12269. .D(\macro_inst|u_ahb2apb|pwrite~0_combout ),
  12270. .Cin(),
  12271. .Qin(\macro_inst|u_ahb2apb|psel~q ),
  12272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  12273. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  12274. .SyncReset(),
  12275. .ShiftData(),
  12276. .SyncLoad(),
  12277. .LutOut(\macro_inst|u_ahb2apb|psel~0_combout ),
  12278. .Cout(),
  12279. .Q(\macro_inst|u_ahb2apb|psel~q ));
  12280. defparam \macro_inst|u_ahb2apb|psel .coord_x = 16;
  12281. defparam \macro_inst|u_ahb2apb|psel .coord_y = 2;
  12282. defparam \macro_inst|u_ahb2apb|psel .coord_z = 0;
  12283. defparam \macro_inst|u_ahb2apb|psel .mask = 16'hDCF4;
  12284. defparam \macro_inst|u_ahb2apb|psel .modeMux = 1'b0;
  12285. defparam \macro_inst|u_ahb2apb|psel .FeedbackMux = 1'b1;
  12286. defparam \macro_inst|u_ahb2apb|psel .ShiftMux = 1'b0;
  12287. defparam \macro_inst|u_ahb2apb|psel .BypassEn = 1'b0;
  12288. defparam \macro_inst|u_ahb2apb|psel .CarryEnb = 1'b1;
  12289. alta_slice \macro_inst|u_ahb2apb|psel~1 (
  12290. .A(\macro_inst|u_ahb2apb|apbState.apbIdle~q ),
  12291. .B(\macro_inst|u_ahb2apb|pvalid~q ),
  12292. .C(\macro_inst|u_ahb2apb|apbState.apbAccess~q ),
  12293. .D(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  12294. .Cin(),
  12295. .Qin(),
  12296. .Clk(),
  12297. .AsyncReset(),
  12298. .SyncReset(),
  12299. .ShiftData(),
  12300. .SyncLoad(),
  12301. .LutOut(\macro_inst|u_ahb2apb|psel~1_combout ),
  12302. .Cout(),
  12303. .Q());
  12304. defparam \macro_inst|u_ahb2apb|psel~1 .coord_x = 15;
  12305. defparam \macro_inst|u_ahb2apb|psel~1 .coord_y = 2;
  12306. defparam \macro_inst|u_ahb2apb|psel~1 .coord_z = 6;
  12307. defparam \macro_inst|u_ahb2apb|psel~1 .mask = 16'hC444;
  12308. defparam \macro_inst|u_ahb2apb|psel~1 .modeMux = 1'b0;
  12309. defparam \macro_inst|u_ahb2apb|psel~1 .FeedbackMux = 1'b0;
  12310. defparam \macro_inst|u_ahb2apb|psel~1 .ShiftMux = 1'b0;
  12311. defparam \macro_inst|u_ahb2apb|psel~1 .BypassEn = 1'b0;
  12312. defparam \macro_inst|u_ahb2apb|psel~1 .CarryEnb = 1'b1;
  12313. alta_slice \macro_inst|u_ahb2apb|pvalid (
  12314. .A(\macro_inst|u_ahb2apb|psel~q ),
  12315. .B(vcc),
  12316. .C(\macro_inst|u_ahb2apb|pdone~q ),
  12317. .D(\macro_inst|u_ahb2apb|hreadyout~q ),
  12318. .Cin(),
  12319. .Qin(\macro_inst|u_ahb2apb|pvalid~q ),
  12320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  12321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  12322. .SyncReset(),
  12323. .ShiftData(),
  12324. .SyncLoad(),
  12325. .LutOut(\macro_inst|u_ahb2apb|always2~0_combout ),
  12326. .Cout(),
  12327. .Q(\macro_inst|u_ahb2apb|pvalid~q ));
  12328. defparam \macro_inst|u_ahb2apb|pvalid .coord_x = 15;
  12329. defparam \macro_inst|u_ahb2apb|pvalid .coord_y = 2;
  12330. defparam \macro_inst|u_ahb2apb|pvalid .coord_z = 11;
  12331. defparam \macro_inst|u_ahb2apb|pvalid .mask = 16'h0500;
  12332. defparam \macro_inst|u_ahb2apb|pvalid .modeMux = 1'b0;
  12333. defparam \macro_inst|u_ahb2apb|pvalid .FeedbackMux = 1'b0;
  12334. defparam \macro_inst|u_ahb2apb|pvalid .ShiftMux = 1'b0;
  12335. defparam \macro_inst|u_ahb2apb|pvalid .BypassEn = 1'b0;
  12336. defparam \macro_inst|u_ahb2apb|pvalid .CarryEnb = 1'b1;
  12337. alta_slice \macro_inst|u_ahb2apb|pwrite (
  12338. .A(\macro_inst|u_ahb2apb|paddr [12]),
  12339. .B(\macro_inst|u_ahb2apb|penable~q ),
  12340. .C(\macro_inst|u_ahb2apb|hwrite~q ),
  12341. .D(\macro_inst|u_ahb2apb|psel~q ),
  12342. .Cin(),
  12343. .Qin(\macro_inst|u_ahb2apb|pwrite~q ),
  12344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_ahb2apb|psel~1_combout_X59_Y3_SIG_SIG ),
  12345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  12346. .SyncReset(SyncReset_X59_Y3_GND),
  12347. .ShiftData(),
  12348. .SyncLoad(SyncLoad_X59_Y3_VCC),
  12349. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_read1~combout ),
  12350. .Cout(),
  12351. .Q(\macro_inst|u_ahb2apb|pwrite~q ));
  12352. defparam \macro_inst|u_ahb2apb|pwrite .coord_x = 16;
  12353. defparam \macro_inst|u_ahb2apb|pwrite .coord_y = 4;
  12354. defparam \macro_inst|u_ahb2apb|pwrite .coord_z = 1;
  12355. defparam \macro_inst|u_ahb2apb|pwrite .mask = 16'h0400;
  12356. defparam \macro_inst|u_ahb2apb|pwrite .modeMux = 1'b0;
  12357. defparam \macro_inst|u_ahb2apb|pwrite .FeedbackMux = 1'b1;
  12358. defparam \macro_inst|u_ahb2apb|pwrite .ShiftMux = 1'b0;
  12359. defparam \macro_inst|u_ahb2apb|pwrite .BypassEn = 1'b1;
  12360. defparam \macro_inst|u_ahb2apb|pwrite .CarryEnb = 1'b1;
  12361. alta_slice \macro_inst|u_ahb2apb|pwrite~0 (
  12362. .A(vcc),
  12363. .B(vcc),
  12364. .C(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  12365. .D(\macro_inst|u_ahb2apb|apbState.apbAccess~q ),
  12366. .Cin(),
  12367. .Qin(),
  12368. .Clk(),
  12369. .AsyncReset(),
  12370. .SyncReset(),
  12371. .ShiftData(),
  12372. .SyncLoad(),
  12373. .LutOut(\macro_inst|u_ahb2apb|pwrite~0_combout ),
  12374. .Cout(),
  12375. .Q());
  12376. defparam \macro_inst|u_ahb2apb|pwrite~0 .coord_x = 16;
  12377. defparam \macro_inst|u_ahb2apb|pwrite~0 .coord_y = 2;
  12378. defparam \macro_inst|u_ahb2apb|pwrite~0 .coord_z = 9;
  12379. defparam \macro_inst|u_ahb2apb|pwrite~0 .mask = 16'hF000;
  12380. defparam \macro_inst|u_ahb2apb|pwrite~0 .modeMux = 1'b0;
  12381. defparam \macro_inst|u_ahb2apb|pwrite~0 .FeedbackMux = 1'b0;
  12382. defparam \macro_inst|u_ahb2apb|pwrite~0 .ShiftMux = 1'b0;
  12383. defparam \macro_inst|u_ahb2apb|pwrite~0 .BypassEn = 1'b0;
  12384. defparam \macro_inst|u_ahb2apb|pwrite~0 .CarryEnb = 1'b1;
  12385. alta_slice \macro_inst|u_apb_mux|apb_in_pready~0 (
  12386. .A(\macro_inst|u_apb_mux|pr_select [0]),
  12387. .B(\macro_inst|u_apb_mux|pr_select [1]),
  12388. .C(\macro_inst|u_uart[1]|u_regs|apb_pready~q ),
  12389. .D(\macro_inst|u_uart[0]|u_regs|apb_pready~q ),
  12390. .Cin(),
  12391. .Qin(),
  12392. .Clk(),
  12393. .AsyncReset(),
  12394. .SyncReset(),
  12395. .ShiftData(),
  12396. .SyncLoad(),
  12397. .LutOut(\macro_inst|u_apb_mux|apb_in_pready~0_combout ),
  12398. .Cout(),
  12399. .Q());
  12400. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .coord_x = 14;
  12401. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .coord_y = 7;
  12402. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .coord_z = 9;
  12403. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .mask = 16'h153F;
  12404. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .modeMux = 1'b0;
  12405. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .FeedbackMux = 1'b0;
  12406. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .ShiftMux = 1'b0;
  12407. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .BypassEn = 1'b0;
  12408. defparam \macro_inst|u_apb_mux|apb_in_pready~0 .CarryEnb = 1'b1;
  12409. alta_slice \macro_inst|u_apb_mux|pr_select[0] (
  12410. .A(vcc),
  12411. .B(vcc),
  12412. .C(vcc),
  12413. .D(\macro_inst|u_ahb2apb|paddr [12]),
  12414. .Cin(),
  12415. .Qin(\macro_inst|u_apb_mux|pr_select [0]),
  12416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_apb_mux|always0~0_combout_X61_Y3_SIG_SIG ),
  12417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12418. .SyncReset(),
  12419. .ShiftData(),
  12420. .SyncLoad(),
  12421. .LutOut(\macro_inst|u_apb_mux|pr_select[0]~0_combout ),
  12422. .Cout(),
  12423. .Q(\macro_inst|u_apb_mux|pr_select [0]));
  12424. defparam \macro_inst|u_apb_mux|pr_select[0] .coord_x = 14;
  12425. defparam \macro_inst|u_apb_mux|pr_select[0] .coord_y = 7;
  12426. defparam \macro_inst|u_apb_mux|pr_select[0] .coord_z = 4;
  12427. defparam \macro_inst|u_apb_mux|pr_select[0] .mask = 16'h00FF;
  12428. defparam \macro_inst|u_apb_mux|pr_select[0] .modeMux = 1'b0;
  12429. defparam \macro_inst|u_apb_mux|pr_select[0] .FeedbackMux = 1'b0;
  12430. defparam \macro_inst|u_apb_mux|pr_select[0] .ShiftMux = 1'b0;
  12431. defparam \macro_inst|u_apb_mux|pr_select[0] .BypassEn = 1'b0;
  12432. defparam \macro_inst|u_apb_mux|pr_select[0] .CarryEnb = 1'b1;
  12433. alta_slice \macro_inst|u_apb_mux|pr_select[1] (
  12434. .A(vcc),
  12435. .B(vcc),
  12436. .C(vcc),
  12437. .D(\macro_inst|u_ahb2apb|paddr [12]),
  12438. .Cin(),
  12439. .Qin(\macro_inst|u_apb_mux|pr_select [1]),
  12440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_apb_mux|always0~0_combout_X61_Y3_SIG_SIG ),
  12441. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y3_SIG ),
  12442. .SyncReset(),
  12443. .ShiftData(),
  12444. .SyncLoad(),
  12445. .LutOut(\macro_inst|u_apb_mux|pr_select[1]~feeder_combout ),
  12446. .Cout(),
  12447. .Q(\macro_inst|u_apb_mux|pr_select [1]));
  12448. defparam \macro_inst|u_apb_mux|pr_select[1] .coord_x = 14;
  12449. defparam \macro_inst|u_apb_mux|pr_select[1] .coord_y = 7;
  12450. defparam \macro_inst|u_apb_mux|pr_select[1] .coord_z = 1;
  12451. defparam \macro_inst|u_apb_mux|pr_select[1] .mask = 16'hFF00;
  12452. defparam \macro_inst|u_apb_mux|pr_select[1] .modeMux = 1'b0;
  12453. defparam \macro_inst|u_apb_mux|pr_select[1] .FeedbackMux = 1'b0;
  12454. defparam \macro_inst|u_apb_mux|pr_select[1] .ShiftMux = 1'b0;
  12455. defparam \macro_inst|u_apb_mux|pr_select[1] .BypassEn = 1'b0;
  12456. defparam \macro_inst|u_apb_mux|pr_select[1] .CarryEnb = 1'b1;
  12457. alta_slice \macro_inst|u_uart[0]|u_baud|Equal1~0 (
  12458. .A(\macro_inst|u_uart[0]|u_baud|i_cnt [2]),
  12459. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [3]),
  12460. .C(\macro_inst|u_uart[0]|u_baud|i_cnt [4]),
  12461. .D(\macro_inst|u_uart[0]|u_baud|i_cnt [1]),
  12462. .Cin(),
  12463. .Qin(),
  12464. .Clk(),
  12465. .AsyncReset(),
  12466. .SyncReset(),
  12467. .ShiftData(),
  12468. .SyncLoad(),
  12469. .LutOut(\macro_inst|u_uart[0]|u_baud|Equal1~0_combout ),
  12470. .Cout(),
  12471. .Q());
  12472. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .coord_x = 14;
  12473. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .coord_y = 2;
  12474. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .coord_z = 12;
  12475. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .mask = 16'h0001;
  12476. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .modeMux = 1'b0;
  12477. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .FeedbackMux = 1'b0;
  12478. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .ShiftMux = 1'b0;
  12479. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .BypassEn = 1'b0;
  12480. defparam \macro_inst|u_uart[0]|u_baud|Equal1~0 .CarryEnb = 1'b1;
  12481. alta_slice \macro_inst|u_uart[0]|u_baud|Equal1~1 (
  12482. .A(\macro_inst|u_uart[0]|u_baud|i_cnt [8]),
  12483. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [7]),
  12484. .C(\macro_inst|u_uart[0]|u_baud|i_cnt [5]),
  12485. .D(\macro_inst|u_uart[0]|u_baud|i_cnt [6]),
  12486. .Cin(),
  12487. .Qin(),
  12488. .Clk(),
  12489. .AsyncReset(),
  12490. .SyncReset(),
  12491. .ShiftData(),
  12492. .SyncLoad(),
  12493. .LutOut(\macro_inst|u_uart[0]|u_baud|Equal1~1_combout ),
  12494. .Cout(),
  12495. .Q());
  12496. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .coord_x = 17;
  12497. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .coord_y = 1;
  12498. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .coord_z = 13;
  12499. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .mask = 16'h0001;
  12500. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .modeMux = 1'b0;
  12501. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .FeedbackMux = 1'b0;
  12502. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .ShiftMux = 1'b0;
  12503. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .BypassEn = 1'b0;
  12504. defparam \macro_inst|u_uart[0]|u_baud|Equal1~1 .CarryEnb = 1'b1;
  12505. alta_slice \macro_inst|u_uart[0]|u_baud|Equal1~2 (
  12506. .A(\macro_inst|u_uart[0]|u_baud|i_cnt [11]),
  12507. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [10]),
  12508. .C(\macro_inst|u_uart[0]|u_baud|i_cnt [12]),
  12509. .D(\macro_inst|u_uart[0]|u_baud|i_cnt [9]),
  12510. .Cin(),
  12511. .Qin(),
  12512. .Clk(),
  12513. .AsyncReset(),
  12514. .SyncReset(),
  12515. .ShiftData(),
  12516. .SyncLoad(),
  12517. .LutOut(\macro_inst|u_uart[0]|u_baud|Equal1~2_combout ),
  12518. .Cout(),
  12519. .Q());
  12520. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .coord_x = 14;
  12521. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .coord_y = 2;
  12522. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .coord_z = 3;
  12523. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .mask = 16'h0001;
  12524. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .modeMux = 1'b0;
  12525. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .FeedbackMux = 1'b0;
  12526. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .ShiftMux = 1'b0;
  12527. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .BypassEn = 1'b0;
  12528. defparam \macro_inst|u_uart[0]|u_baud|Equal1~2 .CarryEnb = 1'b1;
  12529. alta_slice \macro_inst|u_uart[0]|u_baud|Equal1~4 (
  12530. .A(\macro_inst|u_uart[0]|u_baud|Equal1~1_combout ),
  12531. .B(\macro_inst|u_uart[0]|u_baud|Equal1~2_combout ),
  12532. .C(\macro_inst|u_uart[0]|u_baud|Equal1~0_combout ),
  12533. .D(\macro_inst|u_uart[0]|u_baud|Equal1~3_combout ),
  12534. .Cin(),
  12535. .Qin(),
  12536. .Clk(),
  12537. .AsyncReset(),
  12538. .SyncReset(),
  12539. .ShiftData(),
  12540. .SyncLoad(),
  12541. .LutOut(\macro_inst|u_uart[0]|u_baud|Equal1~4_combout ),
  12542. .Cout(),
  12543. .Q());
  12544. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .coord_x = 14;
  12545. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .coord_y = 2;
  12546. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .coord_z = 6;
  12547. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .mask = 16'h8000;
  12548. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .modeMux = 1'b0;
  12549. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .FeedbackMux = 1'b0;
  12550. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .ShiftMux = 1'b0;
  12551. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .BypassEn = 1'b0;
  12552. defparam \macro_inst|u_uart[0]|u_baud|Equal1~4 .CarryEnb = 1'b1;
  12553. alta_slice \macro_inst|u_uart[0]|u_baud|LessThan0~1 (
  12554. .A(\macro_inst|u_uart[0]|u_baud|f_cnt [5]),
  12555. .B(\macro_inst|u_uart[0]|u_regs|fbrd [0]),
  12556. .C(vcc),
  12557. .D(vcc),
  12558. .Cin(),
  12559. .Qin(),
  12560. .Clk(),
  12561. .AsyncReset(),
  12562. .SyncReset(),
  12563. .ShiftData(),
  12564. .SyncLoad(),
  12565. .LutOut(),
  12566. .Cout(\macro_inst|u_uart[0]|u_baud|LessThan0~1_cout ),
  12567. .Q());
  12568. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .coord_x = 11;
  12569. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .coord_y = 1;
  12570. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .coord_z = 8;
  12571. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .mask = 16'h0044;
  12572. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .modeMux = 1'b1;
  12573. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .FeedbackMux = 1'b0;
  12574. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .ShiftMux = 1'b0;
  12575. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .BypassEn = 1'b0;
  12576. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~1 .CarryEnb = 1'b0;
  12577. alta_slice \macro_inst|u_uart[0]|u_baud|LessThan0~3 (
  12578. .A(\macro_inst|u_uart[0]|u_baud|f_cnt [4]),
  12579. .B(\macro_inst|u_uart[0]|u_regs|fbrd [1]),
  12580. .C(vcc),
  12581. .D(vcc),
  12582. .Cin(\macro_inst|u_uart[0]|u_baud|LessThan0~1_cout ),
  12583. .Qin(),
  12584. .Clk(),
  12585. .AsyncReset(),
  12586. .SyncReset(),
  12587. .ShiftData(),
  12588. .SyncLoad(),
  12589. .LutOut(),
  12590. .Cout(\macro_inst|u_uart[0]|u_baud|LessThan0~3_cout ),
  12591. .Q());
  12592. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .coord_x = 11;
  12593. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .coord_y = 1;
  12594. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .coord_z = 9;
  12595. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .mask = 16'h002B;
  12596. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .modeMux = 1'b1;
  12597. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .FeedbackMux = 1'b0;
  12598. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .ShiftMux = 1'b0;
  12599. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .BypassEn = 1'b0;
  12600. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~3 .CarryEnb = 1'b0;
  12601. alta_slice \macro_inst|u_uart[0]|u_baud|LessThan0~5 (
  12602. .A(\macro_inst|u_uart[0]|u_regs|fbrd [2]),
  12603. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [3]),
  12604. .C(vcc),
  12605. .D(vcc),
  12606. .Cin(\macro_inst|u_uart[0]|u_baud|LessThan0~3_cout ),
  12607. .Qin(),
  12608. .Clk(),
  12609. .AsyncReset(),
  12610. .SyncReset(),
  12611. .ShiftData(),
  12612. .SyncLoad(),
  12613. .LutOut(),
  12614. .Cout(\macro_inst|u_uart[0]|u_baud|LessThan0~5_cout ),
  12615. .Q());
  12616. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .coord_x = 11;
  12617. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .coord_y = 1;
  12618. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .coord_z = 10;
  12619. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .mask = 16'h002B;
  12620. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .modeMux = 1'b1;
  12621. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .FeedbackMux = 1'b0;
  12622. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .ShiftMux = 1'b0;
  12623. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .BypassEn = 1'b0;
  12624. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~5 .CarryEnb = 1'b0;
  12625. alta_slice \macro_inst|u_uart[0]|u_baud|LessThan0~9 (
  12626. .A(\macro_inst|u_uart[0]|u_baud|f_cnt [1]),
  12627. .B(\macro_inst|u_uart[0]|u_regs|fbrd [4]),
  12628. .C(vcc),
  12629. .D(vcc),
  12630. .Cin(\macro_inst|u_uart[0]|u_baud|LessThan0~7_cout ),
  12631. .Qin(),
  12632. .Clk(),
  12633. .AsyncReset(),
  12634. .SyncReset(),
  12635. .ShiftData(),
  12636. .SyncLoad(),
  12637. .LutOut(),
  12638. .Cout(\macro_inst|u_uart[0]|u_baud|LessThan0~9_cout ),
  12639. .Q());
  12640. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .coord_x = 11;
  12641. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .coord_y = 1;
  12642. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .coord_z = 12;
  12643. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .mask = 16'h004D;
  12644. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .modeMux = 1'b1;
  12645. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .FeedbackMux = 1'b0;
  12646. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .ShiftMux = 1'b0;
  12647. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .BypassEn = 1'b0;
  12648. defparam \macro_inst|u_uart[0]|u_baud|LessThan0~9 .CarryEnb = 1'b0;
  12649. alta_slice \macro_inst|u_uart[0]|u_baud|always0~0 (
  12650. .A(\macro_inst|u_uart[0]|u_baud|Equal1~4_combout ),
  12651. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [0]),
  12652. .C(\macro_inst|u_uart[0]|u_baud|f_del~q ),
  12653. .D(\macro_inst|u_uart[0]|u_regs|uart_en~q ),
  12654. .Cin(),
  12655. .Qin(),
  12656. .Clk(),
  12657. .AsyncReset(),
  12658. .SyncReset(),
  12659. .ShiftData(),
  12660. .SyncLoad(),
  12661. .LutOut(\macro_inst|u_uart[0]|u_baud|always0~0_combout ),
  12662. .Cout(),
  12663. .Q());
  12664. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .coord_x = 14;
  12665. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .coord_y = 2;
  12666. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .coord_z = 10;
  12667. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .mask = 16'h8AFF;
  12668. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .modeMux = 1'b0;
  12669. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .FeedbackMux = 1'b0;
  12670. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .ShiftMux = 1'b0;
  12671. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .BypassEn = 1'b0;
  12672. defparam \macro_inst|u_uart[0]|u_baud|always0~0 .CarryEnb = 1'b1;
  12673. alta_slice \macro_inst|u_uart[0]|u_baud|baud16 (
  12674. .A(\macro_inst|u_uart[0]|u_baud|Equal1~4_combout ),
  12675. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [0]),
  12676. .C(\macro_inst|u_uart[0]|u_baud|f_del~q ),
  12677. .D(\macro_inst|u_uart[0]|u_regs|uart_en~q ),
  12678. .Cin(),
  12679. .Qin(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  12680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ),
  12681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ),
  12682. .SyncReset(),
  12683. .ShiftData(),
  12684. .SyncLoad(),
  12685. .LutOut(\macro_inst|u_uart[0]|u_baud|always2~0_combout ),
  12686. .Cout(),
  12687. .Q(\macro_inst|u_uart[0]|u_baud|baud16~q ));
  12688. defparam \macro_inst|u_uart[0]|u_baud|baud16 .coord_x = 14;
  12689. defparam \macro_inst|u_uart[0]|u_baud|baud16 .coord_y = 2;
  12690. defparam \macro_inst|u_uart[0]|u_baud|baud16 .coord_z = 4;
  12691. defparam \macro_inst|u_uart[0]|u_baud|baud16 .mask = 16'h8A00;
  12692. defparam \macro_inst|u_uart[0]|u_baud|baud16 .modeMux = 1'b0;
  12693. defparam \macro_inst|u_uart[0]|u_baud|baud16 .FeedbackMux = 1'b0;
  12694. defparam \macro_inst|u_uart[0]|u_baud|baud16 .ShiftMux = 1'b0;
  12695. defparam \macro_inst|u_uart[0]|u_baud|baud16 .BypassEn = 1'b0;
  12696. defparam \macro_inst|u_uart[0]|u_baud|baud16 .CarryEnb = 1'b1;
  12697. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[0] (
  12698. .A(\macro_inst|u_uart[0]|u_baud|f_cnt [0]),
  12699. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  12700. .C(vcc),
  12701. .D(vcc),
  12702. .Cin(),
  12703. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [0]),
  12704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12706. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12707. .ShiftData(),
  12708. .SyncLoad(SyncLoad_X61_Y1_GND),
  12709. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[0]~6_combout ),
  12710. .Cout(\macro_inst|u_uart[0]|u_baud|f_cnt[0]~7 ),
  12711. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [0]));
  12712. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .coord_x = 8;
  12713. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .coord_y = 2;
  12714. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .coord_z = 0;
  12715. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .mask = 16'h6688;
  12716. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .modeMux = 1'b0;
  12717. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .FeedbackMux = 1'b0;
  12718. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .ShiftMux = 1'b0;
  12719. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .BypassEn = 1'b1;
  12720. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[0] .CarryEnb = 1'b0;
  12721. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[1] (
  12722. .A(vcc),
  12723. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [1]),
  12724. .C(vcc),
  12725. .D(vcc),
  12726. .Cin(\macro_inst|u_uart[0]|u_baud|f_cnt[0]~7 ),
  12727. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [1]),
  12728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12730. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12731. .ShiftData(),
  12732. .SyncLoad(SyncLoad_X61_Y1_GND),
  12733. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[1]~8_combout ),
  12734. .Cout(\macro_inst|u_uart[0]|u_baud|f_cnt[1]~9 ),
  12735. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [1]));
  12736. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .coord_x = 8;
  12737. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .coord_y = 2;
  12738. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .coord_z = 1;
  12739. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .mask = 16'h3C3F;
  12740. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .modeMux = 1'b1;
  12741. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .FeedbackMux = 1'b0;
  12742. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .ShiftMux = 1'b0;
  12743. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .BypassEn = 1'b1;
  12744. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[1] .CarryEnb = 1'b0;
  12745. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[2] (
  12746. .A(vcc),
  12747. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [2]),
  12748. .C(vcc),
  12749. .D(vcc),
  12750. .Cin(\macro_inst|u_uart[0]|u_baud|f_cnt[1]~9 ),
  12751. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [2]),
  12752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12754. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12755. .ShiftData(),
  12756. .SyncLoad(SyncLoad_X61_Y1_GND),
  12757. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[2]~10_combout ),
  12758. .Cout(\macro_inst|u_uart[0]|u_baud|f_cnt[2]~11 ),
  12759. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [2]));
  12760. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .coord_x = 8;
  12761. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .coord_y = 2;
  12762. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .coord_z = 2;
  12763. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .mask = 16'hC30C;
  12764. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .modeMux = 1'b1;
  12765. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .FeedbackMux = 1'b0;
  12766. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .ShiftMux = 1'b0;
  12767. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .BypassEn = 1'b1;
  12768. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[2] .CarryEnb = 1'b0;
  12769. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[3] (
  12770. .A(vcc),
  12771. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [3]),
  12772. .C(vcc),
  12773. .D(vcc),
  12774. .Cin(\macro_inst|u_uart[0]|u_baud|f_cnt[2]~11 ),
  12775. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [3]),
  12776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12778. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12779. .ShiftData(),
  12780. .SyncLoad(SyncLoad_X61_Y1_GND),
  12781. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[3]~12_combout ),
  12782. .Cout(\macro_inst|u_uart[0]|u_baud|f_cnt[3]~13 ),
  12783. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [3]));
  12784. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .coord_x = 8;
  12785. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .coord_y = 2;
  12786. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .coord_z = 3;
  12787. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .mask = 16'h3C3F;
  12788. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .modeMux = 1'b1;
  12789. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .FeedbackMux = 1'b0;
  12790. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .ShiftMux = 1'b0;
  12791. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .BypassEn = 1'b1;
  12792. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[3] .CarryEnb = 1'b0;
  12793. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[4] (
  12794. .A(vcc),
  12795. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [4]),
  12796. .C(vcc),
  12797. .D(vcc),
  12798. .Cin(\macro_inst|u_uart[0]|u_baud|f_cnt[3]~13 ),
  12799. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [4]),
  12800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12802. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12803. .ShiftData(),
  12804. .SyncLoad(SyncLoad_X61_Y1_GND),
  12805. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[4]~14_combout ),
  12806. .Cout(\macro_inst|u_uart[0]|u_baud|f_cnt[4]~15 ),
  12807. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [4]));
  12808. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .coord_x = 8;
  12809. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .coord_y = 2;
  12810. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .coord_z = 4;
  12811. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .mask = 16'hC30C;
  12812. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .modeMux = 1'b1;
  12813. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .FeedbackMux = 1'b0;
  12814. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .ShiftMux = 1'b0;
  12815. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .BypassEn = 1'b1;
  12816. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[4] .CarryEnb = 1'b0;
  12817. alta_slice \macro_inst|u_uart[0]|u_baud|f_cnt[5] (
  12818. .A(vcc),
  12819. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [5]),
  12820. .C(vcc),
  12821. .D(vcc),
  12822. .Cin(\macro_inst|u_uart[0]|u_baud|f_cnt[4]~15 ),
  12823. .Qin(\macro_inst|u_uart[0]|u_baud|f_cnt [5]),
  12824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  12825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  12826. .SyncReset(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ),
  12827. .ShiftData(),
  12828. .SyncLoad(SyncLoad_X61_Y1_GND),
  12829. .LutOut(\macro_inst|u_uart[0]|u_baud|f_cnt[5]~16_combout ),
  12830. .Cout(),
  12831. .Q(\macro_inst|u_uart[0]|u_baud|f_cnt [5]));
  12832. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .coord_x = 8;
  12833. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .coord_y = 2;
  12834. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .coord_z = 5;
  12835. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .mask = 16'h3C3C;
  12836. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .modeMux = 1'b1;
  12837. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .FeedbackMux = 1'b0;
  12838. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .ShiftMux = 1'b0;
  12839. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .BypassEn = 1'b1;
  12840. defparam \macro_inst|u_uart[0]|u_baud|f_cnt[5] .CarryEnb = 1'b1;
  12841. alta_slice \macro_inst|u_uart[0]|u_baud|f_del (
  12842. .A(vcc),
  12843. .B(\macro_inst|u_uart[0]|u_regs|fbrd [5]),
  12844. .C(vcc),
  12845. .D(\macro_inst|u_uart[0]|u_baud|f_cnt [0]),
  12846. .Cin(\macro_inst|u_uart[0]|u_baud|LessThan0~9_cout ),
  12847. .Qin(\macro_inst|u_uart[0]|u_baud|f_del~q ),
  12848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ),
  12849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  12850. .SyncReset(),
  12851. .ShiftData(),
  12852. .SyncLoad(),
  12853. .LutOut(\macro_inst|u_uart[0]|u_baud|LessThan0~10_combout ),
  12854. .Cout(),
  12855. .Q(\macro_inst|u_uart[0]|u_baud|f_del~q ));
  12856. defparam \macro_inst|u_uart[0]|u_baud|f_del .coord_x = 11;
  12857. defparam \macro_inst|u_uart[0]|u_baud|f_del .coord_y = 1;
  12858. defparam \macro_inst|u_uart[0]|u_baud|f_del .coord_z = 13;
  12859. defparam \macro_inst|u_uart[0]|u_baud|f_del .mask = 16'hC0FC;
  12860. defparam \macro_inst|u_uart[0]|u_baud|f_del .modeMux = 1'b1;
  12861. defparam \macro_inst|u_uart[0]|u_baud|f_del .FeedbackMux = 1'b0;
  12862. defparam \macro_inst|u_uart[0]|u_baud|f_del .ShiftMux = 1'b0;
  12863. defparam \macro_inst|u_uart[0]|u_baud|f_del .BypassEn = 1'b0;
  12864. defparam \macro_inst|u_uart[0]|u_baud|f_del .CarryEnb = 1'b1;
  12865. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[0] (
  12866. .A(vcc),
  12867. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [0]),
  12868. .C(\macro_inst|u_uart[0]|u_regs|ibrd[0]~_wirecell_combout ),
  12869. .D(vcc),
  12870. .Cin(),
  12871. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [0]),
  12872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12874. .SyncReset(SyncReset_X54_Y3_GND),
  12875. .ShiftData(),
  12876. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12877. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[0]~16_combout ),
  12878. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[0]~17 ),
  12879. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [0]));
  12880. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .coord_x = 14;
  12881. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .coord_y = 3;
  12882. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .coord_z = 0;
  12883. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .mask = 16'h3333;
  12884. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .modeMux = 1'b0;
  12885. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .FeedbackMux = 1'b0;
  12886. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .ShiftMux = 1'b0;
  12887. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .BypassEn = 1'b1;
  12888. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[0] .CarryEnb = 1'b0;
  12889. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[10] (
  12890. .A(vcc),
  12891. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [10]),
  12892. .C(\macro_inst|u_uart[0]|u_regs|ibrd [10]),
  12893. .D(vcc),
  12894. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[9]~35 ),
  12895. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [10]),
  12896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12898. .SyncReset(SyncReset_X54_Y3_GND),
  12899. .ShiftData(),
  12900. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12901. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[10]~36_combout ),
  12902. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[10]~37 ),
  12903. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [10]));
  12904. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .coord_x = 14;
  12905. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .coord_y = 3;
  12906. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .coord_z = 10;
  12907. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .mask = 16'h3CCF;
  12908. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .modeMux = 1'b1;
  12909. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .FeedbackMux = 1'b0;
  12910. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .ShiftMux = 1'b0;
  12911. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .BypassEn = 1'b1;
  12912. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[10] .CarryEnb = 1'b0;
  12913. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[11] (
  12914. .A(vcc),
  12915. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [11]),
  12916. .C(\macro_inst|u_uart[0]|u_regs|ibrd [11]),
  12917. .D(vcc),
  12918. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[10]~37 ),
  12919. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [11]),
  12920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12922. .SyncReset(SyncReset_X54_Y3_GND),
  12923. .ShiftData(),
  12924. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12925. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[11]~38_combout ),
  12926. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[11]~39 ),
  12927. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [11]));
  12928. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .coord_x = 14;
  12929. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .coord_y = 3;
  12930. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .coord_z = 11;
  12931. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .mask = 16'hC303;
  12932. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .modeMux = 1'b1;
  12933. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .FeedbackMux = 1'b0;
  12934. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .ShiftMux = 1'b0;
  12935. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .BypassEn = 1'b1;
  12936. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[11] .CarryEnb = 1'b0;
  12937. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[12] (
  12938. .A(vcc),
  12939. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [12]),
  12940. .C(\macro_inst|u_uart[0]|u_regs|ibrd [12]),
  12941. .D(vcc),
  12942. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[11]~39 ),
  12943. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [12]),
  12944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12946. .SyncReset(SyncReset_X54_Y3_GND),
  12947. .ShiftData(),
  12948. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12949. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[12]~40_combout ),
  12950. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[12]~41 ),
  12951. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [12]));
  12952. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .coord_x = 14;
  12953. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .coord_y = 3;
  12954. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .coord_z = 12;
  12955. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .mask = 16'h3CCF;
  12956. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .modeMux = 1'b1;
  12957. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .FeedbackMux = 1'b0;
  12958. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .ShiftMux = 1'b0;
  12959. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .BypassEn = 1'b1;
  12960. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[12] .CarryEnb = 1'b0;
  12961. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[13] (
  12962. .A(vcc),
  12963. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [13]),
  12964. .C(\macro_inst|u_uart[0]|u_regs|ibrd [13]),
  12965. .D(vcc),
  12966. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[12]~41 ),
  12967. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [13]),
  12968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12970. .SyncReset(SyncReset_X54_Y3_GND),
  12971. .ShiftData(),
  12972. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12973. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[13]~42_combout ),
  12974. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[13]~43 ),
  12975. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [13]));
  12976. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .coord_x = 14;
  12977. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .coord_y = 3;
  12978. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .coord_z = 13;
  12979. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .mask = 16'hC303;
  12980. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .modeMux = 1'b1;
  12981. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .FeedbackMux = 1'b0;
  12982. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .ShiftMux = 1'b0;
  12983. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .BypassEn = 1'b1;
  12984. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[13] .CarryEnb = 1'b0;
  12985. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[14] (
  12986. .A(vcc),
  12987. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [14]),
  12988. .C(\macro_inst|u_uart[0]|u_regs|ibrd [14]),
  12989. .D(vcc),
  12990. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[13]~43 ),
  12991. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [14]),
  12992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  12993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  12994. .SyncReset(SyncReset_X54_Y3_GND),
  12995. .ShiftData(),
  12996. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  12997. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[14]~44_combout ),
  12998. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[14]~45 ),
  12999. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [14]));
  13000. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .coord_x = 14;
  13001. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .coord_y = 3;
  13002. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .coord_z = 14;
  13003. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .mask = 16'h3CCF;
  13004. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .modeMux = 1'b1;
  13005. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .FeedbackMux = 1'b0;
  13006. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .ShiftMux = 1'b0;
  13007. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .BypassEn = 1'b1;
  13008. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[14] .CarryEnb = 1'b0;
  13009. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[15] (
  13010. .A(vcc),
  13011. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [15]),
  13012. .C(\macro_inst|u_uart[0]|u_regs|ibrd [15]),
  13013. .D(vcc),
  13014. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[14]~45 ),
  13015. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [15]),
  13016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13018. .SyncReset(SyncReset_X54_Y3_GND),
  13019. .ShiftData(),
  13020. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13021. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[15]~46_combout ),
  13022. .Cout(),
  13023. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [15]));
  13024. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .coord_x = 14;
  13025. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .coord_y = 3;
  13026. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .coord_z = 15;
  13027. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .mask = 16'hC3C3;
  13028. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .modeMux = 1'b1;
  13029. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .FeedbackMux = 1'b0;
  13030. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .ShiftMux = 1'b0;
  13031. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .BypassEn = 1'b1;
  13032. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[15] .CarryEnb = 1'b1;
  13033. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[1] (
  13034. .A(vcc),
  13035. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [1]),
  13036. .C(\macro_inst|u_uart[0]|u_regs|ibrd [1]),
  13037. .D(vcc),
  13038. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[0]~17 ),
  13039. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [1]),
  13040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13042. .SyncReset(SyncReset_X54_Y3_GND),
  13043. .ShiftData(),
  13044. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13045. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[1]~18_combout ),
  13046. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[1]~19 ),
  13047. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [1]));
  13048. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .coord_x = 14;
  13049. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .coord_y = 3;
  13050. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .coord_z = 1;
  13051. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .mask = 16'hC303;
  13052. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .modeMux = 1'b1;
  13053. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .FeedbackMux = 1'b0;
  13054. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .ShiftMux = 1'b0;
  13055. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .BypassEn = 1'b1;
  13056. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[1] .CarryEnb = 1'b0;
  13057. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[2] (
  13058. .A(vcc),
  13059. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [2]),
  13060. .C(\macro_inst|u_uart[0]|u_regs|ibrd [2]),
  13061. .D(vcc),
  13062. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[1]~19 ),
  13063. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [2]),
  13064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13066. .SyncReset(SyncReset_X54_Y3_GND),
  13067. .ShiftData(),
  13068. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13069. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[2]~20_combout ),
  13070. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[2]~21 ),
  13071. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [2]));
  13072. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .coord_x = 14;
  13073. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .coord_y = 3;
  13074. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .coord_z = 2;
  13075. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .mask = 16'h3CCF;
  13076. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .modeMux = 1'b1;
  13077. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .FeedbackMux = 1'b0;
  13078. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .ShiftMux = 1'b0;
  13079. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .BypassEn = 1'b1;
  13080. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[2] .CarryEnb = 1'b0;
  13081. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[3] (
  13082. .A(vcc),
  13083. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [3]),
  13084. .C(\macro_inst|u_uart[0]|u_regs|ibrd [3]),
  13085. .D(vcc),
  13086. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[2]~21 ),
  13087. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [3]),
  13088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13090. .SyncReset(SyncReset_X54_Y3_GND),
  13091. .ShiftData(),
  13092. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13093. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[3]~22_combout ),
  13094. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[3]~23 ),
  13095. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [3]));
  13096. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .coord_x = 14;
  13097. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .coord_y = 3;
  13098. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .coord_z = 3;
  13099. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .mask = 16'hC303;
  13100. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .modeMux = 1'b1;
  13101. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .FeedbackMux = 1'b0;
  13102. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .ShiftMux = 1'b0;
  13103. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .BypassEn = 1'b1;
  13104. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[3] .CarryEnb = 1'b0;
  13105. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[4] (
  13106. .A(vcc),
  13107. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [4]),
  13108. .C(\macro_inst|u_uart[0]|u_regs|ibrd [4]),
  13109. .D(vcc),
  13110. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[3]~23 ),
  13111. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [4]),
  13112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13114. .SyncReset(SyncReset_X54_Y3_GND),
  13115. .ShiftData(),
  13116. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13117. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[4]~24_combout ),
  13118. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[4]~25 ),
  13119. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [4]));
  13120. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .coord_x = 14;
  13121. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .coord_y = 3;
  13122. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .coord_z = 4;
  13123. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .mask = 16'h3CCF;
  13124. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .modeMux = 1'b1;
  13125. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .FeedbackMux = 1'b0;
  13126. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .ShiftMux = 1'b0;
  13127. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .BypassEn = 1'b1;
  13128. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[4] .CarryEnb = 1'b0;
  13129. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[5] (
  13130. .A(vcc),
  13131. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [5]),
  13132. .C(\macro_inst|u_uart[0]|u_regs|ibrd [5]),
  13133. .D(vcc),
  13134. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[4]~25 ),
  13135. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [5]),
  13136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13138. .SyncReset(SyncReset_X54_Y3_GND),
  13139. .ShiftData(),
  13140. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13141. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[5]~26_combout ),
  13142. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[5]~27 ),
  13143. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [5]));
  13144. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .coord_x = 14;
  13145. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .coord_y = 3;
  13146. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .coord_z = 5;
  13147. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .mask = 16'hC303;
  13148. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .modeMux = 1'b1;
  13149. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .FeedbackMux = 1'b0;
  13150. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .ShiftMux = 1'b0;
  13151. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .BypassEn = 1'b1;
  13152. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[5] .CarryEnb = 1'b0;
  13153. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[6] (
  13154. .A(vcc),
  13155. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [6]),
  13156. .C(\macro_inst|u_uart[0]|u_regs|ibrd [6]),
  13157. .D(vcc),
  13158. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[5]~27 ),
  13159. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [6]),
  13160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13162. .SyncReset(SyncReset_X54_Y3_GND),
  13163. .ShiftData(),
  13164. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13165. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[6]~28_combout ),
  13166. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[6]~29 ),
  13167. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [6]));
  13168. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .coord_x = 14;
  13169. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .coord_y = 3;
  13170. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .coord_z = 6;
  13171. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .mask = 16'h3CCF;
  13172. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .modeMux = 1'b1;
  13173. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .FeedbackMux = 1'b0;
  13174. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .ShiftMux = 1'b0;
  13175. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .BypassEn = 1'b1;
  13176. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[6] .CarryEnb = 1'b0;
  13177. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[7] (
  13178. .A(vcc),
  13179. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [7]),
  13180. .C(\macro_inst|u_uart[0]|u_regs|ibrd [7]),
  13181. .D(vcc),
  13182. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[6]~29 ),
  13183. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [7]),
  13184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13186. .SyncReset(SyncReset_X54_Y3_GND),
  13187. .ShiftData(),
  13188. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13189. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[7]~30_combout ),
  13190. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[7]~31 ),
  13191. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [7]));
  13192. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .coord_x = 14;
  13193. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .coord_y = 3;
  13194. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .coord_z = 7;
  13195. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .mask = 16'hC303;
  13196. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .modeMux = 1'b1;
  13197. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .FeedbackMux = 1'b0;
  13198. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .ShiftMux = 1'b0;
  13199. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .BypassEn = 1'b1;
  13200. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[7] .CarryEnb = 1'b0;
  13201. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[8] (
  13202. .A(vcc),
  13203. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [8]),
  13204. .C(\macro_inst|u_uart[0]|u_regs|ibrd [8]),
  13205. .D(vcc),
  13206. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[7]~31 ),
  13207. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [8]),
  13208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13210. .SyncReset(SyncReset_X54_Y3_GND),
  13211. .ShiftData(),
  13212. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13213. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[8]~32_combout ),
  13214. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[8]~33 ),
  13215. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [8]));
  13216. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .coord_x = 14;
  13217. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .coord_y = 3;
  13218. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .coord_z = 8;
  13219. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .mask = 16'h3CCF;
  13220. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .modeMux = 1'b1;
  13221. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .FeedbackMux = 1'b0;
  13222. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .ShiftMux = 1'b0;
  13223. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .BypassEn = 1'b1;
  13224. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[8] .CarryEnb = 1'b0;
  13225. alta_slice \macro_inst|u_uart[0]|u_baud|i_cnt[9] (
  13226. .A(vcc),
  13227. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [9]),
  13228. .C(\macro_inst|u_uart[0]|u_regs|ibrd [9]),
  13229. .D(vcc),
  13230. .Cin(\macro_inst|u_uart[0]|u_baud|i_cnt[8]~33 ),
  13231. .Qin(\macro_inst|u_uart[0]|u_baud|i_cnt [9]),
  13232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y3_SIG_VCC ),
  13233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y3_SIG ),
  13234. .SyncReset(SyncReset_X54_Y3_GND),
  13235. .ShiftData(),
  13236. .SyncLoad(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ),
  13237. .LutOut(\macro_inst|u_uart[0]|u_baud|i_cnt[9]~34_combout ),
  13238. .Cout(\macro_inst|u_uart[0]|u_baud|i_cnt[9]~35 ),
  13239. .Q(\macro_inst|u_uart[0]|u_baud|i_cnt [9]));
  13240. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .coord_x = 14;
  13241. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .coord_y = 3;
  13242. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .coord_z = 9;
  13243. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .mask = 16'hC303;
  13244. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .modeMux = 1'b1;
  13245. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .FeedbackMux = 1'b0;
  13246. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .ShiftMux = 1'b0;
  13247. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .BypassEn = 1'b1;
  13248. defparam \macro_inst|u_uart[0]|u_baud|i_cnt[9] .CarryEnb = 1'b0;
  13249. alta_slice \macro_inst|u_uart[0]|u_regs|Mux10~0 (
  13250. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  13251. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  13252. .C(\macro_inst|u_ahb2apb|paddr [9]),
  13253. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13254. .Cin(),
  13255. .Qin(),
  13256. .Clk(),
  13257. .AsyncReset(),
  13258. .SyncReset(),
  13259. .ShiftData(),
  13260. .SyncLoad(),
  13261. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux10~0_combout ),
  13262. .Cout(),
  13263. .Q());
  13264. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .coord_x = 12;
  13265. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .coord_y = 3;
  13266. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .coord_z = 7;
  13267. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .mask = 16'hF305;
  13268. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .modeMux = 1'b0;
  13269. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .FeedbackMux = 1'b0;
  13270. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .ShiftMux = 1'b0;
  13271. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .BypassEn = 1'b0;
  13272. defparam \macro_inst|u_uart[0]|u_regs|Mux10~0 .CarryEnb = 1'b1;
  13273. alta_slice \macro_inst|u_uart[0]|u_regs|Mux10~1 (
  13274. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  13275. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  13276. .C(\macro_inst|u_ahb2apb|paddr [9]),
  13277. .D(\macro_inst|u_uart[0]|u_regs|Mux10~0_combout ),
  13278. .Cin(),
  13279. .Qin(),
  13280. .Clk(),
  13281. .AsyncReset(),
  13282. .SyncReset(),
  13283. .ShiftData(),
  13284. .SyncLoad(),
  13285. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux10~1_combout ),
  13286. .Cout(),
  13287. .Q());
  13288. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .coord_x = 12;
  13289. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .coord_y = 3;
  13290. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .coord_z = 8;
  13291. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .mask = 16'hA0CF;
  13292. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .modeMux = 1'b0;
  13293. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .FeedbackMux = 1'b0;
  13294. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .ShiftMux = 1'b0;
  13295. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .BypassEn = 1'b0;
  13296. defparam \macro_inst|u_uart[0]|u_regs|Mux10~1 .CarryEnb = 1'b1;
  13297. alta_slice \macro_inst|u_uart[0]|u_regs|Mux11~0 (
  13298. .A(\macro_inst|u_ahb2apb|paddr [8]),
  13299. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  13300. .C(\macro_inst|u_ahb2apb|paddr [10]),
  13301. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  13302. .Cin(),
  13303. .Qin(),
  13304. .Clk(),
  13305. .AsyncReset(),
  13306. .SyncReset(),
  13307. .ShiftData(),
  13308. .SyncLoad(),
  13309. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux11~0_combout ),
  13310. .Cout(),
  13311. .Q());
  13312. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .coord_x = 16;
  13313. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .coord_y = 3;
  13314. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .coord_z = 5;
  13315. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .mask = 16'hD080;
  13316. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .modeMux = 1'b0;
  13317. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .FeedbackMux = 1'b0;
  13318. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .ShiftMux = 1'b0;
  13319. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .BypassEn = 1'b0;
  13320. defparam \macro_inst|u_uart[0]|u_regs|Mux11~0 .CarryEnb = 1'b1;
  13321. alta_slice \macro_inst|u_uart[0]|u_regs|Mux11~1 (
  13322. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  13323. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13324. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  13325. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13326. .Cin(),
  13327. .Qin(),
  13328. .Clk(),
  13329. .AsyncReset(),
  13330. .SyncReset(),
  13331. .ShiftData(),
  13332. .SyncLoad(),
  13333. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux11~1_combout ),
  13334. .Cout(),
  13335. .Q());
  13336. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .coord_x = 9;
  13337. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .coord_y = 2;
  13338. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .coord_z = 5;
  13339. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .mask = 16'hFC22;
  13340. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .modeMux = 1'b0;
  13341. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .FeedbackMux = 1'b0;
  13342. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .ShiftMux = 1'b0;
  13343. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .BypassEn = 1'b0;
  13344. defparam \macro_inst|u_uart[0]|u_regs|Mux11~1 .CarryEnb = 1'b1;
  13345. alta_slice \macro_inst|u_uart[0]|u_regs|Mux11~2 (
  13346. .A(\macro_inst|u_ahb2apb|paddr [9]),
  13347. .B(\macro_inst|u_uart[0]|u_regs|Mux11~1_combout ),
  13348. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  13349. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  13350. .Cin(),
  13351. .Qin(),
  13352. .Clk(),
  13353. .AsyncReset(),
  13354. .SyncReset(),
  13355. .ShiftData(),
  13356. .SyncLoad(),
  13357. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux11~2_combout ),
  13358. .Cout(),
  13359. .Q());
  13360. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .coord_x = 9;
  13361. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .coord_y = 2;
  13362. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .coord_z = 2;
  13363. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .mask = 16'hE6C4;
  13364. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .modeMux = 1'b0;
  13365. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .FeedbackMux = 1'b0;
  13366. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .ShiftMux = 1'b0;
  13367. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .BypassEn = 1'b0;
  13368. defparam \macro_inst|u_uart[0]|u_regs|Mux11~2 .CarryEnb = 1'b1;
  13369. alta_slice \macro_inst|u_uart[0]|u_regs|Mux12~0 (
  13370. .A(\macro_inst|u_ahb2apb|paddr [9]),
  13371. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  13372. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  13373. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13374. .Cin(),
  13375. .Qin(),
  13376. .Clk(),
  13377. .AsyncReset(),
  13378. .SyncReset(),
  13379. .ShiftData(),
  13380. .SyncLoad(),
  13381. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux12~0_combout ),
  13382. .Cout(),
  13383. .Q());
  13384. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .coord_x = 9;
  13385. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .coord_y = 2;
  13386. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .coord_z = 12;
  13387. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .mask = 16'hEE50;
  13388. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .modeMux = 1'b0;
  13389. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .FeedbackMux = 1'b0;
  13390. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .ShiftMux = 1'b0;
  13391. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .BypassEn = 1'b0;
  13392. defparam \macro_inst|u_uart[0]|u_regs|Mux12~0 .CarryEnb = 1'b1;
  13393. alta_slice \macro_inst|u_uart[0]|u_regs|Mux12~1 (
  13394. .A(\macro_inst|u_uart[0]|u_regs|Mux12~0_combout ),
  13395. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13396. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  13397. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  13398. .Cin(),
  13399. .Qin(),
  13400. .Clk(),
  13401. .AsyncReset(),
  13402. .SyncReset(),
  13403. .ShiftData(),
  13404. .SyncLoad(),
  13405. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux12~1_combout ),
  13406. .Cout(),
  13407. .Q());
  13408. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .coord_x = 10;
  13409. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .coord_y = 1;
  13410. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .coord_z = 12;
  13411. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .mask = 16'hEA62;
  13412. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .modeMux = 1'b0;
  13413. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .FeedbackMux = 1'b0;
  13414. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .ShiftMux = 1'b0;
  13415. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .BypassEn = 1'b0;
  13416. defparam \macro_inst|u_uart[0]|u_regs|Mux12~1 .CarryEnb = 1'b1;
  13417. alta_slice \macro_inst|u_uart[0]|u_regs|Selector0~0 (
  13418. .A(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [1]),
  13419. .B(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [0]),
  13420. .C(\macro_inst|u_ahb2apb|paddr [9]),
  13421. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13422. .Cin(),
  13423. .Qin(),
  13424. .Clk(),
  13425. .AsyncReset(),
  13426. .SyncReset(),
  13427. .ShiftData(),
  13428. .SyncLoad(),
  13429. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector0~0_combout ),
  13430. .Cout(),
  13431. .Q());
  13432. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .coord_x = 14;
  13433. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .coord_y = 4;
  13434. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .coord_z = 9;
  13435. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .mask = 16'hFA0C;
  13436. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .modeMux = 1'b0;
  13437. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .FeedbackMux = 1'b0;
  13438. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .ShiftMux = 1'b0;
  13439. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .BypassEn = 1'b0;
  13440. defparam \macro_inst|u_uart[0]|u_regs|Selector0~0 .CarryEnb = 1'b1;
  13441. alta_slice \macro_inst|u_uart[0]|u_regs|Selector0~2 (
  13442. .A(\macro_inst|u_uart[0]|u_regs|ibrd [12]),
  13443. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  13444. .C(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [4]),
  13445. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  13446. .Cin(),
  13447. .Qin(),
  13448. .Clk(),
  13449. .AsyncReset(),
  13450. .SyncReset(),
  13451. .ShiftData(),
  13452. .SyncLoad(),
  13453. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector0~2_combout ),
  13454. .Cout(),
  13455. .Q());
  13456. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .coord_x = 15;
  13457. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .coord_y = 3;
  13458. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .coord_z = 1;
  13459. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .mask = 16'hFC22;
  13460. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .modeMux = 1'b0;
  13461. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .FeedbackMux = 1'b0;
  13462. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .ShiftMux = 1'b0;
  13463. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .BypassEn = 1'b0;
  13464. defparam \macro_inst|u_uart[0]|u_regs|Selector0~2 .CarryEnb = 1'b1;
  13465. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~0 (
  13466. .A(\macro_inst|u_uart[0]|u_rx[0]|break_error~q ),
  13467. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13468. .C(\macro_inst|u_ahb2apb|paddr [8]),
  13469. .D(\macro_inst|u_uart[0]|u_rx[1]|break_error~q ),
  13470. .Cin(),
  13471. .Qin(),
  13472. .Clk(),
  13473. .AsyncReset(),
  13474. .SyncReset(),
  13475. .ShiftData(),
  13476. .SyncLoad(),
  13477. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~0_combout ),
  13478. .Cout(),
  13479. .Q());
  13480. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .coord_x = 15;
  13481. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .coord_y = 4;
  13482. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .coord_z = 3;
  13483. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .mask = 16'hF2C2;
  13484. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .modeMux = 1'b0;
  13485. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .FeedbackMux = 1'b0;
  13486. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .ShiftMux = 1'b0;
  13487. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .BypassEn = 1'b0;
  13488. defparam \macro_inst|u_uart[0]|u_regs|Selector10~0 .CarryEnb = 1'b1;
  13489. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~1 (
  13490. .A(\macro_inst|u_uart[0]|u_rx[2]|break_error~q ),
  13491. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13492. .C(\macro_inst|u_uart[0]|u_rx[3]|break_error~q ),
  13493. .D(\macro_inst|u_uart[0]|u_regs|Selector10~0_combout ),
  13494. .Cin(),
  13495. .Qin(),
  13496. .Clk(),
  13497. .AsyncReset(),
  13498. .SyncReset(),
  13499. .ShiftData(),
  13500. .SyncLoad(),
  13501. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~1_combout ),
  13502. .Cout(),
  13503. .Q());
  13504. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .coord_x = 15;
  13505. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .coord_y = 4;
  13506. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .coord_z = 9;
  13507. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .mask = 16'hF388;
  13508. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .modeMux = 1'b0;
  13509. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .FeedbackMux = 1'b0;
  13510. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .ShiftMux = 1'b0;
  13511. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .BypassEn = 1'b0;
  13512. defparam \macro_inst|u_uart[0]|u_regs|Selector10~1 .CarryEnb = 1'b1;
  13513. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~2 (
  13514. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  13515. .B(\macro_inst|u_uart[0]|u_regs|rx_reg [2]),
  13516. .C(\macro_inst|u_uart[0]|u_rx[4]|break_error~q ),
  13517. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13518. .Cin(),
  13519. .Qin(),
  13520. .Clk(),
  13521. .AsyncReset(),
  13522. .SyncReset(),
  13523. .ShiftData(),
  13524. .SyncLoad(),
  13525. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~2_combout ),
  13526. .Cout(),
  13527. .Q());
  13528. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .coord_x = 15;
  13529. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .coord_y = 4;
  13530. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .coord_z = 6;
  13531. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .mask = 16'hAAE4;
  13532. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .modeMux = 1'b0;
  13533. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .FeedbackMux = 1'b0;
  13534. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .ShiftMux = 1'b0;
  13535. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .BypassEn = 1'b0;
  13536. defparam \macro_inst|u_uart[0]|u_regs|Selector10~2 .CarryEnb = 1'b1;
  13537. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~3 (
  13538. .A(\macro_inst|u_uart[0]|u_regs|Selector10~2_combout ),
  13539. .B(\macro_inst|u_uart[0]|u_rx[5]|break_error~q ),
  13540. .C(\macro_inst|u_uart[0]|u_regs|Selector10~1_combout ),
  13541. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13542. .Cin(),
  13543. .Qin(),
  13544. .Clk(),
  13545. .AsyncReset(),
  13546. .SyncReset(),
  13547. .ShiftData(),
  13548. .SyncLoad(),
  13549. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~3_combout ),
  13550. .Cout(),
  13551. .Q());
  13552. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .coord_x = 15;
  13553. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .coord_y = 4;
  13554. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .coord_z = 14;
  13555. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .mask = 16'hD8AA;
  13556. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .modeMux = 1'b0;
  13557. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .FeedbackMux = 1'b0;
  13558. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .ShiftMux = 1'b0;
  13559. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .BypassEn = 1'b0;
  13560. defparam \macro_inst|u_uart[0]|u_regs|Selector10~3 .CarryEnb = 1'b1;
  13561. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~4 (
  13562. .A(\macro_inst|u_uart[0]|u_regs|Selector10~3_combout ),
  13563. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  13564. .C(\macro_inst|u_uart[0]|u_regs|ibrd [2]),
  13565. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  13566. .Cin(),
  13567. .Qin(),
  13568. .Clk(),
  13569. .AsyncReset(),
  13570. .SyncReset(),
  13571. .ShiftData(),
  13572. .SyncLoad(),
  13573. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~4_combout ),
  13574. .Cout(),
  13575. .Q());
  13576. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .coord_x = 15;
  13577. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .coord_y = 4;
  13578. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .coord_z = 15;
  13579. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .mask = 16'hC0BB;
  13580. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .modeMux = 1'b0;
  13581. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .FeedbackMux = 1'b0;
  13582. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .ShiftMux = 1'b0;
  13583. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .BypassEn = 1'b0;
  13584. defparam \macro_inst|u_uart[0]|u_regs|Selector10~4 .CarryEnb = 1'b1;
  13585. alta_slice \macro_inst|u_uart[0]|u_regs|Selector10~5 (
  13586. .A(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  13587. .B(\macro_inst|u_uart[0]|u_regs|fbrd [2]),
  13588. .C(\macro_inst|u_ahb2apb|paddr [3]),
  13589. .D(\macro_inst|u_uart[0]|u_regs|Selector10~4_combout ),
  13590. .Cin(),
  13591. .Qin(),
  13592. .Clk(),
  13593. .AsyncReset(),
  13594. .SyncReset(),
  13595. .ShiftData(),
  13596. .SyncLoad(),
  13597. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~5_combout ),
  13598. .Cout(),
  13599. .Q());
  13600. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .coord_x = 15;
  13601. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .coord_y = 6;
  13602. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .coord_z = 9;
  13603. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .mask = 16'hCFA0;
  13604. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .modeMux = 1'b0;
  13605. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .FeedbackMux = 1'b0;
  13606. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .ShiftMux = 1'b0;
  13607. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .BypassEn = 1'b0;
  13608. defparam \macro_inst|u_uart[0]|u_regs|Selector10~5 .CarryEnb = 1'b1;
  13609. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~10 (
  13610. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11_combout ),
  13611. .B(\macro_inst|u_uart[0]|u_regs|Selector11~3_combout ),
  13612. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15_combout ),
  13613. .D(\macro_inst|u_uart[0]|u_regs|Selector11~13_combout ),
  13614. .Cin(),
  13615. .Qin(),
  13616. .Clk(),
  13617. .AsyncReset(),
  13618. .SyncReset(),
  13619. .ShiftData(),
  13620. .SyncLoad(),
  13621. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~10_combout ),
  13622. .Cout(),
  13623. .Q());
  13624. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .coord_x = 16;
  13625. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .coord_y = 5;
  13626. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .coord_z = 12;
  13627. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .mask = 16'hD585;
  13628. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .modeMux = 1'b0;
  13629. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .FeedbackMux = 1'b0;
  13630. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .ShiftMux = 1'b0;
  13631. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .BypassEn = 1'b0;
  13632. defparam \macro_inst|u_uart[0]|u_regs|Selector11~10 .CarryEnb = 1'b1;
  13633. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~2 (
  13634. .A(\macro_inst|u_ahb2apb|paddr [9]),
  13635. .B(\macro_inst|u_uart[0]|u_regs|tx_dma_en [1]),
  13636. .C(\macro_inst|u_uart[0]|u_regs|tx_dma_en [0]),
  13637. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13638. .Cin(),
  13639. .Qin(),
  13640. .Clk(),
  13641. .AsyncReset(),
  13642. .SyncReset(),
  13643. .ShiftData(),
  13644. .SyncLoad(),
  13645. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~2_combout ),
  13646. .Cout(),
  13647. .Q());
  13648. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .coord_x = 12;
  13649. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .coord_y = 3;
  13650. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .coord_z = 11;
  13651. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .mask = 16'hEE50;
  13652. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .modeMux = 1'b0;
  13653. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .FeedbackMux = 1'b0;
  13654. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .ShiftMux = 1'b0;
  13655. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .BypassEn = 1'b0;
  13656. defparam \macro_inst|u_uart[0]|u_regs|Selector11~2 .CarryEnb = 1'b1;
  13657. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~5 (
  13658. .A(\macro_inst|u_uart[0]|u_rx[3]|parity_error~q ),
  13659. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13660. .C(\macro_inst|u_uart[0]|u_rx[2]|parity_error~q ),
  13661. .D(\macro_inst|u_uart[0]|u_regs|Selector11~4_combout ),
  13662. .Cin(),
  13663. .Qin(),
  13664. .Clk(),
  13665. .AsyncReset(),
  13666. .SyncReset(),
  13667. .ShiftData(),
  13668. .SyncLoad(),
  13669. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~5_combout ),
  13670. .Cout(),
  13671. .Q());
  13672. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .coord_x = 15;
  13673. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .coord_y = 4;
  13674. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .coord_z = 13;
  13675. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .mask = 16'hBBC0;
  13676. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .modeMux = 1'b0;
  13677. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .FeedbackMux = 1'b0;
  13678. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .ShiftMux = 1'b0;
  13679. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .BypassEn = 1'b0;
  13680. defparam \macro_inst|u_uart[0]|u_regs|Selector11~5 .CarryEnb = 1'b1;
  13681. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~6 (
  13682. .A(\macro_inst|u_uart[0]|u_rx[4]|parity_error~q ),
  13683. .B(\macro_inst|u_uart[0]|u_regs|rx_reg [1]),
  13684. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  13685. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13686. .Cin(),
  13687. .Qin(),
  13688. .Clk(),
  13689. .AsyncReset(),
  13690. .SyncReset(),
  13691. .ShiftData(),
  13692. .SyncLoad(),
  13693. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~6_combout ),
  13694. .Cout(),
  13695. .Q());
  13696. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .coord_x = 15;
  13697. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .coord_y = 4;
  13698. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .coord_z = 12;
  13699. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .mask = 16'hF0AC;
  13700. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .modeMux = 1'b0;
  13701. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .FeedbackMux = 1'b0;
  13702. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .ShiftMux = 1'b0;
  13703. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .BypassEn = 1'b0;
  13704. defparam \macro_inst|u_uart[0]|u_regs|Selector11~6 .CarryEnb = 1'b1;
  13705. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~7 (
  13706. .A(\macro_inst|u_uart[0]|u_rx[5]|parity_error~q ),
  13707. .B(\macro_inst|u_uart[0]|u_regs|Selector11~5_combout ),
  13708. .C(\macro_inst|u_uart[0]|u_regs|Selector11~6_combout ),
  13709. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13710. .Cin(),
  13711. .Qin(),
  13712. .Clk(),
  13713. .AsyncReset(),
  13714. .SyncReset(),
  13715. .ShiftData(),
  13716. .SyncLoad(),
  13717. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~7_combout ),
  13718. .Cout(),
  13719. .Q());
  13720. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .coord_x = 15;
  13721. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .coord_y = 4;
  13722. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .coord_z = 0;
  13723. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .mask = 16'hACF0;
  13724. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .modeMux = 1'b0;
  13725. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .FeedbackMux = 1'b0;
  13726. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .ShiftMux = 1'b0;
  13727. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .BypassEn = 1'b0;
  13728. defparam \macro_inst|u_uart[0]|u_regs|Selector11~7 .CarryEnb = 1'b1;
  13729. alta_slice \macro_inst|u_uart[0]|u_regs|Selector11~9 (
  13730. .A(\macro_inst|u_uart[0]|u_regs|fbrd [1]),
  13731. .B(\macro_inst|u_ahb2apb|paddr [3]),
  13732. .C(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  13733. .D(\macro_inst|u_uart[0]|u_regs|Selector11~8_combout ),
  13734. .Cin(),
  13735. .Qin(),
  13736. .Clk(),
  13737. .AsyncReset(),
  13738. .SyncReset(),
  13739. .ShiftData(),
  13740. .SyncLoad(),
  13741. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~9_combout ),
  13742. .Cout(),
  13743. .Q());
  13744. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .coord_x = 15;
  13745. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .coord_y = 4;
  13746. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .coord_z = 8;
  13747. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .mask = 16'hBBC0;
  13748. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .modeMux = 1'b0;
  13749. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .FeedbackMux = 1'b0;
  13750. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .ShiftMux = 1'b0;
  13751. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .BypassEn = 1'b0;
  13752. defparam \macro_inst|u_uart[0]|u_regs|Selector11~9 .CarryEnb = 1'b1;
  13753. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~10 (
  13754. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8_combout ),
  13755. .B(\macro_inst|u_uart[0]|u_regs|Selector12~1_combout ),
  13756. .C(\macro_inst|u_uart[0]|u_regs|Selector12~9_combout ),
  13757. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~7_combout ),
  13758. .Cin(),
  13759. .Qin(),
  13760. .Clk(),
  13761. .AsyncReset(),
  13762. .SyncReset(),
  13763. .ShiftData(),
  13764. .SyncLoad(),
  13765. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~10_combout ),
  13766. .Cout(),
  13767. .Q());
  13768. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .coord_x = 16;
  13769. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .coord_y = 3;
  13770. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .coord_z = 14;
  13771. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .mask = 16'hD855;
  13772. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .modeMux = 1'b0;
  13773. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .FeedbackMux = 1'b0;
  13774. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .ShiftMux = 1'b0;
  13775. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .BypassEn = 1'b0;
  13776. defparam \macro_inst|u_uart[0]|u_regs|Selector12~10 .CarryEnb = 1'b1;
  13777. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~2 (
  13778. .A(\macro_inst|u_uart[0]|u_rx[1]|framing_error~q ),
  13779. .B(\macro_inst|u_uart[0]|u_rx[0]|framing_error~q ),
  13780. .C(\macro_inst|u_ahb2apb|paddr [9]),
  13781. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13782. .Cin(),
  13783. .Qin(),
  13784. .Clk(),
  13785. .AsyncReset(),
  13786. .SyncReset(),
  13787. .ShiftData(),
  13788. .SyncLoad(),
  13789. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~2_combout ),
  13790. .Cout(),
  13791. .Q());
  13792. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .coord_x = 12;
  13793. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .coord_y = 3;
  13794. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .coord_z = 9;
  13795. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .mask = 16'hFA0C;
  13796. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .modeMux = 1'b0;
  13797. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .FeedbackMux = 1'b0;
  13798. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .ShiftMux = 1'b0;
  13799. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .BypassEn = 1'b0;
  13800. defparam \macro_inst|u_uart[0]|u_regs|Selector12~2 .CarryEnb = 1'b1;
  13801. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~3 (
  13802. .A(\macro_inst|u_uart[0]|u_rx[2]|framing_error~q ),
  13803. .B(\macro_inst|u_uart[0]|u_rx[3]|framing_error~q ),
  13804. .C(\macro_inst|u_ahb2apb|paddr [9]),
  13805. .D(\macro_inst|u_uart[0]|u_regs|Selector12~2_combout ),
  13806. .Cin(),
  13807. .Qin(),
  13808. .Clk(),
  13809. .AsyncReset(),
  13810. .SyncReset(),
  13811. .ShiftData(),
  13812. .SyncLoad(),
  13813. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~3_combout ),
  13814. .Cout(),
  13815. .Q());
  13816. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .coord_x = 12;
  13817. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .coord_y = 3;
  13818. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .coord_z = 2;
  13819. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .mask = 16'hCFA0;
  13820. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .modeMux = 1'b0;
  13821. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .FeedbackMux = 1'b0;
  13822. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .ShiftMux = 1'b0;
  13823. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .BypassEn = 1'b0;
  13824. defparam \macro_inst|u_uart[0]|u_regs|Selector12~3 .CarryEnb = 1'b1;
  13825. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~4 (
  13826. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13827. .B(\macro_inst|u_uart[0]|u_regs|rx_reg [0]),
  13828. .C(\macro_inst|u_uart[0]|u_rx[4]|framing_error~q ),
  13829. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  13830. .Cin(),
  13831. .Qin(),
  13832. .Clk(),
  13833. .AsyncReset(),
  13834. .SyncReset(),
  13835. .ShiftData(),
  13836. .SyncLoad(),
  13837. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~4_combout ),
  13838. .Cout(),
  13839. .Q());
  13840. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .coord_x = 16;
  13841. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .coord_y = 6;
  13842. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .coord_z = 8;
  13843. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .mask = 16'hFA44;
  13844. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .modeMux = 1'b0;
  13845. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .FeedbackMux = 1'b0;
  13846. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .ShiftMux = 1'b0;
  13847. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .BypassEn = 1'b0;
  13848. defparam \macro_inst|u_uart[0]|u_regs|Selector12~4 .CarryEnb = 1'b1;
  13849. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~5 (
  13850. .A(\macro_inst|u_uart[0]|u_rx[5]|framing_error~q ),
  13851. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  13852. .C(\macro_inst|u_uart[0]|u_regs|Selector12~4_combout ),
  13853. .D(\macro_inst|u_uart[0]|u_regs|Selector12~3_combout ),
  13854. .Cin(),
  13855. .Qin(),
  13856. .Clk(),
  13857. .AsyncReset(),
  13858. .SyncReset(),
  13859. .ShiftData(),
  13860. .SyncLoad(),
  13861. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~5_combout ),
  13862. .Cout(),
  13863. .Q());
  13864. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .coord_x = 16;
  13865. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .coord_y = 6;
  13866. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .coord_z = 9;
  13867. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .mask = 16'hBCB0;
  13868. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .modeMux = 1'b0;
  13869. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .FeedbackMux = 1'b0;
  13870. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .ShiftMux = 1'b0;
  13871. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .BypassEn = 1'b0;
  13872. defparam \macro_inst|u_uart[0]|u_regs|Selector12~5 .CarryEnb = 1'b1;
  13873. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~6 (
  13874. .A(\macro_inst|u_ahb2apb|paddr [3]),
  13875. .B(\macro_inst|u_ahb2apb|paddr [5]),
  13876. .C(\macro_inst|u_uart[0]|u_regs|uart_en~q ),
  13877. .D(\macro_inst|u_ahb2apb|paddr [2]),
  13878. .Cin(),
  13879. .Qin(),
  13880. .Clk(),
  13881. .AsyncReset(),
  13882. .SyncReset(),
  13883. .ShiftData(),
  13884. .SyncLoad(),
  13885. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~6_combout ),
  13886. .Cout(),
  13887. .Q());
  13888. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .coord_x = 15;
  13889. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .coord_y = 6;
  13890. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .coord_z = 11;
  13891. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .mask = 16'h0040;
  13892. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .modeMux = 1'b0;
  13893. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .FeedbackMux = 1'b0;
  13894. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .ShiftMux = 1'b0;
  13895. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .BypassEn = 1'b0;
  13896. defparam \macro_inst|u_uart[0]|u_regs|Selector12~6 .CarryEnb = 1'b1;
  13897. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~7 (
  13898. .A(\macro_inst|u_ahb2apb|paddr [5]),
  13899. .B(\macro_inst|u_ahb2apb|paddr [2]),
  13900. .C(vcc),
  13901. .D(\macro_inst|u_uart[0]|u_regs|fbrd [0]),
  13902. .Cin(),
  13903. .Qin(),
  13904. .Clk(),
  13905. .AsyncReset(),
  13906. .SyncReset(),
  13907. .ShiftData(),
  13908. .SyncLoad(),
  13909. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~7_combout ),
  13910. .Cout(),
  13911. .Q());
  13912. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .coord_x = 15;
  13913. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .coord_y = 8;
  13914. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .coord_z = 15;
  13915. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .mask = 16'h2200;
  13916. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .modeMux = 1'b0;
  13917. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .FeedbackMux = 1'b0;
  13918. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .ShiftMux = 1'b0;
  13919. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .BypassEn = 1'b0;
  13920. defparam \macro_inst|u_uart[0]|u_regs|Selector12~7 .CarryEnb = 1'b1;
  13921. alta_slice \macro_inst|u_uart[0]|u_regs|Selector12~8 (
  13922. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  13923. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  13924. .C(\macro_inst|u_uart[0]|u_regs|Selector12~7_combout ),
  13925. .D(\macro_inst|u_uart[0]|u_regs|Selector12~6_combout ),
  13926. .Cin(),
  13927. .Qin(),
  13928. .Clk(),
  13929. .AsyncReset(),
  13930. .SyncReset(),
  13931. .ShiftData(),
  13932. .SyncLoad(),
  13933. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~8_combout ),
  13934. .Cout(),
  13935. .Q());
  13936. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .coord_x = 15;
  13937. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .coord_y = 6;
  13938. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .coord_z = 12;
  13939. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .mask = 16'h7654;
  13940. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .modeMux = 1'b0;
  13941. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .FeedbackMux = 1'b0;
  13942. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .ShiftMux = 1'b0;
  13943. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .BypassEn = 1'b0;
  13944. defparam \macro_inst|u_uart[0]|u_regs|Selector12~8 .CarryEnb = 1'b1;
  13945. alta_slice \macro_inst|u_uart[0]|u_regs|Selector1~2 (
  13946. .A(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [4]),
  13947. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  13948. .C(\macro_inst|u_uart[0]|u_regs|ibrd [11]),
  13949. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  13950. .Cin(),
  13951. .Qin(),
  13952. .Clk(),
  13953. .AsyncReset(),
  13954. .SyncReset(),
  13955. .ShiftData(),
  13956. .SyncLoad(),
  13957. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector1~2_combout ),
  13958. .Cout(),
  13959. .Q());
  13960. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .coord_x = 15;
  13961. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .coord_y = 3;
  13962. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .coord_z = 9;
  13963. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .mask = 16'hEE30;
  13964. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .modeMux = 1'b0;
  13965. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .FeedbackMux = 1'b0;
  13966. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .ShiftMux = 1'b0;
  13967. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .BypassEn = 1'b0;
  13968. defparam \macro_inst|u_uart[0]|u_regs|Selector1~2 .CarryEnb = 1'b1;
  13969. alta_slice \macro_inst|u_uart[0]|u_regs|Selector2~0 (
  13970. .A(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [1]),
  13971. .B(\macro_inst|u_ahb2apb|paddr [9]),
  13972. .C(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [0]),
  13973. .D(\macro_inst|u_ahb2apb|paddr [8]),
  13974. .Cin(),
  13975. .Qin(),
  13976. .Clk(),
  13977. .AsyncReset(),
  13978. .SyncReset(),
  13979. .ShiftData(),
  13980. .SyncLoad(),
  13981. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector2~0_combout ),
  13982. .Cout(),
  13983. .Q());
  13984. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .coord_x = 9;
  13985. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .coord_y = 3;
  13986. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .coord_z = 6;
  13987. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .mask = 16'hEE30;
  13988. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .modeMux = 1'b0;
  13989. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .FeedbackMux = 1'b0;
  13990. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .ShiftMux = 1'b0;
  13991. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .BypassEn = 1'b0;
  13992. defparam \macro_inst|u_uart[0]|u_regs|Selector2~0 .CarryEnb = 1'b1;
  13993. alta_slice \macro_inst|u_uart[0]|u_regs|Selector2~2 (
  13994. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  13995. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  13996. .C(\macro_inst|u_uart[0]|u_regs|ibrd [10]),
  13997. .D(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [4]),
  13998. .Cin(),
  13999. .Qin(),
  14000. .Clk(),
  14001. .AsyncReset(),
  14002. .SyncReset(),
  14003. .ShiftData(),
  14004. .SyncLoad(),
  14005. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector2~2_combout ),
  14006. .Cout(),
  14007. .Q());
  14008. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .coord_x = 15;
  14009. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .coord_y = 3;
  14010. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .coord_z = 12;
  14011. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .mask = 16'hDC98;
  14012. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .modeMux = 1'b0;
  14013. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .FeedbackMux = 1'b0;
  14014. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .ShiftMux = 1'b0;
  14015. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .BypassEn = 1'b0;
  14016. defparam \macro_inst|u_uart[0]|u_regs|Selector2~2 .CarryEnb = 1'b1;
  14017. alta_slice \macro_inst|u_uart[0]|u_regs|Selector3~2 (
  14018. .A(\macro_inst|u_uart[0]|u_regs|ibrd [9]),
  14019. .B(\macro_inst|u_uart[0]|u_regs|break_error_ie [4]),
  14020. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  14021. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  14022. .Cin(),
  14023. .Qin(),
  14024. .Clk(),
  14025. .AsyncReset(),
  14026. .SyncReset(),
  14027. .ShiftData(),
  14028. .SyncLoad(),
  14029. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector3~2_combout ),
  14030. .Cout(),
  14031. .Q());
  14032. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .coord_x = 15;
  14033. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .coord_y = 1;
  14034. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .coord_z = 14;
  14035. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .mask = 16'hFC0A;
  14036. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .modeMux = 1'b0;
  14037. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .FeedbackMux = 1'b0;
  14038. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .ShiftMux = 1'b0;
  14039. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .BypassEn = 1'b0;
  14040. defparam \macro_inst|u_uart[0]|u_regs|Selector3~2 .CarryEnb = 1'b1;
  14041. alta_slice \macro_inst|u_uart[0]|u_regs|Selector4~2 (
  14042. .A(\macro_inst|u_uart[0]|u_regs|parity_error_ie [4]),
  14043. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  14044. .C(\macro_inst|u_uart[0]|u_regs|ibrd [8]),
  14045. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  14046. .Cin(),
  14047. .Qin(),
  14048. .Clk(),
  14049. .AsyncReset(),
  14050. .SyncReset(),
  14051. .ShiftData(),
  14052. .SyncLoad(),
  14053. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector4~2_combout ),
  14054. .Cout(),
  14055. .Q());
  14056. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .coord_x = 15;
  14057. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .coord_y = 1;
  14058. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .coord_z = 10;
  14059. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .mask = 16'hEE30;
  14060. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .modeMux = 1'b0;
  14061. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .FeedbackMux = 1'b0;
  14062. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .ShiftMux = 1'b0;
  14063. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .BypassEn = 1'b0;
  14064. defparam \macro_inst|u_uart[0]|u_regs|Selector4~2 .CarryEnb = 1'b1;
  14065. alta_slice \macro_inst|u_uart[0]|u_regs|Selector5~7 (
  14066. .A(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  14067. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  14068. .C(\macro_inst|u_uart[0]|u_regs|Selector5~11_combout ),
  14069. .D(\macro_inst|u_uart[0]|u_regs|Selector5~12_combout ),
  14070. .Cin(),
  14071. .Qin(),
  14072. .Clk(),
  14073. .AsyncReset(),
  14074. .SyncReset(),
  14075. .ShiftData(),
  14076. .SyncLoad(),
  14077. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~7_combout ),
  14078. .Cout(),
  14079. .Q());
  14080. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .coord_x = 15;
  14081. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .coord_y = 3;
  14082. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .coord_z = 2;
  14083. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .mask = 16'hA820;
  14084. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .modeMux = 1'b0;
  14085. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .FeedbackMux = 1'b0;
  14086. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .ShiftMux = 1'b0;
  14087. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .BypassEn = 1'b0;
  14088. defparam \macro_inst|u_uart[0]|u_regs|Selector5~7 .CarryEnb = 1'b1;
  14089. alta_slice \macro_inst|u_uart[0]|u_regs|Selector5~8 (
  14090. .A(\macro_inst|u_uart[0]|u_regs|Selector5~4_combout ),
  14091. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  14092. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  14093. .D(\macro_inst|u_uart[0]|u_regs|Selector5~7_combout ),
  14094. .Cin(),
  14095. .Qin(),
  14096. .Clk(),
  14097. .AsyncReset(),
  14098. .SyncReset(),
  14099. .ShiftData(),
  14100. .SyncLoad(),
  14101. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~8_combout ),
  14102. .Cout(),
  14103. .Q());
  14104. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .coord_x = 16;
  14105. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .coord_y = 6;
  14106. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .coord_z = 5;
  14107. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .mask = 16'h3E0E;
  14108. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .modeMux = 1'b0;
  14109. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .FeedbackMux = 1'b0;
  14110. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .ShiftMux = 1'b0;
  14111. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .BypassEn = 1'b0;
  14112. defparam \macro_inst|u_uart[0]|u_regs|Selector5~8 .CarryEnb = 1'b1;
  14113. alta_slice \macro_inst|u_uart[0]|u_regs|Selector5~9 (
  14114. .A(\macro_inst|u_uart[0]|u_regs|rx_reg [7]),
  14115. .B(\macro_inst|u_ahb2apb|paddr [2]),
  14116. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ),
  14117. .D(\macro_inst|u_uart[0]|u_regs|Selector5~8_combout ),
  14118. .Cin(),
  14119. .Qin(),
  14120. .Clk(),
  14121. .AsyncReset(),
  14122. .SyncReset(),
  14123. .ShiftData(),
  14124. .SyncLoad(),
  14125. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~9_combout ),
  14126. .Cout(),
  14127. .Q());
  14128. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .coord_x = 16;
  14129. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .coord_y = 6;
  14130. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .coord_z = 10;
  14131. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .mask = 16'hD0F0;
  14132. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .modeMux = 1'b0;
  14133. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .FeedbackMux = 1'b0;
  14134. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .ShiftMux = 1'b0;
  14135. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .BypassEn = 1'b0;
  14136. defparam \macro_inst|u_uart[0]|u_regs|Selector5~9 .CarryEnb = 1'b1;
  14137. alta_slice \macro_inst|u_uart[0]|u_regs|Selector6~0 (
  14138. .A(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  14139. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  14140. .C(\macro_inst|u_ahb2apb|paddr [2]),
  14141. .D(\macro_inst|u_ahb2apb|paddr [5]),
  14142. .Cin(),
  14143. .Qin(),
  14144. .Clk(),
  14145. .AsyncReset(),
  14146. .SyncReset(),
  14147. .ShiftData(),
  14148. .SyncLoad(),
  14149. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector6~0_combout ),
  14150. .Cout(),
  14151. .Q());
  14152. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .coord_x = 15;
  14153. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .coord_y = 6;
  14154. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .coord_z = 4;
  14155. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .mask = 16'h800A;
  14156. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .modeMux = 1'b0;
  14157. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .FeedbackMux = 1'b0;
  14158. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .ShiftMux = 1'b0;
  14159. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .BypassEn = 1'b0;
  14160. defparam \macro_inst|u_uart[0]|u_regs|Selector6~0 .CarryEnb = 1'b1;
  14161. alta_slice \macro_inst|u_uart[0]|u_regs|Selector6~2 (
  14162. .A(\macro_inst|u_uart[0]|u_regs|Selector6~1_combout ),
  14163. .B(\macro_inst|u_uart[0]|u_regs|rx_reg [6]),
  14164. .C(\macro_inst|u_uart[0]|u_regs|status_reg [1]),
  14165. .D(\macro_inst|u_ahb2apb|paddr [4]),
  14166. .Cin(),
  14167. .Qin(),
  14168. .Clk(),
  14169. .AsyncReset(),
  14170. .SyncReset(),
  14171. .ShiftData(),
  14172. .SyncLoad(),
  14173. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector6~2_combout ),
  14174. .Cout(),
  14175. .Q());
  14176. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .coord_x = 15;
  14177. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .coord_y = 7;
  14178. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .coord_z = 6;
  14179. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .mask = 16'h0A88;
  14180. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .modeMux = 1'b0;
  14181. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .FeedbackMux = 1'b0;
  14182. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .ShiftMux = 1'b0;
  14183. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .BypassEn = 1'b0;
  14184. defparam \macro_inst|u_uart[0]|u_regs|Selector6~2 .CarryEnb = 1'b1;
  14185. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~10 (
  14186. .A(\macro_inst|u_uart[0]|u_regs|rx_reg [5]),
  14187. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_complete~q ),
  14188. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14189. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  14190. .Cin(),
  14191. .Qin(),
  14192. .Clk(),
  14193. .AsyncReset(),
  14194. .SyncReset(),
  14195. .ShiftData(),
  14196. .SyncLoad(),
  14197. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~10_combout ),
  14198. .Cout(),
  14199. .Q());
  14200. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .coord_x = 12;
  14201. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .coord_y = 1;
  14202. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .coord_z = 4;
  14203. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .mask = 16'hFC0A;
  14204. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .modeMux = 1'b0;
  14205. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .FeedbackMux = 1'b0;
  14206. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .ShiftMux = 1'b0;
  14207. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .BypassEn = 1'b0;
  14208. defparam \macro_inst|u_uart[0]|u_regs|Selector7~10 .CarryEnb = 1'b1;
  14209. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~11 (
  14210. .A(vcc),
  14211. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_complete~q ),
  14212. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14213. .D(\macro_inst|u_uart[0]|u_regs|Selector7~10_combout ),
  14214. .Cin(),
  14215. .Qin(),
  14216. .Clk(),
  14217. .AsyncReset(),
  14218. .SyncReset(),
  14219. .ShiftData(),
  14220. .SyncLoad(),
  14221. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~11_combout ),
  14222. .Cout(),
  14223. .Q());
  14224. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .coord_x = 12;
  14225. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .coord_y = 1;
  14226. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .coord_z = 1;
  14227. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .mask = 16'hCFF0;
  14228. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .modeMux = 1'b0;
  14229. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .FeedbackMux = 1'b0;
  14230. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .ShiftMux = 1'b0;
  14231. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .BypassEn = 1'b0;
  14232. defparam \macro_inst|u_uart[0]|u_regs|Selector7~11 .CarryEnb = 1'b1;
  14233. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~12 (
  14234. .A(\macro_inst|u_ahb2apb|paddr [9]),
  14235. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_complete~q ),
  14236. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_complete~q ),
  14237. .D(\macro_inst|u_ahb2apb|paddr [8]),
  14238. .Cin(),
  14239. .Qin(),
  14240. .Clk(),
  14241. .AsyncReset(),
  14242. .SyncReset(),
  14243. .ShiftData(),
  14244. .SyncLoad(),
  14245. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~12_combout ),
  14246. .Cout(),
  14247. .Q());
  14248. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .coord_x = 9;
  14249. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .coord_y = 3;
  14250. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .coord_z = 4;
  14251. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .mask = 16'hEE50;
  14252. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .modeMux = 1'b0;
  14253. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .FeedbackMux = 1'b0;
  14254. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .ShiftMux = 1'b0;
  14255. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .BypassEn = 1'b0;
  14256. defparam \macro_inst|u_uart[0]|u_regs|Selector7~12 .CarryEnb = 1'b1;
  14257. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~13 (
  14258. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_complete~q ),
  14259. .B(\macro_inst|u_ahb2apb|paddr [9]),
  14260. .C(\macro_inst|u_uart[0]|u_regs|Selector7~12_combout ),
  14261. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_complete~q ),
  14262. .Cin(),
  14263. .Qin(),
  14264. .Clk(),
  14265. .AsyncReset(),
  14266. .SyncReset(),
  14267. .ShiftData(),
  14268. .SyncLoad(),
  14269. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~13_combout ),
  14270. .Cout(),
  14271. .Q());
  14272. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .coord_x = 12;
  14273. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .coord_y = 1;
  14274. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .coord_z = 2;
  14275. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .mask = 16'hF838;
  14276. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .modeMux = 1'b0;
  14277. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .FeedbackMux = 1'b0;
  14278. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .ShiftMux = 1'b0;
  14279. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .BypassEn = 1'b0;
  14280. defparam \macro_inst|u_uart[0]|u_regs|Selector7~13 .CarryEnb = 1'b1;
  14281. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~14 (
  14282. .A(\macro_inst|u_uart[0]|u_regs|Selector7~13_combout ),
  14283. .B(vcc),
  14284. .C(vcc),
  14285. .D(\macro_inst|u_uart[0]|u_regs|Selector7~10_combout ),
  14286. .Cin(),
  14287. .Qin(),
  14288. .Clk(),
  14289. .AsyncReset(),
  14290. .SyncReset(),
  14291. .ShiftData(),
  14292. .SyncLoad(),
  14293. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~14_combout ),
  14294. .Cout(),
  14295. .Q());
  14296. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .coord_x = 12;
  14297. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .coord_y = 1;
  14298. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .coord_z = 9;
  14299. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .mask = 16'hFFAA;
  14300. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .modeMux = 1'b0;
  14301. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .FeedbackMux = 1'b0;
  14302. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .ShiftMux = 1'b0;
  14303. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .BypassEn = 1'b0;
  14304. defparam \macro_inst|u_uart[0]|u_regs|Selector7~14 .CarryEnb = 1'b1;
  14305. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~15 (
  14306. .A(\macro_inst|u_uart[0]|u_regs|Selector7~11_combout ),
  14307. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  14308. .C(\macro_inst|u_uart[0]|u_regs|Selector7~18_combout ),
  14309. .D(\macro_inst|u_uart[0]|u_regs|Selector7~14_combout ),
  14310. .Cin(),
  14311. .Qin(),
  14312. .Clk(),
  14313. .AsyncReset(),
  14314. .SyncReset(),
  14315. .ShiftData(),
  14316. .SyncLoad(),
  14317. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~15_combout ),
  14318. .Cout(),
  14319. .Q());
  14320. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .coord_x = 12;
  14321. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .coord_y = 1;
  14322. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .coord_z = 12;
  14323. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .mask = 16'hB830;
  14324. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .modeMux = 1'b0;
  14325. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .FeedbackMux = 1'b0;
  14326. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .ShiftMux = 1'b0;
  14327. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .BypassEn = 1'b0;
  14328. defparam \macro_inst|u_uart[0]|u_regs|Selector7~15 .CarryEnb = 1'b1;
  14329. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~17 (
  14330. .A(\macro_inst|u_ahb2apb|paddr [7]),
  14331. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ),
  14332. .C(vcc),
  14333. .D(\macro_inst|u_ahb2apb|paddr [6]),
  14334. .Cin(),
  14335. .Qin(),
  14336. .Clk(),
  14337. .AsyncReset(),
  14338. .SyncReset(),
  14339. .ShiftData(),
  14340. .SyncLoad(),
  14341. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~17_combout ),
  14342. .Cout(),
  14343. .Q());
  14344. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .coord_x = 15;
  14345. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .coord_y = 1;
  14346. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .coord_z = 12;
  14347. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .mask = 16'h0011;
  14348. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .modeMux = 1'b0;
  14349. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .FeedbackMux = 1'b0;
  14350. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .ShiftMux = 1'b0;
  14351. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .BypassEn = 1'b0;
  14352. defparam \macro_inst|u_uart[0]|u_regs|Selector7~17 .CarryEnb = 1'b1;
  14353. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~18 (
  14354. .A(\macro_inst|u_uart[0]|u_regs|fbrd [5]),
  14355. .B(\macro_inst|u_ahb2apb|paddr [4]),
  14356. .C(\macro_inst|u_ahb2apb|paddr [3]),
  14357. .D(\macro_inst|u_uart[0]|u_regs|ibrd [5]),
  14358. .Cin(),
  14359. .Qin(),
  14360. .Clk(),
  14361. .AsyncReset(),
  14362. .SyncReset(),
  14363. .ShiftData(),
  14364. .SyncLoad(),
  14365. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~18_combout ),
  14366. .Cout(),
  14367. .Q());
  14368. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .coord_x = 15;
  14369. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .coord_y = 1;
  14370. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .coord_z = 13;
  14371. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .mask = 16'hABA8;
  14372. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .modeMux = 1'b0;
  14373. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .FeedbackMux = 1'b0;
  14374. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .ShiftMux = 1'b0;
  14375. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .BypassEn = 1'b0;
  14376. defparam \macro_inst|u_uart[0]|u_regs|Selector7~18 .CarryEnb = 1'b1;
  14377. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~8 (
  14378. .A(vcc),
  14379. .B(\macro_inst|u_uart[0]|u_regs|Selector7~7_combout ),
  14380. .C(vcc),
  14381. .D(\macro_inst|u_uart[0]|u_regs|Selector7~4_combout ),
  14382. .Cin(),
  14383. .Qin(),
  14384. .Clk(),
  14385. .AsyncReset(),
  14386. .SyncReset(),
  14387. .ShiftData(),
  14388. .SyncLoad(),
  14389. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~8_combout ),
  14390. .Cout(),
  14391. .Q());
  14392. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .coord_x = 12;
  14393. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .coord_y = 1;
  14394. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .coord_z = 6;
  14395. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .mask = 16'hFFCC;
  14396. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .modeMux = 1'b0;
  14397. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .FeedbackMux = 1'b0;
  14398. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .ShiftMux = 1'b0;
  14399. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .BypassEn = 1'b0;
  14400. defparam \macro_inst|u_uart[0]|u_regs|Selector7~8 .CarryEnb = 1'b1;
  14401. alta_slice \macro_inst|u_uart[0]|u_regs|Selector7~9 (
  14402. .A(\macro_inst|u_uart[0]|u_regs|Selector7~8_combout ),
  14403. .B(\macro_inst|u_uart[0]|u_regs|Selector7~5_combout ),
  14404. .C(\macro_inst|u_uart[0]|u_regs|Selector7~18_combout ),
  14405. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  14406. .Cin(),
  14407. .Qin(),
  14408. .Clk(),
  14409. .AsyncReset(),
  14410. .SyncReset(),
  14411. .ShiftData(),
  14412. .SyncLoad(),
  14413. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~9_combout ),
  14414. .Cout(),
  14415. .Q());
  14416. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .coord_x = 12;
  14417. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .coord_y = 1;
  14418. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .coord_z = 7;
  14419. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .mask = 16'hF088;
  14420. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .modeMux = 1'b0;
  14421. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .FeedbackMux = 1'b0;
  14422. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .ShiftMux = 1'b0;
  14423. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .BypassEn = 1'b0;
  14424. defparam \macro_inst|u_uart[0]|u_regs|Selector7~9 .CarryEnb = 1'b1;
  14425. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~10 (
  14426. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [5]),
  14427. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  14428. .C(\macro_inst|u_uart[0]|u_regs|Selector8~8_combout ),
  14429. .D(\macro_inst|u_uart[0]|u_regs|Selector8~9_combout ),
  14430. .Cin(),
  14431. .Qin(),
  14432. .Clk(),
  14433. .AsyncReset(),
  14434. .SyncReset(),
  14435. .ShiftData(),
  14436. .SyncLoad(),
  14437. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~10_combout ),
  14438. .Cout(),
  14439. .Q());
  14440. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .coord_x = 12;
  14441. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .coord_y = 3;
  14442. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .coord_z = 12;
  14443. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .mask = 16'hBBC0;
  14444. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .modeMux = 1'b0;
  14445. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .FeedbackMux = 1'b0;
  14446. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .ShiftMux = 1'b0;
  14447. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .BypassEn = 1'b0;
  14448. defparam \macro_inst|u_uart[0]|u_regs|Selector8~10 .CarryEnb = 1'b1;
  14449. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~11 (
  14450. .A(\macro_inst|u_uart[0]|u_regs|ibrd [4]),
  14451. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  14452. .C(\macro_inst|u_uart[0]|u_regs|Selector8~6_combout ),
  14453. .D(\macro_inst|u_uart[0]|u_regs|Selector8~10_combout ),
  14454. .Cin(),
  14455. .Qin(),
  14456. .Clk(),
  14457. .AsyncReset(),
  14458. .SyncReset(),
  14459. .ShiftData(),
  14460. .SyncLoad(),
  14461. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~11_combout ),
  14462. .Cout(),
  14463. .Q());
  14464. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .coord_x = 15;
  14465. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .coord_y = 1;
  14466. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .coord_z = 5;
  14467. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .mask = 16'hF838;
  14468. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .modeMux = 1'b0;
  14469. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .FeedbackMux = 1'b0;
  14470. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .ShiftMux = 1'b0;
  14471. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .BypassEn = 1'b0;
  14472. defparam \macro_inst|u_uart[0]|u_regs|Selector8~11 .CarryEnb = 1'b1;
  14473. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~2 (
  14474. .A(\macro_inst|u_ahb2apb|paddr [9]),
  14475. .B(\macro_inst|u_ahb2apb|paddr [8]),
  14476. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_idle~q ),
  14477. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_idle~q ),
  14478. .Cin(),
  14479. .Qin(),
  14480. .Clk(),
  14481. .AsyncReset(),
  14482. .SyncReset(),
  14483. .ShiftData(),
  14484. .SyncLoad(),
  14485. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~2_combout ),
  14486. .Cout(),
  14487. .Q());
  14488. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .coord_x = 12;
  14489. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .coord_y = 1;
  14490. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .coord_z = 8;
  14491. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .mask = 16'hDC98;
  14492. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .modeMux = 1'b0;
  14493. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .FeedbackMux = 1'b0;
  14494. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .ShiftMux = 1'b0;
  14495. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .BypassEn = 1'b0;
  14496. defparam \macro_inst|u_uart[0]|u_regs|Selector8~2 .CarryEnb = 1'b1;
  14497. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~3 (
  14498. .A(\macro_inst|u_ahb2apb|paddr [9]),
  14499. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_idle~q ),
  14500. .C(\macro_inst|u_uart[0]|u_regs|Selector8~2_combout ),
  14501. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_idle~q ),
  14502. .Cin(),
  14503. .Qin(),
  14504. .Clk(),
  14505. .AsyncReset(),
  14506. .SyncReset(),
  14507. .ShiftData(),
  14508. .SyncLoad(),
  14509. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~3_combout ),
  14510. .Cout(),
  14511. .Q());
  14512. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .coord_x = 12;
  14513. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .coord_y = 1;
  14514. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .coord_z = 14;
  14515. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .mask = 16'hF858;
  14516. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .modeMux = 1'b0;
  14517. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .FeedbackMux = 1'b0;
  14518. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .ShiftMux = 1'b0;
  14519. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .BypassEn = 1'b0;
  14520. defparam \macro_inst|u_uart[0]|u_regs|Selector8~3 .CarryEnb = 1'b1;
  14521. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~4 (
  14522. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14523. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  14524. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_idle~q ),
  14525. .D(\macro_inst|u_uart[0]|u_regs|rx_reg [4]),
  14526. .Cin(),
  14527. .Qin(),
  14528. .Clk(),
  14529. .AsyncReset(),
  14530. .SyncReset(),
  14531. .ShiftData(),
  14532. .SyncLoad(),
  14533. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~4_combout ),
  14534. .Cout(),
  14535. .Q());
  14536. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .coord_x = 12;
  14537. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .coord_y = 1;
  14538. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .coord_z = 3;
  14539. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .mask = 16'hD9C8;
  14540. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .modeMux = 1'b0;
  14541. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .FeedbackMux = 1'b0;
  14542. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .ShiftMux = 1'b0;
  14543. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .BypassEn = 1'b0;
  14544. defparam \macro_inst|u_uart[0]|u_regs|Selector8~4 .CarryEnb = 1'b1;
  14545. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~5 (
  14546. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14547. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_idle~q ),
  14548. .C(\macro_inst|u_uart[0]|u_regs|Selector8~3_combout ),
  14549. .D(\macro_inst|u_uart[0]|u_regs|Selector8~4_combout ),
  14550. .Cin(),
  14551. .Qin(),
  14552. .Clk(),
  14553. .AsyncReset(),
  14554. .SyncReset(),
  14555. .ShiftData(),
  14556. .SyncLoad(),
  14557. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~5_combout ),
  14558. .Cout(),
  14559. .Q());
  14560. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .coord_x = 12;
  14561. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .coord_y = 1;
  14562. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .coord_z = 13;
  14563. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .mask = 16'hDDA0;
  14564. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .modeMux = 1'b0;
  14565. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .FeedbackMux = 1'b0;
  14566. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .ShiftMux = 1'b0;
  14567. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .BypassEn = 1'b0;
  14568. defparam \macro_inst|u_uart[0]|u_regs|Selector8~5 .CarryEnb = 1'b1;
  14569. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~6 (
  14570. .A(\macro_inst|u_uart[0]|u_regs|fbrd [4]),
  14571. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  14572. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  14573. .D(\macro_inst|u_uart[0]|u_regs|Selector8~5_combout ),
  14574. .Cin(),
  14575. .Qin(),
  14576. .Clk(),
  14577. .AsyncReset(),
  14578. .SyncReset(),
  14579. .ShiftData(),
  14580. .SyncLoad(),
  14581. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~6_combout ),
  14582. .Cout(),
  14583. .Q());
  14584. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .coord_x = 15;
  14585. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .coord_y = 1;
  14586. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .coord_z = 0;
  14587. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .mask = 16'h3E0E;
  14588. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .modeMux = 1'b0;
  14589. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .FeedbackMux = 1'b0;
  14590. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .ShiftMux = 1'b0;
  14591. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .BypassEn = 1'b0;
  14592. defparam \macro_inst|u_uart[0]|u_regs|Selector8~6 .CarryEnb = 1'b1;
  14593. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~7 (
  14594. .A(\macro_inst|u_ahb2apb|paddr [9]),
  14595. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [0]),
  14596. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [1]),
  14597. .D(\macro_inst|u_ahb2apb|paddr [8]),
  14598. .Cin(),
  14599. .Qin(),
  14600. .Clk(),
  14601. .AsyncReset(),
  14602. .SyncReset(),
  14603. .ShiftData(),
  14604. .SyncLoad(),
  14605. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~7_combout ),
  14606. .Cout(),
  14607. .Q());
  14608. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .coord_x = 9;
  14609. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .coord_y = 3;
  14610. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .coord_z = 14;
  14611. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .mask = 16'hFA44;
  14612. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .modeMux = 1'b0;
  14613. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .FeedbackMux = 1'b0;
  14614. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .ShiftMux = 1'b0;
  14615. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .BypassEn = 1'b0;
  14616. defparam \macro_inst|u_uart[0]|u_regs|Selector8~7 .CarryEnb = 1'b1;
  14617. alta_slice \macro_inst|u_uart[0]|u_regs|Selector8~9 (
  14618. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [4]),
  14619. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  14620. .C(\macro_inst|u_uart[0]|u_regs|status_reg [1]),
  14621. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  14622. .Cin(),
  14623. .Qin(),
  14624. .Clk(),
  14625. .AsyncReset(),
  14626. .SyncReset(),
  14627. .ShiftData(),
  14628. .SyncLoad(),
  14629. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~9_combout ),
  14630. .Cout(),
  14631. .Q());
  14632. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .coord_x = 12;
  14633. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .coord_y = 3;
  14634. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .coord_z = 15;
  14635. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .mask = 16'hEE30;
  14636. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .modeMux = 1'b0;
  14637. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .FeedbackMux = 1'b0;
  14638. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .ShiftMux = 1'b0;
  14639. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .BypassEn = 1'b0;
  14640. defparam \macro_inst|u_uart[0]|u_regs|Selector8~9 .CarryEnb = 1'b1;
  14641. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~2 (
  14642. .A(\macro_inst|u_ahb2apb|paddr [3]),
  14643. .B(\macro_inst|u_ahb2apb|paddr [4]),
  14644. .C(\macro_inst|u_ahb2apb|paddr [2]),
  14645. .D(\macro_inst|u_ahb2apb|paddr [5]),
  14646. .Cin(),
  14647. .Qin(),
  14648. .Clk(),
  14649. .AsyncReset(),
  14650. .SyncReset(),
  14651. .ShiftData(),
  14652. .SyncLoad(),
  14653. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~2_combout ),
  14654. .Cout(),
  14655. .Q());
  14656. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .coord_x = 14;
  14657. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .coord_y = 7;
  14658. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .coord_z = 2;
  14659. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .mask = 16'h3319;
  14660. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .modeMux = 1'b0;
  14661. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .FeedbackMux = 1'b0;
  14662. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .ShiftMux = 1'b0;
  14663. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .BypassEn = 1'b0;
  14664. defparam \macro_inst|u_uart[0]|u_regs|Selector9~2 .CarryEnb = 1'b1;
  14665. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~3 (
  14666. .A(\macro_inst|u_uart[0]|u_rx[0]|overrun_error~q ),
  14667. .B(\macro_inst|u_ahb2apb|paddr [9]),
  14668. .C(\macro_inst|u_uart[0]|u_rx[1]|overrun_error~q ),
  14669. .D(\macro_inst|u_ahb2apb|paddr [8]),
  14670. .Cin(),
  14671. .Qin(),
  14672. .Clk(),
  14673. .AsyncReset(),
  14674. .SyncReset(),
  14675. .ShiftData(),
  14676. .SyncLoad(),
  14677. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~3_combout ),
  14678. .Cout(),
  14679. .Q());
  14680. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .coord_x = 12;
  14681. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .coord_y = 1;
  14682. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .coord_z = 0;
  14683. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .mask = 16'hFC22;
  14684. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .modeMux = 1'b0;
  14685. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .FeedbackMux = 1'b0;
  14686. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .ShiftMux = 1'b0;
  14687. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .BypassEn = 1'b0;
  14688. defparam \macro_inst|u_uart[0]|u_regs|Selector9~3 .CarryEnb = 1'b1;
  14689. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~4 (
  14690. .A(\macro_inst|u_uart[0]|u_rx[3]|overrun_error~q ),
  14691. .B(\macro_inst|u_uart[0]|u_rx[2]|overrun_error~q ),
  14692. .C(\macro_inst|u_ahb2apb|paddr [9]),
  14693. .D(\macro_inst|u_uart[0]|u_regs|Selector9~3_combout ),
  14694. .Cin(),
  14695. .Qin(),
  14696. .Clk(),
  14697. .AsyncReset(),
  14698. .SyncReset(),
  14699. .ShiftData(),
  14700. .SyncLoad(),
  14701. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~4_combout ),
  14702. .Cout(),
  14703. .Q());
  14704. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .coord_x = 12;
  14705. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .coord_y = 3;
  14706. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .coord_z = 4;
  14707. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .mask = 16'hAFC0;
  14708. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .modeMux = 1'b0;
  14709. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .FeedbackMux = 1'b0;
  14710. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .ShiftMux = 1'b0;
  14711. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .BypassEn = 1'b0;
  14712. defparam \macro_inst|u_uart[0]|u_regs|Selector9~4 .CarryEnb = 1'b1;
  14713. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~5 (
  14714. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  14715. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14716. .C(\macro_inst|u_uart[0]|u_rx[4]|overrun_error~q ),
  14717. .D(\macro_inst|u_uart[0]|u_regs|rx_reg [3]),
  14718. .Cin(),
  14719. .Qin(),
  14720. .Clk(),
  14721. .AsyncReset(),
  14722. .SyncReset(),
  14723. .ShiftData(),
  14724. .SyncLoad(),
  14725. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~5_combout ),
  14726. .Cout(),
  14727. .Q());
  14728. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .coord_x = 15;
  14729. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .coord_y = 4;
  14730. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .coord_z = 2;
  14731. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .mask = 16'hB9A8;
  14732. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .modeMux = 1'b0;
  14733. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .FeedbackMux = 1'b0;
  14734. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .ShiftMux = 1'b0;
  14735. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .BypassEn = 1'b0;
  14736. defparam \macro_inst|u_uart[0]|u_regs|Selector9~5 .CarryEnb = 1'b1;
  14737. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~6 (
  14738. .A(\macro_inst|u_uart[0]|u_rx[5]|overrun_error~q ),
  14739. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14740. .C(\macro_inst|u_uart[0]|u_regs|Selector9~5_combout ),
  14741. .D(\macro_inst|u_uart[0]|u_regs|Selector9~4_combout ),
  14742. .Cin(),
  14743. .Qin(),
  14744. .Clk(),
  14745. .AsyncReset(),
  14746. .SyncReset(),
  14747. .ShiftData(),
  14748. .SyncLoad(),
  14749. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~6_combout ),
  14750. .Cout(),
  14751. .Q());
  14752. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .coord_x = 15;
  14753. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .coord_y = 4;
  14754. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .coord_z = 10;
  14755. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .mask = 16'hBCB0;
  14756. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .modeMux = 1'b0;
  14757. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .FeedbackMux = 1'b0;
  14758. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .ShiftMux = 1'b0;
  14759. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .BypassEn = 1'b0;
  14760. defparam \macro_inst|u_uart[0]|u_regs|Selector9~6 .CarryEnb = 1'b1;
  14761. alta_slice \macro_inst|u_uart[0]|u_regs|Selector9~8 (
  14762. .A(\macro_inst|u_uart[0]|u_regs|fbrd [3]),
  14763. .B(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  14764. .C(\macro_inst|u_ahb2apb|paddr [3]),
  14765. .D(\macro_inst|u_uart[0]|u_regs|Selector9~7_combout ),
  14766. .Cin(),
  14767. .Qin(),
  14768. .Clk(),
  14769. .AsyncReset(),
  14770. .SyncReset(),
  14771. .ShiftData(),
  14772. .SyncLoad(),
  14773. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~8_combout ),
  14774. .Cout(),
  14775. .Q());
  14776. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .coord_x = 15;
  14777. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .coord_y = 1;
  14778. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .coord_z = 15;
  14779. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .mask = 16'hAFC0;
  14780. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .modeMux = 1'b0;
  14781. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .FeedbackMux = 1'b0;
  14782. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .ShiftMux = 1'b0;
  14783. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .BypassEn = 1'b0;
  14784. defparam \macro_inst|u_uart[0]|u_regs|Selector9~8 .CarryEnb = 1'b1;
  14785. alta_slice \macro_inst|u_uart[0]|u_regs|always2~0 (
  14786. .A(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  14787. .B(\macro_inst|u_ahb2apb|paddr [4]),
  14788. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  14789. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  14790. .Cin(),
  14791. .Qin(),
  14792. .Clk(),
  14793. .AsyncReset(),
  14794. .SyncReset(),
  14795. .ShiftData(),
  14796. .SyncLoad(),
  14797. .LutOut(\macro_inst|u_uart[0]|u_regs|always2~0_combout ),
  14798. .Cout(),
  14799. .Q());
  14800. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .coord_x = 11;
  14801. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .coord_y = 1;
  14802. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .coord_z = 5;
  14803. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .mask = 16'h2000;
  14804. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .modeMux = 1'b0;
  14805. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .FeedbackMux = 1'b0;
  14806. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .ShiftMux = 1'b0;
  14807. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .BypassEn = 1'b0;
  14808. defparam \macro_inst|u_uart[0]|u_regs|always2~0 .CarryEnb = 1'b1;
  14809. alta_slice \macro_inst|u_uart[0]|u_regs|always5~0 (
  14810. .A(\macro_inst|u_ahb2apb|paddr [2]),
  14811. .B(\macro_inst|u_ahb2apb|paddr [3]),
  14812. .C(\macro_inst|u_ahb2apb|paddr [4]),
  14813. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  14814. .Cin(),
  14815. .Qin(),
  14816. .Clk(),
  14817. .AsyncReset(),
  14818. .SyncReset(),
  14819. .ShiftData(),
  14820. .SyncLoad(),
  14821. .LutOut(\macro_inst|u_uart[0]|u_regs|always5~0_combout ),
  14822. .Cout(),
  14823. .Q());
  14824. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .coord_x = 14;
  14825. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .coord_y = 6;
  14826. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .coord_z = 7;
  14827. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .mask = 16'h0800;
  14828. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .modeMux = 1'b0;
  14829. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .FeedbackMux = 1'b0;
  14830. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .ShiftMux = 1'b0;
  14831. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .BypassEn = 1'b0;
  14832. defparam \macro_inst|u_uart[0]|u_regs|always5~0 .CarryEnb = 1'b1;
  14833. alta_slice \macro_inst|u_uart[0]|u_regs|always5~1 (
  14834. .A(vcc),
  14835. .B(vcc),
  14836. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  14837. .D(\macro_inst|u_uart[0]|u_regs|always5~0_combout ),
  14838. .Cin(),
  14839. .Qin(),
  14840. .Clk(),
  14841. .AsyncReset(),
  14842. .SyncReset(),
  14843. .ShiftData(),
  14844. .SyncLoad(),
  14845. .LutOut(\macro_inst|u_uart[0]|u_regs|always5~1_combout ),
  14846. .Cout(),
  14847. .Q());
  14848. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .coord_x = 14;
  14849. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .coord_y = 6;
  14850. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .coord_z = 3;
  14851. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .mask = 16'hF000;
  14852. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .modeMux = 1'b0;
  14853. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .FeedbackMux = 1'b0;
  14854. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .ShiftMux = 1'b0;
  14855. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .BypassEn = 1'b0;
  14856. defparam \macro_inst|u_uart[0]|u_regs|always5~1 .CarryEnb = 1'b1;
  14857. alta_slice \macro_inst|u_uart[0]|u_regs|always6~0 (
  14858. .A(\macro_inst|u_ahb2apb|paddr [4]),
  14859. .B(\macro_inst|u_ahb2apb|paddr [2]),
  14860. .C(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  14861. .D(\macro_inst|u_ahb2apb|paddr [3]),
  14862. .Cin(),
  14863. .Qin(),
  14864. .Clk(),
  14865. .AsyncReset(),
  14866. .SyncReset(),
  14867. .ShiftData(),
  14868. .SyncLoad(),
  14869. .LutOut(\macro_inst|u_uart[0]|u_regs|always6~0_combout ),
  14870. .Cout(),
  14871. .Q());
  14872. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .coord_x = 15;
  14873. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .coord_y = 8;
  14874. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .coord_z = 5;
  14875. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .mask = 16'h0020;
  14876. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .modeMux = 1'b0;
  14877. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .FeedbackMux = 1'b0;
  14878. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .ShiftMux = 1'b0;
  14879. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .BypassEn = 1'b0;
  14880. defparam \macro_inst|u_uart[0]|u_regs|always6~0 .CarryEnb = 1'b1;
  14881. alta_slice \macro_inst|u_uart[0]|u_regs|always7~0 (
  14882. .A(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  14883. .B(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  14884. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  14885. .D(\macro_inst|u_ahb2apb|paddr [4]),
  14886. .Cin(),
  14887. .Qin(),
  14888. .Clk(),
  14889. .AsyncReset(),
  14890. .SyncReset(),
  14891. .ShiftData(),
  14892. .SyncLoad(),
  14893. .LutOut(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  14894. .Cout(),
  14895. .Q());
  14896. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .coord_x = 16;
  14897. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .coord_y = 4;
  14898. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .coord_z = 10;
  14899. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .mask = 16'h8000;
  14900. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .modeMux = 1'b0;
  14901. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .FeedbackMux = 1'b0;
  14902. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .ShiftMux = 1'b0;
  14903. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .BypassEn = 1'b0;
  14904. defparam \macro_inst|u_uart[0]|u_regs|always7~0 .CarryEnb = 1'b1;
  14905. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0] (
  14906. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0_combout ),
  14907. .B(\macro_inst|u_uart[0]|u_regs|rx_dma_en [5]),
  14908. .C(\macro_inst|u_uart[0]|u_regs|rx_dma_en [4]),
  14909. .D(\macro_inst|u_uart[0]|u_regs|Selector12~10_combout ),
  14910. .Cin(),
  14911. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [0]),
  14912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ),
  14913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y4_SIG ),
  14914. .SyncReset(\macro_inst|u_ahb2apb|paddr[7]__SyncReset_X51_Y4_SIG ),
  14915. .ShiftData(),
  14916. .SyncLoad(SyncLoad_X51_Y4_GND),
  14917. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~11_combout ),
  14918. .Cout(),
  14919. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [0]));
  14920. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .coord_x = 16;
  14921. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .coord_y = 3;
  14922. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .coord_z = 15;
  14923. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .mask = 16'hF588;
  14924. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .modeMux = 1'b0;
  14925. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .FeedbackMux = 1'b0;
  14926. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .ShiftMux = 1'b0;
  14927. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .BypassEn = 1'b1;
  14928. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0] .CarryEnb = 1'b1;
  14929. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 (
  14930. .A(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  14931. .B(\macro_inst|u_ahb2apb|paddr [6]),
  14932. .C(\macro_inst|u_uart[1]|u_regs|Equal2~0_combout ),
  14933. .D(\macro_inst|u_ahb2apb|paddr [10]),
  14934. .Cin(),
  14935. .Qin(),
  14936. .Clk(),
  14937. .AsyncReset(),
  14938. .SyncReset(),
  14939. .ShiftData(),
  14940. .SyncLoad(),
  14941. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0_combout ),
  14942. .Cout(),
  14943. .Q());
  14944. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .coord_x = 17;
  14945. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .coord_y = 4;
  14946. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .coord_z = 13;
  14947. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .mask = 16'h8000;
  14948. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .modeMux = 1'b0;
  14949. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .FeedbackMux = 1'b0;
  14950. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .ShiftMux = 1'b0;
  14951. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .BypassEn = 1'b0;
  14952. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0 .CarryEnb = 1'b1;
  14953. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 (
  14954. .A(vcc),
  14955. .B(\macro_inst|u_ahb2apb|paddr [8]),
  14956. .C(\macro_inst|u_ahb2apb|paddr [2]),
  14957. .D(\macro_inst|u_ahb2apb|paddr [10]),
  14958. .Cin(),
  14959. .Qin(),
  14960. .Clk(),
  14961. .AsyncReset(),
  14962. .SyncReset(),
  14963. .ShiftData(),
  14964. .SyncLoad(),
  14965. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  14966. .Cout(),
  14967. .Q());
  14968. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .coord_x = 16;
  14969. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .coord_y = 4;
  14970. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .coord_z = 4;
  14971. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .mask = 16'hC0F0;
  14972. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .modeMux = 1'b0;
  14973. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .FeedbackMux = 1'b0;
  14974. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .ShiftMux = 1'b0;
  14975. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .BypassEn = 1'b0;
  14976. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2 .CarryEnb = 1'b1;
  14977. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 (
  14978. .A(\macro_inst|u_ahb2apb|paddr [5]),
  14979. .B(\macro_inst|u_ahb2apb|paddr [4]),
  14980. .C(\macro_inst|u_ahb2apb|paddr [2]),
  14981. .D(\macro_inst|u_ahb2apb|paddr [3]),
  14982. .Cin(),
  14983. .Qin(),
  14984. .Clk(),
  14985. .AsyncReset(),
  14986. .SyncReset(),
  14987. .ShiftData(),
  14988. .SyncLoad(),
  14989. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ),
  14990. .Cout(),
  14991. .Q());
  14992. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .coord_x = 16;
  14993. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .coord_y = 6;
  14994. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .coord_z = 6;
  14995. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .mask = 16'h0031;
  14996. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .modeMux = 1'b0;
  14997. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .FeedbackMux = 1'b0;
  14998. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .ShiftMux = 1'b0;
  14999. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .BypassEn = 1'b0;
  15000. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3 .CarryEnb = 1'b1;
  15001. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 (
  15002. .A(\macro_inst|u_ahb2apb|paddr [2]),
  15003. .B(\macro_inst|u_ahb2apb|paddr [5]),
  15004. .C(\macro_inst|u_ahb2apb|paddr [3]),
  15005. .D(\macro_inst|u_ahb2apb|paddr [10]),
  15006. .Cin(),
  15007. .Qin(),
  15008. .Clk(),
  15009. .AsyncReset(),
  15010. .SyncReset(),
  15011. .ShiftData(),
  15012. .SyncLoad(),
  15013. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6_combout ),
  15014. .Cout(),
  15015. .Q());
  15016. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .coord_x = 17;
  15017. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .coord_y = 4;
  15018. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .coord_z = 15;
  15019. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .mask = 16'h0010;
  15020. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .modeMux = 1'b0;
  15021. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .FeedbackMux = 1'b0;
  15022. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .ShiftMux = 1'b0;
  15023. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .BypassEn = 1'b0;
  15024. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6 .CarryEnb = 1'b1;
  15025. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 (
  15026. .A(\macro_inst|u_ahb2apb|paddr [8]),
  15027. .B(vcc),
  15028. .C(\macro_inst|u_ahb2apb|paddr [6]),
  15029. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0_combout ),
  15030. .Cin(),
  15031. .Qin(),
  15032. .Clk(),
  15033. .AsyncReset(),
  15034. .SyncReset(),
  15035. .ShiftData(),
  15036. .SyncLoad(),
  15037. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8_combout ),
  15038. .Cout(),
  15039. .Q());
  15040. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .coord_x = 16;
  15041. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .coord_y = 3;
  15042. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .coord_z = 6;
  15043. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .mask = 16'hAAF0;
  15044. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .modeMux = 1'b0;
  15045. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .FeedbackMux = 1'b0;
  15046. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .ShiftMux = 1'b0;
  15047. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .BypassEn = 1'b0;
  15048. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8 .CarryEnb = 1'b1;
  15049. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[10] (
  15050. .A(vcc),
  15051. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  15052. .C(vcc),
  15053. .D(\macro_inst|u_uart[0]|u_regs|Selector2~3_combout ),
  15054. .Cin(),
  15055. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [10]),
  15056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ),
  15057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15058. .SyncReset(),
  15059. .ShiftData(),
  15060. .SyncLoad(),
  15061. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector2~4_combout ),
  15062. .Cout(),
  15063. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [10]));
  15064. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .coord_x = 15;
  15065. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .coord_y = 3;
  15066. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .coord_z = 6;
  15067. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .mask = 16'h3300;
  15068. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .modeMux = 1'b0;
  15069. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .FeedbackMux = 1'b0;
  15070. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .ShiftMux = 1'b0;
  15071. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .BypassEn = 1'b0;
  15072. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[10] .CarryEnb = 1'b1;
  15073. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[11] (
  15074. .A(vcc),
  15075. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  15076. .C(vcc),
  15077. .D(\macro_inst|u_uart[0]|u_regs|Selector1~3_combout ),
  15078. .Cin(),
  15079. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [11]),
  15080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ),
  15081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15082. .SyncReset(),
  15083. .ShiftData(),
  15084. .SyncLoad(),
  15085. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector1~4_combout ),
  15086. .Cout(),
  15087. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [11]));
  15088. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .coord_x = 15;
  15089. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .coord_y = 3;
  15090. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .coord_z = 8;
  15091. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .mask = 16'h3300;
  15092. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .modeMux = 1'b0;
  15093. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .FeedbackMux = 1'b0;
  15094. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .ShiftMux = 1'b0;
  15095. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .BypassEn = 1'b0;
  15096. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[11] .CarryEnb = 1'b1;
  15097. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[12] (
  15098. .A(vcc),
  15099. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  15100. .C(vcc),
  15101. .D(\macro_inst|u_uart[0]|u_regs|Selector0~3_combout ),
  15102. .Cin(),
  15103. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [12]),
  15104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ),
  15105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15106. .SyncReset(),
  15107. .ShiftData(),
  15108. .SyncLoad(),
  15109. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector0~4_combout ),
  15110. .Cout(),
  15111. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [12]));
  15112. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .coord_x = 15;
  15113. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .coord_y = 3;
  15114. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .coord_z = 14;
  15115. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .mask = 16'h3300;
  15116. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .modeMux = 1'b0;
  15117. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .FeedbackMux = 1'b0;
  15118. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .ShiftMux = 1'b0;
  15119. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .BypassEn = 1'b0;
  15120. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[12] .CarryEnb = 1'b1;
  15121. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[13] (
  15122. .A(\macro_inst|u_ahb2apb|paddr [2]),
  15123. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  15124. .C(\macro_inst|u_uart[0]|u_regs|ibrd [13]),
  15125. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  15126. .Cin(),
  15127. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [13]),
  15128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ),
  15129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  15130. .SyncReset(),
  15131. .ShiftData(),
  15132. .SyncLoad(),
  15133. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata~19_combout ),
  15134. .Cout(),
  15135. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [13]));
  15136. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .coord_x = 14;
  15137. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .coord_y = 6;
  15138. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .coord_z = 2;
  15139. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .mask = 16'h8000;
  15140. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .modeMux = 1'b0;
  15141. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .FeedbackMux = 1'b0;
  15142. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .ShiftMux = 1'b0;
  15143. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .BypassEn = 1'b0;
  15144. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[13] .CarryEnb = 1'b1;
  15145. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[14] (
  15146. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  15147. .B(\macro_inst|u_uart[0]|u_regs|ibrd [14]),
  15148. .C(\macro_inst|u_ahb2apb|paddr [2]),
  15149. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  15150. .Cin(),
  15151. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [14]),
  15152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ),
  15153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  15154. .SyncReset(),
  15155. .ShiftData(),
  15156. .SyncLoad(),
  15157. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata~20_combout ),
  15158. .Cout(),
  15159. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [14]));
  15160. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .coord_x = 14;
  15161. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .coord_y = 6;
  15162. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .coord_z = 15;
  15163. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .mask = 16'h8000;
  15164. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .modeMux = 1'b0;
  15165. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .FeedbackMux = 1'b0;
  15166. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .ShiftMux = 1'b0;
  15167. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .BypassEn = 1'b0;
  15168. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[14] .CarryEnb = 1'b1;
  15169. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[15] (
  15170. .A(\macro_inst|u_ahb2apb|paddr [2]),
  15171. .B(\macro_inst|u_uart[0]|u_regs|ibrd [15]),
  15172. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  15173. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  15174. .Cin(),
  15175. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [15]),
  15176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ),
  15177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  15178. .SyncReset(),
  15179. .ShiftData(),
  15180. .SyncLoad(),
  15181. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata~21_combout ),
  15182. .Cout(),
  15183. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [15]));
  15184. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .coord_x = 14;
  15185. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .coord_y = 6;
  15186. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .coord_z = 0;
  15187. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .mask = 16'h8000;
  15188. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .modeMux = 1'b0;
  15189. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .FeedbackMux = 1'b0;
  15190. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .ShiftMux = 1'b0;
  15191. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .BypassEn = 1'b0;
  15192. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[15] .CarryEnb = 1'b1;
  15193. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[1] (
  15194. .A(vcc),
  15195. .B(\macro_inst|u_ahb2apb|paddr [7]),
  15196. .C(\macro_inst|u_ahb2apb|paddr [4]),
  15197. .D(\macro_inst|u_uart[0]|u_regs|Selector11~11_combout ),
  15198. .Cin(),
  15199. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [1]),
  15200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X58_Y4_SIG_SIG ),
  15201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  15202. .SyncReset(),
  15203. .ShiftData(),
  15204. .SyncLoad(),
  15205. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~12_combout ),
  15206. .Cout(),
  15207. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [1]));
  15208. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .coord_x = 17;
  15209. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .coord_y = 4;
  15210. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .coord_z = 9;
  15211. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .mask = 16'h0300;
  15212. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .modeMux = 1'b0;
  15213. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .FeedbackMux = 1'b0;
  15214. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .ShiftMux = 1'b0;
  15215. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .BypassEn = 1'b0;
  15216. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1] .CarryEnb = 1'b1;
  15217. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 (
  15218. .A(\macro_inst|u_ahb2apb|paddr [5]),
  15219. .B(\macro_inst|u_ahb2apb|paddr [6]),
  15220. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~10_combout ),
  15221. .D(\macro_inst|u_ahb2apb|paddr [8]),
  15222. .Cin(),
  15223. .Qin(),
  15224. .Clk(),
  15225. .AsyncReset(),
  15226. .SyncReset(),
  15227. .ShiftData(),
  15228. .SyncLoad(),
  15229. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11_combout ),
  15230. .Cout(),
  15231. .Q());
  15232. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .coord_x = 16;
  15233. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .coord_y = 4;
  15234. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .coord_z = 15;
  15235. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .mask = 16'hDC8C;
  15236. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .modeMux = 1'b0;
  15237. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .FeedbackMux = 1'b0;
  15238. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .ShiftMux = 1'b0;
  15239. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .BypassEn = 1'b0;
  15240. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11 .CarryEnb = 1'b1;
  15241. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 (
  15242. .A(\macro_inst|u_ahb2apb|paddr [5]),
  15243. .B(\macro_inst|u_ahb2apb|paddr [6]),
  15244. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  15245. .D(\macro_inst|u_ahb2apb|paddr [10]),
  15246. .Cin(),
  15247. .Qin(),
  15248. .Clk(),
  15249. .AsyncReset(),
  15250. .SyncReset(),
  15251. .ShiftData(),
  15252. .SyncLoad(),
  15253. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15_combout ),
  15254. .Cout(),
  15255. .Q());
  15256. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .coord_x = 16;
  15257. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .coord_y = 7;
  15258. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .coord_z = 6;
  15259. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .mask = 16'h3373;
  15260. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .modeMux = 1'b0;
  15261. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .FeedbackMux = 1'b0;
  15262. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .ShiftMux = 1'b0;
  15263. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .BypassEn = 1'b0;
  15264. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15 .CarryEnb = 1'b1;
  15265. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 (
  15266. .A(\macro_inst|u_ahb2apb|paddr [5]),
  15267. .B(\macro_inst|u_ahb2apb|paddr [10]),
  15268. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  15269. .D(\macro_inst|u_ahb2apb|paddr [6]),
  15270. .Cin(),
  15271. .Qin(),
  15272. .Clk(),
  15273. .AsyncReset(),
  15274. .SyncReset(),
  15275. .ShiftData(),
  15276. .SyncLoad(),
  15277. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9_combout ),
  15278. .Cout(),
  15279. .Q());
  15280. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .coord_x = 16;
  15281. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .coord_y = 7;
  15282. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .coord_z = 2;
  15283. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .mask = 16'h4000;
  15284. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .modeMux = 1'b0;
  15285. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .FeedbackMux = 1'b0;
  15286. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .ShiftMux = 1'b0;
  15287. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .BypassEn = 1'b0;
  15288. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9 .CarryEnb = 1'b1;
  15289. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[2] (
  15290. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~12_combout ),
  15291. .B(\macro_inst|u_ahb2apb|paddr [4]),
  15292. .C(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  15293. .D(\macro_inst|u_uart[0]|u_regs|Selector10~5_combout ),
  15294. .Cin(),
  15295. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [2]),
  15296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  15297. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  15298. .SyncReset(),
  15299. .ShiftData(),
  15300. .SyncLoad(),
  15301. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector10~6_combout ),
  15302. .Cout(),
  15303. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [2]));
  15304. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .coord_x = 15;
  15305. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .coord_y = 6;
  15306. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .coord_z = 3;
  15307. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .mask = 16'h2000;
  15308. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .modeMux = 1'b0;
  15309. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .FeedbackMux = 1'b0;
  15310. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .ShiftMux = 1'b0;
  15311. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .BypassEn = 1'b0;
  15312. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[2] .CarryEnb = 1'b1;
  15313. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[3] (
  15314. .A(\macro_inst|u_uart[0]|u_regs|status_reg [0]),
  15315. .B(\macro_inst|u_ahb2apb|paddr [4]),
  15316. .C(\macro_inst|u_uart[0]|u_regs|Selector9~10_combout ),
  15317. .D(\macro_inst|u_uart[0]|u_regs|Selector9~8_combout ),
  15318. .Cin(),
  15319. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [3]),
  15320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X61_Y2_SIG_SIG ),
  15321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  15322. .SyncReset(),
  15323. .ShiftData(),
  15324. .SyncLoad(),
  15325. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~9_combout ),
  15326. .Cout(),
  15327. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [3]));
  15328. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .coord_x = 15;
  15329. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .coord_y = 1;
  15330. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .coord_z = 9;
  15331. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .mask = 16'hB080;
  15332. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .modeMux = 1'b0;
  15333. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .FeedbackMux = 1'b0;
  15334. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .ShiftMux = 1'b0;
  15335. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .BypassEn = 1'b0;
  15336. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[3] .CarryEnb = 1'b1;
  15337. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[4] (
  15338. .A(\macro_inst|u_ahb2apb|paddr [6]),
  15339. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ),
  15340. .C(\macro_inst|u_ahb2apb|paddr [7]),
  15341. .D(\macro_inst|u_uart[0]|u_regs|Selector8~11_combout ),
  15342. .Cin(),
  15343. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [4]),
  15344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X61_Y2_SIG_SIG ),
  15345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  15346. .SyncReset(),
  15347. .ShiftData(),
  15348. .SyncLoad(),
  15349. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~12_combout ),
  15350. .Cout(),
  15351. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [4]));
  15352. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .coord_x = 15;
  15353. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .coord_y = 1;
  15354. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .coord_z = 7;
  15355. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .mask = 16'h0100;
  15356. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .modeMux = 1'b0;
  15357. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .FeedbackMux = 1'b0;
  15358. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .ShiftMux = 1'b0;
  15359. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .BypassEn = 1'b0;
  15360. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4] .CarryEnb = 1'b1;
  15361. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 (
  15362. .A(\macro_inst|u_ahb2apb|paddr [3]),
  15363. .B(\macro_inst|u_ahb2apb|paddr [4]),
  15364. .C(\macro_inst|u_ahb2apb|paddr [2]),
  15365. .D(\macro_inst|u_ahb2apb|paddr [5]),
  15366. .Cin(),
  15367. .Qin(),
  15368. .Clk(),
  15369. .AsyncReset(),
  15370. .SyncReset(),
  15371. .ShiftData(),
  15372. .SyncLoad(),
  15373. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ),
  15374. .Cout(),
  15375. .Q());
  15376. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .coord_x = 14;
  15377. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .coord_y = 7;
  15378. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .coord_z = 12;
  15379. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .mask = 16'hE5E6;
  15380. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .modeMux = 1'b0;
  15381. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .FeedbackMux = 1'b0;
  15382. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .ShiftMux = 1'b0;
  15383. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .BypassEn = 1'b0;
  15384. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18 .CarryEnb = 1'b1;
  15385. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[5] (
  15386. .A(\macro_inst|u_uart[0]|u_regs|Selector7~15_combout ),
  15387. .B(\macro_inst|u_uart[0]|u_regs|Selector7~9_combout ),
  15388. .C(\macro_inst|u_uart[0]|u_regs|Selector7~17_combout ),
  15389. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  15390. .Cin(),
  15391. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [5]),
  15392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X56_Y2_SIG_SIG ),
  15393. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
  15394. .SyncReset(),
  15395. .ShiftData(),
  15396. .SyncLoad(),
  15397. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~16_combout ),
  15398. .Cout(),
  15399. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [5]));
  15400. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .coord_x = 12;
  15401. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .coord_y = 1;
  15402. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .coord_z = 15;
  15403. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .mask = 16'hC0A0;
  15404. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .modeMux = 1'b0;
  15405. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .FeedbackMux = 1'b0;
  15406. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .ShiftMux = 1'b0;
  15407. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .BypassEn = 1'b0;
  15408. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[5] .CarryEnb = 1'b1;
  15409. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[6] (
  15410. .A(\macro_inst|u_ahb2apb|paddr [5]),
  15411. .B(\macro_inst|u_uart[0]|u_regs|ibrd [6]),
  15412. .C(\macro_inst|u_uart[0]|u_regs|Selector6~0_combout ),
  15413. .D(\macro_inst|u_uart[0]|u_regs|Selector6~2_combout ),
  15414. .Cin(),
  15415. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [6]),
  15416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y3_SIG_SIG ),
  15417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y3_SIG ),
  15418. .SyncReset(),
  15419. .ShiftData(),
  15420. .SyncLoad(),
  15421. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector6~3_combout ),
  15422. .Cout(),
  15423. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [6]));
  15424. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .coord_x = 14;
  15425. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .coord_y = 6;
  15426. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .coord_z = 6;
  15427. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .mask = 16'hF080;
  15428. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .modeMux = 1'b0;
  15429. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .FeedbackMux = 1'b0;
  15430. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .ShiftMux = 1'b0;
  15431. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .BypassEn = 1'b0;
  15432. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[6] .CarryEnb = 1'b1;
  15433. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[7] (
  15434. .A(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  15435. .B(\macro_inst|u_uart[0]|u_regs|Selector5~8_combout ),
  15436. .C(\macro_inst|u_uart[0]|u_regs|ibrd [7]),
  15437. .D(\macro_inst|u_uart[0]|u_regs|Selector5~9_combout ),
  15438. .Cin(),
  15439. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [7]),
  15440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  15441. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  15442. .SyncReset(),
  15443. .ShiftData(),
  15444. .SyncLoad(),
  15445. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~10_combout ),
  15446. .Cout(),
  15447. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [7]));
  15448. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .coord_x = 15;
  15449. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .coord_y = 6;
  15450. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .coord_z = 7;
  15451. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .mask = 16'h2088;
  15452. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .modeMux = 1'b0;
  15453. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .FeedbackMux = 1'b0;
  15454. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .ShiftMux = 1'b0;
  15455. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .BypassEn = 1'b0;
  15456. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[7] .CarryEnb = 1'b1;
  15457. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[8] (
  15458. .A(vcc),
  15459. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  15460. .C(vcc),
  15461. .D(\macro_inst|u_uart[0]|u_regs|Selector4~3_combout ),
  15462. .Cin(),
  15463. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [8]),
  15464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ),
  15465. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15466. .SyncReset(),
  15467. .ShiftData(),
  15468. .SyncLoad(),
  15469. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector4~4_combout ),
  15470. .Cout(),
  15471. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [8]));
  15472. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .coord_x = 15;
  15473. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .coord_y = 3;
  15474. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .coord_z = 11;
  15475. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .mask = 16'h3300;
  15476. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .modeMux = 1'b0;
  15477. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .FeedbackMux = 1'b0;
  15478. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .ShiftMux = 1'b0;
  15479. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .BypassEn = 1'b0;
  15480. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[8] .CarryEnb = 1'b1;
  15481. alta_slice \macro_inst|u_uart[0]|u_regs|apb_prdata[9] (
  15482. .A(vcc),
  15483. .B(vcc),
  15484. .C(\macro_inst|u_uart[0]|u_regs|Selector3~3_combout ),
  15485. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  15486. .Cin(),
  15487. .Qin(\macro_inst|u_uart[0]|u_regs|apb_prdata [9]),
  15488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|apb_read1~combout_X60_Y2_SIG_SIG ),
  15489. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15490. .SyncReset(),
  15491. .ShiftData(),
  15492. .SyncLoad(),
  15493. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector3~4_combout ),
  15494. .Cout(),
  15495. .Q(\macro_inst|u_uart[0]|u_regs|apb_prdata [9]));
  15496. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .coord_x = 15;
  15497. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .coord_y = 3;
  15498. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .coord_z = 0;
  15499. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .mask = 16'h00F0;
  15500. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .modeMux = 1'b0;
  15501. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .FeedbackMux = 1'b0;
  15502. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .ShiftMux = 1'b0;
  15503. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .BypassEn = 1'b0;
  15504. defparam \macro_inst|u_uart[0]|u_regs|apb_prdata[9] .CarryEnb = 1'b1;
  15505. alta_slice \macro_inst|u_uart[0]|u_regs|apb_pready (
  15506. .A(\macro_inst|u_ahb2apb|pwrite~q ),
  15507. .B(\macro_inst|u_ahb2apb|penable~q ),
  15508. .C(\macro_inst|u_ahb2apb|psel~q ),
  15509. .D(\macro_inst|u_ahb2apb|paddr [12]),
  15510. .Cin(),
  15511. .Qin(\macro_inst|u_uart[0]|u_regs|apb_pready~q ),
  15512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  15513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  15514. .SyncReset(),
  15515. .ShiftData(),
  15516. .SyncLoad(),
  15517. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  15518. .Cout(),
  15519. .Q(\macro_inst|u_uart[0]|u_regs|apb_pready~q ));
  15520. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .coord_x = 16;
  15521. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .coord_y = 2;
  15522. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .coord_z = 13;
  15523. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .mask = 16'h0010;
  15524. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .modeMux = 1'b0;
  15525. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .FeedbackMux = 1'b0;
  15526. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .ShiftMux = 1'b0;
  15527. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .BypassEn = 1'b0;
  15528. defparam \macro_inst|u_uart[0]|u_regs|apb_pready .CarryEnb = 1'b1;
  15529. alta_slice \macro_inst|u_uart[0]|u_regs|apb_write~0 (
  15530. .A(\macro_inst|u_ahb2apb|psel~q ),
  15531. .B(\macro_inst|u_ahb2apb|pwrite~q ),
  15532. .C(\macro_inst|u_ahb2apb|paddr [12]),
  15533. .D(\macro_inst|u_ahb2apb|penable~q ),
  15534. .Cin(),
  15535. .Qin(),
  15536. .Clk(),
  15537. .AsyncReset(),
  15538. .SyncReset(),
  15539. .ShiftData(),
  15540. .SyncLoad(),
  15541. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  15542. .Cout(),
  15543. .Q());
  15544. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .coord_x = 16;
  15545. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .coord_y = 4;
  15546. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .coord_z = 11;
  15547. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .mask = 16'h0008;
  15548. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .modeMux = 1'b0;
  15549. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .FeedbackMux = 1'b0;
  15550. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .ShiftMux = 1'b0;
  15551. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .BypassEn = 1'b0;
  15552. defparam \macro_inst|u_uart[0]|u_regs|apb_write~0 .CarryEnb = 1'b1;
  15553. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[0] (
  15554. .A(\macro_inst|u_uart[0]|u_regs|break_error_ie [1]),
  15555. .B(\macro_inst|u_ahb2apb|paddr [9]),
  15556. .C(\rv32.mem_ahb_hwdata[9] ),
  15557. .D(\macro_inst|u_ahb2apb|paddr [8]),
  15558. .Cin(),
  15559. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [0]),
  15560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  15561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  15562. .SyncReset(SyncReset_X52_Y2_GND),
  15563. .ShiftData(),
  15564. .SyncLoad(SyncLoad_X52_Y2_VCC),
  15565. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector3~0_combout ),
  15566. .Cout(),
  15567. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [0]));
  15568. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .coord_x = 9;
  15569. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .coord_y = 3;
  15570. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .coord_z = 11;
  15571. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .mask = 16'hEE30;
  15572. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .modeMux = 1'b0;
  15573. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .FeedbackMux = 1'b1;
  15574. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .ShiftMux = 1'b0;
  15575. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .BypassEn = 1'b1;
  15576. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[0] .CarryEnb = 1'b1;
  15577. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[1] (
  15578. .A(),
  15579. .B(),
  15580. .C(vcc),
  15581. .D(\rv32.mem_ahb_hwdata[9] ),
  15582. .Cin(),
  15583. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [1]),
  15584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X48_Y4_SIG_SIG ),
  15585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y4_SIG ),
  15586. .SyncReset(),
  15587. .ShiftData(),
  15588. .SyncLoad(),
  15589. .LutOut(\macro_inst|u_uart[0]|u_regs|break_error_ie[1]__feeder__LutOut ),
  15590. .Cout(),
  15591. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [1]));
  15592. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .coord_x = 1;
  15593. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .coord_y = 3;
  15594. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .coord_z = 15;
  15595. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .mask = 16'hFF00;
  15596. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .modeMux = 1'b1;
  15597. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .FeedbackMux = 1'b0;
  15598. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .ShiftMux = 1'b0;
  15599. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .BypassEn = 1'b0;
  15600. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[1] .CarryEnb = 1'b1;
  15601. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[2] (
  15602. .A(),
  15603. .B(),
  15604. .C(vcc),
  15605. .D(\rv32.mem_ahb_hwdata[9] ),
  15606. .Cin(),
  15607. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [2]),
  15608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  15609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  15610. .SyncReset(),
  15611. .ShiftData(),
  15612. .SyncLoad(),
  15613. .LutOut(\macro_inst|u_uart[0]|u_regs|break_error_ie[2]__feeder__LutOut ),
  15614. .Cout(),
  15615. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [2]));
  15616. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .coord_x = 14;
  15617. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .coord_y = 5;
  15618. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .coord_z = 12;
  15619. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .mask = 16'hFF00;
  15620. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .modeMux = 1'b1;
  15621. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .FeedbackMux = 1'b0;
  15622. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .ShiftMux = 1'b0;
  15623. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .BypassEn = 1'b0;
  15624. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[2] .CarryEnb = 1'b1;
  15625. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[3] (
  15626. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15627. .B(\macro_inst|u_uart[0]|u_regs|break_error_ie [2]),
  15628. .C(\rv32.mem_ahb_hwdata[9] ),
  15629. .D(\macro_inst|u_uart[0]|u_regs|Selector3~0_combout ),
  15630. .Cin(),
  15631. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [3]),
  15632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  15633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  15634. .SyncReset(SyncReset_X53_Y2_GND),
  15635. .ShiftData(),
  15636. .SyncLoad(SyncLoad_X53_Y2_VCC),
  15637. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector3~1_combout ),
  15638. .Cout(),
  15639. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [3]));
  15640. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .coord_x = 11;
  15641. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .coord_y = 3;
  15642. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .coord_z = 2;
  15643. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .mask = 16'hF588;
  15644. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .modeMux = 1'b0;
  15645. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .FeedbackMux = 1'b1;
  15646. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .ShiftMux = 1'b0;
  15647. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .BypassEn = 1'b1;
  15648. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[3] .CarryEnb = 1'b1;
  15649. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[4] (
  15650. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  15651. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  15652. .C(\rv32.mem_ahb_hwdata[9] ),
  15653. .D(\macro_inst|u_ahb2apb|paddr [8]),
  15654. .Cin(),
  15655. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [4]),
  15656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  15657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  15658. .SyncReset(SyncReset_X57_Y3_GND),
  15659. .ShiftData(),
  15660. .SyncLoad(SyncLoad_X57_Y3_VCC),
  15661. .LutOut(\macro_inst|u_uart[0]|u_regs|status_reg[2]~1_combout ),
  15662. .Cout(),
  15663. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [4]));
  15664. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .coord_x = 16;
  15665. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .coord_y = 1;
  15666. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .coord_z = 8;
  15667. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .mask = 16'hCCAA;
  15668. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .modeMux = 1'b0;
  15669. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .FeedbackMux = 1'b0;
  15670. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .ShiftMux = 1'b0;
  15671. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .BypassEn = 1'b1;
  15672. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[4] .CarryEnb = 1'b1;
  15673. alta_slice \macro_inst|u_uart[0]|u_regs|break_error_ie[5] (
  15674. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  15675. .B(\macro_inst|u_uart[0]|u_regs|Selector3~1_combout ),
  15676. .C(\rv32.mem_ahb_hwdata[9] ),
  15677. .D(\macro_inst|u_uart[0]|u_regs|Selector3~2_combout ),
  15678. .Cin(),
  15679. .Qin(\macro_inst|u_uart[0]|u_regs|break_error_ie [5]),
  15680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  15681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  15682. .SyncReset(SyncReset_X60_Y2_GND),
  15683. .ShiftData(),
  15684. .SyncLoad(SyncLoad_X60_Y2_VCC),
  15685. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector3~3_combout ),
  15686. .Cout(),
  15687. .Q(\macro_inst|u_uart[0]|u_regs|break_error_ie [5]));
  15688. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .coord_x = 15;
  15689. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .coord_y = 3;
  15690. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .coord_z = 10;
  15691. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .mask = 16'hF588;
  15692. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .modeMux = 1'b0;
  15693. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .FeedbackMux = 1'b1;
  15694. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .ShiftMux = 1'b0;
  15695. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .BypassEn = 1'b1;
  15696. defparam \macro_inst|u_uart[0]|u_regs|break_error_ie[5] .CarryEnb = 1'b1;
  15697. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 (
  15698. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15699. .B(\macro_inst|u_ahb2apb|paddr [8]),
  15700. .C(\macro_inst|u_ahb2apb|paddr [10]),
  15701. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15702. .Cin(),
  15703. .Qin(),
  15704. .Clk(),
  15705. .AsyncReset(),
  15706. .SyncReset(),
  15707. .ShiftData(),
  15708. .SyncLoad(),
  15709. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  15710. .Cout(),
  15711. .Q());
  15712. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .coord_x = 8;
  15713. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .coord_y = 3;
  15714. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .coord_z = 3;
  15715. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .mask = 16'hFEFF;
  15716. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .modeMux = 1'b0;
  15717. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .FeedbackMux = 1'b0;
  15718. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .ShiftMux = 1'b0;
  15719. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .BypassEn = 1'b0;
  15720. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[0]~12 .CarryEnb = 1'b1;
  15721. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 (
  15722. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15723. .B(\macro_inst|u_ahb2apb|paddr [8]),
  15724. .C(\macro_inst|u_ahb2apb|paddr [10]),
  15725. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15726. .Cin(),
  15727. .Qin(),
  15728. .Clk(),
  15729. .AsyncReset(),
  15730. .SyncReset(),
  15731. .ShiftData(),
  15732. .SyncLoad(),
  15733. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  15734. .Cout(),
  15735. .Q());
  15736. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .coord_x = 8;
  15737. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .coord_y = 3;
  15738. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .coord_z = 7;
  15739. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .mask = 16'h0400;
  15740. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .modeMux = 1'b0;
  15741. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .FeedbackMux = 1'b0;
  15742. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .ShiftMux = 1'b0;
  15743. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .BypassEn = 1'b0;
  15744. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[1]~13 .CarryEnb = 1'b1;
  15745. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 (
  15746. .A(\macro_inst|u_ahb2apb|paddr [10]),
  15747. .B(\macro_inst|u_ahb2apb|paddr [9]),
  15748. .C(\macro_inst|u_ahb2apb|paddr [8]),
  15749. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15750. .Cin(),
  15751. .Qin(),
  15752. .Clk(),
  15753. .AsyncReset(),
  15754. .SyncReset(),
  15755. .ShiftData(),
  15756. .SyncLoad(),
  15757. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  15758. .Cout(),
  15759. .Q());
  15760. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .coord_x = 10;
  15761. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .coord_y = 3;
  15762. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .coord_z = 1;
  15763. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .mask = 16'hFBFF;
  15764. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .modeMux = 1'b0;
  15765. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .FeedbackMux = 1'b0;
  15766. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .ShiftMux = 1'b0;
  15767. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .BypassEn = 1'b0;
  15768. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[2]~14 .CarryEnb = 1'b1;
  15769. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 (
  15770. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15771. .B(\macro_inst|u_ahb2apb|paddr [10]),
  15772. .C(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15773. .D(\macro_inst|u_ahb2apb|paddr [8]),
  15774. .Cin(),
  15775. .Qin(),
  15776. .Clk(),
  15777. .AsyncReset(),
  15778. .SyncReset(),
  15779. .ShiftData(),
  15780. .SyncLoad(),
  15781. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  15782. .Cout(),
  15783. .Q());
  15784. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .coord_x = 12;
  15785. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .coord_y = 3;
  15786. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .coord_z = 13;
  15787. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .mask = 16'h2000;
  15788. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .modeMux = 1'b0;
  15789. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .FeedbackMux = 1'b0;
  15790. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .ShiftMux = 1'b0;
  15791. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .BypassEn = 1'b0;
  15792. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[3]~11 .CarryEnb = 1'b1;
  15793. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 (
  15794. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15795. .B(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15796. .C(\macro_inst|u_ahb2apb|paddr [8]),
  15797. .D(\macro_inst|u_ahb2apb|paddr [10]),
  15798. .Cin(),
  15799. .Qin(),
  15800. .Clk(),
  15801. .AsyncReset(),
  15802. .SyncReset(),
  15803. .ShiftData(),
  15804. .SyncLoad(),
  15805. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  15806. .Cout(),
  15807. .Q());
  15808. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .coord_x = 17;
  15809. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .coord_y = 4;
  15810. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .coord_z = 12;
  15811. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .mask = 16'hFBFF;
  15812. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .modeMux = 1'b0;
  15813. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .FeedbackMux = 1'b0;
  15814. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .ShiftMux = 1'b0;
  15815. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .BypassEn = 1'b0;
  15816. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[4]~15 .CarryEnb = 1'b1;
  15817. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 (
  15818. .A(\macro_inst|u_ahb2apb|paddr [9]),
  15819. .B(\macro_inst|u_ahb2apb|paddr [10]),
  15820. .C(\macro_inst|u_ahb2apb|paddr [8]),
  15821. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15822. .Cin(),
  15823. .Qin(),
  15824. .Clk(),
  15825. .AsyncReset(),
  15826. .SyncReset(),
  15827. .ShiftData(),
  15828. .SyncLoad(),
  15829. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  15830. .Cout(),
  15831. .Q());
  15832. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .coord_x = 17;
  15833. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .coord_y = 4;
  15834. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .coord_z = 4;
  15835. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .mask = 16'h4000;
  15836. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .modeMux = 1'b0;
  15837. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .FeedbackMux = 1'b0;
  15838. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .ShiftMux = 1'b0;
  15839. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .BypassEn = 1'b0;
  15840. defparam \macro_inst|u_uart[0]|u_regs|clear_flags[5]~16 .CarryEnb = 1'b1;
  15841. alta_slice \macro_inst|u_uart[0]|u_regs|clear_flags~10 (
  15842. .A(\macro_inst|u_ahb2apb|paddr [7]),
  15843. .B(\macro_inst|u_ahb2apb|paddr [5]),
  15844. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  15845. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ),
  15846. .Cin(),
  15847. .Qin(),
  15848. .Clk(),
  15849. .AsyncReset(),
  15850. .SyncReset(),
  15851. .ShiftData(),
  15852. .SyncLoad(),
  15853. .LutOut(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  15854. .Cout(),
  15855. .Q());
  15856. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .coord_x = 17;
  15857. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .coord_y = 4;
  15858. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .coord_z = 1;
  15859. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .mask = 16'h1000;
  15860. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .modeMux = 1'b0;
  15861. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .FeedbackMux = 1'b0;
  15862. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .ShiftMux = 1'b0;
  15863. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .BypassEn = 1'b0;
  15864. defparam \macro_inst|u_uart[0]|u_regs|clear_flags~10 .CarryEnb = 1'b1;
  15865. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[0] (
  15866. .A(vcc),
  15867. .B(\macro_inst|u_uart[0]|u_regs|tx_write [1]),
  15868. .C(\rv32.mem_ahb_hwdata[0] ),
  15869. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  15870. .Cin(),
  15871. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [0]),
  15872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X61_Y5_SIG_SIG ),
  15873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  15874. .SyncReset(SyncReset_X61_Y5_GND),
  15875. .ShiftData(),
  15876. .SyncLoad(SyncLoad_X61_Y5_VCC),
  15877. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout ),
  15878. .Cout(),
  15879. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [0]));
  15880. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .coord_x = 15;
  15881. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .coord_y = 8;
  15882. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .coord_z = 7;
  15883. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .mask = 16'h00CC;
  15884. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .modeMux = 1'b0;
  15885. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .FeedbackMux = 1'b0;
  15886. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .ShiftMux = 1'b0;
  15887. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .BypassEn = 1'b1;
  15888. defparam \macro_inst|u_uart[0]|u_regs|fbrd[0] .CarryEnb = 1'b1;
  15889. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[1] (
  15890. .A(),
  15891. .B(),
  15892. .C(vcc),
  15893. .D(\rv32.mem_ahb_hwdata[1] ),
  15894. .Cin(),
  15895. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [1]),
  15896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ),
  15897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  15898. .SyncReset(),
  15899. .ShiftData(),
  15900. .SyncLoad(),
  15901. .LutOut(\macro_inst|u_uart[0]|u_regs|fbrd[1]__feeder__LutOut ),
  15902. .Cout(),
  15903. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [1]));
  15904. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .coord_x = 11;
  15905. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .coord_y = 1;
  15906. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .coord_z = 3;
  15907. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .mask = 16'hFF00;
  15908. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .modeMux = 1'b1;
  15909. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .FeedbackMux = 1'b0;
  15910. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .ShiftMux = 1'b0;
  15911. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .BypassEn = 1'b0;
  15912. defparam \macro_inst|u_uart[0]|u_regs|fbrd[1] .CarryEnb = 1'b1;
  15913. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[2] (
  15914. .A(),
  15915. .B(),
  15916. .C(vcc),
  15917. .D(\rv32.mem_ahb_hwdata[2] ),
  15918. .Cin(),
  15919. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [2]),
  15920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ),
  15921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  15922. .SyncReset(),
  15923. .ShiftData(),
  15924. .SyncLoad(),
  15925. .LutOut(\macro_inst|u_uart[0]|u_regs|fbrd[2]__feeder__LutOut ),
  15926. .Cout(),
  15927. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [2]));
  15928. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .coord_x = 11;
  15929. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .coord_y = 1;
  15930. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .coord_z = 0;
  15931. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .mask = 16'hFF00;
  15932. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .modeMux = 1'b1;
  15933. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .FeedbackMux = 1'b0;
  15934. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .ShiftMux = 1'b0;
  15935. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .BypassEn = 1'b0;
  15936. defparam \macro_inst|u_uart[0]|u_regs|fbrd[2] .CarryEnb = 1'b1;
  15937. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[3] (
  15938. .A(\macro_inst|u_uart[0]|u_regs|fbrd [3]),
  15939. .B(\macro_inst|u_uart[0]|u_baud|f_cnt [2]),
  15940. .C(\rv32.mem_ahb_hwdata[3] ),
  15941. .D(vcc),
  15942. .Cin(\macro_inst|u_uart[0]|u_baud|LessThan0~5_cout ),
  15943. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [3]),
  15944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ),
  15945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  15946. .SyncReset(SyncReset_X60_Y1_GND),
  15947. .ShiftData(),
  15948. .SyncLoad(SyncLoad_X60_Y1_VCC),
  15949. .LutOut(),
  15950. .Cout(\macro_inst|u_uart[0]|u_baud|LessThan0~7_cout ),
  15951. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [3]));
  15952. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .coord_x = 11;
  15953. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .coord_y = 1;
  15954. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .coord_z = 11;
  15955. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .mask = 16'h004D;
  15956. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .modeMux = 1'b1;
  15957. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .FeedbackMux = 1'b0;
  15958. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .ShiftMux = 1'b0;
  15959. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .BypassEn = 1'b1;
  15960. defparam \macro_inst|u_uart[0]|u_regs|fbrd[3] .CarryEnb = 1'b0;
  15961. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[4] (
  15962. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  15963. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  15964. .C(\rv32.mem_ahb_hwdata[4] ),
  15965. .D(vcc),
  15966. .Cin(),
  15967. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [4]),
  15968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ),
  15969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  15970. .SyncReset(SyncReset_X60_Y1_GND),
  15971. .ShiftData(),
  15972. .SyncLoad(SyncLoad_X60_Y1_VCC),
  15973. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector5~3_combout ),
  15974. .Cout(),
  15975. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [4]));
  15976. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .coord_x = 11;
  15977. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .coord_y = 1;
  15978. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .coord_z = 7;
  15979. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .mask = 16'h2222;
  15980. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .modeMux = 1'b0;
  15981. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .FeedbackMux = 1'b0;
  15982. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .ShiftMux = 1'b0;
  15983. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .BypassEn = 1'b1;
  15984. defparam \macro_inst|u_uart[0]|u_regs|fbrd[4] .CarryEnb = 1'b1;
  15985. alta_slice \macro_inst|u_uart[0]|u_regs|fbrd[5] (
  15986. .A(vcc),
  15987. .B(\SIM_IO[3]~input_o ),
  15988. .C(\rv32.mem_ahb_hwdata[5] ),
  15989. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  15990. .Cin(),
  15991. .Qin(\macro_inst|u_uart[0]|u_regs|fbrd [5]),
  15992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always2~0_combout_X60_Y1_SIG_SIG ),
  15993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  15994. .SyncReset(SyncReset_X60_Y1_GND),
  15995. .ShiftData(),
  15996. .SyncLoad(SyncLoad_X60_Y1_VCC),
  15997. .LutOut(\macro_inst|uart_rxd [3]),
  15998. .Cout(),
  15999. .Q(\macro_inst|u_uart[0]|u_regs|fbrd [5]));
  16000. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .coord_x = 11;
  16001. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .coord_y = 1;
  16002. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .coord_z = 15;
  16003. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .mask = 16'h0033;
  16004. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .modeMux = 1'b0;
  16005. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .FeedbackMux = 1'b0;
  16006. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .ShiftMux = 1'b0;
  16007. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .BypassEn = 1'b1;
  16008. defparam \macro_inst|u_uart[0]|u_regs|fbrd[5] .CarryEnb = 1'b1;
  16009. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] (
  16010. .A(\macro_inst|u_uart[0]|u_regs|framing_error_ie [1]),
  16011. .B(\macro_inst|u_ahb2apb|paddr [8]),
  16012. .C(\rv32.mem_ahb_hwdata[7] ),
  16013. .D(\macro_inst|u_ahb2apb|paddr [9]),
  16014. .Cin(),
  16015. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [0]),
  16016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  16017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  16018. .SyncReset(SyncReset_X52_Y2_GND),
  16019. .ShiftData(),
  16020. .SyncLoad(SyncLoad_X52_Y2_VCC),
  16021. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~5_combout ),
  16022. .Cout(),
  16023. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [0]));
  16024. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .coord_x = 9;
  16025. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .coord_y = 3;
  16026. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .coord_z = 7;
  16027. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .mask = 16'hCCB8;
  16028. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .modeMux = 1'b0;
  16029. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .FeedbackMux = 1'b1;
  16030. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .ShiftMux = 1'b0;
  16031. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .BypassEn = 1'b1;
  16032. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[0] .CarryEnb = 1'b1;
  16033. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] (
  16034. .A(\rv32.gpio8_io_out_en[2] ),
  16035. .B(\rv32.gpio8_io_out_en[3] ),
  16036. .C(\rv32.mem_ahb_hwdata[7] ),
  16037. .D(\rv32.gpio8_io_out_data[3] ),
  16038. .Cin(),
  16039. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [1]),
  16040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X50_Y4_SIG_SIG ),
  16041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y4_SIG ),
  16042. .SyncReset(SyncReset_X50_Y4_GND),
  16043. .ShiftData(),
  16044. .SyncLoad(SyncLoad_X50_Y4_VCC),
  16045. .LutOut(\macro_inst|SIM_IO_13~1_combout ),
  16046. .Cout(),
  16047. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [1]));
  16048. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .coord_x = 8;
  16049. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .coord_y = 4;
  16050. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .coord_z = 5;
  16051. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .mask = 16'h8800;
  16052. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .modeMux = 1'b0;
  16053. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .FeedbackMux = 1'b0;
  16054. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .ShiftMux = 1'b0;
  16055. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .BypassEn = 1'b1;
  16056. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[1] .CarryEnb = 1'b1;
  16057. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] (
  16058. .A(),
  16059. .B(),
  16060. .C(vcc),
  16061. .D(\rv32.mem_ahb_hwdata[7] ),
  16062. .Cin(),
  16063. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [2]),
  16064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  16065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  16066. .SyncReset(),
  16067. .ShiftData(),
  16068. .SyncLoad(),
  16069. .LutOut(\macro_inst|u_uart[0]|u_regs|framing_error_ie[2]__feeder__LutOut ),
  16070. .Cout(),
  16071. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [2]));
  16072. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .coord_x = 14;
  16073. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .coord_y = 5;
  16074. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .coord_z = 5;
  16075. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .mask = 16'hFF00;
  16076. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .modeMux = 1'b1;
  16077. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .FeedbackMux = 1'b0;
  16078. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .ShiftMux = 1'b0;
  16079. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .BypassEn = 1'b0;
  16080. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[2] .CarryEnb = 1'b1;
  16081. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] (
  16082. .A(\macro_inst|u_ahb2apb|paddr [9]),
  16083. .B(\macro_inst|u_uart[0]|u_regs|framing_error_ie [2]),
  16084. .C(\rv32.mem_ahb_hwdata[7] ),
  16085. .D(\macro_inst|u_uart[0]|u_regs|Selector5~5_combout ),
  16086. .Cin(),
  16087. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [3]),
  16088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  16089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  16090. .SyncReset(SyncReset_X53_Y2_GND),
  16091. .ShiftData(),
  16092. .SyncLoad(SyncLoad_X53_Y2_VCC),
  16093. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~6_combout ),
  16094. .Cout(),
  16095. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [3]));
  16096. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .coord_x = 11;
  16097. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .coord_y = 3;
  16098. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .coord_z = 14;
  16099. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .mask = 16'hF588;
  16100. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .modeMux = 1'b0;
  16101. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .FeedbackMux = 1'b1;
  16102. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .ShiftMux = 1'b0;
  16103. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .BypassEn = 1'b1;
  16104. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[3] .CarryEnb = 1'b1;
  16105. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] (
  16106. .A(\macro_inst|u_uart[0]|u_regs|status_reg [4]),
  16107. .B(\macro_inst|u_ahb2apb|paddr [10]),
  16108. .C(\rv32.mem_ahb_hwdata[7] ),
  16109. .D(\macro_inst|u_ahb2apb|paddr [5]),
  16110. .Cin(),
  16111. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [4]),
  16112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  16113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  16114. .SyncReset(SyncReset_X57_Y3_GND),
  16115. .ShiftData(),
  16116. .SyncLoad(SyncLoad_X57_Y3_VCC),
  16117. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~11_combout ),
  16118. .Cout(),
  16119. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [4]));
  16120. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .coord_x = 16;
  16121. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .coord_y = 1;
  16122. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .coord_z = 14;
  16123. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .mask = 16'hE2AA;
  16124. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .modeMux = 1'b0;
  16125. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .FeedbackMux = 1'b1;
  16126. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .ShiftMux = 1'b0;
  16127. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .BypassEn = 1'b1;
  16128. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[4] .CarryEnb = 1'b1;
  16129. alta_slice \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] (
  16130. .A(\macro_inst|u_ahb2apb|paddr [10]),
  16131. .B(\macro_inst|u_ahb2apb|paddr [5]),
  16132. .C(\rv32.mem_ahb_hwdata[7] ),
  16133. .D(\macro_inst|u_uart[0]|u_regs|Selector5~6_combout ),
  16134. .Cin(),
  16135. .Qin(\macro_inst|u_uart[0]|u_regs|framing_error_ie [5]),
  16136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  16137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  16138. .SyncReset(SyncReset_X60_Y2_GND),
  16139. .ShiftData(),
  16140. .SyncLoad(SyncLoad_X60_Y2_VCC),
  16141. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector5~12_combout ),
  16142. .Cout(),
  16143. .Q(\macro_inst|u_uart[0]|u_regs|framing_error_ie [5]));
  16144. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .coord_x = 15;
  16145. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .coord_y = 3;
  16146. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .coord_z = 15;
  16147. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .mask = 16'hF780;
  16148. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .modeMux = 1'b0;
  16149. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .FeedbackMux = 1'b1;
  16150. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .ShiftMux = 1'b0;
  16151. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .BypassEn = 1'b1;
  16152. defparam \macro_inst|u_uart[0]|u_regs|framing_error_ie[5] .CarryEnb = 1'b1;
  16153. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[0] (
  16154. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ),
  16155. .B(\macro_inst|u_uart[0]|u_regs|Selector12~8_combout ),
  16156. .C(\rv32.mem_ahb_hwdata[0] ),
  16157. .D(\macro_inst|u_uart[0]|u_regs|Selector12~5_combout ),
  16158. .Cin(),
  16159. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [0]),
  16160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  16161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  16162. .SyncReset(SyncReset_X59_Y5_GND),
  16163. .ShiftData(),
  16164. .SyncLoad(SyncLoad_X59_Y5_VCC),
  16165. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~9_combout ),
  16166. .Cout(),
  16167. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [0]));
  16168. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .coord_x = 16;
  16169. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .coord_y = 6;
  16170. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .coord_z = 4;
  16171. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .mask = 16'hEC64;
  16172. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .modeMux = 1'b0;
  16173. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .FeedbackMux = 1'b1;
  16174. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .ShiftMux = 1'b0;
  16175. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .BypassEn = 1'b1;
  16176. defparam \macro_inst|u_uart[0]|u_regs|ibrd[0] .CarryEnb = 1'b1;
  16177. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[10] (
  16178. .A(\macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ),
  16179. .B(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  16180. .C(\rv32.mem_ahb_hwdata[10] ),
  16181. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  16182. .Cin(),
  16183. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [10]),
  16184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ),
  16185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
  16186. .SyncReset(SyncReset_X58_Y2_GND),
  16187. .ShiftData(),
  16188. .SyncLoad(SyncLoad_X58_Y2_VCC),
  16189. .LutOut(\macro_inst|u_uart[1]|u_regs|always1~0_combout ),
  16190. .Cout(),
  16191. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [10]));
  16192. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .coord_x = 15;
  16193. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .coord_y = 4;
  16194. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .coord_z = 5;
  16195. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .mask = 16'h8800;
  16196. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .modeMux = 1'b0;
  16197. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .FeedbackMux = 1'b0;
  16198. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .ShiftMux = 1'b0;
  16199. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .BypassEn = 1'b1;
  16200. defparam \macro_inst|u_uart[0]|u_regs|ibrd[10] .CarryEnb = 1'b1;
  16201. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[11] (
  16202. .A(\macro_inst|u_ahb2apb|paddr [5]),
  16203. .B(\macro_inst|u_ahb2apb|paddr [7]),
  16204. .C(\rv32.mem_ahb_hwdata[11] ),
  16205. .D(\macro_inst|u_ahb2apb|paddr [6]),
  16206. .Cin(),
  16207. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [11]),
  16208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ),
  16209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  16210. .SyncReset(SyncReset_X59_Y3_GND),
  16211. .ShiftData(),
  16212. .SyncLoad(SyncLoad_X59_Y3_VCC),
  16213. .LutOut(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  16214. .Cout(),
  16215. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [11]));
  16216. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .coord_x = 16;
  16217. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .coord_y = 4;
  16218. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .coord_z = 6;
  16219. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .mask = 16'h0022;
  16220. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .modeMux = 1'b0;
  16221. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .FeedbackMux = 1'b0;
  16222. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .ShiftMux = 1'b0;
  16223. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .BypassEn = 1'b1;
  16224. defparam \macro_inst|u_uart[0]|u_regs|ibrd[11] .CarryEnb = 1'b1;
  16225. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[12] (
  16226. .A(),
  16227. .B(),
  16228. .C(vcc),
  16229. .D(\rv32.mem_ahb_hwdata[12] ),
  16230. .Cin(),
  16231. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [12]),
  16232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ),
  16233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  16234. .SyncReset(),
  16235. .ShiftData(),
  16236. .SyncLoad(),
  16237. .LutOut(\macro_inst|u_uart[0]|u_regs|ibrd[12]__feeder__LutOut ),
  16238. .Cout(),
  16239. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [12]));
  16240. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .coord_x = 15;
  16241. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .coord_y = 1;
  16242. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .coord_z = 4;
  16243. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .mask = 16'hFF00;
  16244. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .modeMux = 1'b1;
  16245. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .FeedbackMux = 1'b0;
  16246. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .ShiftMux = 1'b0;
  16247. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .BypassEn = 1'b0;
  16248. defparam \macro_inst|u_uart[0]|u_regs|ibrd[12] .CarryEnb = 1'b1;
  16249. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[13] (
  16250. .A(\macro_inst|u_ahb2apb|paddr [5]),
  16251. .B(\macro_inst|u_uart[1]|u_regs|fbrd [0]),
  16252. .C(\rv32.mem_ahb_hwdata[13] ),
  16253. .D(\macro_inst|u_ahb2apb|paddr [2]),
  16254. .Cin(),
  16255. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [13]),
  16256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  16257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  16258. .SyncReset(SyncReset_X59_Y5_GND),
  16259. .ShiftData(),
  16260. .SyncLoad(SyncLoad_X59_Y5_VCC),
  16261. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~7_combout ),
  16262. .Cout(),
  16263. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [13]));
  16264. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .coord_x = 16;
  16265. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .coord_y = 6;
  16266. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .coord_z = 13;
  16267. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .mask = 16'h0088;
  16268. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .modeMux = 1'b0;
  16269. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .FeedbackMux = 1'b0;
  16270. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .ShiftMux = 1'b0;
  16271. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .BypassEn = 1'b1;
  16272. defparam \macro_inst|u_uart[0]|u_regs|ibrd[13] .CarryEnb = 1'b1;
  16273. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[14] (
  16274. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11_combout ),
  16275. .B(\macro_inst|u_uart[1]|u_regs|Selector11~11_combout ),
  16276. .C(\rv32.mem_ahb_hwdata[14] ),
  16277. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~15_combout ),
  16278. .Cin(),
  16279. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [14]),
  16280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ),
  16281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
  16282. .SyncReset(SyncReset_X59_Y4_GND),
  16283. .ShiftData(),
  16284. .SyncLoad(SyncLoad_X59_Y4_VCC),
  16285. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~12_combout ),
  16286. .Cout(),
  16287. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [14]));
  16288. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .coord_x = 16;
  16289. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .coord_y = 5;
  16290. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .coord_z = 11;
  16291. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .mask = 16'h8855;
  16292. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .modeMux = 1'b0;
  16293. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .FeedbackMux = 1'b0;
  16294. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .ShiftMux = 1'b0;
  16295. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .BypassEn = 1'b1;
  16296. defparam \macro_inst|u_uart[0]|u_regs|ibrd[14] .CarryEnb = 1'b1;
  16297. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[15] (
  16298. .A(\macro_inst|u_ahb2apb|paddr [3]),
  16299. .B(vcc),
  16300. .C(\rv32.mem_ahb_hwdata[15] ),
  16301. .D(\macro_inst|u_ahb2apb|paddr [2]),
  16302. .Cin(),
  16303. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [15]),
  16304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ),
  16305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  16306. .SyncReset(SyncReset_X59_Y3_GND),
  16307. .ShiftData(),
  16308. .SyncLoad(SyncLoad_X59_Y3_VCC),
  16309. .LutOut(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  16310. .Cout(),
  16311. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [15]));
  16312. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .coord_x = 16;
  16313. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .coord_y = 4;
  16314. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .coord_z = 3;
  16315. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .mask = 16'h00AA;
  16316. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .modeMux = 1'b0;
  16317. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .FeedbackMux = 1'b0;
  16318. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .ShiftMux = 1'b0;
  16319. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .BypassEn = 1'b1;
  16320. defparam \macro_inst|u_uart[0]|u_regs|ibrd[15] .CarryEnb = 1'b1;
  16321. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[1] (
  16322. .A(\macro_inst|u_uart[0]|u_regs|Selector11~7_combout ),
  16323. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  16324. .C(\rv32.mem_ahb_hwdata[1] ),
  16325. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  16326. .Cin(),
  16327. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [1]),
  16328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ),
  16329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
  16330. .SyncReset(SyncReset_X58_Y2_GND),
  16331. .ShiftData(),
  16332. .SyncLoad(SyncLoad_X58_Y2_VCC),
  16333. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~8_combout ),
  16334. .Cout(),
  16335. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [1]));
  16336. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .coord_x = 15;
  16337. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .coord_y = 4;
  16338. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .coord_z = 1;
  16339. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .mask = 16'hC0BB;
  16340. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .modeMux = 1'b0;
  16341. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .FeedbackMux = 1'b1;
  16342. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .ShiftMux = 1'b0;
  16343. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .BypassEn = 1'b1;
  16344. defparam \macro_inst|u_uart[0]|u_regs|ibrd[1] .CarryEnb = 1'b1;
  16345. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[2] (
  16346. .A(\macro_inst|u_ahb2apb|paddr [5]),
  16347. .B(vcc),
  16348. .C(\rv32.mem_ahb_hwdata[2] ),
  16349. .D(\macro_inst|u_ahb2apb|paddr [10]),
  16350. .Cin(),
  16351. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [2]),
  16352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ),
  16353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
  16354. .SyncReset(SyncReset_X58_Y2_GND),
  16355. .ShiftData(),
  16356. .SyncLoad(SyncLoad_X58_Y2_VCC),
  16357. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  16358. .Cout(),
  16359. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [2]));
  16360. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .coord_x = 15;
  16361. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .coord_y = 4;
  16362. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .coord_z = 4;
  16363. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .mask = 16'hAA00;
  16364. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .modeMux = 1'b0;
  16365. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .FeedbackMux = 1'b0;
  16366. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .ShiftMux = 1'b0;
  16367. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .BypassEn = 1'b1;
  16368. defparam \macro_inst|u_uart[0]|u_regs|ibrd[2] .CarryEnb = 1'b1;
  16369. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[3] (
  16370. .A(\macro_inst|u_uart[0]|u_regs|Selector9~6_combout ),
  16371. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  16372. .C(\rv32.mem_ahb_hwdata[3] ),
  16373. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  16374. .Cin(),
  16375. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [3]),
  16376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ),
  16377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
  16378. .SyncReset(SyncReset_X58_Y2_GND),
  16379. .ShiftData(),
  16380. .SyncLoad(SyncLoad_X58_Y2_VCC),
  16381. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~7_combout ),
  16382. .Cout(),
  16383. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [3]));
  16384. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .coord_x = 15;
  16385. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .coord_y = 4;
  16386. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .coord_z = 11;
  16387. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .mask = 16'hC0BB;
  16388. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .modeMux = 1'b0;
  16389. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .FeedbackMux = 1'b1;
  16390. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .ShiftMux = 1'b0;
  16391. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .BypassEn = 1'b1;
  16392. defparam \macro_inst|u_uart[0]|u_regs|ibrd[3] .CarryEnb = 1'b1;
  16393. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[4] (
  16394. .A(\macro_inst|u_ahb2apb|paddr [7]),
  16395. .B(\macro_inst|u_uart[0]|u_regs|Selector9~2_combout ),
  16396. .C(\rv32.mem_ahb_hwdata[4] ),
  16397. .D(\macro_inst|u_ahb2apb|paddr [6]),
  16398. .Cin(),
  16399. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [4]),
  16400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ),
  16401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  16402. .SyncReset(SyncReset_X61_Y2_GND),
  16403. .ShiftData(),
  16404. .SyncLoad(SyncLoad_X61_Y2_VCC),
  16405. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector9~10_combout ),
  16406. .Cout(),
  16407. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [4]));
  16408. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .coord_x = 15;
  16409. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .coord_y = 1;
  16410. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .coord_z = 8;
  16411. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .mask = 16'h0044;
  16412. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .modeMux = 1'b0;
  16413. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .FeedbackMux = 1'b0;
  16414. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .ShiftMux = 1'b0;
  16415. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .BypassEn = 1'b1;
  16416. defparam \macro_inst|u_uart[0]|u_regs|ibrd[4] .CarryEnb = 1'b1;
  16417. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[5] (
  16418. .A(),
  16419. .B(),
  16420. .C(vcc),
  16421. .D(\rv32.mem_ahb_hwdata[5] ),
  16422. .Cin(),
  16423. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [5]),
  16424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ),
  16425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  16426. .SyncReset(),
  16427. .ShiftData(),
  16428. .SyncLoad(),
  16429. .LutOut(\macro_inst|u_uart[0]|u_regs|ibrd[5]__feeder__LutOut ),
  16430. .Cout(),
  16431. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [5]));
  16432. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .coord_x = 15;
  16433. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .coord_y = 1;
  16434. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .coord_z = 1;
  16435. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .mask = 16'hFF00;
  16436. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .modeMux = 1'b1;
  16437. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .FeedbackMux = 1'b0;
  16438. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .ShiftMux = 1'b0;
  16439. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .BypassEn = 1'b0;
  16440. defparam \macro_inst|u_uart[0]|u_regs|ibrd[5] .CarryEnb = 1'b1;
  16441. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[6] (
  16442. .A(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  16443. .B(\macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ),
  16444. .C(\rv32.mem_ahb_hwdata[6] ),
  16445. .D(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  16446. .Cin(),
  16447. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [6]),
  16448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ),
  16449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  16450. .SyncReset(SyncReset_X59_Y3_GND),
  16451. .ShiftData(),
  16452. .SyncLoad(SyncLoad_X59_Y3_VCC),
  16453. .LutOut(\macro_inst|u_uart[0]|u_regs|always1~0_combout ),
  16454. .Cout(),
  16455. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [6]));
  16456. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .coord_x = 16;
  16457. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .coord_y = 4;
  16458. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .coord_z = 5;
  16459. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .mask = 16'h8800;
  16460. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .modeMux = 1'b0;
  16461. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .FeedbackMux = 1'b0;
  16462. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .ShiftMux = 1'b0;
  16463. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .BypassEn = 1'b1;
  16464. defparam \macro_inst|u_uart[0]|u_regs|ibrd[6] .CarryEnb = 1'b1;
  16465. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[7] (
  16466. .A(),
  16467. .B(),
  16468. .C(vcc),
  16469. .D(\rv32.mem_ahb_hwdata[7] ),
  16470. .Cin(),
  16471. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [7]),
  16472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ),
  16473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  16474. .SyncReset(),
  16475. .ShiftData(),
  16476. .SyncLoad(),
  16477. .LutOut(\macro_inst|u_uart[0]|u_regs|ibrd[7]__feeder__LutOut ),
  16478. .Cout(),
  16479. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [7]));
  16480. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .coord_x = 15;
  16481. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .coord_y = 1;
  16482. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .coord_z = 2;
  16483. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .mask = 16'hFF00;
  16484. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .modeMux = 1'b1;
  16485. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .FeedbackMux = 1'b0;
  16486. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .ShiftMux = 1'b0;
  16487. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .BypassEn = 1'b0;
  16488. defparam \macro_inst|u_uart[0]|u_regs|ibrd[7] .CarryEnb = 1'b1;
  16489. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[8] (
  16490. .A(\macro_inst|u_ahb2apb|paddr [9]),
  16491. .B(\macro_inst|u_ahb2apb|paddr [8]),
  16492. .C(\rv32.mem_ahb_hwdata[8] ),
  16493. .D(\macro_inst|u_ahb2apb|paddr [10]),
  16494. .Cin(),
  16495. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [8]),
  16496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X59_Y3_SIG_SIG ),
  16497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y3_SIG ),
  16498. .SyncReset(SyncReset_X59_Y3_GND),
  16499. .ShiftData(),
  16500. .SyncLoad(SyncLoad_X59_Y3_VCC),
  16501. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  16502. .Cout(),
  16503. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [8]));
  16504. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .coord_x = 16;
  16505. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .coord_y = 4;
  16506. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .coord_z = 12;
  16507. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .mask = 16'h0044;
  16508. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .modeMux = 1'b0;
  16509. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .FeedbackMux = 1'b0;
  16510. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .ShiftMux = 1'b0;
  16511. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .BypassEn = 1'b1;
  16512. defparam \macro_inst|u_uart[0]|u_regs|ibrd[8] .CarryEnb = 1'b1;
  16513. alta_slice \macro_inst|u_uart[0]|u_regs|ibrd[9] (
  16514. .A(),
  16515. .B(),
  16516. .C(vcc),
  16517. .D(\rv32.mem_ahb_hwdata[9] ),
  16518. .Cin(),
  16519. .Qin(\macro_inst|u_uart[0]|u_regs|ibrd [9]),
  16520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always1~0_combout_X61_Y2_SIG_SIG ),
  16521. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y2_SIG ),
  16522. .SyncReset(),
  16523. .ShiftData(),
  16524. .SyncLoad(),
  16525. .LutOut(\macro_inst|u_uart[0]|u_regs|ibrd[9]__feeder__LutOut ),
  16526. .Cout(),
  16527. .Q(\macro_inst|u_uart[0]|u_regs|ibrd [9]));
  16528. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .coord_x = 15;
  16529. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .coord_y = 1;
  16530. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .coord_z = 6;
  16531. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .mask = 16'hFF00;
  16532. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .modeMux = 1'b1;
  16533. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .FeedbackMux = 1'b0;
  16534. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .ShiftMux = 1'b0;
  16535. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .BypassEn = 1'b0;
  16536. defparam \macro_inst|u_uart[0]|u_regs|ibrd[9] .CarryEnb = 1'b1;
  16537. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[0] (
  16538. .A(\macro_inst|u_uart[0]|u_regs|interrupts~0_combout ),
  16539. .B(\macro_inst|u_uart[0]|u_regs|interrupts~1_combout ),
  16540. .C(\macro_inst|u_uart[0]|u_regs|interrupts~3_combout ),
  16541. .D(\macro_inst|u_uart[0]|u_regs|interrupts~2_combout ),
  16542. .Cin(),
  16543. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [0]),
  16544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ),
  16545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  16546. .SyncReset(),
  16547. .ShiftData(),
  16548. .SyncLoad(),
  16549. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~4_combout ),
  16550. .Cout(),
  16551. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [0]));
  16552. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .coord_x = 9;
  16553. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .coord_y = 3;
  16554. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .coord_z = 12;
  16555. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .mask = 16'hFFFE;
  16556. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .modeMux = 1'b0;
  16557. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .FeedbackMux = 1'b0;
  16558. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .ShiftMux = 1'b0;
  16559. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .BypassEn = 1'b0;
  16560. defparam \macro_inst|u_uart[0]|u_regs|interrupts[0] .CarryEnb = 1'b1;
  16561. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[1] (
  16562. .A(\macro_inst|u_uart[0]|u_regs|interrupts~8_combout ),
  16563. .B(\macro_inst|u_uart[0]|u_regs|interrupts~6_combout ),
  16564. .C(\macro_inst|u_uart[0]|u_regs|interrupts~7_combout ),
  16565. .D(\macro_inst|u_uart[0]|u_regs|interrupts~5_combout ),
  16566. .Cin(),
  16567. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [1]),
  16568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y4_SIG_VCC ),
  16569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y4_SIG ),
  16570. .SyncReset(),
  16571. .ShiftData(),
  16572. .SyncLoad(),
  16573. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~9_combout ),
  16574. .Cout(),
  16575. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [1]));
  16576. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .coord_x = 9;
  16577. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .coord_y = 4;
  16578. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .coord_z = 9;
  16579. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .mask = 16'hFFFE;
  16580. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .modeMux = 1'b0;
  16581. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .FeedbackMux = 1'b0;
  16582. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .ShiftMux = 1'b0;
  16583. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .BypassEn = 1'b0;
  16584. defparam \macro_inst|u_uart[0]|u_regs|interrupts[1] .CarryEnb = 1'b1;
  16585. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[2] (
  16586. .A(\macro_inst|u_uart[0]|u_regs|interrupts~12_combout ),
  16587. .B(\macro_inst|u_uart[0]|u_regs|interrupts~13_combout ),
  16588. .C(\macro_inst|u_uart[0]|u_regs|interrupts~11_combout ),
  16589. .D(\macro_inst|u_uart[0]|u_regs|interrupts~10_combout ),
  16590. .Cin(),
  16591. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [2]),
  16592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  16593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  16594. .SyncReset(),
  16595. .ShiftData(),
  16596. .SyncLoad(),
  16597. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~14_combout ),
  16598. .Cout(),
  16599. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [2]));
  16600. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .coord_x = 14;
  16601. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .coord_y = 4;
  16602. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .coord_z = 15;
  16603. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .mask = 16'hFFFE;
  16604. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .modeMux = 1'b0;
  16605. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .FeedbackMux = 1'b0;
  16606. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .ShiftMux = 1'b0;
  16607. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .BypassEn = 1'b0;
  16608. defparam \macro_inst|u_uart[0]|u_regs|interrupts[2] .CarryEnb = 1'b1;
  16609. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[3] (
  16610. .A(\macro_inst|u_uart[0]|u_regs|interrupts~18_combout ),
  16611. .B(\macro_inst|u_uart[0]|u_regs|interrupts~17_combout ),
  16612. .C(\macro_inst|u_uart[0]|u_regs|interrupts~15_combout ),
  16613. .D(\macro_inst|u_uart[0]|u_regs|interrupts~16_combout ),
  16614. .Cin(),
  16615. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [3]),
  16616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  16617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  16618. .SyncReset(),
  16619. .ShiftData(),
  16620. .SyncLoad(),
  16621. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~19_combout ),
  16622. .Cout(),
  16623. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [3]));
  16624. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .coord_x = 11;
  16625. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .coord_y = 3;
  16626. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .coord_z = 12;
  16627. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .mask = 16'hFFFE;
  16628. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .modeMux = 1'b0;
  16629. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .FeedbackMux = 1'b0;
  16630. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .ShiftMux = 1'b0;
  16631. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .BypassEn = 1'b0;
  16632. defparam \macro_inst|u_uart[0]|u_regs|interrupts[3] .CarryEnb = 1'b1;
  16633. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[4] (
  16634. .A(\macro_inst|u_uart[0]|u_regs|interrupts~22_combout ),
  16635. .B(\macro_inst|u_uart[0]|u_regs|interrupts~23_combout ),
  16636. .C(\macro_inst|u_uart[0]|u_regs|interrupts~21_combout ),
  16637. .D(\macro_inst|u_uart[0]|u_regs|interrupts~20_combout ),
  16638. .Cin(),
  16639. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [4]),
  16640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  16641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  16642. .SyncReset(),
  16643. .ShiftData(),
  16644. .SyncLoad(),
  16645. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~24_combout ),
  16646. .Cout(),
  16647. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [4]));
  16648. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .coord_x = 16;
  16649. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .coord_y = 1;
  16650. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .coord_z = 10;
  16651. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .mask = 16'hFFFE;
  16652. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .modeMux = 1'b0;
  16653. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .FeedbackMux = 1'b0;
  16654. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .ShiftMux = 1'b0;
  16655. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .BypassEn = 1'b0;
  16656. defparam \macro_inst|u_uart[0]|u_regs|interrupts[4] .CarryEnb = 1'b1;
  16657. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts[5] (
  16658. .A(\macro_inst|u_uart[0]|u_regs|interrupts~26_combout ),
  16659. .B(\macro_inst|u_uart[0]|u_regs|interrupts~27_combout ),
  16660. .C(\macro_inst|u_uart[0]|u_regs|interrupts~25_combout ),
  16661. .D(\macro_inst|u_uart[0]|u_regs|interrupts~28_combout ),
  16662. .Cin(),
  16663. .Qin(\macro_inst|u_uart[0]|u_regs|interrupts [5]),
  16664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ),
  16665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  16666. .SyncReset(),
  16667. .ShiftData(),
  16668. .SyncLoad(),
  16669. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~29_combout ),
  16670. .Cout(),
  16671. .Q(\macro_inst|u_uart[0]|u_regs|interrupts [5]));
  16672. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .coord_x = 18;
  16673. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .coord_y = 2;
  16674. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .coord_z = 7;
  16675. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .mask = 16'hFFFE;
  16676. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .modeMux = 1'b0;
  16677. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .FeedbackMux = 1'b0;
  16678. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .ShiftMux = 1'b0;
  16679. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .BypassEn = 1'b0;
  16680. defparam \macro_inst|u_uart[0]|u_regs|interrupts[5] .CarryEnb = 1'b1;
  16681. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~1 (
  16682. .A(\macro_inst|u_uart[0]|u_rx[0]|parity_error~q ),
  16683. .B(\macro_inst|u_uart[0]|u_rx[0]|framing_error~q ),
  16684. .C(\macro_inst|u_uart[0]|u_regs|parity_error_ie [0]),
  16685. .D(\macro_inst|u_uart[0]|u_regs|framing_error_ie [0]),
  16686. .Cin(),
  16687. .Qin(),
  16688. .Clk(),
  16689. .AsyncReset(),
  16690. .SyncReset(),
  16691. .ShiftData(),
  16692. .SyncLoad(),
  16693. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~1_combout ),
  16694. .Cout(),
  16695. .Q());
  16696. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .coord_x = 8;
  16697. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .coord_y = 3;
  16698. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .coord_z = 14;
  16699. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .mask = 16'hECA0;
  16700. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .modeMux = 1'b0;
  16701. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .FeedbackMux = 1'b0;
  16702. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .ShiftMux = 1'b0;
  16703. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .BypassEn = 1'b0;
  16704. defparam \macro_inst|u_uart[0]|u_regs|interrupts~1 .CarryEnb = 1'b1;
  16705. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~10 (
  16706. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [2]),
  16707. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  16708. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  16709. .D(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [2]),
  16710. .Cin(),
  16711. .Qin(),
  16712. .Clk(),
  16713. .AsyncReset(),
  16714. .SyncReset(),
  16715. .ShiftData(),
  16716. .SyncLoad(),
  16717. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~10_combout ),
  16718. .Cout(),
  16719. .Q());
  16720. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .coord_x = 14;
  16721. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .coord_y = 5;
  16722. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .coord_z = 10;
  16723. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .mask = 16'hB3A0;
  16724. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .modeMux = 1'b0;
  16725. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .FeedbackMux = 1'b0;
  16726. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .ShiftMux = 1'b0;
  16727. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .BypassEn = 1'b0;
  16728. defparam \macro_inst|u_uart[0]|u_regs|interrupts~10 .CarryEnb = 1'b1;
  16729. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~11 (
  16730. .A(\macro_inst|u_uart[0]|u_rx[2]|parity_error~q ),
  16731. .B(\macro_inst|u_uart[0]|u_regs|parity_error_ie [2]),
  16732. .C(\macro_inst|u_uart[0]|u_rx[2]|framing_error~q ),
  16733. .D(\macro_inst|u_uart[0]|u_regs|framing_error_ie [2]),
  16734. .Cin(),
  16735. .Qin(),
  16736. .Clk(),
  16737. .AsyncReset(),
  16738. .SyncReset(),
  16739. .ShiftData(),
  16740. .SyncLoad(),
  16741. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~11_combout ),
  16742. .Cout(),
  16743. .Q());
  16744. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .coord_x = 14;
  16745. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .coord_y = 5;
  16746. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .coord_z = 7;
  16747. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .mask = 16'hF888;
  16748. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .modeMux = 1'b0;
  16749. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .FeedbackMux = 1'b0;
  16750. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .ShiftMux = 1'b0;
  16751. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .BypassEn = 1'b0;
  16752. defparam \macro_inst|u_uart[0]|u_regs|interrupts~11 .CarryEnb = 1'b1;
  16753. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~12 (
  16754. .A(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [2]),
  16755. .B(\macro_inst|u_uart[0]|u_rx[2]|overrun_error~q ),
  16756. .C(\macro_inst|u_uart[0]|u_regs|break_error_ie [2]),
  16757. .D(\macro_inst|u_uart[0]|u_rx[2]|break_error~q ),
  16758. .Cin(),
  16759. .Qin(),
  16760. .Clk(),
  16761. .AsyncReset(),
  16762. .SyncReset(),
  16763. .ShiftData(),
  16764. .SyncLoad(),
  16765. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~12_combout ),
  16766. .Cout(),
  16767. .Q());
  16768. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .coord_x = 14;
  16769. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .coord_y = 5;
  16770. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .coord_z = 0;
  16771. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .mask = 16'hF888;
  16772. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .modeMux = 1'b0;
  16773. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .FeedbackMux = 1'b0;
  16774. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .ShiftMux = 1'b0;
  16775. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .BypassEn = 1'b0;
  16776. defparam \macro_inst|u_uart[0]|u_regs|interrupts~12 .CarryEnb = 1'b1;
  16777. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~15 (
  16778. .A(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [3]),
  16779. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [3]),
  16780. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  16781. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  16782. .Cin(),
  16783. .Qin(),
  16784. .Clk(),
  16785. .AsyncReset(),
  16786. .SyncReset(),
  16787. .ShiftData(),
  16788. .SyncLoad(),
  16789. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~15_combout ),
  16790. .Cout(),
  16791. .Q());
  16792. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .coord_x = 11;
  16793. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .coord_y = 3;
  16794. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .coord_z = 8;
  16795. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .mask = 16'hCE0A;
  16796. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .modeMux = 1'b0;
  16797. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .FeedbackMux = 1'b0;
  16798. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .ShiftMux = 1'b0;
  16799. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .BypassEn = 1'b0;
  16800. defparam \macro_inst|u_uart[0]|u_regs|interrupts~15 .CarryEnb = 1'b1;
  16801. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~16 (
  16802. .A(\macro_inst|u_uart[0]|u_rx[3]|framing_error~q ),
  16803. .B(\macro_inst|u_uart[0]|u_rx[3]|parity_error~q ),
  16804. .C(\macro_inst|u_uart[0]|u_regs|parity_error_ie [3]),
  16805. .D(\macro_inst|u_uart[0]|u_regs|framing_error_ie [3]),
  16806. .Cin(),
  16807. .Qin(),
  16808. .Clk(),
  16809. .AsyncReset(),
  16810. .SyncReset(),
  16811. .ShiftData(),
  16812. .SyncLoad(),
  16813. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~16_combout ),
  16814. .Cout(),
  16815. .Q());
  16816. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .coord_x = 14;
  16817. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .coord_y = 5;
  16818. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .coord_z = 14;
  16819. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .mask = 16'hEAC0;
  16820. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .modeMux = 1'b0;
  16821. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .FeedbackMux = 1'b0;
  16822. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .ShiftMux = 1'b0;
  16823. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .BypassEn = 1'b0;
  16824. defparam \macro_inst|u_uart[0]|u_regs|interrupts~16 .CarryEnb = 1'b1;
  16825. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~20 (
  16826. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  16827. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [4]),
  16828. .C(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [4]),
  16829. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  16830. .Cin(),
  16831. .Qin(),
  16832. .Clk(),
  16833. .AsyncReset(),
  16834. .SyncReset(),
  16835. .ShiftData(),
  16836. .SyncLoad(),
  16837. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~20_combout ),
  16838. .Cout(),
  16839. .Q());
  16840. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .coord_x = 16;
  16841. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .coord_y = 1;
  16842. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .coord_z = 1;
  16843. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .mask = 16'hDC50;
  16844. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .modeMux = 1'b0;
  16845. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .FeedbackMux = 1'b0;
  16846. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .ShiftMux = 1'b0;
  16847. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .BypassEn = 1'b0;
  16848. defparam \macro_inst|u_uart[0]|u_regs|interrupts~20 .CarryEnb = 1'b1;
  16849. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~22 (
  16850. .A(\macro_inst|u_uart[0]|u_regs|break_error_ie [4]),
  16851. .B(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [4]),
  16852. .C(\macro_inst|u_uart[0]|u_rx[4]|break_error~q ),
  16853. .D(\macro_inst|u_uart[0]|u_rx[4]|overrun_error~q ),
  16854. .Cin(),
  16855. .Qin(),
  16856. .Clk(),
  16857. .AsyncReset(),
  16858. .SyncReset(),
  16859. .ShiftData(),
  16860. .SyncLoad(),
  16861. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~22_combout ),
  16862. .Cout(),
  16863. .Q());
  16864. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .coord_x = 15;
  16865. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .coord_y = 1;
  16866. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .coord_z = 11;
  16867. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .mask = 16'hECA0;
  16868. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .modeMux = 1'b0;
  16869. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .FeedbackMux = 1'b0;
  16870. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .ShiftMux = 1'b0;
  16871. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .BypassEn = 1'b0;
  16872. defparam \macro_inst|u_uart[0]|u_regs|interrupts~22 .CarryEnb = 1'b1;
  16873. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~26 (
  16874. .A(\macro_inst|u_uart[0]|u_regs|framing_error_ie [5]),
  16875. .B(\macro_inst|u_uart[0]|u_rx[5]|framing_error~q ),
  16876. .C(\macro_inst|u_uart[0]|u_regs|parity_error_ie [5]),
  16877. .D(\macro_inst|u_uart[0]|u_rx[5]|parity_error~q ),
  16878. .Cin(),
  16879. .Qin(),
  16880. .Clk(),
  16881. .AsyncReset(),
  16882. .SyncReset(),
  16883. .ShiftData(),
  16884. .SyncLoad(),
  16885. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~26_combout ),
  16886. .Cout(),
  16887. .Q());
  16888. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .coord_x = 15;
  16889. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .coord_y = 5;
  16890. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .coord_z = 10;
  16891. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .mask = 16'hF888;
  16892. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .modeMux = 1'b0;
  16893. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .FeedbackMux = 1'b0;
  16894. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .ShiftMux = 1'b0;
  16895. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .BypassEn = 1'b0;
  16896. defparam \macro_inst|u_uart[0]|u_regs|interrupts~26 .CarryEnb = 1'b1;
  16897. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~27 (
  16898. .A(\macro_inst|u_uart[0]|u_regs|break_error_ie [5]),
  16899. .B(\macro_inst|u_uart[0]|u_rx[5]|break_error~q ),
  16900. .C(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [5]),
  16901. .D(\macro_inst|u_uart[0]|u_rx[5]|overrun_error~q ),
  16902. .Cin(),
  16903. .Qin(),
  16904. .Clk(),
  16905. .AsyncReset(),
  16906. .SyncReset(),
  16907. .ShiftData(),
  16908. .SyncLoad(),
  16909. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~27_combout ),
  16910. .Cout(),
  16911. .Q());
  16912. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .coord_x = 15;
  16913. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .coord_y = 5;
  16914. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .coord_z = 0;
  16915. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .mask = 16'hF888;
  16916. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .modeMux = 1'b0;
  16917. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .FeedbackMux = 1'b0;
  16918. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .ShiftMux = 1'b0;
  16919. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .BypassEn = 1'b0;
  16920. defparam \macro_inst|u_uart[0]|u_regs|interrupts~27 .CarryEnb = 1'b1;
  16921. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~28 (
  16922. .A(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [5]),
  16923. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_complete~q ),
  16924. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_idle~q ),
  16925. .D(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [5]),
  16926. .Cin(),
  16927. .Qin(),
  16928. .Clk(),
  16929. .AsyncReset(),
  16930. .SyncReset(),
  16931. .ShiftData(),
  16932. .SyncLoad(),
  16933. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~28_combout ),
  16934. .Cout(),
  16935. .Q());
  16936. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .coord_x = 12;
  16937. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .coord_y = 1;
  16938. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .coord_z = 5;
  16939. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .mask = 16'hF888;
  16940. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .modeMux = 1'b0;
  16941. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .FeedbackMux = 1'b0;
  16942. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .ShiftMux = 1'b0;
  16943. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .BypassEn = 1'b0;
  16944. defparam \macro_inst|u_uart[0]|u_regs|interrupts~28 .CarryEnb = 1'b1;
  16945. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~6 (
  16946. .A(\macro_inst|u_uart[0]|u_regs|parity_error_ie [1]),
  16947. .B(\macro_inst|u_uart[0]|u_rx[1]|framing_error~q ),
  16948. .C(\macro_inst|u_uart[0]|u_regs|framing_error_ie [1]),
  16949. .D(\macro_inst|u_uart[0]|u_rx[1]|parity_error~q ),
  16950. .Cin(),
  16951. .Qin(),
  16952. .Clk(),
  16953. .AsyncReset(),
  16954. .SyncReset(),
  16955. .ShiftData(),
  16956. .SyncLoad(),
  16957. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~6_combout ),
  16958. .Cout(),
  16959. .Q());
  16960. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .coord_x = 7;
  16961. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .coord_y = 4;
  16962. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .coord_z = 4;
  16963. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .mask = 16'hEAC0;
  16964. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .modeMux = 1'b0;
  16965. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .FeedbackMux = 1'b0;
  16966. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .ShiftMux = 1'b0;
  16967. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .BypassEn = 1'b0;
  16968. defparam \macro_inst|u_uart[0]|u_regs|interrupts~6 .CarryEnb = 1'b1;
  16969. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~7 (
  16970. .A(\macro_inst|u_uart[0]|u_rx[1]|break_error~q ),
  16971. .B(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [1]),
  16972. .C(\macro_inst|u_uart[0]|u_regs|break_error_ie [1]),
  16973. .D(\macro_inst|u_uart[0]|u_rx[1]|overrun_error~q ),
  16974. .Cin(),
  16975. .Qin(),
  16976. .Clk(),
  16977. .AsyncReset(),
  16978. .SyncReset(),
  16979. .ShiftData(),
  16980. .SyncLoad(),
  16981. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~7_combout ),
  16982. .Cout(),
  16983. .Q());
  16984. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .coord_x = 9;
  16985. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .coord_y = 4;
  16986. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .coord_z = 8;
  16987. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .mask = 16'hECA0;
  16988. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .modeMux = 1'b0;
  16989. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .FeedbackMux = 1'b0;
  16990. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .ShiftMux = 1'b0;
  16991. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .BypassEn = 1'b0;
  16992. defparam \macro_inst|u_uart[0]|u_regs|interrupts~7 .CarryEnb = 1'b1;
  16993. alta_slice \macro_inst|u_uart[0]|u_regs|interrupts~8 (
  16994. .A(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [1]),
  16995. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_complete~q ),
  16996. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_idle~q ),
  16997. .D(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [1]),
  16998. .Cin(),
  16999. .Qin(),
  17000. .Clk(),
  17001. .AsyncReset(),
  17002. .SyncReset(),
  17003. .ShiftData(),
  17004. .SyncLoad(),
  17005. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~8_combout ),
  17006. .Cout(),
  17007. .Q());
  17008. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .coord_x = 9;
  17009. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .coord_y = 4;
  17010. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .coord_z = 12;
  17011. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .mask = 16'hECA0;
  17012. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .modeMux = 1'b0;
  17013. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .FeedbackMux = 1'b0;
  17014. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .ShiftMux = 1'b0;
  17015. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .BypassEn = 1'b0;
  17016. defparam \macro_inst|u_uart[0]|u_regs|interrupts~8 .CarryEnb = 1'b1;
  17017. alta_slice \macro_inst|u_uart[0]|u_regs|lcr_eps (
  17018. .A(vcc),
  17019. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  17020. .C(\rv32.mem_ahb_hwdata[2] ),
  17021. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ),
  17022. .Cin(),
  17023. .Qin(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  17024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ),
  17025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  17026. .SyncReset(SyncReset_X59_Y1_GND),
  17027. .ShiftData(),
  17028. .SyncLoad(SyncLoad_X59_Y1_VCC),
  17029. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector3~0_combout ),
  17030. .Cout(),
  17031. .Q(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ));
  17032. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .coord_x = 9;
  17033. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .coord_y = 1;
  17034. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .coord_z = 13;
  17035. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .mask = 16'h3300;
  17036. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .modeMux = 1'b0;
  17037. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .FeedbackMux = 1'b0;
  17038. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .ShiftMux = 1'b0;
  17039. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .BypassEn = 1'b1;
  17040. defparam \macro_inst|u_uart[0]|u_regs|lcr_eps .CarryEnb = 1'b1;
  17041. alta_slice \macro_inst|u_uart[0]|u_regs|lcr_pen (
  17042. .A(vcc),
  17043. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  17044. .C(\rv32.mem_ahb_hwdata[1] ),
  17045. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ),
  17046. .Cin(),
  17047. .Qin(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  17048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ),
  17049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  17050. .SyncReset(SyncReset_X59_Y1_GND),
  17051. .ShiftData(),
  17052. .SyncLoad(SyncLoad_X59_Y1_VCC),
  17053. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector3~0_combout ),
  17054. .Cout(),
  17055. .Q(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ));
  17056. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .coord_x = 9;
  17057. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .coord_y = 1;
  17058. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .coord_z = 5;
  17059. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .mask = 16'h3300;
  17060. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .modeMux = 1'b0;
  17061. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .FeedbackMux = 1'b0;
  17062. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .ShiftMux = 1'b0;
  17063. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .BypassEn = 1'b1;
  17064. defparam \macro_inst|u_uart[0]|u_regs|lcr_pen .CarryEnb = 1'b1;
  17065. alta_slice \macro_inst|u_uart[0]|u_regs|lcr_sps (
  17066. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0]),
  17067. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  17068. .C(\rv32.mem_ahb_hwdata[7] ),
  17069. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  17070. .Cin(),
  17071. .Qin(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  17072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ),
  17073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  17074. .SyncReset(SyncReset_X59_Y1_GND),
  17075. .ShiftData(),
  17076. .SyncLoad(SyncLoad_X59_Y1_VCC),
  17077. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~0_combout ),
  17078. .Cout(),
  17079. .Q(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ));
  17080. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .coord_x = 9;
  17081. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .coord_y = 1;
  17082. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .coord_z = 1;
  17083. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .mask = 16'h0800;
  17084. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .modeMux = 1'b0;
  17085. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .FeedbackMux = 1'b1;
  17086. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .ShiftMux = 1'b0;
  17087. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .BypassEn = 1'b1;
  17088. defparam \macro_inst|u_uart[0]|u_regs|lcr_sps .CarryEnb = 1'b1;
  17089. alta_slice \macro_inst|u_uart[0]|u_regs|lcr_stp2 (
  17090. .A(vcc),
  17091. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  17092. .C(\rv32.mem_ahb_hwdata[3] ),
  17093. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  17094. .Cin(),
  17095. .Qin(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  17096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|always5~1_combout_X59_Y1_SIG_SIG ),
  17097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  17098. .SyncReset(SyncReset_X59_Y1_GND),
  17099. .ShiftData(),
  17100. .SyncLoad(SyncLoad_X59_Y1_VCC),
  17101. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector5~3_combout ),
  17102. .Cout(),
  17103. .Q(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ));
  17104. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .coord_x = 9;
  17105. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .coord_y = 1;
  17106. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .coord_z = 8;
  17107. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .mask = 16'h3300;
  17108. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .modeMux = 1'b0;
  17109. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .FeedbackMux = 1'b0;
  17110. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .ShiftMux = 1'b0;
  17111. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .BypassEn = 1'b1;
  17112. defparam \macro_inst|u_uart[0]|u_regs|lcr_stp2 .CarryEnb = 1'b1;
  17113. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] (
  17114. .A(\macro_inst|u_uart[0]|u_rx[0]|break_error~q ),
  17115. .B(\macro_inst|u_uart[0]|u_regs|break_error_ie [0]),
  17116. .C(\rv32.mem_ahb_hwdata[10] ),
  17117. .D(\macro_inst|u_uart[0]|u_rx[0]|overrun_error~q ),
  17118. .Cin(),
  17119. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [0]),
  17120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  17121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  17122. .SyncReset(SyncReset_X52_Y2_GND),
  17123. .ShiftData(),
  17124. .SyncLoad(SyncLoad_X52_Y2_VCC),
  17125. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~2_combout ),
  17126. .Cout(),
  17127. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [0]));
  17128. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .coord_x = 9;
  17129. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .coord_y = 3;
  17130. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .coord_z = 15;
  17131. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .mask = 16'hF888;
  17132. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .modeMux = 1'b0;
  17133. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .FeedbackMux = 1'b1;
  17134. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .ShiftMux = 1'b0;
  17135. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .BypassEn = 1'b1;
  17136. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[0] .CarryEnb = 1'b1;
  17137. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] (
  17138. .A(),
  17139. .B(),
  17140. .C(vcc),
  17141. .D(\rv32.mem_ahb_hwdata[10] ),
  17142. .Cin(),
  17143. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [1]),
  17144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X45_Y4_SIG_SIG ),
  17145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y4_SIG ),
  17146. .SyncReset(),
  17147. .ShiftData(),
  17148. .SyncLoad(),
  17149. .LutOut(\macro_inst|u_uart[0]|u_regs|overrun_error_ie[1]__feeder__LutOut ),
  17150. .Cout(),
  17151. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [1]));
  17152. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .coord_x = 9;
  17153. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .coord_y = 4;
  17154. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .coord_z = 11;
  17155. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .mask = 16'hFF00;
  17156. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .modeMux = 1'b1;
  17157. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .FeedbackMux = 1'b0;
  17158. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .ShiftMux = 1'b0;
  17159. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .BypassEn = 1'b0;
  17160. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[1] .CarryEnb = 1'b1;
  17161. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] (
  17162. .A(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [3]),
  17163. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17164. .C(\rv32.mem_ahb_hwdata[10] ),
  17165. .D(\macro_inst|u_uart[0]|u_regs|Selector2~0_combout ),
  17166. .Cin(),
  17167. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [2]),
  17168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  17169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  17170. .SyncReset(SyncReset_X54_Y2_GND),
  17171. .ShiftData(),
  17172. .SyncLoad(SyncLoad_X54_Y2_VCC),
  17173. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector2~1_combout ),
  17174. .Cout(),
  17175. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [2]));
  17176. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .coord_x = 14;
  17177. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .coord_y = 5;
  17178. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .coord_z = 2;
  17179. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .mask = 16'hBBC0;
  17180. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .modeMux = 1'b0;
  17181. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .FeedbackMux = 1'b1;
  17182. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .ShiftMux = 1'b0;
  17183. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .BypassEn = 1'b1;
  17184. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[2] .CarryEnb = 1'b1;
  17185. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] (
  17186. .A(\macro_inst|u_uart[0]|u_regs|break_error_ie [3]),
  17187. .B(\macro_inst|u_uart[0]|u_rx[3]|break_error~q ),
  17188. .C(\rv32.mem_ahb_hwdata[10] ),
  17189. .D(\macro_inst|u_uart[0]|u_rx[3]|overrun_error~q ),
  17190. .Cin(),
  17191. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [3]),
  17192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  17193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  17194. .SyncReset(SyncReset_X53_Y2_GND),
  17195. .ShiftData(),
  17196. .SyncLoad(SyncLoad_X53_Y2_VCC),
  17197. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~17_combout ),
  17198. .Cout(),
  17199. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [3]));
  17200. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .coord_x = 11;
  17201. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .coord_y = 3;
  17202. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .coord_z = 1;
  17203. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .mask = 16'hF888;
  17204. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .modeMux = 1'b0;
  17205. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .FeedbackMux = 1'b1;
  17206. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .ShiftMux = 1'b0;
  17207. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .BypassEn = 1'b1;
  17208. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[3] .CarryEnb = 1'b1;
  17209. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] (
  17210. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  17211. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  17212. .C(\rv32.mem_ahb_hwdata[10] ),
  17213. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  17214. .Cin(),
  17215. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [4]),
  17216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  17217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  17218. .SyncReset(SyncReset_X57_Y3_GND),
  17219. .ShiftData(),
  17220. .SyncLoad(SyncLoad_X57_Y3_VCC),
  17221. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~0_combout ),
  17222. .Cout(),
  17223. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [4]));
  17224. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .coord_x = 16;
  17225. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .coord_y = 1;
  17226. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .coord_z = 5;
  17227. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .mask = 16'h22AA;
  17228. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .modeMux = 1'b0;
  17229. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .FeedbackMux = 1'b0;
  17230. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .ShiftMux = 1'b0;
  17231. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .BypassEn = 1'b1;
  17232. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[4] .CarryEnb = 1'b1;
  17233. alta_slice \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] (
  17234. .A(\macro_inst|u_uart[0]|u_regs|Selector2~1_combout ),
  17235. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  17236. .C(\rv32.mem_ahb_hwdata[10] ),
  17237. .D(\macro_inst|u_uart[0]|u_regs|Selector2~2_combout ),
  17238. .Cin(),
  17239. .Qin(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [5]),
  17240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  17241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  17242. .SyncReset(SyncReset_X60_Y2_GND),
  17243. .ShiftData(),
  17244. .SyncLoad(SyncLoad_X60_Y2_VCC),
  17245. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector2~3_combout ),
  17246. .Cout(),
  17247. .Q(\macro_inst|u_uart[0]|u_regs|overrun_error_ie [5]));
  17248. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .coord_x = 15;
  17249. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .coord_y = 3;
  17250. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .coord_z = 13;
  17251. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .mask = 16'hF388;
  17252. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .modeMux = 1'b0;
  17253. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .FeedbackMux = 1'b1;
  17254. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .ShiftMux = 1'b0;
  17255. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .BypassEn = 1'b1;
  17256. defparam \macro_inst|u_uart[0]|u_regs|overrun_error_ie[5] .CarryEnb = 1'b1;
  17257. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] (
  17258. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17259. .B(\macro_inst|u_uart[0]|u_regs|parity_error_ie [1]),
  17260. .C(\rv32.mem_ahb_hwdata[8] ),
  17261. .D(\macro_inst|u_ahb2apb|paddr [8]),
  17262. .Cin(),
  17263. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [0]),
  17264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  17265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  17266. .SyncReset(SyncReset_X52_Y2_GND),
  17267. .ShiftData(),
  17268. .SyncLoad(SyncLoad_X52_Y2_VCC),
  17269. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector4~0_combout ),
  17270. .Cout(),
  17271. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [0]));
  17272. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .coord_x = 9;
  17273. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .coord_y = 3;
  17274. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .coord_z = 10;
  17275. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .mask = 16'hEE50;
  17276. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .modeMux = 1'b0;
  17277. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .FeedbackMux = 1'b1;
  17278. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .ShiftMux = 1'b0;
  17279. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .BypassEn = 1'b1;
  17280. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[0] .CarryEnb = 1'b1;
  17281. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] (
  17282. .A(\rv32.gpio8_io_out_en[0] ),
  17283. .B(\rv32.gpio8_io_out_data[1] ),
  17284. .C(\rv32.mem_ahb_hwdata[8] ),
  17285. .D(\rv32.gpio8_io_out_en[1] ),
  17286. .Cin(),
  17287. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [1]),
  17288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X50_Y4_SIG_SIG ),
  17289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y4_SIG ),
  17290. .SyncReset(SyncReset_X50_Y4_GND),
  17291. .ShiftData(),
  17292. .SyncLoad(SyncLoad_X50_Y4_VCC),
  17293. .LutOut(\macro_inst|SIM_IO_12~1_combout ),
  17294. .Cout(),
  17295. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [1]));
  17296. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .coord_x = 8;
  17297. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .coord_y = 4;
  17298. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .coord_z = 13;
  17299. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .mask = 16'h8800;
  17300. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .modeMux = 1'b0;
  17301. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .FeedbackMux = 1'b0;
  17302. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .ShiftMux = 1'b0;
  17303. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .BypassEn = 1'b1;
  17304. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[1] .CarryEnb = 1'b1;
  17305. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] (
  17306. .A(),
  17307. .B(),
  17308. .C(vcc),
  17309. .D(\rv32.mem_ahb_hwdata[8] ),
  17310. .Cin(),
  17311. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [2]),
  17312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  17313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  17314. .SyncReset(),
  17315. .ShiftData(),
  17316. .SyncLoad(),
  17317. .LutOut(\macro_inst|u_uart[0]|u_regs|parity_error_ie[2]__feeder__LutOut ),
  17318. .Cout(),
  17319. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [2]));
  17320. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .coord_x = 14;
  17321. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .coord_y = 5;
  17322. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .coord_z = 15;
  17323. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .mask = 16'hFF00;
  17324. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .modeMux = 1'b1;
  17325. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .FeedbackMux = 1'b0;
  17326. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .ShiftMux = 1'b0;
  17327. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .BypassEn = 1'b0;
  17328. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[2] .CarryEnb = 1'b1;
  17329. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] (
  17330. .A(\macro_inst|u_uart[0]|u_regs|parity_error_ie [2]),
  17331. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17332. .C(\rv32.mem_ahb_hwdata[8] ),
  17333. .D(\macro_inst|u_uart[0]|u_regs|Selector4~0_combout ),
  17334. .Cin(),
  17335. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [3]),
  17336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  17337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  17338. .SyncReset(SyncReset_X53_Y2_GND),
  17339. .ShiftData(),
  17340. .SyncLoad(SyncLoad_X53_Y2_VCC),
  17341. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector4~1_combout ),
  17342. .Cout(),
  17343. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [3]));
  17344. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .coord_x = 11;
  17345. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .coord_y = 3;
  17346. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .coord_z = 5;
  17347. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .mask = 16'hF388;
  17348. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .modeMux = 1'b0;
  17349. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .FeedbackMux = 1'b1;
  17350. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .ShiftMux = 1'b0;
  17351. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .BypassEn = 1'b1;
  17352. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[3] .CarryEnb = 1'b1;
  17353. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] (
  17354. .A(\macro_inst|u_uart[0]|u_regs|framing_error_ie [4]),
  17355. .B(\macro_inst|u_uart[0]|u_rx[4]|framing_error~q ),
  17356. .C(\rv32.mem_ahb_hwdata[8] ),
  17357. .D(\macro_inst|u_uart[0]|u_rx[4]|parity_error~q ),
  17358. .Cin(),
  17359. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [4]),
  17360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  17361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  17362. .SyncReset(SyncReset_X57_Y3_GND),
  17363. .ShiftData(),
  17364. .SyncLoad(SyncLoad_X57_Y3_VCC),
  17365. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~21_combout ),
  17366. .Cout(),
  17367. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [4]));
  17368. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .coord_x = 16;
  17369. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .coord_y = 1;
  17370. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .coord_z = 6;
  17371. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .mask = 16'hF888;
  17372. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .modeMux = 1'b0;
  17373. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .FeedbackMux = 1'b1;
  17374. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .ShiftMux = 1'b0;
  17375. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .BypassEn = 1'b1;
  17376. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[4] .CarryEnb = 1'b1;
  17377. alta_slice \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] (
  17378. .A(\macro_inst|u_uart[0]|u_regs|Selector4~1_combout ),
  17379. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  17380. .C(\rv32.mem_ahb_hwdata[8] ),
  17381. .D(\macro_inst|u_uart[0]|u_regs|Selector4~2_combout ),
  17382. .Cin(),
  17383. .Qin(\macro_inst|u_uart[0]|u_regs|parity_error_ie [5]),
  17384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  17385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  17386. .SyncReset(SyncReset_X60_Y2_GND),
  17387. .ShiftData(),
  17388. .SyncLoad(SyncLoad_X60_Y2_VCC),
  17389. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector4~3_combout ),
  17390. .Cout(),
  17391. .Q(\macro_inst|u_uart[0]|u_regs|parity_error_ie [5]));
  17392. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .coord_x = 15;
  17393. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .coord_y = 3;
  17394. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .coord_z = 3;
  17395. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .mask = 16'hF388;
  17396. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .modeMux = 1'b0;
  17397. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .FeedbackMux = 1'b1;
  17398. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .ShiftMux = 1'b0;
  17399. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .BypassEn = 1'b1;
  17400. defparam \macro_inst|u_uart[0]|u_regs|parity_error_ie[5] .CarryEnb = 1'b1;
  17401. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] (
  17402. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17403. .B(\macro_inst|u_ahb2apb|paddr [8]),
  17404. .C(\rv32.mem_ahb_hwdata[0] ),
  17405. .D(\macro_inst|u_uart[0]|u_regs|rx_dma_en [1]),
  17406. .Cin(),
  17407. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [0]),
  17408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout_X57_Y2_SIG_SIG ),
  17409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
  17410. .SyncReset(SyncReset_X57_Y2_GND),
  17411. .ShiftData(),
  17412. .SyncLoad(SyncLoad_X57_Y2_VCC),
  17413. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~0_combout ),
  17414. .Cout(),
  17415. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [0]));
  17416. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .coord_x = 12;
  17417. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .coord_y = 3;
  17418. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .coord_z = 0;
  17419. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .mask = 16'hDC98;
  17420. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .modeMux = 1'b0;
  17421. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .FeedbackMux = 1'b1;
  17422. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .ShiftMux = 1'b0;
  17423. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .BypassEn = 1'b1;
  17424. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[0] .CarryEnb = 1'b1;
  17425. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] (
  17426. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  17427. .B(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  17428. .C(\rv32.mem_ahb_hwdata[0] ),
  17429. .D(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  17430. .Cin(),
  17431. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [1]),
  17432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout_X57_Y2_SIG_SIG ),
  17433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
  17434. .SyncReset(SyncReset_X57_Y2_GND),
  17435. .ShiftData(),
  17436. .SyncLoad(SyncLoad_X57_Y2_VCC),
  17437. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout ),
  17438. .Cout(),
  17439. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [1]));
  17440. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .coord_x = 12;
  17441. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .coord_y = 3;
  17442. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .coord_z = 1;
  17443. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .mask = 16'h8800;
  17444. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .modeMux = 1'b0;
  17445. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .FeedbackMux = 1'b0;
  17446. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .ShiftMux = 1'b0;
  17447. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .BypassEn = 1'b1;
  17448. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[1] .CarryEnb = 1'b1;
  17449. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] (
  17450. .A(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  17451. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  17452. .C(\rv32.mem_ahb_hwdata[0] ),
  17453. .D(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  17454. .Cin(),
  17455. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [2]),
  17456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout_X46_Y4_SIG_SIG ),
  17457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ),
  17458. .SyncReset(SyncReset_X46_Y4_GND),
  17459. .ShiftData(),
  17460. .SyncLoad(SyncLoad_X46_Y4_VCC),
  17461. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout ),
  17462. .Cout(),
  17463. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [2]));
  17464. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .coord_x = 17;
  17465. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .coord_y = 2;
  17466. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .coord_z = 9;
  17467. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .mask = 16'h8800;
  17468. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .modeMux = 1'b0;
  17469. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .FeedbackMux = 1'b0;
  17470. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .ShiftMux = 1'b0;
  17471. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .BypassEn = 1'b1;
  17472. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[2] .CarryEnb = 1'b1;
  17473. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] (
  17474. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17475. .B(\macro_inst|u_uart[0]|u_regs|rx_dma_en [2]),
  17476. .C(\rv32.mem_ahb_hwdata[0] ),
  17477. .D(\macro_inst|u_uart[0]|u_regs|Selector12~0_combout ),
  17478. .Cin(),
  17479. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [3]),
  17480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout_X46_Y4_SIG_SIG ),
  17481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ),
  17482. .SyncReset(SyncReset_X46_Y4_GND),
  17483. .ShiftData(),
  17484. .SyncLoad(SyncLoad_X46_Y4_VCC),
  17485. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector12~1_combout ),
  17486. .Cout(),
  17487. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [3]));
  17488. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .coord_x = 17;
  17489. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .coord_y = 2;
  17490. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .coord_z = 4;
  17491. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .mask = 16'hF588;
  17492. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .modeMux = 1'b0;
  17493. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .FeedbackMux = 1'b1;
  17494. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .ShiftMux = 1'b0;
  17495. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .BypassEn = 1'b1;
  17496. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[3] .CarryEnb = 1'b1;
  17497. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] (
  17498. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  17499. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  17500. .C(\rv32.mem_ahb_hwdata[0] ),
  17501. .D(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  17502. .Cin(),
  17503. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [4]),
  17504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout_X57_Y1_SIG_SIG ),
  17505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  17506. .SyncReset(SyncReset_X57_Y1_GND),
  17507. .ShiftData(),
  17508. .SyncLoad(SyncLoad_X57_Y1_VCC),
  17509. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  17510. .Cout(),
  17511. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [4]));
  17512. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .coord_x = 12;
  17513. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .coord_y = 2;
  17514. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .coord_z = 8;
  17515. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .mask = 16'hCC44;
  17516. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .modeMux = 1'b0;
  17517. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .FeedbackMux = 1'b0;
  17518. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .ShiftMux = 1'b0;
  17519. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .BypassEn = 1'b1;
  17520. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4] .CarryEnb = 1'b1;
  17521. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 (
  17522. .A(\macro_inst|u_ahb2apb|paddr [8]),
  17523. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  17524. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  17525. .D(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  17526. .Cin(),
  17527. .Qin(),
  17528. .Clk(),
  17529. .AsyncReset(),
  17530. .SyncReset(),
  17531. .ShiftData(),
  17532. .SyncLoad(),
  17533. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout ),
  17534. .Cout(),
  17535. .Q());
  17536. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .coord_x = 12;
  17537. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .coord_y = 2;
  17538. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .coord_z = 6;
  17539. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .mask = 16'h4000;
  17540. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .modeMux = 1'b0;
  17541. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .FeedbackMux = 1'b0;
  17542. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .ShiftMux = 1'b0;
  17543. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .BypassEn = 1'b0;
  17544. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3 .CarryEnb = 1'b1;
  17545. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] (
  17546. .A(\macro_inst|u_ahb2apb|paddr [4]),
  17547. .B(\macro_inst|u_ahb2apb|paddr [6]),
  17548. .C(\rv32.mem_ahb_hwdata[0] ),
  17549. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~6_combout ),
  17550. .Cin(),
  17551. .Qin(\macro_inst|u_uart[0]|u_regs|rx_dma_en [5]),
  17552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout_X58_Y4_SIG_SIG ),
  17553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  17554. .SyncReset(SyncReset_X58_Y4_GND),
  17555. .ShiftData(),
  17556. .SyncLoad(SyncLoad_X58_Y4_VCC),
  17557. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~7_combout ),
  17558. .Cout(),
  17559. .Q(\macro_inst|u_uart[0]|u_regs|rx_dma_en [5]));
  17560. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .coord_x = 17;
  17561. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .coord_y = 4;
  17562. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .coord_z = 2;
  17563. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .mask = 16'h7733;
  17564. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .modeMux = 1'b0;
  17565. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .FeedbackMux = 1'b0;
  17566. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .ShiftMux = 1'b0;
  17567. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .BypassEn = 1'b1;
  17568. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5] .CarryEnb = 1'b1;
  17569. alta_slice \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 (
  17570. .A(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  17571. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  17572. .C(\macro_inst|u_ahb2apb|paddr [8]),
  17573. .D(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  17574. .Cin(),
  17575. .Qin(),
  17576. .Clk(),
  17577. .AsyncReset(),
  17578. .SyncReset(),
  17579. .ShiftData(),
  17580. .SyncLoad(),
  17581. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout ),
  17582. .Cout(),
  17583. .Q());
  17584. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .coord_x = 17;
  17585. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .coord_y = 4;
  17586. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .coord_z = 10;
  17587. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .mask = 16'h8000;
  17588. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .modeMux = 1'b0;
  17589. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .FeedbackMux = 1'b0;
  17590. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .ShiftMux = 1'b0;
  17591. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .BypassEn = 1'b0;
  17592. defparam \macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2 .CarryEnb = 1'b1;
  17593. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] (
  17594. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17595. .B(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [1]),
  17596. .C(\rv32.mem_ahb_hwdata[11] ),
  17597. .D(\macro_inst|u_ahb2apb|paddr [8]),
  17598. .Cin(),
  17599. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [0]),
  17600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  17601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  17602. .SyncReset(SyncReset_X52_Y2_GND),
  17603. .ShiftData(),
  17604. .SyncLoad(SyncLoad_X52_Y2_VCC),
  17605. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector1~0_combout ),
  17606. .Cout(),
  17607. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [0]));
  17608. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .coord_x = 9;
  17609. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .coord_y = 3;
  17610. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .coord_z = 0;
  17611. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .mask = 16'hEE50;
  17612. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .modeMux = 1'b0;
  17613. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .FeedbackMux = 1'b1;
  17614. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .ShiftMux = 1'b0;
  17615. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .BypassEn = 1'b1;
  17616. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[0] .CarryEnb = 1'b1;
  17617. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] (
  17618. .A(),
  17619. .B(),
  17620. .C(vcc),
  17621. .D(\rv32.mem_ahb_hwdata[11] ),
  17622. .Cin(),
  17623. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [1]),
  17624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X45_Y4_SIG_SIG ),
  17625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y4_SIG ),
  17626. .SyncReset(),
  17627. .ShiftData(),
  17628. .SyncLoad(),
  17629. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_idle_ie[1]__feeder__LutOut ),
  17630. .Cout(),
  17631. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [1]));
  17632. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .coord_x = 9;
  17633. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .coord_y = 4;
  17634. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .coord_z = 13;
  17635. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .mask = 16'hFF00;
  17636. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .modeMux = 1'b1;
  17637. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .FeedbackMux = 1'b0;
  17638. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .ShiftMux = 1'b0;
  17639. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .BypassEn = 1'b0;
  17640. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[1] .CarryEnb = 1'b1;
  17641. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] (
  17642. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_complete~q ),
  17643. .B(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [2]),
  17644. .C(\rv32.mem_ahb_hwdata[11] ),
  17645. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_idle~q ),
  17646. .Cin(),
  17647. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [2]),
  17648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  17649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  17650. .SyncReset(SyncReset_X54_Y2_GND),
  17651. .ShiftData(),
  17652. .SyncLoad(SyncLoad_X54_Y2_VCC),
  17653. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~13_combout ),
  17654. .Cout(),
  17655. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [2]));
  17656. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .coord_x = 14;
  17657. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .coord_y = 5;
  17658. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .coord_z = 9;
  17659. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .mask = 16'hF888;
  17660. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .modeMux = 1'b0;
  17661. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .FeedbackMux = 1'b1;
  17662. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .ShiftMux = 1'b0;
  17663. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .BypassEn = 1'b1;
  17664. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[2] .CarryEnb = 1'b1;
  17665. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] (
  17666. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17667. .B(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [2]),
  17668. .C(\rv32.mem_ahb_hwdata[11] ),
  17669. .D(\macro_inst|u_uart[0]|u_regs|Selector1~0_combout ),
  17670. .Cin(),
  17671. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [3]),
  17672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  17673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  17674. .SyncReset(SyncReset_X53_Y2_GND),
  17675. .ShiftData(),
  17676. .SyncLoad(SyncLoad_X53_Y2_VCC),
  17677. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector1~1_combout ),
  17678. .Cout(),
  17679. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [3]));
  17680. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .coord_x = 11;
  17681. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .coord_y = 3;
  17682. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .coord_z = 11;
  17683. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .mask = 16'hF588;
  17684. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .modeMux = 1'b0;
  17685. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .FeedbackMux = 1'b1;
  17686. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .ShiftMux = 1'b0;
  17687. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .BypassEn = 1'b1;
  17688. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[3] .CarryEnb = 1'b1;
  17689. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] (
  17690. .A(),
  17691. .B(),
  17692. .C(vcc),
  17693. .D(\rv32.mem_ahb_hwdata[11] ),
  17694. .Cin(),
  17695. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [4]),
  17696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  17697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  17698. .SyncReset(),
  17699. .ShiftData(),
  17700. .SyncLoad(),
  17701. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_idle_ie[4]__feeder__LutOut ),
  17702. .Cout(),
  17703. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [4]));
  17704. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .coord_x = 16;
  17705. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .coord_y = 1;
  17706. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .coord_z = 15;
  17707. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .mask = 16'hFF00;
  17708. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .modeMux = 1'b1;
  17709. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .FeedbackMux = 1'b0;
  17710. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .ShiftMux = 1'b0;
  17711. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .BypassEn = 1'b0;
  17712. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[4] .CarryEnb = 1'b1;
  17713. alta_slice \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] (
  17714. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  17715. .B(\macro_inst|u_uart[0]|u_regs|Selector1~1_combout ),
  17716. .C(\rv32.mem_ahb_hwdata[11] ),
  17717. .D(\macro_inst|u_uart[0]|u_regs|Selector1~2_combout ),
  17718. .Cin(),
  17719. .Qin(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [5]),
  17720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  17721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  17722. .SyncReset(SyncReset_X60_Y2_GND),
  17723. .ShiftData(),
  17724. .SyncLoad(SyncLoad_X60_Y2_VCC),
  17725. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector1~3_combout ),
  17726. .Cout(),
  17727. .Q(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [5]));
  17728. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .coord_x = 15;
  17729. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .coord_y = 3;
  17730. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .coord_z = 5;
  17731. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .mask = 16'hF588;
  17732. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .modeMux = 1'b0;
  17733. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .FeedbackMux = 1'b1;
  17734. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .ShiftMux = 1'b0;
  17735. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .BypassEn = 1'b1;
  17736. defparam \macro_inst|u_uart[0]|u_regs|rx_idle_ie[5] .CarryEnb = 1'b1;
  17737. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] (
  17738. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  17739. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  17740. .C(\rv32.mem_ahb_hwdata[4] ),
  17741. .D(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [0]),
  17742. .Cin(),
  17743. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [0]),
  17744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  17745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  17746. .SyncReset(SyncReset_X52_Y2_GND),
  17747. .ShiftData(),
  17748. .SyncLoad(SyncLoad_X52_Y2_VCC),
  17749. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~0_combout ),
  17750. .Cout(),
  17751. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [0]));
  17752. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .coord_x = 9;
  17753. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .coord_y = 3;
  17754. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .coord_z = 13;
  17755. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .mask = 16'hB3A0;
  17756. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .modeMux = 1'b0;
  17757. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .FeedbackMux = 1'b1;
  17758. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .ShiftMux = 1'b0;
  17759. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .BypassEn = 1'b1;
  17760. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0] .CarryEnb = 1'b1;
  17761. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 (
  17762. .A(vcc),
  17763. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17764. .C(\macro_inst|u_ahb2apb|paddr [8]),
  17765. .D(\macro_inst|u_ahb2apb|paddr [10]),
  17766. .Cin(),
  17767. .Qin(),
  17768. .Clk(),
  17769. .AsyncReset(),
  17770. .SyncReset(),
  17771. .ShiftData(),
  17772. .SyncLoad(),
  17773. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  17774. .Cout(),
  17775. .Q());
  17776. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .coord_x = 16;
  17777. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .coord_y = 2;
  17778. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .coord_z = 5;
  17779. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .mask = 16'h0003;
  17780. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .modeMux = 1'b0;
  17781. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .FeedbackMux = 1'b0;
  17782. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .ShiftMux = 1'b0;
  17783. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .BypassEn = 1'b0;
  17784. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12 .CarryEnb = 1'b1;
  17785. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 (
  17786. .A(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  17787. .B(\macro_inst|u_ahb2apb|paddr [8]),
  17788. .C(\macro_inst|u_ahb2apb|paddr [9]),
  17789. .D(\macro_inst|u_ahb2apb|paddr [10]),
  17790. .Cin(),
  17791. .Qin(),
  17792. .Clk(),
  17793. .AsyncReset(),
  17794. .SyncReset(),
  17795. .ShiftData(),
  17796. .SyncLoad(),
  17797. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout ),
  17798. .Cout(),
  17799. .Q());
  17800. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .coord_x = 9;
  17801. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .coord_y = 3;
  17802. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .coord_z = 3;
  17803. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .mask = 16'h0002;
  17804. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .modeMux = 1'b0;
  17805. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .FeedbackMux = 1'b0;
  17806. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .ShiftMux = 1'b0;
  17807. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .BypassEn = 1'b0;
  17808. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16 .CarryEnb = 1'b1;
  17809. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] (
  17810. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  17811. .B(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [1]),
  17812. .C(\rv32.mem_ahb_hwdata[4] ),
  17813. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  17814. .Cin(),
  17815. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [1]),
  17816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X52_Y4_SIG_SIG ),
  17817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ),
  17818. .SyncReset(SyncReset_X52_Y4_GND),
  17819. .ShiftData(),
  17820. .SyncLoad(SyncLoad_X52_Y4_VCC),
  17821. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~5_combout ),
  17822. .Cout(),
  17823. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [1]));
  17824. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .coord_x = 2;
  17825. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .coord_y = 3;
  17826. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .coord_z = 12;
  17827. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .mask = 16'hF444;
  17828. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .modeMux = 1'b0;
  17829. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .FeedbackMux = 1'b1;
  17830. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .ShiftMux = 1'b0;
  17831. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .BypassEn = 1'b1;
  17832. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1] .CarryEnb = 1'b1;
  17833. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 (
  17834. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17835. .B(\macro_inst|u_ahb2apb|paddr [10]),
  17836. .C(\macro_inst|u_ahb2apb|paddr [8]),
  17837. .D(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  17838. .Cin(),
  17839. .Qin(),
  17840. .Clk(),
  17841. .AsyncReset(),
  17842. .SyncReset(),
  17843. .ShiftData(),
  17844. .SyncLoad(),
  17845. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout ),
  17846. .Cout(),
  17847. .Q());
  17848. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .coord_x = 8;
  17849. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .coord_y = 4;
  17850. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .coord_z = 12;
  17851. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .mask = 16'h1000;
  17852. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .modeMux = 1'b0;
  17853. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .FeedbackMux = 1'b0;
  17854. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .ShiftMux = 1'b0;
  17855. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .BypassEn = 1'b0;
  17856. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17 .CarryEnb = 1'b1;
  17857. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] (
  17858. .A(),
  17859. .B(),
  17860. .C(vcc),
  17861. .D(\rv32.mem_ahb_hwdata[4] ),
  17862. .Cin(),
  17863. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [2]),
  17864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  17865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  17866. .SyncReset(),
  17867. .ShiftData(),
  17868. .SyncLoad(),
  17869. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]__feeder__LutOut ),
  17870. .Cout(),
  17871. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [2]));
  17872. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .coord_x = 14;
  17873. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .coord_y = 5;
  17874. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .coord_z = 6;
  17875. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .mask = 16'hFF00;
  17876. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .modeMux = 1'b1;
  17877. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .FeedbackMux = 1'b0;
  17878. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .ShiftMux = 1'b0;
  17879. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .BypassEn = 1'b0;
  17880. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2] .CarryEnb = 1'b1;
  17881. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 (
  17882. .A(vcc),
  17883. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17884. .C(\macro_inst|u_ahb2apb|paddr [8]),
  17885. .D(\macro_inst|u_ahb2apb|paddr [10]),
  17886. .Cin(),
  17887. .Qin(),
  17888. .Clk(),
  17889. .AsyncReset(),
  17890. .SyncReset(),
  17891. .ShiftData(),
  17892. .SyncLoad(),
  17893. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  17894. .Cout(),
  17895. .Q());
  17896. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .coord_x = 18;
  17897. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .coord_y = 5;
  17898. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .coord_z = 5;
  17899. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .mask = 16'h000C;
  17900. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .modeMux = 1'b0;
  17901. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .FeedbackMux = 1'b0;
  17902. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .ShiftMux = 1'b0;
  17903. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .BypassEn = 1'b0;
  17904. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14 .CarryEnb = 1'b1;
  17905. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 (
  17906. .A(\macro_inst|u_ahb2apb|paddr [10]),
  17907. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17908. .C(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  17909. .D(\macro_inst|u_ahb2apb|paddr [8]),
  17910. .Cin(),
  17911. .Qin(),
  17912. .Clk(),
  17913. .AsyncReset(),
  17914. .SyncReset(),
  17915. .ShiftData(),
  17916. .SyncLoad(),
  17917. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout ),
  17918. .Cout(),
  17919. .Q());
  17920. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .coord_x = 14;
  17921. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .coord_y = 5;
  17922. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .coord_z = 8;
  17923. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .mask = 16'h0040;
  17924. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .modeMux = 1'b0;
  17925. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .FeedbackMux = 1'b0;
  17926. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .ShiftMux = 1'b0;
  17927. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .BypassEn = 1'b0;
  17928. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18 .CarryEnb = 1'b1;
  17929. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] (
  17930. .A(\macro_inst|u_ahb2apb|paddr [9]),
  17931. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [2]),
  17932. .C(\rv32.mem_ahb_hwdata[4] ),
  17933. .D(\macro_inst|u_uart[0]|u_regs|Selector8~7_combout ),
  17934. .Cin(),
  17935. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [3]),
  17936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  17937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  17938. .SyncReset(SyncReset_X53_Y2_GND),
  17939. .ShiftData(),
  17940. .SyncLoad(SyncLoad_X53_Y2_VCC),
  17941. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector8~8_combout ),
  17942. .Cout(),
  17943. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [3]));
  17944. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .coord_x = 11;
  17945. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .coord_y = 3;
  17946. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .coord_z = 15;
  17947. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .mask = 16'hF588;
  17948. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .modeMux = 1'b0;
  17949. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .FeedbackMux = 1'b1;
  17950. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .ShiftMux = 1'b0;
  17951. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .BypassEn = 1'b1;
  17952. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3] .CarryEnb = 1'b1;
  17953. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 (
  17954. .A(\macro_inst|u_ahb2apb|paddr [10]),
  17955. .B(\macro_inst|u_ahb2apb|paddr [9]),
  17956. .C(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  17957. .D(\macro_inst|u_ahb2apb|paddr [8]),
  17958. .Cin(),
  17959. .Qin(),
  17960. .Clk(),
  17961. .AsyncReset(),
  17962. .SyncReset(),
  17963. .ShiftData(),
  17964. .SyncLoad(),
  17965. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout ),
  17966. .Cout(),
  17967. .Q());
  17968. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .coord_x = 11;
  17969. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .coord_y = 3;
  17970. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .coord_z = 9;
  17971. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .mask = 16'h4000;
  17972. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .modeMux = 1'b0;
  17973. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .FeedbackMux = 1'b0;
  17974. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .ShiftMux = 1'b0;
  17975. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .BypassEn = 1'b0;
  17976. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19 .CarryEnb = 1'b1;
  17977. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] (
  17978. .A(),
  17979. .B(),
  17980. .C(vcc),
  17981. .D(\rv32.mem_ahb_hwdata[4] ),
  17982. .Cin(),
  17983. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [4]),
  17984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  17985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  17986. .SyncReset(),
  17987. .ShiftData(),
  17988. .SyncLoad(),
  17989. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]__feeder__LutOut ),
  17990. .Cout(),
  17991. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [4]));
  17992. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .coord_x = 16;
  17993. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .coord_y = 1;
  17994. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .coord_z = 7;
  17995. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .mask = 16'hFF00;
  17996. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .modeMux = 1'b1;
  17997. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .FeedbackMux = 1'b0;
  17998. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .ShiftMux = 1'b0;
  17999. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .BypassEn = 1'b0;
  18000. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4] .CarryEnb = 1'b1;
  18001. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 (
  18002. .A(\macro_inst|u_ahb2apb|paddr [10]),
  18003. .B(\macro_inst|u_ahb2apb|paddr [9]),
  18004. .C(\macro_inst|u_ahb2apb|paddr [8]),
  18005. .D(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  18006. .Cin(),
  18007. .Qin(),
  18008. .Clk(),
  18009. .AsyncReset(),
  18010. .SyncReset(),
  18011. .ShiftData(),
  18012. .SyncLoad(),
  18013. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout ),
  18014. .Cout(),
  18015. .Q());
  18016. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .coord_x = 16;
  18017. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .coord_y = 2;
  18018. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .coord_z = 8;
  18019. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .mask = 16'h0200;
  18020. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .modeMux = 1'b0;
  18021. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .FeedbackMux = 1'b0;
  18022. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .ShiftMux = 1'b0;
  18023. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .BypassEn = 1'b0;
  18024. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20 .CarryEnb = 1'b1;
  18025. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] (
  18026. .A(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [5]),
  18027. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  18028. .C(\rv32.mem_ahb_hwdata[4] ),
  18029. .D(\macro_inst|u_uart[0]|u_regs|Selector7~4_combout ),
  18030. .Cin(),
  18031. .Qin(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [5]),
  18032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X56_Y2_SIG_SIG ),
  18033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
  18034. .SyncReset(SyncReset_X56_Y2_GND),
  18035. .ShiftData(),
  18036. .SyncLoad(SyncLoad_X56_Y2_VCC),
  18037. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~5_combout ),
  18038. .Cout(),
  18039. .Q(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [5]));
  18040. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .coord_x = 12;
  18041. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .coord_y = 1;
  18042. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .coord_z = 11;
  18043. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .mask = 16'hBBCC;
  18044. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .modeMux = 1'b0;
  18045. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .FeedbackMux = 1'b0;
  18046. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .ShiftMux = 1'b0;
  18047. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .BypassEn = 1'b1;
  18048. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5] .CarryEnb = 1'b1;
  18049. alta_slice \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 (
  18050. .A(\macro_inst|u_ahb2apb|paddr [10]),
  18051. .B(\macro_inst|u_ahb2apb|paddr [9]),
  18052. .C(\macro_inst|u_ahb2apb|paddr [8]),
  18053. .D(\macro_inst|u_uart[0]|u_regs|always7~0_combout ),
  18054. .Cin(),
  18055. .Qin(),
  18056. .Clk(),
  18057. .AsyncReset(),
  18058. .SyncReset(),
  18059. .ShiftData(),
  18060. .SyncLoad(),
  18061. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout ),
  18062. .Cout(),
  18063. .Q());
  18064. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .coord_x = 15;
  18065. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .coord_y = 3;
  18066. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .coord_z = 4;
  18067. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .mask = 16'h2000;
  18068. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .modeMux = 1'b0;
  18069. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .FeedbackMux = 1'b0;
  18070. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .ShiftMux = 1'b0;
  18071. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .BypassEn = 1'b0;
  18072. defparam \macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21 .CarryEnb = 1'b1;
  18073. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[0] (
  18074. .A(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18075. .B(vcc),
  18076. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  18077. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18078. .Cin(),
  18079. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [0]),
  18080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  18081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  18082. .SyncReset(),
  18083. .ShiftData(),
  18084. .SyncLoad(),
  18085. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~0_combout ),
  18086. .Cout(),
  18087. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [0]));
  18088. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .coord_x = 17;
  18089. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .coord_y = 1;
  18090. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .coord_z = 6;
  18091. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .mask = 16'hA000;
  18092. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .modeMux = 1'b0;
  18093. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .FeedbackMux = 1'b0;
  18094. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .ShiftMux = 1'b0;
  18095. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .BypassEn = 1'b0;
  18096. defparam \macro_inst|u_uart[0]|u_regs|rx_read[0] .CarryEnb = 1'b1;
  18097. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[1] (
  18098. .A(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18099. .B(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18100. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  18101. .D(vcc),
  18102. .Cin(),
  18103. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [1]),
  18104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ),
  18105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  18106. .SyncReset(),
  18107. .ShiftData(),
  18108. .SyncLoad(),
  18109. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~1_combout ),
  18110. .Cout(),
  18111. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [1]));
  18112. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .coord_x = 18;
  18113. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .coord_y = 2;
  18114. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .coord_z = 5;
  18115. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .mask = 16'h8080;
  18116. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .modeMux = 1'b0;
  18117. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .FeedbackMux = 1'b0;
  18118. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .ShiftMux = 1'b0;
  18119. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .BypassEn = 1'b0;
  18120. defparam \macro_inst|u_uart[0]|u_regs|rx_read[1] .CarryEnb = 1'b1;
  18121. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[2] (
  18122. .A(vcc),
  18123. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  18124. .C(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18125. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18126. .Cin(),
  18127. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [2]),
  18128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  18129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ),
  18130. .SyncReset(),
  18131. .ShiftData(),
  18132. .SyncLoad(),
  18133. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~2_combout ),
  18134. .Cout(),
  18135. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [2]));
  18136. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .coord_x = 10;
  18137. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .coord_y = 2;
  18138. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .coord_z = 8;
  18139. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .mask = 16'hC000;
  18140. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .modeMux = 1'b0;
  18141. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .FeedbackMux = 1'b0;
  18142. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .ShiftMux = 1'b0;
  18143. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .BypassEn = 1'b0;
  18144. defparam \macro_inst|u_uart[0]|u_regs|rx_read[2] .CarryEnb = 1'b1;
  18145. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[3] (
  18146. .A(vcc),
  18147. .B(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18148. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18149. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  18150. .Cin(),
  18151. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [3]),
  18152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ),
  18153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  18154. .SyncReset(),
  18155. .ShiftData(),
  18156. .SyncLoad(),
  18157. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~3_combout ),
  18158. .Cout(),
  18159. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [3]));
  18160. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .coord_x = 18;
  18161. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .coord_y = 2;
  18162. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .coord_z = 11;
  18163. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .mask = 16'hC000;
  18164. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .modeMux = 1'b0;
  18165. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .FeedbackMux = 1'b0;
  18166. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .ShiftMux = 1'b0;
  18167. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .BypassEn = 1'b0;
  18168. defparam \macro_inst|u_uart[0]|u_regs|rx_read[3] .CarryEnb = 1'b1;
  18169. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[4] (
  18170. .A(\macro_inst|u_ahb2apb|paddr [8]),
  18171. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  18172. .C(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18173. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18174. .Cin(),
  18175. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [4]),
  18176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  18177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  18178. .SyncReset(),
  18179. .ShiftData(),
  18180. .SyncLoad(),
  18181. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~4_combout ),
  18182. .Cout(),
  18183. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [4]));
  18184. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .coord_x = 12;
  18185. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .coord_y = 2;
  18186. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .coord_z = 12;
  18187. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .mask = 16'h4000;
  18188. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .modeMux = 1'b0;
  18189. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .FeedbackMux = 1'b0;
  18190. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .ShiftMux = 1'b0;
  18191. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .BypassEn = 1'b0;
  18192. defparam \macro_inst|u_uart[0]|u_regs|rx_read[4] .CarryEnb = 1'b1;
  18193. alta_slice \macro_inst|u_uart[0]|u_regs|rx_read[5] (
  18194. .A(\macro_inst|u_ahb2apb|paddr [8]),
  18195. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  18196. .C(\macro_inst|u_uart[0]|u_regs|apb_read0~combout ),
  18197. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18198. .Cin(),
  18199. .Qin(\macro_inst|u_uart[0]|u_regs|rx_read [5]),
  18200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  18201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  18202. .SyncReset(),
  18203. .ShiftData(),
  18204. .SyncLoad(),
  18205. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_read~5_combout ),
  18206. .Cout(),
  18207. .Q(\macro_inst|u_uart[0]|u_regs|rx_read [5]));
  18208. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .coord_x = 12;
  18209. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .coord_y = 2;
  18210. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .coord_z = 2;
  18211. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .mask = 16'h8000;
  18212. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .modeMux = 1'b0;
  18213. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .FeedbackMux = 1'b0;
  18214. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .ShiftMux = 1'b0;
  18215. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .BypassEn = 1'b0;
  18216. defparam \macro_inst|u_uart[0]|u_regs|rx_read[5] .CarryEnb = 1'b1;
  18217. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[0] (
  18218. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18219. .B(\macro_inst|u_uart[0]|u_regs|Mux0~4_combout ),
  18220. .C(\macro_inst|u_uart[0]|u_regs|Mux0~2_combout ),
  18221. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18222. .Cin(),
  18223. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [0]),
  18224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18225. .AsyncReset(AsyncReset_X47_Y2_GND),
  18226. .SyncReset(),
  18227. .ShiftData(),
  18228. .SyncLoad(),
  18229. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux0~5_combout ),
  18230. .Cout(),
  18231. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [0]));
  18232. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .coord_x = 4;
  18233. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .coord_y = 4;
  18234. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .coord_z = 9;
  18235. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .mask = 16'h50CC;
  18236. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .modeMux = 1'b0;
  18237. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .FeedbackMux = 1'b0;
  18238. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .ShiftMux = 1'b0;
  18239. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .BypassEn = 1'b0;
  18240. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[0] .CarryEnb = 1'b1;
  18241. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[1] (
  18242. .A(\macro_inst|u_uart[0]|u_regs|Mux1~2_combout ),
  18243. .B(\macro_inst|u_ahb2apb|paddr [9]),
  18244. .C(\macro_inst|u_uart[0]|u_regs|Mux1~4_combout ),
  18245. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18246. .Cin(),
  18247. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [1]),
  18248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  18249. .AsyncReset(AsyncReset_X50_Y2_GND),
  18250. .SyncReset(),
  18251. .ShiftData(),
  18252. .SyncLoad(),
  18253. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux1~5_combout ),
  18254. .Cout(),
  18255. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [1]));
  18256. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .coord_x = 14;
  18257. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .coord_y = 4;
  18258. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .coord_z = 10;
  18259. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .mask = 16'h22F0;
  18260. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .modeMux = 1'b0;
  18261. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .FeedbackMux = 1'b0;
  18262. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .ShiftMux = 1'b0;
  18263. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .BypassEn = 1'b0;
  18264. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[1] .CarryEnb = 1'b1;
  18265. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[2] (
  18266. .A(\macro_inst|u_uart[0]|u_regs|Mux2~2_combout ),
  18267. .B(\macro_inst|u_uart[0]|u_regs|Mux2~4_combout ),
  18268. .C(\macro_inst|u_ahb2apb|paddr [9]),
  18269. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18270. .Cin(),
  18271. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [2]),
  18272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18273. .AsyncReset(AsyncReset_X47_Y2_GND),
  18274. .SyncReset(),
  18275. .ShiftData(),
  18276. .SyncLoad(),
  18277. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux2~5_combout ),
  18278. .Cout(),
  18279. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [2]));
  18280. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .coord_x = 4;
  18281. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .coord_y = 4;
  18282. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .coord_z = 14;
  18283. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .mask = 16'h0ACC;
  18284. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .modeMux = 1'b0;
  18285. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .FeedbackMux = 1'b0;
  18286. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .ShiftMux = 1'b0;
  18287. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .BypassEn = 1'b0;
  18288. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[2] .CarryEnb = 1'b1;
  18289. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[3] (
  18290. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18291. .B(\macro_inst|u_uart[0]|u_regs|Mux3~2_combout ),
  18292. .C(\macro_inst|u_uart[0]|u_regs|Mux3~4_combout ),
  18293. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18294. .Cin(),
  18295. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [3]),
  18296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18297. .AsyncReset(AsyncReset_X47_Y2_GND),
  18298. .SyncReset(),
  18299. .ShiftData(),
  18300. .SyncLoad(),
  18301. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux3~5_combout ),
  18302. .Cout(),
  18303. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [3]));
  18304. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .coord_x = 4;
  18305. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .coord_y = 4;
  18306. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .coord_z = 2;
  18307. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .mask = 16'h44F0;
  18308. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .modeMux = 1'b0;
  18309. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .FeedbackMux = 1'b0;
  18310. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .ShiftMux = 1'b0;
  18311. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .BypassEn = 1'b0;
  18312. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[3] .CarryEnb = 1'b1;
  18313. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[4] (
  18314. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18315. .B(\macro_inst|u_uart[0]|u_regs|Mux4~2_combout ),
  18316. .C(\macro_inst|u_ahb2apb|paddr [10]),
  18317. .D(\macro_inst|u_uart[0]|u_regs|Mux4~4_combout ),
  18318. .Cin(),
  18319. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [4]),
  18320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18321. .AsyncReset(AsyncReset_X47_Y2_GND),
  18322. .SyncReset(),
  18323. .ShiftData(),
  18324. .SyncLoad(),
  18325. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux4~5_combout ),
  18326. .Cout(),
  18327. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [4]));
  18328. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .coord_x = 4;
  18329. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .coord_y = 4;
  18330. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .coord_z = 6;
  18331. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .mask = 16'h4F40;
  18332. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .modeMux = 1'b0;
  18333. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .FeedbackMux = 1'b0;
  18334. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .ShiftMux = 1'b0;
  18335. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .BypassEn = 1'b0;
  18336. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[4] .CarryEnb = 1'b1;
  18337. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[5] (
  18338. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18339. .B(\macro_inst|u_uart[0]|u_regs|Mux5~2_combout ),
  18340. .C(\macro_inst|u_uart[0]|u_regs|Mux5~4_combout ),
  18341. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18342. .Cin(),
  18343. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [5]),
  18344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18345. .AsyncReset(AsyncReset_X47_Y2_GND),
  18346. .SyncReset(),
  18347. .ShiftData(),
  18348. .SyncLoad(),
  18349. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux5~5_combout ),
  18350. .Cout(),
  18351. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [5]));
  18352. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .coord_x = 4;
  18353. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .coord_y = 4;
  18354. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .coord_z = 5;
  18355. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .mask = 16'h44F0;
  18356. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .modeMux = 1'b0;
  18357. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .FeedbackMux = 1'b0;
  18358. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .ShiftMux = 1'b0;
  18359. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .BypassEn = 1'b0;
  18360. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[5] .CarryEnb = 1'b1;
  18361. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[6] (
  18362. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18363. .B(\macro_inst|u_uart[0]|u_regs|Mux6~2_combout ),
  18364. .C(\macro_inst|u_uart[0]|u_regs|Mux6~4_combout ),
  18365. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18366. .Cin(),
  18367. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [6]),
  18368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y2_SIG_VCC ),
  18369. .AsyncReset(AsyncReset_X47_Y2_GND),
  18370. .SyncReset(),
  18371. .ShiftData(),
  18372. .SyncLoad(),
  18373. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux6~5_combout ),
  18374. .Cout(),
  18375. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [6]));
  18376. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .coord_x = 4;
  18377. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .coord_y = 4;
  18378. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .coord_z = 3;
  18379. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .mask = 16'h44F0;
  18380. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .modeMux = 1'b0;
  18381. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .FeedbackMux = 1'b0;
  18382. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .ShiftMux = 1'b0;
  18383. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .BypassEn = 1'b0;
  18384. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[6] .CarryEnb = 1'b1;
  18385. alta_slice \macro_inst|u_uart[0]|u_regs|rx_reg[7] (
  18386. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18387. .B(\macro_inst|u_uart[0]|u_regs|Mux7~2_combout ),
  18388. .C(\macro_inst|u_ahb2apb|paddr [10]),
  18389. .D(\macro_inst|u_uart[0]|u_regs|Mux7~4_combout ),
  18390. .Cin(),
  18391. .Qin(\macro_inst|u_uart[0]|u_regs|rx_reg [7]),
  18392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  18393. .AsyncReset(AsyncReset_X56_Y5_GND),
  18394. .SyncReset(),
  18395. .ShiftData(),
  18396. .SyncLoad(),
  18397. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux7~5_combout ),
  18398. .Cout(),
  18399. .Q(\macro_inst|u_uart[0]|u_regs|rx_reg [7]));
  18400. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .coord_x = 17;
  18401. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .coord_y = 3;
  18402. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .coord_z = 13;
  18403. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .mask = 16'h4F40;
  18404. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .modeMux = 1'b0;
  18405. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .FeedbackMux = 1'b0;
  18406. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .ShiftMux = 1'b0;
  18407. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .BypassEn = 1'b0;
  18408. defparam \macro_inst|u_uart[0]|u_regs|rx_reg[7] .CarryEnb = 1'b1;
  18409. alta_slice \macro_inst|u_uart[0]|u_regs|status_reg[0] (
  18410. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  18411. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  18412. .C(\macro_inst|u_uart[0]|u_regs|Mux12~1_combout ),
  18413. .D(\macro_inst|u_ahb2apb|paddr [8]),
  18414. .Cin(),
  18415. .Qin(\macro_inst|u_uart[0]|u_regs|status_reg [0]),
  18416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  18417. .AsyncReset(AsyncReset_X58_Y1_GND),
  18418. .SyncReset(SyncReset_X58_Y1_GND),
  18419. .ShiftData(),
  18420. .SyncLoad(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y1_INV ),
  18421. .LutOut(\macro_inst|u_uart[0]|u_regs|status_reg[0]~0_combout ),
  18422. .Cout(),
  18423. .Q(\macro_inst|u_uart[0]|u_regs|status_reg [0]));
  18424. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .coord_x = 10;
  18425. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .coord_y = 1;
  18426. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .coord_z = 11;
  18427. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .mask = 16'hCCAA;
  18428. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .modeMux = 1'b0;
  18429. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .FeedbackMux = 1'b0;
  18430. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .ShiftMux = 1'b0;
  18431. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .BypassEn = 1'b1;
  18432. defparam \macro_inst|u_uart[0]|u_regs|status_reg[0] .CarryEnb = 1'b1;
  18433. alta_slice \macro_inst|u_uart[0]|u_regs|status_reg[1] (
  18434. .A(\macro_inst|u_uart[0]|u_regs|Mux11~2_combout ),
  18435. .B(vcc),
  18436. .C(\macro_inst|u_uart[0]|u_regs|Mux11~0_combout ),
  18437. .D(\macro_inst|u_ahb2apb|paddr [10]),
  18438. .Cin(),
  18439. .Qin(\macro_inst|u_uart[0]|u_regs|status_reg [1]),
  18440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  18441. .AsyncReset(AsyncReset_X53_Y1_GND),
  18442. .SyncReset(),
  18443. .ShiftData(),
  18444. .SyncLoad(),
  18445. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux11~3_combout ),
  18446. .Cout(),
  18447. .Q(\macro_inst|u_uart[0]|u_regs|status_reg [1]));
  18448. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .coord_x = 9;
  18449. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .coord_y = 2;
  18450. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .coord_z = 7;
  18451. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .mask = 16'h0F05;
  18452. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .modeMux = 1'b0;
  18453. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .FeedbackMux = 1'b0;
  18454. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .ShiftMux = 1'b0;
  18455. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .BypassEn = 1'b0;
  18456. defparam \macro_inst|u_uart[0]|u_regs|status_reg[1] .CarryEnb = 1'b1;
  18457. alta_slice \macro_inst|u_uart[0]|u_regs|status_reg[2] (
  18458. .A(\macro_inst|u_uart[0]|u_regs|status_reg[2]~1_combout ),
  18459. .B(vcc),
  18460. .C(\macro_inst|u_uart[0]|u_regs|Mux10~1_combout ),
  18461. .D(vcc),
  18462. .Cin(),
  18463. .Qin(\macro_inst|u_uart[0]|u_regs|status_reg [2]),
  18464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  18465. .AsyncReset(AsyncReset_X58_Y3_GND),
  18466. .SyncReset(SyncReset_X58_Y3_GND),
  18467. .ShiftData(),
  18468. .SyncLoad(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y3_INV ),
  18469. .LutOut(\macro_inst|u_uart[0]|u_regs|status_reg[2]~feeder_combout ),
  18470. .Cout(),
  18471. .Q(\macro_inst|u_uart[0]|u_regs|status_reg [2]));
  18472. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .coord_x = 16;
  18473. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .coord_y = 2;
  18474. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .coord_z = 10;
  18475. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .mask = 16'hAAAA;
  18476. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .modeMux = 1'b0;
  18477. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .FeedbackMux = 1'b0;
  18478. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .ShiftMux = 1'b0;
  18479. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .BypassEn = 1'b1;
  18480. defparam \macro_inst|u_uart[0]|u_regs|status_reg[2] .CarryEnb = 1'b1;
  18481. alta_slice \macro_inst|u_uart[0]|u_regs|status_reg[4] (
  18482. .A(\macro_inst|u_uart[0]|u_regs|status_reg[2]~1_combout ),
  18483. .B(\macro_inst|u_ahb2apb|paddr [10]),
  18484. .C(\macro_inst|u_uart[0]|u_regs|Mux10~1_combout ),
  18485. .D(vcc),
  18486. .Cin(),
  18487. .Qin(\macro_inst|u_uart[0]|u_regs|status_reg [4]),
  18488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  18489. .AsyncReset(AsyncReset_X57_Y3_GND),
  18490. .SyncReset(),
  18491. .ShiftData(),
  18492. .SyncLoad(),
  18493. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux8~0_combout ),
  18494. .Cout(),
  18495. .Q(\macro_inst|u_uart[0]|u_regs|status_reg [4]));
  18496. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .coord_x = 16;
  18497. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .coord_y = 1;
  18498. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .coord_z = 2;
  18499. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .mask = 16'h4747;
  18500. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .modeMux = 1'b0;
  18501. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .FeedbackMux = 1'b0;
  18502. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .ShiftMux = 1'b0;
  18503. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .BypassEn = 1'b0;
  18504. defparam \macro_inst|u_uart[0]|u_regs|status_reg[4] .CarryEnb = 1'b1;
  18505. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] (
  18506. .A(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [0]),
  18507. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_complete~q ),
  18508. .C(\rv32.mem_ahb_hwdata[12] ),
  18509. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_idle~q ),
  18510. .Cin(),
  18511. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [0]),
  18512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  18513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  18514. .SyncReset(SyncReset_X52_Y2_GND),
  18515. .ShiftData(),
  18516. .SyncLoad(SyncLoad_X52_Y2_VCC),
  18517. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~3_combout ),
  18518. .Cout(),
  18519. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [0]));
  18520. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .coord_x = 9;
  18521. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .coord_y = 3;
  18522. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .coord_z = 2;
  18523. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .mask = 16'hEAC0;
  18524. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .modeMux = 1'b0;
  18525. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .FeedbackMux = 1'b1;
  18526. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .ShiftMux = 1'b0;
  18527. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .BypassEn = 1'b1;
  18528. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[0] .CarryEnb = 1'b1;
  18529. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] (
  18530. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ),
  18531. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  18532. .C(\rv32.mem_ahb_hwdata[12] ),
  18533. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  18534. .Cin(),
  18535. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [1]),
  18536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X47_Y4_SIG_SIG ),
  18537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y4_SIG ),
  18538. .SyncReset(SyncReset_X47_Y4_GND),
  18539. .ShiftData(),
  18540. .SyncLoad(SyncLoad_X47_Y4_VCC),
  18541. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  18542. .Cout(),
  18543. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [1]));
  18544. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .coord_x = 10;
  18545. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .coord_y = 4;
  18546. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .coord_z = 12;
  18547. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .mask = 16'h4400;
  18548. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .modeMux = 1'b0;
  18549. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .FeedbackMux = 1'b0;
  18550. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .ShiftMux = 1'b0;
  18551. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .BypassEn = 1'b1;
  18552. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[1] .CarryEnb = 1'b1;
  18553. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] (
  18554. .A(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [3]),
  18555. .B(\macro_inst|u_ahb2apb|paddr [9]),
  18556. .C(\rv32.mem_ahb_hwdata[12] ),
  18557. .D(\macro_inst|u_uart[0]|u_regs|Selector0~0_combout ),
  18558. .Cin(),
  18559. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [2]),
  18560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  18561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  18562. .SyncReset(SyncReset_X54_Y2_GND),
  18563. .ShiftData(),
  18564. .SyncLoad(SyncLoad_X54_Y2_VCC),
  18565. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector0~1_combout ),
  18566. .Cout(),
  18567. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [2]));
  18568. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .coord_x = 14;
  18569. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .coord_y = 5;
  18570. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .coord_z = 11;
  18571. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .mask = 16'hBBC0;
  18572. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .modeMux = 1'b0;
  18573. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .FeedbackMux = 1'b1;
  18574. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .ShiftMux = 1'b0;
  18575. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .BypassEn = 1'b1;
  18576. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[2] .CarryEnb = 1'b1;
  18577. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] (
  18578. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_complete~q ),
  18579. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_idle~q ),
  18580. .C(\rv32.mem_ahb_hwdata[12] ),
  18581. .D(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [3]),
  18582. .Cin(),
  18583. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [3]),
  18584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  18585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  18586. .SyncReset(SyncReset_X53_Y2_GND),
  18587. .ShiftData(),
  18588. .SyncLoad(SyncLoad_X53_Y2_VCC),
  18589. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~18_combout ),
  18590. .Cout(),
  18591. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [3]));
  18592. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .coord_x = 11;
  18593. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .coord_y = 3;
  18594. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .coord_z = 10;
  18595. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .mask = 16'hECA0;
  18596. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .modeMux = 1'b0;
  18597. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .FeedbackMux = 1'b1;
  18598. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .ShiftMux = 1'b0;
  18599. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .BypassEn = 1'b1;
  18600. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[3] .CarryEnb = 1'b1;
  18601. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] (
  18602. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_idle~q ),
  18603. .B(\macro_inst|u_uart[0]|u_regs|rx_idle_ie [4]),
  18604. .C(\rv32.mem_ahb_hwdata[12] ),
  18605. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_complete~q ),
  18606. .Cin(),
  18607. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [4]),
  18608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  18609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  18610. .SyncReset(SyncReset_X57_Y3_GND),
  18611. .ShiftData(),
  18612. .SyncLoad(SyncLoad_X57_Y3_VCC),
  18613. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~23_combout ),
  18614. .Cout(),
  18615. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [4]));
  18616. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .coord_x = 16;
  18617. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .coord_y = 1;
  18618. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .coord_z = 13;
  18619. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .mask = 16'hF888;
  18620. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .modeMux = 1'b0;
  18621. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .FeedbackMux = 1'b1;
  18622. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .ShiftMux = 1'b0;
  18623. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .BypassEn = 1'b1;
  18624. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[4] .CarryEnb = 1'b1;
  18625. alta_slice \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] (
  18626. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  18627. .B(\macro_inst|u_uart[0]|u_regs|Selector0~2_combout ),
  18628. .C(\rv32.mem_ahb_hwdata[12] ),
  18629. .D(\macro_inst|u_uart[0]|u_regs|Selector0~1_combout ),
  18630. .Cin(),
  18631. .Qin(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [5]),
  18632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X60_Y2_SIG_SIG ),
  18633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y2_SIG ),
  18634. .SyncReset(SyncReset_X60_Y2_GND),
  18635. .ShiftData(),
  18636. .SyncLoad(SyncLoad_X60_Y2_VCC),
  18637. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector0~3_combout ),
  18638. .Cout(),
  18639. .Q(\macro_inst|u_uart[0]|u_regs|tx_complete_ie [5]));
  18640. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .coord_x = 15;
  18641. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .coord_y = 3;
  18642. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .coord_z = 7;
  18643. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .mask = 16'hE6C4;
  18644. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .modeMux = 1'b0;
  18645. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .FeedbackMux = 1'b1;
  18646. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .ShiftMux = 1'b0;
  18647. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .BypassEn = 1'b1;
  18648. defparam \macro_inst|u_uart[0]|u_regs|tx_complete_ie[5] .CarryEnb = 1'b1;
  18649. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] (
  18650. .A(),
  18651. .B(),
  18652. .C(vcc),
  18653. .D(\rv32.mem_ahb_hwdata[1] ),
  18654. .Cin(),
  18655. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [0]),
  18656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout_X57_Y2_SIG_SIG ),
  18657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
  18658. .SyncReset(),
  18659. .ShiftData(),
  18660. .SyncLoad(),
  18661. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_dma_en[0]__feeder__LutOut ),
  18662. .Cout(),
  18663. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [0]));
  18664. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .coord_x = 12;
  18665. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .coord_y = 3;
  18666. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .coord_z = 10;
  18667. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .mask = 16'hFF00;
  18668. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .modeMux = 1'b1;
  18669. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .FeedbackMux = 1'b0;
  18670. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .ShiftMux = 1'b0;
  18671. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .BypassEn = 1'b0;
  18672. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[0] .CarryEnb = 1'b1;
  18673. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] (
  18674. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  18675. .B(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  18676. .C(\rv32.mem_ahb_hwdata[1] ),
  18677. .D(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  18678. .Cin(),
  18679. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [1]),
  18680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[1]~1_combout_X57_Y2_SIG_SIG ),
  18681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y2_SIG ),
  18682. .SyncReset(SyncReset_X57_Y2_GND),
  18683. .ShiftData(),
  18684. .SyncLoad(SyncLoad_X57_Y2_VCC),
  18685. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[0]~0_combout ),
  18686. .Cout(),
  18687. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [1]));
  18688. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .coord_x = 12;
  18689. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .coord_y = 3;
  18690. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .coord_z = 14;
  18691. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .mask = 16'h8800;
  18692. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .modeMux = 1'b0;
  18693. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .FeedbackMux = 1'b0;
  18694. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .ShiftMux = 1'b0;
  18695. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .BypassEn = 1'b1;
  18696. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[1] .CarryEnb = 1'b1;
  18697. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] (
  18698. .A(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  18699. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  18700. .C(\rv32.mem_ahb_hwdata[1] ),
  18701. .D(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  18702. .Cin(),
  18703. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [2]),
  18704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout_X46_Y4_SIG_SIG ),
  18705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ),
  18706. .SyncReset(SyncReset_X46_Y4_GND),
  18707. .ShiftData(),
  18708. .SyncLoad(SyncLoad_X46_Y4_VCC),
  18709. .LutOut(\macro_inst|u_uart[0]|u_regs|rx_dma_en[2]~4_combout ),
  18710. .Cout(),
  18711. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [2]));
  18712. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .coord_x = 17;
  18713. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .coord_y = 2;
  18714. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .coord_z = 13;
  18715. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .mask = 16'h8800;
  18716. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .modeMux = 1'b0;
  18717. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .FeedbackMux = 1'b0;
  18718. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .ShiftMux = 1'b0;
  18719. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .BypassEn = 1'b1;
  18720. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[2] .CarryEnb = 1'b1;
  18721. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] (
  18722. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18723. .B(\macro_inst|u_uart[0]|u_regs|tx_dma_en [2]),
  18724. .C(\rv32.mem_ahb_hwdata[1] ),
  18725. .D(\macro_inst|u_uart[0]|u_regs|Selector11~2_combout ),
  18726. .Cin(),
  18727. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [3]),
  18728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[3]~5_combout_X46_Y4_SIG_SIG ),
  18729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y4_SIG ),
  18730. .SyncReset(SyncReset_X46_Y4_GND),
  18731. .ShiftData(),
  18732. .SyncLoad(SyncLoad_X46_Y4_VCC),
  18733. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~3_combout ),
  18734. .Cout(),
  18735. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [3]));
  18736. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .coord_x = 17;
  18737. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .coord_y = 2;
  18738. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .coord_z = 7;
  18739. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .mask = 16'hF588;
  18740. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .modeMux = 1'b0;
  18741. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .FeedbackMux = 1'b1;
  18742. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .ShiftMux = 1'b0;
  18743. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .BypassEn = 1'b1;
  18744. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[3] .CarryEnb = 1'b1;
  18745. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] (
  18746. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  18747. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ),
  18748. .C(\rv32.mem_ahb_hwdata[1] ),
  18749. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  18750. .Cin(),
  18751. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [4]),
  18752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[4]~3_combout_X57_Y1_SIG_SIG ),
  18753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  18754. .SyncReset(SyncReset_X57_Y1_GND),
  18755. .ShiftData(),
  18756. .SyncLoad(SyncLoad_X57_Y1_VCC),
  18757. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  18758. .Cout(),
  18759. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [4]));
  18760. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .coord_x = 12;
  18761. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .coord_y = 2;
  18762. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .coord_z = 9;
  18763. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .mask = 16'h2200;
  18764. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .modeMux = 1'b0;
  18765. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .FeedbackMux = 1'b0;
  18766. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .ShiftMux = 1'b0;
  18767. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .BypassEn = 1'b1;
  18768. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[4] .CarryEnb = 1'b1;
  18769. alta_slice \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] (
  18770. .A(\macro_inst|u_uart[0]|u_regs|tx_dma_en [4]),
  18771. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9_combout ),
  18772. .C(\rv32.mem_ahb_hwdata[1] ),
  18773. .D(\macro_inst|u_uart[0]|u_regs|Selector11~10_combout ),
  18774. .Cin(),
  18775. .Qin(\macro_inst|u_uart[0]|u_regs|tx_dma_en [5]),
  18776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_dma_en[5]~2_combout_X58_Y4_SIG_SIG ),
  18777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y4_SIG ),
  18778. .SyncReset(SyncReset_X58_Y4_GND),
  18779. .ShiftData(),
  18780. .SyncLoad(SyncLoad_X58_Y4_VCC),
  18781. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~11_combout ),
  18782. .Cout(),
  18783. .Q(\macro_inst|u_uart[0]|u_regs|tx_dma_en [5]));
  18784. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .coord_x = 17;
  18785. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .coord_y = 4;
  18786. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .coord_z = 8;
  18787. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .mask = 16'hBBC0;
  18788. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .modeMux = 1'b0;
  18789. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .FeedbackMux = 1'b1;
  18790. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .ShiftMux = 1'b0;
  18791. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .BypassEn = 1'b1;
  18792. defparam \macro_inst|u_uart[0]|u_regs|tx_dma_en[5] .CarryEnb = 1'b1;
  18793. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] (
  18794. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18795. .B(\macro_inst|u_ahb2apb|paddr [8]),
  18796. .C(\rv32.mem_ahb_hwdata[5] ),
  18797. .D(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [1]),
  18798. .Cin(),
  18799. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [0]),
  18800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~16_combout_X52_Y2_SIG_SIG ),
  18801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  18802. .SyncReset(SyncReset_X52_Y2_GND),
  18803. .ShiftData(),
  18804. .SyncLoad(SyncLoad_X52_Y2_VCC),
  18805. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~6_combout ),
  18806. .Cout(),
  18807. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [0]));
  18808. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .coord_x = 9;
  18809. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .coord_y = 3;
  18810. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .coord_z = 1;
  18811. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .mask = 16'hDC98;
  18812. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .modeMux = 1'b0;
  18813. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .FeedbackMux = 1'b1;
  18814. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .ShiftMux = 1'b0;
  18815. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .BypassEn = 1'b1;
  18816. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[0] .CarryEnb = 1'b1;
  18817. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] (
  18818. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  18819. .B(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  18820. .C(\rv32.mem_ahb_hwdata[5] ),
  18821. .D(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  18822. .Cin(),
  18823. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [1]),
  18824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~17_combout_X52_Y4_SIG_SIG ),
  18825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ),
  18826. .SyncReset(SyncReset_X52_Y4_GND),
  18827. .ShiftData(),
  18828. .SyncLoad(SyncLoad_X52_Y4_VCC),
  18829. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~3_combout ),
  18830. .Cout(),
  18831. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [1]));
  18832. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .coord_x = 2;
  18833. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .coord_y = 3;
  18834. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .coord_z = 1;
  18835. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .mask = 16'hDD00;
  18836. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .modeMux = 1'b0;
  18837. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .FeedbackMux = 1'b0;
  18838. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .ShiftMux = 1'b0;
  18839. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .BypassEn = 1'b1;
  18840. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[1] .CarryEnb = 1'b1;
  18841. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] (
  18842. .A(),
  18843. .B(),
  18844. .C(vcc),
  18845. .D(\rv32.mem_ahb_hwdata[5] ),
  18846. .Cin(),
  18847. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [2]),
  18848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~18_combout_X54_Y2_SIG_SIG ),
  18849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y2_SIG ),
  18850. .SyncReset(),
  18851. .ShiftData(),
  18852. .SyncLoad(),
  18853. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2]__feeder__LutOut ),
  18854. .Cout(),
  18855. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [2]));
  18856. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .coord_x = 14;
  18857. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .coord_y = 5;
  18858. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .coord_z = 1;
  18859. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .mask = 16'hFF00;
  18860. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .modeMux = 1'b1;
  18861. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .FeedbackMux = 1'b0;
  18862. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .ShiftMux = 1'b0;
  18863. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .BypassEn = 1'b0;
  18864. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[2] .CarryEnb = 1'b1;
  18865. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] (
  18866. .A(\macro_inst|u_ahb2apb|paddr [9]),
  18867. .B(\macro_inst|u_uart[0]|u_regs|Selector7~6_combout ),
  18868. .C(\rv32.mem_ahb_hwdata[5] ),
  18869. .D(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [2]),
  18870. .Cin(),
  18871. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [3]),
  18872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~19_combout_X53_Y2_SIG_SIG ),
  18873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  18874. .SyncReset(SyncReset_X53_Y2_GND),
  18875. .ShiftData(),
  18876. .SyncLoad(SyncLoad_X53_Y2_VCC),
  18877. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~7_combout ),
  18878. .Cout(),
  18879. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [3]));
  18880. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .coord_x = 11;
  18881. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .coord_y = 3;
  18882. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .coord_z = 6;
  18883. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .mask = 16'hE6C4;
  18884. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .modeMux = 1'b0;
  18885. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .FeedbackMux = 1'b1;
  18886. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .ShiftMux = 1'b0;
  18887. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .BypassEn = 1'b1;
  18888. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[3] .CarryEnb = 1'b1;
  18889. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] (
  18890. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  18891. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  18892. .C(\rv32.mem_ahb_hwdata[5] ),
  18893. .D(\macro_inst|u_uart[0]|u_regs|status_reg [2]),
  18894. .Cin(),
  18895. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [4]),
  18896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[4]~20_combout_X57_Y3_SIG_SIG ),
  18897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  18898. .SyncReset(SyncReset_X57_Y3_GND),
  18899. .ShiftData(),
  18900. .SyncLoad(SyncLoad_X57_Y3_VCC),
  18901. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector7~4_combout ),
  18902. .Cout(),
  18903. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [4]));
  18904. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .coord_x = 16;
  18905. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .coord_y = 1;
  18906. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .coord_z = 4;
  18907. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .mask = 16'hD9C8;
  18908. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .modeMux = 1'b0;
  18909. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .FeedbackMux = 1'b1;
  18910. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .ShiftMux = 1'b0;
  18911. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .BypassEn = 1'b1;
  18912. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[4] .CarryEnb = 1'b1;
  18913. alta_slice \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] (
  18914. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  18915. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie [5]),
  18916. .C(\rv32.mem_ahb_hwdata[5] ),
  18917. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  18918. .Cin(),
  18919. .Qin(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [5]),
  18920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[5]~21_combout_X56_Y2_SIG_SIG ),
  18921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y2_SIG ),
  18922. .SyncReset(SyncReset_X56_Y2_GND),
  18923. .ShiftData(),
  18924. .SyncLoad(SyncLoad_X56_Y2_VCC),
  18925. .LutOut(\macro_inst|u_uart[0]|u_regs|interrupts~25_combout ),
  18926. .Cout(),
  18927. .Q(\macro_inst|u_uart[0]|u_regs|tx_not_full_ie [5]));
  18928. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .coord_x = 12;
  18929. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .coord_y = 1;
  18930. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .coord_z = 10;
  18931. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .mask = 16'h88F8;
  18932. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .modeMux = 1'b0;
  18933. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .FeedbackMux = 1'b1;
  18934. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .ShiftMux = 1'b0;
  18935. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .BypassEn = 1'b1;
  18936. defparam \macro_inst|u_uart[0]|u_regs|tx_not_full_ie[5] .CarryEnb = 1'b1;
  18937. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[0] (
  18938. .A(vcc),
  18939. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  18940. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18941. .D(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  18942. .Cin(),
  18943. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [0]),
  18944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  18945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  18946. .SyncReset(),
  18947. .ShiftData(),
  18948. .SyncLoad(),
  18949. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~0_combout ),
  18950. .Cout(),
  18951. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [0]));
  18952. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .coord_x = 15;
  18953. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .coord_y = 2;
  18954. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .coord_z = 9;
  18955. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .mask = 16'hC000;
  18956. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .modeMux = 1'b0;
  18957. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .FeedbackMux = 1'b0;
  18958. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .ShiftMux = 1'b0;
  18959. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .BypassEn = 1'b0;
  18960. defparam \macro_inst|u_uart[0]|u_regs|tx_write[0] .CarryEnb = 1'b1;
  18961. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[1] (
  18962. .A(vcc),
  18963. .B(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18964. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  18965. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  18966. .Cin(),
  18967. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [1]),
  18968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  18969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  18970. .SyncReset(),
  18971. .ShiftData(),
  18972. .SyncLoad(),
  18973. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~1_combout ),
  18974. .Cout(),
  18975. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [1]));
  18976. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .coord_x = 8;
  18977. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .coord_y = 2;
  18978. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .coord_z = 8;
  18979. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .mask = 16'hC000;
  18980. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .modeMux = 1'b0;
  18981. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .FeedbackMux = 1'b0;
  18982. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .ShiftMux = 1'b0;
  18983. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .BypassEn = 1'b0;
  18984. defparam \macro_inst|u_uart[0]|u_regs|tx_write[1] .CarryEnb = 1'b1;
  18985. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[2] (
  18986. .A(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  18987. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  18988. .C(vcc),
  18989. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  18990. .Cin(),
  18991. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [2]),
  18992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ),
  18993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  18994. .SyncReset(),
  18995. .ShiftData(),
  18996. .SyncLoad(),
  18997. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~2_combout ),
  18998. .Cout(),
  18999. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [2]));
  19000. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .coord_x = 11;
  19001. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .coord_y = 1;
  19002. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .coord_z = 1;
  19003. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .mask = 16'h8800;
  19004. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .modeMux = 1'b0;
  19005. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .FeedbackMux = 1'b0;
  19006. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .ShiftMux = 1'b0;
  19007. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .BypassEn = 1'b0;
  19008. defparam \macro_inst|u_uart[0]|u_regs|tx_write[2] .CarryEnb = 1'b1;
  19009. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[3] (
  19010. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  19011. .B(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  19012. .C(vcc),
  19013. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  19014. .Cin(),
  19015. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [3]),
  19016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  19017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  19018. .SyncReset(),
  19019. .ShiftData(),
  19020. .SyncLoad(),
  19021. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~3_combout ),
  19022. .Cout(),
  19023. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [3]));
  19024. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .coord_x = 14;
  19025. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .coord_y = 9;
  19026. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .coord_z = 14;
  19027. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .mask = 16'h8800;
  19028. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .modeMux = 1'b0;
  19029. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .FeedbackMux = 1'b0;
  19030. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .ShiftMux = 1'b0;
  19031. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .BypassEn = 1'b0;
  19032. defparam \macro_inst|u_uart[0]|u_regs|tx_write[3] .CarryEnb = 1'b1;
  19033. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[4] (
  19034. .A(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  19035. .B(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  19036. .C(\macro_inst|u_ahb2apb|paddr [8]),
  19037. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  19038. .Cin(),
  19039. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [4]),
  19040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  19041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  19042. .SyncReset(),
  19043. .ShiftData(),
  19044. .SyncLoad(),
  19045. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~4_combout ),
  19046. .Cout(),
  19047. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [4]));
  19048. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .coord_x = 11;
  19049. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .coord_y = 2;
  19050. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .coord_z = 13;
  19051. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .mask = 16'h0800;
  19052. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .modeMux = 1'b0;
  19053. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .FeedbackMux = 1'b0;
  19054. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .ShiftMux = 1'b0;
  19055. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .BypassEn = 1'b0;
  19056. defparam \macro_inst|u_uart[0]|u_regs|tx_write[4] .CarryEnb = 1'b1;
  19057. alta_slice \macro_inst|u_uart[0]|u_regs|tx_write[5] (
  19058. .A(\macro_inst|u_ahb2apb|paddr [8]),
  19059. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  19060. .C(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  19061. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  19062. .Cin(),
  19063. .Qin(\macro_inst|u_uart[0]|u_regs|tx_write [5]),
  19064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  19065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  19066. .SyncReset(),
  19067. .ShiftData(),
  19068. .SyncLoad(),
  19069. .LutOut(\macro_inst|u_uart[0]|u_regs|tx_write~5_combout ),
  19070. .Cout(),
  19071. .Q(\macro_inst|u_uart[0]|u_regs|tx_write [5]));
  19072. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .coord_x = 12;
  19073. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .coord_y = 2;
  19074. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .coord_z = 15;
  19075. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .mask = 16'h8000;
  19076. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .modeMux = 1'b0;
  19077. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .FeedbackMux = 1'b0;
  19078. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .ShiftMux = 1'b0;
  19079. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .BypassEn = 1'b0;
  19080. defparam \macro_inst|u_uart[0]|u_regs|tx_write[5] .CarryEnb = 1'b1;
  19081. alta_slice \macro_inst|u_uart[0]|u_regs|uart_en (
  19082. .A(\rv32.mem_ahb_hwdata[0] ),
  19083. .B(\macro_inst|u_uart[0]|u_regs|apb_write~0_combout ),
  19084. .C(vcc),
  19085. .D(\macro_inst|u_uart[0]|u_regs|always6~0_combout ),
  19086. .Cin(),
  19087. .Qin(\macro_inst|u_uart[0]|u_regs|uart_en~q ),
  19088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  19089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  19090. .SyncReset(),
  19091. .ShiftData(),
  19092. .SyncLoad(),
  19093. .LutOut(\macro_inst|u_uart[0]|u_regs|uart_en~0_combout ),
  19094. .Cout(),
  19095. .Q(\macro_inst|u_uart[0]|u_regs|uart_en~q ));
  19096. defparam \macro_inst|u_uart[0]|u_regs|uart_en .coord_x = 17;
  19097. defparam \macro_inst|u_uart[0]|u_regs|uart_en .coord_y = 6;
  19098. defparam \macro_inst|u_uart[0]|u_regs|uart_en .coord_z = 12;
  19099. defparam \macro_inst|u_uart[0]|u_regs|uart_en .mask = 16'hB8F0;
  19100. defparam \macro_inst|u_uart[0]|u_regs|uart_en .modeMux = 1'b0;
  19101. defparam \macro_inst|u_uart[0]|u_regs|uart_en .FeedbackMux = 1'b1;
  19102. defparam \macro_inst|u_uart[0]|u_regs|uart_en .ShiftMux = 1'b0;
  19103. defparam \macro_inst|u_uart[0]|u_regs|uart_en .BypassEn = 1'b0;
  19104. defparam \macro_inst|u_uart[0]|u_regs|uart_en .CarryEnb = 1'b1;
  19105. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Add4~0 (
  19106. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]),
  19107. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [3]),
  19108. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2]),
  19109. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]),
  19110. .Cin(),
  19111. .Qin(),
  19112. .Clk(),
  19113. .AsyncReset(),
  19114. .SyncReset(),
  19115. .ShiftData(),
  19116. .SyncLoad(),
  19117. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Add4~0_combout ),
  19118. .Cout(),
  19119. .Q());
  19120. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .coord_x = 16;
  19121. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .coord_y = 3;
  19122. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .coord_z = 2;
  19123. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .mask = 16'h3336;
  19124. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .modeMux = 1'b0;
  19125. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .FeedbackMux = 1'b0;
  19126. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .ShiftMux = 1'b0;
  19127. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .BypassEn = 1'b0;
  19128. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~0 .CarryEnb = 1'b1;
  19129. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Add4~1 (
  19130. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]),
  19131. .B(vcc),
  19132. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2]),
  19133. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]),
  19134. .Cin(),
  19135. .Qin(),
  19136. .Clk(),
  19137. .AsyncReset(),
  19138. .SyncReset(),
  19139. .ShiftData(),
  19140. .SyncLoad(),
  19141. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Add4~1_combout ),
  19142. .Cout(),
  19143. .Q());
  19144. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .coord_x = 16;
  19145. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .coord_y = 3;
  19146. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .coord_z = 3;
  19147. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .mask = 16'h0F5A;
  19148. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .modeMux = 1'b0;
  19149. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .FeedbackMux = 1'b0;
  19150. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .ShiftMux = 1'b0;
  19151. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .BypassEn = 1'b0;
  19152. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~1 .CarryEnb = 1'b1;
  19153. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Add4~2 (
  19154. .A(vcc),
  19155. .B(vcc),
  19156. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]),
  19157. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]),
  19158. .Cin(),
  19159. .Qin(),
  19160. .Clk(),
  19161. .AsyncReset(),
  19162. .SyncReset(),
  19163. .ShiftData(),
  19164. .SyncLoad(),
  19165. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Add4~2_combout ),
  19166. .Cout(),
  19167. .Q());
  19168. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .coord_x = 16;
  19169. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .coord_y = 3;
  19170. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .coord_z = 0;
  19171. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .mask = 16'h0FF0;
  19172. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .modeMux = 1'b0;
  19173. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .FeedbackMux = 1'b0;
  19174. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .ShiftMux = 1'b0;
  19175. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .BypassEn = 1'b0;
  19176. defparam \macro_inst|u_uart[0]|u_rx[0]|Add4~2 .CarryEnb = 1'b1;
  19177. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 (
  19178. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19179. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19180. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ),
  19181. .D(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19182. .Cin(),
  19183. .Qin(),
  19184. .Clk(),
  19185. .AsyncReset(),
  19186. .SyncReset(),
  19187. .ShiftData(),
  19188. .SyncLoad(),
  19189. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19190. .Cout(),
  19191. .Q());
  19192. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .coord_x = 7;
  19193. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .coord_y = 4;
  19194. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .coord_z = 9;
  19195. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .mask = 16'h1000;
  19196. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .modeMux = 1'b0;
  19197. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .FeedbackMux = 1'b0;
  19198. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .ShiftMux = 1'b0;
  19199. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .BypassEn = 1'b0;
  19200. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~1 .CarryEnb = 1'b1;
  19201. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 (
  19202. .A(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19203. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_sample~0_combout ),
  19204. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ),
  19205. .D(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19206. .Cin(),
  19207. .Qin(),
  19208. .Clk(),
  19209. .AsyncReset(),
  19210. .SyncReset(),
  19211. .ShiftData(),
  19212. .SyncLoad(),
  19213. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector1~2_combout ),
  19214. .Cout(),
  19215. .Q());
  19216. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .coord_x = 7;
  19217. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .coord_y = 4;
  19218. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .coord_z = 1;
  19219. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .mask = 16'h8000;
  19220. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .modeMux = 1'b0;
  19221. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .FeedbackMux = 1'b0;
  19222. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .ShiftMux = 1'b0;
  19223. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .BypassEn = 1'b0;
  19224. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~2 .CarryEnb = 1'b1;
  19225. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 (
  19226. .A(\macro_inst|u_uart[0]|u_rx[0]|always3~2_combout ),
  19227. .B(\macro_inst|u_uart[0]|u_rx[0]|Selector2~0_combout ),
  19228. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19229. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  19230. .Cin(),
  19231. .Qin(),
  19232. .Clk(),
  19233. .AsyncReset(),
  19234. .SyncReset(),
  19235. .ShiftData(),
  19236. .SyncLoad(),
  19237. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector1~3_combout ),
  19238. .Cout(),
  19239. .Q());
  19240. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .coord_x = 6;
  19241. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .coord_y = 4;
  19242. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .coord_z = 15;
  19243. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .mask = 16'hF0E0;
  19244. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .modeMux = 1'b0;
  19245. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .FeedbackMux = 1'b0;
  19246. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .ShiftMux = 1'b0;
  19247. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .BypassEn = 1'b0;
  19248. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector1~3 .CarryEnb = 1'b1;
  19249. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 (
  19250. .A(vcc),
  19251. .B(vcc),
  19252. .C(\macro_inst|u_uart[0]|u_rx[0]|Selector4~1_combout ),
  19253. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19254. .Cin(),
  19255. .Qin(),
  19256. .Clk(),
  19257. .AsyncReset(),
  19258. .SyncReset(),
  19259. .ShiftData(),
  19260. .SyncLoad(),
  19261. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector2~0_combout ),
  19262. .Cout(),
  19263. .Q());
  19264. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .coord_x = 6;
  19265. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .coord_y = 4;
  19266. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .coord_z = 9;
  19267. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .mask = 16'hF000;
  19268. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .modeMux = 1'b0;
  19269. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .FeedbackMux = 1'b0;
  19270. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .ShiftMux = 1'b0;
  19271. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .BypassEn = 1'b0;
  19272. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~0 .CarryEnb = 1'b1;
  19273. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 (
  19274. .A(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19275. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ),
  19276. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19277. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~3_combout ),
  19278. .Cin(),
  19279. .Qin(),
  19280. .Clk(),
  19281. .AsyncReset(),
  19282. .SyncReset(),
  19283. .ShiftData(),
  19284. .SyncLoad(),
  19285. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector2~1_combout ),
  19286. .Cout(),
  19287. .Q());
  19288. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .coord_x = 6;
  19289. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .coord_y = 4;
  19290. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .coord_z = 10;
  19291. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .mask = 16'h00E0;
  19292. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .modeMux = 1'b0;
  19293. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .FeedbackMux = 1'b0;
  19294. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .ShiftMux = 1'b0;
  19295. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .BypassEn = 1'b0;
  19296. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector2~1 .CarryEnb = 1'b1;
  19297. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 (
  19298. .A(vcc),
  19299. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19300. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19301. .D(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19302. .Cin(),
  19303. .Qin(),
  19304. .Clk(),
  19305. .AsyncReset(),
  19306. .SyncReset(),
  19307. .ShiftData(),
  19308. .SyncLoad(),
  19309. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector3~0_combout ),
  19310. .Cout(),
  19311. .Q());
  19312. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .coord_x = 6;
  19313. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .coord_y = 4;
  19314. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .coord_z = 8;
  19315. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .mask = 16'hC000;
  19316. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .modeMux = 1'b0;
  19317. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .FeedbackMux = 1'b0;
  19318. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .ShiftMux = 1'b0;
  19319. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .BypassEn = 1'b0;
  19320. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector3~0 .CarryEnb = 1'b1;
  19321. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 (
  19322. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  19323. .B(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19324. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19325. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19326. .Cin(),
  19327. .Qin(),
  19328. .Clk(),
  19329. .AsyncReset(),
  19330. .SyncReset(),
  19331. .ShiftData(),
  19332. .SyncLoad(),
  19333. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector4~0_combout ),
  19334. .Cout(),
  19335. .Q());
  19336. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .coord_x = 6;
  19337. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .coord_y = 4;
  19338. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .coord_z = 7;
  19339. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .mask = 16'hE0A0;
  19340. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .modeMux = 1'b0;
  19341. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .FeedbackMux = 1'b0;
  19342. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .ShiftMux = 1'b0;
  19343. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .BypassEn = 1'b0;
  19344. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~0 .CarryEnb = 1'b1;
  19345. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 (
  19346. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0]),
  19347. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3]),
  19348. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19349. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19350. .Cin(),
  19351. .Qin(),
  19352. .Clk(),
  19353. .AsyncReset(),
  19354. .SyncReset(),
  19355. .ShiftData(),
  19356. .SyncLoad(),
  19357. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector4~1_combout ),
  19358. .Cout(),
  19359. .Q());
  19360. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .coord_x = 7;
  19361. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .coord_y = 4;
  19362. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .coord_z = 3;
  19363. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .mask = 16'h0001;
  19364. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .modeMux = 1'b0;
  19365. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .FeedbackMux = 1'b0;
  19366. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .ShiftMux = 1'b0;
  19367. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .BypassEn = 1'b0;
  19368. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~1 .CarryEnb = 1'b1;
  19369. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 (
  19370. .A(vcc),
  19371. .B(\macro_inst|u_uart[0]|u_rx[0]|Selector4~1_combout ),
  19372. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ),
  19373. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19374. .Cin(),
  19375. .Qin(),
  19376. .Clk(),
  19377. .AsyncReset(),
  19378. .SyncReset(),
  19379. .ShiftData(),
  19380. .SyncLoad(),
  19381. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector4~2_combout ),
  19382. .Cout(),
  19383. .Q());
  19384. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .coord_x = 7;
  19385. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .coord_y = 4;
  19386. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .coord_z = 6;
  19387. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .mask = 16'h0C00;
  19388. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .modeMux = 1'b0;
  19389. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .FeedbackMux = 1'b0;
  19390. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .ShiftMux = 1'b0;
  19391. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .BypassEn = 1'b0;
  19392. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~2 .CarryEnb = 1'b1;
  19393. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 (
  19394. .A(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19395. .B(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19396. .C(\macro_inst|u_uart[0]|u_rx[0]|Selector4~2_combout ),
  19397. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ),
  19398. .Cin(),
  19399. .Qin(),
  19400. .Clk(),
  19401. .AsyncReset(),
  19402. .SyncReset(),
  19403. .ShiftData(),
  19404. .SyncLoad(),
  19405. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector4~3_combout ),
  19406. .Cout(),
  19407. .Q());
  19408. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .coord_x = 6;
  19409. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .coord_y = 4;
  19410. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .coord_z = 0;
  19411. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .mask = 16'hF855;
  19412. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .modeMux = 1'b0;
  19413. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .FeedbackMux = 1'b0;
  19414. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .ShiftMux = 1'b0;
  19415. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .BypassEn = 1'b0;
  19416. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~3 .CarryEnb = 1'b1;
  19417. alta_slice \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 (
  19418. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  19419. .B(\macro_inst|u_uart[0]|u_rx[0]|Selector4~0_combout ),
  19420. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19421. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector4~3_combout ),
  19422. .Cin(),
  19423. .Qin(),
  19424. .Clk(),
  19425. .AsyncReset(),
  19426. .SyncReset(),
  19427. .ShiftData(),
  19428. .SyncLoad(),
  19429. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector4~4_combout ),
  19430. .Cout(),
  19431. .Q());
  19432. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .coord_x = 6;
  19433. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .coord_y = 4;
  19434. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .coord_z = 1;
  19435. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .mask = 16'hCDCC;
  19436. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .modeMux = 1'b0;
  19437. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .FeedbackMux = 1'b0;
  19438. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .ShiftMux = 1'b0;
  19439. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .BypassEn = 1'b0;
  19440. defparam \macro_inst|u_uart[0]|u_rx[0]|Selector4~4 .CarryEnb = 1'b1;
  19441. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always11~2 (
  19442. .A(\macro_inst|u_uart[0]|u_rx[0]|always11~1_combout ),
  19443. .B(\macro_inst|u_uart[0]|u_rx[0]|always11~0_combout ),
  19444. .C(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19445. .D(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19446. .Cin(),
  19447. .Qin(),
  19448. .Clk(),
  19449. .AsyncReset(),
  19450. .SyncReset(),
  19451. .ShiftData(),
  19452. .SyncLoad(),
  19453. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always11~2_combout ),
  19454. .Cout(),
  19455. .Q());
  19456. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .coord_x = 6;
  19457. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .coord_y = 2;
  19458. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .coord_z = 2;
  19459. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .mask = 16'h0080;
  19460. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .modeMux = 1'b0;
  19461. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .FeedbackMux = 1'b0;
  19462. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .ShiftMux = 1'b0;
  19463. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .BypassEn = 1'b0;
  19464. defparam \macro_inst|u_uart[0]|u_rx[0]|always11~2 .CarryEnb = 1'b1;
  19465. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always2~0 (
  19466. .A(vcc),
  19467. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3]),
  19468. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0]),
  19469. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  19470. .Cin(),
  19471. .Qin(),
  19472. .Clk(),
  19473. .AsyncReset(),
  19474. .SyncReset(),
  19475. .ShiftData(),
  19476. .SyncLoad(),
  19477. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19478. .Cout(),
  19479. .Q());
  19480. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .coord_x = 7;
  19481. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .coord_y = 4;
  19482. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .coord_z = 8;
  19483. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .mask = 16'hC000;
  19484. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .modeMux = 1'b0;
  19485. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .FeedbackMux = 1'b0;
  19486. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .ShiftMux = 1'b0;
  19487. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .BypassEn = 1'b0;
  19488. defparam \macro_inst|u_uart[0]|u_rx[0]|always2~0 .CarryEnb = 1'b1;
  19489. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always3~1 (
  19490. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2]),
  19491. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]),
  19492. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [3]),
  19493. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]),
  19494. .Cin(),
  19495. .Qin(),
  19496. .Clk(),
  19497. .AsyncReset(),
  19498. .SyncReset(),
  19499. .ShiftData(),
  19500. .SyncLoad(),
  19501. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19502. .Cout(),
  19503. .Q());
  19504. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .coord_x = 8;
  19505. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .coord_y = 3;
  19506. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .coord_z = 12;
  19507. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .mask = 16'h0001;
  19508. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .modeMux = 1'b0;
  19509. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .FeedbackMux = 1'b0;
  19510. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .ShiftMux = 1'b0;
  19511. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .BypassEn = 1'b0;
  19512. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~1 .CarryEnb = 1'b1;
  19513. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always3~2 (
  19514. .A(vcc),
  19515. .B(vcc),
  19516. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19517. .D(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19518. .Cin(),
  19519. .Qin(),
  19520. .Clk(),
  19521. .AsyncReset(),
  19522. .SyncReset(),
  19523. .ShiftData(),
  19524. .SyncLoad(),
  19525. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always3~2_combout ),
  19526. .Cout(),
  19527. .Q());
  19528. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .coord_x = 6;
  19529. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .coord_y = 4;
  19530. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .coord_z = 4;
  19531. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .mask = 16'hF000;
  19532. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .modeMux = 1'b0;
  19533. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .FeedbackMux = 1'b0;
  19534. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .ShiftMux = 1'b0;
  19535. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .BypassEn = 1'b0;
  19536. defparam \macro_inst|u_uart[0]|u_rx[0]|always3~2 .CarryEnb = 1'b1;
  19537. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always4~2 (
  19538. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19539. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19540. .C(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19541. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19542. .Cin(),
  19543. .Qin(),
  19544. .Clk(),
  19545. .AsyncReset(),
  19546. .SyncReset(),
  19547. .ShiftData(),
  19548. .SyncLoad(),
  19549. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always4~2_combout ),
  19550. .Cout(),
  19551. .Q());
  19552. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .coord_x = 7;
  19553. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .coord_y = 4;
  19554. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .coord_z = 0;
  19555. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .mask = 16'h1000;
  19556. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .modeMux = 1'b0;
  19557. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .FeedbackMux = 1'b0;
  19558. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .ShiftMux = 1'b0;
  19559. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .BypassEn = 1'b0;
  19560. defparam \macro_inst|u_uart[0]|u_rx[0]|always4~2 .CarryEnb = 1'b1;
  19561. alta_slice \macro_inst|u_uart[0]|u_rx[0]|always8~0 (
  19562. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19563. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ),
  19564. .C(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19565. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~q ),
  19566. .Cin(),
  19567. .Qin(),
  19568. .Clk(),
  19569. .AsyncReset(),
  19570. .SyncReset(),
  19571. .ShiftData(),
  19572. .SyncLoad(),
  19573. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always8~0_combout ),
  19574. .Cout(),
  19575. .Q());
  19576. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .coord_x = 5;
  19577. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .coord_y = 2;
  19578. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .coord_z = 2;
  19579. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .mask = 16'h2000;
  19580. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .modeMux = 1'b0;
  19581. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .FeedbackMux = 1'b0;
  19582. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .ShiftMux = 1'b0;
  19583. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .BypassEn = 1'b0;
  19584. defparam \macro_inst|u_uart[0]|u_rx[0]|always8~0 .CarryEnb = 1'b1;
  19585. alta_slice \macro_inst|u_uart[0]|u_rx[0]|break_error (
  19586. .A(vcc),
  19587. .B(\macro_inst|u_uart[0]|u_rx[0]|always11~2_combout ),
  19588. .C(vcc),
  19589. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  19590. .Cin(),
  19591. .Qin(\macro_inst|u_uart[0]|u_rx[0]|break_error~q ),
  19592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  19593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  19594. .SyncReset(),
  19595. .ShiftData(),
  19596. .SyncLoad(),
  19597. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|break_error~0_combout ),
  19598. .Cout(),
  19599. .Q(\macro_inst|u_uart[0]|u_rx[0]|break_error~q ));
  19600. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .coord_x = 14;
  19601. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .coord_y = 4;
  19602. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .coord_z = 4;
  19603. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .mask = 16'hFCCC;
  19604. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .modeMux = 1'b0;
  19605. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .FeedbackMux = 1'b1;
  19606. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .ShiftMux = 1'b0;
  19607. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .BypassEn = 1'b0;
  19608. defparam \macro_inst|u_uart[0]|u_rx[0]|break_error .CarryEnb = 1'b1;
  19609. alta_slice \macro_inst|u_uart[0]|u_rx[0]|framing_error (
  19610. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  19611. .B(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19612. .C(vcc),
  19613. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19614. .Cin(),
  19615. .Qin(\macro_inst|u_uart[0]|u_rx[0]|framing_error~q ),
  19616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ),
  19617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  19618. .SyncReset(),
  19619. .ShiftData(),
  19620. .SyncLoad(),
  19621. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|framing_error~0_combout ),
  19622. .Cout(),
  19623. .Q(\macro_inst|u_uart[0]|u_rx[0]|framing_error~q ));
  19624. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .coord_x = 9;
  19625. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .coord_y = 3;
  19626. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .coord_z = 9;
  19627. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .mask = 16'hB3A0;
  19628. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .modeMux = 1'b0;
  19629. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .FeedbackMux = 1'b1;
  19630. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .ShiftMux = 1'b0;
  19631. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .BypassEn = 1'b0;
  19632. defparam \macro_inst|u_uart[0]|u_rx[0]|framing_error .CarryEnb = 1'b1;
  19633. alta_slice \macro_inst|u_uart[0]|u_rx[0]|overrun_error (
  19634. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  19635. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  19636. .C(vcc),
  19637. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19638. .Cin(),
  19639. .Qin(\macro_inst|u_uart[0]|u_rx[0]|overrun_error~q ),
  19640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  19641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  19642. .SyncReset(),
  19643. .ShiftData(),
  19644. .SyncLoad(),
  19645. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|overrun_error~0_combout ),
  19646. .Cout(),
  19647. .Q(\macro_inst|u_uart[0]|u_rx[0]|overrun_error~q ));
  19648. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .coord_x = 8;
  19649. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .coord_y = 3;
  19650. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .coord_z = 5;
  19651. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .mask = 16'hEAC0;
  19652. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .modeMux = 1'b0;
  19653. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .FeedbackMux = 1'b1;
  19654. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .ShiftMux = 1'b0;
  19655. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .BypassEn = 1'b0;
  19656. defparam \macro_inst|u_uart[0]|u_rx[0]|overrun_error .CarryEnb = 1'b1;
  19657. alta_slice \macro_inst|u_uart[0]|u_rx[0]|parity_error (
  19658. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  19659. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_sample~0_combout ),
  19660. .C(vcc),
  19661. .D(\macro_inst|u_uart[0]|u_rx[0]|parity_error~0_combout ),
  19662. .Cin(),
  19663. .Qin(\macro_inst|u_uart[0]|u_rx[0]|parity_error~q ),
  19664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  19665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  19666. .SyncReset(),
  19667. .ShiftData(),
  19668. .SyncLoad(),
  19669. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|parity_error~1_combout ),
  19670. .Cout(),
  19671. .Q(\macro_inst|u_uart[0]|u_rx[0]|parity_error~q ));
  19672. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .coord_x = 8;
  19673. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .coord_y = 3;
  19674. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .coord_z = 2;
  19675. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .mask = 16'hECA0;
  19676. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .modeMux = 1'b0;
  19677. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .FeedbackMux = 1'b1;
  19678. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .ShiftMux = 1'b0;
  19679. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .BypassEn = 1'b0;
  19680. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error .CarryEnb = 1'b1;
  19681. alta_slice \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 (
  19682. .A(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  19683. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~q ),
  19684. .C(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19685. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  19686. .Cin(),
  19687. .Qin(),
  19688. .Clk(),
  19689. .AsyncReset(),
  19690. .SyncReset(),
  19691. .ShiftData(),
  19692. .SyncLoad(),
  19693. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|parity_error~0_combout ),
  19694. .Cout(),
  19695. .Q());
  19696. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .coord_x = 14;
  19697. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .coord_y = 4;
  19698. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .coord_z = 2;
  19699. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .mask = 16'h6000;
  19700. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .modeMux = 1'b0;
  19701. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .FeedbackMux = 1'b0;
  19702. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .ShiftMux = 1'b0;
  19703. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .BypassEn = 1'b0;
  19704. defparam \macro_inst|u_uart[0]|u_rx[0]|parity_error~0 .CarryEnb = 1'b1;
  19705. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] (
  19706. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  19707. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0]),
  19708. .C(\~GND~combout ),
  19709. .D(vcc),
  19710. .Cin(),
  19711. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0]),
  19712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  19713. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  19714. .SyncReset(SyncReset_X49_Y2_GND),
  19715. .ShiftData(),
  19716. .SyncLoad(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ),
  19717. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0]~4_combout ),
  19718. .Cout(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0]~5 ),
  19719. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [0]));
  19720. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .coord_x = 7;
  19721. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .coord_y = 4;
  19722. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .coord_z = 10;
  19723. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .mask = 16'h6688;
  19724. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .modeMux = 1'b0;
  19725. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  19726. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  19727. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .BypassEn = 1'b1;
  19728. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  19729. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] (
  19730. .A(vcc),
  19731. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19732. .C(vcc),
  19733. .D(vcc),
  19734. .Cin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[0]~5 ),
  19735. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  19737. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  19738. .SyncReset(SyncReset_X49_Y2_GND),
  19739. .ShiftData(),
  19740. .SyncLoad(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ),
  19741. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1]~6_combout ),
  19742. .Cout(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1]~7 ),
  19743. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]));
  19744. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .coord_x = 7;
  19745. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .coord_y = 4;
  19746. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .coord_z = 11;
  19747. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .mask = 16'h3C3F;
  19748. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .modeMux = 1'b1;
  19749. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  19750. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  19751. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .BypassEn = 1'b1;
  19752. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  19753. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] (
  19754. .A(vcc),
  19755. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19756. .C(\~GND~combout ),
  19757. .D(vcc),
  19758. .Cin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[1]~7 ),
  19759. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  19761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  19762. .SyncReset(SyncReset_X49_Y2_GND),
  19763. .ShiftData(),
  19764. .SyncLoad(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ),
  19765. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2]~8_combout ),
  19766. .Cout(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2]~9 ),
  19767. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]));
  19768. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .coord_x = 7;
  19769. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .coord_y = 4;
  19770. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .coord_z = 12;
  19771. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .mask = 16'hC30C;
  19772. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .modeMux = 1'b1;
  19773. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  19774. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  19775. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .BypassEn = 1'b1;
  19776. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  19777. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] (
  19778. .A(vcc),
  19779. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3]),
  19780. .C(\~GND~combout ),
  19781. .D(vcc),
  19782. .Cin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[2]~9 ),
  19783. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3]),
  19784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  19785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  19786. .SyncReset(SyncReset_X49_Y2_GND),
  19787. .ShiftData(),
  19788. .SyncLoad(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ),
  19789. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3]~10_combout ),
  19790. .Cout(),
  19791. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [3]));
  19792. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .coord_x = 7;
  19793. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .coord_y = 4;
  19794. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .coord_z = 13;
  19795. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .mask = 16'h3C3C;
  19796. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .modeMux = 1'b1;
  19797. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  19798. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  19799. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .BypassEn = 1'b1;
  19800. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  19801. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_bit (
  19802. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  19803. .B(vcc),
  19804. .C(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  19805. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  19806. .Cin(),
  19807. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  19809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  19810. .SyncReset(),
  19811. .ShiftData(),
  19812. .SyncLoad(),
  19813. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always2~1_combout ),
  19814. .Cout(),
  19815. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ));
  19816. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .coord_x = 7;
  19817. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .coord_y = 4;
  19818. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .coord_z = 15;
  19819. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .mask = 16'hA000;
  19820. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .modeMux = 1'b0;
  19821. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .FeedbackMux = 1'b0;
  19822. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .ShiftMux = 1'b0;
  19823. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .BypassEn = 1'b0;
  19824. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_bit .CarryEnb = 1'b1;
  19825. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] (
  19826. .A(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  19827. .B(\macro_inst|u_uart[0]|u_rx[0]|always3~2_combout ),
  19828. .C(vcc),
  19829. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19830. .Cin(),
  19831. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]),
  19832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout_X51_Y2_SIG_SIG ),
  19833. .AsyncReset(AsyncReset_X51_Y2_GND),
  19834. .SyncReset(),
  19835. .ShiftData(),
  19836. .SyncLoad(),
  19837. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~4_combout ),
  19838. .Cout(),
  19839. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [0]));
  19840. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .coord_x = 8;
  19841. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .coord_y = 3;
  19842. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .coord_z = 1;
  19843. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .mask = 16'hFF07;
  19844. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .modeMux = 1'b0;
  19845. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  19846. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .ShiftMux = 1'b0;
  19847. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .BypassEn = 1'b0;
  19848. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[0] .CarryEnb = 1'b1;
  19849. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] (
  19850. .A(\macro_inst|u_uart[0]|u_rx[0]|Add4~2_combout ),
  19851. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19852. .C(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  19853. .D(\macro_inst|u_uart[0]|u_rx[0]|always3~2_combout ),
  19854. .Cin(),
  19855. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]),
  19856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout_X51_Y2_SIG_SIG ),
  19857. .AsyncReset(AsyncReset_X51_Y2_GND),
  19858. .SyncReset(),
  19859. .ShiftData(),
  19860. .SyncLoad(),
  19861. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~5_combout ),
  19862. .Cout(),
  19863. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [1]));
  19864. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .coord_x = 8;
  19865. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .coord_y = 3;
  19866. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .coord_z = 8;
  19867. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .mask = 16'hFCDD;
  19868. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .modeMux = 1'b0;
  19869. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  19870. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .ShiftMux = 1'b0;
  19871. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .BypassEn = 1'b0;
  19872. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1] .CarryEnb = 1'b1;
  19873. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 (
  19874. .A(vcc),
  19875. .B(vcc),
  19876. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19877. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19878. .Cin(),
  19879. .Qin(),
  19880. .Clk(),
  19881. .AsyncReset(),
  19882. .SyncReset(),
  19883. .ShiftData(),
  19884. .SyncLoad(),
  19885. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout ),
  19886. .Cout(),
  19887. .Q());
  19888. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .coord_x = 7;
  19889. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .coord_y = 1;
  19890. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .coord_z = 2;
  19891. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .mask = 16'hFFF0;
  19892. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .modeMux = 1'b0;
  19893. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .FeedbackMux = 1'b0;
  19894. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .ShiftMux = 1'b0;
  19895. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .BypassEn = 1'b0;
  19896. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3 .CarryEnb = 1'b1;
  19897. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] (
  19898. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  19899. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19900. .C(\macro_inst|u_uart[0]|u_rx[0]|Add4~1_combout ),
  19901. .D(\macro_inst|u_uart[0]|u_rx[0]|always3~1_combout ),
  19902. .Cin(),
  19903. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2]),
  19904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[1]~3_combout_X51_Y2_SIG_SIG ),
  19905. .AsyncReset(AsyncReset_X51_Y2_GND),
  19906. .SyncReset(),
  19907. .ShiftData(),
  19908. .SyncLoad(),
  19909. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~2_combout ),
  19910. .Cout(),
  19911. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [2]));
  19912. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .coord_x = 8;
  19913. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .coord_y = 3;
  19914. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .coord_z = 13;
  19915. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .mask = 16'hCDCF;
  19916. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .modeMux = 1'b0;
  19917. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  19918. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .ShiftMux = 1'b0;
  19919. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .BypassEn = 1'b0;
  19920. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[2] .CarryEnb = 1'b1;
  19921. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] (
  19922. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  19923. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  19924. .C(vcc),
  19925. .D(\macro_inst|u_uart[0]|u_rx[0]|Add4~0_combout ),
  19926. .Cin(),
  19927. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [3]),
  19928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ),
  19929. .AsyncReset(AsyncReset_X50_Y1_GND),
  19930. .SyncReset(),
  19931. .ShiftData(),
  19932. .SyncLoad(),
  19933. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt~1_combout ),
  19934. .Cout(),
  19935. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt [3]));
  19936. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .coord_x = 7;
  19937. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .coord_y = 1;
  19938. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .coord_z = 8;
  19939. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .mask = 16'h1054;
  19940. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .modeMux = 1'b0;
  19941. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  19942. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .ShiftMux = 1'b0;
  19943. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .BypassEn = 1'b0;
  19944. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_data_cnt[3] .CarryEnb = 1'b1;
  19945. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req (
  19946. .A(\rv32.ext_dma_DMACCLR[0] ),
  19947. .B(\macro_inst|u_uart[0]|u_regs|rx_dma_en [0]),
  19948. .C(vcc),
  19949. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  19950. .Cin(),
  19951. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~q ),
  19952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  19953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  19954. .SyncReset(),
  19955. .ShiftData(),
  19956. .SyncLoad(),
  19957. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~0_combout ),
  19958. .Cout(),
  19959. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~q ));
  19960. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .coord_x = 17;
  19961. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .coord_y = 1;
  19962. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .coord_z = 14;
  19963. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .mask = 16'h4440;
  19964. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .modeMux = 1'b0;
  19965. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .FeedbackMux = 1'b1;
  19966. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .ShiftMux = 1'b0;
  19967. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .BypassEn = 1'b0;
  19968. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req .CarryEnb = 1'b1;
  19969. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] (
  19970. .A(\macro_inst|u_uart[0]|u_regs|rx_read [0]),
  19971. .B(vcc),
  19972. .C(vcc),
  19973. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~1_combout ),
  19974. .Cin(),
  19975. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  19976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  19977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  19978. .SyncReset(),
  19979. .ShiftData(),
  19980. .SyncLoad(),
  19981. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter~0_combout ),
  19982. .Cout(),
  19983. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]));
  19984. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .coord_x = 17;
  19985. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .coord_y = 1;
  19986. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .coord_z = 15;
  19987. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .mask = 16'h5F50;
  19988. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .modeMux = 1'b0;
  19989. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  19990. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  19991. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .BypassEn = 1'b0;
  19992. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  19993. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] (
  19994. .A(\macro_inst|u_ahb2apb|paddr [8]),
  19995. .B(\macro_inst|u_ahb2apb|paddr [9]),
  19996. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [0]),
  19997. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~q ),
  19998. .Cin(),
  19999. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0]~q ),
  20000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20001. .AsyncReset(AsyncReset_X46_Y2_GND),
  20002. .SyncReset(SyncReset_X46_Y2_GND),
  20003. .ShiftData(),
  20004. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20005. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux0~3_combout ),
  20006. .Cout(),
  20007. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0]~q ));
  20008. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .coord_x = 7;
  20009. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .coord_y = 2;
  20010. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .coord_z = 1;
  20011. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .mask = 16'hBA98;
  20012. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  20013. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  20014. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  20015. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  20016. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  20017. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] (
  20018. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1]~q ),
  20019. .B(\macro_inst|u_ahb2apb|paddr [8]),
  20020. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1]),
  20021. .D(\macro_inst|u_ahb2apb|paddr [9]),
  20022. .Cin(),
  20023. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1]~q ),
  20024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X48_Y2_SIG_SIG ),
  20025. .AsyncReset(AsyncReset_X48_Y2_GND),
  20026. .SyncReset(SyncReset_X48_Y2_GND),
  20027. .ShiftData(),
  20028. .SyncLoad(SyncLoad_X48_Y2_VCC),
  20029. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux1~3_combout ),
  20030. .Cout(),
  20031. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1]~q ));
  20032. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .coord_x = 6;
  20033. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .coord_y = 4;
  20034. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .coord_z = 13;
  20035. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .mask = 16'hCCB8;
  20036. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  20037. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  20038. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  20039. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  20040. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  20041. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] (
  20042. .A(\macro_inst|u_ahb2apb|paddr [8]),
  20043. .B(\macro_inst|u_ahb2apb|paddr [9]),
  20044. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2]),
  20045. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~q ),
  20046. .Cin(),
  20047. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2]~q ),
  20048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20049. .AsyncReset(AsyncReset_X46_Y2_GND),
  20050. .SyncReset(SyncReset_X46_Y2_GND),
  20051. .ShiftData(),
  20052. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20053. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux2~3_combout ),
  20054. .Cout(),
  20055. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2]~q ));
  20056. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .coord_x = 7;
  20057. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .coord_y = 2;
  20058. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .coord_z = 7;
  20059. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .mask = 16'hBA98;
  20060. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  20061. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  20062. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  20063. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  20064. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  20065. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] (
  20066. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~q ),
  20067. .B(\macro_inst|u_ahb2apb|paddr [9]),
  20068. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [3]),
  20069. .D(\macro_inst|u_ahb2apb|paddr [8]),
  20070. .Cin(),
  20071. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3]~q ),
  20072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20073. .AsyncReset(AsyncReset_X46_Y2_GND),
  20074. .SyncReset(SyncReset_X46_Y2_GND),
  20075. .ShiftData(),
  20076. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20077. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux3~3_combout ),
  20078. .Cout(),
  20079. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3]~q ));
  20080. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .coord_x = 7;
  20081. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .coord_y = 2;
  20082. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .coord_z = 9;
  20083. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .mask = 16'hEE30;
  20084. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  20085. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  20086. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  20087. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  20088. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  20089. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] (
  20090. .A(\macro_inst|u_ahb2apb|paddr [9]),
  20091. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4]~q ),
  20092. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4]),
  20093. .D(\macro_inst|u_ahb2apb|paddr [8]),
  20094. .Cin(),
  20095. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4]~q ),
  20096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X48_Y2_SIG_SIG ),
  20097. .AsyncReset(AsyncReset_X48_Y2_GND),
  20098. .SyncReset(SyncReset_X48_Y2_GND),
  20099. .ShiftData(),
  20100. .SyncLoad(SyncLoad_X48_Y2_VCC),
  20101. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux4~3_combout ),
  20102. .Cout(),
  20103. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4]~q ));
  20104. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .coord_x = 6;
  20105. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .coord_y = 4;
  20106. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .coord_z = 12;
  20107. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .mask = 16'hEE50;
  20108. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  20109. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  20110. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  20111. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  20112. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  20113. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] (
  20114. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5]~q ),
  20115. .B(\macro_inst|u_ahb2apb|paddr [8]),
  20116. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5]),
  20117. .D(\macro_inst|u_ahb2apb|paddr [9]),
  20118. .Cin(),
  20119. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5]~q ),
  20120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20121. .AsyncReset(AsyncReset_X46_Y2_GND),
  20122. .SyncReset(SyncReset_X46_Y2_GND),
  20123. .ShiftData(),
  20124. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20125. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux5~3_combout ),
  20126. .Cout(),
  20127. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5]~q ));
  20128. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .coord_x = 7;
  20129. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .coord_y = 2;
  20130. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .coord_z = 5;
  20131. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .mask = 16'hCCB8;
  20132. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  20133. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  20134. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  20135. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  20136. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  20137. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] (
  20138. .A(\macro_inst|u_ahb2apb|paddr [8]),
  20139. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~q ),
  20140. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [6]),
  20141. .D(\macro_inst|u_ahb2apb|paddr [9]),
  20142. .Cin(),
  20143. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6]~q ),
  20144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20145. .AsyncReset(AsyncReset_X46_Y2_GND),
  20146. .SyncReset(SyncReset_X46_Y2_GND),
  20147. .ShiftData(),
  20148. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20149. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux6~3_combout ),
  20150. .Cout(),
  20151. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6]~q ));
  20152. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .coord_x = 7;
  20153. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .coord_y = 2;
  20154. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .coord_z = 6;
  20155. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .mask = 16'hAAD8;
  20156. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  20157. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  20158. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  20159. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  20160. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  20161. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] (
  20162. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7]~q ),
  20163. .B(\macro_inst|u_ahb2apb|paddr [8]),
  20164. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]),
  20165. .D(\macro_inst|u_ahb2apb|paddr [9]),
  20166. .Cin(),
  20167. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7]~q ),
  20168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout_X46_Y2_SIG_SIG ),
  20169. .AsyncReset(AsyncReset_X46_Y2_GND),
  20170. .SyncReset(SyncReset_X46_Y2_GND),
  20171. .ShiftData(),
  20172. .SyncLoad(SyncLoad_X46_Y2_VCC),
  20173. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux7~3_combout ),
  20174. .Cout(),
  20175. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7]~q ));
  20176. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .coord_x = 7;
  20177. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .coord_y = 2;
  20178. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .coord_z = 4;
  20179. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .mask = 16'hCCB8;
  20180. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  20181. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  20182. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  20183. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  20184. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  20185. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 (
  20186. .A(\macro_inst|u_uart[0]|u_rx[0]|always2~0_combout ),
  20187. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_sample~0_combout ),
  20188. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ),
  20189. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  20190. .Cin(),
  20191. .Qin(),
  20192. .Clk(),
  20193. .AsyncReset(),
  20194. .SyncReset(),
  20195. .ShiftData(),
  20196. .SyncLoad(),
  20197. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0_combout ),
  20198. .Cout(),
  20199. .Q());
  20200. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .coord_x = 7;
  20201. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .coord_y = 4;
  20202. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .coord_z = 7;
  20203. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .mask = 16'h0080;
  20204. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  20205. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  20206. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  20207. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  20208. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  20209. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_idle (
  20210. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  20211. .B(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  20212. .C(vcc),
  20213. .D(\macro_inst|u_uart[0]|u_rx[0]|always8~0_combout ),
  20214. .Cin(),
  20215. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_idle~q ),
  20216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  20217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  20218. .SyncReset(),
  20219. .ShiftData(),
  20220. .SyncLoad(),
  20221. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_idle~0_combout ),
  20222. .Cout(),
  20223. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_idle~q ));
  20224. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .coord_x = 17;
  20225. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .coord_y = 1;
  20226. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .coord_z = 3;
  20227. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .mask = 16'hFF70;
  20228. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .modeMux = 1'b0;
  20229. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .FeedbackMux = 1'b1;
  20230. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .ShiftMux = 1'b0;
  20231. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .BypassEn = 1'b0;
  20232. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle .CarryEnb = 1'b1;
  20233. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en (
  20234. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  20235. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_fifo|counter [0]),
  20236. .C(vcc),
  20237. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  20238. .Cin(),
  20239. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~q ),
  20240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  20241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  20242. .SyncReset(),
  20243. .ShiftData(),
  20244. .SyncLoad(),
  20245. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~0_combout ),
  20246. .Cout(),
  20247. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_idle_en~q ));
  20248. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .coord_x = 17;
  20249. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .coord_y = 1;
  20250. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .coord_z = 10;
  20251. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .mask = 16'hDCFC;
  20252. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .modeMux = 1'b0;
  20253. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .FeedbackMux = 1'b1;
  20254. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .ShiftMux = 1'b0;
  20255. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .BypassEn = 1'b0;
  20256. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_idle_en .CarryEnb = 1'b1;
  20257. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] (
  20258. .A(vcc),
  20259. .B(vcc),
  20260. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  20261. .D(\SIM_IO[0]~input_o ),
  20262. .Cin(),
  20263. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_in [0]),
  20264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X53_Y1_SIG_SIG ),
  20265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  20266. .SyncReset(),
  20267. .ShiftData(),
  20268. .SyncLoad(),
  20269. .LutOut(\macro_inst|uart_rxd [0]),
  20270. .Cout(),
  20271. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_in [0]));
  20272. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .coord_x = 9;
  20273. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .coord_y = 2;
  20274. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .coord_z = 4;
  20275. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .mask = 16'h000F;
  20276. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .modeMux = 1'b0;
  20277. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .FeedbackMux = 1'b0;
  20278. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .ShiftMux = 1'b0;
  20279. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .BypassEn = 1'b0;
  20280. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[0] .CarryEnb = 1'b1;
  20281. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] (
  20282. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  20283. .B(\macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ),
  20284. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_in [0]),
  20285. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  20286. .Cin(),
  20287. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_in [1]),
  20288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ),
  20289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20290. .SyncReset(SyncReset_X49_Y3_GND),
  20291. .ShiftData(),
  20292. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20293. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector3~0_combout ),
  20294. .Cout(),
  20295. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_in [1]));
  20296. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .coord_x = 6;
  20297. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .coord_y = 2;
  20298. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .coord_z = 9;
  20299. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .mask = 16'h8800;
  20300. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .modeMux = 1'b0;
  20301. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .FeedbackMux = 1'b0;
  20302. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .ShiftMux = 1'b0;
  20303. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .BypassEn = 1'b1;
  20304. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[1] .CarryEnb = 1'b1;
  20305. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] (
  20306. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  20307. .B(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  20308. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_in [1]),
  20309. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  20310. .Cin(),
  20311. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_in [2]),
  20312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ),
  20313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20314. .SyncReset(SyncReset_X49_Y3_GND),
  20315. .ShiftData(),
  20316. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20317. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~0_combout ),
  20318. .Cout(),
  20319. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_in [2]));
  20320. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .coord_x = 6;
  20321. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .coord_y = 2;
  20322. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .coord_z = 8;
  20323. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .mask = 16'h8800;
  20324. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .modeMux = 1'b0;
  20325. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .FeedbackMux = 1'b0;
  20326. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .ShiftMux = 1'b0;
  20327. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .BypassEn = 1'b1;
  20328. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[2] .CarryEnb = 1'b1;
  20329. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] (
  20330. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_in [2]),
  20331. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_in [4]),
  20332. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_in [2]),
  20333. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ),
  20334. .Cin(),
  20335. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_in [3]),
  20336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ),
  20337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20338. .SyncReset(SyncReset_X49_Y3_GND),
  20339. .ShiftData(),
  20340. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20341. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout ),
  20342. .Cout(),
  20343. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_in [3]));
  20344. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .coord_x = 6;
  20345. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .coord_y = 2;
  20346. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .coord_z = 7;
  20347. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .mask = 16'h00B2;
  20348. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .modeMux = 1'b0;
  20349. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .FeedbackMux = 1'b1;
  20350. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .ShiftMux = 1'b0;
  20351. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .BypassEn = 1'b1;
  20352. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[3] .CarryEnb = 1'b1;
  20353. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] (
  20354. .A(vcc),
  20355. .B(vcc),
  20356. .C(vcc),
  20357. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_in [3]),
  20358. .Cin(),
  20359. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_in [4]),
  20360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X49_Y3_SIG_SIG ),
  20361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20362. .SyncReset(),
  20363. .ShiftData(),
  20364. .SyncLoad(),
  20365. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_in[4]~0_combout ),
  20366. .Cout(),
  20367. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_in [4]));
  20368. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .coord_x = 6;
  20369. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .coord_y = 2;
  20370. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .coord_z = 1;
  20371. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .mask = 16'h00FF;
  20372. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .modeMux = 1'b0;
  20373. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .FeedbackMux = 1'b0;
  20374. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .ShiftMux = 1'b0;
  20375. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .BypassEn = 1'b0;
  20376. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_in[4] .CarryEnb = 1'b1;
  20377. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_parity (
  20378. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~0_combout ),
  20379. .B(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  20380. .C(vcc),
  20381. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  20382. .Cin(),
  20383. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~q ),
  20384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  20385. .AsyncReset(AsyncReset_X50_Y2_GND),
  20386. .SyncReset(),
  20387. .ShiftData(),
  20388. .SyncLoad(),
  20389. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~1_combout ),
  20390. .Cout(),
  20391. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~q ));
  20392. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .coord_x = 14;
  20393. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .coord_y = 4;
  20394. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .coord_z = 1;
  20395. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .mask = 16'h335A;
  20396. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .modeMux = 1'b0;
  20397. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .FeedbackMux = 1'b1;
  20398. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .ShiftMux = 1'b0;
  20399. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .BypassEn = 1'b0;
  20400. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity .CarryEnb = 1'b1;
  20401. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 (
  20402. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  20403. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  20404. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  20405. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]),
  20406. .Cin(),
  20407. .Qin(),
  20408. .Clk(),
  20409. .AsyncReset(),
  20410. .SyncReset(),
  20411. .ShiftData(),
  20412. .SyncLoad(),
  20413. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_parity~0_combout ),
  20414. .Cout(),
  20415. .Q());
  20416. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .coord_x = 7;
  20417. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .coord_y = 1;
  20418. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .coord_z = 0;
  20419. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .mask = 16'h4000;
  20420. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .modeMux = 1'b0;
  20421. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .FeedbackMux = 1'b0;
  20422. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .ShiftMux = 1'b0;
  20423. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .BypassEn = 1'b0;
  20424. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_parity~0 .CarryEnb = 1'b1;
  20425. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 (
  20426. .A(vcc),
  20427. .B(vcc),
  20428. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [2]),
  20429. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_baud_cnt [1]),
  20430. .Cin(),
  20431. .Qin(),
  20432. .Clk(),
  20433. .AsyncReset(),
  20434. .SyncReset(),
  20435. .ShiftData(),
  20436. .SyncLoad(),
  20437. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_sample~0_combout ),
  20438. .Cout(),
  20439. .Q());
  20440. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .coord_x = 7;
  20441. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .coord_y = 4;
  20442. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .coord_z = 2;
  20443. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .mask = 16'h000F;
  20444. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .modeMux = 1'b0;
  20445. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .FeedbackMux = 1'b0;
  20446. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .ShiftMux = 1'b0;
  20447. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .BypassEn = 1'b0;
  20448. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_sample~0 .CarryEnb = 1'b1;
  20449. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] (
  20450. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3]),
  20451. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  20452. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1]),
  20453. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0]),
  20454. .Cin(),
  20455. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [0]),
  20456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20458. .SyncReset(SyncReset_X49_Y3_GND),
  20459. .ShiftData(),
  20460. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20461. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  20462. .Cout(),
  20463. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [0]));
  20464. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .coord_x = 6;
  20465. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .coord_y = 2;
  20466. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .coord_z = 15;
  20467. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .mask = 16'h8800;
  20468. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .modeMux = 1'b0;
  20469. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  20470. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .ShiftMux = 1'b0;
  20471. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .BypassEn = 1'b1;
  20472. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[0] .CarryEnb = 1'b1;
  20473. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] (
  20474. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  20475. .B(vcc),
  20476. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2]),
  20477. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  20478. .Cin(),
  20479. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1]),
  20480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20482. .SyncReset(SyncReset_X49_Y3_GND),
  20483. .ShiftData(),
  20484. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20485. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_sample~0_combout ),
  20486. .Cout(),
  20487. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1]));
  20488. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .coord_x = 6;
  20489. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .coord_y = 2;
  20490. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .coord_z = 5;
  20491. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .mask = 16'h0055;
  20492. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .modeMux = 1'b0;
  20493. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  20494. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .ShiftMux = 1'b0;
  20495. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .BypassEn = 1'b1;
  20496. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[1] .CarryEnb = 1'b1;
  20497. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] (
  20498. .A(vcc),
  20499. .B(\macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ),
  20500. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [3]),
  20501. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  20502. .Cin(),
  20503. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2]),
  20504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20506. .SyncReset(SyncReset_X49_Y3_GND),
  20507. .ShiftData(),
  20508. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20509. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always3~2_combout ),
  20510. .Cout(),
  20511. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2]));
  20512. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .coord_x = 6;
  20513. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .coord_y = 2;
  20514. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .coord_z = 10;
  20515. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .mask = 16'hCC00;
  20516. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .modeMux = 1'b0;
  20517. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  20518. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .ShiftMux = 1'b0;
  20519. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .BypassEn = 1'b1;
  20520. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[2] .CarryEnb = 1'b1;
  20521. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] (
  20522. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [2]),
  20523. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [1]),
  20524. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4]),
  20525. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [0]),
  20526. .Cin(),
  20527. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [3]),
  20528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20530. .SyncReset(SyncReset_X49_Y3_GND),
  20531. .ShiftData(),
  20532. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20533. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always11~1_combout ),
  20534. .Cout(),
  20535. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [3]));
  20536. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .coord_x = 6;
  20537. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .coord_y = 2;
  20538. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .coord_z = 14;
  20539. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .mask = 16'h0001;
  20540. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .modeMux = 1'b0;
  20541. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .FeedbackMux = 1'b1;
  20542. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .ShiftMux = 1'b0;
  20543. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .BypassEn = 1'b1;
  20544. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[3] .CarryEnb = 1'b1;
  20545. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] (
  20546. .A(\rv32.gpio7_io_out_en[6] ),
  20547. .B(\rv32.gpio8_io_out_data[7] ),
  20548. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5]),
  20549. .D(gpio8_io_out_en[7]),
  20550. .Cin(),
  20551. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4]),
  20552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20554. .SyncReset(SyncReset_X49_Y3_GND),
  20555. .ShiftData(),
  20556. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20557. .LutOut(\macro_inst|SIM_IO_15~1_combout ),
  20558. .Cout(),
  20559. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4]));
  20560. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .coord_x = 6;
  20561. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .coord_y = 2;
  20562. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .coord_z = 0;
  20563. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .mask = 16'h0088;
  20564. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .modeMux = 1'b0;
  20565. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  20566. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .ShiftMux = 1'b0;
  20567. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .BypassEn = 1'b1;
  20568. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[4] .CarryEnb = 1'b1;
  20569. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] (
  20570. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  20571. .B(vcc),
  20572. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [6]),
  20573. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  20574. .Cin(),
  20575. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5]),
  20576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20578. .SyncReset(SyncReset_X49_Y3_GND),
  20579. .ShiftData(),
  20580. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20581. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout ),
  20582. .Cout(),
  20583. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5]));
  20584. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .coord_x = 6;
  20585. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .coord_y = 2;
  20586. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .coord_z = 12;
  20587. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .mask = 16'hFFAA;
  20588. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .modeMux = 1'b0;
  20589. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  20590. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .ShiftMux = 1'b0;
  20591. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .BypassEn = 1'b1;
  20592. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[5] .CarryEnb = 1'b1;
  20593. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] (
  20594. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [4]),
  20595. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [5]),
  20596. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]),
  20597. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]),
  20598. .Cin(),
  20599. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [6]),
  20600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20602. .SyncReset(SyncReset_X49_Y3_GND),
  20603. .ShiftData(),
  20604. .SyncLoad(SyncLoad_X49_Y3_VCC),
  20605. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|always11~0_combout ),
  20606. .Cout(),
  20607. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [6]));
  20608. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .coord_x = 6;
  20609. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .coord_y = 2;
  20610. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .coord_z = 13;
  20611. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .mask = 16'h0001;
  20612. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .modeMux = 1'b0;
  20613. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .FeedbackMux = 1'b1;
  20614. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .ShiftMux = 1'b0;
  20615. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .BypassEn = 1'b1;
  20616. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[6] .CarryEnb = 1'b1;
  20617. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] (
  20618. .A(vcc),
  20619. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_in [4]),
  20620. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_in [2]),
  20621. .D(\macro_inst|u_uart[0]|u_rx[0]|rx_in [3]),
  20622. .Cin(),
  20623. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]),
  20624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[0]|always4~2_combout_X49_Y3_SIG_SIG ),
  20625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y3_SIG ),
  20626. .SyncReset(),
  20627. .ShiftData(),
  20628. .SyncLoad(),
  20629. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  20630. .Cout(),
  20631. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg [7]));
  20632. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .coord_x = 6;
  20633. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .coord_y = 2;
  20634. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .coord_z = 4;
  20635. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .mask = 16'h0CCF;
  20636. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .modeMux = 1'b0;
  20637. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  20638. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .ShiftMux = 1'b0;
  20639. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .BypassEn = 1'b0;
  20640. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_shift_reg[7] .CarryEnb = 1'b1;
  20641. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA (
  20642. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  20643. .B(\macro_inst|u_uart[0]|u_rx[0]|Selector2~0_combout ),
  20644. .C(\macro_inst|u_uart[0]|u_rx[0]|Selector2~1_combout ),
  20645. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~2_combout ),
  20646. .Cin(),
  20647. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ),
  20648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ),
  20649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ),
  20650. .SyncReset(),
  20651. .ShiftData(),
  20652. .SyncLoad(),
  20653. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector2~2_combout ),
  20654. .Cout(),
  20655. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA~q ));
  20656. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .coord_x = 6;
  20657. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .coord_y = 4;
  20658. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .coord_z = 6;
  20659. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .mask = 16'h00F8;
  20660. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .modeMux = 1'b0;
  20661. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  20662. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .ShiftMux = 1'b0;
  20663. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .BypassEn = 1'b0;
  20664. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_DATA .CarryEnb = 1'b1;
  20665. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE (
  20666. .A(\macro_inst|u_uart[0]|u_rx[0]|Add1~0_combout ),
  20667. .B(vcc),
  20668. .C(vcc),
  20669. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~2_combout ),
  20670. .Cin(),
  20671. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ),
  20672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ),
  20673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ),
  20674. .SyncReset(),
  20675. .ShiftData(),
  20676. .SyncLoad(),
  20677. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector0~0_combout ),
  20678. .Cout(),
  20679. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE~q ));
  20680. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .coord_x = 6;
  20681. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .coord_y = 4;
  20682. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .coord_z = 5;
  20683. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .mask = 16'h00F5;
  20684. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .modeMux = 1'b0;
  20685. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  20686. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  20687. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .BypassEn = 1'b0;
  20688. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  20689. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY (
  20690. .A(\macro_inst|u_uart[0]|u_rx[0]|Selector3~0_combout ),
  20691. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~0_combout ),
  20692. .C(vcc),
  20693. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector4~4_combout ),
  20694. .Cin(),
  20695. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  20696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ),
  20697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ),
  20698. .SyncReset(),
  20699. .ShiftData(),
  20700. .SyncLoad(),
  20701. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~1_combout ),
  20702. .Cout(),
  20703. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ));
  20704. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .coord_x = 6;
  20705. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .coord_y = 4;
  20706. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .coord_z = 14;
  20707. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .mask = 16'h88F8;
  20708. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .modeMux = 1'b0;
  20709. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  20710. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  20711. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .BypassEn = 1'b0;
  20712. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  20713. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START (
  20714. .A(\macro_inst|u_uart[0]|u_rx[0]|Selector1~3_combout ),
  20715. .B(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout ),
  20716. .C(vcc),
  20717. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector1~2_combout ),
  20718. .Cin(),
  20719. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ),
  20720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  20721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  20722. .SyncReset(),
  20723. .ShiftData(),
  20724. .SyncLoad(),
  20725. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|Selector1~4_combout ),
  20726. .Cout(),
  20727. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START~q ));
  20728. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .coord_x = 7;
  20729. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .coord_y = 4;
  20730. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .coord_z = 14;
  20731. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .mask = 16'h00DC;
  20732. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .modeMux = 1'b0;
  20733. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .FeedbackMux = 1'b1;
  20734. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .ShiftMux = 1'b0;
  20735. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .BypassEn = 1'b0;
  20736. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_START .CarryEnb = 1'b1;
  20737. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP (
  20738. .A(vcc),
  20739. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0_combout ),
  20740. .C(vcc),
  20741. .D(\macro_inst|u_uart[0]|u_rx[0]|Selector4~4_combout ),
  20742. .Cin(),
  20743. .Qin(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ),
  20744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ),
  20745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ),
  20746. .SyncReset(),
  20747. .ShiftData(),
  20748. .SyncLoad(),
  20749. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~1_combout ),
  20750. .Cout(),
  20751. .Q(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~q ));
  20752. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .coord_x = 6;
  20753. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .coord_y = 4;
  20754. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .coord_z = 11;
  20755. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .mask = 16'hCCF0;
  20756. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .modeMux = 1'b0;
  20757. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  20758. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .ShiftMux = 1'b0;
  20759. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .BypassEn = 1'b0;
  20760. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP .CarryEnb = 1'b1;
  20761. alta_slice \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 (
  20762. .A(\macro_inst|u_uart[0]|u_rx[0]|Selector3~0_combout ),
  20763. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  20764. .C(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  20765. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  20766. .Cin(),
  20767. .Qin(),
  20768. .Clk(),
  20769. .AsyncReset(),
  20770. .SyncReset(),
  20771. .ShiftData(),
  20772. .SyncLoad(),
  20773. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0_combout ),
  20774. .Cout(),
  20775. .Q());
  20776. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .coord_x = 6;
  20777. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .coord_y = 4;
  20778. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .coord_z = 3;
  20779. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .mask = 16'hC0EA;
  20780. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  20781. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  20782. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  20783. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  20784. defparam \macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  20785. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Add4~0 (
  20786. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [3]),
  20787. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2]),
  20788. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]),
  20789. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]),
  20790. .Cin(),
  20791. .Qin(),
  20792. .Clk(),
  20793. .AsyncReset(),
  20794. .SyncReset(),
  20795. .ShiftData(),
  20796. .SyncLoad(),
  20797. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Add4~0_combout ),
  20798. .Cout(),
  20799. .Q());
  20800. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .coord_x = 1;
  20801. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .coord_y = 3;
  20802. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .coord_z = 12;
  20803. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .mask = 16'h5556;
  20804. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .modeMux = 1'b0;
  20805. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .FeedbackMux = 1'b0;
  20806. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .ShiftMux = 1'b0;
  20807. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .BypassEn = 1'b0;
  20808. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~0 .CarryEnb = 1'b1;
  20809. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Add4~2 (
  20810. .A(vcc),
  20811. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]),
  20812. .C(vcc),
  20813. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]),
  20814. .Cin(),
  20815. .Qin(),
  20816. .Clk(),
  20817. .AsyncReset(),
  20818. .SyncReset(),
  20819. .ShiftData(),
  20820. .SyncLoad(),
  20821. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Add4~2_combout ),
  20822. .Cout(),
  20823. .Q());
  20824. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .coord_x = 1;
  20825. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .coord_y = 4;
  20826. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .coord_z = 6;
  20827. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .mask = 16'h33CC;
  20828. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .modeMux = 1'b0;
  20829. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .FeedbackMux = 1'b0;
  20830. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .ShiftMux = 1'b0;
  20831. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .BypassEn = 1'b0;
  20832. defparam \macro_inst|u_uart[0]|u_rx[1]|Add4~2 .CarryEnb = 1'b1;
  20833. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 (
  20834. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  20835. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  20836. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ),
  20837. .D(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  20838. .Cin(),
  20839. .Qin(),
  20840. .Clk(),
  20841. .AsyncReset(),
  20842. .SyncReset(),
  20843. .ShiftData(),
  20844. .SyncLoad(),
  20845. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  20846. .Cout(),
  20847. .Q());
  20848. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .coord_x = 14;
  20849. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .coord_y = 4;
  20850. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .coord_z = 0;
  20851. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .mask = 16'h1000;
  20852. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .modeMux = 1'b0;
  20853. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .FeedbackMux = 1'b0;
  20854. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .ShiftMux = 1'b0;
  20855. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .BypassEn = 1'b0;
  20856. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~1 .CarryEnb = 1'b1;
  20857. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 (
  20858. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ),
  20859. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_sample~0_combout ),
  20860. .C(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  20861. .D(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  20862. .Cin(),
  20863. .Qin(),
  20864. .Clk(),
  20865. .AsyncReset(),
  20866. .SyncReset(),
  20867. .ShiftData(),
  20868. .SyncLoad(),
  20869. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector0~2_combout ),
  20870. .Cout(),
  20871. .Q());
  20872. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .coord_x = 7;
  20873. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .coord_y = 3;
  20874. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .coord_z = 15;
  20875. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .mask = 16'h8000;
  20876. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .modeMux = 1'b0;
  20877. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .FeedbackMux = 1'b0;
  20878. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .ShiftMux = 1'b0;
  20879. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .BypassEn = 1'b0;
  20880. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~2 .CarryEnb = 1'b1;
  20881. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 (
  20882. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  20883. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  20884. .C(\macro_inst|u_uart[0]|u_rx[1]|Selector2~0_combout ),
  20885. .D(\macro_inst|u_uart[0]|u_rx[1]|always3~2_combout ),
  20886. .Cin(),
  20887. .Qin(),
  20888. .Clk(),
  20889. .AsyncReset(),
  20890. .SyncReset(),
  20891. .ShiftData(),
  20892. .SyncLoad(),
  20893. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector0~4_combout ),
  20894. .Cout(),
  20895. .Q());
  20896. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .coord_x = 7;
  20897. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .coord_y = 3;
  20898. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .coord_z = 11;
  20899. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .mask = 16'hCCC8;
  20900. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .modeMux = 1'b0;
  20901. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .FeedbackMux = 1'b0;
  20902. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .ShiftMux = 1'b0;
  20903. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .BypassEn = 1'b0;
  20904. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector0~4 .CarryEnb = 1'b1;
  20905. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 (
  20906. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  20907. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  20908. .C(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  20909. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~4_combout ),
  20910. .Cin(),
  20911. .Qin(),
  20912. .Clk(),
  20913. .AsyncReset(),
  20914. .SyncReset(),
  20915. .ShiftData(),
  20916. .SyncLoad(),
  20917. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector2~1_combout ),
  20918. .Cout(),
  20919. .Q());
  20920. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .coord_x = 7;
  20921. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .coord_y = 3;
  20922. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .coord_z = 6;
  20923. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .mask = 16'h00C8;
  20924. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .modeMux = 1'b0;
  20925. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .FeedbackMux = 1'b0;
  20926. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .ShiftMux = 1'b0;
  20927. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .BypassEn = 1'b0;
  20928. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector2~1 .CarryEnb = 1'b1;
  20929. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 (
  20930. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  20931. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  20932. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3]),
  20933. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0]),
  20934. .Cin(),
  20935. .Qin(),
  20936. .Clk(),
  20937. .AsyncReset(),
  20938. .SyncReset(),
  20939. .ShiftData(),
  20940. .SyncLoad(),
  20941. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector4~0_combout ),
  20942. .Cout(),
  20943. .Q());
  20944. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .coord_x = 6;
  20945. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .coord_y = 2;
  20946. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .coord_z = 11;
  20947. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .mask = 16'h0001;
  20948. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .modeMux = 1'b0;
  20949. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .FeedbackMux = 1'b0;
  20950. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .ShiftMux = 1'b0;
  20951. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .BypassEn = 1'b0;
  20952. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~0 .CarryEnb = 1'b1;
  20953. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 (
  20954. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ),
  20955. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  20956. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  20957. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector4~0_combout ),
  20958. .Cin(),
  20959. .Qin(),
  20960. .Clk(),
  20961. .AsyncReset(),
  20962. .SyncReset(),
  20963. .ShiftData(),
  20964. .SyncLoad(),
  20965. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector4~1_combout ),
  20966. .Cout(),
  20967. .Q());
  20968. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .coord_x = 7;
  20969. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .coord_y = 3;
  20970. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .coord_z = 5;
  20971. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .mask = 16'hC4C0;
  20972. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .modeMux = 1'b0;
  20973. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .FeedbackMux = 1'b0;
  20974. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .ShiftMux = 1'b0;
  20975. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .BypassEn = 1'b0;
  20976. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~1 .CarryEnb = 1'b1;
  20977. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 (
  20978. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  20979. .B(vcc),
  20980. .C(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  20981. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  20982. .Cin(),
  20983. .Qin(),
  20984. .Clk(),
  20985. .AsyncReset(),
  20986. .SyncReset(),
  20987. .ShiftData(),
  20988. .SyncLoad(),
  20989. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector4~2_combout ),
  20990. .Cout(),
  20991. .Q());
  20992. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .coord_x = 7;
  20993. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .coord_y = 3;
  20994. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .coord_z = 10;
  20995. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .mask = 16'hF050;
  20996. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .modeMux = 1'b0;
  20997. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .FeedbackMux = 1'b0;
  20998. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .ShiftMux = 1'b0;
  20999. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .BypassEn = 1'b0;
  21000. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~2 .CarryEnb = 1'b1;
  21001. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 (
  21002. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  21003. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  21004. .C(\macro_inst|u_uart[0]|u_rx[1]|Selector4~2_combout ),
  21005. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector4~1_combout ),
  21006. .Cin(),
  21007. .Qin(),
  21008. .Clk(),
  21009. .AsyncReset(),
  21010. .SyncReset(),
  21011. .ShiftData(),
  21012. .SyncLoad(),
  21013. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector4~3_combout ),
  21014. .Cout(),
  21015. .Q());
  21016. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .coord_x = 7;
  21017. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .coord_y = 3;
  21018. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .coord_z = 8;
  21019. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .mask = 16'hDCDE;
  21020. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .modeMux = 1'b0;
  21021. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .FeedbackMux = 1'b0;
  21022. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .ShiftMux = 1'b0;
  21023. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .BypassEn = 1'b0;
  21024. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~3 .CarryEnb = 1'b1;
  21025. alta_slice \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 (
  21026. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  21027. .B(\macro_inst|u_uart[0]|u_rx[1]|Selector4~1_combout ),
  21028. .C(\macro_inst|u_uart[0]|u_rx[1]|Selector4~3_combout ),
  21029. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector3~0_combout ),
  21030. .Cin(),
  21031. .Qin(),
  21032. .Clk(),
  21033. .AsyncReset(),
  21034. .SyncReset(),
  21035. .ShiftData(),
  21036. .SyncLoad(),
  21037. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector4~4_combout ),
  21038. .Cout(),
  21039. .Q());
  21040. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .coord_x = 7;
  21041. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .coord_y = 3;
  21042. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .coord_z = 3;
  21043. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .mask = 16'hFF8D;
  21044. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .modeMux = 1'b0;
  21045. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .FeedbackMux = 1'b0;
  21046. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .ShiftMux = 1'b0;
  21047. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .BypassEn = 1'b0;
  21048. defparam \macro_inst|u_uart[0]|u_rx[1]|Selector4~4 .CarryEnb = 1'b1;
  21049. alta_slice \macro_inst|u_uart[0]|u_rx[1]|always11~2 (
  21050. .A(\macro_inst|u_uart[0]|u_rx[1]|always11~1_combout ),
  21051. .B(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  21052. .C(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  21053. .D(\macro_inst|u_uart[0]|u_rx[1]|always11~0_combout ),
  21054. .Cin(),
  21055. .Qin(),
  21056. .Clk(),
  21057. .AsyncReset(),
  21058. .SyncReset(),
  21059. .ShiftData(),
  21060. .SyncLoad(),
  21061. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always11~2_combout ),
  21062. .Cout(),
  21063. .Q());
  21064. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .coord_x = 14;
  21065. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .coord_y = 4;
  21066. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .coord_z = 11;
  21067. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .mask = 16'h2000;
  21068. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .modeMux = 1'b0;
  21069. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .FeedbackMux = 1'b0;
  21070. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .ShiftMux = 1'b0;
  21071. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .BypassEn = 1'b0;
  21072. defparam \macro_inst|u_uart[0]|u_rx[1]|always11~2 .CarryEnb = 1'b1;
  21073. alta_slice \macro_inst|u_uart[0]|u_rx[1]|always3~1 (
  21074. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [3]),
  21075. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]),
  21076. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2]),
  21077. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]),
  21078. .Cin(),
  21079. .Qin(),
  21080. .Clk(),
  21081. .AsyncReset(),
  21082. .SyncReset(),
  21083. .ShiftData(),
  21084. .SyncLoad(),
  21085. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ),
  21086. .Cout(),
  21087. .Q());
  21088. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .coord_x = 1;
  21089. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .coord_y = 4;
  21090. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .coord_z = 4;
  21091. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .mask = 16'h0001;
  21092. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .modeMux = 1'b0;
  21093. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .FeedbackMux = 1'b0;
  21094. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .ShiftMux = 1'b0;
  21095. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .BypassEn = 1'b0;
  21096. defparam \macro_inst|u_uart[0]|u_rx[1]|always3~1 .CarryEnb = 1'b1;
  21097. alta_slice \macro_inst|u_uart[0]|u_rx[1]|always4~2 (
  21098. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  21099. .B(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  21100. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  21101. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  21102. .Cin(),
  21103. .Qin(),
  21104. .Clk(),
  21105. .AsyncReset(),
  21106. .SyncReset(),
  21107. .ShiftData(),
  21108. .SyncLoad(),
  21109. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always4~2_combout ),
  21110. .Cout(),
  21111. .Q());
  21112. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .coord_x = 6;
  21113. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .coord_y = 3;
  21114. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .coord_z = 6;
  21115. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .mask = 16'h0008;
  21116. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .modeMux = 1'b0;
  21117. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .FeedbackMux = 1'b0;
  21118. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .ShiftMux = 1'b0;
  21119. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .BypassEn = 1'b0;
  21120. defparam \macro_inst|u_uart[0]|u_rx[1]|always4~2 .CarryEnb = 1'b1;
  21121. alta_slice \macro_inst|u_uart[0]|u_rx[1]|always6~1 (
  21122. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_in [4]),
  21123. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_in [2]),
  21124. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_in [3]),
  21125. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  21126. .Cin(),
  21127. .Qin(),
  21128. .Clk(),
  21129. .AsyncReset(),
  21130. .SyncReset(),
  21131. .ShiftData(),
  21132. .SyncLoad(),
  21133. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout ),
  21134. .Cout(),
  21135. .Q());
  21136. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .coord_x = 6;
  21137. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .coord_y = 3;
  21138. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .coord_z = 4;
  21139. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .mask = 16'h00D4;
  21140. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .modeMux = 1'b0;
  21141. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .FeedbackMux = 1'b0;
  21142. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .ShiftMux = 1'b0;
  21143. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .BypassEn = 1'b0;
  21144. defparam \macro_inst|u_uart[0]|u_rx[1]|always6~1 .CarryEnb = 1'b1;
  21145. alta_slice \macro_inst|u_uart[0]|u_rx[1]|always8~0 (
  21146. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  21147. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~q ),
  21148. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  21149. .D(\macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ),
  21150. .Cin(),
  21151. .Qin(),
  21152. .Clk(),
  21153. .AsyncReset(),
  21154. .SyncReset(),
  21155. .ShiftData(),
  21156. .SyncLoad(),
  21157. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always8~0_combout ),
  21158. .Cout(),
  21159. .Q());
  21160. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .coord_x = 6;
  21161. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .coord_y = 2;
  21162. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .coord_z = 3;
  21163. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .mask = 16'h4000;
  21164. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .modeMux = 1'b0;
  21165. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .FeedbackMux = 1'b0;
  21166. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .ShiftMux = 1'b0;
  21167. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .BypassEn = 1'b0;
  21168. defparam \macro_inst|u_uart[0]|u_rx[1]|always8~0 .CarryEnb = 1'b1;
  21169. alta_slice \macro_inst|u_uart[0]|u_rx[1]|break_error (
  21170. .A(vcc),
  21171. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  21172. .C(vcc),
  21173. .D(\macro_inst|u_uart[0]|u_rx[1]|always11~2_combout ),
  21174. .Cin(),
  21175. .Qin(\macro_inst|u_uart[0]|u_rx[1]|break_error~q ),
  21176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  21177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  21178. .SyncReset(),
  21179. .ShiftData(),
  21180. .SyncLoad(),
  21181. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|break_error~0_combout ),
  21182. .Cout(),
  21183. .Q(\macro_inst|u_uart[0]|u_rx[1]|break_error~q ));
  21184. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .coord_x = 8;
  21185. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .coord_y = 3;
  21186. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .coord_z = 6;
  21187. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .mask = 16'hFF30;
  21188. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .modeMux = 1'b0;
  21189. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .FeedbackMux = 1'b1;
  21190. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .ShiftMux = 1'b0;
  21191. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .BypassEn = 1'b0;
  21192. defparam \macro_inst|u_uart[0]|u_rx[1]|break_error .CarryEnb = 1'b1;
  21193. alta_slice \macro_inst|u_uart[0]|u_rx[1]|framing_error (
  21194. .A(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  21195. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  21196. .C(vcc),
  21197. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  21198. .Cin(),
  21199. .Qin(\macro_inst|u_uart[0]|u_rx[1]|framing_error~q ),
  21200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ),
  21201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  21202. .SyncReset(),
  21203. .ShiftData(),
  21204. .SyncLoad(),
  21205. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|framing_error~0_combout ),
  21206. .Cout(),
  21207. .Q(\macro_inst|u_uart[0]|u_rx[1]|framing_error~q ));
  21208. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .coord_x = 9;
  21209. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .coord_y = 3;
  21210. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .coord_z = 8;
  21211. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .mask = 16'h7530;
  21212. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .modeMux = 1'b0;
  21213. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .FeedbackMux = 1'b1;
  21214. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .ShiftMux = 1'b0;
  21215. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .BypassEn = 1'b0;
  21216. defparam \macro_inst|u_uart[0]|u_rx[1]|framing_error .CarryEnb = 1'b1;
  21217. alta_slice \macro_inst|u_uart[0]|u_rx[1]|overrun_error (
  21218. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  21219. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  21220. .C(vcc),
  21221. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  21222. .Cin(),
  21223. .Qin(\macro_inst|u_uart[0]|u_rx[1]|overrun_error~q ),
  21224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  21225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  21226. .SyncReset(),
  21227. .ShiftData(),
  21228. .SyncLoad(),
  21229. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|overrun_error~0_combout ),
  21230. .Cout(),
  21231. .Q(\macro_inst|u_uart[0]|u_rx[1]|overrun_error~q ));
  21232. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .coord_x = 8;
  21233. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .coord_y = 3;
  21234. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .coord_z = 4;
  21235. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .mask = 16'hBA30;
  21236. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .modeMux = 1'b0;
  21237. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .FeedbackMux = 1'b1;
  21238. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .ShiftMux = 1'b0;
  21239. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .BypassEn = 1'b0;
  21240. defparam \macro_inst|u_uart[0]|u_rx[1]|overrun_error .CarryEnb = 1'b1;
  21241. alta_slice \macro_inst|u_uart[0]|u_rx[1]|parity_error (
  21242. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_sample~0_combout ),
  21243. .B(\macro_inst|u_uart[0]|u_rx[1]|parity_error~0_combout ),
  21244. .C(vcc),
  21245. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  21246. .Cin(),
  21247. .Qin(\macro_inst|u_uart[0]|u_rx[1]|parity_error~q ),
  21248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  21249. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  21250. .SyncReset(),
  21251. .ShiftData(),
  21252. .SyncLoad(),
  21253. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|parity_error~1_combout ),
  21254. .Cout(),
  21255. .Q(\macro_inst|u_uart[0]|u_rx[1]|parity_error~q ));
  21256. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .coord_x = 8;
  21257. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .coord_y = 3;
  21258. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .coord_z = 15;
  21259. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .mask = 16'h88F8;
  21260. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .modeMux = 1'b0;
  21261. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .FeedbackMux = 1'b1;
  21262. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .ShiftMux = 1'b0;
  21263. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .BypassEn = 1'b0;
  21264. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error .CarryEnb = 1'b1;
  21265. alta_slice \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 (
  21266. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~q ),
  21267. .B(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  21268. .C(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  21269. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  21270. .Cin(),
  21271. .Qin(),
  21272. .Clk(),
  21273. .AsyncReset(),
  21274. .SyncReset(),
  21275. .ShiftData(),
  21276. .SyncLoad(),
  21277. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|parity_error~0_combout ),
  21278. .Cout(),
  21279. .Q());
  21280. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .coord_x = 7;
  21281. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .coord_y = 2;
  21282. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .coord_z = 10;
  21283. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .mask = 16'h4800;
  21284. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .modeMux = 1'b0;
  21285. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .FeedbackMux = 1'b0;
  21286. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .ShiftMux = 1'b0;
  21287. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .BypassEn = 1'b0;
  21288. defparam \macro_inst|u_uart[0]|u_rx[1]|parity_error~0 .CarryEnb = 1'b1;
  21289. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] (
  21290. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0]),
  21291. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  21292. .C(\~GND~combout ),
  21293. .D(vcc),
  21294. .Cin(),
  21295. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0]),
  21296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  21297. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  21298. .SyncReset(SyncReset_X50_Y2_GND),
  21299. .ShiftData(),
  21300. .SyncLoad(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ),
  21301. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0]~4_combout ),
  21302. .Cout(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0]~5 ),
  21303. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [0]));
  21304. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .coord_x = 14;
  21305. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .coord_y = 4;
  21306. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .coord_z = 5;
  21307. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .mask = 16'h6688;
  21308. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .modeMux = 1'b0;
  21309. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  21310. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  21311. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .BypassEn = 1'b1;
  21312. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  21313. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] (
  21314. .A(vcc),
  21315. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  21316. .C(vcc),
  21317. .D(vcc),
  21318. .Cin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[0]~5 ),
  21319. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  21320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  21321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  21322. .SyncReset(SyncReset_X50_Y2_GND),
  21323. .ShiftData(),
  21324. .SyncLoad(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ),
  21325. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1]~6_combout ),
  21326. .Cout(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1]~7 ),
  21327. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]));
  21328. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .coord_x = 14;
  21329. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .coord_y = 4;
  21330. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .coord_z = 6;
  21331. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .mask = 16'h3C3F;
  21332. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .modeMux = 1'b1;
  21333. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  21334. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  21335. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .BypassEn = 1'b1;
  21336. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  21337. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] (
  21338. .A(vcc),
  21339. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  21340. .C(\~GND~combout ),
  21341. .D(vcc),
  21342. .Cin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[1]~7 ),
  21343. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  21344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  21345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  21346. .SyncReset(SyncReset_X50_Y2_GND),
  21347. .ShiftData(),
  21348. .SyncLoad(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ),
  21349. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2]~8_combout ),
  21350. .Cout(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2]~9 ),
  21351. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]));
  21352. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .coord_x = 14;
  21353. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .coord_y = 4;
  21354. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .coord_z = 7;
  21355. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .mask = 16'hC30C;
  21356. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .modeMux = 1'b1;
  21357. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  21358. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  21359. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .BypassEn = 1'b1;
  21360. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  21361. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] (
  21362. .A(vcc),
  21363. .B(vcc),
  21364. .C(\~GND~combout ),
  21365. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3]),
  21366. .Cin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[2]~9 ),
  21367. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3]),
  21368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  21369. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  21370. .SyncReset(SyncReset_X50_Y2_GND),
  21371. .ShiftData(),
  21372. .SyncLoad(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ),
  21373. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3]~10_combout ),
  21374. .Cout(),
  21375. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [3]));
  21376. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .coord_x = 14;
  21377. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .coord_y = 4;
  21378. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .coord_z = 8;
  21379. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .mask = 16'h0FF0;
  21380. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .modeMux = 1'b1;
  21381. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  21382. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  21383. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .BypassEn = 1'b1;
  21384. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  21385. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_bit (
  21386. .A(vcc),
  21387. .B(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  21388. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [1]),
  21389. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_baud_cnt [2]),
  21390. .Cin(),
  21391. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  21392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  21393. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  21394. .SyncReset(),
  21395. .ShiftData(),
  21396. .SyncLoad(),
  21397. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always2~1_combout ),
  21398. .Cout(),
  21399. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ));
  21400. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .coord_x = 14;
  21401. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .coord_y = 4;
  21402. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .coord_z = 13;
  21403. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .mask = 16'hC000;
  21404. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .modeMux = 1'b0;
  21405. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .FeedbackMux = 1'b0;
  21406. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .ShiftMux = 1'b0;
  21407. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .BypassEn = 1'b0;
  21408. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_bit .CarryEnb = 1'b1;
  21409. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] (
  21410. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21411. .B(\macro_inst|u_uart[0]|u_rx[1]|always3~2_combout ),
  21412. .C(vcc),
  21413. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  21414. .Cin(),
  21415. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]),
  21416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout_X49_Y4_SIG_SIG ),
  21417. .AsyncReset(AsyncReset_X49_Y4_GND),
  21418. .SyncReset(),
  21419. .ShiftData(),
  21420. .SyncLoad(),
  21421. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~4_combout ),
  21422. .Cout(),
  21423. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]));
  21424. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .coord_x = 1;
  21425. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .coord_y = 4;
  21426. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .coord_z = 13;
  21427. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .mask = 16'hABAF;
  21428. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .modeMux = 1'b0;
  21429. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  21430. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .ShiftMux = 1'b0;
  21431. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .BypassEn = 1'b0;
  21432. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[0] .CarryEnb = 1'b1;
  21433. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] (
  21434. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21435. .B(\macro_inst|u_uart[0]|u_rx[1]|always3~2_combout ),
  21436. .C(\macro_inst|u_uart[0]|u_rx[1]|Add4~2_combout ),
  21437. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  21438. .Cin(),
  21439. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]),
  21440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout_X49_Y4_SIG_SIG ),
  21441. .AsyncReset(AsyncReset_X49_Y4_GND),
  21442. .SyncReset(),
  21443. .ShiftData(),
  21444. .SyncLoad(),
  21445. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~5_combout ),
  21446. .Cout(),
  21447. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]));
  21448. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .coord_x = 1;
  21449. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .coord_y = 4;
  21450. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .coord_z = 7;
  21451. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .mask = 16'hEFAB;
  21452. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .modeMux = 1'b0;
  21453. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  21454. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .ShiftMux = 1'b0;
  21455. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .BypassEn = 1'b0;
  21456. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1] .CarryEnb = 1'b1;
  21457. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] (
  21458. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21459. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  21460. .C(\macro_inst|u_uart[0]|u_rx[1]|always3~1_combout ),
  21461. .D(\macro_inst|u_uart[0]|u_rx[1]|Add4~1_combout ),
  21462. .Cin(),
  21463. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2]),
  21464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[1]~3_combout_X49_Y4_SIG_SIG ),
  21465. .AsyncReset(AsyncReset_X49_Y4_GND),
  21466. .SyncReset(),
  21467. .ShiftData(),
  21468. .SyncLoad(),
  21469. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~2_combout ),
  21470. .Cout(),
  21471. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2]));
  21472. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .coord_x = 1;
  21473. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .coord_y = 4;
  21474. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .coord_z = 10;
  21475. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .mask = 16'hAABF;
  21476. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .modeMux = 1'b0;
  21477. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  21478. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .ShiftMux = 1'b0;
  21479. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .BypassEn = 1'b0;
  21480. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[2] .CarryEnb = 1'b1;
  21481. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] (
  21482. .A(\macro_inst|u_uart[0]|u_rx[1]|Add4~0_combout ),
  21483. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21484. .C(vcc),
  21485. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  21486. .Cin(),
  21487. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [3]),
  21488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y4_SIG_VCC ),
  21489. .AsyncReset(AsyncReset_X48_Y4_GND),
  21490. .SyncReset(),
  21491. .ShiftData(),
  21492. .SyncLoad(),
  21493. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt~1_combout ),
  21494. .Cout(),
  21495. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [3]));
  21496. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .coord_x = 1;
  21497. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .coord_y = 3;
  21498. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .coord_z = 13;
  21499. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .mask = 16'h1130;
  21500. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .modeMux = 1'b0;
  21501. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  21502. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .ShiftMux = 1'b0;
  21503. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .BypassEn = 1'b0;
  21504. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt[3] .CarryEnb = 1'b1;
  21505. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req (
  21506. .A(\macro_inst|u_uart[0]|u_regs|rx_dma_en [1]),
  21507. .B(\rv32.ext_dma_DMACCLR[1] ),
  21508. .C(vcc),
  21509. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  21510. .Cin(),
  21511. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~q ),
  21512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y2_SIG_VCC ),
  21513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y2_SIG ),
  21514. .SyncReset(),
  21515. .ShiftData(),
  21516. .SyncLoad(),
  21517. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~0_combout ),
  21518. .Cout(),
  21519. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~q ));
  21520. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .coord_x = 7;
  21521. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .coord_y = 4;
  21522. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .coord_z = 5;
  21523. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .mask = 16'h2220;
  21524. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .modeMux = 1'b0;
  21525. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .FeedbackMux = 1'b1;
  21526. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .ShiftMux = 1'b0;
  21527. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .BypassEn = 1'b0;
  21528. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req .CarryEnb = 1'b1;
  21529. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] (
  21530. .A(vcc),
  21531. .B(\macro_inst|u_uart[0]|u_regs|rx_read [1]),
  21532. .C(vcc),
  21533. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~1_combout ),
  21534. .Cin(),
  21535. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  21536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ),
  21537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  21538. .SyncReset(),
  21539. .ShiftData(),
  21540. .SyncLoad(),
  21541. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter~0_combout ),
  21542. .Cout(),
  21543. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]));
  21544. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .coord_x = 18;
  21545. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .coord_y = 2;
  21546. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .coord_z = 6;
  21547. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .mask = 16'h3F30;
  21548. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .modeMux = 1'b0;
  21549. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  21550. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  21551. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .BypassEn = 1'b0;
  21552. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  21553. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] (
  21554. .A(vcc),
  21555. .B(vcc),
  21556. .C(vcc),
  21557. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [0]),
  21558. .Cin(),
  21559. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~q ),
  21560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21561. .AsyncReset(AsyncReset_X46_Y3_GND),
  21562. .SyncReset(),
  21563. .ShiftData(),
  21564. .SyncLoad(),
  21565. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~feeder_combout ),
  21566. .Cout(),
  21567. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0]~q ));
  21568. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .coord_x = 6;
  21569. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .coord_y = 3;
  21570. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .coord_z = 12;
  21571. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .mask = 16'hFF00;
  21572. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  21573. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  21574. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  21575. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .BypassEn = 1'b0;
  21576. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  21577. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] (
  21578. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  21579. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  21580. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1]),
  21581. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  21582. .Cin(),
  21583. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1]~q ),
  21584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X47_Y3_SIG_SIG ),
  21585. .AsyncReset(AsyncReset_X47_Y3_GND),
  21586. .SyncReset(SyncReset_X47_Y3_GND),
  21587. .ShiftData(),
  21588. .SyncLoad(SyncLoad_X47_Y3_VCC),
  21589. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~0_combout ),
  21590. .Cout(),
  21591. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1]~q ));
  21592. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .coord_x = 7;
  21593. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .coord_y = 3;
  21594. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .coord_z = 0;
  21595. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .mask = 16'h7700;
  21596. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  21597. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  21598. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  21599. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  21600. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  21601. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] (
  21602. .A(vcc),
  21603. .B(vcc),
  21604. .C(vcc),
  21605. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2]),
  21606. .Cin(),
  21607. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~q ),
  21608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21609. .AsyncReset(AsyncReset_X46_Y3_GND),
  21610. .SyncReset(),
  21611. .ShiftData(),
  21612. .SyncLoad(),
  21613. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~feeder_combout ),
  21614. .Cout(),
  21615. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2]~q ));
  21616. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .coord_x = 6;
  21617. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .coord_y = 3;
  21618. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .coord_z = 1;
  21619. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .mask = 16'hFF00;
  21620. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  21621. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  21622. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  21623. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .BypassEn = 1'b0;
  21624. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  21625. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] (
  21626. .A(vcc),
  21627. .B(vcc),
  21628. .C(vcc),
  21629. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3]),
  21630. .Cin(),
  21631. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~q ),
  21632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21633. .AsyncReset(AsyncReset_X46_Y3_GND),
  21634. .SyncReset(),
  21635. .ShiftData(),
  21636. .SyncLoad(),
  21637. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~feeder_combout ),
  21638. .Cout(),
  21639. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3]~q ));
  21640. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .coord_x = 6;
  21641. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .coord_y = 3;
  21642. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .coord_z = 5;
  21643. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .mask = 16'hFF00;
  21644. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  21645. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  21646. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  21647. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .BypassEn = 1'b0;
  21648. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  21649. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] (
  21650. .A(vcc),
  21651. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21652. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [4]),
  21653. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector4~0_combout ),
  21654. .Cin(),
  21655. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4]~q ),
  21656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X47_Y3_SIG_SIG ),
  21657. .AsyncReset(AsyncReset_X47_Y3_GND),
  21658. .SyncReset(SyncReset_X47_Y3_GND),
  21659. .ShiftData(),
  21660. .SyncLoad(SyncLoad_X47_Y3_VCC),
  21661. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector2~0_combout ),
  21662. .Cout(),
  21663. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4]~q ));
  21664. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .coord_x = 7;
  21665. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .coord_y = 3;
  21666. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .coord_z = 14;
  21667. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .mask = 16'hCC00;
  21668. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  21669. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  21670. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  21671. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  21672. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  21673. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] (
  21674. .A(),
  21675. .B(),
  21676. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5]),
  21677. .D(),
  21678. .Cin(),
  21679. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5]~q ),
  21680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21681. .AsyncReset(AsyncReset_X46_Y3_GND),
  21682. .SyncReset(SyncReset_X46_Y3_GND),
  21683. .ShiftData(),
  21684. .SyncLoad(SyncLoad_X46_Y3_VCC),
  21685. .LutOut(),
  21686. .Cout(),
  21687. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5]~q ));
  21688. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .coord_x = 6;
  21689. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .coord_y = 3;
  21690. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .coord_z = 2;
  21691. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .mask = 16'hFFFF;
  21692. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .modeMux = 1'b1;
  21693. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  21694. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  21695. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  21696. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  21697. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] (
  21698. .A(vcc),
  21699. .B(vcc),
  21700. .C(vcc),
  21701. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6]),
  21702. .Cin(),
  21703. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~q ),
  21704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21705. .AsyncReset(AsyncReset_X46_Y3_GND),
  21706. .SyncReset(),
  21707. .ShiftData(),
  21708. .SyncLoad(),
  21709. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~feeder_combout ),
  21710. .Cout(),
  21711. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6]~q ));
  21712. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .coord_x = 6;
  21713. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .coord_y = 3;
  21714. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .coord_z = 0;
  21715. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .mask = 16'hFF00;
  21716. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  21717. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  21718. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  21719. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .BypassEn = 1'b0;
  21720. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  21721. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] (
  21722. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  21723. .B(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  21724. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7]),
  21725. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  21726. .Cin(),
  21727. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7]~q ),
  21728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout_X46_Y3_SIG_SIG ),
  21729. .AsyncReset(AsyncReset_X46_Y3_GND),
  21730. .SyncReset(SyncReset_X46_Y3_GND),
  21731. .ShiftData(),
  21732. .SyncLoad(SyncLoad_X46_Y3_VCC),
  21733. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~0_combout ),
  21734. .Cout(),
  21735. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7]~q ));
  21736. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .coord_x = 6;
  21737. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .coord_y = 3;
  21738. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .coord_z = 10;
  21739. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .mask = 16'h2000;
  21740. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  21741. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  21742. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  21743. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  21744. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  21745. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 (
  21746. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  21747. .B(\macro_inst|u_uart[0]|u_rx[1]|always2~0_combout ),
  21748. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ),
  21749. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_sample~0_combout ),
  21750. .Cin(),
  21751. .Qin(),
  21752. .Clk(),
  21753. .AsyncReset(),
  21754. .SyncReset(),
  21755. .ShiftData(),
  21756. .SyncLoad(),
  21757. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  21758. .Cout(),
  21759. .Q());
  21760. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .coord_x = 6;
  21761. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .coord_y = 2;
  21762. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .coord_z = 6;
  21763. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .mask = 16'h4000;
  21764. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  21765. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  21766. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  21767. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  21768. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  21769. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_idle (
  21770. .A(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  21771. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  21772. .C(vcc),
  21773. .D(\macro_inst|u_uart[0]|u_rx[1]|always8~0_combout ),
  21774. .Cin(),
  21775. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_idle~q ),
  21776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  21777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  21778. .SyncReset(),
  21779. .ShiftData(),
  21780. .SyncLoad(),
  21781. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_idle~0_combout ),
  21782. .Cout(),
  21783. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_idle~q ));
  21784. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .coord_x = 17;
  21785. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .coord_y = 1;
  21786. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .coord_z = 7;
  21787. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .mask = 16'hFF70;
  21788. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .modeMux = 1'b0;
  21789. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .FeedbackMux = 1'b1;
  21790. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .ShiftMux = 1'b0;
  21791. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .BypassEn = 1'b0;
  21792. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle .CarryEnb = 1'b1;
  21793. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en (
  21794. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_fifo|counter [0]),
  21795. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  21796. .C(vcc),
  21797. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  21798. .Cin(),
  21799. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~q ),
  21800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  21801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  21802. .SyncReset(),
  21803. .ShiftData(),
  21804. .SyncLoad(),
  21805. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~0_combout ),
  21806. .Cout(),
  21807. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_idle_en~q ));
  21808. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .coord_x = 17;
  21809. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .coord_y = 1;
  21810. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .coord_z = 11;
  21811. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .mask = 16'hBAFA;
  21812. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .modeMux = 1'b0;
  21813. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .FeedbackMux = 1'b1;
  21814. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .ShiftMux = 1'b0;
  21815. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .BypassEn = 1'b0;
  21816. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_idle_en .CarryEnb = 1'b1;
  21817. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] (
  21818. .A(vcc),
  21819. .B(vcc),
  21820. .C(\SIM_IO[1]~input_o ),
  21821. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  21822. .Cin(),
  21823. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_in [0]),
  21824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y1_SIG_SIG ),
  21825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  21826. .SyncReset(),
  21827. .ShiftData(),
  21828. .SyncLoad(),
  21829. .LutOut(\macro_inst|uart_rxd [1]),
  21830. .Cout(),
  21831. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_in [0]));
  21832. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .coord_x = 4;
  21833. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .coord_y = 3;
  21834. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .coord_z = 9;
  21835. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .mask = 16'h000F;
  21836. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .modeMux = 1'b0;
  21837. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .FeedbackMux = 1'b0;
  21838. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .ShiftMux = 1'b0;
  21839. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .BypassEn = 1'b0;
  21840. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[0] .CarryEnb = 1'b1;
  21841. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] (
  21842. .A(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  21843. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  21844. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_in [0]),
  21845. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  21846. .Cin(),
  21847. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_in [1]),
  21848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  21849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  21850. .SyncReset(SyncReset_X45_Y3_GND),
  21851. .ShiftData(),
  21852. .SyncLoad(SyncLoad_X45_Y3_VCC),
  21853. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~1_combout ),
  21854. .Cout(),
  21855. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_in [1]));
  21856. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .coord_x = 2;
  21857. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .coord_y = 1;
  21858. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .coord_z = 0;
  21859. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .mask = 16'h8800;
  21860. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .modeMux = 1'b0;
  21861. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .FeedbackMux = 1'b0;
  21862. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .ShiftMux = 1'b0;
  21863. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .BypassEn = 1'b1;
  21864. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[1] .CarryEnb = 1'b1;
  21865. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] (
  21866. .A(vcc),
  21867. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  21868. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_in [1]),
  21869. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  21870. .Cin(),
  21871. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_in [2]),
  21872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  21873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  21874. .SyncReset(SyncReset_X45_Y3_GND),
  21875. .ShiftData(),
  21876. .SyncLoad(SyncLoad_X45_Y3_VCC),
  21877. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~0_combout ),
  21878. .Cout(),
  21879. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_in [2]));
  21880. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .coord_x = 2;
  21881. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .coord_y = 1;
  21882. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .coord_z = 4;
  21883. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .mask = 16'hCC00;
  21884. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .modeMux = 1'b0;
  21885. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .FeedbackMux = 1'b0;
  21886. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .ShiftMux = 1'b0;
  21887. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .BypassEn = 1'b1;
  21888. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[2] .CarryEnb = 1'b1;
  21889. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] (
  21890. .A(vcc),
  21891. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  21892. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_in [2]),
  21893. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  21894. .Cin(),
  21895. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_in [3]),
  21896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  21897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  21898. .SyncReset(SyncReset_X45_Y3_GND),
  21899. .ShiftData(),
  21900. .SyncLoad(SyncLoad_X45_Y3_VCC),
  21901. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~5_combout ),
  21902. .Cout(),
  21903. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_in [3]));
  21904. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .coord_x = 2;
  21905. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .coord_y = 1;
  21906. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .coord_z = 5;
  21907. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .mask = 16'h0033;
  21908. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .modeMux = 1'b0;
  21909. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .FeedbackMux = 1'b0;
  21910. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .ShiftMux = 1'b0;
  21911. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .BypassEn = 1'b1;
  21912. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[3] .CarryEnb = 1'b1;
  21913. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] (
  21914. .A(vcc),
  21915. .B(vcc),
  21916. .C(vcc),
  21917. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_in [3]),
  21918. .Cin(),
  21919. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_in [4]),
  21920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  21921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  21922. .SyncReset(),
  21923. .ShiftData(),
  21924. .SyncLoad(),
  21925. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_in[4]~0_combout ),
  21926. .Cout(),
  21927. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_in [4]));
  21928. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .coord_x = 2;
  21929. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .coord_y = 1;
  21930. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .coord_z = 10;
  21931. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .mask = 16'h00FF;
  21932. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .modeMux = 1'b0;
  21933. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .FeedbackMux = 1'b0;
  21934. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .ShiftMux = 1'b0;
  21935. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .BypassEn = 1'b0;
  21936. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_in[4] .CarryEnb = 1'b1;
  21937. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_parity (
  21938. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~0_combout ),
  21939. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  21940. .C(vcc),
  21941. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  21942. .Cin(),
  21943. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~q ),
  21944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  21945. .AsyncReset(AsyncReset_X46_Y1_GND),
  21946. .SyncReset(),
  21947. .ShiftData(),
  21948. .SyncLoad(),
  21949. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~1_combout ),
  21950. .Cout(),
  21951. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_parity~q ));
  21952. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .coord_x = 3;
  21953. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .coord_y = 3;
  21954. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .coord_z = 6;
  21955. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .mask = 16'h12DE;
  21956. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .modeMux = 1'b0;
  21957. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .FeedbackMux = 1'b1;
  21958. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .ShiftMux = 1'b0;
  21959. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .BypassEn = 1'b0;
  21960. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_parity .CarryEnb = 1'b1;
  21961. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] (
  21962. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1]),
  21963. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2]),
  21964. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1]),
  21965. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3]),
  21966. .Cin(),
  21967. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [0]),
  21968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  21969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  21970. .SyncReset(SyncReset_X46_Y3_GND),
  21971. .ShiftData(),
  21972. .SyncLoad(SyncLoad_X46_Y3_VCC),
  21973. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always11~1_combout ),
  21974. .Cout(),
  21975. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [0]));
  21976. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .coord_x = 6;
  21977. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .coord_y = 3;
  21978. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .coord_z = 9;
  21979. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .mask = 16'h0001;
  21980. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .modeMux = 1'b0;
  21981. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .FeedbackMux = 1'b1;
  21982. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .ShiftMux = 1'b0;
  21983. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .BypassEn = 1'b1;
  21984. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[0] .CarryEnb = 1'b1;
  21985. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] (
  21986. .A(vcc),
  21987. .B(vcc),
  21988. .C(vcc),
  21989. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2]),
  21990. .Cin(),
  21991. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1]),
  21992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  21993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  21994. .SyncReset(),
  21995. .ShiftData(),
  21996. .SyncLoad(),
  21997. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1]~feeder_combout ),
  21998. .Cout(),
  21999. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [1]));
  22000. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .coord_x = 6;
  22001. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .coord_y = 3;
  22002. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .coord_z = 14;
  22003. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .mask = 16'hFF00;
  22004. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .modeMux = 1'b0;
  22005. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  22006. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .ShiftMux = 1'b0;
  22007. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .BypassEn = 1'b0;
  22008. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[1] .CarryEnb = 1'b1;
  22009. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] (
  22010. .A(vcc),
  22011. .B(vcc),
  22012. .C(vcc),
  22013. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3]),
  22014. .Cin(),
  22015. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2]),
  22016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22018. .SyncReset(),
  22019. .ShiftData(),
  22020. .SyncLoad(),
  22021. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2]~feeder_combout ),
  22022. .Cout(),
  22023. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [2]));
  22024. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .coord_x = 6;
  22025. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .coord_y = 3;
  22026. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .coord_z = 3;
  22027. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .mask = 16'hFF00;
  22028. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .modeMux = 1'b0;
  22029. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  22030. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .ShiftMux = 1'b0;
  22031. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .BypassEn = 1'b0;
  22032. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[2] .CarryEnb = 1'b1;
  22033. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] (
  22034. .A(vcc),
  22035. .B(vcc),
  22036. .C(vcc),
  22037. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [4]),
  22038. .Cin(),
  22039. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3]),
  22040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22042. .SyncReset(),
  22043. .ShiftData(),
  22044. .SyncLoad(),
  22045. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3]~feeder_combout ),
  22046. .Cout(),
  22047. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [3]));
  22048. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .coord_x = 6;
  22049. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .coord_y = 3;
  22050. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .coord_z = 15;
  22051. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .mask = 16'hFF00;
  22052. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .modeMux = 1'b0;
  22053. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  22054. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .ShiftMux = 1'b0;
  22055. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .BypassEn = 1'b0;
  22056. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[3] .CarryEnb = 1'b1;
  22057. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] (
  22058. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5]),
  22059. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7]),
  22060. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5]),
  22061. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6]),
  22062. .Cin(),
  22063. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [4]),
  22064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22066. .SyncReset(SyncReset_X46_Y3_GND),
  22067. .ShiftData(),
  22068. .SyncLoad(SyncLoad_X46_Y3_VCC),
  22069. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|always11~0_combout ),
  22070. .Cout(),
  22071. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [4]));
  22072. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .coord_x = 6;
  22073. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .coord_y = 3;
  22074. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .coord_z = 7;
  22075. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .mask = 16'h0001;
  22076. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .modeMux = 1'b0;
  22077. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  22078. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .ShiftMux = 1'b0;
  22079. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .BypassEn = 1'b1;
  22080. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[4] .CarryEnb = 1'b1;
  22081. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] (
  22082. .A(vcc),
  22083. .B(vcc),
  22084. .C(vcc),
  22085. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6]),
  22086. .Cin(),
  22087. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5]),
  22088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22090. .SyncReset(),
  22091. .ShiftData(),
  22092. .SyncLoad(),
  22093. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5]~feeder_combout ),
  22094. .Cout(),
  22095. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [5]));
  22096. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .coord_x = 6;
  22097. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .coord_y = 3;
  22098. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .coord_z = 8;
  22099. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .mask = 16'hFF00;
  22100. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .modeMux = 1'b0;
  22101. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  22102. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .ShiftMux = 1'b0;
  22103. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .BypassEn = 1'b0;
  22104. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[5] .CarryEnb = 1'b1;
  22105. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] (
  22106. .A(vcc),
  22107. .B(vcc),
  22108. .C(vcc),
  22109. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7]),
  22110. .Cin(),
  22111. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6]),
  22112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22114. .SyncReset(),
  22115. .ShiftData(),
  22116. .SyncLoad(),
  22117. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6]~feeder_combout ),
  22118. .Cout(),
  22119. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [6]));
  22120. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .coord_x = 6;
  22121. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .coord_y = 3;
  22122. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .coord_z = 13;
  22123. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .mask = 16'hFF00;
  22124. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .modeMux = 1'b0;
  22125. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  22126. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .ShiftMux = 1'b0;
  22127. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .BypassEn = 1'b0;
  22128. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[6] .CarryEnb = 1'b1;
  22129. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] (
  22130. .A(vcc),
  22131. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_in [4]),
  22132. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_in [2]),
  22133. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_in [3]),
  22134. .Cin(),
  22135. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7]),
  22136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[1]|always4~2_combout_X46_Y3_SIG_SIG ),
  22137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y3_SIG ),
  22138. .SyncReset(),
  22139. .ShiftData(),
  22140. .SyncLoad(),
  22141. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  22142. .Cout(),
  22143. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg [7]));
  22144. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .coord_x = 6;
  22145. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .coord_y = 3;
  22146. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .coord_z = 11;
  22147. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .mask = 16'h0CCF;
  22148. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .modeMux = 1'b0;
  22149. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  22150. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .ShiftMux = 1'b0;
  22151. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .BypassEn = 1'b0;
  22152. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_shift_reg[7] .CarryEnb = 1'b1;
  22153. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA (
  22154. .A(\macro_inst|u_uart[0]|u_rx[1]|Selector2~1_combout ),
  22155. .B(\macro_inst|u_uart[0]|u_rx[1]|Selector0~2_combout ),
  22156. .C(\macro_inst|u_uart[0]|u_rx[1]|Selector2~0_combout ),
  22157. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  22158. .Cin(),
  22159. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ),
  22160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ),
  22161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ),
  22162. .SyncReset(),
  22163. .ShiftData(),
  22164. .SyncLoad(),
  22165. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector2~2_combout ),
  22166. .Cout(),
  22167. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA~q ));
  22168. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .coord_x = 7;
  22169. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .coord_y = 3;
  22170. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .coord_z = 9;
  22171. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .mask = 16'h3222;
  22172. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .modeMux = 1'b0;
  22173. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  22174. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .ShiftMux = 1'b0;
  22175. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .BypassEn = 1'b0;
  22176. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_DATA .CarryEnb = 1'b1;
  22177. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE (
  22178. .A(\macro_inst|u_uart[0]|u_rx[1]|Add1~0_combout ),
  22179. .B(vcc),
  22180. .C(vcc),
  22181. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~2_combout ),
  22182. .Cin(),
  22183. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ),
  22184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ),
  22185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ),
  22186. .SyncReset(),
  22187. .ShiftData(),
  22188. .SyncLoad(),
  22189. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector0~3_combout ),
  22190. .Cout(),
  22191. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE~q ));
  22192. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .coord_x = 7;
  22193. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .coord_y = 3;
  22194. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .coord_z = 2;
  22195. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .mask = 16'h00F5;
  22196. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .modeMux = 1'b0;
  22197. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  22198. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  22199. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .BypassEn = 1'b0;
  22200. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  22201. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY (
  22202. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~0_combout ),
  22203. .B(\macro_inst|u_uart[0]|u_rx[1]|Selector3~0_combout ),
  22204. .C(vcc),
  22205. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector4~4_combout ),
  22206. .Cin(),
  22207. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  22208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ),
  22209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ),
  22210. .SyncReset(),
  22211. .ShiftData(),
  22212. .SyncLoad(),
  22213. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~1_combout ),
  22214. .Cout(),
  22215. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ));
  22216. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .coord_x = 7;
  22217. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .coord_y = 3;
  22218. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .coord_z = 4;
  22219. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .mask = 16'h88F8;
  22220. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .modeMux = 1'b0;
  22221. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  22222. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  22223. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .BypassEn = 1'b0;
  22224. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  22225. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START (
  22226. .A(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout ),
  22227. .B(\macro_inst|u_uart[0]|u_rx[1]|Selector0~4_combout ),
  22228. .C(vcc),
  22229. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector0~2_combout ),
  22230. .Cin(),
  22231. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ),
  22232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ),
  22233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ),
  22234. .SyncReset(),
  22235. .ShiftData(),
  22236. .SyncLoad(),
  22237. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Selector1~0_combout ),
  22238. .Cout(),
  22239. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START~q ));
  22240. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .coord_x = 7;
  22241. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .coord_y = 3;
  22242. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .coord_z = 13;
  22243. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .mask = 16'h00BA;
  22244. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .modeMux = 1'b0;
  22245. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .FeedbackMux = 1'b1;
  22246. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .ShiftMux = 1'b0;
  22247. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .BypassEn = 1'b0;
  22248. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_START .CarryEnb = 1'b1;
  22249. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP (
  22250. .A(vcc),
  22251. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0_combout ),
  22252. .C(vcc),
  22253. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector4~4_combout ),
  22254. .Cin(),
  22255. .Qin(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ),
  22256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y3_SIG_VCC ),
  22257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y3_SIG ),
  22258. .SyncReset(),
  22259. .ShiftData(),
  22260. .SyncLoad(),
  22261. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~1_combout ),
  22262. .Cout(),
  22263. .Q(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~q ));
  22264. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .coord_x = 7;
  22265. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .coord_y = 3;
  22266. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .coord_z = 12;
  22267. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .mask = 16'hCCF0;
  22268. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .modeMux = 1'b0;
  22269. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  22270. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .ShiftMux = 1'b0;
  22271. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .BypassEn = 1'b0;
  22272. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP .CarryEnb = 1'b1;
  22273. alta_slice \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 (
  22274. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  22275. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_bit~q ),
  22276. .C(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_PARITY~q ),
  22277. .D(\macro_inst|u_uart[0]|u_rx[1]|Selector3~0_combout ),
  22278. .Cin(),
  22279. .Qin(),
  22280. .Clk(),
  22281. .AsyncReset(),
  22282. .SyncReset(),
  22283. .ShiftData(),
  22284. .SyncLoad(),
  22285. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0_combout ),
  22286. .Cout(),
  22287. .Q());
  22288. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .coord_x = 7;
  22289. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .coord_y = 3;
  22290. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .coord_z = 7;
  22291. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .mask = 16'hD5C0;
  22292. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  22293. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  22294. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  22295. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  22296. defparam \macro_inst|u_uart[0]|u_rx[1]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  22297. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Add4~0 (
  22298. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]),
  22299. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2]),
  22300. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3]),
  22301. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]),
  22302. .Cin(),
  22303. .Qin(),
  22304. .Clk(),
  22305. .AsyncReset(),
  22306. .SyncReset(),
  22307. .ShiftData(),
  22308. .SyncLoad(),
  22309. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Add4~0_combout ),
  22310. .Cout(),
  22311. .Q());
  22312. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .coord_x = 4;
  22313. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .coord_y = 1;
  22314. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .coord_z = 14;
  22315. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .mask = 16'h0F1E;
  22316. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .modeMux = 1'b0;
  22317. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .FeedbackMux = 1'b0;
  22318. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .ShiftMux = 1'b0;
  22319. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .BypassEn = 1'b0;
  22320. defparam \macro_inst|u_uart[0]|u_rx[2]|Add4~0 .CarryEnb = 1'b1;
  22321. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 (
  22322. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ),
  22323. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22324. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22325. .D(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22326. .Cin(),
  22327. .Qin(),
  22328. .Clk(),
  22329. .AsyncReset(),
  22330. .SyncReset(),
  22331. .ShiftData(),
  22332. .SyncLoad(),
  22333. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  22334. .Cout(),
  22335. .Q());
  22336. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .coord_x = 6;
  22337. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .coord_y = 1;
  22338. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .coord_z = 13;
  22339. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .mask = 16'h0200;
  22340. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .modeMux = 1'b0;
  22341. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .FeedbackMux = 1'b0;
  22342. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .ShiftMux = 1'b0;
  22343. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .BypassEn = 1'b0;
  22344. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~1 .CarryEnb = 1'b1;
  22345. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 (
  22346. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ),
  22347. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_sample~0_combout ),
  22348. .C(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22349. .D(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22350. .Cin(),
  22351. .Qin(),
  22352. .Clk(),
  22353. .AsyncReset(),
  22354. .SyncReset(),
  22355. .ShiftData(),
  22356. .SyncLoad(),
  22357. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~2_combout ),
  22358. .Cout(),
  22359. .Q());
  22360. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .coord_x = 7;
  22361. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .coord_y = 1;
  22362. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .coord_z = 13;
  22363. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .mask = 16'h8000;
  22364. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .modeMux = 1'b0;
  22365. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .FeedbackMux = 1'b0;
  22366. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .ShiftMux = 1'b0;
  22367. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .BypassEn = 1'b0;
  22368. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~2 .CarryEnb = 1'b1;
  22369. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 (
  22370. .A(vcc),
  22371. .B(vcc),
  22372. .C(\macro_inst|u_uart[0]|u_rx[2]|Selector4~2_combout ),
  22373. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  22374. .Cin(),
  22375. .Qin(),
  22376. .Clk(),
  22377. .AsyncReset(),
  22378. .SyncReset(),
  22379. .ShiftData(),
  22380. .SyncLoad(),
  22381. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~3_combout ),
  22382. .Cout(),
  22383. .Q());
  22384. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .coord_x = 4;
  22385. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .coord_y = 1;
  22386. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .coord_z = 9;
  22387. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .mask = 16'hF000;
  22388. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .modeMux = 1'b0;
  22389. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .FeedbackMux = 1'b0;
  22390. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .ShiftMux = 1'b0;
  22391. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .BypassEn = 1'b0;
  22392. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~3 .CarryEnb = 1'b1;
  22393. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 (
  22394. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~3_combout ),
  22395. .B(\macro_inst|u_uart[0]|u_rx[2]|always3~2_combout ),
  22396. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  22397. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  22398. .Cin(),
  22399. .Qin(),
  22400. .Clk(),
  22401. .AsyncReset(),
  22402. .SyncReset(),
  22403. .ShiftData(),
  22404. .SyncLoad(),
  22405. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~4_combout ),
  22406. .Cout(),
  22407. .Q());
  22408. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .coord_x = 5;
  22409. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .coord_y = 1;
  22410. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .coord_z = 4;
  22411. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .mask = 16'hFE00;
  22412. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .modeMux = 1'b0;
  22413. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .FeedbackMux = 1'b0;
  22414. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .ShiftMux = 1'b0;
  22415. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .BypassEn = 1'b0;
  22416. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~4 .CarryEnb = 1'b1;
  22417. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 (
  22418. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~4_combout ),
  22419. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  22420. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ),
  22421. .D(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22422. .Cin(),
  22423. .Qin(),
  22424. .Clk(),
  22425. .AsyncReset(),
  22426. .SyncReset(),
  22427. .ShiftData(),
  22428. .SyncLoad(),
  22429. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~5_combout ),
  22430. .Cout(),
  22431. .Q());
  22432. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .coord_x = 5;
  22433. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .coord_y = 1;
  22434. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .coord_z = 6;
  22435. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .mask = 16'h4440;
  22436. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .modeMux = 1'b0;
  22437. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .FeedbackMux = 1'b0;
  22438. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .ShiftMux = 1'b0;
  22439. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .BypassEn = 1'b0;
  22440. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector2~5 .CarryEnb = 1'b1;
  22441. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 (
  22442. .A(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  22443. .B(vcc),
  22444. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  22445. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  22446. .Cin(),
  22447. .Qin(),
  22448. .Clk(),
  22449. .AsyncReset(),
  22450. .SyncReset(),
  22451. .ShiftData(),
  22452. .SyncLoad(),
  22453. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~0_combout ),
  22454. .Cout(),
  22455. .Q());
  22456. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .coord_x = 5;
  22457. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .coord_y = 1;
  22458. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .coord_z = 2;
  22459. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .mask = 16'hA000;
  22460. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .modeMux = 1'b0;
  22461. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .FeedbackMux = 1'b0;
  22462. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .ShiftMux = 1'b0;
  22463. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .BypassEn = 1'b0;
  22464. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~0 .CarryEnb = 1'b1;
  22465. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 (
  22466. .A(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  22467. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  22468. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  22469. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  22470. .Cin(),
  22471. .Qin(),
  22472. .Clk(),
  22473. .AsyncReset(),
  22474. .SyncReset(),
  22475. .ShiftData(),
  22476. .SyncLoad(),
  22477. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~1_combout ),
  22478. .Cout(),
  22479. .Q());
  22480. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .coord_x = 5;
  22481. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .coord_y = 1;
  22482. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .coord_z = 7;
  22483. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .mask = 16'hF800;
  22484. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .modeMux = 1'b0;
  22485. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .FeedbackMux = 1'b0;
  22486. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .ShiftMux = 1'b0;
  22487. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .BypassEn = 1'b0;
  22488. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~1 .CarryEnb = 1'b1;
  22489. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 (
  22490. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0]),
  22491. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3]),
  22492. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22493. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22494. .Cin(),
  22495. .Qin(),
  22496. .Clk(),
  22497. .AsyncReset(),
  22498. .SyncReset(),
  22499. .ShiftData(),
  22500. .SyncLoad(),
  22501. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~2_combout ),
  22502. .Cout(),
  22503. .Q());
  22504. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .coord_x = 6;
  22505. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .coord_y = 1;
  22506. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .coord_z = 8;
  22507. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .mask = 16'h0001;
  22508. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .modeMux = 1'b0;
  22509. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .FeedbackMux = 1'b0;
  22510. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .ShiftMux = 1'b0;
  22511. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .BypassEn = 1'b0;
  22512. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~2 .CarryEnb = 1'b1;
  22513. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 (
  22514. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector4~2_combout ),
  22515. .B(vcc),
  22516. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ),
  22517. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  22518. .Cin(),
  22519. .Qin(),
  22520. .Clk(),
  22521. .AsyncReset(),
  22522. .SyncReset(),
  22523. .ShiftData(),
  22524. .SyncLoad(),
  22525. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~3_combout ),
  22526. .Cout(),
  22527. .Q());
  22528. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .coord_x = 6;
  22529. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .coord_y = 1;
  22530. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .coord_z = 14;
  22531. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .mask = 16'h0A00;
  22532. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .modeMux = 1'b0;
  22533. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .FeedbackMux = 1'b0;
  22534. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .ShiftMux = 1'b0;
  22535. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .BypassEn = 1'b0;
  22536. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~3 .CarryEnb = 1'b1;
  22537. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 (
  22538. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ),
  22539. .B(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  22540. .C(\macro_inst|u_uart[0]|u_rx[2]|Selector4~3_combout ),
  22541. .D(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22542. .Cin(),
  22543. .Qin(),
  22544. .Clk(),
  22545. .AsyncReset(),
  22546. .SyncReset(),
  22547. .ShiftData(),
  22548. .SyncLoad(),
  22549. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~4_combout ),
  22550. .Cout(),
  22551. .Q());
  22552. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .coord_x = 6;
  22553. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .coord_y = 1;
  22554. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .coord_z = 1;
  22555. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .mask = 16'hA8F5;
  22556. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .modeMux = 1'b0;
  22557. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .FeedbackMux = 1'b0;
  22558. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .ShiftMux = 1'b0;
  22559. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .BypassEn = 1'b0;
  22560. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~4 .CarryEnb = 1'b1;
  22561. alta_slice \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 (
  22562. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector4~4_combout ),
  22563. .B(\macro_inst|u_uart[0]|u_rx[2]|Selector4~1_combout ),
  22564. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  22565. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  22566. .Cin(),
  22567. .Qin(),
  22568. .Clk(),
  22569. .AsyncReset(),
  22570. .SyncReset(),
  22571. .ShiftData(),
  22572. .SyncLoad(),
  22573. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector4~5_combout ),
  22574. .Cout(),
  22575. .Q());
  22576. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .coord_x = 5;
  22577. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .coord_y = 1;
  22578. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .coord_z = 5;
  22579. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .mask = 16'hCCCE;
  22580. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .modeMux = 1'b0;
  22581. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .FeedbackMux = 1'b0;
  22582. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .ShiftMux = 1'b0;
  22583. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .BypassEn = 1'b0;
  22584. defparam \macro_inst|u_uart[0]|u_rx[2]|Selector4~5 .CarryEnb = 1'b1;
  22585. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always11~0 (
  22586. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6]),
  22587. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5]),
  22588. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4]),
  22589. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]),
  22590. .Cin(),
  22591. .Qin(),
  22592. .Clk(),
  22593. .AsyncReset(),
  22594. .SyncReset(),
  22595. .ShiftData(),
  22596. .SyncLoad(),
  22597. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always11~0_combout ),
  22598. .Cout(),
  22599. .Q());
  22600. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .coord_x = 7;
  22601. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .coord_y = 1;
  22602. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .coord_z = 4;
  22603. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .mask = 16'h0001;
  22604. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .modeMux = 1'b0;
  22605. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .FeedbackMux = 1'b0;
  22606. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .ShiftMux = 1'b0;
  22607. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .BypassEn = 1'b0;
  22608. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~0 .CarryEnb = 1'b1;
  22609. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always11~1 (
  22610. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1]),
  22611. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [0]),
  22612. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2]),
  22613. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3]),
  22614. .Cin(),
  22615. .Qin(),
  22616. .Clk(),
  22617. .AsyncReset(),
  22618. .SyncReset(),
  22619. .ShiftData(),
  22620. .SyncLoad(),
  22621. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always11~1_combout ),
  22622. .Cout(),
  22623. .Q());
  22624. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .coord_x = 4;
  22625. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .coord_y = 1;
  22626. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .coord_z = 2;
  22627. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .mask = 16'h0001;
  22628. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .modeMux = 1'b0;
  22629. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .FeedbackMux = 1'b0;
  22630. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .ShiftMux = 1'b0;
  22631. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .BypassEn = 1'b0;
  22632. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~1 .CarryEnb = 1'b1;
  22633. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always11~2 (
  22634. .A(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22635. .B(\macro_inst|u_uart[0]|u_rx[2]|always11~1_combout ),
  22636. .C(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  22637. .D(\macro_inst|u_uart[0]|u_rx[2]|always11~0_combout ),
  22638. .Cin(),
  22639. .Qin(),
  22640. .Clk(),
  22641. .AsyncReset(),
  22642. .SyncReset(),
  22643. .ShiftData(),
  22644. .SyncLoad(),
  22645. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always11~2_combout ),
  22646. .Cout(),
  22647. .Q());
  22648. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .coord_x = 10;
  22649. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .coord_y = 3;
  22650. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .coord_z = 3;
  22651. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .mask = 16'h4000;
  22652. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .modeMux = 1'b0;
  22653. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .FeedbackMux = 1'b0;
  22654. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .ShiftMux = 1'b0;
  22655. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .BypassEn = 1'b0;
  22656. defparam \macro_inst|u_uart[0]|u_rx[2]|always11~2 .CarryEnb = 1'b1;
  22657. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always2~0 (
  22658. .A(vcc),
  22659. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3]),
  22660. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0]),
  22661. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  22662. .Cin(),
  22663. .Qin(),
  22664. .Clk(),
  22665. .AsyncReset(),
  22666. .SyncReset(),
  22667. .ShiftData(),
  22668. .SyncLoad(),
  22669. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22670. .Cout(),
  22671. .Q());
  22672. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .coord_x = 6;
  22673. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .coord_y = 1;
  22674. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .coord_z = 9;
  22675. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .mask = 16'hC000;
  22676. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .modeMux = 1'b0;
  22677. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .FeedbackMux = 1'b0;
  22678. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .ShiftMux = 1'b0;
  22679. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .BypassEn = 1'b0;
  22680. defparam \macro_inst|u_uart[0]|u_rx[2]|always2~0 .CarryEnb = 1'b1;
  22681. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always3~1 (
  22682. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2]),
  22683. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3]),
  22684. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]),
  22685. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]),
  22686. .Cin(),
  22687. .Qin(),
  22688. .Clk(),
  22689. .AsyncReset(),
  22690. .SyncReset(),
  22691. .ShiftData(),
  22692. .SyncLoad(),
  22693. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  22694. .Cout(),
  22695. .Q());
  22696. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .coord_x = 5;
  22697. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .coord_y = 1;
  22698. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .coord_z = 12;
  22699. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .mask = 16'h0001;
  22700. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .modeMux = 1'b0;
  22701. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .FeedbackMux = 1'b0;
  22702. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .ShiftMux = 1'b0;
  22703. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .BypassEn = 1'b0;
  22704. defparam \macro_inst|u_uart[0]|u_rx[2]|always3~1 .CarryEnb = 1'b1;
  22705. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always4~2 (
  22706. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  22707. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22708. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22709. .D(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22710. .Cin(),
  22711. .Qin(),
  22712. .Clk(),
  22713. .AsyncReset(),
  22714. .SyncReset(),
  22715. .ShiftData(),
  22716. .SyncLoad(),
  22717. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always4~2_combout ),
  22718. .Cout(),
  22719. .Q());
  22720. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .coord_x = 6;
  22721. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .coord_y = 1;
  22722. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .coord_z = 10;
  22723. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .mask = 16'h0200;
  22724. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .modeMux = 1'b0;
  22725. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .FeedbackMux = 1'b0;
  22726. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .ShiftMux = 1'b0;
  22727. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .BypassEn = 1'b0;
  22728. defparam \macro_inst|u_uart[0]|u_rx[2]|always4~2 .CarryEnb = 1'b1;
  22729. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always6~1 (
  22730. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_in [4]),
  22731. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_in [3]),
  22732. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_in [2]),
  22733. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ),
  22734. .Cin(),
  22735. .Qin(),
  22736. .Clk(),
  22737. .AsyncReset(),
  22738. .SyncReset(),
  22739. .ShiftData(),
  22740. .SyncLoad(),
  22741. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout ),
  22742. .Cout(),
  22743. .Q());
  22744. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .coord_x = 6;
  22745. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .coord_y = 1;
  22746. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .coord_z = 12;
  22747. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .mask = 16'h00D4;
  22748. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .modeMux = 1'b0;
  22749. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .FeedbackMux = 1'b0;
  22750. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .ShiftMux = 1'b0;
  22751. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .BypassEn = 1'b0;
  22752. defparam \macro_inst|u_uart[0]|u_rx[2]|always6~1 .CarryEnb = 1'b1;
  22753. alta_slice \macro_inst|u_uart[0]|u_rx[2]|always8~0 (
  22754. .A(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  22755. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~q ),
  22756. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  22757. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ),
  22758. .Cin(),
  22759. .Qin(),
  22760. .Clk(),
  22761. .AsyncReset(),
  22762. .SyncReset(),
  22763. .ShiftData(),
  22764. .SyncLoad(),
  22765. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always8~0_combout ),
  22766. .Cout(),
  22767. .Q());
  22768. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .coord_x = 7;
  22769. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .coord_y = 1;
  22770. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .coord_z = 15;
  22771. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .mask = 16'h0080;
  22772. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .modeMux = 1'b0;
  22773. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .FeedbackMux = 1'b0;
  22774. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .ShiftMux = 1'b0;
  22775. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .BypassEn = 1'b0;
  22776. defparam \macro_inst|u_uart[0]|u_rx[2]|always8~0 .CarryEnb = 1'b1;
  22777. alta_slice \macro_inst|u_uart[0]|u_rx[2]|break_error (
  22778. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  22779. .B(vcc),
  22780. .C(vcc),
  22781. .D(\macro_inst|u_uart[0]|u_rx[2]|always11~2_combout ),
  22782. .Cin(),
  22783. .Qin(\macro_inst|u_uart[0]|u_rx[2]|break_error~q ),
  22784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  22785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  22786. .SyncReset(),
  22787. .ShiftData(),
  22788. .SyncLoad(),
  22789. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|break_error~0_combout ),
  22790. .Cout(),
  22791. .Q(\macro_inst|u_uart[0]|u_rx[2]|break_error~q ));
  22792. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .coord_x = 10;
  22793. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .coord_y = 3;
  22794. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .coord_z = 0;
  22795. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .mask = 16'hFFA0;
  22796. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .modeMux = 1'b0;
  22797. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .FeedbackMux = 1'b1;
  22798. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .ShiftMux = 1'b0;
  22799. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .BypassEn = 1'b0;
  22800. defparam \macro_inst|u_uart[0]|u_rx[2]|break_error .CarryEnb = 1'b1;
  22801. alta_slice \macro_inst|u_uart[0]|u_rx[2]|framing_error (
  22802. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  22803. .B(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22804. .C(vcc),
  22805. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  22806. .Cin(),
  22807. .Qin(\macro_inst|u_uart[0]|u_rx[2]|framing_error~q ),
  22808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  22809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  22810. .SyncReset(),
  22811. .ShiftData(),
  22812. .SyncLoad(),
  22813. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|framing_error~0_combout ),
  22814. .Cout(),
  22815. .Q(\macro_inst|u_uart[0]|u_rx[2]|framing_error~q ));
  22816. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .coord_x = 10;
  22817. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .coord_y = 3;
  22818. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .coord_z = 13;
  22819. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .mask = 16'hF222;
  22820. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .modeMux = 1'b0;
  22821. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .FeedbackMux = 1'b1;
  22822. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .ShiftMux = 1'b0;
  22823. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .BypassEn = 1'b0;
  22824. defparam \macro_inst|u_uart[0]|u_rx[2]|framing_error .CarryEnb = 1'b1;
  22825. alta_slice \macro_inst|u_uart[0]|u_rx[2]|overrun_error (
  22826. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  22827. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  22828. .C(vcc),
  22829. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  22830. .Cin(),
  22831. .Qin(\macro_inst|u_uart[0]|u_rx[2]|overrun_error~q ),
  22832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  22833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  22834. .SyncReset(),
  22835. .ShiftData(),
  22836. .SyncLoad(),
  22837. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|overrun_error~0_combout ),
  22838. .Cout(),
  22839. .Q(\macro_inst|u_uart[0]|u_rx[2]|overrun_error~q ));
  22840. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .coord_x = 10;
  22841. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .coord_y = 3;
  22842. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .coord_z = 12;
  22843. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .mask = 16'hF888;
  22844. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .modeMux = 1'b0;
  22845. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .FeedbackMux = 1'b1;
  22846. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .ShiftMux = 1'b0;
  22847. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .BypassEn = 1'b0;
  22848. defparam \macro_inst|u_uart[0]|u_rx[2]|overrun_error .CarryEnb = 1'b1;
  22849. alta_slice \macro_inst|u_uart[0]|u_rx[2]|parity_error (
  22850. .A(\macro_inst|u_uart[0]|u_rx[2]|parity_error~0_combout ),
  22851. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_sample~0_combout ),
  22852. .C(vcc),
  22853. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  22854. .Cin(),
  22855. .Qin(\macro_inst|u_uart[0]|u_rx[2]|parity_error~q ),
  22856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  22857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  22858. .SyncReset(),
  22859. .ShiftData(),
  22860. .SyncLoad(),
  22861. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|parity_error~1_combout ),
  22862. .Cout(),
  22863. .Q(\macro_inst|u_uart[0]|u_rx[2]|parity_error~q ));
  22864. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .coord_x = 12;
  22865. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .coord_y = 2;
  22866. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .coord_z = 5;
  22867. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .mask = 16'hF888;
  22868. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .modeMux = 1'b0;
  22869. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .FeedbackMux = 1'b1;
  22870. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .ShiftMux = 1'b0;
  22871. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .BypassEn = 1'b0;
  22872. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error .CarryEnb = 1'b1;
  22873. alta_slice \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 (
  22874. .A(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  22875. .B(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22876. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  22877. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~q ),
  22878. .Cin(),
  22879. .Qin(),
  22880. .Clk(),
  22881. .AsyncReset(),
  22882. .SyncReset(),
  22883. .ShiftData(),
  22884. .SyncLoad(),
  22885. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|parity_error~0_combout ),
  22886. .Cout(),
  22887. .Q());
  22888. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .coord_x = 6;
  22889. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .coord_y = 1;
  22890. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .coord_z = 3;
  22891. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .mask = 16'h4080;
  22892. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .modeMux = 1'b0;
  22893. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .FeedbackMux = 1'b0;
  22894. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .ShiftMux = 1'b0;
  22895. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .BypassEn = 1'b0;
  22896. defparam \macro_inst|u_uart[0]|u_rx[2]|parity_error~0 .CarryEnb = 1'b1;
  22897. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] (
  22898. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0]),
  22899. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  22900. .C(\~GND~combout ),
  22901. .D(vcc),
  22902. .Cin(),
  22903. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0]),
  22904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ),
  22905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ),
  22906. .SyncReset(SyncReset_X49_Y1_GND),
  22907. .ShiftData(),
  22908. .SyncLoad(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ),
  22909. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0]~4_combout ),
  22910. .Cout(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0]~5 ),
  22911. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [0]));
  22912. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .coord_x = 6;
  22913. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .coord_y = 1;
  22914. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .coord_z = 4;
  22915. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .mask = 16'h6688;
  22916. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .modeMux = 1'b0;
  22917. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  22918. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  22919. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .BypassEn = 1'b1;
  22920. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  22921. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] (
  22922. .A(vcc),
  22923. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22924. .C(vcc),
  22925. .D(vcc),
  22926. .Cin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[0]~5 ),
  22927. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ),
  22929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ),
  22930. .SyncReset(SyncReset_X49_Y1_GND),
  22931. .ShiftData(),
  22932. .SyncLoad(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ),
  22933. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1]~6_combout ),
  22934. .Cout(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1]~7 ),
  22935. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]));
  22936. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .coord_x = 6;
  22937. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .coord_y = 1;
  22938. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .coord_z = 5;
  22939. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .mask = 16'h3C3F;
  22940. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .modeMux = 1'b1;
  22941. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  22942. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  22943. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .BypassEn = 1'b1;
  22944. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  22945. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] (
  22946. .A(vcc),
  22947. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22948. .C(\~GND~combout ),
  22949. .D(vcc),
  22950. .Cin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[1]~7 ),
  22951. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ),
  22953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ),
  22954. .SyncReset(SyncReset_X49_Y1_GND),
  22955. .ShiftData(),
  22956. .SyncLoad(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ),
  22957. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2]~8_combout ),
  22958. .Cout(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2]~9 ),
  22959. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]));
  22960. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .coord_x = 6;
  22961. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .coord_y = 1;
  22962. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .coord_z = 6;
  22963. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .mask = 16'hC30C;
  22964. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .modeMux = 1'b1;
  22965. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  22966. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  22967. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .BypassEn = 1'b1;
  22968. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  22969. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] (
  22970. .A(vcc),
  22971. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3]),
  22972. .C(\~GND~combout ),
  22973. .D(vcc),
  22974. .Cin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[2]~9 ),
  22975. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3]),
  22976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X49_Y1_SIG_VCC ),
  22977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X49_Y1_SIG ),
  22978. .SyncReset(SyncReset_X49_Y1_GND),
  22979. .ShiftData(),
  22980. .SyncLoad(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ),
  22981. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3]~10_combout ),
  22982. .Cout(),
  22983. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [3]));
  22984. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .coord_x = 6;
  22985. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .coord_y = 1;
  22986. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .coord_z = 7;
  22987. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .mask = 16'h3C3C;
  22988. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .modeMux = 1'b1;
  22989. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  22990. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  22991. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .BypassEn = 1'b1;
  22992. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  22993. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_bit (
  22994. .A(vcc),
  22995. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  22996. .C(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  22997. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  22998. .Cin(),
  22999. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ),
  23001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23002. .SyncReset(),
  23003. .ShiftData(),
  23004. .SyncLoad(),
  23005. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always2~1_combout ),
  23006. .Cout(),
  23007. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ));
  23008. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .coord_x = 7;
  23009. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .coord_y = 1;
  23010. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .coord_z = 12;
  23011. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .mask = 16'hC000;
  23012. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .modeMux = 1'b0;
  23013. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .FeedbackMux = 1'b0;
  23014. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .ShiftMux = 1'b0;
  23015. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .BypassEn = 1'b0;
  23016. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_bit .CarryEnb = 1'b1;
  23017. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] (
  23018. .A(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  23019. .B(\macro_inst|u_uart[0]|u_rx[2]|always3~2_combout ),
  23020. .C(vcc),
  23021. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23022. .Cin(),
  23023. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]),
  23024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout_X43_Y1_SIG_SIG ),
  23025. .AsyncReset(AsyncReset_X43_Y1_GND),
  23026. .SyncReset(),
  23027. .ShiftData(),
  23028. .SyncLoad(),
  23029. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~4_combout ),
  23030. .Cout(),
  23031. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]));
  23032. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .coord_x = 5;
  23033. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .coord_y = 1;
  23034. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .coord_z = 15;
  23035. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .mask = 16'hFF07;
  23036. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .modeMux = 1'b0;
  23037. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  23038. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .ShiftMux = 1'b0;
  23039. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .BypassEn = 1'b0;
  23040. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[0] .CarryEnb = 1'b1;
  23041. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] (
  23042. .A(\macro_inst|u_uart[0]|u_rx[2]|Add4~2_combout ),
  23043. .B(\macro_inst|u_uart[0]|u_rx[2]|always3~2_combout ),
  23044. .C(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  23045. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23046. .Cin(),
  23047. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]),
  23048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout_X43_Y1_SIG_SIG ),
  23049. .AsyncReset(AsyncReset_X43_Y1_GND),
  23050. .SyncReset(),
  23051. .ShiftData(),
  23052. .SyncLoad(),
  23053. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~5_combout ),
  23054. .Cout(),
  23055. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]));
  23056. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .coord_x = 5;
  23057. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .coord_y = 1;
  23058. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .coord_z = 0;
  23059. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .mask = 16'hFFD1;
  23060. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .modeMux = 1'b0;
  23061. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  23062. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .ShiftMux = 1'b0;
  23063. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .BypassEn = 1'b0;
  23064. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[1] .CarryEnb = 1'b1;
  23065. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] (
  23066. .A(\macro_inst|u_uart[0]|u_rx[2]|Add4~1_combout ),
  23067. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23068. .C(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  23069. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  23070. .Cin(),
  23071. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2]),
  23072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout_X43_Y1_SIG_SIG ),
  23073. .AsyncReset(AsyncReset_X43_Y1_GND),
  23074. .SyncReset(),
  23075. .ShiftData(),
  23076. .SyncLoad(),
  23077. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~2_combout ),
  23078. .Cout(),
  23079. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2]));
  23080. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .coord_x = 5;
  23081. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .coord_y = 1;
  23082. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .coord_z = 14;
  23083. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .mask = 16'hCDDD;
  23084. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .modeMux = 1'b0;
  23085. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  23086. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .ShiftMux = 1'b0;
  23087. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .BypassEn = 1'b0;
  23088. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2] .CarryEnb = 1'b1;
  23089. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 (
  23090. .A(vcc),
  23091. .B(vcc),
  23092. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23093. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23094. .Cin(),
  23095. .Qin(),
  23096. .Clk(),
  23097. .AsyncReset(),
  23098. .SyncReset(),
  23099. .ShiftData(),
  23100. .SyncLoad(),
  23101. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3_combout ),
  23102. .Cout(),
  23103. .Q());
  23104. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .coord_x = 4;
  23105. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .coord_y = 1;
  23106. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .coord_z = 6;
  23107. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .mask = 16'hFFF0;
  23108. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .modeMux = 1'b0;
  23109. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .FeedbackMux = 1'b0;
  23110. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .ShiftMux = 1'b0;
  23111. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .BypassEn = 1'b0;
  23112. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[2]~3 .CarryEnb = 1'b1;
  23113. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] (
  23114. .A(\macro_inst|u_uart[0]|u_rx[2]|always3~1_combout ),
  23115. .B(vcc),
  23116. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1_combout ),
  23117. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  23118. .Cin(),
  23119. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3]),
  23120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ),
  23121. .AsyncReset(AsyncReset_X43_Y1_GND),
  23122. .SyncReset(SyncReset_X43_Y1_GND),
  23123. .ShiftData(),
  23124. .SyncLoad(SyncLoad_X43_Y1_VCC),
  23125. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|always3~2_combout ),
  23126. .Cout(),
  23127. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3]));
  23128. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .coord_x = 5;
  23129. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .coord_y = 1;
  23130. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .coord_z = 11;
  23131. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .mask = 16'hAA00;
  23132. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .modeMux = 1'b0;
  23133. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .FeedbackMux = 1'b0;
  23134. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .ShiftMux = 1'b0;
  23135. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .BypassEn = 1'b1;
  23136. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt[3] .CarryEnb = 1'b1;
  23137. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 (
  23138. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23139. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23140. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [3]),
  23141. .D(\macro_inst|u_uart[0]|u_rx[2]|Add4~0_combout ),
  23142. .Cin(),
  23143. .Qin(),
  23144. .Clk(),
  23145. .AsyncReset(),
  23146. .SyncReset(),
  23147. .ShiftData(),
  23148. .SyncLoad(),
  23149. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1_combout ),
  23150. .Cout(),
  23151. .Q());
  23152. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .coord_x = 4;
  23153. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .coord_y = 1;
  23154. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .coord_z = 7;
  23155. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .mask = 16'h1032;
  23156. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .modeMux = 1'b0;
  23157. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .FeedbackMux = 1'b0;
  23158. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .ShiftMux = 1'b0;
  23159. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .BypassEn = 1'b0;
  23160. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt~1 .CarryEnb = 1'b1;
  23161. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] (
  23162. .A(vcc),
  23163. .B(\macro_inst|u_uart[0]|u_regs|rx_read [2]),
  23164. .C(vcc),
  23165. .D(\macro_inst|u_uart[0]|u_rx[2]|Selector2~1_combout ),
  23166. .Cin(),
  23167. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  23168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  23169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  23170. .SyncReset(),
  23171. .ShiftData(),
  23172. .SyncLoad(),
  23173. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter~0_combout ),
  23174. .Cout(),
  23175. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]));
  23176. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .coord_x = 9;
  23177. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .coord_y = 2;
  23178. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .coord_z = 3;
  23179. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .mask = 16'h3F30;
  23180. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .modeMux = 1'b0;
  23181. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  23182. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  23183. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .BypassEn = 1'b0;
  23184. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  23185. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] (
  23186. .A(vcc),
  23187. .B(vcc),
  23188. .C(vcc),
  23189. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [0]),
  23190. .Cin(),
  23191. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~q ),
  23192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23193. .AsyncReset(AsyncReset_X44_Y1_GND),
  23194. .SyncReset(),
  23195. .ShiftData(),
  23196. .SyncLoad(),
  23197. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~feeder_combout ),
  23198. .Cout(),
  23199. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~q ));
  23200. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .coord_x = 4;
  23201. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .coord_y = 1;
  23202. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .coord_z = 15;
  23203. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .mask = 16'hFF00;
  23204. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  23205. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  23206. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  23207. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .BypassEn = 1'b0;
  23208. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  23209. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] (
  23210. .A(vcc),
  23211. .B(vcc),
  23212. .C(vcc),
  23213. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1]),
  23214. .Cin(),
  23215. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~q ),
  23216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23217. .AsyncReset(AsyncReset_X44_Y1_GND),
  23218. .SyncReset(),
  23219. .ShiftData(),
  23220. .SyncLoad(),
  23221. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~feeder_combout ),
  23222. .Cout(),
  23223. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~q ));
  23224. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .coord_x = 4;
  23225. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .coord_y = 1;
  23226. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .coord_z = 11;
  23227. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .mask = 16'hFF00;
  23228. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  23229. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  23230. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  23231. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .BypassEn = 1'b0;
  23232. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  23233. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] (
  23234. .A(vcc),
  23235. .B(vcc),
  23236. .C(vcc),
  23237. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2]),
  23238. .Cin(),
  23239. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~q ),
  23240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23241. .AsyncReset(AsyncReset_X44_Y1_GND),
  23242. .SyncReset(),
  23243. .ShiftData(),
  23244. .SyncLoad(),
  23245. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~feeder_combout ),
  23246. .Cout(),
  23247. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~q ));
  23248. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .coord_x = 4;
  23249. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .coord_y = 1;
  23250. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .coord_z = 5;
  23251. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .mask = 16'hFF00;
  23252. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  23253. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  23254. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  23255. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .BypassEn = 1'b0;
  23256. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  23257. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] (
  23258. .A(vcc),
  23259. .B(vcc),
  23260. .C(vcc),
  23261. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3]),
  23262. .Cin(),
  23263. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~q ),
  23264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23265. .AsyncReset(AsyncReset_X44_Y1_GND),
  23266. .SyncReset(),
  23267. .ShiftData(),
  23268. .SyncLoad(),
  23269. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~feeder_combout ),
  23270. .Cout(),
  23271. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~q ));
  23272. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .coord_x = 4;
  23273. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .coord_y = 1;
  23274. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .coord_z = 8;
  23275. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .mask = 16'hFF00;
  23276. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  23277. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  23278. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  23279. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .BypassEn = 1'b0;
  23280. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  23281. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] (
  23282. .A(vcc),
  23283. .B(vcc),
  23284. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4]),
  23285. .D(vcc),
  23286. .Cin(),
  23287. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~q ),
  23288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23289. .AsyncReset(AsyncReset_X44_Y1_GND),
  23290. .SyncReset(),
  23291. .ShiftData(),
  23292. .SyncLoad(),
  23293. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~feeder_combout ),
  23294. .Cout(),
  23295. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~q ));
  23296. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .coord_x = 4;
  23297. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .coord_y = 1;
  23298. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .coord_z = 0;
  23299. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .mask = 16'hF0F0;
  23300. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  23301. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  23302. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  23303. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .BypassEn = 1'b0;
  23304. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  23305. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] (
  23306. .A(vcc),
  23307. .B(vcc),
  23308. .C(vcc),
  23309. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5]),
  23310. .Cin(),
  23311. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~q ),
  23312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X49_Y1_SIG_SIG ),
  23313. .AsyncReset(AsyncReset_X49_Y1_GND),
  23314. .SyncReset(),
  23315. .ShiftData(),
  23316. .SyncLoad(),
  23317. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~feeder_combout ),
  23318. .Cout(),
  23319. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~q ));
  23320. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .coord_x = 6;
  23321. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .coord_y = 1;
  23322. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .coord_z = 0;
  23323. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .mask = 16'hFF00;
  23324. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  23325. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  23326. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  23327. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .BypassEn = 1'b0;
  23328. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  23329. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] (
  23330. .A(vcc),
  23331. .B(vcc),
  23332. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6]),
  23333. .D(vcc),
  23334. .Cin(),
  23335. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~q ),
  23336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X49_Y1_SIG_SIG ),
  23337. .AsyncReset(AsyncReset_X49_Y1_GND),
  23338. .SyncReset(),
  23339. .ShiftData(),
  23340. .SyncLoad(),
  23341. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~feeder_combout ),
  23342. .Cout(),
  23343. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~q ));
  23344. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .coord_x = 6;
  23345. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .coord_y = 1;
  23346. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .coord_z = 2;
  23347. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .mask = 16'hF0F0;
  23348. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  23349. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  23350. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  23351. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .BypassEn = 1'b0;
  23352. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  23353. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] (
  23354. .A(vcc),
  23355. .B(vcc),
  23356. .C(vcc),
  23357. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]),
  23358. .Cin(),
  23359. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~q ),
  23360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout_X44_Y1_SIG_SIG ),
  23361. .AsyncReset(AsyncReset_X44_Y1_GND),
  23362. .SyncReset(),
  23363. .ShiftData(),
  23364. .SyncLoad(),
  23365. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~feeder_combout ),
  23366. .Cout(),
  23367. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~q ));
  23368. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .coord_x = 4;
  23369. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .coord_y = 1;
  23370. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .coord_z = 1;
  23371. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .mask = 16'hFF00;
  23372. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  23373. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  23374. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  23375. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .BypassEn = 1'b0;
  23376. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  23377. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 (
  23378. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ),
  23379. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_sample~0_combout ),
  23380. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  23381. .D(\macro_inst|u_uart[0]|u_rx[2]|always2~0_combout ),
  23382. .Cin(),
  23383. .Qin(),
  23384. .Clk(),
  23385. .AsyncReset(),
  23386. .SyncReset(),
  23387. .ShiftData(),
  23388. .SyncLoad(),
  23389. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0_combout ),
  23390. .Cout(),
  23391. .Q());
  23392. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .coord_x = 6;
  23393. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .coord_y = 1;
  23394. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .coord_z = 11;
  23395. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .mask = 16'h0800;
  23396. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  23397. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  23398. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  23399. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  23400. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  23401. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_idle (
  23402. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  23403. .B(\macro_inst|u_uart[0]|u_rx[2]|always8~0_combout ),
  23404. .C(vcc),
  23405. .D(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  23406. .Cin(),
  23407. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_idle~q ),
  23408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ),
  23409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23410. .SyncReset(),
  23411. .ShiftData(),
  23412. .SyncLoad(),
  23413. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_idle~0_combout ),
  23414. .Cout(),
  23415. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_idle~q ));
  23416. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .coord_x = 7;
  23417. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .coord_y = 1;
  23418. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .coord_z = 6;
  23419. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .mask = 16'hDCFC;
  23420. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .modeMux = 1'b0;
  23421. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .FeedbackMux = 1'b1;
  23422. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .ShiftMux = 1'b0;
  23423. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .BypassEn = 1'b0;
  23424. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle .CarryEnb = 1'b1;
  23425. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en (
  23426. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|counter [0]),
  23427. .B(\macro_inst|u_uart[0]|u_regs|clear_flags~10_combout ),
  23428. .C(vcc),
  23429. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  23430. .Cin(),
  23431. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~q ),
  23432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ),
  23433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23434. .SyncReset(),
  23435. .ShiftData(),
  23436. .SyncLoad(),
  23437. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~0_combout ),
  23438. .Cout(),
  23439. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_idle_en~q ));
  23440. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .coord_x = 7;
  23441. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .coord_y = 1;
  23442. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .coord_z = 3;
  23443. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .mask = 16'hBAFA;
  23444. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .modeMux = 1'b0;
  23445. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .FeedbackMux = 1'b1;
  23446. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .ShiftMux = 1'b0;
  23447. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .BypassEn = 1'b0;
  23448. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_idle_en .CarryEnb = 1'b1;
  23449. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] (
  23450. .A(vcc),
  23451. .B(vcc),
  23452. .C(\SIM_IO[2]~input_o ),
  23453. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  23454. .Cin(),
  23455. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_in [0]),
  23456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  23457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  23458. .SyncReset(),
  23459. .ShiftData(),
  23460. .SyncLoad(),
  23461. .LutOut(\macro_inst|uart_rxd [2]),
  23462. .Cout(),
  23463. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_in [0]));
  23464. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .coord_x = 10;
  23465. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .coord_y = 3;
  23466. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .coord_z = 10;
  23467. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .mask = 16'h000F;
  23468. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .modeMux = 1'b0;
  23469. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .FeedbackMux = 1'b0;
  23470. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .ShiftMux = 1'b0;
  23471. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .BypassEn = 1'b0;
  23472. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[0] .CarryEnb = 1'b1;
  23473. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] (
  23474. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_in [2]),
  23475. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_in [4]),
  23476. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_in [0]),
  23477. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_in [3]),
  23478. .Cin(),
  23479. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_in [1]),
  23480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  23481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  23482. .SyncReset(SyncReset_X56_Y1_GND),
  23483. .ShiftData(),
  23484. .SyncLoad(SyncLoad_X56_Y1_VCC),
  23485. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  23486. .Cout(),
  23487. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_in [1]));
  23488. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .coord_x = 10;
  23489. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .coord_y = 3;
  23490. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .coord_z = 15;
  23491. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .mask = 16'h44DD;
  23492. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .modeMux = 1'b0;
  23493. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .FeedbackMux = 1'b0;
  23494. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .ShiftMux = 1'b0;
  23495. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .BypassEn = 1'b1;
  23496. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[1] .CarryEnb = 1'b1;
  23497. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] (
  23498. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  23499. .B(vcc),
  23500. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_in [1]),
  23501. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  23502. .Cin(),
  23503. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_in [2]),
  23504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  23505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  23506. .SyncReset(SyncReset_X56_Y1_GND),
  23507. .ShiftData(),
  23508. .SyncLoad(SyncLoad_X56_Y1_VCC),
  23509. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout ),
  23510. .Cout(),
  23511. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_in [2]));
  23512. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .coord_x = 10;
  23513. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .coord_y = 3;
  23514. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .coord_z = 14;
  23515. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .mask = 16'h0055;
  23516. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .modeMux = 1'b0;
  23517. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .FeedbackMux = 1'b0;
  23518. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .ShiftMux = 1'b0;
  23519. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .BypassEn = 1'b1;
  23520. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[2] .CarryEnb = 1'b1;
  23521. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] (
  23522. .A(vcc),
  23523. .B(vcc),
  23524. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_in [2]),
  23525. .D(\rv32.resetn_out ),
  23526. .Cin(),
  23527. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_in [3]),
  23528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  23529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  23530. .SyncReset(SyncReset_X56_Y1_GND),
  23531. .ShiftData(),
  23532. .SyncLoad(SyncLoad_X56_Y1_VCC),
  23533. .LutOut(\sys_resetn~combout ),
  23534. .Cout(),
  23535. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_in [3]));
  23536. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .coord_x = 10;
  23537. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .coord_y = 3;
  23538. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .coord_z = 9;
  23539. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .mask = 16'h00FF;
  23540. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .modeMux = 1'b0;
  23541. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .FeedbackMux = 1'b0;
  23542. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .ShiftMux = 1'b0;
  23543. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .BypassEn = 1'b1;
  23544. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[3] .CarryEnb = 1'b1;
  23545. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] (
  23546. .A(vcc),
  23547. .B(vcc),
  23548. .C(vcc),
  23549. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_in [3]),
  23550. .Cin(),
  23551. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_in [4]),
  23552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  23553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  23554. .SyncReset(),
  23555. .ShiftData(),
  23556. .SyncLoad(),
  23557. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_in[4]~0_combout ),
  23558. .Cout(),
  23559. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_in [4]));
  23560. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .coord_x = 10;
  23561. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .coord_y = 3;
  23562. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .coord_z = 11;
  23563. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .mask = 16'h00FF;
  23564. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .modeMux = 1'b0;
  23565. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .FeedbackMux = 1'b0;
  23566. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .ShiftMux = 1'b0;
  23567. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .BypassEn = 1'b0;
  23568. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_in[4] .CarryEnb = 1'b1;
  23569. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_parity (
  23570. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~0_combout ),
  23571. .B(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  23572. .C(vcc),
  23573. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23574. .Cin(),
  23575. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~q ),
  23576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  23577. .AsyncReset(AsyncReset_X45_Y1_GND),
  23578. .SyncReset(),
  23579. .ShiftData(),
  23580. .SyncLoad(),
  23581. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~1_combout ),
  23582. .Cout(),
  23583. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~q ));
  23584. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .coord_x = 4;
  23585. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .coord_y = 3;
  23586. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .coord_z = 0;
  23587. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .mask = 16'h335A;
  23588. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .modeMux = 1'b0;
  23589. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .FeedbackMux = 1'b1;
  23590. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .ShiftMux = 1'b0;
  23591. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .BypassEn = 1'b0;
  23592. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity .CarryEnb = 1'b1;
  23593. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 (
  23594. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  23595. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]),
  23596. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23597. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  23598. .Cin(),
  23599. .Qin(),
  23600. .Clk(),
  23601. .AsyncReset(),
  23602. .SyncReset(),
  23603. .ShiftData(),
  23604. .SyncLoad(),
  23605. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_parity~0_combout ),
  23606. .Cout(),
  23607. .Q());
  23608. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .coord_x = 4;
  23609. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .coord_y = 1;
  23610. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .coord_z = 12;
  23611. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .mask = 16'h4000;
  23612. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .modeMux = 1'b0;
  23613. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .FeedbackMux = 1'b0;
  23614. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .ShiftMux = 1'b0;
  23615. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .BypassEn = 1'b0;
  23616. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_parity~0 .CarryEnb = 1'b1;
  23617. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 (
  23618. .A(vcc),
  23619. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [2]),
  23620. .C(vcc),
  23621. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_baud_cnt [1]),
  23622. .Cin(),
  23623. .Qin(),
  23624. .Clk(),
  23625. .AsyncReset(),
  23626. .SyncReset(),
  23627. .ShiftData(),
  23628. .SyncLoad(),
  23629. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_sample~0_combout ),
  23630. .Cout(),
  23631. .Q());
  23632. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .coord_x = 7;
  23633. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .coord_y = 1;
  23634. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .coord_z = 9;
  23635. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .mask = 16'h0033;
  23636. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .modeMux = 1'b0;
  23637. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .FeedbackMux = 1'b0;
  23638. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .ShiftMux = 1'b0;
  23639. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .BypassEn = 1'b0;
  23640. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_sample~0 .CarryEnb = 1'b1;
  23641. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] (
  23642. .A(vcc),
  23643. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]),
  23644. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1]),
  23645. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]),
  23646. .Cin(),
  23647. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [0]),
  23648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ),
  23649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ),
  23650. .SyncReset(SyncReset_X44_Y1_GND),
  23651. .ShiftData(),
  23652. .SyncLoad(SyncLoad_X44_Y1_VCC),
  23653. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Add4~2_combout ),
  23654. .Cout(),
  23655. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [0]));
  23656. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .coord_x = 4;
  23657. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .coord_y = 1;
  23658. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .coord_z = 3;
  23659. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .mask = 16'h33CC;
  23660. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .modeMux = 1'b0;
  23661. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  23662. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .ShiftMux = 1'b0;
  23663. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .BypassEn = 1'b1;
  23664. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[0] .CarryEnb = 1'b1;
  23665. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] (
  23666. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [1]),
  23667. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [0]),
  23668. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2]),
  23669. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_data_cnt [2]),
  23670. .Cin(),
  23671. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1]),
  23672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ),
  23673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ),
  23674. .SyncReset(SyncReset_X44_Y1_GND),
  23675. .ShiftData(),
  23676. .SyncLoad(SyncLoad_X44_Y1_VCC),
  23677. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Add4~1_combout ),
  23678. .Cout(),
  23679. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [1]));
  23680. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .coord_x = 4;
  23681. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .coord_y = 1;
  23682. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .coord_z = 10;
  23683. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .mask = 16'h11EE;
  23684. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .modeMux = 1'b0;
  23685. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  23686. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .ShiftMux = 1'b0;
  23687. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .BypassEn = 1'b1;
  23688. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[1] .CarryEnb = 1'b1;
  23689. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] (
  23690. .A(vcc),
  23691. .B(vcc),
  23692. .C(vcc),
  23693. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3]),
  23694. .Cin(),
  23695. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2]),
  23696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ),
  23697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ),
  23698. .SyncReset(),
  23699. .ShiftData(),
  23700. .SyncLoad(),
  23701. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2]~feeder_combout ),
  23702. .Cout(),
  23703. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [2]));
  23704. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .coord_x = 4;
  23705. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .coord_y = 1;
  23706. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .coord_z = 4;
  23707. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .mask = 16'hFF00;
  23708. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .modeMux = 1'b0;
  23709. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  23710. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .ShiftMux = 1'b0;
  23711. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .BypassEn = 1'b0;
  23712. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[2] .CarryEnb = 1'b1;
  23713. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] (
  23714. .A(vcc),
  23715. .B(vcc),
  23716. .C(vcc),
  23717. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4]),
  23718. .Cin(),
  23719. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3]),
  23720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X44_Y1_SIG_SIG ),
  23721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y1_SIG ),
  23722. .SyncReset(),
  23723. .ShiftData(),
  23724. .SyncLoad(),
  23725. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3]~feeder_combout ),
  23726. .Cout(),
  23727. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [3]));
  23728. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .coord_x = 4;
  23729. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .coord_y = 1;
  23730. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .coord_z = 13;
  23731. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .mask = 16'hFF00;
  23732. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .modeMux = 1'b0;
  23733. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  23734. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .ShiftMux = 1'b0;
  23735. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .BypassEn = 1'b0;
  23736. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[3] .CarryEnb = 1'b1;
  23737. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] (
  23738. .A(vcc),
  23739. .B(vcc),
  23740. .C(vcc),
  23741. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5]),
  23742. .Cin(),
  23743. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4]),
  23744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ),
  23745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23746. .SyncReset(),
  23747. .ShiftData(),
  23748. .SyncLoad(),
  23749. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4]~feeder_combout ),
  23750. .Cout(),
  23751. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [4]));
  23752. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .coord_x = 7;
  23753. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .coord_y = 1;
  23754. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .coord_z = 14;
  23755. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .mask = 16'hFF00;
  23756. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .modeMux = 1'b0;
  23757. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  23758. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .ShiftMux = 1'b0;
  23759. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .BypassEn = 1'b0;
  23760. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[4] .CarryEnb = 1'b1;
  23761. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] (
  23762. .A(),
  23763. .B(),
  23764. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6]),
  23765. .D(),
  23766. .Cin(),
  23767. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5]),
  23768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ),
  23769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23770. .SyncReset(SyncReset_X50_Y1_GND),
  23771. .ShiftData(),
  23772. .SyncLoad(SyncLoad_X50_Y1_VCC),
  23773. .LutOut(),
  23774. .Cout(),
  23775. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [5]));
  23776. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .coord_x = 7;
  23777. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .coord_y = 1;
  23778. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .coord_z = 7;
  23779. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .mask = 16'hFFFF;
  23780. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .modeMux = 1'b1;
  23781. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  23782. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .ShiftMux = 1'b0;
  23783. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .BypassEn = 1'b1;
  23784. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[5] .CarryEnb = 1'b1;
  23785. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] (
  23786. .A(),
  23787. .B(),
  23788. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]),
  23789. .D(),
  23790. .Cin(),
  23791. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6]),
  23792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ),
  23793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23794. .SyncReset(SyncReset_X50_Y1_GND),
  23795. .ShiftData(),
  23796. .SyncLoad(SyncLoad_X50_Y1_VCC),
  23797. .LutOut(),
  23798. .Cout(),
  23799. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [6]));
  23800. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .coord_x = 7;
  23801. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .coord_y = 1;
  23802. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .coord_z = 10;
  23803. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .mask = 16'hFFFF;
  23804. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .modeMux = 1'b1;
  23805. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  23806. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .ShiftMux = 1'b0;
  23807. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .BypassEn = 1'b1;
  23808. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[6] .CarryEnb = 1'b1;
  23809. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] (
  23810. .A(vcc),
  23811. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  23812. .C(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  23813. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  23814. .Cin(),
  23815. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]),
  23816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[2]|always4~2_combout_X50_Y1_SIG_SIG ),
  23817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23818. .SyncReset(SyncReset_X50_Y1_GND),
  23819. .ShiftData(),
  23820. .SyncLoad(SyncLoad_X50_Y1_VCC),
  23821. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout ),
  23822. .Cout(),
  23823. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg [7]));
  23824. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .coord_x = 7;
  23825. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .coord_y = 1;
  23826. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .coord_z = 11;
  23827. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .mask = 16'h0033;
  23828. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .modeMux = 1'b0;
  23829. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  23830. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .ShiftMux = 1'b0;
  23831. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .BypassEn = 1'b1;
  23832. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_shift_reg[7] .CarryEnb = 1'b1;
  23833. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA (
  23834. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~5_combout ),
  23835. .B(\macro_inst|u_uart[0]|u_rx[2]|Selector2~2_combout ),
  23836. .C(\macro_inst|u_uart[0]|u_rx[2]|Selector2~3_combout ),
  23837. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23838. .Cin(),
  23839. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ),
  23840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ),
  23841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ),
  23842. .SyncReset(),
  23843. .ShiftData(),
  23844. .SyncLoad(),
  23845. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector2~6_combout ),
  23846. .Cout(),
  23847. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA~q ));
  23848. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .coord_x = 5;
  23849. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .coord_y = 1;
  23850. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .coord_z = 3;
  23851. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .mask = 16'h3222;
  23852. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .modeMux = 1'b0;
  23853. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  23854. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .ShiftMux = 1'b0;
  23855. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .BypassEn = 1'b0;
  23856. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_DATA .CarryEnb = 1'b1;
  23857. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE (
  23858. .A(vcc),
  23859. .B(\macro_inst|u_uart[0]|u_rx[2]|Selector2~2_combout ),
  23860. .C(vcc),
  23861. .D(\macro_inst|u_uart[0]|u_rx[2]|Add1~0_combout ),
  23862. .Cin(),
  23863. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ),
  23864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y1_SIG_VCC ),
  23865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y1_SIG ),
  23866. .SyncReset(),
  23867. .ShiftData(),
  23868. .SyncLoad(),
  23869. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector0~0_combout ),
  23870. .Cout(),
  23871. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE~q ));
  23872. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .coord_x = 7;
  23873. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .coord_y = 1;
  23874. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .coord_z = 5;
  23875. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .mask = 16'h3033;
  23876. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .modeMux = 1'b0;
  23877. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  23878. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  23879. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .BypassEn = 1'b0;
  23880. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  23881. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY (
  23882. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0_combout ),
  23883. .B(\macro_inst|u_uart[0]|u_rx[2]|Selector4~0_combout ),
  23884. .C(vcc),
  23885. .D(\macro_inst|u_uart[0]|u_rx[2]|Selector4~5_combout ),
  23886. .Cin(),
  23887. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  23888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ),
  23889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ),
  23890. .SyncReset(),
  23891. .ShiftData(),
  23892. .SyncLoad(),
  23893. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~1_combout ),
  23894. .Cout(),
  23895. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ));
  23896. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .coord_x = 5;
  23897. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .coord_y = 1;
  23898. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .coord_z = 8;
  23899. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .mask = 16'h88F8;
  23900. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .modeMux = 1'b0;
  23901. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  23902. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  23903. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .BypassEn = 1'b0;
  23904. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  23905. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 (
  23906. .A(vcc),
  23907. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23908. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  23909. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  23910. .Cin(),
  23911. .Qin(),
  23912. .Clk(),
  23913. .AsyncReset(),
  23914. .SyncReset(),
  23915. .ShiftData(),
  23916. .SyncLoad(),
  23917. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0_combout ),
  23918. .Cout(),
  23919. .Q());
  23920. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .coord_x = 5;
  23921. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .coord_y = 1;
  23922. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .coord_z = 10;
  23923. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .mask = 16'h3F00;
  23924. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  23925. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  23926. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  23927. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  23928. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  23929. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START (
  23930. .A(\macro_inst|u_uart[0]|u_rx[2]|Selector2~4_combout ),
  23931. .B(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout ),
  23932. .C(vcc),
  23933. .D(\macro_inst|u_uart[0]|u_rx[2]|Selector2~2_combout ),
  23934. .Cin(),
  23935. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ),
  23936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ),
  23937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ),
  23938. .SyncReset(),
  23939. .ShiftData(),
  23940. .SyncLoad(),
  23941. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|Selector1~0_combout ),
  23942. .Cout(),
  23943. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START~q ));
  23944. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .coord_x = 5;
  23945. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .coord_y = 1;
  23946. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .coord_z = 1;
  23947. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .mask = 16'h00DC;
  23948. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .modeMux = 1'b0;
  23949. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .FeedbackMux = 1'b1;
  23950. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .ShiftMux = 1'b0;
  23951. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .BypassEn = 1'b0;
  23952. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_START .CarryEnb = 1'b1;
  23953. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP (
  23954. .A(vcc),
  23955. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0_combout ),
  23956. .C(vcc),
  23957. .D(\macro_inst|u_uart[0]|u_rx[2]|Selector4~5_combout ),
  23958. .Cin(),
  23959. .Qin(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ),
  23960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y1_SIG_VCC ),
  23961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y1_SIG ),
  23962. .SyncReset(),
  23963. .ShiftData(),
  23964. .SyncLoad(),
  23965. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~1_combout ),
  23966. .Cout(),
  23967. .Q(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~q ));
  23968. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .coord_x = 5;
  23969. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .coord_y = 1;
  23970. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .coord_z = 13;
  23971. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .mask = 16'hCCF0;
  23972. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .modeMux = 1'b0;
  23973. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  23974. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .ShiftMux = 1'b0;
  23975. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .BypassEn = 1'b0;
  23976. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP .CarryEnb = 1'b1;
  23977. alta_slice \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 (
  23978. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  23979. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_bit~q ),
  23980. .C(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_PARITY~q ),
  23981. .D(\macro_inst|u_uart[0]|u_rx[2]|Selector4~0_combout ),
  23982. .Cin(),
  23983. .Qin(),
  23984. .Clk(),
  23985. .AsyncReset(),
  23986. .SyncReset(),
  23987. .ShiftData(),
  23988. .SyncLoad(),
  23989. .LutOut(\macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0_combout ),
  23990. .Cout(),
  23991. .Q());
  23992. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .coord_x = 5;
  23993. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .coord_y = 1;
  23994. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .coord_z = 9;
  23995. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .mask = 16'hD5C0;
  23996. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  23997. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  23998. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  23999. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  24000. defparam \macro_inst|u_uart[0]|u_rx[2]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  24001. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Add4~0 (
  24002. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]),
  24003. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [3]),
  24004. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]),
  24005. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2]),
  24006. .Cin(),
  24007. .Qin(),
  24008. .Clk(),
  24009. .AsyncReset(),
  24010. .SyncReset(),
  24011. .ShiftData(),
  24012. .SyncLoad(),
  24013. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Add4~0_combout ),
  24014. .Cout(),
  24015. .Q());
  24016. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .coord_x = 2;
  24017. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .coord_y = 4;
  24018. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .coord_z = 0;
  24019. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .mask = 16'h3336;
  24020. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .modeMux = 1'b0;
  24021. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .FeedbackMux = 1'b0;
  24022. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .ShiftMux = 1'b0;
  24023. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .BypassEn = 1'b0;
  24024. defparam \macro_inst|u_uart[0]|u_rx[3]|Add4~0 .CarryEnb = 1'b1;
  24025. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 (
  24026. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24027. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ),
  24028. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24029. .D(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24030. .Cin(),
  24031. .Qin(),
  24032. .Clk(),
  24033. .AsyncReset(),
  24034. .SyncReset(),
  24035. .ShiftData(),
  24036. .SyncLoad(),
  24037. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  24038. .Cout(),
  24039. .Q());
  24040. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .coord_x = 3;
  24041. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .coord_y = 4;
  24042. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .coord_z = 5;
  24043. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .mask = 16'h0400;
  24044. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .modeMux = 1'b0;
  24045. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .FeedbackMux = 1'b0;
  24046. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .ShiftMux = 1'b0;
  24047. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .BypassEn = 1'b0;
  24048. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~1 .CarryEnb = 1'b1;
  24049. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 (
  24050. .A(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  24051. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ),
  24052. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_sample~0_combout ),
  24053. .D(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24054. .Cin(),
  24055. .Qin(),
  24056. .Clk(),
  24057. .AsyncReset(),
  24058. .SyncReset(),
  24059. .ShiftData(),
  24060. .SyncLoad(),
  24061. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~2_combout ),
  24062. .Cout(),
  24063. .Q());
  24064. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .coord_x = 1;
  24065. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .coord_y = 4;
  24066. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .coord_z = 8;
  24067. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .mask = 16'h8000;
  24068. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .modeMux = 1'b0;
  24069. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .FeedbackMux = 1'b0;
  24070. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .ShiftMux = 1'b0;
  24071. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .BypassEn = 1'b0;
  24072. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~2 .CarryEnb = 1'b1;
  24073. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 (
  24074. .A(vcc),
  24075. .B(vcc),
  24076. .C(\macro_inst|u_uart[0]|u_rx[3]|Selector4~1_combout ),
  24077. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24078. .Cin(),
  24079. .Qin(),
  24080. .Clk(),
  24081. .AsyncReset(),
  24082. .SyncReset(),
  24083. .ShiftData(),
  24084. .SyncLoad(),
  24085. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~3_combout ),
  24086. .Cout(),
  24087. .Q());
  24088. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .coord_x = 2;
  24089. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .coord_y = 4;
  24090. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .coord_z = 4;
  24091. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .mask = 16'hF000;
  24092. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .modeMux = 1'b0;
  24093. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .FeedbackMux = 1'b0;
  24094. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .ShiftMux = 1'b0;
  24095. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .BypassEn = 1'b0;
  24096. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~3 .CarryEnb = 1'b1;
  24097. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 (
  24098. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector2~3_combout ),
  24099. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24100. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  24101. .D(\macro_inst|u_uart[0]|u_rx[3]|always3~2_combout ),
  24102. .Cin(),
  24103. .Qin(),
  24104. .Clk(),
  24105. .AsyncReset(),
  24106. .SyncReset(),
  24107. .ShiftData(),
  24108. .SyncLoad(),
  24109. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~4_combout ),
  24110. .Cout(),
  24111. .Q());
  24112. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .coord_x = 2;
  24113. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .coord_y = 4;
  24114. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .coord_z = 3;
  24115. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .mask = 16'hCCC8;
  24116. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .modeMux = 1'b0;
  24117. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .FeedbackMux = 1'b0;
  24118. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .ShiftMux = 1'b0;
  24119. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .BypassEn = 1'b0;
  24120. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~4 .CarryEnb = 1'b1;
  24121. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 (
  24122. .A(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  24123. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  24124. .C(\macro_inst|u_uart[0]|u_rx[3]|Selector2~4_combout ),
  24125. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  24126. .Cin(),
  24127. .Qin(),
  24128. .Clk(),
  24129. .AsyncReset(),
  24130. .SyncReset(),
  24131. .ShiftData(),
  24132. .SyncLoad(),
  24133. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~5_combout ),
  24134. .Cout(),
  24135. .Q());
  24136. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .coord_x = 18;
  24137. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .coord_y = 4;
  24138. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .coord_z = 5;
  24139. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .mask = 16'h0E00;
  24140. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .modeMux = 1'b0;
  24141. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .FeedbackMux = 1'b0;
  24142. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .ShiftMux = 1'b0;
  24143. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .BypassEn = 1'b0;
  24144. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector2~5 .CarryEnb = 1'b1;
  24145. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 (
  24146. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3]),
  24147. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24148. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24149. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0]),
  24150. .Cin(),
  24151. .Qin(),
  24152. .Clk(),
  24153. .AsyncReset(),
  24154. .SyncReset(),
  24155. .ShiftData(),
  24156. .SyncLoad(),
  24157. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~1_combout ),
  24158. .Cout(),
  24159. .Q());
  24160. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .coord_x = 2;
  24161. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .coord_y = 4;
  24162. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .coord_z = 8;
  24163. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .mask = 16'h0001;
  24164. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .modeMux = 1'b0;
  24165. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .FeedbackMux = 1'b0;
  24166. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .ShiftMux = 1'b0;
  24167. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .BypassEn = 1'b0;
  24168. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~1 .CarryEnb = 1'b1;
  24169. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 (
  24170. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector4~1_combout ),
  24171. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ),
  24172. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  24173. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24174. .Cin(),
  24175. .Qin(),
  24176. .Clk(),
  24177. .AsyncReset(),
  24178. .SyncReset(),
  24179. .ShiftData(),
  24180. .SyncLoad(),
  24181. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~2_combout ),
  24182. .Cout(),
  24183. .Q());
  24184. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .coord_x = 2;
  24185. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .coord_y = 3;
  24186. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .coord_z = 6;
  24187. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .mask = 16'hF200;
  24188. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .modeMux = 1'b0;
  24189. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .FeedbackMux = 1'b0;
  24190. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .ShiftMux = 1'b0;
  24191. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .BypassEn = 1'b0;
  24192. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~2 .CarryEnb = 1'b1;
  24193. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 (
  24194. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector4~2_combout ),
  24195. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  24196. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  24197. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector4~3_combout ),
  24198. .Cin(),
  24199. .Qin(),
  24200. .Clk(),
  24201. .AsyncReset(),
  24202. .SyncReset(),
  24203. .ShiftData(),
  24204. .SyncLoad(),
  24205. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~4_combout ),
  24206. .Cout(),
  24207. .Q());
  24208. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .coord_x = 2;
  24209. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .coord_y = 3;
  24210. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .coord_z = 0;
  24211. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .mask = 16'hF3F4;
  24212. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .modeMux = 1'b0;
  24213. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .FeedbackMux = 1'b0;
  24214. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .ShiftMux = 1'b0;
  24215. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .BypassEn = 1'b0;
  24216. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~4 .CarryEnb = 1'b1;
  24217. alta_slice \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 (
  24218. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  24219. .B(\macro_inst|u_uart[0]|u_rx[3]|Selector4~0_combout ),
  24220. .C(\macro_inst|u_uart[0]|u_rx[3]|Selector4~4_combout ),
  24221. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector4~2_combout ),
  24222. .Cin(),
  24223. .Qin(),
  24224. .Clk(),
  24225. .AsyncReset(),
  24226. .SyncReset(),
  24227. .ShiftData(),
  24228. .SyncLoad(),
  24229. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~5_combout ),
  24230. .Cout(),
  24231. .Q());
  24232. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .coord_x = 2;
  24233. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .coord_y = 3;
  24234. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .coord_z = 7;
  24235. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .mask = 16'hEFCD;
  24236. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .modeMux = 1'b0;
  24237. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .FeedbackMux = 1'b0;
  24238. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .ShiftMux = 1'b0;
  24239. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .BypassEn = 1'b0;
  24240. defparam \macro_inst|u_uart[0]|u_rx[3]|Selector4~5 .CarryEnb = 1'b1;
  24241. alta_slice \macro_inst|u_uart[0]|u_rx[3]|always3~1 (
  24242. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]),
  24243. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2]),
  24244. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]),
  24245. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [3]),
  24246. .Cin(),
  24247. .Qin(),
  24248. .Clk(),
  24249. .AsyncReset(),
  24250. .SyncReset(),
  24251. .ShiftData(),
  24252. .SyncLoad(),
  24253. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ),
  24254. .Cout(),
  24255. .Q());
  24256. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .coord_x = 2;
  24257. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .coord_y = 4;
  24258. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .coord_z = 5;
  24259. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .mask = 16'h0001;
  24260. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .modeMux = 1'b0;
  24261. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .FeedbackMux = 1'b0;
  24262. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .ShiftMux = 1'b0;
  24263. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .BypassEn = 1'b0;
  24264. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~1 .CarryEnb = 1'b1;
  24265. alta_slice \macro_inst|u_uart[0]|u_rx[3]|always3~2 (
  24266. .A(vcc),
  24267. .B(\macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ),
  24268. .C(vcc),
  24269. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  24270. .Cin(),
  24271. .Qin(),
  24272. .Clk(),
  24273. .AsyncReset(),
  24274. .SyncReset(),
  24275. .ShiftData(),
  24276. .SyncLoad(),
  24277. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always3~2_combout ),
  24278. .Cout(),
  24279. .Q());
  24280. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .coord_x = 2;
  24281. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .coord_y = 4;
  24282. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .coord_z = 2;
  24283. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .mask = 16'hCC00;
  24284. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .modeMux = 1'b0;
  24285. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .FeedbackMux = 1'b0;
  24286. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .ShiftMux = 1'b0;
  24287. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .BypassEn = 1'b0;
  24288. defparam \macro_inst|u_uart[0]|u_rx[3]|always3~2 .CarryEnb = 1'b1;
  24289. alta_slice \macro_inst|u_uart[0]|u_rx[3]|always4~2 (
  24290. .A(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24291. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24292. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24293. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  24294. .Cin(),
  24295. .Qin(),
  24296. .Clk(),
  24297. .AsyncReset(),
  24298. .SyncReset(),
  24299. .ShiftData(),
  24300. .SyncLoad(),
  24301. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always4~2_combout ),
  24302. .Cout(),
  24303. .Q());
  24304. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .coord_x = 3;
  24305. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .coord_y = 4;
  24306. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .coord_z = 15;
  24307. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .mask = 16'h0200;
  24308. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .modeMux = 1'b0;
  24309. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .FeedbackMux = 1'b0;
  24310. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .ShiftMux = 1'b0;
  24311. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .BypassEn = 1'b0;
  24312. defparam \macro_inst|u_uart[0]|u_rx[3]|always4~2 .CarryEnb = 1'b1;
  24313. alta_slice \macro_inst|u_uart[0]|u_rx[3]|always8~0 (
  24314. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  24315. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24316. .C(\macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ),
  24317. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~q ),
  24318. .Cin(),
  24319. .Qin(),
  24320. .Clk(),
  24321. .AsyncReset(),
  24322. .SyncReset(),
  24323. .ShiftData(),
  24324. .SyncLoad(),
  24325. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always8~0_combout ),
  24326. .Cout(),
  24327. .Q());
  24328. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .coord_x = 3;
  24329. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .coord_y = 4;
  24330. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .coord_z = 2;
  24331. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .mask = 16'h4000;
  24332. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .modeMux = 1'b0;
  24333. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .FeedbackMux = 1'b0;
  24334. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .ShiftMux = 1'b0;
  24335. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .BypassEn = 1'b0;
  24336. defparam \macro_inst|u_uart[0]|u_rx[3]|always8~0 .CarryEnb = 1'b1;
  24337. alta_slice \macro_inst|u_uart[0]|u_rx[3]|break_error (
  24338. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24339. .B(vcc),
  24340. .C(vcc),
  24341. .D(\macro_inst|u_uart[0]|u_rx[3]|always11~2_combout ),
  24342. .Cin(),
  24343. .Qin(\macro_inst|u_uart[0]|u_rx[3]|break_error~q ),
  24344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  24345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  24346. .SyncReset(),
  24347. .ShiftData(),
  24348. .SyncLoad(),
  24349. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|break_error~0_combout ),
  24350. .Cout(),
  24351. .Q(\macro_inst|u_uart[0]|u_rx[3]|break_error~q ));
  24352. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .coord_x = 11;
  24353. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .coord_y = 3;
  24354. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .coord_z = 0;
  24355. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .mask = 16'hFF50;
  24356. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .modeMux = 1'b0;
  24357. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .FeedbackMux = 1'b1;
  24358. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .ShiftMux = 1'b0;
  24359. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .BypassEn = 1'b0;
  24360. defparam \macro_inst|u_uart[0]|u_rx[3]|break_error .CarryEnb = 1'b1;
  24361. alta_slice \macro_inst|u_uart[0]|u_rx[3]|framing_error (
  24362. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  24363. .B(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  24364. .C(vcc),
  24365. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24366. .Cin(),
  24367. .Qin(\macro_inst|u_uart[0]|u_rx[3]|framing_error~q ),
  24368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  24369. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  24370. .SyncReset(),
  24371. .ShiftData(),
  24372. .SyncLoad(),
  24373. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|framing_error~0_combout ),
  24374. .Cout(),
  24375. .Q(\macro_inst|u_uart[0]|u_rx[3]|framing_error~q ));
  24376. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .coord_x = 11;
  24377. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .coord_y = 3;
  24378. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .coord_z = 7;
  24379. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .mask = 16'h22F2;
  24380. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .modeMux = 1'b0;
  24381. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .FeedbackMux = 1'b1;
  24382. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .ShiftMux = 1'b0;
  24383. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .BypassEn = 1'b0;
  24384. defparam \macro_inst|u_uart[0]|u_rx[3]|framing_error .CarryEnb = 1'b1;
  24385. alta_slice \macro_inst|u_uart[0]|u_rx[3]|overrun_error (
  24386. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24387. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  24388. .C(vcc),
  24389. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  24390. .Cin(),
  24391. .Qin(\macro_inst|u_uart[0]|u_rx[3]|overrun_error~q ),
  24392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  24393. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  24394. .SyncReset(),
  24395. .ShiftData(),
  24396. .SyncLoad(),
  24397. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|overrun_error~0_combout ),
  24398. .Cout(),
  24399. .Q(\macro_inst|u_uart[0]|u_rx[3]|overrun_error~q ));
  24400. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .coord_x = 11;
  24401. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .coord_y = 3;
  24402. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .coord_z = 3;
  24403. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .mask = 16'hDC50;
  24404. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .modeMux = 1'b0;
  24405. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .FeedbackMux = 1'b1;
  24406. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .ShiftMux = 1'b0;
  24407. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .BypassEn = 1'b0;
  24408. defparam \macro_inst|u_uart[0]|u_rx[3]|overrun_error .CarryEnb = 1'b1;
  24409. alta_slice \macro_inst|u_uart[0]|u_rx[3]|parity_error (
  24410. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24411. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_sample~0_combout ),
  24412. .C(vcc),
  24413. .D(\macro_inst|u_uart[0]|u_rx[3]|parity_error~0_combout ),
  24414. .Cin(),
  24415. .Qin(\macro_inst|u_uart[0]|u_rx[3]|parity_error~q ),
  24416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  24417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  24418. .SyncReset(),
  24419. .ShiftData(),
  24420. .SyncLoad(),
  24421. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|parity_error~1_combout ),
  24422. .Cout(),
  24423. .Q(\macro_inst|u_uart[0]|u_rx[3]|parity_error~q ));
  24424. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .coord_x = 11;
  24425. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .coord_y = 3;
  24426. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .coord_z = 4;
  24427. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .mask = 16'hDC50;
  24428. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .modeMux = 1'b0;
  24429. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .FeedbackMux = 1'b1;
  24430. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .ShiftMux = 1'b0;
  24431. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .BypassEn = 1'b0;
  24432. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error .CarryEnb = 1'b1;
  24433. alta_slice \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 (
  24434. .A(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  24435. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~q ),
  24436. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  24437. .D(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24438. .Cin(),
  24439. .Qin(),
  24440. .Clk(),
  24441. .AsyncReset(),
  24442. .SyncReset(),
  24443. .ShiftData(),
  24444. .SyncLoad(),
  24445. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|parity_error~0_combout ),
  24446. .Cout(),
  24447. .Q());
  24448. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .coord_x = 6;
  24449. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .coord_y = 1;
  24450. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .coord_z = 15;
  24451. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .mask = 16'h6000;
  24452. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .modeMux = 1'b0;
  24453. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .FeedbackMux = 1'b0;
  24454. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .ShiftMux = 1'b0;
  24455. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .BypassEn = 1'b0;
  24456. defparam \macro_inst|u_uart[0]|u_rx[3]|parity_error~0 .CarryEnb = 1'b1;
  24457. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] (
  24458. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0]),
  24459. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  24460. .C(\~GND~combout ),
  24461. .D(vcc),
  24462. .Cin(),
  24463. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0]),
  24464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  24465. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ),
  24466. .SyncReset(SyncReset_X47_Y1_GND),
  24467. .ShiftData(),
  24468. .SyncLoad(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ),
  24469. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0]~4_combout ),
  24470. .Cout(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0]~5 ),
  24471. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0]));
  24472. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .coord_x = 2;
  24473. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .coord_y = 4;
  24474. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .coord_z = 11;
  24475. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .mask = 16'h6688;
  24476. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .modeMux = 1'b0;
  24477. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  24478. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  24479. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .BypassEn = 1'b1;
  24480. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  24481. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] (
  24482. .A(vcc),
  24483. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24484. .C(vcc),
  24485. .D(vcc),
  24486. .Cin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[0]~5 ),
  24487. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  24489. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ),
  24490. .SyncReset(SyncReset_X47_Y1_GND),
  24491. .ShiftData(),
  24492. .SyncLoad(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ),
  24493. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1]~6_combout ),
  24494. .Cout(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1]~7 ),
  24495. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]));
  24496. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .coord_x = 2;
  24497. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .coord_y = 4;
  24498. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .coord_z = 12;
  24499. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .mask = 16'h3C3F;
  24500. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .modeMux = 1'b1;
  24501. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  24502. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  24503. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .BypassEn = 1'b1;
  24504. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  24505. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] (
  24506. .A(vcc),
  24507. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24508. .C(\~GND~combout ),
  24509. .D(vcc),
  24510. .Cin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[1]~7 ),
  24511. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  24513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ),
  24514. .SyncReset(SyncReset_X47_Y1_GND),
  24515. .ShiftData(),
  24516. .SyncLoad(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ),
  24517. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2]~8_combout ),
  24518. .Cout(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2]~9 ),
  24519. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]));
  24520. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .coord_x = 2;
  24521. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .coord_y = 4;
  24522. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .coord_z = 13;
  24523. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .mask = 16'hC30C;
  24524. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .modeMux = 1'b1;
  24525. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  24526. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  24527. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .BypassEn = 1'b1;
  24528. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  24529. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] (
  24530. .A(vcc),
  24531. .B(vcc),
  24532. .C(\~GND~combout ),
  24533. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3]),
  24534. .Cin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[2]~9 ),
  24535. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3]),
  24536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  24537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ),
  24538. .SyncReset(SyncReset_X47_Y1_GND),
  24539. .ShiftData(),
  24540. .SyncLoad(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ),
  24541. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3]~10_combout ),
  24542. .Cout(),
  24543. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3]));
  24544. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .coord_x = 2;
  24545. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .coord_y = 4;
  24546. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .coord_z = 14;
  24547. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .mask = 16'h0FF0;
  24548. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .modeMux = 1'b1;
  24549. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  24550. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  24551. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .BypassEn = 1'b1;
  24552. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  24553. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_bit (
  24554. .A(vcc),
  24555. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  24556. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  24557. .D(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24558. .Cin(),
  24559. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y2_SIG_VCC ),
  24561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y2_SIG ),
  24562. .SyncReset(),
  24563. .ShiftData(),
  24564. .SyncLoad(),
  24565. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always2~1_combout ),
  24566. .Cout(),
  24567. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ));
  24568. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .coord_x = 6;
  24569. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .coord_y = 4;
  24570. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .coord_z = 2;
  24571. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .mask = 16'hC000;
  24572. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .modeMux = 1'b0;
  24573. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .FeedbackMux = 1'b0;
  24574. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .ShiftMux = 1'b0;
  24575. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .BypassEn = 1'b0;
  24576. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_bit .CarryEnb = 1'b1;
  24577. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] (
  24578. .A(\macro_inst|u_uart[0]|u_rx[3]|always3~2_combout ),
  24579. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24580. .C(vcc),
  24581. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  24582. .Cin(),
  24583. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]),
  24584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout_X47_Y1_SIG_SIG ),
  24585. .AsyncReset(AsyncReset_X47_Y1_GND),
  24586. .SyncReset(),
  24587. .ShiftData(),
  24588. .SyncLoad(),
  24589. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~4_combout ),
  24590. .Cout(),
  24591. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]));
  24592. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .coord_x = 2;
  24593. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .coord_y = 4;
  24594. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .coord_z = 6;
  24595. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .mask = 16'hCDCF;
  24596. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .modeMux = 1'b0;
  24597. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  24598. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .ShiftMux = 1'b0;
  24599. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .BypassEn = 1'b0;
  24600. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0] .CarryEnb = 1'b1;
  24601. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 (
  24602. .A(vcc),
  24603. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24604. .C(vcc),
  24605. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24606. .Cin(),
  24607. .Qin(),
  24608. .Clk(),
  24609. .AsyncReset(),
  24610. .SyncReset(),
  24611. .ShiftData(),
  24612. .SyncLoad(),
  24613. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout ),
  24614. .Cout(),
  24615. .Q());
  24616. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .coord_x = 2;
  24617. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .coord_y = 4;
  24618. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .coord_z = 15;
  24619. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .mask = 16'hFFCC;
  24620. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .modeMux = 1'b0;
  24621. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .FeedbackMux = 1'b0;
  24622. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .ShiftMux = 1'b0;
  24623. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .BypassEn = 1'b0;
  24624. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3 .CarryEnb = 1'b1;
  24625. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] (
  24626. .A(\macro_inst|u_uart[0]|u_rx[3]|always3~2_combout ),
  24627. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24628. .C(\macro_inst|u_uart[0]|u_rx[3]|Add4~2_combout ),
  24629. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  24630. .Cin(),
  24631. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]),
  24632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout_X47_Y1_SIG_SIG ),
  24633. .AsyncReset(AsyncReset_X47_Y1_GND),
  24634. .SyncReset(),
  24635. .ShiftData(),
  24636. .SyncLoad(),
  24637. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~5_combout ),
  24638. .Cout(),
  24639. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]));
  24640. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .coord_x = 2;
  24641. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .coord_y = 4;
  24642. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .coord_z = 10;
  24643. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .mask = 16'hEFCD;
  24644. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .modeMux = 1'b0;
  24645. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  24646. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .ShiftMux = 1'b0;
  24647. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .BypassEn = 1'b0;
  24648. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[1] .CarryEnb = 1'b1;
  24649. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] (
  24650. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  24651. .B(\macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ),
  24652. .C(\macro_inst|u_uart[0]|u_rx[3]|Add4~1_combout ),
  24653. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24654. .Cin(),
  24655. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2]),
  24656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[0]~3_combout_X47_Y1_SIG_SIG ),
  24657. .AsyncReset(AsyncReset_X47_Y1_GND),
  24658. .SyncReset(),
  24659. .ShiftData(),
  24660. .SyncLoad(),
  24661. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~2_combout ),
  24662. .Cout(),
  24663. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2]));
  24664. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .coord_x = 2;
  24665. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .coord_y = 4;
  24666. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .coord_z = 1;
  24667. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .mask = 16'hFF07;
  24668. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .modeMux = 1'b0;
  24669. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  24670. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .ShiftMux = 1'b0;
  24671. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .BypassEn = 1'b0;
  24672. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[2] .CarryEnb = 1'b1;
  24673. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] (
  24674. .A(\macro_inst|u_uart[0]|u_rx[3]|Add4~0_combout ),
  24675. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  24676. .C(vcc),
  24677. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  24678. .Cin(),
  24679. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [3]),
  24680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  24681. .AsyncReset(AsyncReset_X47_Y1_GND),
  24682. .SyncReset(),
  24683. .ShiftData(),
  24684. .SyncLoad(),
  24685. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt~1_combout ),
  24686. .Cout(),
  24687. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [3]));
  24688. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .coord_x = 2;
  24689. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .coord_y = 4;
  24690. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .coord_z = 7;
  24691. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .mask = 16'h1130;
  24692. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .modeMux = 1'b0;
  24693. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  24694. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .ShiftMux = 1'b0;
  24695. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .BypassEn = 1'b0;
  24696. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt[3] .CarryEnb = 1'b1;
  24697. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] (
  24698. .A(vcc),
  24699. .B(\macro_inst|u_uart[0]|u_regs|rx_read [3]),
  24700. .C(vcc),
  24701. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  24702. .Cin(),
  24703. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  24704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y4_SIG_VCC ),
  24705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  24706. .SyncReset(),
  24707. .ShiftData(),
  24708. .SyncLoad(),
  24709. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter~0_combout ),
  24710. .Cout(),
  24711. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]));
  24712. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .coord_x = 18;
  24713. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .coord_y = 2;
  24714. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .coord_z = 3;
  24715. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .mask = 16'h3F30;
  24716. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .modeMux = 1'b0;
  24717. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  24718. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  24719. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .BypassEn = 1'b0;
  24720. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  24721. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] (
  24722. .A(\macro_inst|u_uart[0]|u_regs|Mux0~3_combout ),
  24723. .B(\macro_inst|u_ahb2apb|paddr [9]),
  24724. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [0]),
  24725. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][0]~q ),
  24726. .Cin(),
  24727. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0]~q ),
  24728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24729. .AsyncReset(AsyncReset_X47_Y2_GND),
  24730. .SyncReset(SyncReset_X47_Y2_GND),
  24731. .ShiftData(),
  24732. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24733. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux0~4_combout ),
  24734. .Cout(),
  24735. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0]~q ));
  24736. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .coord_x = 4;
  24737. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .coord_y = 4;
  24738. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .coord_z = 15;
  24739. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .mask = 16'hE6A2;
  24740. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  24741. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  24742. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  24743. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  24744. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  24745. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] (
  24746. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24747. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][1]~q ),
  24748. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1]),
  24749. .D(\macro_inst|u_uart[0]|u_regs|Mux1~3_combout ),
  24750. .Cin(),
  24751. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1]~q ),
  24752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24753. .AsyncReset(AsyncReset_X47_Y2_GND),
  24754. .SyncReset(SyncReset_X47_Y2_GND),
  24755. .ShiftData(),
  24756. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24757. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux1~4_combout ),
  24758. .Cout(),
  24759. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1]~q ));
  24760. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .coord_x = 4;
  24761. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .coord_y = 4;
  24762. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .coord_z = 12;
  24763. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .mask = 16'hF588;
  24764. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  24765. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  24766. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  24767. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  24768. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  24769. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] (
  24770. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24771. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][2]~q ),
  24772. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2]),
  24773. .D(\macro_inst|u_uart[0]|u_regs|Mux2~3_combout ),
  24774. .Cin(),
  24775. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2]~q ),
  24776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24777. .AsyncReset(AsyncReset_X47_Y2_GND),
  24778. .SyncReset(SyncReset_X47_Y2_GND),
  24779. .ShiftData(),
  24780. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24781. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux2~4_combout ),
  24782. .Cout(),
  24783. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2]~q ));
  24784. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .coord_x = 4;
  24785. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .coord_y = 4;
  24786. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .coord_z = 11;
  24787. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .mask = 16'hF588;
  24788. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  24789. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  24790. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  24791. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  24792. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  24793. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] (
  24794. .A(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][3]~q ),
  24795. .B(\macro_inst|u_uart[0]|u_regs|Mux3~3_combout ),
  24796. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3]),
  24797. .D(\macro_inst|u_ahb2apb|paddr [9]),
  24798. .Cin(),
  24799. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3]~q ),
  24800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24801. .AsyncReset(AsyncReset_X47_Y2_GND),
  24802. .SyncReset(SyncReset_X47_Y2_GND),
  24803. .ShiftData(),
  24804. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24805. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux3~4_combout ),
  24806. .Cout(),
  24807. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3]~q ));
  24808. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .coord_x = 4;
  24809. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .coord_y = 4;
  24810. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .coord_z = 0;
  24811. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .mask = 16'hE2CC;
  24812. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  24813. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  24814. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  24815. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  24816. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  24817. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] (
  24818. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24819. .B(\macro_inst|u_uart[0]|u_regs|Mux4~3_combout ),
  24820. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [4]),
  24821. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][4]~q ),
  24822. .Cin(),
  24823. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4]~q ),
  24824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24825. .AsyncReset(AsyncReset_X47_Y2_GND),
  24826. .SyncReset(SyncReset_X47_Y2_GND),
  24827. .ShiftData(),
  24828. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24829. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux4~4_combout ),
  24830. .Cout(),
  24831. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4]~q ));
  24832. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .coord_x = 4;
  24833. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .coord_y = 4;
  24834. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .coord_z = 7;
  24835. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .mask = 16'hE6C4;
  24836. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  24837. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  24838. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  24839. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  24840. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  24841. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] (
  24842. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24843. .B(\macro_inst|u_uart[0]|u_regs|Mux5~3_combout ),
  24844. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5]),
  24845. .D(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][5]~q ),
  24846. .Cin(),
  24847. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5]~q ),
  24848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24849. .AsyncReset(AsyncReset_X47_Y2_GND),
  24850. .SyncReset(SyncReset_X47_Y2_GND),
  24851. .ShiftData(),
  24852. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24853. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux5~4_combout ),
  24854. .Cout(),
  24855. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5]~q ));
  24856. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .coord_x = 4;
  24857. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .coord_y = 4;
  24858. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .coord_z = 4;
  24859. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .mask = 16'hE6C4;
  24860. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  24861. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  24862. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  24863. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  24864. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  24865. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] (
  24866. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24867. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][6]~q ),
  24868. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6]),
  24869. .D(\macro_inst|u_uart[0]|u_regs|Mux6~3_combout ),
  24870. .Cin(),
  24871. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6]~q ),
  24872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24873. .AsyncReset(AsyncReset_X47_Y2_GND),
  24874. .SyncReset(SyncReset_X47_Y2_GND),
  24875. .ShiftData(),
  24876. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24877. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux6~4_combout ),
  24878. .Cout(),
  24879. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6]~q ));
  24880. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .coord_x = 4;
  24881. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .coord_y = 4;
  24882. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .coord_z = 10;
  24883. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .mask = 16'hF588;
  24884. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  24885. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  24886. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  24887. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  24888. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  24889. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] (
  24890. .A(\macro_inst|u_ahb2apb|paddr [9]),
  24891. .B(\macro_inst|u_uart[0]|u_rx[2]|rx_fifo|fifo[1][7]~q ),
  24892. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]),
  24893. .D(\macro_inst|u_uart[0]|u_regs|Mux7~3_combout ),
  24894. .Cin(),
  24895. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7]~q ),
  24896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout_X47_Y2_SIG_SIG ),
  24897. .AsyncReset(AsyncReset_X47_Y2_GND),
  24898. .SyncReset(SyncReset_X47_Y2_GND),
  24899. .ShiftData(),
  24900. .SyncLoad(SyncLoad_X47_Y2_VCC),
  24901. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux7~4_combout ),
  24902. .Cout(),
  24903. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7]~q ));
  24904. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .coord_x = 4;
  24905. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .coord_y = 4;
  24906. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .coord_z = 13;
  24907. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .mask = 16'hF588;
  24908. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  24909. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  24910. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  24911. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  24912. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  24913. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 (
  24914. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_sample~0_combout ),
  24915. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ),
  24916. .C(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  24917. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  24918. .Cin(),
  24919. .Qin(),
  24920. .Clk(),
  24921. .AsyncReset(),
  24922. .SyncReset(),
  24923. .ShiftData(),
  24924. .SyncLoad(),
  24925. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0_combout ),
  24926. .Cout(),
  24927. .Q());
  24928. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .coord_x = 4;
  24929. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .coord_y = 4;
  24930. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .coord_z = 8;
  24931. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .mask = 16'h0080;
  24932. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  24933. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  24934. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  24935. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  24936. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  24937. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_idle (
  24938. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24939. .B(\macro_inst|u_uart[0]|u_rx[3]|always8~0_combout ),
  24940. .C(vcc),
  24941. .D(vcc),
  24942. .Cin(),
  24943. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_idle~q ),
  24944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y2_SIG_VCC ),
  24945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y2_SIG ),
  24946. .SyncReset(),
  24947. .ShiftData(),
  24948. .SyncLoad(),
  24949. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_idle~0_combout ),
  24950. .Cout(),
  24951. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_idle~q ));
  24952. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .coord_x = 11;
  24953. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .coord_y = 3;
  24954. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .coord_z = 13;
  24955. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .mask = 16'hDCDC;
  24956. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .modeMux = 1'b0;
  24957. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .FeedbackMux = 1'b1;
  24958. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .ShiftMux = 1'b0;
  24959. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .BypassEn = 1'b0;
  24960. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle .CarryEnb = 1'b1;
  24961. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en (
  24962. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  24963. .B(vcc),
  24964. .C(vcc),
  24965. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_fifo|counter [0]),
  24966. .Cin(),
  24967. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~q ),
  24968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  24969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  24970. .SyncReset(),
  24971. .ShiftData(),
  24972. .SyncLoad(),
  24973. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~0_combout ),
  24974. .Cout(),
  24975. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_idle_en~q ));
  24976. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .coord_x = 10;
  24977. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .coord_y = 3;
  24978. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .coord_z = 7;
  24979. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .mask = 16'hFF50;
  24980. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .modeMux = 1'b0;
  24981. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .FeedbackMux = 1'b1;
  24982. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .ShiftMux = 1'b0;
  24983. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .BypassEn = 1'b0;
  24984. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_idle_en .CarryEnb = 1'b1;
  24985. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] (
  24986. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  24987. .B(vcc),
  24988. .C(\macro_inst|uart_rxd [3]),
  24989. .D(\macro_inst|u_uart[0]|u_regs|tx_write [5]),
  24990. .Cin(),
  24991. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_in [0]),
  24992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  24993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  24994. .SyncReset(SyncReset_X56_Y1_GND),
  24995. .ShiftData(),
  24996. .SyncLoad(SyncLoad_X56_Y1_VCC),
  24997. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout ),
  24998. .Cout(),
  24999. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_in [0]));
  25000. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .coord_x = 10;
  25001. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .coord_y = 3;
  25002. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .coord_z = 4;
  25003. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .mask = 16'h5500;
  25004. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .modeMux = 1'b0;
  25005. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .FeedbackMux = 1'b0;
  25006. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .ShiftMux = 1'b0;
  25007. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .BypassEn = 1'b1;
  25008. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[0] .CarryEnb = 1'b1;
  25009. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] (
  25010. .A(vcc),
  25011. .B(vcc),
  25012. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_in [0]),
  25013. .D(vcc),
  25014. .Cin(),
  25015. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_in [1]),
  25016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  25017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  25018. .SyncReset(SyncReset_X56_Y1_GND),
  25019. .ShiftData(),
  25020. .SyncLoad(SyncLoad_X56_Y1_VCC),
  25021. .LutOut(\~VCC~combout ),
  25022. .Cout(),
  25023. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_in [1]));
  25024. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .coord_x = 10;
  25025. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .coord_y = 3;
  25026. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .coord_z = 8;
  25027. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .mask = 16'hFFFF;
  25028. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .modeMux = 1'b0;
  25029. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .FeedbackMux = 1'b0;
  25030. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .ShiftMux = 1'b0;
  25031. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .BypassEn = 1'b1;
  25032. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[1] .CarryEnb = 1'b1;
  25033. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] (
  25034. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  25035. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_in [3]),
  25036. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_in [1]),
  25037. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_in [4]),
  25038. .Cin(),
  25039. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_in [2]),
  25040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ),
  25041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25042. .SyncReset(SyncReset_X48_Y1_GND),
  25043. .ShiftData(),
  25044. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25045. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout ),
  25046. .Cout(),
  25047. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_in [2]));
  25048. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .coord_x = 3;
  25049. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .coord_y = 4;
  25050. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .coord_z = 14;
  25051. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .mask = 16'h4054;
  25052. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .modeMux = 1'b0;
  25053. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .FeedbackMux = 1'b1;
  25054. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .ShiftMux = 1'b0;
  25055. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .BypassEn = 1'b1;
  25056. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[2] .CarryEnb = 1'b1;
  25057. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] (
  25058. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [2]),
  25059. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]),
  25060. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_in [2]),
  25061. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]),
  25062. .Cin(),
  25063. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_in [3]),
  25064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ),
  25065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25066. .SyncReset(SyncReset_X48_Y1_GND),
  25067. .ShiftData(),
  25068. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25069. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Add4~1_combout ),
  25070. .Cout(),
  25071. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_in [3]));
  25072. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .coord_x = 3;
  25073. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .coord_y = 4;
  25074. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .coord_z = 3;
  25075. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .mask = 16'h5566;
  25076. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .modeMux = 1'b0;
  25077. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .FeedbackMux = 1'b0;
  25078. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .ShiftMux = 1'b0;
  25079. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .BypassEn = 1'b1;
  25080. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[3] .CarryEnb = 1'b1;
  25081. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] (
  25082. .A(vcc),
  25083. .B(vcc),
  25084. .C(vcc),
  25085. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_in [3]),
  25086. .Cin(),
  25087. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_in [4]),
  25088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ),
  25089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25090. .SyncReset(),
  25091. .ShiftData(),
  25092. .SyncLoad(),
  25093. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_in[4]~0_combout ),
  25094. .Cout(),
  25095. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_in [4]));
  25096. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .coord_x = 3;
  25097. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .coord_y = 4;
  25098. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .coord_z = 13;
  25099. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .mask = 16'h00FF;
  25100. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .modeMux = 1'b0;
  25101. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .FeedbackMux = 1'b0;
  25102. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .ShiftMux = 1'b0;
  25103. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .BypassEn = 1'b0;
  25104. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_in[4] .CarryEnb = 1'b1;
  25105. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_parity (
  25106. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~0_combout ),
  25107. .B(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  25108. .C(vcc),
  25109. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  25110. .Cin(),
  25111. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~q ),
  25112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  25113. .AsyncReset(AsyncReset_X46_Y1_GND),
  25114. .SyncReset(),
  25115. .ShiftData(),
  25116. .SyncLoad(),
  25117. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~1_combout ),
  25118. .Cout(),
  25119. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~q ));
  25120. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .coord_x = 3;
  25121. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .coord_y = 3;
  25122. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .coord_z = 13;
  25123. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .mask = 16'h335A;
  25124. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .modeMux = 1'b0;
  25125. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .FeedbackMux = 1'b1;
  25126. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .ShiftMux = 1'b0;
  25127. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .BypassEn = 1'b0;
  25128. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity .CarryEnb = 1'b1;
  25129. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 (
  25130. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  25131. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  25132. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]),
  25133. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  25134. .Cin(),
  25135. .Qin(),
  25136. .Clk(),
  25137. .AsyncReset(),
  25138. .SyncReset(),
  25139. .ShiftData(),
  25140. .SyncLoad(),
  25141. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_parity~0_combout ),
  25142. .Cout(),
  25143. .Q());
  25144. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .coord_x = 3;
  25145. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .coord_y = 4;
  25146. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .coord_z = 8;
  25147. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .mask = 16'h4000;
  25148. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .modeMux = 1'b0;
  25149. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .FeedbackMux = 1'b0;
  25150. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .ShiftMux = 1'b0;
  25151. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .BypassEn = 1'b0;
  25152. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_parity~0 .CarryEnb = 1'b1;
  25153. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] (
  25154. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2]),
  25155. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3]),
  25156. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1]),
  25157. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1]),
  25158. .Cin(),
  25159. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [0]),
  25160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25162. .SyncReset(SyncReset_X48_Y1_GND),
  25163. .ShiftData(),
  25164. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25165. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always11~1_combout ),
  25166. .Cout(),
  25167. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [0]));
  25168. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .coord_x = 3;
  25169. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .coord_y = 4;
  25170. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .coord_z = 0;
  25171. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .mask = 16'h0001;
  25172. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .modeMux = 1'b0;
  25173. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .FeedbackMux = 1'b1;
  25174. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .ShiftMux = 1'b0;
  25175. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .BypassEn = 1'b1;
  25176. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[0] .CarryEnb = 1'b1;
  25177. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] (
  25178. .A(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~q ),
  25179. .B(\macro_inst|u_uart[0]|u_rx[0]|rx_bit~q ),
  25180. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2]),
  25181. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  25182. .Cin(),
  25183. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1]),
  25184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25186. .SyncReset(SyncReset_X48_Y1_GND),
  25187. .ShiftData(),
  25188. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25189. .LutOut(\macro_inst|u_uart[0]|u_rx[0]|rx_state.UART_PARITY~0_combout ),
  25190. .Cout(),
  25191. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [1]));
  25192. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .coord_x = 3;
  25193. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .coord_y = 4;
  25194. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .coord_z = 1;
  25195. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .mask = 16'h7700;
  25196. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .modeMux = 1'b0;
  25197. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  25198. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .ShiftMux = 1'b0;
  25199. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .BypassEn = 1'b1;
  25200. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[1] .CarryEnb = 1'b1;
  25201. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] (
  25202. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [0]),
  25203. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  25204. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3]),
  25205. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [3]),
  25206. .Cin(),
  25207. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2]),
  25208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25210. .SyncReset(SyncReset_X48_Y1_GND),
  25211. .ShiftData(),
  25212. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25213. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always2~0_combout ),
  25214. .Cout(),
  25215. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [2]));
  25216. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .coord_x = 3;
  25217. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .coord_y = 4;
  25218. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .coord_z = 4;
  25219. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .mask = 16'h8800;
  25220. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .modeMux = 1'b0;
  25221. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  25222. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .ShiftMux = 1'b0;
  25223. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .BypassEn = 1'b1;
  25224. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[2] .CarryEnb = 1'b1;
  25225. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] (
  25226. .A(vcc),
  25227. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [0]),
  25228. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [4]),
  25229. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_data_cnt [1]),
  25230. .Cin(),
  25231. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3]),
  25232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25234. .SyncReset(SyncReset_X48_Y1_GND),
  25235. .ShiftData(),
  25236. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25237. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Add4~2_combout ),
  25238. .Cout(),
  25239. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [3]));
  25240. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .coord_x = 3;
  25241. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .coord_y = 4;
  25242. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .coord_z = 10;
  25243. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .mask = 16'h33CC;
  25244. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .modeMux = 1'b0;
  25245. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  25246. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .ShiftMux = 1'b0;
  25247. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .BypassEn = 1'b1;
  25248. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[3] .CarryEnb = 1'b1;
  25249. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] (
  25250. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]),
  25251. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6]),
  25252. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5]),
  25253. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5]),
  25254. .Cin(),
  25255. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [4]),
  25256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25258. .SyncReset(SyncReset_X48_Y1_GND),
  25259. .ShiftData(),
  25260. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25261. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always11~0_combout ),
  25262. .Cout(),
  25263. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [4]));
  25264. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .coord_x = 3;
  25265. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .coord_y = 4;
  25266. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .coord_z = 11;
  25267. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .mask = 16'h0001;
  25268. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .modeMux = 1'b0;
  25269. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  25270. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .ShiftMux = 1'b0;
  25271. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .BypassEn = 1'b1;
  25272. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[4] .CarryEnb = 1'b1;
  25273. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] (
  25274. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_in [2]),
  25275. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_in [4]),
  25276. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6]),
  25277. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_in [3]),
  25278. .Cin(),
  25279. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5]),
  25280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25282. .SyncReset(SyncReset_X48_Y1_GND),
  25283. .ShiftData(),
  25284. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25285. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  25286. .Cout(),
  25287. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [5]));
  25288. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .coord_x = 3;
  25289. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .coord_y = 4;
  25290. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .coord_z = 7;
  25291. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .mask = 16'h44DD;
  25292. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .modeMux = 1'b0;
  25293. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  25294. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .ShiftMux = 1'b0;
  25295. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .BypassEn = 1'b1;
  25296. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[5] .CarryEnb = 1'b1;
  25297. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] (
  25298. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [2]),
  25299. .B(vcc),
  25300. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]),
  25301. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_baud_cnt [1]),
  25302. .Cin(),
  25303. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6]),
  25304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25306. .SyncReset(SyncReset_X48_Y1_GND),
  25307. .ShiftData(),
  25308. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25309. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_sample~0_combout ),
  25310. .Cout(),
  25311. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [6]));
  25312. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .coord_x = 3;
  25313. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .coord_y = 4;
  25314. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .coord_z = 12;
  25315. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .mask = 16'h0055;
  25316. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .modeMux = 1'b0;
  25317. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  25318. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .ShiftMux = 1'b0;
  25319. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .BypassEn = 1'b1;
  25320. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[6] .CarryEnb = 1'b1;
  25321. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] (
  25322. .A(\macro_inst|u_uart[0]|u_rx[3]|always11~1_combout ),
  25323. .B(\macro_inst|u_uart[0]|u_rx[3]|always11~0_combout ),
  25324. .C(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  25325. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector2~1_combout ),
  25326. .Cin(),
  25327. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]),
  25328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[3]|always4~2_combout_X48_Y1_SIG_SIG ),
  25329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  25330. .SyncReset(SyncReset_X48_Y1_GND),
  25331. .ShiftData(),
  25332. .SyncLoad(SyncLoad_X48_Y1_VCC),
  25333. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|always11~2_combout ),
  25334. .Cout(),
  25335. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg [7]));
  25336. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .coord_x = 3;
  25337. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .coord_y = 4;
  25338. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .coord_z = 6;
  25339. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .mask = 16'h0800;
  25340. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .modeMux = 1'b0;
  25341. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  25342. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .ShiftMux = 1'b0;
  25343. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .BypassEn = 1'b1;
  25344. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_shift_reg[7] .CarryEnb = 1'b1;
  25345. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA (
  25346. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector2~2_combout ),
  25347. .B(\macro_inst|u_uart[0]|u_rx[3]|Selector2~3_combout ),
  25348. .C(\macro_inst|u_uart[0]|u_rx[3]|Selector2~5_combout ),
  25349. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  25350. .Cin(),
  25351. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  25352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  25353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  25354. .SyncReset(),
  25355. .ShiftData(),
  25356. .SyncLoad(),
  25357. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector2~6_combout ),
  25358. .Cout(),
  25359. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ));
  25360. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .coord_x = 18;
  25361. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .coord_y = 4;
  25362. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .coord_z = 4;
  25363. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .mask = 16'h5450;
  25364. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .modeMux = 1'b0;
  25365. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  25366. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .ShiftMux = 1'b0;
  25367. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .BypassEn = 1'b0;
  25368. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA .CarryEnb = 1'b1;
  25369. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE (
  25370. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector2~2_combout ),
  25371. .B(vcc),
  25372. .C(vcc),
  25373. .D(\macro_inst|u_uart[0]|u_rx[3]|Add1~0_combout ),
  25374. .Cin(),
  25375. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ),
  25376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  25377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  25378. .SyncReset(),
  25379. .ShiftData(),
  25380. .SyncLoad(),
  25381. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector0~0_combout ),
  25382. .Cout(),
  25383. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE~q ));
  25384. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .coord_x = 18;
  25385. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .coord_y = 4;
  25386. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .coord_z = 1;
  25387. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .mask = 16'h5055;
  25388. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .modeMux = 1'b0;
  25389. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  25390. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  25391. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .BypassEn = 1'b0;
  25392. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  25393. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY (
  25394. .A(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0_combout ),
  25395. .B(\macro_inst|u_uart[0]|u_rx[3]|Selector4~0_combout ),
  25396. .C(vcc),
  25397. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector4~5_combout ),
  25398. .Cin(),
  25399. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  25400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y4_SIG_VCC ),
  25401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ),
  25402. .SyncReset(),
  25403. .ShiftData(),
  25404. .SyncLoad(),
  25405. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~1_combout ),
  25406. .Cout(),
  25407. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ));
  25408. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .coord_x = 2;
  25409. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .coord_y = 3;
  25410. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .coord_z = 4;
  25411. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .mask = 16'h88F8;
  25412. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .modeMux = 1'b0;
  25413. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  25414. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  25415. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .BypassEn = 1'b0;
  25416. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  25417. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 (
  25418. .A(vcc),
  25419. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  25420. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  25421. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  25422. .Cin(),
  25423. .Qin(),
  25424. .Clk(),
  25425. .AsyncReset(),
  25426. .SyncReset(),
  25427. .ShiftData(),
  25428. .SyncLoad(),
  25429. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0_combout ),
  25430. .Cout(),
  25431. .Q());
  25432. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .coord_x = 17;
  25433. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .coord_y = 2;
  25434. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .coord_z = 11;
  25435. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .mask = 16'h3F00;
  25436. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  25437. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  25438. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  25439. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  25440. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  25441. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START (
  25442. .A(\macro_inst|u_uart[0]|u_rx[3]|Selector2~2_combout ),
  25443. .B(\macro_inst|u_uart[0]|u_rx[3]|Selector2~4_combout ),
  25444. .C(vcc),
  25445. .D(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout ),
  25446. .Cin(),
  25447. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ),
  25448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y1_SIG_VCC ),
  25449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y1_SIG ),
  25450. .SyncReset(),
  25451. .ShiftData(),
  25452. .SyncLoad(),
  25453. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector1~0_combout ),
  25454. .Cout(),
  25455. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START~q ));
  25456. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .coord_x = 2;
  25457. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .coord_y = 4;
  25458. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .coord_z = 9;
  25459. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .mask = 16'h5510;
  25460. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .modeMux = 1'b0;
  25461. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .FeedbackMux = 1'b1;
  25462. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .ShiftMux = 1'b0;
  25463. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .BypassEn = 1'b0;
  25464. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_START .CarryEnb = 1'b1;
  25465. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP (
  25466. .A(vcc),
  25467. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0_combout ),
  25468. .C(vcc),
  25469. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector4~5_combout ),
  25470. .Cin(),
  25471. .Qin(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ),
  25472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y4_SIG_VCC ),
  25473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y4_SIG ),
  25474. .SyncReset(),
  25475. .ShiftData(),
  25476. .SyncLoad(),
  25477. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~1_combout ),
  25478. .Cout(),
  25479. .Q(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~q ));
  25480. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .coord_x = 2;
  25481. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .coord_y = 3;
  25482. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .coord_z = 5;
  25483. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .mask = 16'hCCF0;
  25484. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .modeMux = 1'b0;
  25485. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  25486. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .ShiftMux = 1'b0;
  25487. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .BypassEn = 1'b0;
  25488. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP .CarryEnb = 1'b1;
  25489. alta_slice \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 (
  25490. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  25491. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  25492. .C(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_PARITY~q ),
  25493. .D(\macro_inst|u_uart[0]|u_rx[3]|Selector4~0_combout ),
  25494. .Cin(),
  25495. .Qin(),
  25496. .Clk(),
  25497. .AsyncReset(),
  25498. .SyncReset(),
  25499. .ShiftData(),
  25500. .SyncLoad(),
  25501. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0_combout ),
  25502. .Cout(),
  25503. .Q());
  25504. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .coord_x = 2;
  25505. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .coord_y = 3;
  25506. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .coord_z = 3;
  25507. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .mask = 16'hD5C0;
  25508. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  25509. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  25510. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  25511. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  25512. defparam \macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  25513. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Add4~0 (
  25514. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2]),
  25515. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3]),
  25516. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]),
  25517. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]),
  25518. .Cin(),
  25519. .Qin(),
  25520. .Clk(),
  25521. .AsyncReset(),
  25522. .SyncReset(),
  25523. .ShiftData(),
  25524. .SyncLoad(),
  25525. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Add4~0_combout ),
  25526. .Cout(),
  25527. .Q());
  25528. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .coord_x = 1;
  25529. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .coord_y = 4;
  25530. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .coord_z = 12;
  25531. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .mask = 16'h3336;
  25532. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .modeMux = 1'b0;
  25533. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .FeedbackMux = 1'b0;
  25534. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .ShiftMux = 1'b0;
  25535. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .BypassEn = 1'b0;
  25536. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~0 .CarryEnb = 1'b1;
  25537. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Add4~1 (
  25538. .A(vcc),
  25539. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]),
  25540. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2]),
  25541. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]),
  25542. .Cin(),
  25543. .Qin(),
  25544. .Clk(),
  25545. .AsyncReset(),
  25546. .SyncReset(),
  25547. .ShiftData(),
  25548. .SyncLoad(),
  25549. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Add4~1_combout ),
  25550. .Cout(),
  25551. .Q());
  25552. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .coord_x = 1;
  25553. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .coord_y = 4;
  25554. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .coord_z = 15;
  25555. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .mask = 16'h0F3C;
  25556. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .modeMux = 1'b0;
  25557. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .FeedbackMux = 1'b0;
  25558. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .ShiftMux = 1'b0;
  25559. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .BypassEn = 1'b0;
  25560. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~1 .CarryEnb = 1'b1;
  25561. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Add4~2 (
  25562. .A(vcc),
  25563. .B(vcc),
  25564. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]),
  25565. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]),
  25566. .Cin(),
  25567. .Qin(),
  25568. .Clk(),
  25569. .AsyncReset(),
  25570. .SyncReset(),
  25571. .ShiftData(),
  25572. .SyncLoad(),
  25573. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Add4~2_combout ),
  25574. .Cout(),
  25575. .Q());
  25576. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .coord_x = 1;
  25577. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .coord_y = 4;
  25578. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .coord_z = 3;
  25579. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .mask = 16'h0FF0;
  25580. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .modeMux = 1'b0;
  25581. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .FeedbackMux = 1'b0;
  25582. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .ShiftMux = 1'b0;
  25583. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .BypassEn = 1'b0;
  25584. defparam \macro_inst|u_uart[0]|u_rx[4]|Add4~2 .CarryEnb = 1'b1;
  25585. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 (
  25586. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  25587. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  25588. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ),
  25589. .D(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  25590. .Cin(),
  25591. .Qin(),
  25592. .Clk(),
  25593. .AsyncReset(),
  25594. .SyncReset(),
  25595. .ShiftData(),
  25596. .SyncLoad(),
  25597. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  25598. .Cout(),
  25599. .Q());
  25600. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .coord_x = 4;
  25601. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .coord_y = 2;
  25602. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .coord_z = 6;
  25603. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .mask = 16'h1000;
  25604. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .modeMux = 1'b0;
  25605. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .FeedbackMux = 1'b0;
  25606. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .ShiftMux = 1'b0;
  25607. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .BypassEn = 1'b0;
  25608. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~1 .CarryEnb = 1'b1;
  25609. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 (
  25610. .A(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  25611. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_sample~0_combout ),
  25612. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ),
  25613. .D(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  25614. .Cin(),
  25615. .Qin(),
  25616. .Clk(),
  25617. .AsyncReset(),
  25618. .SyncReset(),
  25619. .ShiftData(),
  25620. .SyncLoad(),
  25621. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~2_combout ),
  25622. .Cout(),
  25623. .Q());
  25624. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .coord_x = 4;
  25625. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .coord_y = 2;
  25626. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .coord_z = 10;
  25627. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .mask = 16'h8000;
  25628. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .modeMux = 1'b0;
  25629. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .FeedbackMux = 1'b0;
  25630. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .ShiftMux = 1'b0;
  25631. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .BypassEn = 1'b0;
  25632. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~2 .CarryEnb = 1'b1;
  25633. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 (
  25634. .A(vcc),
  25635. .B(vcc),
  25636. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  25637. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector4~2_combout ),
  25638. .Cin(),
  25639. .Qin(),
  25640. .Clk(),
  25641. .AsyncReset(),
  25642. .SyncReset(),
  25643. .ShiftData(),
  25644. .SyncLoad(),
  25645. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~3_combout ),
  25646. .Cout(),
  25647. .Q());
  25648. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .coord_x = 5;
  25649. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .coord_y = 2;
  25650. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .coord_z = 6;
  25651. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .mask = 16'hF000;
  25652. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .modeMux = 1'b0;
  25653. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .FeedbackMux = 1'b0;
  25654. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .ShiftMux = 1'b0;
  25655. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .BypassEn = 1'b0;
  25656. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~3 .CarryEnb = 1'b1;
  25657. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 (
  25658. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector2~3_combout ),
  25659. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  25660. .C(\macro_inst|u_uart[0]|u_rx[4]|always3~2_combout ),
  25661. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  25662. .Cin(),
  25663. .Qin(),
  25664. .Clk(),
  25665. .AsyncReset(),
  25666. .SyncReset(),
  25667. .ShiftData(),
  25668. .SyncLoad(),
  25669. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~4_combout ),
  25670. .Cout(),
  25671. .Q());
  25672. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .coord_x = 5;
  25673. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .coord_y = 2;
  25674. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .coord_z = 13;
  25675. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .mask = 16'hFE00;
  25676. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .modeMux = 1'b0;
  25677. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .FeedbackMux = 1'b0;
  25678. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .ShiftMux = 1'b0;
  25679. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .BypassEn = 1'b0;
  25680. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~4 .CarryEnb = 1'b1;
  25681. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 (
  25682. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ),
  25683. .B(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  25684. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  25685. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector2~4_combout ),
  25686. .Cin(),
  25687. .Qin(),
  25688. .Clk(),
  25689. .AsyncReset(),
  25690. .SyncReset(),
  25691. .ShiftData(),
  25692. .SyncLoad(),
  25693. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~5_combout ),
  25694. .Cout(),
  25695. .Q());
  25696. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .coord_x = 5;
  25697. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .coord_y = 2;
  25698. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .coord_z = 1;
  25699. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .mask = 16'h00E0;
  25700. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .modeMux = 1'b0;
  25701. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .FeedbackMux = 1'b0;
  25702. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .ShiftMux = 1'b0;
  25703. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .BypassEn = 1'b0;
  25704. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector2~5 .CarryEnb = 1'b1;
  25705. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 (
  25706. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  25707. .B(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  25708. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  25709. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  25710. .Cin(),
  25711. .Qin(),
  25712. .Clk(),
  25713. .AsyncReset(),
  25714. .SyncReset(),
  25715. .ShiftData(),
  25716. .SyncLoad(),
  25717. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~1_combout ),
  25718. .Cout(),
  25719. .Q());
  25720. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .coord_x = 5;
  25721. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .coord_y = 2;
  25722. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .coord_z = 5;
  25723. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .mask = 16'hEA00;
  25724. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .modeMux = 1'b0;
  25725. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .FeedbackMux = 1'b0;
  25726. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .ShiftMux = 1'b0;
  25727. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .BypassEn = 1'b0;
  25728. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~1 .CarryEnb = 1'b1;
  25729. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 (
  25730. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0]),
  25731. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3]),
  25732. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  25733. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  25734. .Cin(),
  25735. .Qin(),
  25736. .Clk(),
  25737. .AsyncReset(),
  25738. .SyncReset(),
  25739. .ShiftData(),
  25740. .SyncLoad(),
  25741. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~2_combout ),
  25742. .Cout(),
  25743. .Q());
  25744. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .coord_x = 4;
  25745. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .coord_y = 2;
  25746. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .coord_z = 8;
  25747. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .mask = 16'h0001;
  25748. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .modeMux = 1'b0;
  25749. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .FeedbackMux = 1'b0;
  25750. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .ShiftMux = 1'b0;
  25751. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .BypassEn = 1'b0;
  25752. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~2 .CarryEnb = 1'b1;
  25753. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 (
  25754. .A(vcc),
  25755. .B(\macro_inst|u_uart[0]|u_rx[4]|Selector4~2_combout ),
  25756. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ),
  25757. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  25758. .Cin(),
  25759. .Qin(),
  25760. .Clk(),
  25761. .AsyncReset(),
  25762. .SyncReset(),
  25763. .ShiftData(),
  25764. .SyncLoad(),
  25765. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~3_combout ),
  25766. .Cout(),
  25767. .Q());
  25768. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .coord_x = 5;
  25769. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .coord_y = 2;
  25770. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .coord_z = 8;
  25771. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .mask = 16'h0C00;
  25772. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .modeMux = 1'b0;
  25773. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .FeedbackMux = 1'b0;
  25774. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .ShiftMux = 1'b0;
  25775. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .BypassEn = 1'b0;
  25776. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~3 .CarryEnb = 1'b1;
  25777. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 (
  25778. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ),
  25779. .B(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  25780. .C(\macro_inst|u_uart[0]|u_rx[4]|Selector4~3_combout ),
  25781. .D(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  25782. .Cin(),
  25783. .Qin(),
  25784. .Clk(),
  25785. .AsyncReset(),
  25786. .SyncReset(),
  25787. .ShiftData(),
  25788. .SyncLoad(),
  25789. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~4_combout ),
  25790. .Cout(),
  25791. .Q());
  25792. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .coord_x = 5;
  25793. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .coord_y = 2;
  25794. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .coord_z = 11;
  25795. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .mask = 16'hA8F5;
  25796. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .modeMux = 1'b0;
  25797. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .FeedbackMux = 1'b0;
  25798. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .ShiftMux = 1'b0;
  25799. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .BypassEn = 1'b0;
  25800. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~4 .CarryEnb = 1'b1;
  25801. alta_slice \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 (
  25802. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  25803. .B(\macro_inst|u_uart[0]|u_rx[4]|Selector4~1_combout ),
  25804. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  25805. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector4~4_combout ),
  25806. .Cin(),
  25807. .Qin(),
  25808. .Clk(),
  25809. .AsyncReset(),
  25810. .SyncReset(),
  25811. .ShiftData(),
  25812. .SyncLoad(),
  25813. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector4~5_combout ),
  25814. .Cout(),
  25815. .Q());
  25816. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .coord_x = 5;
  25817. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .coord_y = 2;
  25818. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .coord_z = 15;
  25819. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .mask = 16'hCDCC;
  25820. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .modeMux = 1'b0;
  25821. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .FeedbackMux = 1'b0;
  25822. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .ShiftMux = 1'b0;
  25823. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .BypassEn = 1'b0;
  25824. defparam \macro_inst|u_uart[0]|u_rx[4]|Selector4~5 .CarryEnb = 1'b1;
  25825. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always11~2 (
  25826. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  25827. .B(\macro_inst|u_uart[0]|u_rx[4]|always11~1_combout ),
  25828. .C(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  25829. .D(\macro_inst|u_uart[0]|u_rx[4]|always11~0_combout ),
  25830. .Cin(),
  25831. .Qin(),
  25832. .Clk(),
  25833. .AsyncReset(),
  25834. .SyncReset(),
  25835. .ShiftData(),
  25836. .SyncLoad(),
  25837. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always11~2_combout ),
  25838. .Cout(),
  25839. .Q());
  25840. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .coord_x = 4;
  25841. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .coord_y = 2;
  25842. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .coord_z = 14;
  25843. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .mask = 16'h0800;
  25844. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .modeMux = 1'b0;
  25845. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .FeedbackMux = 1'b0;
  25846. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .ShiftMux = 1'b0;
  25847. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .BypassEn = 1'b0;
  25848. defparam \macro_inst|u_uart[0]|u_rx[4]|always11~2 .CarryEnb = 1'b1;
  25849. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always2~0 (
  25850. .A(vcc),
  25851. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3]),
  25852. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0]),
  25853. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  25854. .Cin(),
  25855. .Qin(),
  25856. .Clk(),
  25857. .AsyncReset(),
  25858. .SyncReset(),
  25859. .ShiftData(),
  25860. .SyncLoad(),
  25861. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  25862. .Cout(),
  25863. .Q());
  25864. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .coord_x = 4;
  25865. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .coord_y = 2;
  25866. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .coord_z = 9;
  25867. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .mask = 16'hC000;
  25868. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .modeMux = 1'b0;
  25869. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .FeedbackMux = 1'b0;
  25870. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .ShiftMux = 1'b0;
  25871. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .BypassEn = 1'b0;
  25872. defparam \macro_inst|u_uart[0]|u_rx[4]|always2~0 .CarryEnb = 1'b1;
  25873. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always3~1 (
  25874. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2]),
  25875. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]),
  25876. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]),
  25877. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3]),
  25878. .Cin(),
  25879. .Qin(),
  25880. .Clk(),
  25881. .AsyncReset(),
  25882. .SyncReset(),
  25883. .ShiftData(),
  25884. .SyncLoad(),
  25885. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  25886. .Cout(),
  25887. .Q());
  25888. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .coord_x = 1;
  25889. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .coord_y = 4;
  25890. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .coord_z = 5;
  25891. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .mask = 16'h0001;
  25892. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .modeMux = 1'b0;
  25893. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .FeedbackMux = 1'b0;
  25894. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .ShiftMux = 1'b0;
  25895. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .BypassEn = 1'b0;
  25896. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~1 .CarryEnb = 1'b1;
  25897. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always3~2 (
  25898. .A(vcc),
  25899. .B(vcc),
  25900. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  25901. .D(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  25902. .Cin(),
  25903. .Qin(),
  25904. .Clk(),
  25905. .AsyncReset(),
  25906. .SyncReset(),
  25907. .ShiftData(),
  25908. .SyncLoad(),
  25909. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always3~2_combout ),
  25910. .Cout(),
  25911. .Q());
  25912. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .coord_x = 5;
  25913. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .coord_y = 2;
  25914. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .coord_z = 4;
  25915. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .mask = 16'hF000;
  25916. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .modeMux = 1'b0;
  25917. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .FeedbackMux = 1'b0;
  25918. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .ShiftMux = 1'b0;
  25919. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .BypassEn = 1'b0;
  25920. defparam \macro_inst|u_uart[0]|u_rx[4]|always3~2 .CarryEnb = 1'b1;
  25921. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always4~2 (
  25922. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  25923. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  25924. .C(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  25925. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  25926. .Cin(),
  25927. .Qin(),
  25928. .Clk(),
  25929. .AsyncReset(),
  25930. .SyncReset(),
  25931. .ShiftData(),
  25932. .SyncLoad(),
  25933. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always4~2_combout ),
  25934. .Cout(),
  25935. .Q());
  25936. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .coord_x = 2;
  25937. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .coord_y = 2;
  25938. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .coord_z = 3;
  25939. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .mask = 16'h1000;
  25940. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .modeMux = 1'b0;
  25941. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .FeedbackMux = 1'b0;
  25942. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .ShiftMux = 1'b0;
  25943. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .BypassEn = 1'b0;
  25944. defparam \macro_inst|u_uart[0]|u_rx[4]|always4~2 .CarryEnb = 1'b1;
  25945. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always6~1 (
  25946. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_in [4]),
  25947. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_in [2]),
  25948. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_in [3]),
  25949. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ),
  25950. .Cin(),
  25951. .Qin(),
  25952. .Clk(),
  25953. .AsyncReset(),
  25954. .SyncReset(),
  25955. .ShiftData(),
  25956. .SyncLoad(),
  25957. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout ),
  25958. .Cout(),
  25959. .Q());
  25960. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .coord_x = 3;
  25961. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .coord_y = 2;
  25962. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .coord_z = 2;
  25963. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .mask = 16'h00D4;
  25964. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .modeMux = 1'b0;
  25965. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .FeedbackMux = 1'b0;
  25966. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .ShiftMux = 1'b0;
  25967. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .BypassEn = 1'b0;
  25968. defparam \macro_inst|u_uart[0]|u_rx[4]|always6~1 .CarryEnb = 1'b1;
  25969. alta_slice \macro_inst|u_uart[0]|u_rx[4]|always8~0 (
  25970. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~q ),
  25971. .B(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  25972. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ),
  25973. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  25974. .Cin(),
  25975. .Qin(),
  25976. .Clk(),
  25977. .AsyncReset(),
  25978. .SyncReset(),
  25979. .ShiftData(),
  25980. .SyncLoad(),
  25981. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always8~0_combout ),
  25982. .Cout(),
  25983. .Q());
  25984. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .coord_x = 5;
  25985. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .coord_y = 2;
  25986. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .coord_z = 7;
  25987. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .mask = 16'h0800;
  25988. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .modeMux = 1'b0;
  25989. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .FeedbackMux = 1'b0;
  25990. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .ShiftMux = 1'b0;
  25991. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .BypassEn = 1'b0;
  25992. defparam \macro_inst|u_uart[0]|u_rx[4]|always8~0 .CarryEnb = 1'b1;
  25993. alta_slice \macro_inst|u_uart[0]|u_rx[4]|break_error (
  25994. .A(\macro_inst|u_uart[0]|u_rx[4]|always11~2_combout ),
  25995. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  25996. .C(vcc),
  25997. .D(vcc),
  25998. .Cin(),
  25999. .Qin(\macro_inst|u_uart[0]|u_rx[4]|break_error~q ),
  26000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26002. .SyncReset(),
  26003. .ShiftData(),
  26004. .SyncLoad(),
  26005. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|break_error~0_combout ),
  26006. .Cout(),
  26007. .Q(\macro_inst|u_uart[0]|u_rx[4]|break_error~q ));
  26008. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .coord_x = 4;
  26009. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .coord_y = 2;
  26010. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .coord_z = 12;
  26011. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .mask = 16'hEAEA;
  26012. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .modeMux = 1'b0;
  26013. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .FeedbackMux = 1'b1;
  26014. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .ShiftMux = 1'b0;
  26015. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .BypassEn = 1'b0;
  26016. defparam \macro_inst|u_uart[0]|u_rx[4]|break_error .CarryEnb = 1'b1;
  26017. alta_slice \macro_inst|u_uart[0]|u_rx[4]|framing_error (
  26018. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  26019. .B(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  26020. .C(vcc),
  26021. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  26022. .Cin(),
  26023. .Qin(\macro_inst|u_uart[0]|u_rx[4]|framing_error~q ),
  26024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  26025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  26026. .SyncReset(),
  26027. .ShiftData(),
  26028. .SyncLoad(),
  26029. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|framing_error~0_combout ),
  26030. .Cout(),
  26031. .Q(\macro_inst|u_uart[0]|u_rx[4]|framing_error~q ));
  26032. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .coord_x = 16;
  26033. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .coord_y = 1;
  26034. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .coord_z = 3;
  26035. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .mask = 16'hB3A0;
  26036. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .modeMux = 1'b0;
  26037. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .FeedbackMux = 1'b1;
  26038. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .ShiftMux = 1'b0;
  26039. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .BypassEn = 1'b0;
  26040. defparam \macro_inst|u_uart[0]|u_rx[4]|framing_error .CarryEnb = 1'b1;
  26041. alta_slice \macro_inst|u_uart[0]|u_rx[4]|overrun_error (
  26042. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  26043. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  26044. .C(vcc),
  26045. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  26046. .Cin(),
  26047. .Qin(\macro_inst|u_uart[0]|u_rx[4]|overrun_error~q ),
  26048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  26049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  26050. .SyncReset(),
  26051. .ShiftData(),
  26052. .SyncLoad(),
  26053. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|overrun_error~0_combout ),
  26054. .Cout(),
  26055. .Q(\macro_inst|u_uart[0]|u_rx[4]|overrun_error~q ));
  26056. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .coord_x = 16;
  26057. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .coord_y = 1;
  26058. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .coord_z = 0;
  26059. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .mask = 16'hECA0;
  26060. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .modeMux = 1'b0;
  26061. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .FeedbackMux = 1'b1;
  26062. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .ShiftMux = 1'b0;
  26063. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .BypassEn = 1'b0;
  26064. defparam \macro_inst|u_uart[0]|u_rx[4]|overrun_error .CarryEnb = 1'b1;
  26065. alta_slice \macro_inst|u_uart[0]|u_rx[4]|parity_error (
  26066. .A(\macro_inst|u_uart[0]|u_rx[4]|parity_error~0_combout ),
  26067. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  26068. .C(vcc),
  26069. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_sample~0_combout ),
  26070. .Cin(),
  26071. .Qin(\macro_inst|u_uart[0]|u_rx[4]|parity_error~q ),
  26072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  26073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  26074. .SyncReset(),
  26075. .ShiftData(),
  26076. .SyncLoad(),
  26077. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|parity_error~1_combout ),
  26078. .Cout(),
  26079. .Q(\macro_inst|u_uart[0]|u_rx[4]|parity_error~q ));
  26080. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .coord_x = 16;
  26081. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .coord_y = 1;
  26082. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .coord_z = 9;
  26083. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .mask = 16'hEAC0;
  26084. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .modeMux = 1'b0;
  26085. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .FeedbackMux = 1'b1;
  26086. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .ShiftMux = 1'b0;
  26087. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .BypassEn = 1'b0;
  26088. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error .CarryEnb = 1'b1;
  26089. alta_slice \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 (
  26090. .A(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  26091. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~q ),
  26092. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  26093. .D(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  26094. .Cin(),
  26095. .Qin(),
  26096. .Clk(),
  26097. .AsyncReset(),
  26098. .SyncReset(),
  26099. .ShiftData(),
  26100. .SyncLoad(),
  26101. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|parity_error~0_combout ),
  26102. .Cout(),
  26103. .Q());
  26104. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .coord_x = 7;
  26105. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .coord_y = 2;
  26106. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .coord_z = 0;
  26107. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .mask = 16'h6000;
  26108. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .modeMux = 1'b0;
  26109. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .FeedbackMux = 1'b0;
  26110. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .ShiftMux = 1'b0;
  26111. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .BypassEn = 1'b0;
  26112. defparam \macro_inst|u_uart[0]|u_rx[4]|parity_error~0 .CarryEnb = 1'b1;
  26113. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] (
  26114. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  26115. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0]),
  26116. .C(\~GND~combout ),
  26117. .D(vcc),
  26118. .Cin(),
  26119. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0]),
  26120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26122. .SyncReset(SyncReset_X45_Y2_GND),
  26123. .ShiftData(),
  26124. .SyncLoad(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ),
  26125. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0]~4_combout ),
  26126. .Cout(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0]~5 ),
  26127. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [0]));
  26128. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .coord_x = 4;
  26129. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .coord_y = 2;
  26130. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .coord_z = 0;
  26131. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .mask = 16'h6688;
  26132. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .modeMux = 1'b0;
  26133. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  26134. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  26135. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .BypassEn = 1'b1;
  26136. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  26137. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] (
  26138. .A(vcc),
  26139. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  26140. .C(vcc),
  26141. .D(vcc),
  26142. .Cin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[0]~5 ),
  26143. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  26144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26146. .SyncReset(SyncReset_X45_Y2_GND),
  26147. .ShiftData(),
  26148. .SyncLoad(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ),
  26149. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1]~6_combout ),
  26150. .Cout(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1]~7 ),
  26151. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]));
  26152. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .coord_x = 4;
  26153. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .coord_y = 2;
  26154. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .coord_z = 1;
  26155. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .mask = 16'h3C3F;
  26156. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .modeMux = 1'b1;
  26157. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  26158. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  26159. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .BypassEn = 1'b1;
  26160. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  26161. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] (
  26162. .A(vcc),
  26163. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  26164. .C(\~GND~combout ),
  26165. .D(vcc),
  26166. .Cin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[1]~7 ),
  26167. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  26168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26170. .SyncReset(SyncReset_X45_Y2_GND),
  26171. .ShiftData(),
  26172. .SyncLoad(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ),
  26173. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2]~8_combout ),
  26174. .Cout(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2]~9 ),
  26175. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]));
  26176. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .coord_x = 4;
  26177. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .coord_y = 2;
  26178. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .coord_z = 2;
  26179. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .mask = 16'hC30C;
  26180. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .modeMux = 1'b1;
  26181. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  26182. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  26183. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .BypassEn = 1'b1;
  26184. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  26185. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] (
  26186. .A(vcc),
  26187. .B(vcc),
  26188. .C(\~GND~combout ),
  26189. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3]),
  26190. .Cin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[2]~9 ),
  26191. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3]),
  26192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26194. .SyncReset(SyncReset_X45_Y2_GND),
  26195. .ShiftData(),
  26196. .SyncLoad(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ),
  26197. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3]~10_combout ),
  26198. .Cout(),
  26199. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [3]));
  26200. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .coord_x = 4;
  26201. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .coord_y = 2;
  26202. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .coord_z = 3;
  26203. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .mask = 16'h0FF0;
  26204. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .modeMux = 1'b1;
  26205. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  26206. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  26207. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .BypassEn = 1'b1;
  26208. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  26209. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_bit (
  26210. .A(vcc),
  26211. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  26212. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  26213. .D(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  26214. .Cin(),
  26215. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  26216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  26218. .SyncReset(),
  26219. .ShiftData(),
  26220. .SyncLoad(),
  26221. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always2~1_combout ),
  26222. .Cout(),
  26223. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ));
  26224. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .coord_x = 4;
  26225. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .coord_y = 2;
  26226. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .coord_z = 4;
  26227. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .mask = 16'hC000;
  26228. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .modeMux = 1'b0;
  26229. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .FeedbackMux = 1'b0;
  26230. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .ShiftMux = 1'b0;
  26231. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .BypassEn = 1'b0;
  26232. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_bit .CarryEnb = 1'b1;
  26233. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] (
  26234. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26235. .B(\macro_inst|u_uart[0]|u_rx[4]|always3~2_combout ),
  26236. .C(vcc),
  26237. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  26238. .Cin(),
  26239. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]),
  26240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout_X49_Y4_SIG_SIG ),
  26241. .AsyncReset(AsyncReset_X49_Y4_GND),
  26242. .SyncReset(),
  26243. .ShiftData(),
  26244. .SyncLoad(),
  26245. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~4_combout ),
  26246. .Cout(),
  26247. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [0]));
  26248. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .coord_x = 1;
  26249. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .coord_y = 4;
  26250. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .coord_z = 9;
  26251. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .mask = 16'hABAF;
  26252. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .modeMux = 1'b0;
  26253. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  26254. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .ShiftMux = 1'b0;
  26255. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .BypassEn = 1'b0;
  26256. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0] .CarryEnb = 1'b1;
  26257. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 (
  26258. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  26259. .B(vcc),
  26260. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26261. .D(vcc),
  26262. .Cin(),
  26263. .Qin(),
  26264. .Clk(),
  26265. .AsyncReset(),
  26266. .SyncReset(),
  26267. .ShiftData(),
  26268. .SyncLoad(),
  26269. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout ),
  26270. .Cout(),
  26271. .Q());
  26272. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .coord_x = 1;
  26273. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .coord_y = 4;
  26274. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .coord_z = 11;
  26275. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .mask = 16'hFAFA;
  26276. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .modeMux = 1'b0;
  26277. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .FeedbackMux = 1'b0;
  26278. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .ShiftMux = 1'b0;
  26279. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .BypassEn = 1'b0;
  26280. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3 .CarryEnb = 1'b1;
  26281. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] (
  26282. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26283. .B(\macro_inst|u_uart[0]|u_rx[4]|Add4~2_combout ),
  26284. .C(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  26285. .D(\macro_inst|u_uart[0]|u_rx[4]|always3~2_combout ),
  26286. .Cin(),
  26287. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]),
  26288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout_X49_Y4_SIG_SIG ),
  26289. .AsyncReset(AsyncReset_X49_Y4_GND),
  26290. .SyncReset(),
  26291. .ShiftData(),
  26292. .SyncLoad(),
  26293. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~5_combout ),
  26294. .Cout(),
  26295. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [1]));
  26296. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .coord_x = 1;
  26297. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .coord_y = 4;
  26298. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .coord_z = 14;
  26299. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .mask = 16'hFABB;
  26300. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .modeMux = 1'b0;
  26301. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  26302. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .ShiftMux = 1'b0;
  26303. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .BypassEn = 1'b0;
  26304. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[1] .CarryEnb = 1'b1;
  26305. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] (
  26306. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  26307. .B(\macro_inst|u_uart[0]|u_rx[4]|Add4~1_combout ),
  26308. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26309. .D(\macro_inst|u_uart[0]|u_rx[4]|always3~1_combout ),
  26310. .Cin(),
  26311. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2]),
  26312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[0]~3_combout_X49_Y4_SIG_SIG ),
  26313. .AsyncReset(AsyncReset_X49_Y4_GND),
  26314. .SyncReset(),
  26315. .ShiftData(),
  26316. .SyncLoad(),
  26317. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~2_combout ),
  26318. .Cout(),
  26319. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [2]));
  26320. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .coord_x = 1;
  26321. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .coord_y = 4;
  26322. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .coord_z = 2;
  26323. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .mask = 16'hF1F3;
  26324. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .modeMux = 1'b0;
  26325. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  26326. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .ShiftMux = 1'b0;
  26327. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .BypassEn = 1'b0;
  26328. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[2] .CarryEnb = 1'b1;
  26329. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] (
  26330. .A(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [0]),
  26331. .B(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [2]),
  26332. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1_combout ),
  26333. .D(\macro_inst|u_uart[0]|u_rx[1]|rx_data_cnt [1]),
  26334. .Cin(),
  26335. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3]),
  26336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y4_SIG_VCC ),
  26337. .AsyncReset(AsyncReset_X48_Y4_GND),
  26338. .SyncReset(SyncReset_X48_Y4_GND),
  26339. .ShiftData(),
  26340. .SyncLoad(SyncLoad_X48_Y4_VCC),
  26341. .LutOut(\macro_inst|u_uart[0]|u_rx[1]|Add4~1_combout ),
  26342. .Cout(),
  26343. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3]));
  26344. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .coord_x = 1;
  26345. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .coord_y = 3;
  26346. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .coord_z = 9;
  26347. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .mask = 16'h3366;
  26348. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .modeMux = 1'b0;
  26349. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .FeedbackMux = 1'b0;
  26350. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .ShiftMux = 1'b0;
  26351. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .BypassEn = 1'b1;
  26352. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt[3] .CarryEnb = 1'b1;
  26353. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 (
  26354. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26355. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt [3]),
  26356. .C(\macro_inst|u_uart[0]|u_rx[4]|Add4~0_combout ),
  26357. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  26358. .Cin(),
  26359. .Qin(),
  26360. .Clk(),
  26361. .AsyncReset(),
  26362. .SyncReset(),
  26363. .ShiftData(),
  26364. .SyncLoad(),
  26365. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1_combout ),
  26366. .Cout(),
  26367. .Q());
  26368. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .coord_x = 1;
  26369. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .coord_y = 4;
  26370. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .coord_z = 1;
  26371. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .mask = 16'h0544;
  26372. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .modeMux = 1'b0;
  26373. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .FeedbackMux = 1'b0;
  26374. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .ShiftMux = 1'b0;
  26375. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .BypassEn = 1'b0;
  26376. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_data_cnt~1 .CarryEnb = 1'b1;
  26377. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] (
  26378. .A(vcc),
  26379. .B(\macro_inst|u_uart[0]|u_regs|rx_read [4]),
  26380. .C(vcc),
  26381. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector2~1_combout ),
  26382. .Cin(),
  26383. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  26384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  26385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ),
  26386. .SyncReset(),
  26387. .ShiftData(),
  26388. .SyncLoad(),
  26389. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter~0_combout ),
  26390. .Cout(),
  26391. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]));
  26392. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .coord_x = 16;
  26393. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .coord_y = 12;
  26394. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .coord_z = 7;
  26395. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .mask = 16'h3F30;
  26396. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .modeMux = 1'b0;
  26397. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  26398. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  26399. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .BypassEn = 1'b0;
  26400. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  26401. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] (
  26402. .A(\macro_inst|u_ahb2apb|paddr [8]),
  26403. .B(vcc),
  26404. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [0]),
  26405. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~q ),
  26406. .Cin(),
  26407. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0]~q ),
  26408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26409. .AsyncReset(AsyncReset_X44_Y2_GND),
  26410. .SyncReset(SyncReset_X44_Y2_GND),
  26411. .ShiftData(),
  26412. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26413. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux0~2_combout ),
  26414. .Cout(),
  26415. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0]~q ));
  26416. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .coord_x = 3;
  26417. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .coord_y = 2;
  26418. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .coord_z = 4;
  26419. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .mask = 16'hFA50;
  26420. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  26421. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  26422. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  26423. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  26424. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  26425. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] (
  26426. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [0]),
  26427. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2]),
  26428. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [1]),
  26429. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3]),
  26430. .Cin(),
  26431. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1]~q ),
  26432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26433. .AsyncReset(AsyncReset_X44_Y2_GND),
  26434. .SyncReset(SyncReset_X44_Y2_GND),
  26435. .ShiftData(),
  26436. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26437. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always11~1_combout ),
  26438. .Cout(),
  26439. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1]~q ));
  26440. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .coord_x = 3;
  26441. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .coord_y = 2;
  26442. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .coord_z = 15;
  26443. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .mask = 16'h0001;
  26444. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  26445. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  26446. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  26447. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  26448. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  26449. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] (
  26450. .A(\macro_inst|u_ahb2apb|paddr [8]),
  26451. .B(vcc),
  26452. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2]),
  26453. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~q ),
  26454. .Cin(),
  26455. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2]~q ),
  26456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26457. .AsyncReset(AsyncReset_X44_Y2_GND),
  26458. .SyncReset(SyncReset_X44_Y2_GND),
  26459. .ShiftData(),
  26460. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26461. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux2~2_combout ),
  26462. .Cout(),
  26463. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2]~q ));
  26464. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .coord_x = 3;
  26465. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .coord_y = 2;
  26466. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .coord_z = 10;
  26467. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .mask = 16'hFA50;
  26468. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  26469. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  26470. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  26471. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  26472. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  26473. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] (
  26474. .A(vcc),
  26475. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3]~q ),
  26476. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3]),
  26477. .D(\macro_inst|u_ahb2apb|paddr [8]),
  26478. .Cin(),
  26479. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3]~q ),
  26480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26481. .AsyncReset(AsyncReset_X44_Y2_GND),
  26482. .SyncReset(SyncReset_X44_Y2_GND),
  26483. .ShiftData(),
  26484. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26485. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux3~2_combout ),
  26486. .Cout(),
  26487. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3]~q ));
  26488. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .coord_x = 3;
  26489. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .coord_y = 2;
  26490. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .coord_z = 5;
  26491. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .mask = 16'hCCF0;
  26492. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  26493. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  26494. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  26495. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  26496. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  26497. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] (
  26498. .A(vcc),
  26499. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4]~q ),
  26500. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4]),
  26501. .D(\macro_inst|u_ahb2apb|paddr [8]),
  26502. .Cin(),
  26503. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4]~q ),
  26504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26505. .AsyncReset(AsyncReset_X44_Y2_GND),
  26506. .SyncReset(SyncReset_X44_Y2_GND),
  26507. .ShiftData(),
  26508. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26509. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux4~2_combout ),
  26510. .Cout(),
  26511. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4]~q ));
  26512. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .coord_x = 3;
  26513. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .coord_y = 2;
  26514. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .coord_z = 8;
  26515. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .mask = 16'hCCF0;
  26516. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  26517. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  26518. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  26519. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  26520. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  26521. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] (
  26522. .A(vcc),
  26523. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~q ),
  26524. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5]),
  26525. .D(\macro_inst|u_ahb2apb|paddr [8]),
  26526. .Cin(),
  26527. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5]~q ),
  26528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26529. .AsyncReset(AsyncReset_X44_Y2_GND),
  26530. .SyncReset(SyncReset_X44_Y2_GND),
  26531. .ShiftData(),
  26532. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26533. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux5~2_combout ),
  26534. .Cout(),
  26535. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5]~q ));
  26536. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .coord_x = 3;
  26537. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .coord_y = 2;
  26538. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .coord_z = 12;
  26539. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .mask = 16'hCCF0;
  26540. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  26541. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  26542. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  26543. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  26544. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  26545. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] (
  26546. .A(vcc),
  26547. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~q ),
  26548. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6]),
  26549. .D(\macro_inst|u_ahb2apb|paddr [8]),
  26550. .Cin(),
  26551. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6]~q ),
  26552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26553. .AsyncReset(AsyncReset_X44_Y2_GND),
  26554. .SyncReset(SyncReset_X44_Y2_GND),
  26555. .ShiftData(),
  26556. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26557. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux6~2_combout ),
  26558. .Cout(),
  26559. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6]~q ));
  26560. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .coord_x = 3;
  26561. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .coord_y = 2;
  26562. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .coord_z = 1;
  26563. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .mask = 16'hCCF0;
  26564. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  26565. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  26566. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  26567. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  26568. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  26569. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] (
  26570. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6]),
  26571. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5]),
  26572. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7]),
  26573. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4]),
  26574. .Cin(),
  26575. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7]~q ),
  26576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  26577. .AsyncReset(AsyncReset_X44_Y2_GND),
  26578. .SyncReset(SyncReset_X44_Y2_GND),
  26579. .ShiftData(),
  26580. .SyncLoad(SyncLoad_X44_Y2_VCC),
  26581. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|always11~0_combout ),
  26582. .Cout(),
  26583. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7]~q ));
  26584. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .coord_x = 3;
  26585. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .coord_y = 2;
  26586. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .coord_z = 11;
  26587. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .mask = 16'h0001;
  26588. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  26589. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  26590. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  26591. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  26592. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  26593. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 (
  26594. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  26595. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_sample~0_combout ),
  26596. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ),
  26597. .D(\macro_inst|u_uart[0]|u_rx[4]|always2~0_combout ),
  26598. .Cin(),
  26599. .Qin(),
  26600. .Clk(),
  26601. .AsyncReset(),
  26602. .SyncReset(),
  26603. .ShiftData(),
  26604. .SyncLoad(),
  26605. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0_combout ),
  26606. .Cout(),
  26607. .Q());
  26608. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .coord_x = 4;
  26609. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .coord_y = 2;
  26610. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .coord_z = 11;
  26611. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .mask = 16'h4000;
  26612. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  26613. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  26614. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  26615. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  26616. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  26617. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_idle (
  26618. .A(\macro_inst|u_uart[0]|u_rx[4]|always8~0_combout ),
  26619. .B(vcc),
  26620. .C(vcc),
  26621. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  26622. .Cin(),
  26623. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_idle~q ),
  26624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  26625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  26626. .SyncReset(),
  26627. .ShiftData(),
  26628. .SyncLoad(),
  26629. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_idle~0_combout ),
  26630. .Cout(),
  26631. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_idle~q ));
  26632. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .coord_x = 15;
  26633. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .coord_y = 2;
  26634. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .coord_z = 14;
  26635. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .mask = 16'hFAAA;
  26636. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .modeMux = 1'b0;
  26637. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .FeedbackMux = 1'b1;
  26638. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .ShiftMux = 1'b0;
  26639. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .BypassEn = 1'b0;
  26640. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle .CarryEnb = 1'b1;
  26641. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en (
  26642. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|counter [0]),
  26643. .B(vcc),
  26644. .C(vcc),
  26645. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  26646. .Cin(),
  26647. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~q ),
  26648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y2_SIG_VCC ),
  26649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y2_SIG ),
  26650. .SyncReset(),
  26651. .ShiftData(),
  26652. .SyncLoad(),
  26653. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~0_combout ),
  26654. .Cout(),
  26655. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_idle_en~q ));
  26656. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .coord_x = 14;
  26657. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .coord_y = 4;
  26658. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .coord_z = 12;
  26659. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .mask = 16'hFAAA;
  26660. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .modeMux = 1'b0;
  26661. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .FeedbackMux = 1'b1;
  26662. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .ShiftMux = 1'b0;
  26663. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .BypassEn = 1'b0;
  26664. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_idle_en .CarryEnb = 1'b1;
  26665. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] (
  26666. .A(vcc),
  26667. .B(vcc),
  26668. .C(\SIM_IO[4]~input_o ),
  26669. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  26670. .Cin(),
  26671. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_in [0]),
  26672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X62_Y2_SIG_SIG ),
  26673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  26674. .SyncReset(),
  26675. .ShiftData(),
  26676. .SyncLoad(),
  26677. .LutOut(\macro_inst|uart_rxd [4]),
  26678. .Cout(),
  26679. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_in [0]));
  26680. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .coord_x = 11;
  26681. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .coord_y = 2;
  26682. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .coord_z = 9;
  26683. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .mask = 16'h000F;
  26684. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .modeMux = 1'b0;
  26685. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .FeedbackMux = 1'b0;
  26686. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .ShiftMux = 1'b0;
  26687. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .BypassEn = 1'b0;
  26688. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[0] .CarryEnb = 1'b1;
  26689. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] (
  26690. .A(vcc),
  26691. .B(vcc),
  26692. .C(vcc),
  26693. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_in [0]),
  26694. .Cin(),
  26695. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_in [1]),
  26696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X62_Y2_SIG_SIG ),
  26697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  26698. .SyncReset(),
  26699. .ShiftData(),
  26700. .SyncLoad(),
  26701. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_in[1]~feeder_combout ),
  26702. .Cout(),
  26703. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_in [1]));
  26704. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .coord_x = 11;
  26705. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .coord_y = 2;
  26706. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .coord_z = 11;
  26707. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .mask = 16'hFF00;
  26708. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .modeMux = 1'b0;
  26709. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .FeedbackMux = 1'b0;
  26710. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .ShiftMux = 1'b0;
  26711. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .BypassEn = 1'b0;
  26712. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[1] .CarryEnb = 1'b1;
  26713. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] (
  26714. .A(vcc),
  26715. .B(vcc),
  26716. .C(vcc),
  26717. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_in [1]),
  26718. .Cin(),
  26719. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_in [2]),
  26720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X43_Y2_SIG_SIG ),
  26721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26722. .SyncReset(),
  26723. .ShiftData(),
  26724. .SyncLoad(),
  26725. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_in[2]~feeder_combout ),
  26726. .Cout(),
  26727. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_in [2]));
  26728. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .coord_x = 2;
  26729. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .coord_y = 2;
  26730. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .coord_z = 1;
  26731. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .mask = 16'hFF00;
  26732. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .modeMux = 1'b0;
  26733. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .FeedbackMux = 1'b0;
  26734. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .ShiftMux = 1'b0;
  26735. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .BypassEn = 1'b0;
  26736. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[2] .CarryEnb = 1'b1;
  26737. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] (
  26738. .A(vcc),
  26739. .B(vcc),
  26740. .C(vcc),
  26741. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_in [2]),
  26742. .Cin(),
  26743. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_in [3]),
  26744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X43_Y2_SIG_SIG ),
  26745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26746. .SyncReset(),
  26747. .ShiftData(),
  26748. .SyncLoad(),
  26749. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_in[3]~feeder_combout ),
  26750. .Cout(),
  26751. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_in [3]));
  26752. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .coord_x = 2;
  26753. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .coord_y = 2;
  26754. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .coord_z = 2;
  26755. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .mask = 16'hFF00;
  26756. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .modeMux = 1'b0;
  26757. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .FeedbackMux = 1'b0;
  26758. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .ShiftMux = 1'b0;
  26759. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .BypassEn = 1'b0;
  26760. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[3] .CarryEnb = 1'b1;
  26761. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] (
  26762. .A(vcc),
  26763. .B(vcc),
  26764. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_in [3]),
  26765. .D(vcc),
  26766. .Cin(),
  26767. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_in [4]),
  26768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X43_Y2_SIG_SIG ),
  26769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26770. .SyncReset(),
  26771. .ShiftData(),
  26772. .SyncLoad(),
  26773. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_in[4]~0_combout ),
  26774. .Cout(),
  26775. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_in [4]));
  26776. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .coord_x = 2;
  26777. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .coord_y = 2;
  26778. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .coord_z = 7;
  26779. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .mask = 16'h0F0F;
  26780. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .modeMux = 1'b0;
  26781. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .FeedbackMux = 1'b0;
  26782. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .ShiftMux = 1'b0;
  26783. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .BypassEn = 1'b0;
  26784. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_in[4] .CarryEnb = 1'b1;
  26785. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_parity (
  26786. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~0_combout ),
  26787. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  26788. .C(vcc),
  26789. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  26790. .Cin(),
  26791. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~q ),
  26792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  26793. .AsyncReset(AsyncReset_X45_Y2_GND),
  26794. .SyncReset(),
  26795. .ShiftData(),
  26796. .SyncLoad(),
  26797. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~1_combout ),
  26798. .Cout(),
  26799. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~q ));
  26800. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .coord_x = 4;
  26801. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .coord_y = 2;
  26802. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .coord_z = 5;
  26803. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .mask = 16'h12DE;
  26804. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .modeMux = 1'b0;
  26805. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .FeedbackMux = 1'b1;
  26806. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .ShiftMux = 1'b0;
  26807. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .BypassEn = 1'b0;
  26808. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity .CarryEnb = 1'b1;
  26809. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 (
  26810. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7]),
  26811. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  26812. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  26813. .D(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  26814. .Cin(),
  26815. .Qin(),
  26816. .Clk(),
  26817. .AsyncReset(),
  26818. .SyncReset(),
  26819. .ShiftData(),
  26820. .SyncLoad(),
  26821. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_parity~0_combout ),
  26822. .Cout(),
  26823. .Q());
  26824. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .coord_x = 7;
  26825. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .coord_y = 2;
  26826. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .coord_z = 12;
  26827. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .mask = 16'h0080;
  26828. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .modeMux = 1'b0;
  26829. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .FeedbackMux = 1'b0;
  26830. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .ShiftMux = 1'b0;
  26831. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .BypassEn = 1'b0;
  26832. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_parity~0 .CarryEnb = 1'b1;
  26833. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 (
  26834. .A(vcc),
  26835. .B(vcc),
  26836. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [2]),
  26837. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_baud_cnt [1]),
  26838. .Cin(),
  26839. .Qin(),
  26840. .Clk(),
  26841. .AsyncReset(),
  26842. .SyncReset(),
  26843. .ShiftData(),
  26844. .SyncLoad(),
  26845. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_sample~0_combout ),
  26846. .Cout(),
  26847. .Q());
  26848. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .coord_x = 4;
  26849. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .coord_y = 2;
  26850. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .coord_z = 15;
  26851. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .mask = 16'h000F;
  26852. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .modeMux = 1'b0;
  26853. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .FeedbackMux = 1'b0;
  26854. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .ShiftMux = 1'b0;
  26855. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .BypassEn = 1'b0;
  26856. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_sample~0 .CarryEnb = 1'b1;
  26857. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] (
  26858. .A(),
  26859. .B(),
  26860. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [1]),
  26861. .D(),
  26862. .Cin(),
  26863. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [0]),
  26864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26866. .SyncReset(SyncReset_X43_Y2_GND),
  26867. .ShiftData(),
  26868. .SyncLoad(SyncLoad_X43_Y2_VCC),
  26869. .LutOut(),
  26870. .Cout(),
  26871. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [0]));
  26872. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .coord_x = 2;
  26873. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .coord_y = 2;
  26874. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .coord_z = 11;
  26875. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .mask = 16'hFFFF;
  26876. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .modeMux = 1'b1;
  26877. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  26878. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .ShiftMux = 1'b0;
  26879. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .BypassEn = 1'b1;
  26880. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[0] .CarryEnb = 1'b1;
  26881. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] (
  26882. .A(vcc),
  26883. .B(vcc),
  26884. .C(vcc),
  26885. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2]),
  26886. .Cin(),
  26887. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [1]),
  26888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26890. .SyncReset(),
  26891. .ShiftData(),
  26892. .SyncLoad(),
  26893. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1]~feeder_combout ),
  26894. .Cout(),
  26895. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [1]));
  26896. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .coord_x = 2;
  26897. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .coord_y = 2;
  26898. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .coord_z = 4;
  26899. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .mask = 16'hFF00;
  26900. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .modeMux = 1'b0;
  26901. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  26902. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .ShiftMux = 1'b0;
  26903. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .BypassEn = 1'b0;
  26904. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[1] .CarryEnb = 1'b1;
  26905. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] (
  26906. .A(vcc),
  26907. .B(vcc),
  26908. .C(vcc),
  26909. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3]),
  26910. .Cin(),
  26911. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2]),
  26912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26914. .SyncReset(),
  26915. .ShiftData(),
  26916. .SyncLoad(),
  26917. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2]~feeder_combout ),
  26918. .Cout(),
  26919. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [2]));
  26920. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .coord_x = 2;
  26921. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .coord_y = 2;
  26922. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .coord_z = 15;
  26923. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .mask = 16'hFF00;
  26924. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .modeMux = 1'b0;
  26925. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  26926. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .ShiftMux = 1'b0;
  26927. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .BypassEn = 1'b0;
  26928. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[2] .CarryEnb = 1'b1;
  26929. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] (
  26930. .A(),
  26931. .B(),
  26932. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4]),
  26933. .D(),
  26934. .Cin(),
  26935. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3]),
  26936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26938. .SyncReset(SyncReset_X43_Y2_GND),
  26939. .ShiftData(),
  26940. .SyncLoad(SyncLoad_X43_Y2_VCC),
  26941. .LutOut(),
  26942. .Cout(),
  26943. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [3]));
  26944. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .coord_x = 2;
  26945. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .coord_y = 2;
  26946. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .coord_z = 14;
  26947. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .mask = 16'hFFFF;
  26948. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .modeMux = 1'b1;
  26949. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  26950. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .ShiftMux = 1'b0;
  26951. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .BypassEn = 1'b1;
  26952. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[3] .CarryEnb = 1'b1;
  26953. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] (
  26954. .A(vcc),
  26955. .B(vcc),
  26956. .C(vcc),
  26957. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5]),
  26958. .Cin(),
  26959. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4]),
  26960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26962. .SyncReset(),
  26963. .ShiftData(),
  26964. .SyncLoad(),
  26965. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4]~feeder_combout ),
  26966. .Cout(),
  26967. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [4]));
  26968. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .coord_x = 2;
  26969. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .coord_y = 2;
  26970. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .coord_z = 10;
  26971. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .mask = 16'hFF00;
  26972. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .modeMux = 1'b0;
  26973. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  26974. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .ShiftMux = 1'b0;
  26975. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .BypassEn = 1'b0;
  26976. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[4] .CarryEnb = 1'b1;
  26977. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] (
  26978. .A(vcc),
  26979. .B(vcc),
  26980. .C(vcc),
  26981. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6]),
  26982. .Cin(),
  26983. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5]),
  26984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  26985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  26986. .SyncReset(),
  26987. .ShiftData(),
  26988. .SyncLoad(),
  26989. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5]~feeder_combout ),
  26990. .Cout(),
  26991. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [5]));
  26992. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .coord_x = 2;
  26993. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .coord_y = 2;
  26994. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .coord_z = 5;
  26995. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .mask = 16'hFF00;
  26996. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .modeMux = 1'b0;
  26997. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  26998. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .ShiftMux = 1'b0;
  26999. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .BypassEn = 1'b0;
  27000. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[5] .CarryEnb = 1'b1;
  27001. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] (
  27002. .A(vcc),
  27003. .B(vcc),
  27004. .C(vcc),
  27005. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7]),
  27006. .Cin(),
  27007. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6]),
  27008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  27009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  27010. .SyncReset(),
  27011. .ShiftData(),
  27012. .SyncLoad(),
  27013. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6]~feeder_combout ),
  27014. .Cout(),
  27015. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [6]));
  27016. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .coord_x = 2;
  27017. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .coord_y = 2;
  27018. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .coord_z = 9;
  27019. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .mask = 16'hFF00;
  27020. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .modeMux = 1'b0;
  27021. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  27022. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .ShiftMux = 1'b0;
  27023. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .BypassEn = 1'b0;
  27024. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[6] .CarryEnb = 1'b1;
  27025. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] (
  27026. .A(vcc),
  27027. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_in [4]),
  27028. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_in [3]),
  27029. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_in [2]),
  27030. .Cin(),
  27031. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7]),
  27032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[4]|always4~2_combout_X43_Y2_SIG_SIG ),
  27033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y2_SIG ),
  27034. .SyncReset(),
  27035. .ShiftData(),
  27036. .SyncLoad(),
  27037. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  27038. .Cout(),
  27039. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg [7]));
  27040. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .coord_x = 2;
  27041. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .coord_y = 2;
  27042. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .coord_z = 13;
  27043. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .mask = 16'h0CCF;
  27044. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .modeMux = 1'b0;
  27045. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  27046. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .ShiftMux = 1'b0;
  27047. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .BypassEn = 1'b0;
  27048. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_shift_reg[7] .CarryEnb = 1'b1;
  27049. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA (
  27050. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector2~3_combout ),
  27051. .B(\macro_inst|u_uart[0]|u_rx[4]|Selector2~5_combout ),
  27052. .C(\macro_inst|u_uart[0]|u_rx[4]|Selector2~2_combout ),
  27053. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  27054. .Cin(),
  27055. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ),
  27056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y3_SIG_VCC ),
  27057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y3_SIG ),
  27058. .SyncReset(),
  27059. .ShiftData(),
  27060. .SyncLoad(),
  27061. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector2~6_combout ),
  27062. .Cout(),
  27063. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA~q ));
  27064. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .coord_x = 5;
  27065. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .coord_y = 2;
  27066. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .coord_z = 14;
  27067. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .mask = 16'h0E0C;
  27068. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .modeMux = 1'b0;
  27069. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  27070. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .ShiftMux = 1'b0;
  27071. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .BypassEn = 1'b0;
  27072. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_DATA .CarryEnb = 1'b1;
  27073. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE (
  27074. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector2~2_combout ),
  27075. .B(vcc),
  27076. .C(vcc),
  27077. .D(\macro_inst|u_uart[0]|u_rx[4]|Add1~0_combout ),
  27078. .Cin(),
  27079. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ),
  27080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  27081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  27082. .SyncReset(),
  27083. .ShiftData(),
  27084. .SyncLoad(),
  27085. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector0~0_combout ),
  27086. .Cout(),
  27087. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE~q ));
  27088. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .coord_x = 4;
  27089. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .coord_y = 2;
  27090. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .coord_z = 13;
  27091. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .mask = 16'h5055;
  27092. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .modeMux = 1'b0;
  27093. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  27094. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  27095. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .BypassEn = 1'b0;
  27096. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  27097. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY (
  27098. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector4~0_combout ),
  27099. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0_combout ),
  27100. .C(vcc),
  27101. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector4~5_combout ),
  27102. .Cin(),
  27103. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  27104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y3_SIG_VCC ),
  27105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y3_SIG ),
  27106. .SyncReset(),
  27107. .ShiftData(),
  27108. .SyncLoad(),
  27109. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~1_combout ),
  27110. .Cout(),
  27111. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ));
  27112. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .coord_x = 5;
  27113. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .coord_y = 2;
  27114. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .coord_z = 12;
  27115. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .mask = 16'h88F8;
  27116. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .modeMux = 1'b0;
  27117. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  27118. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  27119. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .BypassEn = 1'b0;
  27120. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  27121. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 (
  27122. .A(vcc),
  27123. .B(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  27124. .C(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  27125. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  27126. .Cin(),
  27127. .Qin(),
  27128. .Clk(),
  27129. .AsyncReset(),
  27130. .SyncReset(),
  27131. .ShiftData(),
  27132. .SyncLoad(),
  27133. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0_combout ),
  27134. .Cout(),
  27135. .Q());
  27136. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .coord_x = 5;
  27137. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .coord_y = 2;
  27138. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .coord_z = 3;
  27139. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .mask = 16'h0CCC;
  27140. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  27141. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  27142. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  27143. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  27144. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  27145. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START (
  27146. .A(\macro_inst|u_uart[0]|u_rx[4]|Selector2~2_combout ),
  27147. .B(\macro_inst|u_uart[0]|u_rx[4]|Selector2~4_combout ),
  27148. .C(vcc),
  27149. .D(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout ),
  27150. .Cin(),
  27151. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ),
  27152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y2_SIG_VCC ),
  27153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y2_SIG ),
  27154. .SyncReset(),
  27155. .ShiftData(),
  27156. .SyncLoad(),
  27157. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|Selector1~0_combout ),
  27158. .Cout(),
  27159. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START~q ));
  27160. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .coord_x = 4;
  27161. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .coord_y = 2;
  27162. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .coord_z = 7;
  27163. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .mask = 16'h5510;
  27164. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .modeMux = 1'b0;
  27165. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .FeedbackMux = 1'b1;
  27166. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .ShiftMux = 1'b0;
  27167. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .BypassEn = 1'b0;
  27168. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_START .CarryEnb = 1'b1;
  27169. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP (
  27170. .A(vcc),
  27171. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0_combout ),
  27172. .C(vcc),
  27173. .D(\macro_inst|u_uart[0]|u_rx[4]|Selector4~5_combout ),
  27174. .Cin(),
  27175. .Qin(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ),
  27176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X48_Y3_SIG_VCC ),
  27177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y3_SIG ),
  27178. .SyncReset(),
  27179. .ShiftData(),
  27180. .SyncLoad(),
  27181. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~1_combout ),
  27182. .Cout(),
  27183. .Q(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~q ));
  27184. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .coord_x = 5;
  27185. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .coord_y = 2;
  27186. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .coord_z = 10;
  27187. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .mask = 16'hCCF0;
  27188. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .modeMux = 1'b0;
  27189. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  27190. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .ShiftMux = 1'b0;
  27191. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .BypassEn = 1'b0;
  27192. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP .CarryEnb = 1'b1;
  27193. alta_slice \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 (
  27194. .A(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_PARITY~q ),
  27195. .B(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  27196. .C(\macro_inst|u_uart[0]|u_rx[4]|Selector4~0_combout ),
  27197. .D(\macro_inst|u_uart[0]|u_rx[4]|rx_bit~q ),
  27198. .Cin(),
  27199. .Qin(),
  27200. .Clk(),
  27201. .AsyncReset(),
  27202. .SyncReset(),
  27203. .ShiftData(),
  27204. .SyncLoad(),
  27205. .LutOut(\macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0_combout ),
  27206. .Cout(),
  27207. .Q());
  27208. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .coord_x = 5;
  27209. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .coord_y = 2;
  27210. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .coord_z = 9;
  27211. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .mask = 16'hBA30;
  27212. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  27213. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  27214. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  27215. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  27216. defparam \macro_inst|u_uart[0]|u_rx[4]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  27217. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Add4~0 (
  27218. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]),
  27219. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [3]),
  27220. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]),
  27221. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2]),
  27222. .Cin(),
  27223. .Qin(),
  27224. .Clk(),
  27225. .AsyncReset(),
  27226. .SyncReset(),
  27227. .ShiftData(),
  27228. .SyncLoad(),
  27229. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add4~0_combout ),
  27230. .Cout(),
  27231. .Q());
  27232. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .coord_x = 1;
  27233. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .coord_y = 1;
  27234. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .coord_z = 6;
  27235. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .mask = 16'h3336;
  27236. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .modeMux = 1'b0;
  27237. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .FeedbackMux = 1'b0;
  27238. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .ShiftMux = 1'b0;
  27239. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .BypassEn = 1'b0;
  27240. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~0 .CarryEnb = 1'b1;
  27241. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Add4~1 (
  27242. .A(vcc),
  27243. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2]),
  27244. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]),
  27245. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]),
  27246. .Cin(),
  27247. .Qin(),
  27248. .Clk(),
  27249. .AsyncReset(),
  27250. .SyncReset(),
  27251. .ShiftData(),
  27252. .SyncLoad(),
  27253. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add4~1_combout ),
  27254. .Cout(),
  27255. .Q());
  27256. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .coord_x = 1;
  27257. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .coord_y = 1;
  27258. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .coord_z = 2;
  27259. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .mask = 16'h333C;
  27260. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .modeMux = 1'b0;
  27261. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .FeedbackMux = 1'b0;
  27262. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .ShiftMux = 1'b0;
  27263. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .BypassEn = 1'b0;
  27264. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~1 .CarryEnb = 1'b1;
  27265. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Add4~2 (
  27266. .A(vcc),
  27267. .B(vcc),
  27268. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]),
  27269. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]),
  27270. .Cin(),
  27271. .Qin(),
  27272. .Clk(),
  27273. .AsyncReset(),
  27274. .SyncReset(),
  27275. .ShiftData(),
  27276. .SyncLoad(),
  27277. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add4~2_combout ),
  27278. .Cout(),
  27279. .Q());
  27280. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .coord_x = 1;
  27281. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .coord_y = 1;
  27282. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .coord_z = 3;
  27283. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .mask = 16'h0FF0;
  27284. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .modeMux = 1'b0;
  27285. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .FeedbackMux = 1'b0;
  27286. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .ShiftMux = 1'b0;
  27287. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .BypassEn = 1'b0;
  27288. defparam \macro_inst|u_uart[0]|u_rx[5]|Add4~2 .CarryEnb = 1'b1;
  27289. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 (
  27290. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ),
  27291. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27292. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27293. .D(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  27294. .Cin(),
  27295. .Qin(),
  27296. .Clk(),
  27297. .AsyncReset(),
  27298. .SyncReset(),
  27299. .ShiftData(),
  27300. .SyncLoad(),
  27301. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  27302. .Cout(),
  27303. .Q());
  27304. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .coord_x = 3;
  27305. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .coord_y = 1;
  27306. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .coord_z = 6;
  27307. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .mask = 16'h0200;
  27308. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .modeMux = 1'b0;
  27309. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .FeedbackMux = 1'b0;
  27310. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .ShiftMux = 1'b0;
  27311. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .BypassEn = 1'b0;
  27312. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~1 .CarryEnb = 1'b1;
  27313. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 (
  27314. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_sample~0_combout ),
  27315. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ),
  27316. .C(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27317. .D(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  27318. .Cin(),
  27319. .Qin(),
  27320. .Clk(),
  27321. .AsyncReset(),
  27322. .SyncReset(),
  27323. .ShiftData(),
  27324. .SyncLoad(),
  27325. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector0~2_combout ),
  27326. .Cout(),
  27327. .Q());
  27328. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .coord_x = 3;
  27329. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .coord_y = 1;
  27330. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .coord_z = 13;
  27331. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .mask = 16'h8000;
  27332. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .modeMux = 1'b0;
  27333. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .FeedbackMux = 1'b0;
  27334. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .ShiftMux = 1'b0;
  27335. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .BypassEn = 1'b0;
  27336. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~2 .CarryEnb = 1'b1;
  27337. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 (
  27338. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector2~0_combout ),
  27339. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  27340. .C(\macro_inst|u_uart[0]|u_rx[5]|always3~2_combout ),
  27341. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  27342. .Cin(),
  27343. .Qin(),
  27344. .Clk(),
  27345. .AsyncReset(),
  27346. .SyncReset(),
  27347. .ShiftData(),
  27348. .SyncLoad(),
  27349. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector0~4_combout ),
  27350. .Cout(),
  27351. .Q());
  27352. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .coord_x = 2;
  27353. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .coord_y = 1;
  27354. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .coord_z = 2;
  27355. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .mask = 16'hFE00;
  27356. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .modeMux = 1'b0;
  27357. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .FeedbackMux = 1'b0;
  27358. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .ShiftMux = 1'b0;
  27359. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .BypassEn = 1'b0;
  27360. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector0~4 .CarryEnb = 1'b1;
  27361. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 (
  27362. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector0~4_combout ),
  27363. .B(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27364. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ),
  27365. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  27366. .Cin(),
  27367. .Qin(),
  27368. .Clk(),
  27369. .AsyncReset(),
  27370. .SyncReset(),
  27371. .ShiftData(),
  27372. .SyncLoad(),
  27373. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector2~1_combout ),
  27374. .Cout(),
  27375. .Q());
  27376. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .coord_x = 2;
  27377. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .coord_y = 1;
  27378. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .coord_z = 11;
  27379. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .mask = 16'h5400;
  27380. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .modeMux = 1'b0;
  27381. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .FeedbackMux = 1'b0;
  27382. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .ShiftMux = 1'b0;
  27383. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .BypassEn = 1'b0;
  27384. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector2~1 .CarryEnb = 1'b1;
  27385. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 (
  27386. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0]),
  27387. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3]),
  27388. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27389. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27390. .Cin(),
  27391. .Qin(),
  27392. .Clk(),
  27393. .AsyncReset(),
  27394. .SyncReset(),
  27395. .ShiftData(),
  27396. .SyncLoad(),
  27397. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~2_combout ),
  27398. .Cout(),
  27399. .Q());
  27400. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .coord_x = 1;
  27401. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .coord_y = 1;
  27402. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .coord_z = 9;
  27403. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .mask = 16'h0001;
  27404. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .modeMux = 1'b0;
  27405. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .FeedbackMux = 1'b0;
  27406. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .ShiftMux = 1'b0;
  27407. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .BypassEn = 1'b0;
  27408. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~2 .CarryEnb = 1'b1;
  27409. alta_slice \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 (
  27410. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector4~0_combout ),
  27411. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector4~5_combout ),
  27412. .C(\macro_inst|u_uart[0]|u_rx[5]|Selector4~1_combout ),
  27413. .D(\macro_inst|u_uart[0]|u_rx[5]|Selector4~4_combout ),
  27414. .Cin(),
  27415. .Qin(),
  27416. .Clk(),
  27417. .AsyncReset(),
  27418. .SyncReset(),
  27419. .ShiftData(),
  27420. .SyncLoad(),
  27421. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~6_combout ),
  27422. .Cout(),
  27423. .Q());
  27424. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .coord_x = 2;
  27425. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .coord_y = 1;
  27426. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .coord_z = 13;
  27427. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .mask = 16'hFEFA;
  27428. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .modeMux = 1'b0;
  27429. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .FeedbackMux = 1'b0;
  27430. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .ShiftMux = 1'b0;
  27431. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .BypassEn = 1'b0;
  27432. defparam \macro_inst|u_uart[0]|u_rx[5]|Selector4~6 .CarryEnb = 1'b1;
  27433. alta_slice \macro_inst|u_uart[0]|u_rx[5]|always11~2 (
  27434. .A(\macro_inst|u_uart[0]|u_rx[5]|always11~0_combout ),
  27435. .B(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27436. .C(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  27437. .D(\macro_inst|u_uart[0]|u_rx[5]|always11~1_combout ),
  27438. .Cin(),
  27439. .Qin(),
  27440. .Clk(),
  27441. .AsyncReset(),
  27442. .SyncReset(),
  27443. .ShiftData(),
  27444. .SyncLoad(),
  27445. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always11~2_combout ),
  27446. .Cout(),
  27447. .Q());
  27448. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .coord_x = 3;
  27449. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .coord_y = 1;
  27450. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .coord_z = 1;
  27451. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .mask = 16'h2000;
  27452. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .modeMux = 1'b0;
  27453. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .FeedbackMux = 1'b0;
  27454. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .ShiftMux = 1'b0;
  27455. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .BypassEn = 1'b0;
  27456. defparam \macro_inst|u_uart[0]|u_rx[5]|always11~2 .CarryEnb = 1'b1;
  27457. alta_slice \macro_inst|u_uart[0]|u_rx[5]|always3~1 (
  27458. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [3]),
  27459. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2]),
  27460. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]),
  27461. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]),
  27462. .Cin(),
  27463. .Qin(),
  27464. .Clk(),
  27465. .AsyncReset(),
  27466. .SyncReset(),
  27467. .ShiftData(),
  27468. .SyncLoad(),
  27469. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  27470. .Cout(),
  27471. .Q());
  27472. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .coord_x = 1;
  27473. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .coord_y = 1;
  27474. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .coord_z = 10;
  27475. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .mask = 16'h0001;
  27476. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .modeMux = 1'b0;
  27477. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .FeedbackMux = 1'b0;
  27478. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .ShiftMux = 1'b0;
  27479. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .BypassEn = 1'b0;
  27480. defparam \macro_inst|u_uart[0]|u_rx[5]|always3~1 .CarryEnb = 1'b1;
  27481. alta_slice \macro_inst|u_uart[0]|u_rx[5]|always4~2 (
  27482. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  27483. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27484. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27485. .D(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  27486. .Cin(),
  27487. .Qin(),
  27488. .Clk(),
  27489. .AsyncReset(),
  27490. .SyncReset(),
  27491. .ShiftData(),
  27492. .SyncLoad(),
  27493. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always4~2_combout ),
  27494. .Cout(),
  27495. .Q());
  27496. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .coord_x = 1;
  27497. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .coord_y = 1;
  27498. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .coord_z = 1;
  27499. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .mask = 16'h0200;
  27500. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .modeMux = 1'b0;
  27501. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .FeedbackMux = 1'b0;
  27502. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .ShiftMux = 1'b0;
  27503. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .BypassEn = 1'b0;
  27504. defparam \macro_inst|u_uart[0]|u_rx[5]|always4~2 .CarryEnb = 1'b1;
  27505. alta_slice \macro_inst|u_uart[0]|u_rx[5]|always6~1 (
  27506. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_in [4]),
  27507. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_in [2]),
  27508. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_in [3]),
  27509. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ),
  27510. .Cin(),
  27511. .Qin(),
  27512. .Clk(),
  27513. .AsyncReset(),
  27514. .SyncReset(),
  27515. .ShiftData(),
  27516. .SyncLoad(),
  27517. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout ),
  27518. .Cout(),
  27519. .Q());
  27520. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .coord_x = 3;
  27521. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .coord_y = 1;
  27522. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .coord_z = 5;
  27523. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .mask = 16'h00D4;
  27524. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .modeMux = 1'b0;
  27525. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .FeedbackMux = 1'b0;
  27526. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .ShiftMux = 1'b0;
  27527. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .BypassEn = 1'b0;
  27528. defparam \macro_inst|u_uart[0]|u_rx[5]|always6~1 .CarryEnb = 1'b1;
  27529. alta_slice \macro_inst|u_uart[0]|u_rx[5]|always8~0 (
  27530. .A(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  27531. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  27532. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~q ),
  27533. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ),
  27534. .Cin(),
  27535. .Qin(),
  27536. .Clk(),
  27537. .AsyncReset(),
  27538. .SyncReset(),
  27539. .ShiftData(),
  27540. .SyncLoad(),
  27541. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always8~0_combout ),
  27542. .Cout(),
  27543. .Q());
  27544. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .coord_x = 2;
  27545. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .coord_y = 1;
  27546. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .coord_z = 9;
  27547. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .mask = 16'h0080;
  27548. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .modeMux = 1'b0;
  27549. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .FeedbackMux = 1'b0;
  27550. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .ShiftMux = 1'b0;
  27551. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .BypassEn = 1'b0;
  27552. defparam \macro_inst|u_uart[0]|u_rx[5]|always8~0 .CarryEnb = 1'b1;
  27553. alta_slice \macro_inst|u_uart[0]|u_rx[5]|break_error (
  27554. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  27555. .B(\macro_inst|u_uart[0]|u_rx[5]|always11~2_combout ),
  27556. .C(vcc),
  27557. .D(vcc),
  27558. .Cin(),
  27559. .Qin(\macro_inst|u_uart[0]|u_rx[5]|break_error~q ),
  27560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  27561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  27562. .SyncReset(),
  27563. .ShiftData(),
  27564. .SyncLoad(),
  27565. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|break_error~0_combout ),
  27566. .Cout(),
  27567. .Q(\macro_inst|u_uart[0]|u_rx[5]|break_error~q ));
  27568. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .coord_x = 16;
  27569. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .coord_y = 2;
  27570. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .coord_z = 7;
  27571. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .mask = 16'hDCDC;
  27572. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .modeMux = 1'b0;
  27573. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .FeedbackMux = 1'b1;
  27574. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .ShiftMux = 1'b0;
  27575. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .BypassEn = 1'b0;
  27576. defparam \macro_inst|u_uart[0]|u_rx[5]|break_error .CarryEnb = 1'b1;
  27577. alta_slice \macro_inst|u_uart[0]|u_rx[5]|framing_error (
  27578. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  27579. .B(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27580. .C(vcc),
  27581. .D(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  27582. .Cin(),
  27583. .Qin(\macro_inst|u_uart[0]|u_rx[5]|framing_error~q ),
  27584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  27585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  27586. .SyncReset(),
  27587. .ShiftData(),
  27588. .SyncLoad(),
  27589. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|framing_error~0_combout ),
  27590. .Cout(),
  27591. .Q(\macro_inst|u_uart[0]|u_rx[5]|framing_error~q ));
  27592. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .coord_x = 16;
  27593. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .coord_y = 2;
  27594. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .coord_z = 6;
  27595. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .mask = 16'h7350;
  27596. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .modeMux = 1'b0;
  27597. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .FeedbackMux = 1'b1;
  27598. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .ShiftMux = 1'b0;
  27599. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .BypassEn = 1'b0;
  27600. defparam \macro_inst|u_uart[0]|u_rx[5]|framing_error .CarryEnb = 1'b1;
  27601. alta_slice \macro_inst|u_uart[0]|u_rx[5]|overrun_error (
  27602. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  27603. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  27604. .C(vcc),
  27605. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  27606. .Cin(),
  27607. .Qin(\macro_inst|u_uart[0]|u_rx[5]|overrun_error~q ),
  27608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  27609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  27610. .SyncReset(),
  27611. .ShiftData(),
  27612. .SyncLoad(),
  27613. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|overrun_error~0_combout ),
  27614. .Cout(),
  27615. .Q(\macro_inst|u_uart[0]|u_rx[5]|overrun_error~q ));
  27616. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .coord_x = 12;
  27617. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .coord_y = 2;
  27618. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .coord_z = 13;
  27619. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .mask = 16'hDC50;
  27620. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .modeMux = 1'b0;
  27621. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .FeedbackMux = 1'b1;
  27622. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .ShiftMux = 1'b0;
  27623. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .BypassEn = 1'b0;
  27624. defparam \macro_inst|u_uart[0]|u_rx[5]|overrun_error .CarryEnb = 1'b1;
  27625. alta_slice \macro_inst|u_uart[0]|u_rx[5]|parity_error (
  27626. .A(\macro_inst|u_uart[0]|u_rx[5]|parity_error~0_combout ),
  27627. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  27628. .C(vcc),
  27629. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_sample~0_combout ),
  27630. .Cin(),
  27631. .Qin(\macro_inst|u_uart[0]|u_rx[5]|parity_error~q ),
  27632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  27633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  27634. .SyncReset(),
  27635. .ShiftData(),
  27636. .SyncLoad(),
  27637. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|parity_error~1_combout ),
  27638. .Cout(),
  27639. .Q(\macro_inst|u_uart[0]|u_rx[5]|parity_error~q ));
  27640. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .coord_x = 16;
  27641. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .coord_y = 2;
  27642. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .coord_z = 15;
  27643. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .mask = 16'hBA30;
  27644. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .modeMux = 1'b0;
  27645. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .FeedbackMux = 1'b1;
  27646. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .ShiftMux = 1'b0;
  27647. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .BypassEn = 1'b0;
  27648. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error .CarryEnb = 1'b1;
  27649. alta_slice \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 (
  27650. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~q ),
  27651. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  27652. .C(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  27653. .D(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27654. .Cin(),
  27655. .Qin(),
  27656. .Clk(),
  27657. .AsyncReset(),
  27658. .SyncReset(),
  27659. .ShiftData(),
  27660. .SyncLoad(),
  27661. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|parity_error~0_combout ),
  27662. .Cout(),
  27663. .Q());
  27664. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .coord_x = 3;
  27665. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .coord_y = 1;
  27666. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .coord_z = 15;
  27667. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .mask = 16'h4080;
  27668. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .modeMux = 1'b0;
  27669. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .FeedbackMux = 1'b0;
  27670. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .ShiftMux = 1'b0;
  27671. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .BypassEn = 1'b0;
  27672. defparam \macro_inst|u_uart[0]|u_rx[5]|parity_error~0 .CarryEnb = 1'b1;
  27673. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] (
  27674. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0]),
  27675. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  27676. .C(\~GND~combout ),
  27677. .D(vcc),
  27678. .Cin(),
  27679. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0]),
  27680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  27682. .SyncReset(SyncReset_X43_Y3_GND),
  27683. .ShiftData(),
  27684. .SyncLoad(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ),
  27685. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0]~4_combout ),
  27686. .Cout(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0]~5 ),
  27687. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0]));
  27688. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .coord_x = 1;
  27689. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .coord_y = 1;
  27690. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .coord_z = 12;
  27691. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .mask = 16'h6688;
  27692. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .modeMux = 1'b0;
  27693. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  27694. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  27695. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .BypassEn = 1'b1;
  27696. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  27697. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] (
  27698. .A(vcc),
  27699. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27700. .C(vcc),
  27701. .D(vcc),
  27702. .Cin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[0]~5 ),
  27703. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  27706. .SyncReset(SyncReset_X43_Y3_GND),
  27707. .ShiftData(),
  27708. .SyncLoad(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ),
  27709. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1]~6_combout ),
  27710. .Cout(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1]~7 ),
  27711. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]));
  27712. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .coord_x = 1;
  27713. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .coord_y = 1;
  27714. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .coord_z = 13;
  27715. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .mask = 16'h3C3F;
  27716. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .modeMux = 1'b1;
  27717. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  27718. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  27719. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .BypassEn = 1'b1;
  27720. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  27721. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] (
  27722. .A(vcc),
  27723. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27724. .C(\~GND~combout ),
  27725. .D(vcc),
  27726. .Cin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[1]~7 ),
  27727. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  27730. .SyncReset(SyncReset_X43_Y3_GND),
  27731. .ShiftData(),
  27732. .SyncLoad(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ),
  27733. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2]~8_combout ),
  27734. .Cout(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2]~9 ),
  27735. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]));
  27736. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .coord_x = 1;
  27737. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .coord_y = 1;
  27738. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .coord_z = 14;
  27739. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .mask = 16'hC30C;
  27740. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .modeMux = 1'b1;
  27741. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  27742. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  27743. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .BypassEn = 1'b1;
  27744. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  27745. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] (
  27746. .A(vcc),
  27747. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3]),
  27748. .C(\~GND~combout ),
  27749. .D(vcc),
  27750. .Cin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[2]~9 ),
  27751. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3]),
  27752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  27754. .SyncReset(SyncReset_X43_Y3_GND),
  27755. .ShiftData(),
  27756. .SyncLoad(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ),
  27757. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3]~10_combout ),
  27758. .Cout(),
  27759. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3]));
  27760. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .coord_x = 1;
  27761. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .coord_y = 1;
  27762. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .coord_z = 15;
  27763. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .mask = 16'h3C3C;
  27764. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .modeMux = 1'b1;
  27765. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  27766. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  27767. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .BypassEn = 1'b1;
  27768. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  27769. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_bit (
  27770. .A(vcc),
  27771. .B(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  27772. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  27773. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  27774. .Cin(),
  27775. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  27776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  27778. .SyncReset(),
  27779. .ShiftData(),
  27780. .SyncLoad(),
  27781. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always2~1_combout ),
  27782. .Cout(),
  27783. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ));
  27784. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .coord_x = 1;
  27785. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .coord_y = 1;
  27786. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .coord_z = 4;
  27787. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .mask = 16'hC000;
  27788. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .modeMux = 1'b0;
  27789. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .FeedbackMux = 1'b0;
  27790. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .ShiftMux = 1'b0;
  27791. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .BypassEn = 1'b0;
  27792. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_bit .CarryEnb = 1'b1;
  27793. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] (
  27794. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  27795. .B(\macro_inst|u_uart[0]|u_rx[5]|always3~2_combout ),
  27796. .C(vcc),
  27797. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  27798. .Cin(),
  27799. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]),
  27800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout_X43_Y3_SIG_SIG ),
  27801. .AsyncReset(AsyncReset_X43_Y3_GND),
  27802. .SyncReset(),
  27803. .ShiftData(),
  27804. .SyncLoad(),
  27805. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~4_combout ),
  27806. .Cout(),
  27807. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [0]));
  27808. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .coord_x = 1;
  27809. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .coord_y = 1;
  27810. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .coord_z = 7;
  27811. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .mask = 16'hABAF;
  27812. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .modeMux = 1'b0;
  27813. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  27814. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .ShiftMux = 1'b0;
  27815. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .BypassEn = 1'b0;
  27816. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0] .CarryEnb = 1'b1;
  27817. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] (
  27818. .A(\macro_inst|u_uart[0]|u_rx[5]|always3~2_combout ),
  27819. .B(\macro_inst|u_uart[0]|u_rx[5]|Add4~2_combout ),
  27820. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  27821. .D(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  27822. .Cin(),
  27823. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]),
  27824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout_X43_Y3_SIG_SIG ),
  27825. .AsyncReset(AsyncReset_X43_Y3_GND),
  27826. .SyncReset(),
  27827. .ShiftData(),
  27828. .SyncLoad(),
  27829. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~5_combout ),
  27830. .Cout(),
  27831. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [1]));
  27832. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .coord_x = 1;
  27833. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .coord_y = 1;
  27834. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .coord_z = 0;
  27835. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .mask = 16'hFBF1;
  27836. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .modeMux = 1'b0;
  27837. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  27838. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .ShiftMux = 1'b0;
  27839. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .BypassEn = 1'b0;
  27840. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[1] .CarryEnb = 1'b1;
  27841. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] (
  27842. .A(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  27843. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  27844. .C(\macro_inst|u_uart[0]|u_rx[5]|Add4~1_combout ),
  27845. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  27846. .Cin(),
  27847. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2]),
  27848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout_X43_Y3_SIG_SIG ),
  27849. .AsyncReset(AsyncReset_X43_Y3_GND),
  27850. .SyncReset(),
  27851. .ShiftData(),
  27852. .SyncLoad(),
  27853. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~2_combout ),
  27854. .Cout(),
  27855. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [2]));
  27856. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .coord_x = 1;
  27857. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .coord_y = 1;
  27858. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .coord_z = 5;
  27859. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .mask = 16'hCDCF;
  27860. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .modeMux = 1'b0;
  27861. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  27862. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .ShiftMux = 1'b0;
  27863. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .BypassEn = 1'b0;
  27864. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[2] .CarryEnb = 1'b1;
  27865. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] (
  27866. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  27867. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  27868. .C(vcc),
  27869. .D(\macro_inst|u_uart[0]|u_rx[5]|Add4~0_combout ),
  27870. .Cin(),
  27871. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [3]),
  27872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  27873. .AsyncReset(AsyncReset_X43_Y3_GND),
  27874. .SyncReset(),
  27875. .ShiftData(),
  27876. .SyncLoad(),
  27877. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt~1_combout ),
  27878. .Cout(),
  27879. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt [3]));
  27880. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .coord_x = 1;
  27881. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .coord_y = 1;
  27882. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .coord_z = 11;
  27883. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .mask = 16'h1032;
  27884. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .modeMux = 1'b0;
  27885. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  27886. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .ShiftMux = 1'b0;
  27887. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .BypassEn = 1'b0;
  27888. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[3] .CarryEnb = 1'b1;
  27889. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] (
  27890. .A(vcc),
  27891. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  27892. .C(vcc),
  27893. .D(\macro_inst|u_uart[0]|u_regs|rx_read [5]),
  27894. .Cin(),
  27895. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  27896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  27897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  27898. .SyncReset(),
  27899. .ShiftData(),
  27900. .SyncLoad(),
  27901. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter~0_combout ),
  27902. .Cout(),
  27903. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]));
  27904. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .coord_x = 12;
  27905. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .coord_y = 2;
  27906. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .coord_z = 3;
  27907. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .mask = 16'h0CFC;
  27908. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .modeMux = 1'b0;
  27909. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  27910. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  27911. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .BypassEn = 1'b0;
  27912. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  27913. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] (
  27914. .A(vcc),
  27915. .B(vcc),
  27916. .C(vcc),
  27917. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [0]),
  27918. .Cin(),
  27919. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~q ),
  27920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  27921. .AsyncReset(AsyncReset_X44_Y2_GND),
  27922. .SyncReset(),
  27923. .ShiftData(),
  27924. .SyncLoad(),
  27925. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~feeder_combout ),
  27926. .Cout(),
  27927. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0]~q ));
  27928. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .coord_x = 3;
  27929. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .coord_y = 2;
  27930. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .coord_z = 9;
  27931. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .mask = 16'hFF00;
  27932. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  27933. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  27934. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  27935. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .BypassEn = 1'b0;
  27936. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  27937. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] (
  27938. .A(vcc),
  27939. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][1]~q ),
  27940. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1]),
  27941. .D(\macro_inst|u_ahb2apb|paddr [8]),
  27942. .Cin(),
  27943. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1]~q ),
  27944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  27945. .AsyncReset(AsyncReset_X44_Y2_GND),
  27946. .SyncReset(SyncReset_X44_Y2_GND),
  27947. .ShiftData(),
  27948. .SyncLoad(SyncLoad_X44_Y2_VCC),
  27949. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux1~2_combout ),
  27950. .Cout(),
  27951. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1]~q ));
  27952. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .coord_x = 3;
  27953. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .coord_y = 2;
  27954. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .coord_z = 6;
  27955. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .mask = 16'hF0CC;
  27956. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  27957. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  27958. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  27959. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  27960. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  27961. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] (
  27962. .A(vcc),
  27963. .B(vcc),
  27964. .C(vcc),
  27965. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2]),
  27966. .Cin(),
  27967. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~q ),
  27968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  27969. .AsyncReset(AsyncReset_X44_Y2_GND),
  27970. .SyncReset(),
  27971. .ShiftData(),
  27972. .SyncLoad(),
  27973. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~feeder_combout ),
  27974. .Cout(),
  27975. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2]~q ));
  27976. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .coord_x = 3;
  27977. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .coord_y = 2;
  27978. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .coord_z = 3;
  27979. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .mask = 16'hFF00;
  27980. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  27981. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  27982. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  27983. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .BypassEn = 1'b0;
  27984. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  27985. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] (
  27986. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_in [3]),
  27987. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_in [2]),
  27988. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3]),
  27989. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_in [4]),
  27990. .Cin(),
  27991. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3]~q ),
  27992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y3_SIG_SIG ),
  27993. .AsyncReset(AsyncReset_X44_Y3_GND),
  27994. .SyncReset(SyncReset_X44_Y3_GND),
  27995. .ShiftData(),
  27996. .SyncLoad(SyncLoad_X44_Y3_VCC),
  27997. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  27998. .Cout(),
  27999. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3]~q ));
  28000. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .coord_x = 3;
  28001. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .coord_y = 1;
  28002. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .coord_z = 14;
  28003. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .mask = 16'h7711;
  28004. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  28005. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  28006. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  28007. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  28008. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  28009. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] (
  28010. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [1]),
  28011. .B(vcc),
  28012. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [4]),
  28013. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [2]),
  28014. .Cin(),
  28015. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4]~q ),
  28016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y3_SIG_SIG ),
  28017. .AsyncReset(AsyncReset_X44_Y3_GND),
  28018. .SyncReset(SyncReset_X44_Y3_GND),
  28019. .ShiftData(),
  28020. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28021. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_sample~0_combout ),
  28022. .Cout(),
  28023. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4]~q ));
  28024. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .coord_x = 3;
  28025. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .coord_y = 1;
  28026. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .coord_z = 8;
  28027. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .mask = 16'h0055;
  28028. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  28029. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  28030. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  28031. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  28032. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  28033. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] (
  28034. .A(vcc),
  28035. .B(vcc),
  28036. .C(vcc),
  28037. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5]),
  28038. .Cin(),
  28039. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~q ),
  28040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  28041. .AsyncReset(AsyncReset_X44_Y2_GND),
  28042. .SyncReset(),
  28043. .ShiftData(),
  28044. .SyncLoad(),
  28045. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~feeder_combout ),
  28046. .Cout(),
  28047. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5]~q ));
  28048. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .coord_x = 3;
  28049. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .coord_y = 2;
  28050. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .coord_z = 7;
  28051. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .mask = 16'hFF00;
  28052. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  28053. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  28054. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  28055. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .BypassEn = 1'b0;
  28056. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  28057. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] (
  28058. .A(vcc),
  28059. .B(vcc),
  28060. .C(vcc),
  28061. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6]),
  28062. .Cin(),
  28063. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~q ),
  28064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  28065. .AsyncReset(AsyncReset_X44_Y2_GND),
  28066. .SyncReset(),
  28067. .ShiftData(),
  28068. .SyncLoad(),
  28069. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~feeder_combout ),
  28070. .Cout(),
  28071. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6]~q ));
  28072. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .coord_x = 3;
  28073. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .coord_y = 2;
  28074. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .coord_z = 13;
  28075. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .mask = 16'hFF00;
  28076. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  28077. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  28078. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  28079. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .BypassEn = 1'b0;
  28080. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  28081. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] (
  28082. .A(vcc),
  28083. .B(\macro_inst|u_uart[0]|u_rx[4]|rx_fifo|fifo[1][7]~q ),
  28084. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7]),
  28085. .D(\macro_inst|u_ahb2apb|paddr [8]),
  28086. .Cin(),
  28087. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7]~q ),
  28088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout_X44_Y2_SIG_SIG ),
  28089. .AsyncReset(AsyncReset_X44_Y2_GND),
  28090. .SyncReset(SyncReset_X44_Y2_GND),
  28091. .ShiftData(),
  28092. .SyncLoad(SyncLoad_X44_Y2_VCC),
  28093. .LutOut(\macro_inst|u_uart[0]|u_regs|Mux7~2_combout ),
  28094. .Cout(),
  28095. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7]~q ));
  28096. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .coord_x = 3;
  28097. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .coord_y = 2;
  28098. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .coord_z = 0;
  28099. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .mask = 16'hF0CC;
  28100. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  28101. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  28102. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  28103. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  28104. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  28105. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 (
  28106. .A(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  28107. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_sample~0_combout ),
  28108. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ),
  28109. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  28110. .Cin(),
  28111. .Qin(),
  28112. .Clk(),
  28113. .AsyncReset(),
  28114. .SyncReset(),
  28115. .ShiftData(),
  28116. .SyncLoad(),
  28117. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0_combout ),
  28118. .Cout(),
  28119. .Q());
  28120. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .coord_x = 3;
  28121. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .coord_y = 1;
  28122. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .coord_z = 9;
  28123. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .mask = 16'h0080;
  28124. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  28125. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  28126. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  28127. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  28128. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  28129. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_idle (
  28130. .A(vcc),
  28131. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  28132. .C(vcc),
  28133. .D(\macro_inst|u_uart[0]|u_rx[5]|always8~0_combout ),
  28134. .Cin(),
  28135. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_idle~q ),
  28136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y3_SIG_VCC ),
  28137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  28138. .SyncReset(),
  28139. .ShiftData(),
  28140. .SyncLoad(),
  28141. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_idle~0_combout ),
  28142. .Cout(),
  28143. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_idle~q ));
  28144. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .coord_x = 15;
  28145. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .coord_y = 2;
  28146. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .coord_z = 4;
  28147. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .mask = 16'hFF30;
  28148. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .modeMux = 1'b0;
  28149. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .FeedbackMux = 1'b1;
  28150. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .ShiftMux = 1'b0;
  28151. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .BypassEn = 1'b0;
  28152. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle .CarryEnb = 1'b1;
  28153. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en (
  28154. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  28155. .B(vcc),
  28156. .C(vcc),
  28157. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_fifo|counter [0]),
  28158. .Cin(),
  28159. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~q ),
  28160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  28161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  28162. .SyncReset(),
  28163. .ShiftData(),
  28164. .SyncLoad(),
  28165. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~0_combout ),
  28166. .Cout(),
  28167. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_idle_en~q ));
  28168. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .coord_x = 12;
  28169. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .coord_y = 2;
  28170. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .coord_z = 14;
  28171. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .mask = 16'hFF50;
  28172. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .modeMux = 1'b0;
  28173. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .FeedbackMux = 1'b1;
  28174. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .ShiftMux = 1'b0;
  28175. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .BypassEn = 1'b0;
  28176. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_idle_en .CarryEnb = 1'b1;
  28177. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] (
  28178. .A(vcc),
  28179. .B(vcc),
  28180. .C(\SIM_IO[5]~input_o ),
  28181. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  28182. .Cin(),
  28183. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_in [0]),
  28184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X56_Y1_SIG_SIG ),
  28185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  28186. .SyncReset(),
  28187. .ShiftData(),
  28188. .SyncLoad(),
  28189. .LutOut(\macro_inst|uart_rxd [5]),
  28190. .Cout(),
  28191. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_in [0]));
  28192. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .coord_x = 10;
  28193. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .coord_y = 3;
  28194. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .coord_z = 2;
  28195. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .mask = 16'h000F;
  28196. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .modeMux = 1'b0;
  28197. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .FeedbackMux = 1'b0;
  28198. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .ShiftMux = 1'b0;
  28199. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .BypassEn = 1'b0;
  28200. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[0] .CarryEnb = 1'b1;
  28201. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] (
  28202. .A(\macro_inst|u_uart[0]|u_rx[3]|always3~1_combout ),
  28203. .B(\macro_inst|u_uart[0]|u_rx[3]|rx_bit~q ),
  28204. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_in [0]),
  28205. .D(\macro_inst|u_uart[0]|u_rx[3]|rx_state.UART_DATA~q ),
  28206. .Cin(),
  28207. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_in [1]),
  28208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X48_Y1_SIG_SIG ),
  28209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X48_Y1_SIG ),
  28210. .SyncReset(SyncReset_X48_Y1_GND),
  28211. .ShiftData(),
  28212. .SyncLoad(SyncLoad_X48_Y1_VCC),
  28213. .LutOut(\macro_inst|u_uart[0]|u_rx[3]|Selector4~0_combout ),
  28214. .Cout(),
  28215. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_in [1]));
  28216. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .coord_x = 3;
  28217. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .coord_y = 4;
  28218. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .coord_z = 9;
  28219. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .mask = 16'h8800;
  28220. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .modeMux = 1'b0;
  28221. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .FeedbackMux = 1'b0;
  28222. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .ShiftMux = 1'b0;
  28223. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .BypassEn = 1'b1;
  28224. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[1] .CarryEnb = 1'b1;
  28225. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] (
  28226. .A(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  28227. .B(vcc),
  28228. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_in [1]),
  28229. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  28230. .Cin(),
  28231. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_in [2]),
  28232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  28233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28234. .SyncReset(SyncReset_X45_Y3_GND),
  28235. .ShiftData(),
  28236. .SyncLoad(SyncLoad_X45_Y3_VCC),
  28237. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always3~2_combout ),
  28238. .Cout(),
  28239. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_in [2]));
  28240. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .coord_x = 2;
  28241. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .coord_y = 1;
  28242. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .coord_z = 12;
  28243. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .mask = 16'hAA00;
  28244. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .modeMux = 1'b0;
  28245. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .FeedbackMux = 1'b0;
  28246. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .ShiftMux = 1'b0;
  28247. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .BypassEn = 1'b1;
  28248. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[2] .CarryEnb = 1'b1;
  28249. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] (
  28250. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  28251. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  28252. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_in [2]),
  28253. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28254. .Cin(),
  28255. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_in [3]),
  28256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  28257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28258. .SyncReset(SyncReset_X45_Y3_GND),
  28259. .ShiftData(),
  28260. .SyncLoad(SyncLoad_X45_Y3_VCC),
  28261. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~0_combout ),
  28262. .Cout(),
  28263. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_in [3]));
  28264. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .coord_x = 2;
  28265. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .coord_y = 1;
  28266. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .coord_z = 7;
  28267. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .mask = 16'h22AA;
  28268. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .modeMux = 1'b0;
  28269. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .FeedbackMux = 1'b0;
  28270. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .ShiftMux = 1'b0;
  28271. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .BypassEn = 1'b1;
  28272. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[3] .CarryEnb = 1'b1;
  28273. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] (
  28274. .A(vcc),
  28275. .B(vcc),
  28276. .C(vcc),
  28277. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_in [3]),
  28278. .Cin(),
  28279. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_in [4]),
  28280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_baud|baud16~q_X45_Y3_SIG_SIG ),
  28281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28282. .SyncReset(),
  28283. .ShiftData(),
  28284. .SyncLoad(),
  28285. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_in[4]~0_combout ),
  28286. .Cout(),
  28287. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_in [4]));
  28288. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .coord_x = 2;
  28289. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .coord_y = 1;
  28290. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .coord_z = 6;
  28291. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .mask = 16'h00FF;
  28292. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .modeMux = 1'b0;
  28293. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .FeedbackMux = 1'b0;
  28294. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .ShiftMux = 1'b0;
  28295. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .BypassEn = 1'b0;
  28296. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_in[4] .CarryEnb = 1'b1;
  28297. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_parity (
  28298. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~0_combout ),
  28299. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  28300. .C(vcc),
  28301. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  28302. .Cin(),
  28303. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~q ),
  28304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X44_Y4_SIG_VCC ),
  28305. .AsyncReset(AsyncReset_X44_Y4_GND),
  28306. .SyncReset(),
  28307. .ShiftData(),
  28308. .SyncLoad(),
  28309. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~1_combout ),
  28310. .Cout(),
  28311. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~q ));
  28312. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .coord_x = 1;
  28313. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .coord_y = 2;
  28314. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .coord_z = 5;
  28315. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .mask = 16'h12DE;
  28316. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .modeMux = 1'b0;
  28317. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .FeedbackMux = 1'b1;
  28318. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .ShiftMux = 1'b0;
  28319. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .BypassEn = 1'b0;
  28320. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_parity .CarryEnb = 1'b1;
  28321. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] (
  28322. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2]),
  28323. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1]),
  28324. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1]),
  28325. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3]),
  28326. .Cin(),
  28327. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [0]),
  28328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28330. .SyncReset(SyncReset_X44_Y3_GND),
  28331. .ShiftData(),
  28332. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28333. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always11~1_combout ),
  28334. .Cout(),
  28335. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [0]));
  28336. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .coord_x = 3;
  28337. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .coord_y = 1;
  28338. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .coord_z = 11;
  28339. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .mask = 16'h0001;
  28340. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .modeMux = 1'b0;
  28341. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .FeedbackMux = 1'b1;
  28342. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .ShiftMux = 1'b0;
  28343. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .BypassEn = 1'b1;
  28344. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[0] .CarryEnb = 1'b1;
  28345. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] (
  28346. .A(vcc),
  28347. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  28348. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2]),
  28349. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28350. .Cin(),
  28351. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1]),
  28352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28354. .SyncReset(SyncReset_X44_Y3_GND),
  28355. .ShiftData(),
  28356. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28357. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_data_cnt[0]~3_combout ),
  28358. .Cout(),
  28359. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [1]));
  28360. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .coord_x = 3;
  28361. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .coord_y = 1;
  28362. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .coord_z = 10;
  28363. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .mask = 16'hFFCC;
  28364. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .modeMux = 1'b0;
  28365. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  28366. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .ShiftMux = 1'b0;
  28367. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .BypassEn = 1'b1;
  28368. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[1] .CarryEnb = 1'b1;
  28369. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] (
  28370. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector4~2_combout ),
  28371. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  28372. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3]),
  28373. .D(vcc),
  28374. .Cin(),
  28375. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2]),
  28376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28378. .SyncReset(SyncReset_X44_Y3_GND),
  28379. .ShiftData(),
  28380. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28381. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector2~0_combout ),
  28382. .Cout(),
  28383. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [2]));
  28384. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .coord_x = 3;
  28385. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .coord_y = 1;
  28386. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .coord_z = 0;
  28387. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .mask = 16'h8888;
  28388. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .modeMux = 1'b0;
  28389. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  28390. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .ShiftMux = 1'b0;
  28391. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .BypassEn = 1'b1;
  28392. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[2] .CarryEnb = 1'b1;
  28393. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] (
  28394. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [0]),
  28395. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_baud_cnt [3]),
  28396. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [4]),
  28397. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  28398. .Cin(),
  28399. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3]),
  28400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28402. .SyncReset(SyncReset_X44_Y3_GND),
  28403. .ShiftData(),
  28404. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28405. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always2~0_combout ),
  28406. .Cout(),
  28407. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [3]));
  28408. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .coord_x = 3;
  28409. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .coord_y = 1;
  28410. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .coord_z = 12;
  28411. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .mask = 16'h8800;
  28412. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .modeMux = 1'b0;
  28413. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  28414. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .ShiftMux = 1'b0;
  28415. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .BypassEn = 1'b1;
  28416. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[3] .CarryEnb = 1'b1;
  28417. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] (
  28418. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6]),
  28419. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7]),
  28420. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5]),
  28421. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5]),
  28422. .Cin(),
  28423. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [4]),
  28424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28426. .SyncReset(SyncReset_X44_Y3_GND),
  28427. .ShiftData(),
  28428. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28429. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|always11~0_combout ),
  28430. .Cout(),
  28431. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [4]));
  28432. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .coord_x = 3;
  28433. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .coord_y = 1;
  28434. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .coord_z = 2;
  28435. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .mask = 16'h0001;
  28436. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .modeMux = 1'b0;
  28437. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  28438. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .ShiftMux = 1'b0;
  28439. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .BypassEn = 1'b1;
  28440. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[4] .CarryEnb = 1'b1;
  28441. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] (
  28442. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector4~2_combout ),
  28443. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ),
  28444. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6]),
  28445. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28446. .Cin(),
  28447. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5]),
  28448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28450. .SyncReset(SyncReset_X44_Y3_GND),
  28451. .ShiftData(),
  28452. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28453. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~3_combout ),
  28454. .Cout(),
  28455. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [5]));
  28456. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .coord_x = 3;
  28457. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .coord_y = 1;
  28458. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .coord_z = 3;
  28459. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .mask = 16'h2200;
  28460. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .modeMux = 1'b0;
  28461. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  28462. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .ShiftMux = 1'b0;
  28463. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .BypassEn = 1'b1;
  28464. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[5] .CarryEnb = 1'b1;
  28465. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] (
  28466. .A(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  28467. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28468. .C(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7]),
  28469. .D(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  28470. .Cin(),
  28471. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6]),
  28472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28474. .SyncReset(SyncReset_X44_Y3_GND),
  28475. .ShiftData(),
  28476. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28477. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_parity~0_combout ),
  28478. .Cout(),
  28479. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [6]));
  28480. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .coord_x = 3;
  28481. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .coord_y = 1;
  28482. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .coord_z = 4;
  28483. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .mask = 16'h0080;
  28484. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .modeMux = 1'b0;
  28485. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  28486. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .ShiftMux = 1'b0;
  28487. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .BypassEn = 1'b1;
  28488. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[6] .CarryEnb = 1'b1;
  28489. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] (
  28490. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector0~1_combout ),
  28491. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector4~3_combout ),
  28492. .C(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  28493. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ),
  28494. .Cin(),
  28495. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7]),
  28496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_rx[5]|always4~2_combout_X44_Y3_SIG_SIG ),
  28497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X44_Y3_SIG ),
  28498. .SyncReset(SyncReset_X44_Y3_GND),
  28499. .ShiftData(),
  28500. .SyncLoad(SyncLoad_X44_Y3_VCC),
  28501. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector4~4_combout ),
  28502. .Cout(),
  28503. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg [7]));
  28504. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .coord_x = 3;
  28505. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .coord_y = 1;
  28506. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .coord_z = 7;
  28507. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .mask = 16'hEC0F;
  28508. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .modeMux = 1'b0;
  28509. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  28510. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .ShiftMux = 1'b0;
  28511. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .BypassEn = 1'b1;
  28512. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_shift_reg[7] .CarryEnb = 1'b1;
  28513. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA (
  28514. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector0~2_combout ),
  28515. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector2~1_combout ),
  28516. .C(\macro_inst|u_uart[0]|u_rx[5]|Selector2~0_combout ),
  28517. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28518. .Cin(),
  28519. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  28520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ),
  28521. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28522. .SyncReset(),
  28523. .ShiftData(),
  28524. .SyncLoad(),
  28525. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector2~2_combout ),
  28526. .Cout(),
  28527. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ));
  28528. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .coord_x = 2;
  28529. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .coord_y = 1;
  28530. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .coord_z = 3;
  28531. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .mask = 16'h5444;
  28532. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .modeMux = 1'b0;
  28533. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  28534. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .ShiftMux = 1'b0;
  28535. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .BypassEn = 1'b0;
  28536. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA .CarryEnb = 1'b1;
  28537. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE (
  28538. .A(vcc),
  28539. .B(\macro_inst|u_uart[0]|u_rx[5]|Selector0~2_combout ),
  28540. .C(vcc),
  28541. .D(\macro_inst|u_uart[0]|u_rx[5]|Add1~0_combout ),
  28542. .Cin(),
  28543. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ),
  28544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ),
  28545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28546. .SyncReset(),
  28547. .ShiftData(),
  28548. .SyncLoad(),
  28549. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector0~3_combout ),
  28550. .Cout(),
  28551. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE~q ));
  28552. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .coord_x = 2;
  28553. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .coord_y = 1;
  28554. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .coord_z = 8;
  28555. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .mask = 16'h3033;
  28556. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .modeMux = 1'b0;
  28557. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  28558. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  28559. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .BypassEn = 1'b0;
  28560. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  28561. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY (
  28562. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector4~1_combout ),
  28563. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~0_combout ),
  28564. .C(vcc),
  28565. .D(\macro_inst|u_uart[0]|u_rx[5]|Selector4~6_combout ),
  28566. .Cin(),
  28567. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ),
  28568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ),
  28569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28570. .SyncReset(),
  28571. .ShiftData(),
  28572. .SyncLoad(),
  28573. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~1_combout ),
  28574. .Cout(),
  28575. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY~q ));
  28576. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .coord_x = 2;
  28577. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .coord_y = 1;
  28578. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .coord_z = 1;
  28579. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .mask = 16'h88F8;
  28580. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .modeMux = 1'b0;
  28581. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  28582. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  28583. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .BypassEn = 1'b0;
  28584. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  28585. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START (
  28586. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector0~2_combout ),
  28587. .B(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout ),
  28588. .C(vcc),
  28589. .D(\macro_inst|u_uart[0]|u_rx[5]|Selector0~4_combout ),
  28590. .Cin(),
  28591. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ),
  28592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y3_SIG_VCC ),
  28593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y3_SIG ),
  28594. .SyncReset(),
  28595. .ShiftData(),
  28596. .SyncLoad(),
  28597. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Selector1~0_combout ),
  28598. .Cout(),
  28599. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START~q ));
  28600. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .coord_x = 1;
  28601. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .coord_y = 1;
  28602. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .coord_z = 8;
  28603. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .mask = 16'h4454;
  28604. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .modeMux = 1'b0;
  28605. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .FeedbackMux = 1'b1;
  28606. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .ShiftMux = 1'b0;
  28607. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .BypassEn = 1'b0;
  28608. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_START .CarryEnb = 1'b1;
  28609. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP (
  28610. .A(\macro_inst|u_uart[0]|u_rx[5]|Selector4~0_combout ),
  28611. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0_combout ),
  28612. .C(vcc),
  28613. .D(\macro_inst|u_uart[0]|u_rx[5]|Selector4~6_combout ),
  28614. .Cin(),
  28615. .Qin(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ),
  28616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y3_SIG_VCC ),
  28617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y3_SIG ),
  28618. .SyncReset(),
  28619. .ShiftData(),
  28620. .SyncLoad(),
  28621. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~1_combout ),
  28622. .Cout(),
  28623. .Q(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~q ));
  28624. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .coord_x = 2;
  28625. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .coord_y = 1;
  28626. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .coord_z = 14;
  28627. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .mask = 16'hEEF0;
  28628. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .modeMux = 1'b0;
  28629. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  28630. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .ShiftMux = 1'b0;
  28631. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .BypassEn = 1'b0;
  28632. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP .CarryEnb = 1'b1;
  28633. alta_slice \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 (
  28634. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  28635. .B(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_DATA~q ),
  28636. .C(\macro_inst|u_uart[0]|u_rx[5]|always3~1_combout ),
  28637. .D(\macro_inst|u_uart[0]|u_rx[5]|rx_bit~q ),
  28638. .Cin(),
  28639. .Qin(),
  28640. .Clk(),
  28641. .AsyncReset(),
  28642. .SyncReset(),
  28643. .ShiftData(),
  28644. .SyncLoad(),
  28645. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0_combout ),
  28646. .Cout(),
  28647. .Q());
  28648. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .coord_x = 2;
  28649. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .coord_y = 1;
  28650. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .coord_z = 15;
  28651. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .mask = 16'h4000;
  28652. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  28653. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  28654. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  28655. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  28656. defparam \macro_inst|u_uart[0]|u_rx[5]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  28657. alta_slice \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 (
  28658. .A(vcc),
  28659. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ),
  28660. .C(vcc),
  28661. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  28662. .Cin(),
  28663. .Qin(),
  28664. .Clk(),
  28665. .AsyncReset(),
  28666. .SyncReset(),
  28667. .ShiftData(),
  28668. .SyncLoad(),
  28669. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector3~0_combout ),
  28670. .Cout(),
  28671. .Q());
  28672. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .coord_x = 10;
  28673. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .coord_y = 2;
  28674. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .coord_z = 10;
  28675. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .mask = 16'h00CC;
  28676. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .modeMux = 1'b0;
  28677. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .FeedbackMux = 1'b0;
  28678. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .ShiftMux = 1'b0;
  28679. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .BypassEn = 1'b0;
  28680. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector3~0 .CarryEnb = 1'b1;
  28681. alta_slice \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 (
  28682. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ),
  28683. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  28684. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ),
  28685. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  28686. .Cin(),
  28687. .Qin(),
  28688. .Clk(),
  28689. .AsyncReset(),
  28690. .SyncReset(),
  28691. .ShiftData(),
  28692. .SyncLoad(),
  28693. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector4~0_combout ),
  28694. .Cout(),
  28695. .Q());
  28696. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .coord_x = 10;
  28697. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .coord_y = 2;
  28698. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .coord_z = 14;
  28699. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .mask = 16'hEACC;
  28700. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .modeMux = 1'b0;
  28701. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .FeedbackMux = 1'b0;
  28702. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .ShiftMux = 1'b0;
  28703. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .BypassEn = 1'b0;
  28704. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector4~0 .CarryEnb = 1'b1;
  28705. alta_slice \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 (
  28706. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~q ),
  28707. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ),
  28708. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0]),
  28709. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  28710. .Cin(),
  28711. .Qin(),
  28712. .Clk(),
  28713. .AsyncReset(),
  28714. .SyncReset(),
  28715. .ShiftData(),
  28716. .SyncLoad(),
  28717. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector5~2_combout ),
  28718. .Cout(),
  28719. .Q());
  28720. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .coord_x = 10;
  28721. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .coord_y = 2;
  28722. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .coord_z = 0;
  28723. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .mask = 16'hF888;
  28724. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .modeMux = 1'b0;
  28725. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .FeedbackMux = 1'b0;
  28726. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .ShiftMux = 1'b0;
  28727. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .BypassEn = 1'b0;
  28728. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~2 .CarryEnb = 1'b1;
  28729. alta_slice \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 (
  28730. .A(vcc),
  28731. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  28732. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  28733. .D(vcc),
  28734. .Cin(),
  28735. .Qin(),
  28736. .Clk(),
  28737. .AsyncReset(),
  28738. .SyncReset(),
  28739. .ShiftData(),
  28740. .SyncLoad(),
  28741. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector5~3_combout ),
  28742. .Cout(),
  28743. .Q());
  28744. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .coord_x = 9;
  28745. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .coord_y = 2;
  28746. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .coord_z = 0;
  28747. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .mask = 16'h3030;
  28748. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .modeMux = 1'b0;
  28749. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .FeedbackMux = 1'b0;
  28750. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .ShiftMux = 1'b0;
  28751. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .BypassEn = 1'b0;
  28752. defparam \macro_inst|u_uart[0]|u_tx[0]|Selector5~3 .CarryEnb = 1'b1;
  28753. alta_slice \macro_inst|u_uart[0]|u_tx[0]|always0~0 (
  28754. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  28755. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0]),
  28756. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [2]),
  28757. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [1]),
  28758. .Cin(),
  28759. .Qin(),
  28760. .Clk(),
  28761. .AsyncReset(),
  28762. .SyncReset(),
  28763. .ShiftData(),
  28764. .SyncLoad(),
  28765. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ),
  28766. .Cout(),
  28767. .Q());
  28768. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .coord_x = 10;
  28769. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .coord_y = 2;
  28770. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .coord_z = 1;
  28771. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .mask = 16'h0002;
  28772. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .modeMux = 1'b0;
  28773. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .FeedbackMux = 1'b0;
  28774. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .ShiftMux = 1'b0;
  28775. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .BypassEn = 1'b0;
  28776. defparam \macro_inst|u_uart[0]|u_tx[0]|always0~0 .CarryEnb = 1'b1;
  28777. alta_slice \macro_inst|u_uart[0]|u_tx[0]|always6~0 (
  28778. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [2]),
  28779. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [1]),
  28780. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [0]),
  28781. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  28782. .Cin(),
  28783. .Qin(),
  28784. .Clk(),
  28785. .AsyncReset(),
  28786. .SyncReset(),
  28787. .ShiftData(),
  28788. .SyncLoad(),
  28789. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|always6~0_combout ),
  28790. .Cout(),
  28791. .Q());
  28792. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .coord_x = 9;
  28793. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .coord_y = 2;
  28794. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .coord_z = 14;
  28795. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .mask = 16'h8000;
  28796. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .modeMux = 1'b0;
  28797. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .FeedbackMux = 1'b0;
  28798. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .ShiftMux = 1'b0;
  28799. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .BypassEn = 1'b0;
  28800. defparam \macro_inst|u_uart[0]|u_tx[0]|always6~0 .CarryEnb = 1'b1;
  28801. alta_slice \macro_inst|u_uart[0]|u_tx[0]|comb~1 (
  28802. .A(vcc),
  28803. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  28804. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ),
  28805. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  28806. .Cin(),
  28807. .Qin(),
  28808. .Clk(),
  28809. .AsyncReset(),
  28810. .SyncReset(),
  28811. .ShiftData(),
  28812. .SyncLoad(),
  28813. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  28814. .Cout(),
  28815. .Q());
  28816. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .coord_x = 9;
  28817. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .coord_y = 2;
  28818. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .coord_z = 1;
  28819. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .mask = 16'h0C00;
  28820. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .modeMux = 1'b0;
  28821. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .FeedbackMux = 1'b0;
  28822. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .ShiftMux = 1'b0;
  28823. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .BypassEn = 1'b0;
  28824. defparam \macro_inst|u_uart[0]|u_tx[0]|comb~1 .CarryEnb = 1'b1;
  28825. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] (
  28826. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  28827. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [0]),
  28828. .C(vcc),
  28829. .D(vcc),
  28830. .Cin(),
  28831. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [0]),
  28832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  28833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  28834. .SyncReset(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ),
  28835. .ShiftData(),
  28836. .SyncLoad(SyncLoad_X53_Y1_GND),
  28837. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0]~4_combout ),
  28838. .Cout(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0]~5 ),
  28839. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [0]));
  28840. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .coord_x = 9;
  28841. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .coord_y = 2;
  28842. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .coord_z = 8;
  28843. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .mask = 16'h6688;
  28844. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .modeMux = 1'b0;
  28845. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  28846. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  28847. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .BypassEn = 1'b1;
  28848. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  28849. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] (
  28850. .A(vcc),
  28851. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [1]),
  28852. .C(vcc),
  28853. .D(vcc),
  28854. .Cin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[0]~5 ),
  28855. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [1]),
  28856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  28857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  28858. .SyncReset(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ),
  28859. .ShiftData(),
  28860. .SyncLoad(SyncLoad_X53_Y1_GND),
  28861. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1]~6_combout ),
  28862. .Cout(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1]~7 ),
  28863. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [1]));
  28864. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .coord_x = 9;
  28865. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .coord_y = 2;
  28866. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .coord_z = 9;
  28867. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .mask = 16'h3C3F;
  28868. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .modeMux = 1'b1;
  28869. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  28870. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  28871. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .BypassEn = 1'b1;
  28872. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  28873. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] (
  28874. .A(vcc),
  28875. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [2]),
  28876. .C(vcc),
  28877. .D(vcc),
  28878. .Cin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[1]~7 ),
  28879. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [2]),
  28880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  28881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  28882. .SyncReset(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ),
  28883. .ShiftData(),
  28884. .SyncLoad(SyncLoad_X53_Y1_GND),
  28885. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2]~8_combout ),
  28886. .Cout(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2]~9 ),
  28887. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [2]));
  28888. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .coord_x = 9;
  28889. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .coord_y = 2;
  28890. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .coord_z = 10;
  28891. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .mask = 16'hC30C;
  28892. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .modeMux = 1'b1;
  28893. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  28894. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  28895. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .BypassEn = 1'b1;
  28896. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  28897. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] (
  28898. .A(vcc),
  28899. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [3]),
  28900. .C(vcc),
  28901. .D(vcc),
  28902. .Cin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[2]~9 ),
  28903. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [3]),
  28904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  28905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  28906. .SyncReset(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ),
  28907. .ShiftData(),
  28908. .SyncLoad(SyncLoad_X53_Y1_GND),
  28909. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3]~10_combout ),
  28910. .Cout(),
  28911. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [3]));
  28912. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .coord_x = 9;
  28913. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .coord_y = 2;
  28914. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .coord_z = 11;
  28915. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .mask = 16'h3C3C;
  28916. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .modeMux = 1'b1;
  28917. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  28918. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  28919. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .BypassEn = 1'b1;
  28920. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  28921. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_bit (
  28922. .A(vcc),
  28923. .B(vcc),
  28924. .C(\macro_inst|u_uart[0]|u_tx[0]|always6~0_combout ),
  28925. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_baud_cnt [3]),
  28926. .Cin(),
  28927. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  28928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  28929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  28930. .SyncReset(),
  28931. .ShiftData(),
  28932. .SyncLoad(),
  28933. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|always6~1_combout ),
  28934. .Cout(),
  28935. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ));
  28936. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .coord_x = 9;
  28937. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .coord_y = 2;
  28938. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .coord_z = 13;
  28939. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .mask = 16'hF000;
  28940. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .modeMux = 1'b0;
  28941. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .FeedbackMux = 1'b0;
  28942. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .ShiftMux = 1'b0;
  28943. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .BypassEn = 1'b0;
  28944. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_bit .CarryEnb = 1'b1;
  28945. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_complete (
  28946. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[0]~12_combout ),
  28947. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  28948. .C(vcc),
  28949. .D(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  28950. .Cin(),
  28951. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_complete~q ),
  28952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y2_SIG_VCC ),
  28953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y2_SIG ),
  28954. .SyncReset(),
  28955. .ShiftData(),
  28956. .SyncLoad(),
  28957. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_complete~0_combout ),
  28958. .Cout(),
  28959. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_complete~q ));
  28960. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .coord_x = 9;
  28961. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .coord_y = 3;
  28962. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .coord_z = 5;
  28963. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .mask = 16'h3320;
  28964. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .modeMux = 1'b0;
  28965. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .FeedbackMux = 1'b1;
  28966. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .ShiftMux = 1'b0;
  28967. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .BypassEn = 1'b0;
  28968. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_complete .CarryEnb = 1'b1;
  28969. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] (
  28970. .A(vcc),
  28971. .B(vcc),
  28972. .C(vcc),
  28973. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  28974. .Cin(),
  28975. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0]),
  28976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout_X54_Y1_SIG_SIG ),
  28977. .AsyncReset(AsyncReset_X54_Y1_GND),
  28978. .SyncReset(),
  28979. .ShiftData(),
  28980. .SyncLoad(),
  28981. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~2_combout ),
  28982. .Cout(),
  28983. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0]));
  28984. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .coord_x = 10;
  28985. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .coord_y = 2;
  28986. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .coord_z = 11;
  28987. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .mask = 16'hFF0F;
  28988. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .modeMux = 1'b0;
  28989. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  28990. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .ShiftMux = 1'b0;
  28991. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .BypassEn = 1'b0;
  28992. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[0] .CarryEnb = 1'b1;
  28993. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] (
  28994. .A(vcc),
  28995. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  28996. .C(vcc),
  28997. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0]),
  28998. .Cin(),
  28999. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [1]),
  29000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout_X54_Y1_SIG_SIG ),
  29001. .AsyncReset(AsyncReset_X54_Y1_GND),
  29002. .SyncReset(),
  29003. .ShiftData(),
  29004. .SyncLoad(),
  29005. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~0_combout ),
  29006. .Cout(),
  29007. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [1]));
  29008. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .coord_x = 10;
  29009. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .coord_y = 2;
  29010. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .coord_z = 13;
  29011. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .mask = 16'hFCCF;
  29012. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .modeMux = 1'b0;
  29013. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  29014. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .ShiftMux = 1'b0;
  29015. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .BypassEn = 1'b0;
  29016. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1] .CarryEnb = 1'b1;
  29017. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] (
  29018. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29019. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [1]),
  29020. .C(vcc),
  29021. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [0]),
  29022. .Cin(),
  29023. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [2]),
  29024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout_X54_Y1_SIG_SIG ),
  29025. .AsyncReset(AsyncReset_X54_Y1_GND),
  29026. .SyncReset(),
  29027. .ShiftData(),
  29028. .SyncLoad(),
  29029. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt~3_combout ),
  29030. .Cout(),
  29031. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt [2]));
  29032. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .coord_x = 10;
  29033. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .coord_y = 2;
  29034. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .coord_z = 12;
  29035. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .mask = 16'hFAEB;
  29036. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .modeMux = 1'b0;
  29037. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  29038. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .ShiftMux = 1'b0;
  29039. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .BypassEn = 1'b0;
  29040. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[2] .CarryEnb = 1'b1;
  29041. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req (
  29042. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29043. .B(\macro_inst|u_uart[0]|u_regs|tx_dma_en [0]),
  29044. .C(vcc),
  29045. .D(\rv32.ext_dma_DMACCLR[2] ),
  29046. .Cin(),
  29047. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~q ),
  29048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  29049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  29050. .SyncReset(),
  29051. .ShiftData(),
  29052. .SyncLoad(),
  29053. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~0_combout ),
  29054. .Cout(),
  29055. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~q ));
  29056. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .coord_x = 10;
  29057. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .coord_y = 3;
  29058. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .coord_z = 6;
  29059. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .mask = 16'h00C4;
  29060. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .modeMux = 1'b0;
  29061. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .FeedbackMux = 1'b1;
  29062. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .ShiftMux = 1'b0;
  29063. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .BypassEn = 1'b0;
  29064. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req .CarryEnb = 1'b1;
  29065. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] (
  29066. .A(\macro_inst|u_uart[0]|u_regs|tx_write [0]),
  29067. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  29068. .C(vcc),
  29069. .D(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  29070. .Cin(),
  29071. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ),
  29073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ),
  29074. .SyncReset(),
  29075. .ShiftData(),
  29076. .SyncLoad(),
  29077. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter~0_combout ),
  29078. .Cout(),
  29079. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]));
  29080. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .coord_x = 14;
  29081. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .coord_y = 2;
  29082. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .coord_z = 5;
  29083. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .mask = 16'h0ACA;
  29084. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .modeMux = 1'b0;
  29085. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  29086. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  29087. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .BypassEn = 1'b0;
  29088. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  29089. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] (
  29090. .A(\macro_inst|u_uart[0]|u_baud|i_cnt [15]),
  29091. .B(\macro_inst|u_uart[0]|u_baud|i_cnt [13]),
  29092. .C(\rv32.mem_ahb_hwdata[0] ),
  29093. .D(\macro_inst|u_uart[0]|u_baud|i_cnt [14]),
  29094. .Cin(),
  29095. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0]~q ),
  29096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29097. .AsyncReset(AsyncReset_X53_Y3_GND),
  29098. .SyncReset(SyncReset_X53_Y3_GND),
  29099. .ShiftData(),
  29100. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29101. .LutOut(\macro_inst|u_uart[0]|u_baud|Equal1~3_combout ),
  29102. .Cout(),
  29103. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0]~q ));
  29104. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .coord_x = 14;
  29105. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .coord_y = 2;
  29106. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .coord_z = 15;
  29107. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .mask = 16'h0011;
  29108. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .modeMux = 1'b0;
  29109. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  29110. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  29111. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .BypassEn = 1'b1;
  29112. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  29113. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] (
  29114. .A(vcc),
  29115. .B(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  29116. .C(\rv32.mem_ahb_hwdata[1] ),
  29117. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  29118. .Cin(),
  29119. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1]~q ),
  29120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29121. .AsyncReset(AsyncReset_X53_Y3_GND),
  29122. .SyncReset(SyncReset_X53_Y3_GND),
  29123. .ShiftData(),
  29124. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29125. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add3~0_combout ),
  29126. .Cout(),
  29127. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1]~q ));
  29128. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .coord_x = 14;
  29129. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .coord_y = 2;
  29130. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .coord_z = 14;
  29131. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .mask = 16'h33CC;
  29132. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .modeMux = 1'b0;
  29133. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  29134. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  29135. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .BypassEn = 1'b1;
  29136. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  29137. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] (
  29138. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  29139. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29140. .C(\rv32.mem_ahb_hwdata[2] ),
  29141. .D(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  29142. .Cin(),
  29143. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2]~q ),
  29144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29145. .AsyncReset(AsyncReset_X53_Y3_GND),
  29146. .SyncReset(SyncReset_X53_Y3_GND),
  29147. .ShiftData(),
  29148. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29149. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29150. .Cout(),
  29151. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2]~q ));
  29152. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .coord_x = 14;
  29153. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .coord_y = 2;
  29154. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .coord_z = 11;
  29155. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .mask = 16'hCC44;
  29156. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .modeMux = 1'b0;
  29157. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  29158. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  29159. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .BypassEn = 1'b1;
  29160. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  29161. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] (
  29162. .A(vcc),
  29163. .B(\macro_inst|u_uart[0]|u_regs|tx_write [0]),
  29164. .C(\rv32.mem_ahb_hwdata[3] ),
  29165. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29166. .Cin(),
  29167. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3]~q ),
  29168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29169. .AsyncReset(AsyncReset_X53_Y3_GND),
  29170. .SyncReset(SyncReset_X53_Y3_GND),
  29171. .ShiftData(),
  29172. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29173. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout ),
  29174. .Cout(),
  29175. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3]~q ));
  29176. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .coord_x = 14;
  29177. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .coord_y = 2;
  29178. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .coord_z = 8;
  29179. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .mask = 16'h00CC;
  29180. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .modeMux = 1'b0;
  29181. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  29182. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  29183. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .BypassEn = 1'b1;
  29184. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  29185. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] (
  29186. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  29187. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29188. .C(\rv32.mem_ahb_hwdata[4] ),
  29189. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29190. .Cin(),
  29191. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4]~q ),
  29192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29193. .AsyncReset(AsyncReset_X53_Y3_GND),
  29194. .SyncReset(SyncReset_X53_Y3_GND),
  29195. .ShiftData(),
  29196. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29197. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_data_cnt[1]~1_combout ),
  29198. .Cout(),
  29199. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4]~q ));
  29200. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .coord_x = 14;
  29201. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .coord_y = 2;
  29202. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .coord_z = 0;
  29203. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .mask = 16'hEECC;
  29204. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .modeMux = 1'b0;
  29205. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  29206. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  29207. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .BypassEn = 1'b1;
  29208. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  29209. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] (
  29210. .A(vcc),
  29211. .B(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  29212. .C(\rv32.mem_ahb_hwdata[5] ),
  29213. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  29214. .Cin(),
  29215. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5]~q ),
  29216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29217. .AsyncReset(AsyncReset_X53_Y3_GND),
  29218. .SyncReset(SyncReset_X53_Y3_GND),
  29219. .ShiftData(),
  29220. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29221. .LutOut(\macro_inst|u_uart[0]|u_rx[5]|Add3~1_combout ),
  29222. .Cout(),
  29223. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5]~q ));
  29224. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .coord_x = 14;
  29225. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .coord_y = 2;
  29226. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .coord_z = 1;
  29227. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .mask = 16'hFFCC;
  29228. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .modeMux = 1'b0;
  29229. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  29230. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  29231. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .BypassEn = 1'b1;
  29232. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  29233. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] (
  29234. .A(),
  29235. .B(),
  29236. .C(vcc),
  29237. .D(\rv32.mem_ahb_hwdata[6] ),
  29238. .Cin(),
  29239. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]~q ),
  29240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29241. .AsyncReset(AsyncReset_X53_Y3_GND),
  29242. .SyncReset(),
  29243. .ShiftData(),
  29244. .SyncLoad(),
  29245. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  29246. .Cout(),
  29247. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]~q ));
  29248. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .coord_x = 14;
  29249. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .coord_y = 2;
  29250. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .coord_z = 2;
  29251. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  29252. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  29253. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  29254. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  29255. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  29256. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  29257. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] (
  29258. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ),
  29259. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  29260. .C(\rv32.mem_ahb_hwdata[7] ),
  29261. .D(vcc),
  29262. .Cin(),
  29263. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7]~q ),
  29264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_fifo|wrreq~0_combout_X53_Y3_SIG_SIG ),
  29265. .AsyncReset(AsyncReset_X53_Y3_GND),
  29266. .SyncReset(SyncReset_X53_Y3_GND),
  29267. .ShiftData(),
  29268. .SyncLoad(SyncLoad_X53_Y3_VCC),
  29269. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector3~0_combout ),
  29270. .Cout(),
  29271. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7]~q ));
  29272. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .coord_x = 14;
  29273. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .coord_y = 2;
  29274. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .coord_z = 13;
  29275. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .mask = 16'h2222;
  29276. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .modeMux = 1'b0;
  29277. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  29278. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  29279. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .BypassEn = 1'b1;
  29280. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  29281. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_parity (
  29282. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29283. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~0_combout ),
  29284. .C(vcc),
  29285. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  29286. .Cin(),
  29287. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~q ),
  29288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  29289. .AsyncReset(AsyncReset_X54_Y1_GND),
  29290. .SyncReset(),
  29291. .ShiftData(),
  29292. .SyncLoad(),
  29293. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~1_combout ),
  29294. .Cout(),
  29295. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~q ));
  29296. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .coord_x = 10;
  29297. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .coord_y = 2;
  29298. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .coord_z = 2;
  29299. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .mask = 16'h14BE;
  29300. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .modeMux = 1'b0;
  29301. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .FeedbackMux = 1'b1;
  29302. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .ShiftMux = 1'b0;
  29303. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .BypassEn = 1'b0;
  29304. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity .CarryEnb = 1'b1;
  29305. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 (
  29306. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0]),
  29307. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29308. .C(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  29309. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  29310. .Cin(),
  29311. .Qin(),
  29312. .Clk(),
  29313. .AsyncReset(),
  29314. .SyncReset(),
  29315. .ShiftData(),
  29316. .SyncLoad(),
  29317. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_parity~0_combout ),
  29318. .Cout(),
  29319. .Q());
  29320. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .coord_x = 10;
  29321. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .coord_y = 2;
  29322. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .coord_z = 3;
  29323. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .mask = 16'h0800;
  29324. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .modeMux = 1'b0;
  29325. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .FeedbackMux = 1'b0;
  29326. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .ShiftMux = 1'b0;
  29327. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .BypassEn = 1'b0;
  29328. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_parity~0 .CarryEnb = 1'b1;
  29329. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] (
  29330. .A(vcc),
  29331. .B(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29332. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][0]~q ),
  29333. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [1]),
  29334. .Cin(),
  29335. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0]),
  29336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29338. .SyncReset(),
  29339. .ShiftData(),
  29340. .SyncLoad(),
  29341. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~0_combout ),
  29342. .Cout(),
  29343. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0]));
  29344. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .coord_x = 15;
  29345. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .coord_y = 2;
  29346. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .coord_z = 3;
  29347. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .mask = 16'hF3C0;
  29348. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .modeMux = 1'b0;
  29349. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  29350. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .ShiftMux = 1'b0;
  29351. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .BypassEn = 1'b0;
  29352. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[0] .CarryEnb = 1'b1;
  29353. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] (
  29354. .A(vcc),
  29355. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [2]),
  29356. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][1]~q ),
  29357. .D(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29358. .Cin(),
  29359. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [1]),
  29360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29362. .SyncReset(),
  29363. .ShiftData(),
  29364. .SyncLoad(),
  29365. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~2_combout ),
  29366. .Cout(),
  29367. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [1]));
  29368. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .coord_x = 15;
  29369. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .coord_y = 2;
  29370. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .coord_z = 1;
  29371. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .mask = 16'hF0CC;
  29372. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .modeMux = 1'b0;
  29373. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  29374. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .ShiftMux = 1'b0;
  29375. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .BypassEn = 1'b0;
  29376. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[1] .CarryEnb = 1'b1;
  29377. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] (
  29378. .A(vcc),
  29379. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [3]),
  29380. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][2]~q ),
  29381. .D(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29382. .Cin(),
  29383. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [2]),
  29384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29386. .SyncReset(),
  29387. .ShiftData(),
  29388. .SyncLoad(),
  29389. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~3_combout ),
  29390. .Cout(),
  29391. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [2]));
  29392. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .coord_x = 15;
  29393. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .coord_y = 2;
  29394. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .coord_z = 13;
  29395. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .mask = 16'hF0CC;
  29396. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .modeMux = 1'b0;
  29397. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  29398. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .ShiftMux = 1'b0;
  29399. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .BypassEn = 1'b0;
  29400. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2] .CarryEnb = 1'b1;
  29401. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] (
  29402. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [4]),
  29403. .B(vcc),
  29404. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][3]~q ),
  29405. .D(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29406. .Cin(),
  29407. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [3]),
  29408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29410. .SyncReset(),
  29411. .ShiftData(),
  29412. .SyncLoad(),
  29413. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~4_combout ),
  29414. .Cout(),
  29415. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [3]));
  29416. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .coord_x = 15;
  29417. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .coord_y = 2;
  29418. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .coord_z = 5;
  29419. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .mask = 16'hF0AA;
  29420. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .modeMux = 1'b0;
  29421. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  29422. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .ShiftMux = 1'b0;
  29423. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .BypassEn = 1'b0;
  29424. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[3] .CarryEnb = 1'b1;
  29425. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] (
  29426. .A(vcc),
  29427. .B(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29428. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [5]),
  29429. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][4]~q ),
  29430. .Cin(),
  29431. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [4]),
  29432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29434. .SyncReset(),
  29435. .ShiftData(),
  29436. .SyncLoad(),
  29437. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~5_combout ),
  29438. .Cout(),
  29439. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [4]));
  29440. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .coord_x = 15;
  29441. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .coord_y = 2;
  29442. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .coord_z = 8;
  29443. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .mask = 16'hFC30;
  29444. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .modeMux = 1'b0;
  29445. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  29446. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .ShiftMux = 1'b0;
  29447. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .BypassEn = 1'b0;
  29448. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[4] .CarryEnb = 1'b1;
  29449. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] (
  29450. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [6]),
  29451. .B(vcc),
  29452. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][5]~q ),
  29453. .D(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29454. .Cin(),
  29455. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [5]),
  29456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29458. .SyncReset(),
  29459. .ShiftData(),
  29460. .SyncLoad(),
  29461. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~6_combout ),
  29462. .Cout(),
  29463. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [5]));
  29464. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .coord_x = 15;
  29465. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .coord_y = 2;
  29466. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .coord_z = 12;
  29467. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .mask = 16'hF0AA;
  29468. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .modeMux = 1'b0;
  29469. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  29470. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .ShiftMux = 1'b0;
  29471. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .BypassEn = 1'b0;
  29472. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[5] .CarryEnb = 1'b1;
  29473. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] (
  29474. .A(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29475. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [7]),
  29476. .C(vcc),
  29477. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][6]~q ),
  29478. .Cin(),
  29479. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [6]),
  29480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29482. .SyncReset(),
  29483. .ShiftData(),
  29484. .SyncLoad(),
  29485. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~7_combout ),
  29486. .Cout(),
  29487. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [6]));
  29488. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .coord_x = 15;
  29489. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .coord_y = 2;
  29490. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .coord_z = 2;
  29491. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .mask = 16'hEE44;
  29492. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .modeMux = 1'b0;
  29493. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  29494. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .ShiftMux = 1'b0;
  29495. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .BypassEn = 1'b0;
  29496. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[6] .CarryEnb = 1'b1;
  29497. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] (
  29498. .A(vcc),
  29499. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [0]),
  29500. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|fifo[1][7]~q ),
  29501. .D(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29502. .Cin(),
  29503. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [7]),
  29504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[2]~1_combout_X56_Y3_SIG_SIG ),
  29505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y3_SIG ),
  29506. .SyncReset(),
  29507. .ShiftData(),
  29508. .SyncLoad(),
  29509. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg~8_combout ),
  29510. .Cout(),
  29511. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg [7]));
  29512. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .coord_x = 15;
  29513. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .coord_y = 2;
  29514. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .coord_z = 15;
  29515. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .mask = 16'hF0CC;
  29516. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .modeMux = 1'b0;
  29517. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  29518. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .ShiftMux = 1'b0;
  29519. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .BypassEn = 1'b0;
  29520. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_shift_reg[7] .CarryEnb = 1'b1;
  29521. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA (
  29522. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29523. .B(\macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ),
  29524. .C(vcc),
  29525. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  29526. .Cin(),
  29527. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  29529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ),
  29530. .SyncReset(),
  29531. .ShiftData(),
  29532. .SyncLoad(),
  29533. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector2~0_combout ),
  29534. .Cout(),
  29535. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ));
  29536. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .coord_x = 10;
  29537. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .coord_y = 2;
  29538. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .coord_z = 5;
  29539. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .mask = 16'hBA30;
  29540. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .modeMux = 1'b0;
  29541. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  29542. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .ShiftMux = 1'b0;
  29543. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .BypassEn = 1'b0;
  29544. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA .CarryEnb = 1'b1;
  29545. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE (
  29546. .A(vcc),
  29547. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29548. .C(vcc),
  29549. .D(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  29550. .Cin(),
  29551. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  29552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ),
  29553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ),
  29554. .SyncReset(),
  29555. .ShiftData(),
  29556. .SyncLoad(),
  29557. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector0~0_combout ),
  29558. .Cout(),
  29559. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ));
  29560. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .coord_x = 14;
  29561. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .coord_y = 2;
  29562. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .coord_z = 9;
  29563. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .mask = 16'hCCFC;
  29564. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .modeMux = 1'b0;
  29565. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  29566. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  29567. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .BypassEn = 1'b0;
  29568. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  29569. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY (
  29570. .A(\macro_inst|u_uart[0]|u_tx[0]|Selector3~0_combout ),
  29571. .B(\macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ),
  29572. .C(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  29573. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29574. .Cin(),
  29575. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ),
  29576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  29577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ),
  29578. .SyncReset(),
  29579. .ShiftData(),
  29580. .SyncLoad(),
  29581. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector3~1_combout ),
  29582. .Cout(),
  29583. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY~q ));
  29584. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .coord_x = 10;
  29585. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .coord_y = 2;
  29586. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .coord_z = 15;
  29587. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .mask = 16'hEAAA;
  29588. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .modeMux = 1'b0;
  29589. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  29590. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  29591. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .BypassEn = 1'b0;
  29592. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  29593. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START (
  29594. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0_combout ),
  29595. .B(\macro_inst|u_uart[0]|u_tx[0]|fifo_rden~combout ),
  29596. .C(vcc),
  29597. .D(\macro_inst|u_uart[0]|u_tx[0]|comb~1_combout ),
  29598. .Cin(),
  29599. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y3_SIG_VCC ),
  29601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y3_SIG ),
  29602. .SyncReset(),
  29603. .ShiftData(),
  29604. .SyncLoad(),
  29605. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~1_combout ),
  29606. .Cout(),
  29607. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ));
  29608. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .coord_x = 14;
  29609. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .coord_y = 2;
  29610. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .coord_z = 7;
  29611. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .mask = 16'hCCEC;
  29612. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .modeMux = 1'b0;
  29613. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .FeedbackMux = 1'b1;
  29614. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .ShiftMux = 1'b0;
  29615. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .BypassEn = 1'b0;
  29616. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START .CarryEnb = 1'b1;
  29617. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 (
  29618. .A(\macro_inst|u_uart[0]|u_tx[0]|Selector5~3_combout ),
  29619. .B(\macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ),
  29620. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29621. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  29622. .Cin(),
  29623. .Qin(),
  29624. .Clk(),
  29625. .AsyncReset(),
  29626. .SyncReset(),
  29627. .ShiftData(),
  29628. .SyncLoad(),
  29629. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0_combout ),
  29630. .Cout(),
  29631. .Q());
  29632. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .coord_x = 10;
  29633. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .coord_y = 2;
  29634. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .coord_z = 4;
  29635. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .mask = 16'h757F;
  29636. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .modeMux = 1'b0;
  29637. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  29638. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  29639. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .BypassEn = 1'b0;
  29640. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  29641. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP (
  29642. .A(\macro_inst|u_uart[0]|u_tx[0]|Selector4~0_combout ),
  29643. .B(\macro_inst|u_uart[0]|u_tx[0]|always0~0_combout ),
  29644. .C(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  29645. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_DATA~q ),
  29646. .Cin(),
  29647. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  29648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  29649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y1_SIG ),
  29650. .SyncReset(),
  29651. .ShiftData(),
  29652. .SyncLoad(),
  29653. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector4~1_combout ),
  29654. .Cout(),
  29655. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ));
  29656. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .coord_x = 10;
  29657. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .coord_y = 2;
  29658. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .coord_z = 9;
  29659. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .mask = 16'hAEAA;
  29660. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .modeMux = 1'b0;
  29661. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  29662. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .ShiftMux = 1'b0;
  29663. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .BypassEn = 1'b0;
  29664. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP .CarryEnb = 1'b1;
  29665. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_stop (
  29666. .A(vcc),
  29667. .B(vcc),
  29668. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  29669. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_fifo|counter [0]),
  29670. .Cin(),
  29671. .Qin(),
  29672. .Clk(),
  29673. .AsyncReset(),
  29674. .SyncReset(),
  29675. .ShiftData(),
  29676. .SyncLoad(),
  29677. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout ),
  29678. .Cout(),
  29679. .Q());
  29680. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .coord_x = 9;
  29681. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .coord_y = 2;
  29682. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .coord_z = 15;
  29683. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .mask = 16'h000F;
  29684. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .modeMux = 1'b0;
  29685. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .FeedbackMux = 1'b0;
  29686. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .ShiftMux = 1'b0;
  29687. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .BypassEn = 1'b0;
  29688. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop .CarryEnb = 1'b1;
  29689. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt (
  29690. .A(vcc),
  29691. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0_combout ),
  29692. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29693. .D(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  29694. .Cin(),
  29695. .Qin(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ),
  29696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y1_SIG_VCC ),
  29697. .AsyncReset(AsyncReset_X54_Y1_GND),
  29698. .SyncReset(),
  29699. .ShiftData(),
  29700. .SyncLoad(),
  29701. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~1_combout ),
  29702. .Cout(),
  29703. .Q(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ));
  29704. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .coord_x = 10;
  29705. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .coord_y = 2;
  29706. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .coord_z = 6;
  29707. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .mask = 16'hFCCC;
  29708. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .modeMux = 1'b0;
  29709. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .FeedbackMux = 1'b0;
  29710. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .ShiftMux = 1'b0;
  29711. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .BypassEn = 1'b0;
  29712. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt .CarryEnb = 1'b1;
  29713. alta_slice \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 (
  29714. .A(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~q ),
  29715. .B(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  29716. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_START~q ),
  29717. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_bit~q ),
  29718. .Cin(),
  29719. .Qin(),
  29720. .Clk(),
  29721. .AsyncReset(),
  29722. .SyncReset(),
  29723. .ShiftData(),
  29724. .SyncLoad(),
  29725. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0_combout ),
  29726. .Cout(),
  29727. .Q());
  29728. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .coord_x = 10;
  29729. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .coord_y = 2;
  29730. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .coord_z = 7;
  29731. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .mask = 16'h060A;
  29732. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .modeMux = 1'b0;
  29733. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  29734. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  29735. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .BypassEn = 1'b0;
  29736. defparam \macro_inst|u_uart[0]|u_tx[0]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  29737. alta_slice \macro_inst|u_uart[0]|u_tx[0]|uart_txd (
  29738. .A(vcc),
  29739. .B(\macro_inst|u_uart[0]|u_tx[0]|Selector5~2_combout ),
  29740. .C(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_IDLE~q ),
  29741. .D(\macro_inst|u_uart[0]|u_tx[0]|tx_state.UART_STOP~q ),
  29742. .Cin(),
  29743. .Qin(\macro_inst|u_uart[0]|u_tx[0]|uart_txd~q ),
  29744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X53_Y1_SIG_VCC ),
  29745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y1_SIG ),
  29746. .SyncReset(),
  29747. .ShiftData(),
  29748. .SyncLoad(),
  29749. .LutOut(\macro_inst|u_uart[0]|u_tx[0]|Selector5~4_combout ),
  29750. .Cout(),
  29751. .Q(\macro_inst|u_uart[0]|u_tx[0]|uart_txd~q ));
  29752. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .coord_x = 9;
  29753. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .coord_y = 2;
  29754. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .coord_z = 6;
  29755. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .mask = 16'h0030;
  29756. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .modeMux = 1'b0;
  29757. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .FeedbackMux = 1'b0;
  29758. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .ShiftMux = 1'b0;
  29759. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .BypassEn = 1'b0;
  29760. defparam \macro_inst|u_uart[0]|u_tx[0]|uart_txd .CarryEnb = 1'b1;
  29761. alta_slice \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 (
  29762. .A(vcc),
  29763. .B(vcc),
  29764. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ),
  29765. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  29766. .Cin(),
  29767. .Qin(),
  29768. .Clk(),
  29769. .AsyncReset(),
  29770. .SyncReset(),
  29771. .ShiftData(),
  29772. .SyncLoad(),
  29773. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector3~0_combout ),
  29774. .Cout(),
  29775. .Q());
  29776. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .coord_x = 4;
  29777. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .coord_y = 3;
  29778. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .coord_z = 1;
  29779. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .mask = 16'h00F0;
  29780. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .modeMux = 1'b0;
  29781. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .FeedbackMux = 1'b0;
  29782. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .ShiftMux = 1'b0;
  29783. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .BypassEn = 1'b0;
  29784. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector3~0 .CarryEnb = 1'b1;
  29785. alta_slice \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 (
  29786. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  29787. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  29788. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ),
  29789. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ),
  29790. .Cin(),
  29791. .Qin(),
  29792. .Clk(),
  29793. .AsyncReset(),
  29794. .SyncReset(),
  29795. .ShiftData(),
  29796. .SyncLoad(),
  29797. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector4~0_combout ),
  29798. .Cout(),
  29799. .Q());
  29800. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .coord_x = 3;
  29801. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .coord_y = 3;
  29802. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .coord_z = 10;
  29803. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .mask = 16'hEAE2;
  29804. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .modeMux = 1'b0;
  29805. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .FeedbackMux = 1'b0;
  29806. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .ShiftMux = 1'b0;
  29807. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .BypassEn = 1'b0;
  29808. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector4~0 .CarryEnb = 1'b1;
  29809. alta_slice \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 (
  29810. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ),
  29811. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  29812. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~q ),
  29813. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0]),
  29814. .Cin(),
  29815. .Qin(),
  29816. .Clk(),
  29817. .AsyncReset(),
  29818. .SyncReset(),
  29819. .ShiftData(),
  29820. .SyncLoad(),
  29821. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector5~2_combout ),
  29822. .Cout(),
  29823. .Q());
  29824. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .coord_x = 4;
  29825. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .coord_y = 3;
  29826. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .coord_z = 13;
  29827. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .mask = 16'hECA0;
  29828. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .modeMux = 1'b0;
  29829. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .FeedbackMux = 1'b0;
  29830. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .ShiftMux = 1'b0;
  29831. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .BypassEn = 1'b0;
  29832. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~2 .CarryEnb = 1'b1;
  29833. alta_slice \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 (
  29834. .A(vcc),
  29835. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  29836. .C(vcc),
  29837. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  29838. .Cin(),
  29839. .Qin(),
  29840. .Clk(),
  29841. .AsyncReset(),
  29842. .SyncReset(),
  29843. .ShiftData(),
  29844. .SyncLoad(),
  29845. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector5~3_combout ),
  29846. .Cout(),
  29847. .Q());
  29848. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .coord_x = 4;
  29849. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .coord_y = 3;
  29850. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .coord_z = 11;
  29851. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .mask = 16'h00CC;
  29852. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .modeMux = 1'b0;
  29853. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .FeedbackMux = 1'b0;
  29854. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .ShiftMux = 1'b0;
  29855. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .BypassEn = 1'b0;
  29856. defparam \macro_inst|u_uart[0]|u_tx[1]|Selector5~3 .CarryEnb = 1'b1;
  29857. alta_slice \macro_inst|u_uart[0]|u_tx[1]|always0~0 (
  29858. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0]),
  29859. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [2]),
  29860. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  29861. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [1]),
  29862. .Cin(),
  29863. .Qin(),
  29864. .Clk(),
  29865. .AsyncReset(),
  29866. .SyncReset(),
  29867. .ShiftData(),
  29868. .SyncLoad(),
  29869. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ),
  29870. .Cout(),
  29871. .Q());
  29872. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .coord_x = 3;
  29873. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .coord_y = 3;
  29874. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .coord_z = 9;
  29875. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .mask = 16'h0010;
  29876. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .modeMux = 1'b0;
  29877. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .FeedbackMux = 1'b0;
  29878. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .ShiftMux = 1'b0;
  29879. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .BypassEn = 1'b0;
  29880. defparam \macro_inst|u_uart[0]|u_tx[1]|always0~0 .CarryEnb = 1'b1;
  29881. alta_slice \macro_inst|u_uart[0]|u_tx[1]|always6~0 (
  29882. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [2]),
  29883. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [1]),
  29884. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [0]),
  29885. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  29886. .Cin(),
  29887. .Qin(),
  29888. .Clk(),
  29889. .AsyncReset(),
  29890. .SyncReset(),
  29891. .ShiftData(),
  29892. .SyncLoad(),
  29893. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|always6~0_combout ),
  29894. .Cout(),
  29895. .Q());
  29896. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .coord_x = 3;
  29897. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .coord_y = 3;
  29898. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .coord_z = 11;
  29899. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .mask = 16'h8000;
  29900. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .modeMux = 1'b0;
  29901. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .FeedbackMux = 1'b0;
  29902. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .ShiftMux = 1'b0;
  29903. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .BypassEn = 1'b0;
  29904. defparam \macro_inst|u_uart[0]|u_tx[1]|always6~0 .CarryEnb = 1'b1;
  29905. alta_slice \macro_inst|u_uart[0]|u_tx[1]|comb~1 (
  29906. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  29907. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ),
  29908. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  29909. .D(vcc),
  29910. .Cin(),
  29911. .Qin(),
  29912. .Clk(),
  29913. .AsyncReset(),
  29914. .SyncReset(),
  29915. .ShiftData(),
  29916. .SyncLoad(),
  29917. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  29918. .Cout(),
  29919. .Q());
  29920. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .coord_x = 8;
  29921. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .coord_y = 2;
  29922. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .coord_z = 14;
  29923. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .mask = 16'h2020;
  29924. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .modeMux = 1'b0;
  29925. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .FeedbackMux = 1'b0;
  29926. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .ShiftMux = 1'b0;
  29927. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .BypassEn = 1'b0;
  29928. defparam \macro_inst|u_uart[0]|u_tx[1]|comb~1 .CarryEnb = 1'b1;
  29929. alta_slice \macro_inst|u_uart[0]|u_tx[1]|fifo_rden (
  29930. .A(vcc),
  29931. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  29932. .C(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  29933. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  29934. .Cin(),
  29935. .Qin(),
  29936. .Clk(),
  29937. .AsyncReset(),
  29938. .SyncReset(),
  29939. .ShiftData(),
  29940. .SyncLoad(),
  29941. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  29942. .Cout(),
  29943. .Q());
  29944. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .coord_x = 8;
  29945. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .coord_y = 2;
  29946. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .coord_z = 11;
  29947. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .mask = 16'hC0CC;
  29948. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .modeMux = 1'b0;
  29949. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .FeedbackMux = 1'b0;
  29950. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .ShiftMux = 1'b0;
  29951. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .BypassEn = 1'b0;
  29952. defparam \macro_inst|u_uart[0]|u_tx[1]|fifo_rden .CarryEnb = 1'b1;
  29953. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] (
  29954. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [0]),
  29955. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  29956. .C(vcc),
  29957. .D(vcc),
  29958. .Cin(),
  29959. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [0]),
  29960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  29961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  29962. .SyncReset(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ),
  29963. .ShiftData(),
  29964. .SyncLoad(SyncLoad_X46_Y1_GND),
  29965. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0]~4_combout ),
  29966. .Cout(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0]~5 ),
  29967. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [0]));
  29968. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .coord_x = 3;
  29969. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .coord_y = 3;
  29970. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .coord_z = 2;
  29971. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .mask = 16'h6688;
  29972. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .modeMux = 1'b0;
  29973. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  29974. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  29975. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .BypassEn = 1'b1;
  29976. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  29977. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] (
  29978. .A(vcc),
  29979. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [1]),
  29980. .C(vcc),
  29981. .D(vcc),
  29982. .Cin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[0]~5 ),
  29983. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [1]),
  29984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  29985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  29986. .SyncReset(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ),
  29987. .ShiftData(),
  29988. .SyncLoad(SyncLoad_X46_Y1_GND),
  29989. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1]~6_combout ),
  29990. .Cout(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1]~7 ),
  29991. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [1]));
  29992. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .coord_x = 3;
  29993. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .coord_y = 3;
  29994. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .coord_z = 3;
  29995. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .mask = 16'h3C3F;
  29996. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .modeMux = 1'b1;
  29997. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  29998. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  29999. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .BypassEn = 1'b1;
  30000. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  30001. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] (
  30002. .A(vcc),
  30003. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [2]),
  30004. .C(vcc),
  30005. .D(vcc),
  30006. .Cin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[1]~7 ),
  30007. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [2]),
  30008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  30009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  30010. .SyncReset(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ),
  30011. .ShiftData(),
  30012. .SyncLoad(SyncLoad_X46_Y1_GND),
  30013. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2]~8_combout ),
  30014. .Cout(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2]~9 ),
  30015. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [2]));
  30016. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .coord_x = 3;
  30017. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .coord_y = 3;
  30018. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .coord_z = 4;
  30019. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .mask = 16'hC30C;
  30020. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .modeMux = 1'b1;
  30021. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  30022. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  30023. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .BypassEn = 1'b1;
  30024. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  30025. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] (
  30026. .A(vcc),
  30027. .B(vcc),
  30028. .C(vcc),
  30029. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [3]),
  30030. .Cin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[2]~9 ),
  30031. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [3]),
  30032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  30033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  30034. .SyncReset(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ),
  30035. .ShiftData(),
  30036. .SyncLoad(SyncLoad_X46_Y1_GND),
  30037. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3]~10_combout ),
  30038. .Cout(),
  30039. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [3]));
  30040. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .coord_x = 3;
  30041. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .coord_y = 3;
  30042. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .coord_z = 5;
  30043. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .mask = 16'h0FF0;
  30044. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .modeMux = 1'b1;
  30045. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  30046. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  30047. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .BypassEn = 1'b1;
  30048. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  30049. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_bit (
  30050. .A(vcc),
  30051. .B(\macro_inst|u_uart[0]|u_tx[1]|always6~0_combout ),
  30052. .C(vcc),
  30053. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_baud_cnt [3]),
  30054. .Cin(),
  30055. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  30057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  30058. .SyncReset(),
  30059. .ShiftData(),
  30060. .SyncLoad(),
  30061. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|always6~1_combout ),
  30062. .Cout(),
  30063. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ));
  30064. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .coord_x = 3;
  30065. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .coord_y = 3;
  30066. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .coord_z = 8;
  30067. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .mask = 16'hCC00;
  30068. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .modeMux = 1'b0;
  30069. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .FeedbackMux = 1'b0;
  30070. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .ShiftMux = 1'b0;
  30071. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .BypassEn = 1'b0;
  30072. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_bit .CarryEnb = 1'b1;
  30073. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_complete (
  30074. .A(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  30075. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  30076. .C(vcc),
  30077. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[1]~13_combout ),
  30078. .Cin(),
  30079. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_complete~q ),
  30080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  30081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  30082. .SyncReset(),
  30083. .ShiftData(),
  30084. .SyncLoad(),
  30085. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_complete~0_combout ),
  30086. .Cout(),
  30087. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_complete~q ));
  30088. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .coord_x = 8;
  30089. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .coord_y = 3;
  30090. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .coord_z = 0;
  30091. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .mask = 16'h2232;
  30092. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .modeMux = 1'b0;
  30093. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .FeedbackMux = 1'b1;
  30094. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .ShiftMux = 1'b0;
  30095. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .BypassEn = 1'b0;
  30096. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_complete .CarryEnb = 1'b1;
  30097. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] (
  30098. .A(vcc),
  30099. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30100. .C(vcc),
  30101. .D(vcc),
  30102. .Cin(),
  30103. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0]),
  30104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout_X46_Y1_SIG_SIG ),
  30105. .AsyncReset(AsyncReset_X46_Y1_GND),
  30106. .SyncReset(),
  30107. .ShiftData(),
  30108. .SyncLoad(),
  30109. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~2_combout ),
  30110. .Cout(),
  30111. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0]));
  30112. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .coord_x = 3;
  30113. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .coord_y = 3;
  30114. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .coord_z = 7;
  30115. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .mask = 16'hCFCF;
  30116. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .modeMux = 1'b0;
  30117. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  30118. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .ShiftMux = 1'b0;
  30119. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .BypassEn = 1'b0;
  30120. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[0] .CarryEnb = 1'b1;
  30121. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] (
  30122. .A(vcc),
  30123. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30124. .C(vcc),
  30125. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0]),
  30126. .Cin(),
  30127. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [1]),
  30128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout_X46_Y1_SIG_SIG ),
  30129. .AsyncReset(AsyncReset_X46_Y1_GND),
  30130. .SyncReset(),
  30131. .ShiftData(),
  30132. .SyncLoad(),
  30133. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~0_combout ),
  30134. .Cout(),
  30135. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [1]));
  30136. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .coord_x = 3;
  30137. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .coord_y = 3;
  30138. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .coord_z = 1;
  30139. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .mask = 16'hFCCF;
  30140. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .modeMux = 1'b0;
  30141. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  30142. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .ShiftMux = 1'b0;
  30143. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .BypassEn = 1'b0;
  30144. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1] .CarryEnb = 1'b1;
  30145. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 (
  30146. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30147. .B(vcc),
  30148. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30149. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30150. .Cin(),
  30151. .Qin(),
  30152. .Clk(),
  30153. .AsyncReset(),
  30154. .SyncReset(),
  30155. .ShiftData(),
  30156. .SyncLoad(),
  30157. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout ),
  30158. .Cout(),
  30159. .Q());
  30160. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .coord_x = 3;
  30161. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .coord_y = 3;
  30162. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .coord_z = 14;
  30163. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .mask = 16'hFAAA;
  30164. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .modeMux = 1'b0;
  30165. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .FeedbackMux = 1'b0;
  30166. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .ShiftMux = 1'b0;
  30167. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .BypassEn = 1'b0;
  30168. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1 .CarryEnb = 1'b1;
  30169. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] (
  30170. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [0]),
  30171. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30172. .C(vcc),
  30173. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [1]),
  30174. .Cin(),
  30175. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [2]),
  30176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[1]~1_combout_X46_Y1_SIG_SIG ),
  30177. .AsyncReset(AsyncReset_X46_Y1_GND),
  30178. .SyncReset(),
  30179. .ShiftData(),
  30180. .SyncLoad(),
  30181. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt~3_combout ),
  30182. .Cout(),
  30183. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt [2]));
  30184. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .coord_x = 3;
  30185. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .coord_y = 3;
  30186. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .coord_z = 15;
  30187. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .mask = 16'hFCED;
  30188. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .modeMux = 1'b0;
  30189. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  30190. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .ShiftMux = 1'b0;
  30191. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .BypassEn = 1'b0;
  30192. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_data_cnt[2] .CarryEnb = 1'b1;
  30193. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req (
  30194. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  30195. .B(\macro_inst|u_uart[0]|u_regs|tx_dma_en [1]),
  30196. .C(vcc),
  30197. .D(\rv32.ext_dma_DMACCLR[3] ),
  30198. .Cin(),
  30199. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~q ),
  30200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  30201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  30202. .SyncReset(),
  30203. .ShiftData(),
  30204. .SyncLoad(),
  30205. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~0_combout ),
  30206. .Cout(),
  30207. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~q ));
  30208. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .coord_x = 8;
  30209. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .coord_y = 2;
  30210. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .coord_z = 15;
  30211. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .mask = 16'h00C4;
  30212. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .modeMux = 1'b0;
  30213. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .FeedbackMux = 1'b1;
  30214. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .ShiftMux = 1'b0;
  30215. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .BypassEn = 1'b0;
  30216. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_dma_req .CarryEnb = 1'b1;
  30217. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] (
  30218. .A(\macro_inst|u_uart[0]|u_regs|tx_write [1]),
  30219. .B(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  30220. .C(vcc),
  30221. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  30222. .Cin(),
  30223. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  30224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  30225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  30226. .SyncReset(),
  30227. .ShiftData(),
  30228. .SyncLoad(),
  30229. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter~0_combout ),
  30230. .Cout(),
  30231. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]));
  30232. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .coord_x = 8;
  30233. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .coord_y = 2;
  30234. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .coord_z = 10;
  30235. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .mask = 16'h3A0A;
  30236. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .modeMux = 1'b0;
  30237. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  30238. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  30239. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .BypassEn = 1'b0;
  30240. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  30241. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] (
  30242. .A(),
  30243. .B(),
  30244. .C(vcc),
  30245. .D(\rv32.mem_ahb_hwdata[0] ),
  30246. .Cin(),
  30247. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]~q ),
  30248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30249. .AsyncReset(AsyncReset_X61_Y9_GND),
  30250. .SyncReset(),
  30251. .ShiftData(),
  30252. .SyncLoad(),
  30253. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  30254. .Cout(),
  30255. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]~q ));
  30256. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .coord_x = 15;
  30257. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .coord_y = 10;
  30258. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .coord_z = 4;
  30259. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  30260. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  30261. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  30262. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  30263. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  30264. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  30265. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] (
  30266. .A(vcc),
  30267. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  30268. .C(\rv32.mem_ahb_hwdata[1] ),
  30269. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  30270. .Cin(),
  30271. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1]~q ),
  30272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30273. .AsyncReset(AsyncReset_X61_Y9_GND),
  30274. .SyncReset(SyncReset_X61_Y9_GND),
  30275. .ShiftData(),
  30276. .SyncLoad(SyncLoad_X61_Y9_VCC),
  30277. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout ),
  30278. .Cout(),
  30279. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1]~q ));
  30280. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .coord_x = 15;
  30281. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .coord_y = 10;
  30282. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .coord_z = 8;
  30283. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .mask = 16'h0033;
  30284. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .modeMux = 1'b0;
  30285. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  30286. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  30287. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .BypassEn = 1'b1;
  30288. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  30289. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] (
  30290. .A(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30291. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30292. .C(\rv32.mem_ahb_hwdata[2] ),
  30293. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30294. .Cin(),
  30295. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2]~q ),
  30296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30297. .AsyncReset(AsyncReset_X61_Y9_GND),
  30298. .SyncReset(SyncReset_X61_Y9_GND),
  30299. .ShiftData(),
  30300. .SyncLoad(SyncLoad_X61_Y9_VCC),
  30301. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout ),
  30302. .Cout(),
  30303. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2]~q ));
  30304. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .coord_x = 15;
  30305. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .coord_y = 10;
  30306. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .coord_z = 5;
  30307. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .mask = 16'hEEAA;
  30308. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .modeMux = 1'b0;
  30309. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  30310. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  30311. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .BypassEn = 1'b1;
  30312. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  30313. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] (
  30314. .A(vcc),
  30315. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  30316. .C(\rv32.mem_ahb_hwdata[3] ),
  30317. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  30318. .Cin(),
  30319. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3]~q ),
  30320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30321. .AsyncReset(AsyncReset_X61_Y9_GND),
  30322. .SyncReset(SyncReset_X61_Y9_GND),
  30323. .ShiftData(),
  30324. .SyncLoad(SyncLoad_X61_Y9_VCC),
  30325. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector5~3_combout ),
  30326. .Cout(),
  30327. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3]~q ));
  30328. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .coord_x = 15;
  30329. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .coord_y = 10;
  30330. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .coord_z = 15;
  30331. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .mask = 16'h3300;
  30332. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .modeMux = 1'b0;
  30333. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  30334. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  30335. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .BypassEn = 1'b1;
  30336. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  30337. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] (
  30338. .A(),
  30339. .B(),
  30340. .C(vcc),
  30341. .D(\rv32.mem_ahb_hwdata[4] ),
  30342. .Cin(),
  30343. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]~q ),
  30344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30345. .AsyncReset(AsyncReset_X61_Y9_GND),
  30346. .SyncReset(),
  30347. .ShiftData(),
  30348. .SyncLoad(),
  30349. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  30350. .Cout(),
  30351. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]~q ));
  30352. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .coord_x = 15;
  30353. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .coord_y = 10;
  30354. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .coord_z = 10;
  30355. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  30356. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  30357. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  30358. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  30359. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  30360. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  30361. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] (
  30362. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ),
  30363. .B(vcc),
  30364. .C(\rv32.mem_ahb_hwdata[5] ),
  30365. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  30366. .Cin(),
  30367. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5]~q ),
  30368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30369. .AsyncReset(AsyncReset_X61_Y9_GND),
  30370. .SyncReset(SyncReset_X61_Y9_GND),
  30371. .ShiftData(),
  30372. .SyncLoad(SyncLoad_X61_Y9_VCC),
  30373. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector3~0_combout ),
  30374. .Cout(),
  30375. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5]~q ));
  30376. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .coord_x = 15;
  30377. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .coord_y = 10;
  30378. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .coord_z = 3;
  30379. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .mask = 16'h00AA;
  30380. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .modeMux = 1'b0;
  30381. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  30382. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  30383. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .BypassEn = 1'b1;
  30384. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  30385. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] (
  30386. .A(),
  30387. .B(),
  30388. .C(vcc),
  30389. .D(\rv32.mem_ahb_hwdata[6] ),
  30390. .Cin(),
  30391. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]~q ),
  30392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30393. .AsyncReset(AsyncReset_X61_Y9_GND),
  30394. .SyncReset(),
  30395. .ShiftData(),
  30396. .SyncLoad(),
  30397. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  30398. .Cout(),
  30399. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]~q ));
  30400. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .coord_x = 15;
  30401. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .coord_y = 10;
  30402. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .coord_z = 2;
  30403. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  30404. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  30405. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  30406. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  30407. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  30408. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  30409. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] (
  30410. .A(),
  30411. .B(),
  30412. .C(vcc),
  30413. .D(\rv32.mem_ahb_hwdata[7] ),
  30414. .Cin(),
  30415. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]~q ),
  30416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_fifo|wrreq~0_combout_X61_Y9_SIG_SIG ),
  30417. .AsyncReset(AsyncReset_X61_Y9_GND),
  30418. .SyncReset(),
  30419. .ShiftData(),
  30420. .SyncLoad(),
  30421. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  30422. .Cout(),
  30423. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]~q ));
  30424. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .coord_x = 15;
  30425. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .coord_y = 10;
  30426. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .coord_z = 11;
  30427. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  30428. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  30429. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  30430. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  30431. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  30432. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  30433. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_parity (
  30434. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~0_combout ),
  30435. .B(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  30436. .C(vcc),
  30437. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30438. .Cin(),
  30439. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~q ),
  30440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  30441. .AsyncReset(AsyncReset_X45_Y1_GND),
  30442. .SyncReset(),
  30443. .ShiftData(),
  30444. .SyncLoad(),
  30445. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~1_combout ),
  30446. .Cout(),
  30447. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~q ));
  30448. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .coord_x = 4;
  30449. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .coord_y = 3;
  30450. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .coord_z = 8;
  30451. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .mask = 16'h335A;
  30452. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .modeMux = 1'b0;
  30453. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .FeedbackMux = 1'b1;
  30454. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .ShiftMux = 1'b0;
  30455. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .BypassEn = 1'b0;
  30456. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity .CarryEnb = 1'b1;
  30457. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 (
  30458. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  30459. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30460. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30461. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0]),
  30462. .Cin(),
  30463. .Qin(),
  30464. .Clk(),
  30465. .AsyncReset(),
  30466. .SyncReset(),
  30467. .ShiftData(),
  30468. .SyncLoad(),
  30469. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_parity~0_combout ),
  30470. .Cout(),
  30471. .Q());
  30472. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .coord_x = 4;
  30473. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .coord_y = 3;
  30474. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .coord_z = 14;
  30475. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .mask = 16'h4000;
  30476. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .modeMux = 1'b0;
  30477. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .FeedbackMux = 1'b0;
  30478. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .ShiftMux = 1'b0;
  30479. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .BypassEn = 1'b0;
  30480. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_parity~0 .CarryEnb = 1'b1;
  30481. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] (
  30482. .A(vcc),
  30483. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30484. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][0]~q ),
  30485. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [1]),
  30486. .Cin(),
  30487. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0]),
  30488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30489. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30490. .SyncReset(),
  30491. .ShiftData(),
  30492. .SyncLoad(),
  30493. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~0_combout ),
  30494. .Cout(),
  30495. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0]));
  30496. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .coord_x = 15;
  30497. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .coord_y = 10;
  30498. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .coord_z = 0;
  30499. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .mask = 16'hF3C0;
  30500. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .modeMux = 1'b0;
  30501. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  30502. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .ShiftMux = 1'b0;
  30503. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .BypassEn = 1'b0;
  30504. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[0] .CarryEnb = 1'b1;
  30505. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] (
  30506. .A(vcc),
  30507. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30508. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][1]~q ),
  30509. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [2]),
  30510. .Cin(),
  30511. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [1]),
  30512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30514. .SyncReset(),
  30515. .ShiftData(),
  30516. .SyncLoad(),
  30517. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~2_combout ),
  30518. .Cout(),
  30519. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [1]));
  30520. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .coord_x = 15;
  30521. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .coord_y = 10;
  30522. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .coord_z = 9;
  30523. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .mask = 16'hF3C0;
  30524. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .modeMux = 1'b0;
  30525. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  30526. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .ShiftMux = 1'b0;
  30527. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .BypassEn = 1'b0;
  30528. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[1] .CarryEnb = 1'b1;
  30529. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] (
  30530. .A(vcc),
  30531. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30532. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [3]),
  30533. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][2]~q ),
  30534. .Cin(),
  30535. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [2]),
  30536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30538. .SyncReset(),
  30539. .ShiftData(),
  30540. .SyncLoad(),
  30541. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~3_combout ),
  30542. .Cout(),
  30543. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [2]));
  30544. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .coord_x = 15;
  30545. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .coord_y = 10;
  30546. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .coord_z = 1;
  30547. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .mask = 16'hFC30;
  30548. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .modeMux = 1'b0;
  30549. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  30550. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .ShiftMux = 1'b0;
  30551. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .BypassEn = 1'b0;
  30552. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[2] .CarryEnb = 1'b1;
  30553. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] (
  30554. .A(vcc),
  30555. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30556. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [4]),
  30557. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][3]~q ),
  30558. .Cin(),
  30559. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [3]),
  30560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30562. .SyncReset(),
  30563. .ShiftData(),
  30564. .SyncLoad(),
  30565. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~4_combout ),
  30566. .Cout(),
  30567. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [3]));
  30568. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .coord_x = 15;
  30569. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .coord_y = 10;
  30570. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .coord_z = 14;
  30571. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .mask = 16'hFC30;
  30572. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .modeMux = 1'b0;
  30573. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  30574. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .ShiftMux = 1'b0;
  30575. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .BypassEn = 1'b0;
  30576. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[3] .CarryEnb = 1'b1;
  30577. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] (
  30578. .A(vcc),
  30579. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30580. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][4]~q ),
  30581. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [5]),
  30582. .Cin(),
  30583. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [4]),
  30584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30586. .SyncReset(),
  30587. .ShiftData(),
  30588. .SyncLoad(),
  30589. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~5_combout ),
  30590. .Cout(),
  30591. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [4]));
  30592. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .coord_x = 15;
  30593. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .coord_y = 10;
  30594. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .coord_z = 6;
  30595. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .mask = 16'hF3C0;
  30596. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .modeMux = 1'b0;
  30597. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  30598. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .ShiftMux = 1'b0;
  30599. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .BypassEn = 1'b0;
  30600. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[4] .CarryEnb = 1'b1;
  30601. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] (
  30602. .A(vcc),
  30603. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30604. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [6]),
  30605. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][5]~q ),
  30606. .Cin(),
  30607. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [5]),
  30608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30610. .SyncReset(),
  30611. .ShiftData(),
  30612. .SyncLoad(),
  30613. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~6_combout ),
  30614. .Cout(),
  30615. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [5]));
  30616. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .coord_x = 15;
  30617. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .coord_y = 10;
  30618. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .coord_z = 13;
  30619. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .mask = 16'hFC30;
  30620. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .modeMux = 1'b0;
  30621. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  30622. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .ShiftMux = 1'b0;
  30623. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .BypassEn = 1'b0;
  30624. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[5] .CarryEnb = 1'b1;
  30625. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] (
  30626. .A(vcc),
  30627. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30628. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][6]~q ),
  30629. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [7]),
  30630. .Cin(),
  30631. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [6]),
  30632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30634. .SyncReset(),
  30635. .ShiftData(),
  30636. .SyncLoad(),
  30637. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~7_combout ),
  30638. .Cout(),
  30639. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [6]));
  30640. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .coord_x = 15;
  30641. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .coord_y = 10;
  30642. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .coord_z = 12;
  30643. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .mask = 16'hF3C0;
  30644. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .modeMux = 1'b0;
  30645. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  30646. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .ShiftMux = 1'b0;
  30647. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .BypassEn = 1'b0;
  30648. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[6] .CarryEnb = 1'b1;
  30649. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] (
  30650. .A(vcc),
  30651. .B(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30652. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [0]),
  30653. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|fifo[1][7]~q ),
  30654. .Cin(),
  30655. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [7]),
  30656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7]~1_combout_X61_Y9_SIG_SIG ),
  30657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y9_SIG ),
  30658. .SyncReset(),
  30659. .ShiftData(),
  30660. .SyncLoad(),
  30661. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg~8_combout ),
  30662. .Cout(),
  30663. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg [7]));
  30664. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .coord_x = 15;
  30665. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .coord_y = 10;
  30666. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .coord_z = 7;
  30667. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .mask = 16'hFC30;
  30668. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .modeMux = 1'b0;
  30669. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  30670. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .ShiftMux = 1'b0;
  30671. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .BypassEn = 1'b0;
  30672. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_shift_reg[7] .CarryEnb = 1'b1;
  30673. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA (
  30674. .A(\macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ),
  30675. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30676. .C(vcc),
  30677. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30678. .Cin(),
  30679. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  30681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  30682. .SyncReset(),
  30683. .ShiftData(),
  30684. .SyncLoad(),
  30685. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector2~0_combout ),
  30686. .Cout(),
  30687. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ));
  30688. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .coord_x = 4;
  30689. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .coord_y = 3;
  30690. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .coord_z = 2;
  30691. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .mask = 16'hDC50;
  30692. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .modeMux = 1'b0;
  30693. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  30694. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .ShiftMux = 1'b0;
  30695. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .BypassEn = 1'b0;
  30696. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA .CarryEnb = 1'b1;
  30697. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE (
  30698. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_fifo|counter [0]),
  30699. .B(vcc),
  30700. .C(vcc),
  30701. .D(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  30702. .Cin(),
  30703. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  30704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  30705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  30706. .SyncReset(),
  30707. .ShiftData(),
  30708. .SyncLoad(),
  30709. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector0~0_combout ),
  30710. .Cout(),
  30711. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ));
  30712. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .coord_x = 8;
  30713. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .coord_y = 2;
  30714. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .coord_z = 9;
  30715. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .mask = 16'hAAFA;
  30716. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .modeMux = 1'b0;
  30717. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  30718. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  30719. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .BypassEn = 1'b0;
  30720. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  30721. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY (
  30722. .A(\macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ),
  30723. .B(\macro_inst|u_uart[0]|u_tx[1]|Selector3~0_combout ),
  30724. .C(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  30725. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30726. .Cin(),
  30727. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ),
  30728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  30729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  30730. .SyncReset(),
  30731. .ShiftData(),
  30732. .SyncLoad(),
  30733. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector3~1_combout ),
  30734. .Cout(),
  30735. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY~q ));
  30736. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .coord_x = 3;
  30737. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .coord_y = 3;
  30738. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .coord_z = 0;
  30739. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .mask = 16'hECCC;
  30740. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .modeMux = 1'b0;
  30741. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  30742. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  30743. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .BypassEn = 1'b0;
  30744. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  30745. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START (
  30746. .A(\macro_inst|u_uart[0]|u_tx[1]|comb~1_combout ),
  30747. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0_combout ),
  30748. .C(vcc),
  30749. .D(\macro_inst|u_uart[0]|u_tx[1]|fifo_rden~combout ),
  30750. .Cin(),
  30751. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  30753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  30754. .SyncReset(),
  30755. .ShiftData(),
  30756. .SyncLoad(),
  30757. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~1_combout ),
  30758. .Cout(),
  30759. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ));
  30760. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .coord_x = 8;
  30761. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .coord_y = 2;
  30762. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .coord_z = 12;
  30763. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .mask = 16'hFF40;
  30764. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .modeMux = 1'b0;
  30765. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .FeedbackMux = 1'b1;
  30766. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .ShiftMux = 1'b0;
  30767. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .BypassEn = 1'b0;
  30768. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START .CarryEnb = 1'b1;
  30769. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 (
  30770. .A(\macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ),
  30771. .B(\macro_inst|u_uart[0]|u_tx[1]|Selector5~3_combout ),
  30772. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30773. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30774. .Cin(),
  30775. .Qin(),
  30776. .Clk(),
  30777. .AsyncReset(),
  30778. .SyncReset(),
  30779. .ShiftData(),
  30780. .SyncLoad(),
  30781. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0_combout ),
  30782. .Cout(),
  30783. .Q());
  30784. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .coord_x = 4;
  30785. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .coord_y = 3;
  30786. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .coord_z = 3;
  30787. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .mask = 16'h737F;
  30788. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .modeMux = 1'b0;
  30789. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  30790. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  30791. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .BypassEn = 1'b0;
  30792. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  30793. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP (
  30794. .A(\macro_inst|u_uart[0]|u_tx[1]|Selector4~0_combout ),
  30795. .B(\macro_inst|u_uart[0]|u_tx[1]|always0~0_combout ),
  30796. .C(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  30797. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_DATA~q ),
  30798. .Cin(),
  30799. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  30800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X46_Y1_SIG_VCC ),
  30801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y1_SIG ),
  30802. .SyncReset(),
  30803. .ShiftData(),
  30804. .SyncLoad(),
  30805. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector4~1_combout ),
  30806. .Cout(),
  30807. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ));
  30808. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .coord_x = 3;
  30809. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .coord_y = 3;
  30810. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .coord_z = 12;
  30811. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .mask = 16'hAEAA;
  30812. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .modeMux = 1'b0;
  30813. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  30814. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .ShiftMux = 1'b0;
  30815. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .BypassEn = 1'b0;
  30816. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP .CarryEnb = 1'b1;
  30817. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt (
  30818. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30819. .B(vcc),
  30820. .C(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  30821. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0_combout ),
  30822. .Cin(),
  30823. .Qin(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ),
  30824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  30825. .AsyncReset(AsyncReset_X61_Y1_GND),
  30826. .SyncReset(),
  30827. .ShiftData(),
  30828. .SyncLoad(),
  30829. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~1_combout ),
  30830. .Cout(),
  30831. .Q(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ));
  30832. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .coord_x = 8;
  30833. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .coord_y = 2;
  30834. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .coord_z = 7;
  30835. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .mask = 16'hFFA0;
  30836. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .modeMux = 1'b0;
  30837. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .FeedbackMux = 1'b0;
  30838. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .ShiftMux = 1'b0;
  30839. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .BypassEn = 1'b0;
  30840. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt .CarryEnb = 1'b1;
  30841. alta_slice \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 (
  30842. .A(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  30843. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~q ),
  30844. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_START~q ),
  30845. .D(\macro_inst|u_uart[0]|u_tx[1]|tx_bit~q ),
  30846. .Cin(),
  30847. .Qin(),
  30848. .Clk(),
  30849. .AsyncReset(),
  30850. .SyncReset(),
  30851. .ShiftData(),
  30852. .SyncLoad(),
  30853. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0_combout ),
  30854. .Cout(),
  30855. .Q());
  30856. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .coord_x = 8;
  30857. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .coord_y = 2;
  30858. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .coord_z = 13;
  30859. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .mask = 16'h060C;
  30860. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .modeMux = 1'b0;
  30861. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  30862. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  30863. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .BypassEn = 1'b0;
  30864. defparam \macro_inst|u_uart[0]|u_tx[1]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  30865. alta_slice \macro_inst|u_uart[0]|u_tx[1]|uart_txd (
  30866. .A(vcc),
  30867. .B(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_STOP~q ),
  30868. .C(\macro_inst|u_uart[0]|u_tx[1]|tx_state.UART_IDLE~q ),
  30869. .D(\macro_inst|u_uart[0]|u_tx[1]|Selector5~2_combout ),
  30870. .Cin(),
  30871. .Qin(\macro_inst|u_uart[0]|u_tx[1]|uart_txd~q ),
  30872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  30873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  30874. .SyncReset(),
  30875. .ShiftData(),
  30876. .SyncLoad(),
  30877. .LutOut(\macro_inst|u_uart[0]|u_tx[1]|Selector5~4_combout ),
  30878. .Cout(),
  30879. .Q(\macro_inst|u_uart[0]|u_tx[1]|uart_txd~q ));
  30880. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .coord_x = 4;
  30881. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .coord_y = 3;
  30882. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .coord_z = 10;
  30883. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .mask = 16'h0030;
  30884. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .modeMux = 1'b0;
  30885. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .FeedbackMux = 1'b0;
  30886. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .ShiftMux = 1'b0;
  30887. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .BypassEn = 1'b0;
  30888. defparam \macro_inst|u_uart[0]|u_tx[1]|uart_txd .CarryEnb = 1'b1;
  30889. alta_slice \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 (
  30890. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ),
  30891. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  30892. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ),
  30893. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  30894. .Cin(),
  30895. .Qin(),
  30896. .Clk(),
  30897. .AsyncReset(),
  30898. .SyncReset(),
  30899. .ShiftData(),
  30900. .SyncLoad(),
  30901. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector4~0_combout ),
  30902. .Cout(),
  30903. .Q());
  30904. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .coord_x = 11;
  30905. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .coord_y = 1;
  30906. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .coord_z = 2;
  30907. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .mask = 16'hEACC;
  30908. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .modeMux = 1'b0;
  30909. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .FeedbackMux = 1'b0;
  30910. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .ShiftMux = 1'b0;
  30911. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .BypassEn = 1'b0;
  30912. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector4~0 .CarryEnb = 1'b1;
  30913. alta_slice \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 (
  30914. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~q ),
  30915. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0]),
  30916. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ),
  30917. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  30918. .Cin(),
  30919. .Qin(),
  30920. .Clk(),
  30921. .AsyncReset(),
  30922. .SyncReset(),
  30923. .ShiftData(),
  30924. .SyncLoad(),
  30925. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector5~2_combout ),
  30926. .Cout(),
  30927. .Q());
  30928. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .coord_x = 9;
  30929. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .coord_y = 1;
  30930. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .coord_z = 7;
  30931. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .mask = 16'hECA0;
  30932. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .modeMux = 1'b0;
  30933. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .FeedbackMux = 1'b0;
  30934. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .ShiftMux = 1'b0;
  30935. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .BypassEn = 1'b0;
  30936. defparam \macro_inst|u_uart[0]|u_tx[2]|Selector5~2 .CarryEnb = 1'b1;
  30937. alta_slice \macro_inst|u_uart[0]|u_tx[2]|always0~0 (
  30938. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  30939. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [2]),
  30940. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [1]),
  30941. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0]),
  30942. .Cin(),
  30943. .Qin(),
  30944. .Clk(),
  30945. .AsyncReset(),
  30946. .SyncReset(),
  30947. .ShiftData(),
  30948. .SyncLoad(),
  30949. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ),
  30950. .Cout(),
  30951. .Q());
  30952. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .coord_x = 8;
  30953. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .coord_y = 1;
  30954. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .coord_z = 1;
  30955. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .mask = 16'h0002;
  30956. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .modeMux = 1'b0;
  30957. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .FeedbackMux = 1'b0;
  30958. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .ShiftMux = 1'b0;
  30959. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .BypassEn = 1'b0;
  30960. defparam \macro_inst|u_uart[0]|u_tx[2]|always0~0 .CarryEnb = 1'b1;
  30961. alta_slice \macro_inst|u_uart[0]|u_tx[2]|always6~0 (
  30962. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  30963. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [2]),
  30964. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [1]),
  30965. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [0]),
  30966. .Cin(),
  30967. .Qin(),
  30968. .Clk(),
  30969. .AsyncReset(),
  30970. .SyncReset(),
  30971. .ShiftData(),
  30972. .SyncLoad(),
  30973. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|always6~0_combout ),
  30974. .Cout(),
  30975. .Q());
  30976. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .coord_x = 8;
  30977. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .coord_y = 1;
  30978. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .coord_z = 12;
  30979. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .mask = 16'h8000;
  30980. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .modeMux = 1'b0;
  30981. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .FeedbackMux = 1'b0;
  30982. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .ShiftMux = 1'b0;
  30983. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .BypassEn = 1'b0;
  30984. defparam \macro_inst|u_uart[0]|u_tx[2]|always6~0 .CarryEnb = 1'b1;
  30985. alta_slice \macro_inst|u_uart[0]|u_tx[2]|comb~1 (
  30986. .A(vcc),
  30987. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  30988. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ),
  30989. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  30990. .Cin(),
  30991. .Qin(),
  30992. .Clk(),
  30993. .AsyncReset(),
  30994. .SyncReset(),
  30995. .ShiftData(),
  30996. .SyncLoad(),
  30997. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  30998. .Cout(),
  30999. .Q());
  31000. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .coord_x = 11;
  31001. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .coord_y = 1;
  31002. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .coord_z = 6;
  31003. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .mask = 16'h0C00;
  31004. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .modeMux = 1'b0;
  31005. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .FeedbackMux = 1'b0;
  31006. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .ShiftMux = 1'b0;
  31007. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .BypassEn = 1'b0;
  31008. defparam \macro_inst|u_uart[0]|u_tx[2]|comb~1 .CarryEnb = 1'b1;
  31009. alta_slice \macro_inst|u_uart[0]|u_tx[2]|fifo_rden (
  31010. .A(vcc),
  31011. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  31012. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31013. .D(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  31014. .Cin(),
  31015. .Qin(),
  31016. .Clk(),
  31017. .AsyncReset(),
  31018. .SyncReset(),
  31019. .ShiftData(),
  31020. .SyncLoad(),
  31021. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31022. .Cout(),
  31023. .Q());
  31024. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .coord_x = 8;
  31025. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .coord_y = 1;
  31026. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .coord_z = 11;
  31027. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .mask = 16'hF030;
  31028. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .modeMux = 1'b0;
  31029. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .FeedbackMux = 1'b0;
  31030. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .ShiftMux = 1'b0;
  31031. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .BypassEn = 1'b0;
  31032. defparam \macro_inst|u_uart[0]|u_tx[2]|fifo_rden .CarryEnb = 1'b1;
  31033. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] (
  31034. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [0]),
  31035. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  31036. .C(vcc),
  31037. .D(vcc),
  31038. .Cin(),
  31039. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [0]),
  31040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31042. .SyncReset(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ),
  31043. .ShiftData(),
  31044. .SyncLoad(SyncLoad_X62_Y1_GND),
  31045. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0]~4_combout ),
  31046. .Cout(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0]~5 ),
  31047. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [0]));
  31048. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .coord_x = 8;
  31049. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .coord_y = 1;
  31050. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .coord_z = 7;
  31051. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .mask = 16'h6688;
  31052. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .modeMux = 1'b0;
  31053. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  31054. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  31055. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .BypassEn = 1'b1;
  31056. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  31057. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] (
  31058. .A(vcc),
  31059. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [1]),
  31060. .C(vcc),
  31061. .D(vcc),
  31062. .Cin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[0]~5 ),
  31063. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [1]),
  31064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31066. .SyncReset(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ),
  31067. .ShiftData(),
  31068. .SyncLoad(SyncLoad_X62_Y1_GND),
  31069. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1]~6_combout ),
  31070. .Cout(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1]~7 ),
  31071. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [1]));
  31072. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .coord_x = 8;
  31073. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .coord_y = 1;
  31074. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .coord_z = 8;
  31075. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .mask = 16'h3C3F;
  31076. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .modeMux = 1'b1;
  31077. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  31078. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  31079. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .BypassEn = 1'b1;
  31080. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  31081. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] (
  31082. .A(vcc),
  31083. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [2]),
  31084. .C(vcc),
  31085. .D(vcc),
  31086. .Cin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[1]~7 ),
  31087. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [2]),
  31088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31090. .SyncReset(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ),
  31091. .ShiftData(),
  31092. .SyncLoad(SyncLoad_X62_Y1_GND),
  31093. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2]~8_combout ),
  31094. .Cout(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2]~9 ),
  31095. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [2]));
  31096. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .coord_x = 8;
  31097. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .coord_y = 1;
  31098. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .coord_z = 9;
  31099. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .mask = 16'hC30C;
  31100. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .modeMux = 1'b1;
  31101. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  31102. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  31103. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .BypassEn = 1'b1;
  31104. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  31105. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] (
  31106. .A(vcc),
  31107. .B(vcc),
  31108. .C(vcc),
  31109. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [3]),
  31110. .Cin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[2]~9 ),
  31111. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [3]),
  31112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31114. .SyncReset(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ),
  31115. .ShiftData(),
  31116. .SyncLoad(SyncLoad_X62_Y1_GND),
  31117. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3]~10_combout ),
  31118. .Cout(),
  31119. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [3]));
  31120. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .coord_x = 8;
  31121. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .coord_y = 1;
  31122. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .coord_z = 10;
  31123. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .mask = 16'h0FF0;
  31124. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .modeMux = 1'b1;
  31125. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  31126. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  31127. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .BypassEn = 1'b1;
  31128. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  31129. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_bit (
  31130. .A(vcc),
  31131. .B(vcc),
  31132. .C(\macro_inst|u_uart[0]|u_tx[2]|always6~0_combout ),
  31133. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_baud_cnt [3]),
  31134. .Cin(),
  31135. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y1_SIG_VCC ),
  31137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y1_SIG ),
  31138. .SyncReset(),
  31139. .ShiftData(),
  31140. .SyncLoad(),
  31141. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|always6~1_combout ),
  31142. .Cout(),
  31143. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ));
  31144. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .coord_x = 8;
  31145. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .coord_y = 2;
  31146. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .coord_z = 6;
  31147. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .mask = 16'hF000;
  31148. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .modeMux = 1'b0;
  31149. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .FeedbackMux = 1'b0;
  31150. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .ShiftMux = 1'b0;
  31151. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .BypassEn = 1'b0;
  31152. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_bit .CarryEnb = 1'b1;
  31153. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_complete (
  31154. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31155. .B(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  31156. .C(vcc),
  31157. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[2]~14_combout ),
  31158. .Cin(),
  31159. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_complete~q ),
  31160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  31161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  31162. .SyncReset(),
  31163. .ShiftData(),
  31164. .SyncLoad(),
  31165. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_complete~0_combout ),
  31166. .Cout(),
  31167. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_complete~q ));
  31168. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .coord_x = 12;
  31169. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .coord_y = 2;
  31170. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .coord_z = 4;
  31171. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .mask = 16'h5444;
  31172. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .modeMux = 1'b0;
  31173. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .FeedbackMux = 1'b1;
  31174. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .ShiftMux = 1'b0;
  31175. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .BypassEn = 1'b0;
  31176. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_complete .CarryEnb = 1'b1;
  31177. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] (
  31178. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31179. .B(vcc),
  31180. .C(vcc),
  31181. .D(vcc),
  31182. .Cin(),
  31183. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0]),
  31184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout_X62_Y1_SIG_SIG ),
  31185. .AsyncReset(AsyncReset_X62_Y1_GND),
  31186. .SyncReset(),
  31187. .ShiftData(),
  31188. .SyncLoad(),
  31189. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~2_combout ),
  31190. .Cout(),
  31191. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0]));
  31192. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .coord_x = 8;
  31193. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .coord_y = 1;
  31194. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .coord_z = 3;
  31195. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .mask = 16'hAFAF;
  31196. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .modeMux = 1'b0;
  31197. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  31198. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .ShiftMux = 1'b0;
  31199. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .BypassEn = 1'b0;
  31200. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0] .CarryEnb = 1'b1;
  31201. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 (
  31202. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31203. .B(vcc),
  31204. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31205. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31206. .Cin(),
  31207. .Qin(),
  31208. .Clk(),
  31209. .AsyncReset(),
  31210. .SyncReset(),
  31211. .ShiftData(),
  31212. .SyncLoad(),
  31213. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout ),
  31214. .Cout(),
  31215. .Q());
  31216. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .coord_x = 8;
  31217. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .coord_y = 1;
  31218. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .coord_z = 4;
  31219. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .mask = 16'hFAF0;
  31220. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .modeMux = 1'b0;
  31221. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .FeedbackMux = 1'b0;
  31222. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .ShiftMux = 1'b0;
  31223. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .BypassEn = 1'b0;
  31224. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1 .CarryEnb = 1'b1;
  31225. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] (
  31226. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31227. .B(vcc),
  31228. .C(vcc),
  31229. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0]),
  31230. .Cin(),
  31231. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [1]),
  31232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout_X62_Y1_SIG_SIG ),
  31233. .AsyncReset(AsyncReset_X62_Y1_GND),
  31234. .SyncReset(),
  31235. .ShiftData(),
  31236. .SyncLoad(),
  31237. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~0_combout ),
  31238. .Cout(),
  31239. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [1]));
  31240. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .coord_x = 8;
  31241. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .coord_y = 1;
  31242. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .coord_z = 6;
  31243. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .mask = 16'hFAAF;
  31244. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .modeMux = 1'b0;
  31245. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  31246. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .ShiftMux = 1'b0;
  31247. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .BypassEn = 1'b0;
  31248. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[1] .CarryEnb = 1'b1;
  31249. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] (
  31250. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [1]),
  31251. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31252. .C(vcc),
  31253. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [0]),
  31254. .Cin(),
  31255. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [2]),
  31256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[0]~1_combout_X62_Y1_SIG_SIG ),
  31257. .AsyncReset(AsyncReset_X62_Y1_GND),
  31258. .SyncReset(),
  31259. .ShiftData(),
  31260. .SyncLoad(),
  31261. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt~3_combout ),
  31262. .Cout(),
  31263. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt [2]));
  31264. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .coord_x = 8;
  31265. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .coord_y = 1;
  31266. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .coord_z = 13;
  31267. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .mask = 16'hFCED;
  31268. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .modeMux = 1'b0;
  31269. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  31270. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .ShiftMux = 1'b0;
  31271. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .BypassEn = 1'b0;
  31272. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_data_cnt[2] .CarryEnb = 1'b1;
  31273. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] (
  31274. .A(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  31275. .B(\macro_inst|u_uart[0]|u_regs|tx_write [2]),
  31276. .C(vcc),
  31277. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  31278. .Cin(),
  31279. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ),
  31281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  31282. .SyncReset(),
  31283. .ShiftData(),
  31284. .SyncLoad(),
  31285. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter~0_combout ),
  31286. .Cout(),
  31287. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]));
  31288. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .coord_x = 11;
  31289. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .coord_y = 1;
  31290. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .coord_z = 14;
  31291. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .mask = 16'h5C0C;
  31292. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .modeMux = 1'b0;
  31293. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  31294. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  31295. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .BypassEn = 1'b0;
  31296. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  31297. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] (
  31298. .A(),
  31299. .B(),
  31300. .C(vcc),
  31301. .D(\rv32.mem_ahb_hwdata[0] ),
  31302. .Cin(),
  31303. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]~q ),
  31304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31305. .AsyncReset(AsyncReset_X62_Y5_GND),
  31306. .SyncReset(),
  31307. .ShiftData(),
  31308. .SyncLoad(),
  31309. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  31310. .Cout(),
  31311. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]~q ));
  31312. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .coord_x = 14;
  31313. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .coord_y = 1;
  31314. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .coord_z = 15;
  31315. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  31316. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  31317. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  31318. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  31319. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  31320. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  31321. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] (
  31322. .A(),
  31323. .B(),
  31324. .C(vcc),
  31325. .D(\rv32.mem_ahb_hwdata[1] ),
  31326. .Cin(),
  31327. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]~q ),
  31328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31329. .AsyncReset(AsyncReset_X62_Y5_GND),
  31330. .SyncReset(),
  31331. .ShiftData(),
  31332. .SyncLoad(),
  31333. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  31334. .Cout(),
  31335. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]~q ));
  31336. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .coord_x = 14;
  31337. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .coord_y = 1;
  31338. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .coord_z = 5;
  31339. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  31340. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  31341. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  31342. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  31343. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  31344. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  31345. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] (
  31346. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31347. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31348. .C(\rv32.mem_ahb_hwdata[2] ),
  31349. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31350. .Cin(),
  31351. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2]~q ),
  31352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31353. .AsyncReset(AsyncReset_X62_Y5_GND),
  31354. .SyncReset(SyncReset_X62_Y5_GND),
  31355. .ShiftData(),
  31356. .SyncLoad(SyncLoad_X62_Y5_VCC),
  31357. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout ),
  31358. .Cout(),
  31359. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2]~q ));
  31360. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .coord_x = 14;
  31361. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .coord_y = 1;
  31362. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .coord_z = 10;
  31363. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .mask = 16'hFF88;
  31364. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .modeMux = 1'b0;
  31365. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  31366. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  31367. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .BypassEn = 1'b1;
  31368. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  31369. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] (
  31370. .A(),
  31371. .B(),
  31372. .C(vcc),
  31373. .D(\rv32.mem_ahb_hwdata[3] ),
  31374. .Cin(),
  31375. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]~q ),
  31376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31377. .AsyncReset(AsyncReset_X62_Y5_GND),
  31378. .SyncReset(),
  31379. .ShiftData(),
  31380. .SyncLoad(),
  31381. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  31382. .Cout(),
  31383. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]~q ));
  31384. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .coord_x = 14;
  31385. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .coord_y = 1;
  31386. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .coord_z = 9;
  31387. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  31388. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  31389. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  31390. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  31391. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  31392. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  31393. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] (
  31394. .A(),
  31395. .B(),
  31396. .C(vcc),
  31397. .D(\rv32.mem_ahb_hwdata[4] ),
  31398. .Cin(),
  31399. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]~q ),
  31400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31401. .AsyncReset(AsyncReset_X62_Y5_GND),
  31402. .SyncReset(),
  31403. .ShiftData(),
  31404. .SyncLoad(),
  31405. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  31406. .Cout(),
  31407. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]~q ));
  31408. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .coord_x = 14;
  31409. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .coord_y = 1;
  31410. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .coord_z = 11;
  31411. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  31412. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  31413. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  31414. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  31415. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  31416. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  31417. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] (
  31418. .A(),
  31419. .B(),
  31420. .C(vcc),
  31421. .D(\rv32.mem_ahb_hwdata[5] ),
  31422. .Cin(),
  31423. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]~q ),
  31424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31425. .AsyncReset(AsyncReset_X62_Y5_GND),
  31426. .SyncReset(),
  31427. .ShiftData(),
  31428. .SyncLoad(),
  31429. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  31430. .Cout(),
  31431. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]~q ));
  31432. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .coord_x = 14;
  31433. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .coord_y = 1;
  31434. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .coord_z = 3;
  31435. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  31436. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  31437. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  31438. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  31439. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  31440. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  31441. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] (
  31442. .A(),
  31443. .B(),
  31444. .C(vcc),
  31445. .D(\rv32.mem_ahb_hwdata[6] ),
  31446. .Cin(),
  31447. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]~q ),
  31448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31449. .AsyncReset(AsyncReset_X62_Y5_GND),
  31450. .SyncReset(),
  31451. .ShiftData(),
  31452. .SyncLoad(),
  31453. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  31454. .Cout(),
  31455. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]~q ));
  31456. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .coord_x = 14;
  31457. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .coord_y = 1;
  31458. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .coord_z = 7;
  31459. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  31460. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  31461. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  31462. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  31463. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  31464. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  31465. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] (
  31466. .A(),
  31467. .B(),
  31468. .C(vcc),
  31469. .D(\rv32.mem_ahb_hwdata[7] ),
  31470. .Cin(),
  31471. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]~q ),
  31472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout_X62_Y5_SIG_SIG ),
  31473. .AsyncReset(AsyncReset_X62_Y5_GND),
  31474. .SyncReset(),
  31475. .ShiftData(),
  31476. .SyncLoad(),
  31477. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  31478. .Cout(),
  31479. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]~q ));
  31480. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .coord_x = 14;
  31481. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .coord_y = 1;
  31482. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .coord_z = 8;
  31483. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  31484. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  31485. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  31486. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  31487. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  31488. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  31489. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 (
  31490. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31491. .B(vcc),
  31492. .C(\macro_inst|u_uart[0]|u_regs|tx_write [2]),
  31493. .D(vcc),
  31494. .Cin(),
  31495. .Qin(),
  31496. .Clk(),
  31497. .AsyncReset(),
  31498. .SyncReset(),
  31499. .ShiftData(),
  31500. .SyncLoad(),
  31501. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0_combout ),
  31502. .Cout(),
  31503. .Q());
  31504. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .coord_x = 15;
  31505. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .coord_y = 1;
  31506. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .coord_z = 3;
  31507. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .mask = 16'h5050;
  31508. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .modeMux = 1'b0;
  31509. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  31510. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .ShiftMux = 1'b0;
  31511. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .BypassEn = 1'b0;
  31512. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_fifo|wrreq~0 .CarryEnb = 1'b1;
  31513. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_parity (
  31514. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~0_combout ),
  31515. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31516. .C(vcc),
  31517. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  31518. .Cin(),
  31519. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~q ),
  31520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  31521. .AsyncReset(AsyncReset_X59_Y1_GND),
  31522. .SyncReset(),
  31523. .ShiftData(),
  31524. .SyncLoad(),
  31525. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~1_combout ),
  31526. .Cout(),
  31527. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~q ));
  31528. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .coord_x = 9;
  31529. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .coord_y = 1;
  31530. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .coord_z = 10;
  31531. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .mask = 16'h12DE;
  31532. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .modeMux = 1'b0;
  31533. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .FeedbackMux = 1'b1;
  31534. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .ShiftMux = 1'b0;
  31535. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .BypassEn = 1'b0;
  31536. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity .CarryEnb = 1'b1;
  31537. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 (
  31538. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31539. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31540. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0]),
  31541. .D(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  31542. .Cin(),
  31543. .Qin(),
  31544. .Clk(),
  31545. .AsyncReset(),
  31546. .SyncReset(),
  31547. .ShiftData(),
  31548. .SyncLoad(),
  31549. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_parity~0_combout ),
  31550. .Cout(),
  31551. .Q());
  31552. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .coord_x = 9;
  31553. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .coord_y = 1;
  31554. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .coord_z = 0;
  31555. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .mask = 16'h0080;
  31556. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .modeMux = 1'b0;
  31557. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .FeedbackMux = 1'b0;
  31558. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .ShiftMux = 1'b0;
  31559. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .BypassEn = 1'b0;
  31560. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_parity~0 .CarryEnb = 1'b1;
  31561. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] (
  31562. .A(vcc),
  31563. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][0]~q ),
  31564. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [1]),
  31565. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31566. .Cin(),
  31567. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0]),
  31568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31570. .SyncReset(),
  31571. .ShiftData(),
  31572. .SyncLoad(),
  31573. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~0_combout ),
  31574. .Cout(),
  31575. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0]));
  31576. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .coord_x = 14;
  31577. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .coord_y = 1;
  31578. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .coord_z = 1;
  31579. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .mask = 16'hCCF0;
  31580. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .modeMux = 1'b0;
  31581. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  31582. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .ShiftMux = 1'b0;
  31583. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .BypassEn = 1'b0;
  31584. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[0] .CarryEnb = 1'b1;
  31585. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] (
  31586. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [2]),
  31587. .B(vcc),
  31588. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][1]~q ),
  31589. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31590. .Cin(),
  31591. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [1]),
  31592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31594. .SyncReset(),
  31595. .ShiftData(),
  31596. .SyncLoad(),
  31597. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~2_combout ),
  31598. .Cout(),
  31599. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [1]));
  31600. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .coord_x = 14;
  31601. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .coord_y = 1;
  31602. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .coord_z = 4;
  31603. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .mask = 16'hF0AA;
  31604. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .modeMux = 1'b0;
  31605. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  31606. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .ShiftMux = 1'b0;
  31607. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .BypassEn = 1'b0;
  31608. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[1] .CarryEnb = 1'b1;
  31609. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] (
  31610. .A(vcc),
  31611. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [3]),
  31612. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][2]~q ),
  31613. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31614. .Cin(),
  31615. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [2]),
  31616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31618. .SyncReset(),
  31619. .ShiftData(),
  31620. .SyncLoad(),
  31621. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~3_combout ),
  31622. .Cout(),
  31623. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [2]));
  31624. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .coord_x = 14;
  31625. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .coord_y = 1;
  31626. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .coord_z = 12;
  31627. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .mask = 16'hF0CC;
  31628. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .modeMux = 1'b0;
  31629. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  31630. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .ShiftMux = 1'b0;
  31631. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .BypassEn = 1'b0;
  31632. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[2] .CarryEnb = 1'b1;
  31633. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] (
  31634. .A(vcc),
  31635. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][3]~q ),
  31636. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [4]),
  31637. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31638. .Cin(),
  31639. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [3]),
  31640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31642. .SyncReset(),
  31643. .ShiftData(),
  31644. .SyncLoad(),
  31645. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~4_combout ),
  31646. .Cout(),
  31647. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [3]));
  31648. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .coord_x = 14;
  31649. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .coord_y = 1;
  31650. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .coord_z = 13;
  31651. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .mask = 16'hCCF0;
  31652. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .modeMux = 1'b0;
  31653. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  31654. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .ShiftMux = 1'b0;
  31655. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .BypassEn = 1'b0;
  31656. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[3] .CarryEnb = 1'b1;
  31657. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] (
  31658. .A(vcc),
  31659. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][4]~q ),
  31660. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [5]),
  31661. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31662. .Cin(),
  31663. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [4]),
  31664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31666. .SyncReset(),
  31667. .ShiftData(),
  31668. .SyncLoad(),
  31669. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~5_combout ),
  31670. .Cout(),
  31671. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [4]));
  31672. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .coord_x = 14;
  31673. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .coord_y = 1;
  31674. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .coord_z = 0;
  31675. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .mask = 16'hCCF0;
  31676. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .modeMux = 1'b0;
  31677. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  31678. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .ShiftMux = 1'b0;
  31679. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .BypassEn = 1'b0;
  31680. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[4] .CarryEnb = 1'b1;
  31681. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] (
  31682. .A(vcc),
  31683. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][5]~q ),
  31684. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [6]),
  31685. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31686. .Cin(),
  31687. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [5]),
  31688. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31689. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31690. .SyncReset(),
  31691. .ShiftData(),
  31692. .SyncLoad(),
  31693. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~6_combout ),
  31694. .Cout(),
  31695. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [5]));
  31696. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .coord_x = 14;
  31697. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .coord_y = 1;
  31698. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .coord_z = 14;
  31699. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .mask = 16'hCCF0;
  31700. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .modeMux = 1'b0;
  31701. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  31702. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .ShiftMux = 1'b0;
  31703. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .BypassEn = 1'b0;
  31704. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5] .CarryEnb = 1'b1;
  31705. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] (
  31706. .A(vcc),
  31707. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][6]~q ),
  31708. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [7]),
  31709. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31710. .Cin(),
  31711. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [6]),
  31712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31713. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31714. .SyncReset(),
  31715. .ShiftData(),
  31716. .SyncLoad(),
  31717. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~7_combout ),
  31718. .Cout(),
  31719. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [6]));
  31720. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .coord_x = 14;
  31721. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .coord_y = 1;
  31722. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .coord_z = 2;
  31723. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .mask = 16'hCCF0;
  31724. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .modeMux = 1'b0;
  31725. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  31726. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .ShiftMux = 1'b0;
  31727. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .BypassEn = 1'b0;
  31728. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[6] .CarryEnb = 1'b1;
  31729. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] (
  31730. .A(vcc),
  31731. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [0]),
  31732. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|fifo[1][7]~q ),
  31733. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31734. .Cin(),
  31735. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [7]),
  31736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[5]~1_combout_X62_Y5_SIG_SIG ),
  31737. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y5_SIG ),
  31738. .SyncReset(),
  31739. .ShiftData(),
  31740. .SyncLoad(),
  31741. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg~8_combout ),
  31742. .Cout(),
  31743. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg [7]));
  31744. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .coord_x = 14;
  31745. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .coord_y = 1;
  31746. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .coord_z = 6;
  31747. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .mask = 16'hF0CC;
  31748. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .modeMux = 1'b0;
  31749. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  31750. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .ShiftMux = 1'b0;
  31751. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .BypassEn = 1'b0;
  31752. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_shift_reg[7] .CarryEnb = 1'b1;
  31753. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA (
  31754. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31755. .B(\macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ),
  31756. .C(vcc),
  31757. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31758. .Cin(),
  31759. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31762. .SyncReset(),
  31763. .ShiftData(),
  31764. .SyncLoad(),
  31765. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector2~0_combout ),
  31766. .Cout(),
  31767. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ));
  31768. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .coord_x = 8;
  31769. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .coord_y = 1;
  31770. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .coord_z = 2;
  31771. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .mask = 16'hBA30;
  31772. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .modeMux = 1'b0;
  31773. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  31774. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .ShiftMux = 1'b0;
  31775. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .BypassEn = 1'b0;
  31776. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA .CarryEnb = 1'b1;
  31777. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE (
  31778. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31779. .B(vcc),
  31780. .C(vcc),
  31781. .D(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  31782. .Cin(),
  31783. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  31784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31786. .SyncReset(),
  31787. .ShiftData(),
  31788. .SyncLoad(),
  31789. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector0~0_combout ),
  31790. .Cout(),
  31791. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ));
  31792. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .coord_x = 8;
  31793. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .coord_y = 1;
  31794. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .coord_z = 5;
  31795. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .mask = 16'hAAFA;
  31796. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .modeMux = 1'b0;
  31797. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  31798. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  31799. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .BypassEn = 1'b0;
  31800. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  31801. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY (
  31802. .A(\macro_inst|u_uart[0]|u_tx[2]|Selector3~0_combout ),
  31803. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31804. .C(\macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ),
  31805. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  31806. .Cin(),
  31807. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ),
  31808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  31809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  31810. .SyncReset(),
  31811. .ShiftData(),
  31812. .SyncLoad(),
  31813. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector3~1_combout ),
  31814. .Cout(),
  31815. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY~q ));
  31816. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .coord_x = 9;
  31817. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .coord_y = 1;
  31818. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .coord_z = 12;
  31819. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .mask = 16'hEAAA;
  31820. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .modeMux = 1'b0;
  31821. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  31822. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  31823. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .BypassEn = 1'b0;
  31824. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  31825. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START (
  31826. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0_combout ),
  31827. .B(\macro_inst|u_uart[0]|u_tx[2]|comb~1_combout ),
  31828. .C(vcc),
  31829. .D(\macro_inst|u_uart[0]|u_tx[2]|fifo_rden~combout ),
  31830. .Cin(),
  31831. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y1_SIG_VCC ),
  31833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y1_SIG ),
  31834. .SyncReset(),
  31835. .ShiftData(),
  31836. .SyncLoad(),
  31837. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~1_combout ),
  31838. .Cout(),
  31839. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ));
  31840. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .coord_x = 8;
  31841. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .coord_y = 1;
  31842. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .coord_z = 14;
  31843. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .mask = 16'hFF20;
  31844. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .modeMux = 1'b0;
  31845. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .FeedbackMux = 1'b1;
  31846. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .ShiftMux = 1'b0;
  31847. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .BypassEn = 1'b0;
  31848. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START .CarryEnb = 1'b1;
  31849. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 (
  31850. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31851. .B(\macro_inst|u_uart[0]|u_tx[2]|Selector5~3_combout ),
  31852. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31853. .D(\macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ),
  31854. .Cin(),
  31855. .Qin(),
  31856. .Clk(),
  31857. .AsyncReset(),
  31858. .SyncReset(),
  31859. .ShiftData(),
  31860. .SyncLoad(),
  31861. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0_combout ),
  31862. .Cout(),
  31863. .Q());
  31864. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .coord_x = 8;
  31865. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .coord_y = 1;
  31866. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .coord_z = 0;
  31867. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .mask = 16'h37F7;
  31868. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .modeMux = 1'b0;
  31869. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  31870. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  31871. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .BypassEn = 1'b0;
  31872. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  31873. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP (
  31874. .A(\macro_inst|u_uart[0]|u_tx[2]|Selector4~0_combout ),
  31875. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_DATA~q ),
  31876. .C(\macro_inst|u_uart[0]|u_tx[2]|always0~0_combout ),
  31877. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  31878. .Cin(),
  31879. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  31880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  31881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  31882. .SyncReset(),
  31883. .ShiftData(),
  31884. .SyncLoad(),
  31885. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector4~1_combout ),
  31886. .Cout(),
  31887. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ));
  31888. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .coord_x = 9;
  31889. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .coord_y = 1;
  31890. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .coord_z = 14;
  31891. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .mask = 16'hAAEA;
  31892. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .modeMux = 1'b0;
  31893. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  31894. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .ShiftMux = 1'b0;
  31895. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .BypassEn = 1'b0;
  31896. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP .CarryEnb = 1'b1;
  31897. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_stop (
  31898. .A(vcc),
  31899. .B(vcc),
  31900. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_fifo|counter [0]),
  31901. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  31902. .Cin(),
  31903. .Qin(),
  31904. .Clk(),
  31905. .AsyncReset(),
  31906. .SyncReset(),
  31907. .ShiftData(),
  31908. .SyncLoad(),
  31909. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout ),
  31910. .Cout(),
  31911. .Q());
  31912. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .coord_x = 8;
  31913. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .coord_y = 1;
  31914. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .coord_z = 15;
  31915. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .mask = 16'h000F;
  31916. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .modeMux = 1'b0;
  31917. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .FeedbackMux = 1'b0;
  31918. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .ShiftMux = 1'b0;
  31919. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .BypassEn = 1'b0;
  31920. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop .CarryEnb = 1'b1;
  31921. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt (
  31922. .A(vcc),
  31923. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0_combout ),
  31924. .C(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  31925. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31926. .Cin(),
  31927. .Qin(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ),
  31928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  31929. .AsyncReset(AsyncReset_X59_Y1_GND),
  31930. .SyncReset(),
  31931. .ShiftData(),
  31932. .SyncLoad(),
  31933. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~1_combout ),
  31934. .Cout(),
  31935. .Q(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ));
  31936. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .coord_x = 9;
  31937. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .coord_y = 1;
  31938. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .coord_z = 11;
  31939. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .mask = 16'hFCCC;
  31940. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .modeMux = 1'b0;
  31941. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .FeedbackMux = 1'b0;
  31942. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .ShiftMux = 1'b0;
  31943. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .BypassEn = 1'b0;
  31944. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt .CarryEnb = 1'b1;
  31945. alta_slice \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 (
  31946. .A(\macro_inst|u_uart[0]|u_tx[2]|tx_bit~q ),
  31947. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_START~q ),
  31948. .C(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  31949. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~q ),
  31950. .Cin(),
  31951. .Qin(),
  31952. .Clk(),
  31953. .AsyncReset(),
  31954. .SyncReset(),
  31955. .ShiftData(),
  31956. .SyncLoad(),
  31957. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0_combout ),
  31958. .Cout(),
  31959. .Q());
  31960. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .coord_x = 9;
  31961. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .coord_y = 1;
  31962. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .coord_z = 15;
  31963. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .mask = 16'h1320;
  31964. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .modeMux = 1'b0;
  31965. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  31966. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  31967. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .BypassEn = 1'b0;
  31968. defparam \macro_inst|u_uart[0]|u_tx[2]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  31969. alta_slice \macro_inst|u_uart[0]|u_tx[2]|uart_txd (
  31970. .A(vcc),
  31971. .B(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_STOP~q ),
  31972. .C(\macro_inst|u_uart[0]|u_tx[2]|Selector5~2_combout ),
  31973. .D(\macro_inst|u_uart[0]|u_tx[2]|tx_state.UART_IDLE~q ),
  31974. .Cin(),
  31975. .Qin(\macro_inst|u_uart[0]|u_tx[2]|uart_txd~q ),
  31976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y1_SIG_VCC ),
  31977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y1_SIG ),
  31978. .SyncReset(),
  31979. .ShiftData(),
  31980. .SyncLoad(),
  31981. .LutOut(\macro_inst|u_uart[0]|u_tx[2]|Selector5~4_combout ),
  31982. .Cout(),
  31983. .Q(\macro_inst|u_uart[0]|u_tx[2]|uart_txd~q ));
  31984. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .coord_x = 11;
  31985. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .coord_y = 1;
  31986. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .coord_z = 4;
  31987. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .mask = 16'h0300;
  31988. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .modeMux = 1'b0;
  31989. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .FeedbackMux = 1'b0;
  31990. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .ShiftMux = 1'b0;
  31991. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .BypassEn = 1'b0;
  31992. defparam \macro_inst|u_uart[0]|u_tx[2]|uart_txd .CarryEnb = 1'b1;
  31993. alta_slice \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 (
  31994. .A(vcc),
  31995. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ),
  31996. .C(vcc),
  31997. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  31998. .Cin(),
  31999. .Qin(),
  32000. .Clk(),
  32001. .AsyncReset(),
  32002. .SyncReset(),
  32003. .ShiftData(),
  32004. .SyncLoad(),
  32005. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector3~0_combout ),
  32006. .Cout(),
  32007. .Q());
  32008. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .coord_x = 11;
  32009. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .coord_y = 4;
  32010. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .coord_z = 13;
  32011. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .mask = 16'h00CC;
  32012. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .modeMux = 1'b0;
  32013. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .FeedbackMux = 1'b0;
  32014. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .ShiftMux = 1'b0;
  32015. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .BypassEn = 1'b0;
  32016. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector3~0 .CarryEnb = 1'b1;
  32017. alta_slice \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 (
  32018. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32019. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ),
  32020. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  32021. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ),
  32022. .Cin(),
  32023. .Qin(),
  32024. .Clk(),
  32025. .AsyncReset(),
  32026. .SyncReset(),
  32027. .ShiftData(),
  32028. .SyncLoad(),
  32029. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector4~0_combout ),
  32030. .Cout(),
  32031. .Q());
  32032. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .coord_x = 12;
  32033. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .coord_y = 3;
  32034. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .coord_z = 6;
  32035. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .mask = 16'hF8D8;
  32036. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .modeMux = 1'b0;
  32037. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .FeedbackMux = 1'b0;
  32038. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .ShiftMux = 1'b0;
  32039. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .BypassEn = 1'b0;
  32040. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector4~0 .CarryEnb = 1'b1;
  32041. alta_slice \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 (
  32042. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ),
  32043. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~q ),
  32044. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32045. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0]),
  32046. .Cin(),
  32047. .Qin(),
  32048. .Clk(),
  32049. .AsyncReset(),
  32050. .SyncReset(),
  32051. .ShiftData(),
  32052. .SyncLoad(),
  32053. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector5~2_combout ),
  32054. .Cout(),
  32055. .Q());
  32056. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .coord_x = 14;
  32057. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .coord_y = 9;
  32058. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .coord_z = 12;
  32059. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .mask = 16'hF888;
  32060. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .modeMux = 1'b0;
  32061. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .FeedbackMux = 1'b0;
  32062. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .ShiftMux = 1'b0;
  32063. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .BypassEn = 1'b0;
  32064. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~2 .CarryEnb = 1'b1;
  32065. alta_slice \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 (
  32066. .A(vcc),
  32067. .B(vcc),
  32068. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  32069. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  32070. .Cin(),
  32071. .Qin(),
  32072. .Clk(),
  32073. .AsyncReset(),
  32074. .SyncReset(),
  32075. .ShiftData(),
  32076. .SyncLoad(),
  32077. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector5~3_combout ),
  32078. .Cout(),
  32079. .Q());
  32080. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .coord_x = 14;
  32081. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .coord_y = 7;
  32082. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .coord_z = 15;
  32083. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .mask = 16'h0F00;
  32084. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .modeMux = 1'b0;
  32085. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .FeedbackMux = 1'b0;
  32086. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .ShiftMux = 1'b0;
  32087. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .BypassEn = 1'b0;
  32088. defparam \macro_inst|u_uart[0]|u_tx[3]|Selector5~3 .CarryEnb = 1'b1;
  32089. alta_slice \macro_inst|u_uart[0]|u_tx[3]|always0~0 (
  32090. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [2]),
  32091. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [1]),
  32092. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0]),
  32093. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32094. .Cin(),
  32095. .Qin(),
  32096. .Clk(),
  32097. .AsyncReset(),
  32098. .SyncReset(),
  32099. .ShiftData(),
  32100. .SyncLoad(),
  32101. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ),
  32102. .Cout(),
  32103. .Q());
  32104. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .coord_x = 11;
  32105. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .coord_y = 4;
  32106. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .coord_z = 15;
  32107. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .mask = 16'h0100;
  32108. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .modeMux = 1'b0;
  32109. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .FeedbackMux = 1'b0;
  32110. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .ShiftMux = 1'b0;
  32111. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .BypassEn = 1'b0;
  32112. defparam \macro_inst|u_uart[0]|u_tx[3]|always0~0 .CarryEnb = 1'b1;
  32113. alta_slice \macro_inst|u_uart[0]|u_tx[3]|always6~0 (
  32114. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  32115. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [2]),
  32116. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [1]),
  32117. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [0]),
  32118. .Cin(),
  32119. .Qin(),
  32120. .Clk(),
  32121. .AsyncReset(),
  32122. .SyncReset(),
  32123. .ShiftData(),
  32124. .SyncLoad(),
  32125. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|always6~0_combout ),
  32126. .Cout(),
  32127. .Q());
  32128. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .coord_x = 11;
  32129. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .coord_y = 4;
  32130. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .coord_z = 2;
  32131. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .mask = 16'h8000;
  32132. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .modeMux = 1'b0;
  32133. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .FeedbackMux = 1'b0;
  32134. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .ShiftMux = 1'b0;
  32135. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .BypassEn = 1'b0;
  32136. defparam \macro_inst|u_uart[0]|u_tx[3]|always6~0 .CarryEnb = 1'b1;
  32137. alta_slice \macro_inst|u_uart[0]|u_tx[3]|comb~1 (
  32138. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32139. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ),
  32140. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  32141. .D(vcc),
  32142. .Cin(),
  32143. .Qin(),
  32144. .Clk(),
  32145. .AsyncReset(),
  32146. .SyncReset(),
  32147. .ShiftData(),
  32148. .SyncLoad(),
  32149. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32150. .Cout(),
  32151. .Q());
  32152. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .coord_x = 12;
  32153. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .coord_y = 3;
  32154. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .coord_z = 5;
  32155. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .mask = 16'h2020;
  32156. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .modeMux = 1'b0;
  32157. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .FeedbackMux = 1'b0;
  32158. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .ShiftMux = 1'b0;
  32159. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .BypassEn = 1'b0;
  32160. defparam \macro_inst|u_uart[0]|u_tx[3]|comb~1 .CarryEnb = 1'b1;
  32161. alta_slice \macro_inst|u_uart[0]|u_tx[3]|fifo_rden (
  32162. .A(vcc),
  32163. .B(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32164. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  32165. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  32166. .Cin(),
  32167. .Qin(),
  32168. .Clk(),
  32169. .AsyncReset(),
  32170. .SyncReset(),
  32171. .ShiftData(),
  32172. .SyncLoad(),
  32173. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32174. .Cout(),
  32175. .Q());
  32176. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .coord_x = 12;
  32177. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .coord_y = 3;
  32178. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .coord_z = 3;
  32179. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .mask = 16'hCF00;
  32180. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .modeMux = 1'b0;
  32181. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .FeedbackMux = 1'b0;
  32182. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .ShiftMux = 1'b0;
  32183. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .BypassEn = 1'b0;
  32184. defparam \macro_inst|u_uart[0]|u_tx[3]|fifo_rden .CarryEnb = 1'b1;
  32185. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] (
  32186. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  32187. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [0]),
  32188. .C(vcc),
  32189. .D(vcc),
  32190. .Cin(),
  32191. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [0]),
  32192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32194. .SyncReset(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ),
  32195. .ShiftData(),
  32196. .SyncLoad(SyncLoad_X62_Y3_GND),
  32197. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0]~4_combout ),
  32198. .Cout(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0]~5 ),
  32199. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [0]));
  32200. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .coord_x = 11;
  32201. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .coord_y = 4;
  32202. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .coord_z = 9;
  32203. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .mask = 16'h6688;
  32204. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .modeMux = 1'b0;
  32205. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  32206. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  32207. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .BypassEn = 1'b1;
  32208. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  32209. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] (
  32210. .A(vcc),
  32211. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [1]),
  32212. .C(vcc),
  32213. .D(vcc),
  32214. .Cin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[0]~5 ),
  32215. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [1]),
  32216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32218. .SyncReset(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ),
  32219. .ShiftData(),
  32220. .SyncLoad(SyncLoad_X62_Y3_GND),
  32221. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1]~6_combout ),
  32222. .Cout(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1]~7 ),
  32223. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [1]));
  32224. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .coord_x = 11;
  32225. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .coord_y = 4;
  32226. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .coord_z = 10;
  32227. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .mask = 16'h3C3F;
  32228. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .modeMux = 1'b1;
  32229. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  32230. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  32231. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .BypassEn = 1'b1;
  32232. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  32233. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] (
  32234. .A(vcc),
  32235. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [2]),
  32236. .C(vcc),
  32237. .D(vcc),
  32238. .Cin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[1]~7 ),
  32239. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [2]),
  32240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32242. .SyncReset(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ),
  32243. .ShiftData(),
  32244. .SyncLoad(SyncLoad_X62_Y3_GND),
  32245. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2]~8_combout ),
  32246. .Cout(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2]~9 ),
  32247. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [2]));
  32248. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .coord_x = 11;
  32249. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .coord_y = 4;
  32250. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .coord_z = 11;
  32251. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .mask = 16'hC30C;
  32252. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .modeMux = 1'b1;
  32253. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  32254. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  32255. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .BypassEn = 1'b1;
  32256. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  32257. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] (
  32258. .A(vcc),
  32259. .B(vcc),
  32260. .C(vcc),
  32261. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [3]),
  32262. .Cin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[2]~9 ),
  32263. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [3]),
  32264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32266. .SyncReset(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ),
  32267. .ShiftData(),
  32268. .SyncLoad(SyncLoad_X62_Y3_GND),
  32269. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3]~10_combout ),
  32270. .Cout(),
  32271. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [3]));
  32272. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .coord_x = 11;
  32273. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .coord_y = 4;
  32274. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .coord_z = 12;
  32275. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .mask = 16'h0FF0;
  32276. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .modeMux = 1'b1;
  32277. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  32278. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  32279. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .BypassEn = 1'b1;
  32280. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  32281. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_bit (
  32282. .A(\macro_inst|u_uart[0]|u_tx[3]|always6~0_combout ),
  32283. .B(vcc),
  32284. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_baud_cnt [3]),
  32285. .D(vcc),
  32286. .Cin(),
  32287. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32290. .SyncReset(),
  32291. .ShiftData(),
  32292. .SyncLoad(),
  32293. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|always6~1_combout ),
  32294. .Cout(),
  32295. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ));
  32296. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .coord_x = 11;
  32297. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .coord_y = 4;
  32298. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .coord_z = 7;
  32299. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .mask = 16'hA0A0;
  32300. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .modeMux = 1'b0;
  32301. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .FeedbackMux = 1'b0;
  32302. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .ShiftMux = 1'b0;
  32303. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .BypassEn = 1'b0;
  32304. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_bit .CarryEnb = 1'b1;
  32305. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_complete (
  32306. .A(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32307. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  32308. .C(vcc),
  32309. .D(\macro_inst|u_uart[0]|u_regs|clear_flags[3]~11_combout ),
  32310. .Cin(),
  32311. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_complete~q ),
  32312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y1_SIG_VCC ),
  32313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y1_SIG ),
  32314. .SyncReset(),
  32315. .ShiftData(),
  32316. .SyncLoad(),
  32317. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_complete~0_combout ),
  32318. .Cout(),
  32319. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_complete~q ));
  32320. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .coord_x = 10;
  32321. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .coord_y = 3;
  32322. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .coord_z = 5;
  32323. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .mask = 16'h2232;
  32324. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .modeMux = 1'b0;
  32325. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .FeedbackMux = 1'b1;
  32326. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .ShiftMux = 1'b0;
  32327. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .BypassEn = 1'b0;
  32328. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_complete .CarryEnb = 1'b1;
  32329. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] (
  32330. .A(vcc),
  32331. .B(vcc),
  32332. .C(vcc),
  32333. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32334. .Cin(),
  32335. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0]),
  32336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout_X62_Y3_SIG_SIG ),
  32337. .AsyncReset(AsyncReset_X62_Y3_GND),
  32338. .SyncReset(),
  32339. .ShiftData(),
  32340. .SyncLoad(),
  32341. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~2_combout ),
  32342. .Cout(),
  32343. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0]));
  32344. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .coord_x = 11;
  32345. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .coord_y = 4;
  32346. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .coord_z = 14;
  32347. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .mask = 16'hFF0F;
  32348. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .modeMux = 1'b0;
  32349. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  32350. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .ShiftMux = 1'b0;
  32351. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .BypassEn = 1'b0;
  32352. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0] .CarryEnb = 1'b1;
  32353. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 (
  32354. .A(vcc),
  32355. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32356. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32357. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32358. .Cin(),
  32359. .Qin(),
  32360. .Clk(),
  32361. .AsyncReset(),
  32362. .SyncReset(),
  32363. .ShiftData(),
  32364. .SyncLoad(),
  32365. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout ),
  32366. .Cout(),
  32367. .Q());
  32368. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .coord_x = 11;
  32369. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .coord_y = 4;
  32370. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .coord_z = 4;
  32371. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .mask = 16'hFCCC;
  32372. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .modeMux = 1'b0;
  32373. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .FeedbackMux = 1'b0;
  32374. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .ShiftMux = 1'b0;
  32375. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .BypassEn = 1'b0;
  32376. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1 .CarryEnb = 1'b1;
  32377. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] (
  32378. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0]),
  32379. .B(vcc),
  32380. .C(vcc),
  32381. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32382. .Cin(),
  32383. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [1]),
  32384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout_X62_Y3_SIG_SIG ),
  32385. .AsyncReset(AsyncReset_X62_Y3_GND),
  32386. .SyncReset(),
  32387. .ShiftData(),
  32388. .SyncLoad(),
  32389. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~0_combout ),
  32390. .Cout(),
  32391. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [1]));
  32392. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .coord_x = 11;
  32393. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .coord_y = 4;
  32394. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .coord_z = 3;
  32395. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .mask = 16'hFFA5;
  32396. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .modeMux = 1'b0;
  32397. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  32398. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .ShiftMux = 1'b0;
  32399. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .BypassEn = 1'b0;
  32400. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[1] .CarryEnb = 1'b1;
  32401. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] (
  32402. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [0]),
  32403. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [1]),
  32404. .C(vcc),
  32405. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32406. .Cin(),
  32407. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [2]),
  32408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[0]~1_combout_X62_Y3_SIG_SIG ),
  32409. .AsyncReset(AsyncReset_X62_Y3_GND),
  32410. .SyncReset(),
  32411. .ShiftData(),
  32412. .SyncLoad(),
  32413. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt~3_combout ),
  32414. .Cout(),
  32415. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt [2]));
  32416. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .coord_x = 11;
  32417. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .coord_y = 4;
  32418. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .coord_z = 6;
  32419. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .mask = 16'hFFE1;
  32420. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .modeMux = 1'b0;
  32421. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  32422. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .ShiftMux = 1'b0;
  32423. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .BypassEn = 1'b0;
  32424. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_data_cnt[2] .CarryEnb = 1'b1;
  32425. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] (
  32426. .A(\macro_inst|u_uart[0]|u_regs|tx_write [3]),
  32427. .B(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32428. .C(vcc),
  32429. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  32430. .Cin(),
  32431. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  32432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  32433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  32434. .SyncReset(),
  32435. .ShiftData(),
  32436. .SyncLoad(),
  32437. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter~0_combout ),
  32438. .Cout(),
  32439. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]));
  32440. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .coord_x = 14;
  32441. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .coord_y = 9;
  32442. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .coord_z = 11;
  32443. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .mask = 16'h3A0A;
  32444. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .modeMux = 1'b0;
  32445. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  32446. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  32447. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .BypassEn = 1'b0;
  32448. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  32449. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] (
  32450. .A(),
  32451. .B(),
  32452. .C(vcc),
  32453. .D(\rv32.mem_ahb_hwdata[0] ),
  32454. .Cin(),
  32455. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]~q ),
  32456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32457. .AsyncReset(AsyncReset_X61_Y12_GND),
  32458. .SyncReset(),
  32459. .ShiftData(),
  32460. .SyncLoad(),
  32461. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  32462. .Cout(),
  32463. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]~q ));
  32464. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .coord_x = 14;
  32465. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .coord_y = 8;
  32466. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .coord_z = 2;
  32467. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  32468. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  32469. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  32470. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  32471. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  32472. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  32473. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] (
  32474. .A(),
  32475. .B(),
  32476. .C(vcc),
  32477. .D(\rv32.mem_ahb_hwdata[1] ),
  32478. .Cin(),
  32479. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]~q ),
  32480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32481. .AsyncReset(AsyncReset_X61_Y12_GND),
  32482. .SyncReset(),
  32483. .ShiftData(),
  32484. .SyncLoad(),
  32485. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  32486. .Cout(),
  32487. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]~q ));
  32488. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .coord_x = 14;
  32489. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .coord_y = 8;
  32490. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .coord_z = 3;
  32491. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  32492. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  32493. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  32494. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  32495. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  32496. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  32497. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] (
  32498. .A(),
  32499. .B(),
  32500. .C(vcc),
  32501. .D(\rv32.mem_ahb_hwdata[2] ),
  32502. .Cin(),
  32503. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]~q ),
  32504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32505. .AsyncReset(AsyncReset_X61_Y12_GND),
  32506. .SyncReset(),
  32507. .ShiftData(),
  32508. .SyncLoad(),
  32509. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  32510. .Cout(),
  32511. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]~q ));
  32512. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .coord_x = 14;
  32513. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .coord_y = 8;
  32514. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .coord_z = 11;
  32515. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  32516. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  32517. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  32518. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  32519. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  32520. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  32521. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] (
  32522. .A(),
  32523. .B(),
  32524. .C(vcc),
  32525. .D(\rv32.mem_ahb_hwdata[3] ),
  32526. .Cin(),
  32527. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]~q ),
  32528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32529. .AsyncReset(AsyncReset_X61_Y12_GND),
  32530. .SyncReset(),
  32531. .ShiftData(),
  32532. .SyncLoad(),
  32533. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  32534. .Cout(),
  32535. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]~q ));
  32536. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .coord_x = 14;
  32537. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .coord_y = 8;
  32538. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .coord_z = 1;
  32539. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  32540. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  32541. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  32542. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  32543. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  32544. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  32545. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] (
  32546. .A(),
  32547. .B(),
  32548. .C(vcc),
  32549. .D(\rv32.mem_ahb_hwdata[4] ),
  32550. .Cin(),
  32551. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]~q ),
  32552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32553. .AsyncReset(AsyncReset_X61_Y12_GND),
  32554. .SyncReset(),
  32555. .ShiftData(),
  32556. .SyncLoad(),
  32557. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  32558. .Cout(),
  32559. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]~q ));
  32560. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .coord_x = 14;
  32561. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .coord_y = 8;
  32562. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .coord_z = 6;
  32563. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  32564. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  32565. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  32566. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  32567. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  32568. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  32569. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] (
  32570. .A(),
  32571. .B(),
  32572. .C(vcc),
  32573. .D(\rv32.mem_ahb_hwdata[5] ),
  32574. .Cin(),
  32575. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]~q ),
  32576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32577. .AsyncReset(AsyncReset_X61_Y12_GND),
  32578. .SyncReset(),
  32579. .ShiftData(),
  32580. .SyncLoad(),
  32581. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  32582. .Cout(),
  32583. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]~q ));
  32584. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .coord_x = 14;
  32585. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .coord_y = 8;
  32586. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .coord_z = 9;
  32587. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  32588. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  32589. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  32590. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  32591. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  32592. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  32593. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] (
  32594. .A(),
  32595. .B(),
  32596. .C(vcc),
  32597. .D(\rv32.mem_ahb_hwdata[6] ),
  32598. .Cin(),
  32599. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]~q ),
  32600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32601. .AsyncReset(AsyncReset_X61_Y12_GND),
  32602. .SyncReset(),
  32603. .ShiftData(),
  32604. .SyncLoad(),
  32605. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  32606. .Cout(),
  32607. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]~q ));
  32608. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .coord_x = 14;
  32609. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .coord_y = 8;
  32610. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .coord_z = 13;
  32611. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  32612. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  32613. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  32614. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  32615. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  32616. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  32617. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] (
  32618. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32619. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32620. .C(\rv32.mem_ahb_hwdata[7] ),
  32621. .D(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32622. .Cin(),
  32623. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7]~q ),
  32624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout_X61_Y12_SIG_SIG ),
  32625. .AsyncReset(AsyncReset_X61_Y12_GND),
  32626. .SyncReset(SyncReset_X61_Y12_GND),
  32627. .ShiftData(),
  32628. .SyncLoad(SyncLoad_X61_Y12_VCC),
  32629. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout ),
  32630. .Cout(),
  32631. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7]~q ));
  32632. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .coord_x = 14;
  32633. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .coord_y = 8;
  32634. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .coord_z = 15;
  32635. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .mask = 16'hFF88;
  32636. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .modeMux = 1'b0;
  32637. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  32638. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  32639. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .BypassEn = 1'b1;
  32640. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  32641. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_parity (
  32642. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~0_combout ),
  32643. .B(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  32644. .C(vcc),
  32645. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32646. .Cin(),
  32647. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~q ),
  32648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  32649. .AsyncReset(AsyncReset_X61_Y4_GND),
  32650. .SyncReset(),
  32651. .ShiftData(),
  32652. .SyncLoad(),
  32653. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~1_combout ),
  32654. .Cout(),
  32655. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~q ));
  32656. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .coord_x = 14;
  32657. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .coord_y = 9;
  32658. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .coord_z = 15;
  32659. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .mask = 16'h335A;
  32660. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .modeMux = 1'b0;
  32661. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .FeedbackMux = 1'b1;
  32662. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .ShiftMux = 1'b0;
  32663. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .BypassEn = 1'b0;
  32664. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity .CarryEnb = 1'b1;
  32665. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 (
  32666. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  32667. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32668. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32669. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0]),
  32670. .Cin(),
  32671. .Qin(),
  32672. .Clk(),
  32673. .AsyncReset(),
  32674. .SyncReset(),
  32675. .ShiftData(),
  32676. .SyncLoad(),
  32677. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_parity~0_combout ),
  32678. .Cout(),
  32679. .Q());
  32680. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .coord_x = 14;
  32681. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .coord_y = 9;
  32682. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .coord_z = 10;
  32683. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .mask = 16'h4000;
  32684. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .modeMux = 1'b0;
  32685. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .FeedbackMux = 1'b0;
  32686. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .ShiftMux = 1'b0;
  32687. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .BypassEn = 1'b0;
  32688. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_parity~0 .CarryEnb = 1'b1;
  32689. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] (
  32690. .A(vcc),
  32691. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32692. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][0]~q ),
  32693. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [1]),
  32694. .Cin(),
  32695. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0]),
  32696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32698. .SyncReset(),
  32699. .ShiftData(),
  32700. .SyncLoad(),
  32701. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~0_combout ),
  32702. .Cout(),
  32703. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0]));
  32704. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .coord_x = 14;
  32705. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .coord_y = 8;
  32706. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .coord_z = 8;
  32707. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .mask = 16'hF3C0;
  32708. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .modeMux = 1'b0;
  32709. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  32710. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .ShiftMux = 1'b0;
  32711. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .BypassEn = 1'b0;
  32712. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[0] .CarryEnb = 1'b1;
  32713. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] (
  32714. .A(vcc),
  32715. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32716. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [2]),
  32717. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][1]~q ),
  32718. .Cin(),
  32719. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [1]),
  32720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32722. .SyncReset(),
  32723. .ShiftData(),
  32724. .SyncLoad(),
  32725. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~2_combout ),
  32726. .Cout(),
  32727. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [1]));
  32728. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .coord_x = 14;
  32729. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .coord_y = 8;
  32730. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .coord_z = 7;
  32731. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .mask = 16'hFC30;
  32732. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .modeMux = 1'b0;
  32733. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  32734. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .ShiftMux = 1'b0;
  32735. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .BypassEn = 1'b0;
  32736. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[1] .CarryEnb = 1'b1;
  32737. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] (
  32738. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [3]),
  32739. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32740. .C(vcc),
  32741. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][2]~q ),
  32742. .Cin(),
  32743. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [2]),
  32744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32746. .SyncReset(),
  32747. .ShiftData(),
  32748. .SyncLoad(),
  32749. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~3_combout ),
  32750. .Cout(),
  32751. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [2]));
  32752. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .coord_x = 14;
  32753. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .coord_y = 8;
  32754. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .coord_z = 10;
  32755. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .mask = 16'hEE22;
  32756. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .modeMux = 1'b0;
  32757. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  32758. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .ShiftMux = 1'b0;
  32759. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .BypassEn = 1'b0;
  32760. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[2] .CarryEnb = 1'b1;
  32761. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] (
  32762. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [4]),
  32763. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32764. .C(vcc),
  32765. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][3]~q ),
  32766. .Cin(),
  32767. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [3]),
  32768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32770. .SyncReset(),
  32771. .ShiftData(),
  32772. .SyncLoad(),
  32773. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~4_combout ),
  32774. .Cout(),
  32775. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [3]));
  32776. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .coord_x = 14;
  32777. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .coord_y = 8;
  32778. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .coord_z = 0;
  32779. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .mask = 16'hEE22;
  32780. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .modeMux = 1'b0;
  32781. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  32782. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .ShiftMux = 1'b0;
  32783. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .BypassEn = 1'b0;
  32784. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3] .CarryEnb = 1'b1;
  32785. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] (
  32786. .A(vcc),
  32787. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32788. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][4]~q ),
  32789. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [5]),
  32790. .Cin(),
  32791. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [4]),
  32792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32794. .SyncReset(),
  32795. .ShiftData(),
  32796. .SyncLoad(),
  32797. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~5_combout ),
  32798. .Cout(),
  32799. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [4]));
  32800. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .coord_x = 14;
  32801. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .coord_y = 8;
  32802. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .coord_z = 4;
  32803. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .mask = 16'hF3C0;
  32804. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .modeMux = 1'b0;
  32805. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  32806. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .ShiftMux = 1'b0;
  32807. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .BypassEn = 1'b0;
  32808. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[4] .CarryEnb = 1'b1;
  32809. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] (
  32810. .A(vcc),
  32811. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32812. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [6]),
  32813. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][5]~q ),
  32814. .Cin(),
  32815. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [5]),
  32816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32818. .SyncReset(),
  32819. .ShiftData(),
  32820. .SyncLoad(),
  32821. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~6_combout ),
  32822. .Cout(),
  32823. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [5]));
  32824. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .coord_x = 14;
  32825. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .coord_y = 8;
  32826. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .coord_z = 5;
  32827. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .mask = 16'hFC30;
  32828. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .modeMux = 1'b0;
  32829. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  32830. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .ShiftMux = 1'b0;
  32831. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .BypassEn = 1'b0;
  32832. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[5] .CarryEnb = 1'b1;
  32833. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] (
  32834. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [7]),
  32835. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32836. .C(vcc),
  32837. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][6]~q ),
  32838. .Cin(),
  32839. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [6]),
  32840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32842. .SyncReset(),
  32843. .ShiftData(),
  32844. .SyncLoad(),
  32845. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~7_combout ),
  32846. .Cout(),
  32847. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [6]));
  32848. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .coord_x = 14;
  32849. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .coord_y = 8;
  32850. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .coord_z = 12;
  32851. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .mask = 16'hEE22;
  32852. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .modeMux = 1'b0;
  32853. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  32854. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .ShiftMux = 1'b0;
  32855. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .BypassEn = 1'b0;
  32856. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[6] .CarryEnb = 1'b1;
  32857. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] (
  32858. .A(vcc),
  32859. .B(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32860. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [0]),
  32861. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|fifo[1][7]~q ),
  32862. .Cin(),
  32863. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [7]),
  32864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[3]~1_combout_X61_Y12_SIG_SIG ),
  32865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y12_SIG ),
  32866. .SyncReset(),
  32867. .ShiftData(),
  32868. .SyncLoad(),
  32869. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg~8_combout ),
  32870. .Cout(),
  32871. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg [7]));
  32872. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .coord_x = 14;
  32873. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .coord_y = 8;
  32874. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .coord_z = 14;
  32875. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .mask = 16'hFC30;
  32876. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .modeMux = 1'b0;
  32877. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  32878. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .ShiftMux = 1'b0;
  32879. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .BypassEn = 1'b0;
  32880. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_shift_reg[7] .CarryEnb = 1'b1;
  32881. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA (
  32882. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32883. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32884. .C(vcc),
  32885. .D(\macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ),
  32886. .Cin(),
  32887. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32890. .SyncReset(),
  32891. .ShiftData(),
  32892. .SyncLoad(),
  32893. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector2~0_combout ),
  32894. .Cout(),
  32895. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ));
  32896. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .coord_x = 11;
  32897. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .coord_y = 4;
  32898. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .coord_z = 8;
  32899. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .mask = 16'h88F8;
  32900. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .modeMux = 1'b0;
  32901. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  32902. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .ShiftMux = 1'b0;
  32903. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .BypassEn = 1'b0;
  32904. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA .CarryEnb = 1'b1;
  32905. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE (
  32906. .A(vcc),
  32907. .B(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32908. .C(vcc),
  32909. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  32910. .Cin(),
  32911. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  32912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  32913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  32914. .SyncReset(),
  32915. .ShiftData(),
  32916. .SyncLoad(),
  32917. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector0~0_combout ),
  32918. .Cout(),
  32919. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ));
  32920. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .coord_x = 9;
  32921. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .coord_y = 1;
  32922. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .coord_z = 4;
  32923. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .mask = 16'hFF30;
  32924. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .modeMux = 1'b0;
  32925. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  32926. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  32927. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .BypassEn = 1'b0;
  32928. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  32929. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY (
  32930. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  32931. .B(\macro_inst|u_uart[0]|u_tx[3]|Selector3~0_combout ),
  32932. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32933. .D(\macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ),
  32934. .Cin(),
  32935. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ),
  32936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32938. .SyncReset(),
  32939. .ShiftData(),
  32940. .SyncLoad(),
  32941. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector3~1_combout ),
  32942. .Cout(),
  32943. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY~q ));
  32944. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .coord_x = 11;
  32945. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .coord_y = 4;
  32946. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .coord_z = 5;
  32947. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .mask = 16'hECCC;
  32948. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .modeMux = 1'b0;
  32949. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  32950. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  32951. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .BypassEn = 1'b0;
  32952. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  32953. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START (
  32954. .A(\macro_inst|u_uart[0]|u_tx[3]|fifo_rden~combout ),
  32955. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0_combout ),
  32956. .C(vcc),
  32957. .D(\macro_inst|u_uart[0]|u_tx[3]|comb~1_combout ),
  32958. .Cin(),
  32959. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  32960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y3_SIG_VCC ),
  32961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y3_SIG ),
  32962. .SyncReset(),
  32963. .ShiftData(),
  32964. .SyncLoad(),
  32965. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~1_combout ),
  32966. .Cout(),
  32967. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ));
  32968. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .coord_x = 11;
  32969. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .coord_y = 4;
  32970. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .coord_z = 1;
  32971. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .mask = 16'hAAEA;
  32972. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .modeMux = 1'b0;
  32973. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .FeedbackMux = 1'b1;
  32974. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .ShiftMux = 1'b0;
  32975. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .BypassEn = 1'b0;
  32976. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START .CarryEnb = 1'b1;
  32977. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 (
  32978. .A(\macro_inst|u_uart[0]|u_tx[3]|Selector5~3_combout ),
  32979. .B(\macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ),
  32980. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  32981. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  32982. .Cin(),
  32983. .Qin(),
  32984. .Clk(),
  32985. .AsyncReset(),
  32986. .SyncReset(),
  32987. .ShiftData(),
  32988. .SyncLoad(),
  32989. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0_combout ),
  32990. .Cout(),
  32991. .Q());
  32992. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .coord_x = 11;
  32993. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .coord_y = 4;
  32994. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .coord_z = 0;
  32995. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .mask = 16'h757F;
  32996. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .modeMux = 1'b0;
  32997. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  32998. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  32999. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .BypassEn = 1'b0;
  33000. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  33001. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP (
  33002. .A(\macro_inst|u_uart[0]|u_tx[3]|always0~0_combout ),
  33003. .B(\macro_inst|u_uart[0]|u_tx[3]|Selector4~0_combout ),
  33004. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_DATA~q ),
  33005. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  33006. .Cin(),
  33007. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  33008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33010. .SyncReset(),
  33011. .ShiftData(),
  33012. .SyncLoad(),
  33013. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector4~1_combout ),
  33014. .Cout(),
  33015. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ));
  33016. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .coord_x = 11;
  33017. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .coord_y = 2;
  33018. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .coord_z = 4;
  33019. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .mask = 16'hCCEC;
  33020. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .modeMux = 1'b0;
  33021. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  33022. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .ShiftMux = 1'b0;
  33023. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .BypassEn = 1'b0;
  33024. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP .CarryEnb = 1'b1;
  33025. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_stop (
  33026. .A(vcc),
  33027. .B(vcc),
  33028. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  33029. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  33030. .Cin(),
  33031. .Qin(),
  33032. .Clk(),
  33033. .AsyncReset(),
  33034. .SyncReset(),
  33035. .ShiftData(),
  33036. .SyncLoad(),
  33037. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout ),
  33038. .Cout(),
  33039. .Q());
  33040. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .coord_x = 14;
  33041. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .coord_y = 7;
  33042. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .coord_z = 3;
  33043. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .mask = 16'h000F;
  33044. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .modeMux = 1'b0;
  33045. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .FeedbackMux = 1'b0;
  33046. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .ShiftMux = 1'b0;
  33047. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .BypassEn = 1'b0;
  33048. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop .CarryEnb = 1'b1;
  33049. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt (
  33050. .A(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  33051. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0_combout ),
  33052. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  33053. .D(vcc),
  33054. .Cin(),
  33055. .Qin(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ),
  33056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  33057. .AsyncReset(AsyncReset_X56_Y5_GND),
  33058. .SyncReset(),
  33059. .ShiftData(),
  33060. .SyncLoad(),
  33061. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~1_combout ),
  33062. .Cout(),
  33063. .Q(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ));
  33064. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .coord_x = 17;
  33065. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .coord_y = 3;
  33066. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .coord_z = 14;
  33067. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .mask = 16'hECEC;
  33068. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .modeMux = 1'b0;
  33069. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .FeedbackMux = 1'b0;
  33070. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .ShiftMux = 1'b0;
  33071. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .BypassEn = 1'b0;
  33072. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt .CarryEnb = 1'b1;
  33073. alta_slice \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 (
  33074. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  33075. .B(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~q ),
  33076. .C(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_START~q ),
  33077. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_bit~q ),
  33078. .Cin(),
  33079. .Qin(),
  33080. .Clk(),
  33081. .AsyncReset(),
  33082. .SyncReset(),
  33083. .ShiftData(),
  33084. .SyncLoad(),
  33085. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0_combout ),
  33086. .Cout(),
  33087. .Q());
  33088. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .coord_x = 17;
  33089. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .coord_y = 3;
  33090. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .coord_z = 7;
  33091. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .mask = 16'h060C;
  33092. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .modeMux = 1'b0;
  33093. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  33094. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  33095. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .BypassEn = 1'b0;
  33096. defparam \macro_inst|u_uart[0]|u_tx[3]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  33097. alta_slice \macro_inst|u_uart[0]|u_tx[3]|uart_txd (
  33098. .A(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_STOP~q ),
  33099. .B(vcc),
  33100. .C(\macro_inst|u_uart[0]|u_tx[3]|Selector5~2_combout ),
  33101. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_state.UART_IDLE~q ),
  33102. .Cin(),
  33103. .Qin(\macro_inst|u_uart[0]|u_tx[3]|uart_txd~q ),
  33104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  33105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  33106. .SyncReset(),
  33107. .ShiftData(),
  33108. .SyncLoad(),
  33109. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|Selector5~4_combout ),
  33110. .Cout(),
  33111. .Q(\macro_inst|u_uart[0]|u_tx[3]|uart_txd~q ));
  33112. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .coord_x = 14;
  33113. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .coord_y = 9;
  33114. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .coord_z = 6;
  33115. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .mask = 16'h0500;
  33116. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .modeMux = 1'b0;
  33117. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .FeedbackMux = 1'b0;
  33118. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .ShiftMux = 1'b0;
  33119. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .BypassEn = 1'b0;
  33120. defparam \macro_inst|u_uart[0]|u_tx[3]|uart_txd .CarryEnb = 1'b1;
  33121. alta_slice \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 (
  33122. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  33123. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ),
  33124. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ),
  33125. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33126. .Cin(),
  33127. .Qin(),
  33128. .Clk(),
  33129. .AsyncReset(),
  33130. .SyncReset(),
  33131. .ShiftData(),
  33132. .SyncLoad(),
  33133. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector4~0_combout ),
  33134. .Cout(),
  33135. .Q());
  33136. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .coord_x = 10;
  33137. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .coord_y = 1;
  33138. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .coord_z = 10;
  33139. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .mask = 16'hF8AA;
  33140. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .modeMux = 1'b0;
  33141. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .FeedbackMux = 1'b0;
  33142. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .ShiftMux = 1'b0;
  33143. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .BypassEn = 1'b0;
  33144. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector4~0 .CarryEnb = 1'b1;
  33145. alta_slice \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 (
  33146. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0]),
  33147. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  33148. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~q ),
  33149. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ),
  33150. .Cin(),
  33151. .Qin(),
  33152. .Clk(),
  33153. .AsyncReset(),
  33154. .SyncReset(),
  33155. .ShiftData(),
  33156. .SyncLoad(),
  33157. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector5~2_combout ),
  33158. .Cout(),
  33159. .Q());
  33160. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .coord_x = 9;
  33161. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .coord_y = 1;
  33162. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .coord_z = 2;
  33163. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .mask = 16'hF888;
  33164. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .modeMux = 1'b0;
  33165. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .FeedbackMux = 1'b0;
  33166. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .ShiftMux = 1'b0;
  33167. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .BypassEn = 1'b0;
  33168. defparam \macro_inst|u_uart[0]|u_tx[4]|Selector5~2 .CarryEnb = 1'b1;
  33169. alta_slice \macro_inst|u_uart[0]|u_tx[4]|always0~0 (
  33170. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33171. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [1]),
  33172. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [2]),
  33173. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0]),
  33174. .Cin(),
  33175. .Qin(),
  33176. .Clk(),
  33177. .AsyncReset(),
  33178. .SyncReset(),
  33179. .ShiftData(),
  33180. .SyncLoad(),
  33181. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ),
  33182. .Cout(),
  33183. .Q());
  33184. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .coord_x = 10;
  33185. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .coord_y = 1;
  33186. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .coord_z = 5;
  33187. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .mask = 16'h0002;
  33188. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .modeMux = 1'b0;
  33189. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .FeedbackMux = 1'b0;
  33190. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .ShiftMux = 1'b0;
  33191. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .BypassEn = 1'b0;
  33192. defparam \macro_inst|u_uart[0]|u_tx[4]|always0~0 .CarryEnb = 1'b1;
  33193. alta_slice \macro_inst|u_uart[0]|u_tx[4]|always6~0 (
  33194. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  33195. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [0]),
  33196. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [1]),
  33197. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [2]),
  33198. .Cin(),
  33199. .Qin(),
  33200. .Clk(),
  33201. .AsyncReset(),
  33202. .SyncReset(),
  33203. .ShiftData(),
  33204. .SyncLoad(),
  33205. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|always6~0_combout ),
  33206. .Cout(),
  33207. .Q());
  33208. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .coord_x = 11;
  33209. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .coord_y = 2;
  33210. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .coord_z = 3;
  33211. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .mask = 16'h8000;
  33212. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .modeMux = 1'b0;
  33213. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .FeedbackMux = 1'b0;
  33214. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .ShiftMux = 1'b0;
  33215. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .BypassEn = 1'b0;
  33216. defparam \macro_inst|u_uart[0]|u_tx[4]|always6~0 .CarryEnb = 1'b1;
  33217. alta_slice \macro_inst|u_uart[0]|u_tx[4]|comb~1 (
  33218. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  33219. .B(vcc),
  33220. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33221. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ),
  33222. .Cin(),
  33223. .Qin(),
  33224. .Clk(),
  33225. .AsyncReset(),
  33226. .SyncReset(),
  33227. .ShiftData(),
  33228. .SyncLoad(),
  33229. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  33230. .Cout(),
  33231. .Q());
  33232. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .coord_x = 10;
  33233. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .coord_y = 1;
  33234. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .coord_z = 8;
  33235. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .mask = 16'h00A0;
  33236. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .modeMux = 1'b0;
  33237. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .FeedbackMux = 1'b0;
  33238. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .ShiftMux = 1'b0;
  33239. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .BypassEn = 1'b0;
  33240. defparam \macro_inst|u_uart[0]|u_tx[4]|comb~1 .CarryEnb = 1'b1;
  33241. alta_slice \macro_inst|u_uart[0]|u_tx[4]|fifo_rden (
  33242. .A(vcc),
  33243. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  33244. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  33245. .D(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  33246. .Cin(),
  33247. .Qin(),
  33248. .Clk(),
  33249. .AsyncReset(),
  33250. .SyncReset(),
  33251. .ShiftData(),
  33252. .SyncLoad(),
  33253. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33254. .Cout(),
  33255. .Q());
  33256. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .coord_x = 11;
  33257. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .coord_y = 2;
  33258. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .coord_z = 1;
  33259. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .mask = 16'hF030;
  33260. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .modeMux = 1'b0;
  33261. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .FeedbackMux = 1'b0;
  33262. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .ShiftMux = 1'b0;
  33263. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .BypassEn = 1'b0;
  33264. defparam \macro_inst|u_uart[0]|u_tx[4]|fifo_rden .CarryEnb = 1'b1;
  33265. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] (
  33266. .A(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  33267. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [0]),
  33268. .C(vcc),
  33269. .D(vcc),
  33270. .Cin(),
  33271. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [0]),
  33272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33273. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33274. .SyncReset(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ),
  33275. .ShiftData(),
  33276. .SyncLoad(SyncLoad_X62_Y2_GND),
  33277. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0]~4_combout ),
  33278. .Cout(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0]~5 ),
  33279. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [0]));
  33280. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .coord_x = 11;
  33281. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .coord_y = 2;
  33282. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .coord_z = 5;
  33283. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .mask = 16'h6688;
  33284. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .modeMux = 1'b0;
  33285. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  33286. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  33287. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .BypassEn = 1'b1;
  33288. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  33289. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] (
  33290. .A(vcc),
  33291. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [1]),
  33292. .C(vcc),
  33293. .D(vcc),
  33294. .Cin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[0]~5 ),
  33295. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [1]),
  33296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33297. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33298. .SyncReset(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ),
  33299. .ShiftData(),
  33300. .SyncLoad(SyncLoad_X62_Y2_GND),
  33301. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1]~6_combout ),
  33302. .Cout(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1]~7 ),
  33303. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [1]));
  33304. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .coord_x = 11;
  33305. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .coord_y = 2;
  33306. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .coord_z = 6;
  33307. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .mask = 16'h3C3F;
  33308. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .modeMux = 1'b1;
  33309. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  33310. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  33311. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .BypassEn = 1'b1;
  33312. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  33313. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] (
  33314. .A(vcc),
  33315. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [2]),
  33316. .C(vcc),
  33317. .D(vcc),
  33318. .Cin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[1]~7 ),
  33319. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [2]),
  33320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33322. .SyncReset(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ),
  33323. .ShiftData(),
  33324. .SyncLoad(SyncLoad_X62_Y2_GND),
  33325. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2]~8_combout ),
  33326. .Cout(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2]~9 ),
  33327. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [2]));
  33328. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .coord_x = 11;
  33329. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .coord_y = 2;
  33330. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .coord_z = 7;
  33331. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .mask = 16'hC30C;
  33332. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .modeMux = 1'b1;
  33333. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  33334. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  33335. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .BypassEn = 1'b1;
  33336. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  33337. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] (
  33338. .A(vcc),
  33339. .B(vcc),
  33340. .C(vcc),
  33341. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [3]),
  33342. .Cin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[2]~9 ),
  33343. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [3]),
  33344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33346. .SyncReset(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ),
  33347. .ShiftData(),
  33348. .SyncLoad(SyncLoad_X62_Y2_GND),
  33349. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3]~10_combout ),
  33350. .Cout(),
  33351. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [3]));
  33352. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .coord_x = 11;
  33353. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .coord_y = 2;
  33354. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .coord_z = 8;
  33355. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .mask = 16'h0FF0;
  33356. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .modeMux = 1'b1;
  33357. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  33358. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  33359. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .BypassEn = 1'b1;
  33360. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  33361. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_bit (
  33362. .A(vcc),
  33363. .B(vcc),
  33364. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_baud_cnt [3]),
  33365. .D(\macro_inst|u_uart[0]|u_tx[4]|always6~0_combout ),
  33366. .Cin(),
  33367. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33369. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33370. .SyncReset(),
  33371. .ShiftData(),
  33372. .SyncLoad(),
  33373. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|always6~1_combout ),
  33374. .Cout(),
  33375. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ));
  33376. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .coord_x = 11;
  33377. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .coord_y = 2;
  33378. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .coord_z = 10;
  33379. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .mask = 16'hF000;
  33380. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .modeMux = 1'b0;
  33381. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .FeedbackMux = 1'b0;
  33382. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .ShiftMux = 1'b0;
  33383. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .BypassEn = 1'b0;
  33384. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_bit .CarryEnb = 1'b1;
  33385. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_complete (
  33386. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  33387. .B(\macro_inst|u_uart[0]|u_regs|clear_flags[4]~15_combout ),
  33388. .C(vcc),
  33389. .D(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  33390. .Cin(),
  33391. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_complete~q ),
  33392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y3_SIG_VCC ),
  33393. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y3_SIG ),
  33394. .SyncReset(),
  33395. .ShiftData(),
  33396. .SyncLoad(),
  33397. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_complete~0_combout ),
  33398. .Cout(),
  33399. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_complete~q ));
  33400. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .coord_x = 16;
  33401. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .coord_y = 1;
  33402. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .coord_z = 12;
  33403. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .mask = 16'h5540;
  33404. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .modeMux = 1'b0;
  33405. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .FeedbackMux = 1'b1;
  33406. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .ShiftMux = 1'b0;
  33407. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .BypassEn = 1'b0;
  33408. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_complete .CarryEnb = 1'b1;
  33409. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] (
  33410. .A(vcc),
  33411. .B(vcc),
  33412. .C(vcc),
  33413. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33414. .Cin(),
  33415. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0]),
  33416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout_X58_Y1_SIG_SIG ),
  33417. .AsyncReset(AsyncReset_X58_Y1_GND),
  33418. .SyncReset(),
  33419. .ShiftData(),
  33420. .SyncLoad(),
  33421. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~2_combout ),
  33422. .Cout(),
  33423. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0]));
  33424. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .coord_x = 10;
  33425. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .coord_y = 1;
  33426. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .coord_z = 1;
  33427. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .mask = 16'hFF0F;
  33428. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .modeMux = 1'b0;
  33429. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  33430. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .ShiftMux = 1'b0;
  33431. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .BypassEn = 1'b0;
  33432. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0] .CarryEnb = 1'b1;
  33433. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 (
  33434. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33435. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33436. .C(vcc),
  33437. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  33438. .Cin(),
  33439. .Qin(),
  33440. .Clk(),
  33441. .AsyncReset(),
  33442. .SyncReset(),
  33443. .ShiftData(),
  33444. .SyncLoad(),
  33445. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout ),
  33446. .Cout(),
  33447. .Q());
  33448. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .coord_x = 10;
  33449. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .coord_y = 1;
  33450. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .coord_z = 14;
  33451. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .mask = 16'hEECC;
  33452. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .modeMux = 1'b0;
  33453. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .FeedbackMux = 1'b0;
  33454. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .ShiftMux = 1'b0;
  33455. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .BypassEn = 1'b0;
  33456. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1 .CarryEnb = 1'b1;
  33457. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] (
  33458. .A(vcc),
  33459. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0]),
  33460. .C(vcc),
  33461. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33462. .Cin(),
  33463. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [1]),
  33464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout_X58_Y1_SIG_SIG ),
  33465. .AsyncReset(AsyncReset_X58_Y1_GND),
  33466. .SyncReset(),
  33467. .ShiftData(),
  33468. .SyncLoad(),
  33469. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~0_combout ),
  33470. .Cout(),
  33471. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [1]));
  33472. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .coord_x = 10;
  33473. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .coord_y = 1;
  33474. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .coord_z = 4;
  33475. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .mask = 16'hFFC3;
  33476. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .modeMux = 1'b0;
  33477. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  33478. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .ShiftMux = 1'b0;
  33479. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .BypassEn = 1'b0;
  33480. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[1] .CarryEnb = 1'b1;
  33481. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] (
  33482. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [1]),
  33483. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [0]),
  33484. .C(vcc),
  33485. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33486. .Cin(),
  33487. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [2]),
  33488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[0]~1_combout_X58_Y1_SIG_SIG ),
  33489. .AsyncReset(AsyncReset_X58_Y1_GND),
  33490. .SyncReset(),
  33491. .ShiftData(),
  33492. .SyncLoad(),
  33493. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt~3_combout ),
  33494. .Cout(),
  33495. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt [2]));
  33496. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .coord_x = 10;
  33497. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .coord_y = 1;
  33498. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .coord_z = 2;
  33499. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .mask = 16'hFFE1;
  33500. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .modeMux = 1'b0;
  33501. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  33502. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .ShiftMux = 1'b0;
  33503. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .BypassEn = 1'b0;
  33504. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_data_cnt[2] .CarryEnb = 1'b1;
  33505. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] (
  33506. .A(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  33507. .B(\macro_inst|u_uart[0]|u_regs|tx_write [4]),
  33508. .C(vcc),
  33509. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  33510. .Cin(),
  33511. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  33512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33514. .SyncReset(),
  33515. .ShiftData(),
  33516. .SyncLoad(),
  33517. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter~0_combout ),
  33518. .Cout(),
  33519. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]));
  33520. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .coord_x = 11;
  33521. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .coord_y = 2;
  33522. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .coord_z = 12;
  33523. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .mask = 16'h5C0C;
  33524. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .modeMux = 1'b0;
  33525. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  33526. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  33527. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .BypassEn = 1'b0;
  33528. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  33529. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] (
  33530. .A(),
  33531. .B(),
  33532. .C(vcc),
  33533. .D(\rv32.mem_ahb_hwdata[0] ),
  33534. .Cin(),
  33535. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]~q ),
  33536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33537. .AsyncReset(AsyncReset_X62_Y4_GND),
  33538. .SyncReset(),
  33539. .ShiftData(),
  33540. .SyncLoad(),
  33541. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  33542. .Cout(),
  33543. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]~q ));
  33544. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .coord_x = 20;
  33545. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .coord_y = 1;
  33546. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .coord_z = 9;
  33547. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  33548. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  33549. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  33550. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  33551. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  33552. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  33553. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] (
  33554. .A(),
  33555. .B(),
  33556. .C(vcc),
  33557. .D(\rv32.mem_ahb_hwdata[1] ),
  33558. .Cin(),
  33559. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]~q ),
  33560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33561. .AsyncReset(AsyncReset_X62_Y4_GND),
  33562. .SyncReset(),
  33563. .ShiftData(),
  33564. .SyncLoad(),
  33565. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  33566. .Cout(),
  33567. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]~q ));
  33568. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .coord_x = 20;
  33569. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .coord_y = 1;
  33570. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .coord_z = 11;
  33571. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  33572. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  33573. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  33574. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  33575. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  33576. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  33577. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] (
  33578. .A(),
  33579. .B(),
  33580. .C(vcc),
  33581. .D(\rv32.mem_ahb_hwdata[2] ),
  33582. .Cin(),
  33583. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]~q ),
  33584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33585. .AsyncReset(AsyncReset_X62_Y4_GND),
  33586. .SyncReset(),
  33587. .ShiftData(),
  33588. .SyncLoad(),
  33589. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  33590. .Cout(),
  33591. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]~q ));
  33592. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .coord_x = 20;
  33593. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .coord_y = 1;
  33594. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .coord_z = 3;
  33595. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  33596. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  33597. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  33598. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  33599. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  33600. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  33601. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] (
  33602. .A(),
  33603. .B(),
  33604. .C(vcc),
  33605. .D(\rv32.mem_ahb_hwdata[3] ),
  33606. .Cin(),
  33607. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]~q ),
  33608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33609. .AsyncReset(AsyncReset_X62_Y4_GND),
  33610. .SyncReset(),
  33611. .ShiftData(),
  33612. .SyncLoad(),
  33613. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  33614. .Cout(),
  33615. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]~q ));
  33616. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .coord_x = 20;
  33617. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .coord_y = 1;
  33618. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .coord_z = 4;
  33619. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  33620. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  33621. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  33622. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  33623. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  33624. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  33625. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] (
  33626. .A(),
  33627. .B(),
  33628. .C(vcc),
  33629. .D(\rv32.mem_ahb_hwdata[4] ),
  33630. .Cin(),
  33631. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]~q ),
  33632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33633. .AsyncReset(AsyncReset_X62_Y4_GND),
  33634. .SyncReset(),
  33635. .ShiftData(),
  33636. .SyncLoad(),
  33637. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  33638. .Cout(),
  33639. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]~q ));
  33640. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .coord_x = 20;
  33641. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .coord_y = 1;
  33642. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .coord_z = 0;
  33643. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  33644. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  33645. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  33646. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  33647. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  33648. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  33649. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] (
  33650. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  33651. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33652. .C(\rv32.mem_ahb_hwdata[5] ),
  33653. .D(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33654. .Cin(),
  33655. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5]~q ),
  33656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33657. .AsyncReset(AsyncReset_X62_Y4_GND),
  33658. .SyncReset(SyncReset_X62_Y4_GND),
  33659. .ShiftData(),
  33660. .SyncLoad(SyncLoad_X62_Y4_VCC),
  33661. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout ),
  33662. .Cout(),
  33663. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5]~q ));
  33664. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .coord_x = 20;
  33665. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .coord_y = 1;
  33666. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .coord_z = 5;
  33667. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .mask = 16'hFF88;
  33668. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .modeMux = 1'b0;
  33669. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  33670. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  33671. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .BypassEn = 1'b1;
  33672. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  33673. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] (
  33674. .A(),
  33675. .B(),
  33676. .C(vcc),
  33677. .D(\rv32.mem_ahb_hwdata[6] ),
  33678. .Cin(),
  33679. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]~q ),
  33680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33681. .AsyncReset(AsyncReset_X62_Y4_GND),
  33682. .SyncReset(),
  33683. .ShiftData(),
  33684. .SyncLoad(),
  33685. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  33686. .Cout(),
  33687. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]~q ));
  33688. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .coord_x = 20;
  33689. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .coord_y = 1;
  33690. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .coord_z = 1;
  33691. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  33692. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  33693. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  33694. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  33695. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  33696. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  33697. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] (
  33698. .A(),
  33699. .B(),
  33700. .C(vcc),
  33701. .D(\rv32.mem_ahb_hwdata[7] ),
  33702. .Cin(),
  33703. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]~q ),
  33704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y4_SIG_SIG ),
  33705. .AsyncReset(AsyncReset_X62_Y4_GND),
  33706. .SyncReset(),
  33707. .ShiftData(),
  33708. .SyncLoad(),
  33709. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  33710. .Cout(),
  33711. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]~q ));
  33712. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .coord_x = 20;
  33713. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .coord_y = 1;
  33714. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .coord_z = 13;
  33715. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  33716. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  33717. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  33718. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  33719. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  33720. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  33721. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 (
  33722. .A(vcc),
  33723. .B(vcc),
  33724. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  33725. .D(\macro_inst|u_uart[0]|u_regs|tx_write [4]),
  33726. .Cin(),
  33727. .Qin(),
  33728. .Clk(),
  33729. .AsyncReset(),
  33730. .SyncReset(),
  33731. .ShiftData(),
  33732. .SyncLoad(),
  33733. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0_combout ),
  33734. .Cout(),
  33735. .Q());
  33736. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .coord_x = 11;
  33737. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .coord_y = 2;
  33738. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .coord_z = 14;
  33739. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .mask = 16'h0F00;
  33740. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .modeMux = 1'b0;
  33741. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  33742. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .ShiftMux = 1'b0;
  33743. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .BypassEn = 1'b0;
  33744. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_fifo|wrreq~0 .CarryEnb = 1'b1;
  33745. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_parity (
  33746. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33747. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~0_combout ),
  33748. .C(vcc),
  33749. .D(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  33750. .Cin(),
  33751. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~q ),
  33752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  33753. .AsyncReset(AsyncReset_X59_Y1_GND),
  33754. .SyncReset(),
  33755. .ShiftData(),
  33756. .SyncLoad(),
  33757. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~1_combout ),
  33758. .Cout(),
  33759. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_parity~q ));
  33760. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .coord_x = 9;
  33761. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .coord_y = 1;
  33762. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .coord_z = 6;
  33763. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .mask = 16'h14BE;
  33764. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .modeMux = 1'b0;
  33765. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .FeedbackMux = 1'b1;
  33766. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .ShiftMux = 1'b0;
  33767. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .BypassEn = 1'b0;
  33768. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_parity .CarryEnb = 1'b1;
  33769. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] (
  33770. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [1]),
  33771. .B(vcc),
  33772. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][0]~q ),
  33773. .D(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33774. .Cin(),
  33775. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0]),
  33776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33778. .SyncReset(),
  33779. .ShiftData(),
  33780. .SyncLoad(),
  33781. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~0_combout ),
  33782. .Cout(),
  33783. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0]));
  33784. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .coord_x = 20;
  33785. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .coord_y = 1;
  33786. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .coord_z = 8;
  33787. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .mask = 16'hF0AA;
  33788. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .modeMux = 1'b0;
  33789. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  33790. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .ShiftMux = 1'b0;
  33791. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .BypassEn = 1'b0;
  33792. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[0] .CarryEnb = 1'b1;
  33793. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] (
  33794. .A(vcc),
  33795. .B(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33796. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [2]),
  33797. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][1]~q ),
  33798. .Cin(),
  33799. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [1]),
  33800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33802. .SyncReset(),
  33803. .ShiftData(),
  33804. .SyncLoad(),
  33805. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~2_combout ),
  33806. .Cout(),
  33807. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [1]));
  33808. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .coord_x = 20;
  33809. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .coord_y = 1;
  33810. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .coord_z = 12;
  33811. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .mask = 16'hFC30;
  33812. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .modeMux = 1'b0;
  33813. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  33814. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .ShiftMux = 1'b0;
  33815. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .BypassEn = 1'b0;
  33816. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[1] .CarryEnb = 1'b1;
  33817. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] (
  33818. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [3]),
  33819. .B(vcc),
  33820. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][2]~q ),
  33821. .D(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33822. .Cin(),
  33823. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [2]),
  33824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33826. .SyncReset(),
  33827. .ShiftData(),
  33828. .SyncLoad(),
  33829. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~3_combout ),
  33830. .Cout(),
  33831. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [2]));
  33832. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .coord_x = 20;
  33833. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .coord_y = 1;
  33834. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .coord_z = 2;
  33835. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .mask = 16'hF0AA;
  33836. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .modeMux = 1'b0;
  33837. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  33838. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .ShiftMux = 1'b0;
  33839. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .BypassEn = 1'b0;
  33840. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[2] .CarryEnb = 1'b1;
  33841. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] (
  33842. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [4]),
  33843. .B(vcc),
  33844. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][3]~q ),
  33845. .D(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33846. .Cin(),
  33847. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [3]),
  33848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33850. .SyncReset(),
  33851. .ShiftData(),
  33852. .SyncLoad(),
  33853. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~4_combout ),
  33854. .Cout(),
  33855. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [3]));
  33856. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .coord_x = 20;
  33857. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .coord_y = 1;
  33858. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .coord_z = 10;
  33859. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .mask = 16'hF0AA;
  33860. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .modeMux = 1'b0;
  33861. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  33862. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .ShiftMux = 1'b0;
  33863. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .BypassEn = 1'b0;
  33864. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3] .CarryEnb = 1'b1;
  33865. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] (
  33866. .A(vcc),
  33867. .B(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33868. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][4]~q ),
  33869. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [5]),
  33870. .Cin(),
  33871. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [4]),
  33872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33874. .SyncReset(),
  33875. .ShiftData(),
  33876. .SyncLoad(),
  33877. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~5_combout ),
  33878. .Cout(),
  33879. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [4]));
  33880. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .coord_x = 20;
  33881. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .coord_y = 1;
  33882. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .coord_z = 14;
  33883. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .mask = 16'hF3C0;
  33884. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .modeMux = 1'b0;
  33885. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  33886. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .ShiftMux = 1'b0;
  33887. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .BypassEn = 1'b0;
  33888. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[4] .CarryEnb = 1'b1;
  33889. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] (
  33890. .A(vcc),
  33891. .B(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33892. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [6]),
  33893. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][5]~q ),
  33894. .Cin(),
  33895. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [5]),
  33896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33898. .SyncReset(),
  33899. .ShiftData(),
  33900. .SyncLoad(),
  33901. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~6_combout ),
  33902. .Cout(),
  33903. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [5]));
  33904. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .coord_x = 20;
  33905. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .coord_y = 1;
  33906. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .coord_z = 15;
  33907. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .mask = 16'hFC30;
  33908. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .modeMux = 1'b0;
  33909. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  33910. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .ShiftMux = 1'b0;
  33911. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .BypassEn = 1'b0;
  33912. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[5] .CarryEnb = 1'b1;
  33913. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] (
  33914. .A(vcc),
  33915. .B(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33916. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [7]),
  33917. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][6]~q ),
  33918. .Cin(),
  33919. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [6]),
  33920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33922. .SyncReset(),
  33923. .ShiftData(),
  33924. .SyncLoad(),
  33925. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~7_combout ),
  33926. .Cout(),
  33927. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [6]));
  33928. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .coord_x = 20;
  33929. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .coord_y = 1;
  33930. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .coord_z = 6;
  33931. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .mask = 16'hFC30;
  33932. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .modeMux = 1'b0;
  33933. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  33934. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .ShiftMux = 1'b0;
  33935. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .BypassEn = 1'b0;
  33936. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[6] .CarryEnb = 1'b1;
  33937. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] (
  33938. .A(vcc),
  33939. .B(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  33940. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [0]),
  33941. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|fifo[1][7]~q ),
  33942. .Cin(),
  33943. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [7]),
  33944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[3]~1_combout_X62_Y4_SIG_SIG ),
  33945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y4_SIG ),
  33946. .SyncReset(),
  33947. .ShiftData(),
  33948. .SyncLoad(),
  33949. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg~8_combout ),
  33950. .Cout(),
  33951. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg [7]));
  33952. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .coord_x = 20;
  33953. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .coord_y = 1;
  33954. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .coord_z = 7;
  33955. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .mask = 16'hFC30;
  33956. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .modeMux = 1'b0;
  33957. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  33958. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .ShiftMux = 1'b0;
  33959. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .BypassEn = 1'b0;
  33960. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_shift_reg[7] .CarryEnb = 1'b1;
  33961. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA (
  33962. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  33963. .B(\macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ),
  33964. .C(vcc),
  33965. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  33966. .Cin(),
  33967. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  33968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  33969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
  33970. .SyncReset(),
  33971. .ShiftData(),
  33972. .SyncLoad(),
  33973. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector2~0_combout ),
  33974. .Cout(),
  33975. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ));
  33976. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .coord_x = 10;
  33977. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .coord_y = 1;
  33978. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .coord_z = 15;
  33979. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .mask = 16'hBA30;
  33980. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .modeMux = 1'b0;
  33981. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  33982. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .ShiftMux = 1'b0;
  33983. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .BypassEn = 1'b0;
  33984. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA .CarryEnb = 1'b1;
  33985. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE (
  33986. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  33987. .B(vcc),
  33988. .C(vcc),
  33989. .D(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  33990. .Cin(),
  33991. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  33992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y2_SIG_VCC ),
  33993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y2_SIG ),
  33994. .SyncReset(),
  33995. .ShiftData(),
  33996. .SyncLoad(),
  33997. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector0~0_combout ),
  33998. .Cout(),
  33999. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ));
  34000. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .coord_x = 11;
  34001. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .coord_y = 2;
  34002. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .coord_z = 15;
  34003. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .mask = 16'hAAFA;
  34004. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .modeMux = 1'b0;
  34005. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  34006. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  34007. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .BypassEn = 1'b0;
  34008. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  34009. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY (
  34010. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  34011. .B(\macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ),
  34012. .C(\macro_inst|u_uart[0]|u_tx[4]|Selector3~0_combout ),
  34013. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  34014. .Cin(),
  34015. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ),
  34016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  34017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
  34018. .SyncReset(),
  34019. .ShiftData(),
  34020. .SyncLoad(),
  34021. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector3~1_combout ),
  34022. .Cout(),
  34023. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY~q ));
  34024. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .coord_x = 10;
  34025. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .coord_y = 1;
  34026. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .coord_z = 0;
  34027. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .mask = 16'hF8F0;
  34028. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .modeMux = 1'b0;
  34029. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  34030. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  34031. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .BypassEn = 1'b0;
  34032. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  34033. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START (
  34034. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0_combout ),
  34035. .B(\macro_inst|u_uart[0]|u_tx[4]|comb~1_combout ),
  34036. .C(vcc),
  34037. .D(\macro_inst|u_uart[0]|u_tx[4]|fifo_rden~combout ),
  34038. .Cin(),
  34039. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  34040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  34041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
  34042. .SyncReset(),
  34043. .ShiftData(),
  34044. .SyncLoad(),
  34045. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~1_combout ),
  34046. .Cout(),
  34047. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ));
  34048. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .coord_x = 10;
  34049. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .coord_y = 1;
  34050. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .coord_z = 9;
  34051. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .mask = 16'hFF20;
  34052. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .modeMux = 1'b0;
  34053. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .FeedbackMux = 1'b1;
  34054. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .ShiftMux = 1'b0;
  34055. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .BypassEn = 1'b0;
  34056. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START .CarryEnb = 1'b1;
  34057. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 (
  34058. .A(\macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ),
  34059. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  34060. .C(\macro_inst|u_uart[0]|u_tx[4]|Selector5~3_combout ),
  34061. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  34062. .Cin(),
  34063. .Qin(),
  34064. .Clk(),
  34065. .AsyncReset(),
  34066. .SyncReset(),
  34067. .ShiftData(),
  34068. .SyncLoad(),
  34069. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0_combout ),
  34070. .Cout(),
  34071. .Q());
  34072. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .coord_x = 9;
  34073. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .coord_y = 1;
  34074. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .coord_z = 9;
  34075. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .mask = 16'h4F7F;
  34076. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .modeMux = 1'b0;
  34077. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  34078. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  34079. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .BypassEn = 1'b0;
  34080. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  34081. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP (
  34082. .A(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  34083. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_DATA~q ),
  34084. .C(\macro_inst|u_uart[0]|u_tx[4]|Selector4~0_combout ),
  34085. .D(\macro_inst|u_uart[0]|u_tx[4]|always0~0_combout ),
  34086. .Cin(),
  34087. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  34088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  34089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
  34090. .SyncReset(),
  34091. .ShiftData(),
  34092. .SyncLoad(),
  34093. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector4~1_combout ),
  34094. .Cout(),
  34095. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ));
  34096. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .coord_x = 10;
  34097. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .coord_y = 1;
  34098. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .coord_z = 7;
  34099. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .mask = 16'hF4F0;
  34100. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .modeMux = 1'b0;
  34101. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  34102. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .ShiftMux = 1'b0;
  34103. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .BypassEn = 1'b0;
  34104. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP .CarryEnb = 1'b1;
  34105. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_stop (
  34106. .A(vcc),
  34107. .B(vcc),
  34108. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_fifo|counter [0]),
  34109. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  34110. .Cin(),
  34111. .Qin(),
  34112. .Clk(),
  34113. .AsyncReset(),
  34114. .SyncReset(),
  34115. .ShiftData(),
  34116. .SyncLoad(),
  34117. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout ),
  34118. .Cout(),
  34119. .Q());
  34120. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .coord_x = 11;
  34121. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .coord_y = 2;
  34122. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .coord_z = 2;
  34123. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .mask = 16'h000F;
  34124. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .modeMux = 1'b0;
  34125. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .FeedbackMux = 1'b0;
  34126. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .ShiftMux = 1'b0;
  34127. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .BypassEn = 1'b0;
  34128. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop .CarryEnb = 1'b1;
  34129. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt (
  34130. .A(vcc),
  34131. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  34132. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0_combout ),
  34133. .D(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  34134. .Cin(),
  34135. .Qin(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ),
  34136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  34137. .AsyncReset(AsyncReset_X58_Y1_GND),
  34138. .SyncReset(),
  34139. .ShiftData(),
  34140. .SyncLoad(),
  34141. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~1_combout ),
  34142. .Cout(),
  34143. .Q(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ));
  34144. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .coord_x = 10;
  34145. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .coord_y = 1;
  34146. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .coord_z = 13;
  34147. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .mask = 16'hFCF0;
  34148. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .modeMux = 1'b0;
  34149. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .FeedbackMux = 1'b0;
  34150. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .ShiftMux = 1'b0;
  34151. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .BypassEn = 1'b0;
  34152. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt .CarryEnb = 1'b1;
  34153. alta_slice \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 (
  34154. .A(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  34155. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~q ),
  34156. .C(\macro_inst|u_uart[0]|u_tx[4]|tx_bit~q ),
  34157. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_START~q ),
  34158. .Cin(),
  34159. .Qin(),
  34160. .Clk(),
  34161. .AsyncReset(),
  34162. .SyncReset(),
  34163. .ShiftData(),
  34164. .SyncLoad(),
  34165. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0_combout ),
  34166. .Cout(),
  34167. .Q());
  34168. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .coord_x = 10;
  34169. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .coord_y = 1;
  34170. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .coord_z = 6;
  34171. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .mask = 16'h006C;
  34172. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .modeMux = 1'b0;
  34173. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  34174. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  34175. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .BypassEn = 1'b0;
  34176. defparam \macro_inst|u_uart[0]|u_tx[4]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  34177. alta_slice \macro_inst|u_uart[0]|u_tx[4]|uart_txd (
  34178. .A(vcc),
  34179. .B(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_STOP~q ),
  34180. .C(\macro_inst|u_uart[0]|u_tx[4]|Selector5~2_combout ),
  34181. .D(\macro_inst|u_uart[0]|u_tx[4]|tx_state.UART_IDLE~q ),
  34182. .Cin(),
  34183. .Qin(\macro_inst|u_uart[0]|u_tx[4]|uart_txd~q ),
  34184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y1_SIG_VCC ),
  34185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y1_SIG ),
  34186. .SyncReset(),
  34187. .ShiftData(),
  34188. .SyncLoad(),
  34189. .LutOut(\macro_inst|u_uart[0]|u_tx[4]|Selector5~4_combout ),
  34190. .Cout(),
  34191. .Q(\macro_inst|u_uart[0]|u_tx[4]|uart_txd~q ));
  34192. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .coord_x = 9;
  34193. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .coord_y = 1;
  34194. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .coord_z = 3;
  34195. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .mask = 16'h0300;
  34196. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .modeMux = 1'b0;
  34197. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .FeedbackMux = 1'b0;
  34198. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .ShiftMux = 1'b0;
  34199. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .BypassEn = 1'b0;
  34200. defparam \macro_inst|u_uart[0]|u_tx[4]|uart_txd .CarryEnb = 1'b1;
  34201. alta_slice \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 (
  34202. .A(vcc),
  34203. .B(vcc),
  34204. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ),
  34205. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34206. .Cin(),
  34207. .Qin(),
  34208. .Clk(),
  34209. .AsyncReset(),
  34210. .SyncReset(),
  34211. .ShiftData(),
  34212. .SyncLoad(),
  34213. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector3~0_combout ),
  34214. .Cout(),
  34215. .Q());
  34216. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .coord_x = 5;
  34217. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .coord_y = 4;
  34218. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .coord_z = 3;
  34219. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .mask = 16'h00F0;
  34220. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .modeMux = 1'b0;
  34221. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .FeedbackMux = 1'b0;
  34222. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .ShiftMux = 1'b0;
  34223. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .BypassEn = 1'b0;
  34224. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector3~0 .CarryEnb = 1'b1;
  34225. alta_slice \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 (
  34226. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ),
  34227. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  34228. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ),
  34229. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34230. .Cin(),
  34231. .Qin(),
  34232. .Clk(),
  34233. .AsyncReset(),
  34234. .SyncReset(),
  34235. .ShiftData(),
  34236. .SyncLoad(),
  34237. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector4~0_combout ),
  34238. .Cout(),
  34239. .Q());
  34240. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .coord_x = 5;
  34241. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .coord_y = 4;
  34242. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .coord_z = 6;
  34243. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .mask = 16'hEACC;
  34244. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .modeMux = 1'b0;
  34245. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .FeedbackMux = 1'b0;
  34246. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .ShiftMux = 1'b0;
  34247. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .BypassEn = 1'b0;
  34248. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector4~0 .CarryEnb = 1'b1;
  34249. alta_slice \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 (
  34250. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~q ),
  34251. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  34252. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ),
  34253. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0]),
  34254. .Cin(),
  34255. .Qin(),
  34256. .Clk(),
  34257. .AsyncReset(),
  34258. .SyncReset(),
  34259. .ShiftData(),
  34260. .SyncLoad(),
  34261. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector5~2_combout ),
  34262. .Cout(),
  34263. .Q());
  34264. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .coord_x = 5;
  34265. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .coord_y = 4;
  34266. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .coord_z = 0;
  34267. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .mask = 16'hECA0;
  34268. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .modeMux = 1'b0;
  34269. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .FeedbackMux = 1'b0;
  34270. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .ShiftMux = 1'b0;
  34271. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .BypassEn = 1'b0;
  34272. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~2 .CarryEnb = 1'b1;
  34273. alta_slice \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 (
  34274. .A(vcc),
  34275. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  34276. .C(vcc),
  34277. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  34278. .Cin(),
  34279. .Qin(),
  34280. .Clk(),
  34281. .AsyncReset(),
  34282. .SyncReset(),
  34283. .ShiftData(),
  34284. .SyncLoad(),
  34285. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector5~3_combout ),
  34286. .Cout(),
  34287. .Q());
  34288. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .coord_x = 5;
  34289. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .coord_y = 4;
  34290. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .coord_z = 14;
  34291. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .mask = 16'h00CC;
  34292. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .modeMux = 1'b0;
  34293. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .FeedbackMux = 1'b0;
  34294. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .ShiftMux = 1'b0;
  34295. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .BypassEn = 1'b0;
  34296. defparam \macro_inst|u_uart[0]|u_tx[5]|Selector5~3 .CarryEnb = 1'b1;
  34297. alta_slice \macro_inst|u_uart[0]|u_tx[5]|always0~0 (
  34298. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [2]),
  34299. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0]),
  34300. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [1]),
  34301. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34302. .Cin(),
  34303. .Qin(),
  34304. .Clk(),
  34305. .AsyncReset(),
  34306. .SyncReset(),
  34307. .ShiftData(),
  34308. .SyncLoad(),
  34309. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ),
  34310. .Cout(),
  34311. .Q());
  34312. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .coord_x = 5;
  34313. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .coord_y = 4;
  34314. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .coord_z = 9;
  34315. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .mask = 16'h0100;
  34316. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .modeMux = 1'b0;
  34317. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .FeedbackMux = 1'b0;
  34318. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .ShiftMux = 1'b0;
  34319. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .BypassEn = 1'b0;
  34320. defparam \macro_inst|u_uart[0]|u_tx[5]|always0~0 .CarryEnb = 1'b1;
  34321. alta_slice \macro_inst|u_uart[0]|u_tx[5]|always6~0 (
  34322. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [0]),
  34323. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [1]),
  34324. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [2]),
  34325. .D(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  34326. .Cin(),
  34327. .Qin(),
  34328. .Clk(),
  34329. .AsyncReset(),
  34330. .SyncReset(),
  34331. .ShiftData(),
  34332. .SyncLoad(),
  34333. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|always6~0_combout ),
  34334. .Cout(),
  34335. .Q());
  34336. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .coord_x = 4;
  34337. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .coord_y = 3;
  34338. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .coord_z = 12;
  34339. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .mask = 16'h8000;
  34340. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .modeMux = 1'b0;
  34341. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .FeedbackMux = 1'b0;
  34342. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .ShiftMux = 1'b0;
  34343. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .BypassEn = 1'b0;
  34344. defparam \macro_inst|u_uart[0]|u_tx[5]|always6~0 .CarryEnb = 1'b1;
  34345. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] (
  34346. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [0]),
  34347. .B(\macro_inst|u_uart[0]|u_baud|baud16~q ),
  34348. .C(vcc),
  34349. .D(vcc),
  34350. .Cin(),
  34351. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [0]),
  34352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  34353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  34354. .SyncReset(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ),
  34355. .ShiftData(),
  34356. .SyncLoad(SyncLoad_X45_Y1_GND),
  34357. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0]~4_combout ),
  34358. .Cout(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0]~5 ),
  34359. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [0]));
  34360. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .coord_x = 4;
  34361. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .coord_y = 3;
  34362. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .coord_z = 4;
  34363. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .mask = 16'h6688;
  34364. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .modeMux = 1'b0;
  34365. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  34366. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  34367. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .BypassEn = 1'b1;
  34368. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  34369. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] (
  34370. .A(vcc),
  34371. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [1]),
  34372. .C(vcc),
  34373. .D(vcc),
  34374. .Cin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[0]~5 ),
  34375. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [1]),
  34376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  34377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  34378. .SyncReset(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ),
  34379. .ShiftData(),
  34380. .SyncLoad(SyncLoad_X45_Y1_GND),
  34381. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1]~6_combout ),
  34382. .Cout(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1]~7 ),
  34383. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [1]));
  34384. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .coord_x = 4;
  34385. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .coord_y = 3;
  34386. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .coord_z = 5;
  34387. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .mask = 16'h3C3F;
  34388. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .modeMux = 1'b1;
  34389. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  34390. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  34391. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .BypassEn = 1'b1;
  34392. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  34393. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] (
  34394. .A(vcc),
  34395. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [2]),
  34396. .C(vcc),
  34397. .D(vcc),
  34398. .Cin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[1]~7 ),
  34399. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [2]),
  34400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  34401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  34402. .SyncReset(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ),
  34403. .ShiftData(),
  34404. .SyncLoad(SyncLoad_X45_Y1_GND),
  34405. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2]~8_combout ),
  34406. .Cout(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2]~9 ),
  34407. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [2]));
  34408. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .coord_x = 4;
  34409. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .coord_y = 3;
  34410. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .coord_z = 6;
  34411. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .mask = 16'hC30C;
  34412. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .modeMux = 1'b1;
  34413. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  34414. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  34415. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .BypassEn = 1'b1;
  34416. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  34417. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] (
  34418. .A(vcc),
  34419. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [3]),
  34420. .C(vcc),
  34421. .D(vcc),
  34422. .Cin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[2]~9 ),
  34423. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [3]),
  34424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  34425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  34426. .SyncReset(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ),
  34427. .ShiftData(),
  34428. .SyncLoad(SyncLoad_X45_Y1_GND),
  34429. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3]~10_combout ),
  34430. .Cout(),
  34431. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [3]));
  34432. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .coord_x = 4;
  34433. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .coord_y = 3;
  34434. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .coord_z = 7;
  34435. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .mask = 16'h3C3C;
  34436. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .modeMux = 1'b1;
  34437. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  34438. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  34439. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .BypassEn = 1'b1;
  34440. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  34441. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_bit (
  34442. .A(vcc),
  34443. .B(vcc),
  34444. .C(\macro_inst|u_uart[0]|u_tx[5]|always6~0_combout ),
  34445. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_baud_cnt [3]),
  34446. .Cin(),
  34447. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X45_Y1_SIG_VCC ),
  34449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X45_Y1_SIG ),
  34450. .SyncReset(),
  34451. .ShiftData(),
  34452. .SyncLoad(),
  34453. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|always6~1_combout ),
  34454. .Cout(),
  34455. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ));
  34456. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .coord_x = 4;
  34457. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .coord_y = 3;
  34458. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .coord_z = 15;
  34459. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .mask = 16'hF000;
  34460. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .modeMux = 1'b0;
  34461. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .FeedbackMux = 1'b0;
  34462. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .ShiftMux = 1'b0;
  34463. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .BypassEn = 1'b0;
  34464. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_bit .CarryEnb = 1'b1;
  34465. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_complete (
  34466. .A(\macro_inst|u_uart[0]|u_regs|clear_flags[5]~16_combout ),
  34467. .B(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  34468. .C(vcc),
  34469. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  34470. .Cin(),
  34471. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_complete~q ),
  34472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  34473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  34474. .SyncReset(),
  34475. .ShiftData(),
  34476. .SyncLoad(),
  34477. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_complete~0_combout ),
  34478. .Cout(),
  34479. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_complete~q ));
  34480. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .coord_x = 12;
  34481. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .coord_y = 2;
  34482. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .coord_z = 10;
  34483. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .mask = 16'h00DC;
  34484. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .modeMux = 1'b0;
  34485. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .FeedbackMux = 1'b1;
  34486. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .ShiftMux = 1'b0;
  34487. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .BypassEn = 1'b0;
  34488. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_complete .CarryEnb = 1'b1;
  34489. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] (
  34490. .A(vcc),
  34491. .B(vcc),
  34492. .C(vcc),
  34493. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  34494. .Cin(),
  34495. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0]),
  34496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout_X51_Y1_SIG_SIG ),
  34497. .AsyncReset(AsyncReset_X51_Y1_GND),
  34498. .SyncReset(),
  34499. .ShiftData(),
  34500. .SyncLoad(),
  34501. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~2_combout ),
  34502. .Cout(),
  34503. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0]));
  34504. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .coord_x = 5;
  34505. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .coord_y = 4;
  34506. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .coord_z = 7;
  34507. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .mask = 16'hFF0F;
  34508. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .modeMux = 1'b0;
  34509. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  34510. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .ShiftMux = 1'b0;
  34511. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .BypassEn = 1'b0;
  34512. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0] .CarryEnb = 1'b1;
  34513. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 (
  34514. .A(vcc),
  34515. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  34516. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  34517. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34518. .Cin(),
  34519. .Qin(),
  34520. .Clk(),
  34521. .AsyncReset(),
  34522. .SyncReset(),
  34523. .ShiftData(),
  34524. .SyncLoad(),
  34525. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout ),
  34526. .Cout(),
  34527. .Q());
  34528. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .coord_x = 5;
  34529. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .coord_y = 4;
  34530. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .coord_z = 11;
  34531. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .mask = 16'hFCCC;
  34532. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .modeMux = 1'b0;
  34533. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .FeedbackMux = 1'b0;
  34534. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .ShiftMux = 1'b0;
  34535. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .BypassEn = 1'b0;
  34536. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1 .CarryEnb = 1'b1;
  34537. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] (
  34538. .A(vcc),
  34539. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0]),
  34540. .C(vcc),
  34541. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  34542. .Cin(),
  34543. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [1]),
  34544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout_X51_Y1_SIG_SIG ),
  34545. .AsyncReset(AsyncReset_X51_Y1_GND),
  34546. .SyncReset(),
  34547. .ShiftData(),
  34548. .SyncLoad(),
  34549. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~0_combout ),
  34550. .Cout(),
  34551. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [1]));
  34552. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .coord_x = 5;
  34553. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .coord_y = 4;
  34554. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .coord_z = 4;
  34555. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .mask = 16'hFFC3;
  34556. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .modeMux = 1'b0;
  34557. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  34558. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .ShiftMux = 1'b0;
  34559. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .BypassEn = 1'b0;
  34560. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[1] .CarryEnb = 1'b1;
  34561. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] (
  34562. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [1]),
  34563. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [0]),
  34564. .C(vcc),
  34565. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  34566. .Cin(),
  34567. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [2]),
  34568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[0]~1_combout_X51_Y1_SIG_SIG ),
  34569. .AsyncReset(AsyncReset_X51_Y1_GND),
  34570. .SyncReset(),
  34571. .ShiftData(),
  34572. .SyncLoad(),
  34573. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt~3_combout ),
  34574. .Cout(),
  34575. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt [2]));
  34576. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .coord_x = 5;
  34577. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .coord_y = 4;
  34578. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .coord_z = 10;
  34579. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .mask = 16'hFFE1;
  34580. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .modeMux = 1'b0;
  34581. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  34582. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .ShiftMux = 1'b0;
  34583. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .BypassEn = 1'b0;
  34584. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_data_cnt[2] .CarryEnb = 1'b1;
  34585. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] (
  34586. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  34587. .B(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  34588. .C(vcc),
  34589. .D(\macro_inst|u_uart[0]|u_regs|tx_write [5]),
  34590. .Cin(),
  34591. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  34592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  34593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  34594. .SyncReset(),
  34595. .ShiftData(),
  34596. .SyncLoad(),
  34597. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter~0_combout ),
  34598. .Cout(),
  34599. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]));
  34600. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .coord_x = 12;
  34601. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .coord_y = 2;
  34602. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .coord_z = 1;
  34603. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .mask = 16'h2F20;
  34604. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .modeMux = 1'b0;
  34605. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  34606. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  34607. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .BypassEn = 1'b0;
  34608. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  34609. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] (
  34610. .A(),
  34611. .B(),
  34612. .C(vcc),
  34613. .D(\rv32.mem_ahb_hwdata[0] ),
  34614. .Cin(),
  34615. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]~q ),
  34616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34617. .AsyncReset(AsyncReset_X52_Y1_GND),
  34618. .SyncReset(),
  34619. .ShiftData(),
  34620. .SyncLoad(),
  34621. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  34622. .Cout(),
  34623. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]~q ));
  34624. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .coord_x = 12;
  34625. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .coord_y = 4;
  34626. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .coord_z = 1;
  34627. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  34628. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  34629. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  34630. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  34631. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  34632. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  34633. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] (
  34634. .A(),
  34635. .B(),
  34636. .C(vcc),
  34637. .D(\rv32.mem_ahb_hwdata[1] ),
  34638. .Cin(),
  34639. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]~q ),
  34640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34641. .AsyncReset(AsyncReset_X52_Y1_GND),
  34642. .SyncReset(),
  34643. .ShiftData(),
  34644. .SyncLoad(),
  34645. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  34646. .Cout(),
  34647. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]~q ));
  34648. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .coord_x = 12;
  34649. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .coord_y = 4;
  34650. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .coord_z = 4;
  34651. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  34652. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  34653. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  34654. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  34655. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  34656. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  34657. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] (
  34658. .A(),
  34659. .B(),
  34660. .C(vcc),
  34661. .D(\rv32.mem_ahb_hwdata[2] ),
  34662. .Cin(),
  34663. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]~q ),
  34664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34665. .AsyncReset(AsyncReset_X52_Y1_GND),
  34666. .SyncReset(),
  34667. .ShiftData(),
  34668. .SyncLoad(),
  34669. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  34670. .Cout(),
  34671. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]~q ));
  34672. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .coord_x = 12;
  34673. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .coord_y = 4;
  34674. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .coord_z = 11;
  34675. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  34676. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  34677. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  34678. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  34679. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  34680. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  34681. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] (
  34682. .A(),
  34683. .B(),
  34684. .C(vcc),
  34685. .D(\rv32.mem_ahb_hwdata[3] ),
  34686. .Cin(),
  34687. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]~q ),
  34688. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34689. .AsyncReset(AsyncReset_X52_Y1_GND),
  34690. .SyncReset(),
  34691. .ShiftData(),
  34692. .SyncLoad(),
  34693. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  34694. .Cout(),
  34695. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]~q ));
  34696. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .coord_x = 12;
  34697. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .coord_y = 4;
  34698. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .coord_z = 13;
  34699. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  34700. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  34701. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  34702. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  34703. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  34704. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  34705. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] (
  34706. .A(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34707. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  34708. .C(\rv32.mem_ahb_hwdata[4] ),
  34709. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34710. .Cin(),
  34711. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4]~q ),
  34712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34713. .AsyncReset(AsyncReset_X52_Y1_GND),
  34714. .SyncReset(SyncReset_X52_Y1_GND),
  34715. .ShiftData(),
  34716. .SyncLoad(SyncLoad_X52_Y1_VCC),
  34717. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout ),
  34718. .Cout(),
  34719. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4]~q ));
  34720. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .coord_x = 12;
  34721. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .coord_y = 4;
  34722. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .coord_z = 3;
  34723. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .mask = 16'hEEAA;
  34724. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .modeMux = 1'b0;
  34725. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  34726. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  34727. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .BypassEn = 1'b1;
  34728. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  34729. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] (
  34730. .A(),
  34731. .B(),
  34732. .C(vcc),
  34733. .D(\rv32.mem_ahb_hwdata[5] ),
  34734. .Cin(),
  34735. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]~q ),
  34736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34737. .AsyncReset(AsyncReset_X52_Y1_GND),
  34738. .SyncReset(),
  34739. .ShiftData(),
  34740. .SyncLoad(),
  34741. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  34742. .Cout(),
  34743. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]~q ));
  34744. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .coord_x = 12;
  34745. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .coord_y = 4;
  34746. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .coord_z = 9;
  34747. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  34748. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  34749. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  34750. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  34751. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  34752. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  34753. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] (
  34754. .A(),
  34755. .B(),
  34756. .C(vcc),
  34757. .D(\rv32.mem_ahb_hwdata[6] ),
  34758. .Cin(),
  34759. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]~q ),
  34760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34761. .AsyncReset(AsyncReset_X52_Y1_GND),
  34762. .SyncReset(),
  34763. .ShiftData(),
  34764. .SyncLoad(),
  34765. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  34766. .Cout(),
  34767. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]~q ));
  34768. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .coord_x = 12;
  34769. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .coord_y = 4;
  34770. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .coord_z = 5;
  34771. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  34772. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  34773. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  34774. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  34775. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  34776. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  34777. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] (
  34778. .A(),
  34779. .B(),
  34780. .C(vcc),
  34781. .D(\rv32.mem_ahb_hwdata[7] ),
  34782. .Cin(),
  34783. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]~q ),
  34784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_fifo|wrreq~0_combout_X52_Y1_SIG_SIG ),
  34785. .AsyncReset(AsyncReset_X52_Y1_GND),
  34786. .SyncReset(),
  34787. .ShiftData(),
  34788. .SyncLoad(),
  34789. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  34790. .Cout(),
  34791. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]~q ));
  34792. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .coord_x = 12;
  34793. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .coord_y = 4;
  34794. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .coord_z = 15;
  34795. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  34796. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  34797. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  34798. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  34799. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  34800. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  34801. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_parity (
  34802. .A(\macro_inst|u_uart[0]|u_regs|lcr_eps~q ),
  34803. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~0_combout ),
  34804. .C(vcc),
  34805. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  34806. .Cin(),
  34807. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~q ),
  34808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ),
  34809. .AsyncReset(AsyncReset_X51_Y1_GND),
  34810. .SyncReset(),
  34811. .ShiftData(),
  34812. .SyncLoad(),
  34813. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~1_combout ),
  34814. .Cout(),
  34815. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~q ));
  34816. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .coord_x = 5;
  34817. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .coord_y = 4;
  34818. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .coord_z = 12;
  34819. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .mask = 16'h553C;
  34820. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .modeMux = 1'b0;
  34821. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .FeedbackMux = 1'b1;
  34822. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .ShiftMux = 1'b0;
  34823. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .BypassEn = 1'b0;
  34824. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity .CarryEnb = 1'b1;
  34825. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 (
  34826. .A(\macro_inst|u_uart[0]|u_regs|lcr_sps~q ),
  34827. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0]),
  34828. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  34829. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  34830. .Cin(),
  34831. .Qin(),
  34832. .Clk(),
  34833. .AsyncReset(),
  34834. .SyncReset(),
  34835. .ShiftData(),
  34836. .SyncLoad(),
  34837. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_parity~0_combout ),
  34838. .Cout(),
  34839. .Q());
  34840. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .coord_x = 5;
  34841. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .coord_y = 4;
  34842. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .coord_z = 5;
  34843. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .mask = 16'h4000;
  34844. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .modeMux = 1'b0;
  34845. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .FeedbackMux = 1'b0;
  34846. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .ShiftMux = 1'b0;
  34847. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .BypassEn = 1'b0;
  34848. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_parity~0 .CarryEnb = 1'b1;
  34849. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] (
  34850. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [1]),
  34851. .B(vcc),
  34852. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34853. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][0]~q ),
  34854. .Cin(),
  34855. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0]),
  34856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34858. .SyncReset(),
  34859. .ShiftData(),
  34860. .SyncLoad(),
  34861. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~0_combout ),
  34862. .Cout(),
  34863. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0]));
  34864. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .coord_x = 12;
  34865. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .coord_y = 4;
  34866. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .coord_z = 6;
  34867. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .mask = 16'hFA0A;
  34868. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .modeMux = 1'b0;
  34869. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  34870. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .ShiftMux = 1'b0;
  34871. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .BypassEn = 1'b0;
  34872. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[0] .CarryEnb = 1'b1;
  34873. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] (
  34874. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][1]~q ),
  34875. .B(vcc),
  34876. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [2]),
  34877. .D(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34878. .Cin(),
  34879. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [1]),
  34880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34882. .SyncReset(),
  34883. .ShiftData(),
  34884. .SyncLoad(),
  34885. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~2_combout ),
  34886. .Cout(),
  34887. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [1]));
  34888. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .coord_x = 12;
  34889. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .coord_y = 4;
  34890. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .coord_z = 12;
  34891. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .mask = 16'hAAF0;
  34892. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .modeMux = 1'b0;
  34893. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  34894. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .ShiftMux = 1'b0;
  34895. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .BypassEn = 1'b0;
  34896. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[1] .CarryEnb = 1'b1;
  34897. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] (
  34898. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [3]),
  34899. .B(vcc),
  34900. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34901. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][2]~q ),
  34902. .Cin(),
  34903. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [2]),
  34904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34906. .SyncReset(),
  34907. .ShiftData(),
  34908. .SyncLoad(),
  34909. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~3_combout ),
  34910. .Cout(),
  34911. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [2]));
  34912. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .coord_x = 12;
  34913. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .coord_y = 4;
  34914. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .coord_z = 10;
  34915. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .mask = 16'hFA0A;
  34916. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .modeMux = 1'b0;
  34917. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  34918. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .ShiftMux = 1'b0;
  34919. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .BypassEn = 1'b0;
  34920. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[2] .CarryEnb = 1'b1;
  34921. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] (
  34922. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [4]),
  34923. .B(vcc),
  34924. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34925. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][3]~q ),
  34926. .Cin(),
  34927. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [3]),
  34928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34930. .SyncReset(),
  34931. .ShiftData(),
  34932. .SyncLoad(),
  34933. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~4_combout ),
  34934. .Cout(),
  34935. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [3]));
  34936. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .coord_x = 12;
  34937. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .coord_y = 4;
  34938. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .coord_z = 0;
  34939. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .mask = 16'hFA0A;
  34940. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .modeMux = 1'b0;
  34941. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  34942. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .ShiftMux = 1'b0;
  34943. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .BypassEn = 1'b0;
  34944. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[3] .CarryEnb = 1'b1;
  34945. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] (
  34946. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [5]),
  34947. .B(vcc),
  34948. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34949. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][4]~q ),
  34950. .Cin(),
  34951. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [4]),
  34952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34954. .SyncReset(),
  34955. .ShiftData(),
  34956. .SyncLoad(),
  34957. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~5_combout ),
  34958. .Cout(),
  34959. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [4]));
  34960. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .coord_x = 12;
  34961. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .coord_y = 4;
  34962. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .coord_z = 2;
  34963. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .mask = 16'hFA0A;
  34964. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .modeMux = 1'b0;
  34965. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  34966. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .ShiftMux = 1'b0;
  34967. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .BypassEn = 1'b0;
  34968. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[4] .CarryEnb = 1'b1;
  34969. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] (
  34970. .A(vcc),
  34971. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [6]),
  34972. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34973. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][5]~q ),
  34974. .Cin(),
  34975. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [5]),
  34976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  34977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  34978. .SyncReset(),
  34979. .ShiftData(),
  34980. .SyncLoad(),
  34981. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~6_combout ),
  34982. .Cout(),
  34983. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [5]));
  34984. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .coord_x = 12;
  34985. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .coord_y = 4;
  34986. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .coord_z = 8;
  34987. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .mask = 16'hFC0C;
  34988. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .modeMux = 1'b0;
  34989. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  34990. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .ShiftMux = 1'b0;
  34991. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .BypassEn = 1'b0;
  34992. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5] .CarryEnb = 1'b1;
  34993. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] (
  34994. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [7]),
  34995. .B(vcc),
  34996. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  34997. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][6]~q ),
  34998. .Cin(),
  34999. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [6]),
  35000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  35001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  35002. .SyncReset(),
  35003. .ShiftData(),
  35004. .SyncLoad(),
  35005. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~7_combout ),
  35006. .Cout(),
  35007. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [6]));
  35008. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .coord_x = 12;
  35009. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .coord_y = 4;
  35010. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .coord_z = 7;
  35011. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .mask = 16'hFA0A;
  35012. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .modeMux = 1'b0;
  35013. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  35014. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .ShiftMux = 1'b0;
  35015. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .BypassEn = 1'b0;
  35016. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[6] .CarryEnb = 1'b1;
  35017. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] (
  35018. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [0]),
  35019. .B(vcc),
  35020. .C(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  35021. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|fifo[1][7]~q ),
  35022. .Cin(),
  35023. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [7]),
  35024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[5]~1_combout_X52_Y1_SIG_SIG ),
  35025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y1_SIG ),
  35026. .SyncReset(),
  35027. .ShiftData(),
  35028. .SyncLoad(),
  35029. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg~8_combout ),
  35030. .Cout(),
  35031. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg [7]));
  35032. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .coord_x = 12;
  35033. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .coord_y = 4;
  35034. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .coord_z = 14;
  35035. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .mask = 16'hFA0A;
  35036. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .modeMux = 1'b0;
  35037. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  35038. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .ShiftMux = 1'b0;
  35039. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .BypassEn = 1'b0;
  35040. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_shift_reg[7] .CarryEnb = 1'b1;
  35041. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA (
  35042. .A(\macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ),
  35043. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  35044. .C(vcc),
  35045. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  35046. .Cin(),
  35047. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  35048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ),
  35049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ),
  35050. .SyncReset(),
  35051. .ShiftData(),
  35052. .SyncLoad(),
  35053. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector2~0_combout ),
  35054. .Cout(),
  35055. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ));
  35056. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .coord_x = 5;
  35057. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .coord_y = 4;
  35058. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .coord_z = 8;
  35059. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .mask = 16'hDC50;
  35060. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .modeMux = 1'b0;
  35061. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  35062. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .ShiftMux = 1'b0;
  35063. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .BypassEn = 1'b0;
  35064. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA .CarryEnb = 1'b1;
  35065. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE (
  35066. .A(vcc),
  35067. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_fifo|counter [0]),
  35068. .C(vcc),
  35069. .D(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  35070. .Cin(),
  35071. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  35072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y1_SIG_VCC ),
  35073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y1_SIG ),
  35074. .SyncReset(),
  35075. .ShiftData(),
  35076. .SyncLoad(),
  35077. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector0~0_combout ),
  35078. .Cout(),
  35079. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ));
  35080. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .coord_x = 10;
  35081. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .coord_y = 1;
  35082. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .coord_z = 3;
  35083. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .mask = 16'hCCFC;
  35084. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .modeMux = 1'b0;
  35085. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  35086. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  35087. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .BypassEn = 1'b0;
  35088. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  35089. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY (
  35090. .A(\macro_inst|u_uart[0]|u_tx[5]|Selector3~0_combout ),
  35091. .B(\macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ),
  35092. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  35093. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  35094. .Cin(),
  35095. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ),
  35096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ),
  35097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ),
  35098. .SyncReset(),
  35099. .ShiftData(),
  35100. .SyncLoad(),
  35101. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector3~1_combout ),
  35102. .Cout(),
  35103. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY~q ));
  35104. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .coord_x = 5;
  35105. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .coord_y = 4;
  35106. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .coord_z = 2;
  35107. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .mask = 16'hEAAA;
  35108. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .modeMux = 1'b0;
  35109. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  35110. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  35111. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .BypassEn = 1'b0;
  35112. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  35113. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START (
  35114. .A(\macro_inst|u_uart[0]|u_tx[5]|fifo_rden~combout ),
  35115. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0_combout ),
  35116. .C(vcc),
  35117. .D(\macro_inst|u_uart[0]|u_tx[5]|comb~1_combout ),
  35118. .Cin(),
  35119. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  35120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  35121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y1_SIG ),
  35122. .SyncReset(),
  35123. .ShiftData(),
  35124. .SyncLoad(),
  35125. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~1_combout ),
  35126. .Cout(),
  35127. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ));
  35128. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .coord_x = 12;
  35129. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .coord_y = 2;
  35130. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .coord_z = 0;
  35131. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .mask = 16'hAAEA;
  35132. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .modeMux = 1'b0;
  35133. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .FeedbackMux = 1'b1;
  35134. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .ShiftMux = 1'b0;
  35135. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .BypassEn = 1'b0;
  35136. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START .CarryEnb = 1'b1;
  35137. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 (
  35138. .A(\macro_inst|u_uart[0]|u_tx[5]|Selector5~3_combout ),
  35139. .B(\macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ),
  35140. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  35141. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  35142. .Cin(),
  35143. .Qin(),
  35144. .Clk(),
  35145. .AsyncReset(),
  35146. .SyncReset(),
  35147. .ShiftData(),
  35148. .SyncLoad(),
  35149. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0_combout ),
  35150. .Cout(),
  35151. .Q());
  35152. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .coord_x = 5;
  35153. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .coord_y = 4;
  35154. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .coord_z = 15;
  35155. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .mask = 16'h757F;
  35156. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .modeMux = 1'b0;
  35157. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  35158. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  35159. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .BypassEn = 1'b0;
  35160. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  35161. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP (
  35162. .A(\macro_inst|u_uart[0]|u_tx[5]|Selector4~0_combout ),
  35163. .B(\macro_inst|u_uart[0]|u_tx[5]|always0~0_combout ),
  35164. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_DATA~q ),
  35165. .D(\macro_inst|u_uart[0]|u_regs|lcr_pen~q ),
  35166. .Cin(),
  35167. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  35168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ),
  35169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ),
  35170. .SyncReset(),
  35171. .ShiftData(),
  35172. .SyncLoad(),
  35173. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector4~1_combout ),
  35174. .Cout(),
  35175. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ));
  35176. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .coord_x = 5;
  35177. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .coord_y = 4;
  35178. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .coord_z = 13;
  35179. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .mask = 16'hAAEA;
  35180. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .modeMux = 1'b0;
  35181. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  35182. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .ShiftMux = 1'b0;
  35183. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .BypassEn = 1'b0;
  35184. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP .CarryEnb = 1'b1;
  35185. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt (
  35186. .A(vcc),
  35187. .B(\macro_inst|u_uart[0]|u_regs|lcr_stp2~q ),
  35188. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  35189. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0_combout ),
  35190. .Cin(),
  35191. .Qin(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ),
  35192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y1_SIG_VCC ),
  35193. .AsyncReset(AsyncReset_X57_Y1_GND),
  35194. .SyncReset(),
  35195. .ShiftData(),
  35196. .SyncLoad(),
  35197. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~1_combout ),
  35198. .Cout(),
  35199. .Q(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ));
  35200. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .coord_x = 12;
  35201. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .coord_y = 2;
  35202. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .coord_z = 7;
  35203. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .mask = 16'hFFC0;
  35204. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .modeMux = 1'b0;
  35205. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .FeedbackMux = 1'b0;
  35206. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .ShiftMux = 1'b0;
  35207. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .BypassEn = 1'b0;
  35208. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt .CarryEnb = 1'b1;
  35209. alta_slice \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 (
  35210. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  35211. .B(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~q ),
  35212. .C(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_START~q ),
  35213. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_bit~q ),
  35214. .Cin(),
  35215. .Qin(),
  35216. .Clk(),
  35217. .AsyncReset(),
  35218. .SyncReset(),
  35219. .ShiftData(),
  35220. .SyncLoad(),
  35221. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0_combout ),
  35222. .Cout(),
  35223. .Q());
  35224. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .coord_x = 12;
  35225. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .coord_y = 2;
  35226. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .coord_z = 11;
  35227. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .mask = 16'h060C;
  35228. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .modeMux = 1'b0;
  35229. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  35230. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  35231. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .BypassEn = 1'b0;
  35232. defparam \macro_inst|u_uart[0]|u_tx[5]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  35233. alta_slice \macro_inst|u_uart[0]|u_tx[5]|uart_txd (
  35234. .A(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_IDLE~q ),
  35235. .B(vcc),
  35236. .C(\macro_inst|u_uart[0]|u_tx[5]|Selector5~2_combout ),
  35237. .D(\macro_inst|u_uart[0]|u_tx[5]|tx_state.UART_STOP~q ),
  35238. .Cin(),
  35239. .Qin(\macro_inst|u_uart[0]|u_tx[5]|uart_txd~q ),
  35240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y1_SIG_VCC ),
  35241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y1_SIG ),
  35242. .SyncReset(),
  35243. .ShiftData(),
  35244. .SyncLoad(),
  35245. .LutOut(\macro_inst|u_uart[0]|u_tx[5]|Selector5~4_combout ),
  35246. .Cout(),
  35247. .Q(\macro_inst|u_uart[0]|u_tx[5]|uart_txd~q ));
  35248. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .coord_x = 5;
  35249. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .coord_y = 4;
  35250. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .coord_z = 1;
  35251. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .mask = 16'h000A;
  35252. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .modeMux = 1'b0;
  35253. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .FeedbackMux = 1'b0;
  35254. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .ShiftMux = 1'b0;
  35255. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .BypassEn = 1'b0;
  35256. defparam \macro_inst|u_uart[0]|u_tx[5]|uart_txd .CarryEnb = 1'b1;
  35257. alta_slice \macro_inst|u_uart[1]|u_baud|Equal1~0 (
  35258. .A(\macro_inst|u_uart[1]|u_baud|i_cnt [4]),
  35259. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [2]),
  35260. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [3]),
  35261. .D(\macro_inst|u_uart[1]|u_baud|i_cnt [1]),
  35262. .Cin(),
  35263. .Qin(),
  35264. .Clk(),
  35265. .AsyncReset(),
  35266. .SyncReset(),
  35267. .ShiftData(),
  35268. .SyncLoad(),
  35269. .LutOut(\macro_inst|u_uart[1]|u_baud|Equal1~0_combout ),
  35270. .Cout(),
  35271. .Q());
  35272. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .coord_x = 15;
  35273. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .coord_y = 9;
  35274. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .coord_z = 13;
  35275. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .mask = 16'h0001;
  35276. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .modeMux = 1'b0;
  35277. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .FeedbackMux = 1'b0;
  35278. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .ShiftMux = 1'b0;
  35279. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .BypassEn = 1'b0;
  35280. defparam \macro_inst|u_uart[1]|u_baud|Equal1~0 .CarryEnb = 1'b1;
  35281. alta_slice \macro_inst|u_uart[1]|u_baud|Equal1~1 (
  35282. .A(\macro_inst|u_uart[1]|u_baud|i_cnt [8]),
  35283. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [7]),
  35284. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [5]),
  35285. .D(\macro_inst|u_uart[1]|u_baud|i_cnt [6]),
  35286. .Cin(),
  35287. .Qin(),
  35288. .Clk(),
  35289. .AsyncReset(),
  35290. .SyncReset(),
  35291. .ShiftData(),
  35292. .SyncLoad(),
  35293. .LutOut(\macro_inst|u_uart[1]|u_baud|Equal1~1_combout ),
  35294. .Cout(),
  35295. .Q());
  35296. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .coord_x = 15;
  35297. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .coord_y = 9;
  35298. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .coord_z = 14;
  35299. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .mask = 16'h0001;
  35300. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .modeMux = 1'b0;
  35301. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .FeedbackMux = 1'b0;
  35302. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .ShiftMux = 1'b0;
  35303. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .BypassEn = 1'b0;
  35304. defparam \macro_inst|u_uart[1]|u_baud|Equal1~1 .CarryEnb = 1'b1;
  35305. alta_slice \macro_inst|u_uart[1]|u_baud|Equal1~2 (
  35306. .A(\macro_inst|u_uart[1]|u_baud|i_cnt [12]),
  35307. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [9]),
  35308. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [11]),
  35309. .D(\macro_inst|u_uart[1]|u_baud|i_cnt [10]),
  35310. .Cin(),
  35311. .Qin(),
  35312. .Clk(),
  35313. .AsyncReset(),
  35314. .SyncReset(),
  35315. .ShiftData(),
  35316. .SyncLoad(),
  35317. .LutOut(\macro_inst|u_uart[1]|u_baud|Equal1~2_combout ),
  35318. .Cout(),
  35319. .Q());
  35320. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .coord_x = 15;
  35321. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .coord_y = 9;
  35322. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .coord_z = 0;
  35323. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .mask = 16'h0001;
  35324. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .modeMux = 1'b0;
  35325. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .FeedbackMux = 1'b0;
  35326. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .ShiftMux = 1'b0;
  35327. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .BypassEn = 1'b0;
  35328. defparam \macro_inst|u_uart[1]|u_baud|Equal1~2 .CarryEnb = 1'b1;
  35329. alta_slice \macro_inst|u_uart[1]|u_baud|Equal1~3 (
  35330. .A(vcc),
  35331. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [13]),
  35332. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [15]),
  35333. .D(\macro_inst|u_uart[1]|u_baud|i_cnt [14]),
  35334. .Cin(),
  35335. .Qin(),
  35336. .Clk(),
  35337. .AsyncReset(),
  35338. .SyncReset(),
  35339. .ShiftData(),
  35340. .SyncLoad(),
  35341. .LutOut(\macro_inst|u_uart[1]|u_baud|Equal1~3_combout ),
  35342. .Cout(),
  35343. .Q());
  35344. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .coord_x = 15;
  35345. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .coord_y = 9;
  35346. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .coord_z = 11;
  35347. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .mask = 16'h0003;
  35348. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .modeMux = 1'b0;
  35349. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .FeedbackMux = 1'b0;
  35350. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .ShiftMux = 1'b0;
  35351. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .BypassEn = 1'b0;
  35352. defparam \macro_inst|u_uart[1]|u_baud|Equal1~3 .CarryEnb = 1'b1;
  35353. alta_slice \macro_inst|u_uart[1]|u_baud|Equal1~4 (
  35354. .A(\macro_inst|u_uart[1]|u_baud|Equal1~2_combout ),
  35355. .B(\macro_inst|u_uart[1]|u_baud|Equal1~0_combout ),
  35356. .C(\macro_inst|u_uart[1]|u_baud|Equal1~1_combout ),
  35357. .D(\macro_inst|u_uart[1]|u_baud|Equal1~3_combout ),
  35358. .Cin(),
  35359. .Qin(),
  35360. .Clk(),
  35361. .AsyncReset(),
  35362. .SyncReset(),
  35363. .ShiftData(),
  35364. .SyncLoad(),
  35365. .LutOut(\macro_inst|u_uart[1]|u_baud|Equal1~4_combout ),
  35366. .Cout(),
  35367. .Q());
  35368. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .coord_x = 15;
  35369. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .coord_y = 9;
  35370. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .coord_z = 2;
  35371. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .mask = 16'h8000;
  35372. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .modeMux = 1'b0;
  35373. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .FeedbackMux = 1'b0;
  35374. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .ShiftMux = 1'b0;
  35375. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .BypassEn = 1'b0;
  35376. defparam \macro_inst|u_uart[1]|u_baud|Equal1~4 .CarryEnb = 1'b1;
  35377. alta_slice \macro_inst|u_uart[1]|u_baud|LessThan0~1 (
  35378. .A(\macro_inst|u_uart[1]|u_regs|fbrd [0]),
  35379. .B(\macro_inst|u_uart[1]|u_baud|f_cnt [5]),
  35380. .C(vcc),
  35381. .D(vcc),
  35382. .Cin(),
  35383. .Qin(),
  35384. .Clk(),
  35385. .AsyncReset(),
  35386. .SyncReset(),
  35387. .ShiftData(),
  35388. .SyncLoad(),
  35389. .LutOut(),
  35390. .Cout(\macro_inst|u_uart[1]|u_baud|LessThan0~1_cout ),
  35391. .Q());
  35392. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .coord_x = 14;
  35393. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .coord_y = 9;
  35394. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .coord_z = 0;
  35395. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .mask = 16'h0022;
  35396. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .modeMux = 1'b1;
  35397. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .FeedbackMux = 1'b0;
  35398. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .ShiftMux = 1'b0;
  35399. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .BypassEn = 1'b0;
  35400. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~1 .CarryEnb = 1'b0;
  35401. alta_slice \macro_inst|u_uart[1]|u_baud|LessThan0~3 (
  35402. .A(\macro_inst|u_uart[1]|u_baud|f_cnt [4]),
  35403. .B(\macro_inst|u_uart[1]|u_regs|fbrd [1]),
  35404. .C(vcc),
  35405. .D(vcc),
  35406. .Cin(\macro_inst|u_uart[1]|u_baud|LessThan0~1_cout ),
  35407. .Qin(),
  35408. .Clk(),
  35409. .AsyncReset(),
  35410. .SyncReset(),
  35411. .ShiftData(),
  35412. .SyncLoad(),
  35413. .LutOut(),
  35414. .Cout(\macro_inst|u_uart[1]|u_baud|LessThan0~3_cout ),
  35415. .Q());
  35416. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .coord_x = 14;
  35417. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .coord_y = 9;
  35418. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .coord_z = 1;
  35419. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .mask = 16'h002B;
  35420. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .modeMux = 1'b1;
  35421. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .FeedbackMux = 1'b0;
  35422. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .ShiftMux = 1'b0;
  35423. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .BypassEn = 1'b0;
  35424. defparam \macro_inst|u_uart[1]|u_baud|LessThan0~3 .CarryEnb = 1'b0;
  35425. alta_slice \macro_inst|u_uart[1]|u_baud|always0~0 (
  35426. .A(\macro_inst|u_uart[1]|u_baud|Equal1~4_combout ),
  35427. .B(\macro_inst|u_uart[1]|u_baud|f_del~q ),
  35428. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [0]),
  35429. .D(\macro_inst|u_uart[1]|u_regs|uart_en~q ),
  35430. .Cin(),
  35431. .Qin(),
  35432. .Clk(),
  35433. .AsyncReset(),
  35434. .SyncReset(),
  35435. .ShiftData(),
  35436. .SyncLoad(),
  35437. .LutOut(\macro_inst|u_uart[1]|u_baud|always0~0_combout ),
  35438. .Cout(),
  35439. .Q());
  35440. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .coord_x = 15;
  35441. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .coord_y = 9;
  35442. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .coord_z = 1;
  35443. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .mask = 16'hA2FF;
  35444. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .modeMux = 1'b0;
  35445. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .FeedbackMux = 1'b0;
  35446. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .ShiftMux = 1'b0;
  35447. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .BypassEn = 1'b0;
  35448. defparam \macro_inst|u_uart[1]|u_baud|always0~0 .CarryEnb = 1'b1;
  35449. alta_slice \macro_inst|u_uart[1]|u_baud|baud16 (
  35450. .A(\macro_inst|u_uart[1]|u_baud|Equal1~4_combout ),
  35451. .B(\macro_inst|u_uart[1]|u_baud|f_del~q ),
  35452. .C(\macro_inst|u_uart[1]|u_baud|i_cnt [0]),
  35453. .D(\macro_inst|u_uart[1]|u_regs|uart_en~q ),
  35454. .Cin(),
  35455. .Qin(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  35456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35458. .SyncReset(),
  35459. .ShiftData(),
  35460. .SyncLoad(),
  35461. .LutOut(\macro_inst|u_uart[1]|u_baud|always2~0_combout ),
  35462. .Cout(),
  35463. .Q(\macro_inst|u_uart[1]|u_baud|baud16~q ));
  35464. defparam \macro_inst|u_uart[1]|u_baud|baud16 .coord_x = 15;
  35465. defparam \macro_inst|u_uart[1]|u_baud|baud16 .coord_y = 9;
  35466. defparam \macro_inst|u_uart[1]|u_baud|baud16 .coord_z = 15;
  35467. defparam \macro_inst|u_uart[1]|u_baud|baud16 .mask = 16'hA200;
  35468. defparam \macro_inst|u_uart[1]|u_baud|baud16 .modeMux = 1'b0;
  35469. defparam \macro_inst|u_uart[1]|u_baud|baud16 .FeedbackMux = 1'b0;
  35470. defparam \macro_inst|u_uart[1]|u_baud|baud16 .ShiftMux = 1'b0;
  35471. defparam \macro_inst|u_uart[1]|u_baud|baud16 .BypassEn = 1'b0;
  35472. defparam \macro_inst|u_uart[1]|u_baud|baud16 .CarryEnb = 1'b1;
  35473. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[0] (
  35474. .A(\macro_inst|u_uart[1]|u_baud|f_cnt [0]),
  35475. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  35476. .C(vcc),
  35477. .D(vcc),
  35478. .Cin(),
  35479. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [0]),
  35480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35482. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35483. .ShiftData(),
  35484. .SyncLoad(SyncLoad_X61_Y8_GND),
  35485. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[0]~6_combout ),
  35486. .Cout(\macro_inst|u_uart[1]|u_baud|f_cnt[0]~7 ),
  35487. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [0]));
  35488. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .coord_x = 15;
  35489. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .coord_y = 9;
  35490. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .coord_z = 4;
  35491. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .mask = 16'h6688;
  35492. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .modeMux = 1'b0;
  35493. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .FeedbackMux = 1'b0;
  35494. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .ShiftMux = 1'b0;
  35495. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .BypassEn = 1'b1;
  35496. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[0] .CarryEnb = 1'b0;
  35497. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[1] (
  35498. .A(vcc),
  35499. .B(\macro_inst|u_uart[1]|u_baud|f_cnt [1]),
  35500. .C(vcc),
  35501. .D(vcc),
  35502. .Cin(\macro_inst|u_uart[1]|u_baud|f_cnt[0]~7 ),
  35503. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [1]),
  35504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35506. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35507. .ShiftData(),
  35508. .SyncLoad(SyncLoad_X61_Y8_GND),
  35509. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[1]~8_combout ),
  35510. .Cout(\macro_inst|u_uart[1]|u_baud|f_cnt[1]~9 ),
  35511. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [1]));
  35512. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .coord_x = 15;
  35513. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .coord_y = 9;
  35514. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .coord_z = 5;
  35515. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .mask = 16'h3C3F;
  35516. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .modeMux = 1'b1;
  35517. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .FeedbackMux = 1'b0;
  35518. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .ShiftMux = 1'b0;
  35519. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .BypassEn = 1'b1;
  35520. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[1] .CarryEnb = 1'b0;
  35521. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[2] (
  35522. .A(vcc),
  35523. .B(\macro_inst|u_uart[1]|u_baud|f_cnt [2]),
  35524. .C(vcc),
  35525. .D(vcc),
  35526. .Cin(\macro_inst|u_uart[1]|u_baud|f_cnt[1]~9 ),
  35527. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [2]),
  35528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35530. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35531. .ShiftData(),
  35532. .SyncLoad(SyncLoad_X61_Y8_GND),
  35533. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[2]~10_combout ),
  35534. .Cout(\macro_inst|u_uart[1]|u_baud|f_cnt[2]~11 ),
  35535. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [2]));
  35536. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .coord_x = 15;
  35537. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .coord_y = 9;
  35538. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .coord_z = 6;
  35539. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .mask = 16'hC30C;
  35540. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .modeMux = 1'b1;
  35541. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .FeedbackMux = 1'b0;
  35542. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .ShiftMux = 1'b0;
  35543. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .BypassEn = 1'b1;
  35544. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[2] .CarryEnb = 1'b0;
  35545. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[3] (
  35546. .A(vcc),
  35547. .B(\macro_inst|u_uart[1]|u_baud|f_cnt [3]),
  35548. .C(vcc),
  35549. .D(vcc),
  35550. .Cin(\macro_inst|u_uart[1]|u_baud|f_cnt[2]~11 ),
  35551. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [3]),
  35552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35554. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35555. .ShiftData(),
  35556. .SyncLoad(SyncLoad_X61_Y8_GND),
  35557. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[3]~12_combout ),
  35558. .Cout(\macro_inst|u_uart[1]|u_baud|f_cnt[3]~13 ),
  35559. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [3]));
  35560. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .coord_x = 15;
  35561. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .coord_y = 9;
  35562. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .coord_z = 7;
  35563. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .mask = 16'h3C3F;
  35564. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .modeMux = 1'b1;
  35565. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .FeedbackMux = 1'b0;
  35566. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .ShiftMux = 1'b0;
  35567. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .BypassEn = 1'b1;
  35568. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[3] .CarryEnb = 1'b0;
  35569. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[4] (
  35570. .A(vcc),
  35571. .B(\macro_inst|u_uart[1]|u_baud|f_cnt [4]),
  35572. .C(vcc),
  35573. .D(vcc),
  35574. .Cin(\macro_inst|u_uart[1]|u_baud|f_cnt[3]~13 ),
  35575. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [4]),
  35576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35578. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35579. .ShiftData(),
  35580. .SyncLoad(SyncLoad_X61_Y8_GND),
  35581. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[4]~14_combout ),
  35582. .Cout(\macro_inst|u_uart[1]|u_baud|f_cnt[4]~15 ),
  35583. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [4]));
  35584. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .coord_x = 15;
  35585. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .coord_y = 9;
  35586. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .coord_z = 8;
  35587. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .mask = 16'hC30C;
  35588. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .modeMux = 1'b1;
  35589. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .FeedbackMux = 1'b0;
  35590. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .ShiftMux = 1'b0;
  35591. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .BypassEn = 1'b1;
  35592. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[4] .CarryEnb = 1'b0;
  35593. alta_slice \macro_inst|u_uart[1]|u_baud|f_cnt[5] (
  35594. .A(vcc),
  35595. .B(vcc),
  35596. .C(vcc),
  35597. .D(\macro_inst|u_uart[1]|u_baud|f_cnt [5]),
  35598. .Cin(\macro_inst|u_uart[1]|u_baud|f_cnt[4]~15 ),
  35599. .Qin(\macro_inst|u_uart[1]|u_baud|f_cnt [5]),
  35600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  35601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  35602. .SyncReset(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ),
  35603. .ShiftData(),
  35604. .SyncLoad(SyncLoad_X61_Y8_GND),
  35605. .LutOut(\macro_inst|u_uart[1]|u_baud|f_cnt[5]~16_combout ),
  35606. .Cout(),
  35607. .Q(\macro_inst|u_uart[1]|u_baud|f_cnt [5]));
  35608. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .coord_x = 15;
  35609. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .coord_y = 9;
  35610. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .coord_z = 9;
  35611. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .mask = 16'h0FF0;
  35612. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .modeMux = 1'b1;
  35613. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .FeedbackMux = 1'b0;
  35614. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .ShiftMux = 1'b0;
  35615. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .BypassEn = 1'b1;
  35616. defparam \macro_inst|u_uart[1]|u_baud|f_cnt[5] .CarryEnb = 1'b1;
  35617. alta_slice \macro_inst|u_uart[1]|u_baud|f_del (
  35618. .A(vcc),
  35619. .B(\macro_inst|u_uart[1]|u_regs|fbrd [5]),
  35620. .C(vcc),
  35621. .D(\macro_inst|u_uart[1]|u_baud|f_cnt [0]),
  35622. .Cin(\macro_inst|u_uart[1]|u_baud|LessThan0~9_cout ),
  35623. .Qin(\macro_inst|u_uart[1]|u_baud|f_del~q ),
  35624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  35625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  35626. .SyncReset(),
  35627. .ShiftData(),
  35628. .SyncLoad(),
  35629. .LutOut(\macro_inst|u_uart[1]|u_baud|LessThan0~10_combout ),
  35630. .Cout(),
  35631. .Q(\macro_inst|u_uart[1]|u_baud|f_del~q ));
  35632. defparam \macro_inst|u_uart[1]|u_baud|f_del .coord_x = 14;
  35633. defparam \macro_inst|u_uart[1]|u_baud|f_del .coord_y = 9;
  35634. defparam \macro_inst|u_uart[1]|u_baud|f_del .coord_z = 5;
  35635. defparam \macro_inst|u_uart[1]|u_baud|f_del .mask = 16'hC0FC;
  35636. defparam \macro_inst|u_uart[1]|u_baud|f_del .modeMux = 1'b1;
  35637. defparam \macro_inst|u_uart[1]|u_baud|f_del .FeedbackMux = 1'b0;
  35638. defparam \macro_inst|u_uart[1]|u_baud|f_del .ShiftMux = 1'b0;
  35639. defparam \macro_inst|u_uart[1]|u_baud|f_del .BypassEn = 1'b0;
  35640. defparam \macro_inst|u_uart[1]|u_baud|f_del .CarryEnb = 1'b1;
  35641. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[0] (
  35642. .A(vcc),
  35643. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [0]),
  35644. .C(\macro_inst|u_uart[1]|u_regs|ibrd[0]~_wirecell_combout ),
  35645. .D(vcc),
  35646. .Cin(),
  35647. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [0]),
  35648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35650. .SyncReset(SyncReset_X62_Y8_GND),
  35651. .ShiftData(),
  35652. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35653. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[0]~16_combout ),
  35654. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[0]~17 ),
  35655. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [0]));
  35656. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .coord_x = 16;
  35657. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .coord_y = 9;
  35658. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .coord_z = 0;
  35659. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .mask = 16'h3333;
  35660. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .modeMux = 1'b0;
  35661. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .FeedbackMux = 1'b0;
  35662. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .ShiftMux = 1'b0;
  35663. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .BypassEn = 1'b1;
  35664. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[0] .CarryEnb = 1'b0;
  35665. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[10] (
  35666. .A(vcc),
  35667. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [10]),
  35668. .C(\macro_inst|u_uart[1]|u_regs|ibrd [10]),
  35669. .D(vcc),
  35670. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[9]~35 ),
  35671. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [10]),
  35672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35674. .SyncReset(SyncReset_X62_Y8_GND),
  35675. .ShiftData(),
  35676. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35677. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[10]~36_combout ),
  35678. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[10]~37 ),
  35679. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [10]));
  35680. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .coord_x = 16;
  35681. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .coord_y = 9;
  35682. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .coord_z = 10;
  35683. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .mask = 16'h3CCF;
  35684. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .modeMux = 1'b1;
  35685. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .FeedbackMux = 1'b0;
  35686. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .ShiftMux = 1'b0;
  35687. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .BypassEn = 1'b1;
  35688. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[10] .CarryEnb = 1'b0;
  35689. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[11] (
  35690. .A(vcc),
  35691. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [11]),
  35692. .C(\macro_inst|u_uart[1]|u_regs|ibrd [11]),
  35693. .D(vcc),
  35694. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[10]~37 ),
  35695. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [11]),
  35696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35698. .SyncReset(SyncReset_X62_Y8_GND),
  35699. .ShiftData(),
  35700. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35701. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[11]~38_combout ),
  35702. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[11]~39 ),
  35703. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [11]));
  35704. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .coord_x = 16;
  35705. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .coord_y = 9;
  35706. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .coord_z = 11;
  35707. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .mask = 16'hC303;
  35708. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .modeMux = 1'b1;
  35709. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .FeedbackMux = 1'b0;
  35710. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .ShiftMux = 1'b0;
  35711. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .BypassEn = 1'b1;
  35712. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[11] .CarryEnb = 1'b0;
  35713. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[12] (
  35714. .A(vcc),
  35715. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [12]),
  35716. .C(\macro_inst|u_uart[1]|u_regs|ibrd [12]),
  35717. .D(vcc),
  35718. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[11]~39 ),
  35719. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [12]),
  35720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35722. .SyncReset(SyncReset_X62_Y8_GND),
  35723. .ShiftData(),
  35724. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35725. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[12]~40_combout ),
  35726. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[12]~41 ),
  35727. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [12]));
  35728. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .coord_x = 16;
  35729. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .coord_y = 9;
  35730. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .coord_z = 12;
  35731. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .mask = 16'h3CCF;
  35732. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .modeMux = 1'b1;
  35733. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .FeedbackMux = 1'b0;
  35734. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .ShiftMux = 1'b0;
  35735. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .BypassEn = 1'b1;
  35736. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[12] .CarryEnb = 1'b0;
  35737. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[13] (
  35738. .A(vcc),
  35739. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [13]),
  35740. .C(\macro_inst|u_uart[1]|u_regs|ibrd [13]),
  35741. .D(vcc),
  35742. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[12]~41 ),
  35743. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [13]),
  35744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35746. .SyncReset(SyncReset_X62_Y8_GND),
  35747. .ShiftData(),
  35748. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35749. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[13]~42_combout ),
  35750. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[13]~43 ),
  35751. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [13]));
  35752. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .coord_x = 16;
  35753. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .coord_y = 9;
  35754. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .coord_z = 13;
  35755. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .mask = 16'hC303;
  35756. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .modeMux = 1'b1;
  35757. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .FeedbackMux = 1'b0;
  35758. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .ShiftMux = 1'b0;
  35759. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .BypassEn = 1'b1;
  35760. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[13] .CarryEnb = 1'b0;
  35761. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[14] (
  35762. .A(vcc),
  35763. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [14]),
  35764. .C(\macro_inst|u_uart[1]|u_regs|ibrd [14]),
  35765. .D(vcc),
  35766. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[13]~43 ),
  35767. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [14]),
  35768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35770. .SyncReset(SyncReset_X62_Y8_GND),
  35771. .ShiftData(),
  35772. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35773. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[14]~44_combout ),
  35774. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[14]~45 ),
  35775. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [14]));
  35776. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .coord_x = 16;
  35777. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .coord_y = 9;
  35778. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .coord_z = 14;
  35779. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .mask = 16'h3CCF;
  35780. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .modeMux = 1'b1;
  35781. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .FeedbackMux = 1'b0;
  35782. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .ShiftMux = 1'b0;
  35783. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .BypassEn = 1'b1;
  35784. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[14] .CarryEnb = 1'b0;
  35785. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[15] (
  35786. .A(vcc),
  35787. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [15]),
  35788. .C(\macro_inst|u_uart[1]|u_regs|ibrd [15]),
  35789. .D(vcc),
  35790. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[14]~45 ),
  35791. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [15]),
  35792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35794. .SyncReset(SyncReset_X62_Y8_GND),
  35795. .ShiftData(),
  35796. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35797. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[15]~46_combout ),
  35798. .Cout(),
  35799. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [15]));
  35800. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .coord_x = 16;
  35801. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .coord_y = 9;
  35802. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .coord_z = 15;
  35803. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .mask = 16'hC3C3;
  35804. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .modeMux = 1'b1;
  35805. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .FeedbackMux = 1'b0;
  35806. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .ShiftMux = 1'b0;
  35807. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .BypassEn = 1'b1;
  35808. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[15] .CarryEnb = 1'b1;
  35809. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[1] (
  35810. .A(vcc),
  35811. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [1]),
  35812. .C(\macro_inst|u_uart[1]|u_regs|ibrd [1]),
  35813. .D(vcc),
  35814. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[0]~17 ),
  35815. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [1]),
  35816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35818. .SyncReset(SyncReset_X62_Y8_GND),
  35819. .ShiftData(),
  35820. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35821. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[1]~18_combout ),
  35822. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[1]~19 ),
  35823. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [1]));
  35824. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .coord_x = 16;
  35825. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .coord_y = 9;
  35826. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .coord_z = 1;
  35827. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .mask = 16'hC303;
  35828. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .modeMux = 1'b1;
  35829. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .FeedbackMux = 1'b0;
  35830. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .ShiftMux = 1'b0;
  35831. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .BypassEn = 1'b1;
  35832. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[1] .CarryEnb = 1'b0;
  35833. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[2] (
  35834. .A(vcc),
  35835. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [2]),
  35836. .C(\macro_inst|u_uart[1]|u_regs|ibrd [2]),
  35837. .D(vcc),
  35838. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[1]~19 ),
  35839. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [2]),
  35840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35842. .SyncReset(SyncReset_X62_Y8_GND),
  35843. .ShiftData(),
  35844. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35845. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[2]~20_combout ),
  35846. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[2]~21 ),
  35847. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [2]));
  35848. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .coord_x = 16;
  35849. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .coord_y = 9;
  35850. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .coord_z = 2;
  35851. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .mask = 16'h3CCF;
  35852. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .modeMux = 1'b1;
  35853. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .FeedbackMux = 1'b0;
  35854. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .ShiftMux = 1'b0;
  35855. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .BypassEn = 1'b1;
  35856. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[2] .CarryEnb = 1'b0;
  35857. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[3] (
  35858. .A(vcc),
  35859. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [3]),
  35860. .C(\macro_inst|u_uart[1]|u_regs|ibrd [3]),
  35861. .D(vcc),
  35862. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[2]~21 ),
  35863. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [3]),
  35864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35866. .SyncReset(SyncReset_X62_Y8_GND),
  35867. .ShiftData(),
  35868. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35869. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[3]~22_combout ),
  35870. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[3]~23 ),
  35871. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [3]));
  35872. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .coord_x = 16;
  35873. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .coord_y = 9;
  35874. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .coord_z = 3;
  35875. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .mask = 16'hC303;
  35876. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .modeMux = 1'b1;
  35877. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .FeedbackMux = 1'b0;
  35878. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .ShiftMux = 1'b0;
  35879. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .BypassEn = 1'b1;
  35880. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[3] .CarryEnb = 1'b0;
  35881. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[4] (
  35882. .A(vcc),
  35883. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [4]),
  35884. .C(\macro_inst|u_uart[1]|u_regs|ibrd [4]),
  35885. .D(vcc),
  35886. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[3]~23 ),
  35887. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [4]),
  35888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35890. .SyncReset(SyncReset_X62_Y8_GND),
  35891. .ShiftData(),
  35892. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35893. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[4]~24_combout ),
  35894. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[4]~25 ),
  35895. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [4]));
  35896. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .coord_x = 16;
  35897. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .coord_y = 9;
  35898. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .coord_z = 4;
  35899. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .mask = 16'h3CCF;
  35900. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .modeMux = 1'b1;
  35901. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .FeedbackMux = 1'b0;
  35902. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .ShiftMux = 1'b0;
  35903. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .BypassEn = 1'b1;
  35904. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[4] .CarryEnb = 1'b0;
  35905. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[5] (
  35906. .A(vcc),
  35907. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [5]),
  35908. .C(\macro_inst|u_uart[1]|u_regs|ibrd [5]),
  35909. .D(vcc),
  35910. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[4]~25 ),
  35911. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [5]),
  35912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35914. .SyncReset(SyncReset_X62_Y8_GND),
  35915. .ShiftData(),
  35916. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35917. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[5]~26_combout ),
  35918. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[5]~27 ),
  35919. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [5]));
  35920. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .coord_x = 16;
  35921. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .coord_y = 9;
  35922. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .coord_z = 5;
  35923. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .mask = 16'hC303;
  35924. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .modeMux = 1'b1;
  35925. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .FeedbackMux = 1'b0;
  35926. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .ShiftMux = 1'b0;
  35927. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .BypassEn = 1'b1;
  35928. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[5] .CarryEnb = 1'b0;
  35929. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[6] (
  35930. .A(vcc),
  35931. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [6]),
  35932. .C(\macro_inst|u_uart[1]|u_regs|ibrd [6]),
  35933. .D(vcc),
  35934. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[5]~27 ),
  35935. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [6]),
  35936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35938. .SyncReset(SyncReset_X62_Y8_GND),
  35939. .ShiftData(),
  35940. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35941. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[6]~28_combout ),
  35942. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[6]~29 ),
  35943. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [6]));
  35944. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .coord_x = 16;
  35945. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .coord_y = 9;
  35946. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .coord_z = 6;
  35947. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .mask = 16'h3CCF;
  35948. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .modeMux = 1'b1;
  35949. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .FeedbackMux = 1'b0;
  35950. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .ShiftMux = 1'b0;
  35951. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .BypassEn = 1'b1;
  35952. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[6] .CarryEnb = 1'b0;
  35953. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[7] (
  35954. .A(vcc),
  35955. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [7]),
  35956. .C(\macro_inst|u_uart[1]|u_regs|ibrd [7]),
  35957. .D(vcc),
  35958. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[6]~29 ),
  35959. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [7]),
  35960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35962. .SyncReset(SyncReset_X62_Y8_GND),
  35963. .ShiftData(),
  35964. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35965. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[7]~30_combout ),
  35966. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[7]~31 ),
  35967. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [7]));
  35968. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .coord_x = 16;
  35969. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .coord_y = 9;
  35970. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .coord_z = 7;
  35971. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .mask = 16'hC303;
  35972. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .modeMux = 1'b1;
  35973. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .FeedbackMux = 1'b0;
  35974. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .ShiftMux = 1'b0;
  35975. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .BypassEn = 1'b1;
  35976. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[7] .CarryEnb = 1'b0;
  35977. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[8] (
  35978. .A(vcc),
  35979. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [8]),
  35980. .C(\macro_inst|u_uart[1]|u_regs|ibrd [8]),
  35981. .D(vcc),
  35982. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[7]~31 ),
  35983. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [8]),
  35984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  35985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  35986. .SyncReset(SyncReset_X62_Y8_GND),
  35987. .ShiftData(),
  35988. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  35989. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[8]~32_combout ),
  35990. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[8]~33 ),
  35991. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [8]));
  35992. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .coord_x = 16;
  35993. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .coord_y = 9;
  35994. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .coord_z = 8;
  35995. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .mask = 16'h3CCF;
  35996. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .modeMux = 1'b1;
  35997. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .FeedbackMux = 1'b0;
  35998. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .ShiftMux = 1'b0;
  35999. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .BypassEn = 1'b1;
  36000. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[8] .CarryEnb = 1'b0;
  36001. alta_slice \macro_inst|u_uart[1]|u_baud|i_cnt[9] (
  36002. .A(vcc),
  36003. .B(\macro_inst|u_uart[1]|u_baud|i_cnt [9]),
  36004. .C(\macro_inst|u_uart[1]|u_regs|ibrd [9]),
  36005. .D(vcc),
  36006. .Cin(\macro_inst|u_uart[1]|u_baud|i_cnt[8]~33 ),
  36007. .Qin(\macro_inst|u_uart[1]|u_baud|i_cnt [9]),
  36008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y8_SIG_VCC ),
  36009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y8_SIG ),
  36010. .SyncReset(SyncReset_X62_Y8_GND),
  36011. .ShiftData(),
  36012. .SyncLoad(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ),
  36013. .LutOut(\macro_inst|u_uart[1]|u_baud|i_cnt[9]~34_combout ),
  36014. .Cout(\macro_inst|u_uart[1]|u_baud|i_cnt[9]~35 ),
  36015. .Q(\macro_inst|u_uart[1]|u_baud|i_cnt [9]));
  36016. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .coord_x = 16;
  36017. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .coord_y = 9;
  36018. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .coord_z = 9;
  36019. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .mask = 16'hC303;
  36020. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .modeMux = 1'b1;
  36021. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .FeedbackMux = 1'b0;
  36022. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .ShiftMux = 1'b0;
  36023. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .BypassEn = 1'b1;
  36024. defparam \macro_inst|u_uart[1]|u_baud|i_cnt[9] .CarryEnb = 1'b0;
  36025. alta_slice \macro_inst|u_uart[1]|u_regs|Equal2~1 (
  36026. .A(vcc),
  36027. .B(\macro_inst|u_ahb2apb|paddr [7]),
  36028. .C(vcc),
  36029. .D(\macro_inst|u_ahb2apb|paddr [6]),
  36030. .Cin(),
  36031. .Qin(),
  36032. .Clk(),
  36033. .AsyncReset(),
  36034. .SyncReset(),
  36035. .ShiftData(),
  36036. .SyncLoad(),
  36037. .LutOut(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  36038. .Cout(),
  36039. .Q());
  36040. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .coord_x = 15;
  36041. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .coord_y = 6;
  36042. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .coord_z = 6;
  36043. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .mask = 16'h0033;
  36044. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .modeMux = 1'b0;
  36045. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .FeedbackMux = 1'b0;
  36046. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .ShiftMux = 1'b0;
  36047. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .BypassEn = 1'b0;
  36048. defparam \macro_inst|u_uart[1]|u_regs|Equal2~1 .CarryEnb = 1'b1;
  36049. alta_slice \macro_inst|u_uart[1]|u_regs|Equal2~2 (
  36050. .A(\macro_inst|u_uart[1]|u_regs|Equal2~0_combout ),
  36051. .B(\macro_inst|u_ahb2apb|paddr [2]),
  36052. .C(\macro_inst|u_ahb2apb|paddr [3]),
  36053. .D(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  36054. .Cin(),
  36055. .Qin(),
  36056. .Clk(),
  36057. .AsyncReset(),
  36058. .SyncReset(),
  36059. .ShiftData(),
  36060. .SyncLoad(),
  36061. .LutOut(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  36062. .Cout(),
  36063. .Q());
  36064. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .coord_x = 17;
  36065. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .coord_y = 6;
  36066. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .coord_z = 4;
  36067. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .mask = 16'h0200;
  36068. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .modeMux = 1'b0;
  36069. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .FeedbackMux = 1'b0;
  36070. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .ShiftMux = 1'b0;
  36071. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .BypassEn = 1'b0;
  36072. defparam \macro_inst|u_uart[1]|u_regs|Equal2~2 .CarryEnb = 1'b1;
  36073. alta_slice \macro_inst|u_uart[1]|u_regs|Mux10~0 (
  36074. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36075. .B(\macro_inst|u_ahb2apb|paddr [8]),
  36076. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  36077. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  36078. .Cin(),
  36079. .Qin(),
  36080. .Clk(),
  36081. .AsyncReset(),
  36082. .SyncReset(),
  36083. .ShiftData(),
  36084. .SyncLoad(),
  36085. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux10~0_combout ),
  36086. .Cout(),
  36087. .Q());
  36088. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .coord_x = 17;
  36089. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .coord_y = 3;
  36090. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .coord_z = 2;
  36091. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .mask = 16'h89CD;
  36092. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .modeMux = 1'b0;
  36093. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .FeedbackMux = 1'b0;
  36094. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .ShiftMux = 1'b0;
  36095. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .BypassEn = 1'b0;
  36096. defparam \macro_inst|u_uart[1]|u_regs|Mux10~0 .CarryEnb = 1'b1;
  36097. alta_slice \macro_inst|u_uart[1]|u_regs|Mux10~1 (
  36098. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36099. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  36100. .C(\macro_inst|u_uart[1]|u_regs|Mux10~0_combout ),
  36101. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  36102. .Cin(),
  36103. .Qin(),
  36104. .Clk(),
  36105. .AsyncReset(),
  36106. .SyncReset(),
  36107. .ShiftData(),
  36108. .SyncLoad(),
  36109. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux10~1_combout ),
  36110. .Cout(),
  36111. .Q());
  36112. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .coord_x = 17;
  36113. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .coord_y = 3;
  36114. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .coord_z = 6;
  36115. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .mask = 16'h8F85;
  36116. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .modeMux = 1'b0;
  36117. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .FeedbackMux = 1'b0;
  36118. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .ShiftMux = 1'b0;
  36119. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .BypassEn = 1'b0;
  36120. defparam \macro_inst|u_uart[1]|u_regs|Mux10~1 .CarryEnb = 1'b1;
  36121. alta_slice \macro_inst|u_uart[1]|u_regs|Mux11~0 (
  36122. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  36123. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  36124. .C(\macro_inst|u_ahb2apb|paddr [10]),
  36125. .D(\macro_inst|u_ahb2apb|paddr [8]),
  36126. .Cin(),
  36127. .Qin(),
  36128. .Clk(),
  36129. .AsyncReset(),
  36130. .SyncReset(),
  36131. .ShiftData(),
  36132. .SyncLoad(),
  36133. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux11~0_combout ),
  36134. .Cout(),
  36135. .Q());
  36136. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .coord_x = 15;
  36137. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .coord_y = 9;
  36138. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .coord_z = 12;
  36139. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .mask = 16'hC0A0;
  36140. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .modeMux = 1'b0;
  36141. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .FeedbackMux = 1'b0;
  36142. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .ShiftMux = 1'b0;
  36143. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .BypassEn = 1'b0;
  36144. defparam \macro_inst|u_uart[1]|u_regs|Mux11~0 .CarryEnb = 1'b1;
  36145. alta_slice \macro_inst|u_uart[1]|u_regs|Mux11~1 (
  36146. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36147. .B(\macro_inst|u_ahb2apb|paddr [8]),
  36148. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  36149. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  36150. .Cin(),
  36151. .Qin(),
  36152. .Clk(),
  36153. .AsyncReset(),
  36154. .SyncReset(),
  36155. .ShiftData(),
  36156. .SyncLoad(),
  36157. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux11~1_combout ),
  36158. .Cout(),
  36159. .Q());
  36160. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .coord_x = 18;
  36161. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .coord_y = 8;
  36162. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .coord_z = 13;
  36163. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .mask = 16'hDC98;
  36164. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .modeMux = 1'b0;
  36165. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .FeedbackMux = 1'b0;
  36166. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .ShiftMux = 1'b0;
  36167. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .BypassEn = 1'b0;
  36168. defparam \macro_inst|u_uart[1]|u_regs|Mux11~1 .CarryEnb = 1'b1;
  36169. alta_slice \macro_inst|u_uart[1]|u_regs|Mux11~2 (
  36170. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  36171. .B(\macro_inst|u_ahb2apb|paddr [9]),
  36172. .C(\macro_inst|u_uart[1]|u_regs|Mux11~1_combout ),
  36173. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  36174. .Cin(),
  36175. .Qin(),
  36176. .Clk(),
  36177. .AsyncReset(),
  36178. .SyncReset(),
  36179. .ShiftData(),
  36180. .SyncLoad(),
  36181. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux11~2_combout ),
  36182. .Cout(),
  36183. .Q());
  36184. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .coord_x = 20;
  36185. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .coord_y = 8;
  36186. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .coord_z = 12;
  36187. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .mask = 16'hBCB0;
  36188. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .modeMux = 1'b0;
  36189. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .FeedbackMux = 1'b0;
  36190. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .ShiftMux = 1'b0;
  36191. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .BypassEn = 1'b0;
  36192. defparam \macro_inst|u_uart[1]|u_regs|Mux11~2 .CarryEnb = 1'b1;
  36193. alta_slice \macro_inst|u_uart[1]|u_regs|Mux12~0 (
  36194. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36195. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  36196. .C(\macro_inst|u_ahb2apb|paddr [8]),
  36197. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  36198. .Cin(),
  36199. .Qin(),
  36200. .Clk(),
  36201. .AsyncReset(),
  36202. .SyncReset(),
  36203. .ShiftData(),
  36204. .SyncLoad(),
  36205. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux12~0_combout ),
  36206. .Cout(),
  36207. .Q());
  36208. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .coord_x = 17;
  36209. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .coord_y = 4;
  36210. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .coord_z = 3;
  36211. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .mask = 16'hF4A4;
  36212. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .modeMux = 1'b0;
  36213. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .FeedbackMux = 1'b0;
  36214. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .ShiftMux = 1'b0;
  36215. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .BypassEn = 1'b0;
  36216. defparam \macro_inst|u_uart[1]|u_regs|Mux12~0 .CarryEnb = 1'b1;
  36217. alta_slice \macro_inst|u_uart[1]|u_regs|Mux12~1 (
  36218. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36219. .B(\macro_inst|u_uart[1]|u_regs|Mux12~0_combout ),
  36220. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  36221. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  36222. .Cin(),
  36223. .Qin(),
  36224. .Clk(),
  36225. .AsyncReset(),
  36226. .SyncReset(),
  36227. .ShiftData(),
  36228. .SyncLoad(),
  36229. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux12~1_combout ),
  36230. .Cout(),
  36231. .Q());
  36232. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .coord_x = 17;
  36233. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .coord_y = 4;
  36234. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .coord_z = 6;
  36235. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .mask = 16'hEC64;
  36236. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .modeMux = 1'b0;
  36237. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .FeedbackMux = 1'b0;
  36238. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .ShiftMux = 1'b0;
  36239. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .BypassEn = 1'b0;
  36240. defparam \macro_inst|u_uart[1]|u_regs|Mux12~1 .CarryEnb = 1'b1;
  36241. alta_slice \macro_inst|u_uart[1]|u_regs|Selector0~2 (
  36242. .A(\macro_inst|u_uart[1]|u_regs|ibrd [12]),
  36243. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  36244. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  36245. .D(\macro_inst|u_uart[1]|u_regs|Selector0~1_combout ),
  36246. .Cin(),
  36247. .Qin(),
  36248. .Clk(),
  36249. .AsyncReset(),
  36250. .SyncReset(),
  36251. .ShiftData(),
  36252. .SyncLoad(),
  36253. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector0~2_combout ),
  36254. .Cout(),
  36255. .Q());
  36256. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .coord_x = 16;
  36257. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .coord_y = 8;
  36258. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .coord_z = 7;
  36259. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .mask = 16'hCEC2;
  36260. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .modeMux = 1'b0;
  36261. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .FeedbackMux = 1'b0;
  36262. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .ShiftMux = 1'b0;
  36263. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .BypassEn = 1'b0;
  36264. defparam \macro_inst|u_uart[1]|u_regs|Selector0~2 .CarryEnb = 1'b1;
  36265. alta_slice \macro_inst|u_uart[1]|u_regs|Selector10~0 (
  36266. .A(\macro_inst|u_ahb2apb|paddr [8]),
  36267. .B(\macro_inst|u_uart[1]|u_rx[0]|break_error~q ),
  36268. .C(\macro_inst|u_uart[1]|u_rx[1]|break_error~q ),
  36269. .D(\macro_inst|u_ahb2apb|paddr [9]),
  36270. .Cin(),
  36271. .Qin(),
  36272. .Clk(),
  36273. .AsyncReset(),
  36274. .SyncReset(),
  36275. .ShiftData(),
  36276. .SyncLoad(),
  36277. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~0_combout ),
  36278. .Cout(),
  36279. .Q());
  36280. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .coord_x = 18;
  36281. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .coord_y = 6;
  36282. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .coord_z = 7;
  36283. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .mask = 16'hAAE4;
  36284. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .modeMux = 1'b0;
  36285. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .FeedbackMux = 1'b0;
  36286. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .ShiftMux = 1'b0;
  36287. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .BypassEn = 1'b0;
  36288. defparam \macro_inst|u_uart[1]|u_regs|Selector10~0 .CarryEnb = 1'b1;
  36289. alta_slice \macro_inst|u_uart[1]|u_regs|Selector10~1 (
  36290. .A(\macro_inst|u_uart[1]|u_rx[3]|break_error~q ),
  36291. .B(\macro_inst|u_ahb2apb|paddr [9]),
  36292. .C(\macro_inst|u_uart[1]|u_rx[2]|break_error~q ),
  36293. .D(\macro_inst|u_uart[1]|u_regs|Selector10~0_combout ),
  36294. .Cin(),
  36295. .Qin(),
  36296. .Clk(),
  36297. .AsyncReset(),
  36298. .SyncReset(),
  36299. .ShiftData(),
  36300. .SyncLoad(),
  36301. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~1_combout ),
  36302. .Cout(),
  36303. .Q());
  36304. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .coord_x = 18;
  36305. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .coord_y = 6;
  36306. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .coord_z = 9;
  36307. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .mask = 16'hBBC0;
  36308. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .modeMux = 1'b0;
  36309. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .FeedbackMux = 1'b0;
  36310. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .ShiftMux = 1'b0;
  36311. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .BypassEn = 1'b0;
  36312. defparam \macro_inst|u_uart[1]|u_regs|Selector10~1 .CarryEnb = 1'b1;
  36313. alta_slice \macro_inst|u_uart[1]|u_regs|Selector10~2 (
  36314. .A(\macro_inst|u_uart[1]|u_regs|rx_reg [2]),
  36315. .B(\macro_inst|u_uart[1]|u_regs|Selector10~1_combout ),
  36316. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36317. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  36318. .Cin(),
  36319. .Qin(),
  36320. .Clk(),
  36321. .AsyncReset(),
  36322. .SyncReset(),
  36323. .ShiftData(),
  36324. .SyncLoad(),
  36325. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~2_combout ),
  36326. .Cout(),
  36327. .Q());
  36328. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .coord_x = 18;
  36329. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .coord_y = 6;
  36330. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .coord_z = 3;
  36331. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .mask = 16'hFC0A;
  36332. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .modeMux = 1'b0;
  36333. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .FeedbackMux = 1'b0;
  36334. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .ShiftMux = 1'b0;
  36335. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .BypassEn = 1'b0;
  36336. defparam \macro_inst|u_uart[1]|u_regs|Selector10~2 .CarryEnb = 1'b1;
  36337. alta_slice \macro_inst|u_uart[1]|u_regs|Selector10~3 (
  36338. .A(\macro_inst|u_uart[1]|u_rx[4]|break_error~q ),
  36339. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36340. .C(\macro_inst|u_uart[1]|u_rx[5]|break_error~q ),
  36341. .D(\macro_inst|u_uart[1]|u_regs|Selector10~2_combout ),
  36342. .Cin(),
  36343. .Qin(),
  36344. .Clk(),
  36345. .AsyncReset(),
  36346. .SyncReset(),
  36347. .ShiftData(),
  36348. .SyncLoad(),
  36349. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~3_combout ),
  36350. .Cout(),
  36351. .Q());
  36352. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .coord_x = 18;
  36353. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .coord_y = 6;
  36354. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .coord_z = 13;
  36355. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .mask = 16'hF388;
  36356. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .modeMux = 1'b0;
  36357. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .FeedbackMux = 1'b0;
  36358. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .ShiftMux = 1'b0;
  36359. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .BypassEn = 1'b0;
  36360. defparam \macro_inst|u_uart[1]|u_regs|Selector10~3 .CarryEnb = 1'b1;
  36361. alta_slice \macro_inst|u_uart[1]|u_regs|Selector10~5 (
  36362. .A(\macro_inst|u_ahb2apb|paddr [3]),
  36363. .B(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  36364. .C(\macro_inst|u_uart[1]|u_regs|Selector10~4_combout ),
  36365. .D(\macro_inst|u_uart[1]|u_regs|fbrd [2]),
  36366. .Cin(),
  36367. .Qin(),
  36368. .Clk(),
  36369. .AsyncReset(),
  36370. .SyncReset(),
  36371. .ShiftData(),
  36372. .SyncLoad(),
  36373. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~5_combout ),
  36374. .Cout(),
  36375. .Q());
  36376. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .coord_x = 15;
  36377. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .coord_y = 6;
  36378. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .coord_z = 5;
  36379. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .mask = 16'hF858;
  36380. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .modeMux = 1'b0;
  36381. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .FeedbackMux = 1'b0;
  36382. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .ShiftMux = 1'b0;
  36383. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .BypassEn = 1'b0;
  36384. defparam \macro_inst|u_uart[1]|u_regs|Selector10~5 .CarryEnb = 1'b1;
  36385. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~1 (
  36386. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  36387. .B(\macro_inst|u_uart[1]|u_regs|Selector11~0_combout ),
  36388. .C(\macro_inst|u_uart[1]|u_regs|fbrd [1]),
  36389. .D(\macro_inst|u_ahb2apb|paddr [3]),
  36390. .Cin(),
  36391. .Qin(),
  36392. .Clk(),
  36393. .AsyncReset(),
  36394. .SyncReset(),
  36395. .ShiftData(),
  36396. .SyncLoad(),
  36397. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~1_combout ),
  36398. .Cout(),
  36399. .Q());
  36400. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .coord_x = 16;
  36401. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .coord_y = 5;
  36402. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .coord_z = 13;
  36403. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .mask = 16'hB833;
  36404. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .modeMux = 1'b0;
  36405. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .FeedbackMux = 1'b0;
  36406. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .ShiftMux = 1'b0;
  36407. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .BypassEn = 1'b0;
  36408. defparam \macro_inst|u_uart[1]|u_regs|Selector11~1 .CarryEnb = 1'b1;
  36409. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~13 (
  36410. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~11_combout ),
  36411. .B(\macro_inst|u_uart[1]|u_regs|Selector11~2_combout ),
  36412. .C(\macro_inst|u_uart[1]|u_regs|Selector11~9_combout ),
  36413. .D(\macro_inst|u_uart[1]|u_regs|Selector11~12_combout ),
  36414. .Cin(),
  36415. .Qin(),
  36416. .Clk(),
  36417. .AsyncReset(),
  36418. .SyncReset(),
  36419. .ShiftData(),
  36420. .SyncLoad(),
  36421. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~13_combout ),
  36422. .Cout(),
  36423. .Q());
  36424. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .coord_x = 16;
  36425. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .coord_y = 5;
  36426. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .coord_z = 14;
  36427. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .mask = 16'hFF40;
  36428. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .modeMux = 1'b0;
  36429. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .FeedbackMux = 1'b0;
  36430. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .ShiftMux = 1'b0;
  36431. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .BypassEn = 1'b0;
  36432. defparam \macro_inst|u_uart[1]|u_regs|Selector11~13 .CarryEnb = 1'b1;
  36433. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~2 (
  36434. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~12_combout ),
  36435. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  36436. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  36437. .D(\macro_inst|u_uart[1]|u_regs|Selector11~1_combout ),
  36438. .Cin(),
  36439. .Qin(),
  36440. .Clk(),
  36441. .AsyncReset(),
  36442. .SyncReset(),
  36443. .ShiftData(),
  36444. .SyncLoad(),
  36445. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~2_combout ),
  36446. .Cout(),
  36447. .Q());
  36448. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .coord_x = 16;
  36449. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .coord_y = 5;
  36450. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .coord_z = 15;
  36451. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .mask = 16'hAA08;
  36452. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .modeMux = 1'b0;
  36453. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .FeedbackMux = 1'b0;
  36454. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .ShiftMux = 1'b0;
  36455. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .BypassEn = 1'b0;
  36456. defparam \macro_inst|u_uart[1]|u_regs|Selector11~2 .CarryEnb = 1'b1;
  36457. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~4 (
  36458. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36459. .B(\macro_inst|u_uart[1]|u_rx[3]|parity_error~q ),
  36460. .C(\macro_inst|u_uart[1]|u_regs|Selector11~3_combout ),
  36461. .D(\macro_inst|u_uart[1]|u_rx[2]|parity_error~q ),
  36462. .Cin(),
  36463. .Qin(),
  36464. .Clk(),
  36465. .AsyncReset(),
  36466. .SyncReset(),
  36467. .ShiftData(),
  36468. .SyncLoad(),
  36469. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~4_combout ),
  36470. .Cout(),
  36471. .Q());
  36472. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .coord_x = 16;
  36473. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .coord_y = 5;
  36474. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .coord_z = 8;
  36475. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .mask = 16'hDAD0;
  36476. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .modeMux = 1'b0;
  36477. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .FeedbackMux = 1'b0;
  36478. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .ShiftMux = 1'b0;
  36479. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .BypassEn = 1'b0;
  36480. defparam \macro_inst|u_uart[1]|u_regs|Selector11~4 .CarryEnb = 1'b1;
  36481. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~5 (
  36482. .A(\macro_inst|u_uart[1]|u_regs|Selector11~4_combout ),
  36483. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  36484. .C(\macro_inst|u_uart[1]|u_regs|rx_reg [1]),
  36485. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36486. .Cin(),
  36487. .Qin(),
  36488. .Clk(),
  36489. .AsyncReset(),
  36490. .SyncReset(),
  36491. .ShiftData(),
  36492. .SyncLoad(),
  36493. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~5_combout ),
  36494. .Cout(),
  36495. .Q());
  36496. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .coord_x = 16;
  36497. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .coord_y = 5;
  36498. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .coord_z = 9;
  36499. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .mask = 16'hCCB8;
  36500. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .modeMux = 1'b0;
  36501. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .FeedbackMux = 1'b0;
  36502. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .ShiftMux = 1'b0;
  36503. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .BypassEn = 1'b0;
  36504. defparam \macro_inst|u_uart[1]|u_regs|Selector11~5 .CarryEnb = 1'b1;
  36505. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~6 (
  36506. .A(\macro_inst|u_uart[1]|u_rx[4]|parity_error~q ),
  36507. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36508. .C(\macro_inst|u_uart[1]|u_rx[5]|parity_error~q ),
  36509. .D(\macro_inst|u_uart[1]|u_regs|Selector11~5_combout ),
  36510. .Cin(),
  36511. .Qin(),
  36512. .Clk(),
  36513. .AsyncReset(),
  36514. .SyncReset(),
  36515. .ShiftData(),
  36516. .SyncLoad(),
  36517. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~6_combout ),
  36518. .Cout(),
  36519. .Q());
  36520. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .coord_x = 16;
  36521. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .coord_y = 5;
  36522. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .coord_z = 0;
  36523. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .mask = 16'hF388;
  36524. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .modeMux = 1'b0;
  36525. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .FeedbackMux = 1'b0;
  36526. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .ShiftMux = 1'b0;
  36527. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .BypassEn = 1'b0;
  36528. defparam \macro_inst|u_uart[1]|u_regs|Selector11~6 .CarryEnb = 1'b1;
  36529. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~7 (
  36530. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  36531. .B(\macro_inst|u_ahb2apb|paddr [3]),
  36532. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  36533. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  36534. .Cin(),
  36535. .Qin(),
  36536. .Clk(),
  36537. .AsyncReset(),
  36538. .SyncReset(),
  36539. .ShiftData(),
  36540. .SyncLoad(),
  36541. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~7_combout ),
  36542. .Cout(),
  36543. .Q());
  36544. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .coord_x = 15;
  36545. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .coord_y = 11;
  36546. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .coord_z = 0;
  36547. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .mask = 16'h888F;
  36548. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .modeMux = 1'b0;
  36549. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .FeedbackMux = 1'b0;
  36550. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .ShiftMux = 1'b0;
  36551. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .BypassEn = 1'b0;
  36552. defparam \macro_inst|u_uart[1]|u_regs|Selector11~7 .CarryEnb = 1'b1;
  36553. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~8 (
  36554. .A(\macro_inst|u_ahb2apb|paddr [3]),
  36555. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  36556. .C(\macro_inst|u_uart[1]|u_regs|fbrd [1]),
  36557. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  36558. .Cin(),
  36559. .Qin(),
  36560. .Clk(),
  36561. .AsyncReset(),
  36562. .SyncReset(),
  36563. .ShiftData(),
  36564. .SyncLoad(),
  36565. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~8_combout ),
  36566. .Cout(),
  36567. .Q());
  36568. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .coord_x = 16;
  36569. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .coord_y = 5;
  36570. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .coord_z = 10;
  36571. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .mask = 16'hF7F5;
  36572. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .modeMux = 1'b0;
  36573. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .FeedbackMux = 1'b0;
  36574. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .ShiftMux = 1'b0;
  36575. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .BypassEn = 1'b0;
  36576. defparam \macro_inst|u_uart[1]|u_regs|Selector11~8 .CarryEnb = 1'b1;
  36577. alta_slice \macro_inst|u_uart[1]|u_regs|Selector11~9 (
  36578. .A(\macro_inst|u_uart[1]|u_regs|Selector11~8_combout ),
  36579. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  36580. .C(\macro_inst|u_uart[1]|u_regs|Selector11~6_combout ),
  36581. .D(\macro_inst|u_uart[1]|u_regs|Selector11~7_combout ),
  36582. .Cin(),
  36583. .Qin(),
  36584. .Clk(),
  36585. .AsyncReset(),
  36586. .SyncReset(),
  36587. .ShiftData(),
  36588. .SyncLoad(),
  36589. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~9_combout ),
  36590. .Cout(),
  36591. .Q());
  36592. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .coord_x = 16;
  36593. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .coord_y = 5;
  36594. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .coord_z = 6;
  36595. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .mask = 16'hEFEC;
  36596. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .modeMux = 1'b0;
  36597. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .FeedbackMux = 1'b0;
  36598. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .ShiftMux = 1'b0;
  36599. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .BypassEn = 1'b0;
  36600. defparam \macro_inst|u_uart[1]|u_regs|Selector11~9 .CarryEnb = 1'b1;
  36601. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~0 (
  36602. .A(\macro_inst|u_uart[1]|u_regs|rx_dma_en [0]),
  36603. .B(\macro_inst|u_ahb2apb|paddr [9]),
  36604. .C(\macro_inst|u_ahb2apb|paddr [8]),
  36605. .D(\macro_inst|u_uart[1]|u_regs|rx_dma_en [1]),
  36606. .Cin(),
  36607. .Qin(),
  36608. .Clk(),
  36609. .AsyncReset(),
  36610. .SyncReset(),
  36611. .ShiftData(),
  36612. .SyncLoad(),
  36613. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~0_combout ),
  36614. .Cout(),
  36615. .Q());
  36616. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .coord_x = 18;
  36617. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .coord_y = 5;
  36618. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .coord_z = 10;
  36619. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .mask = 16'hF2C2;
  36620. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .modeMux = 1'b0;
  36621. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .FeedbackMux = 1'b0;
  36622. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .ShiftMux = 1'b0;
  36623. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .BypassEn = 1'b0;
  36624. defparam \macro_inst|u_uart[1]|u_regs|Selector12~0 .CarryEnb = 1'b1;
  36625. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~10 (
  36626. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~8_combout ),
  36627. .B(\macro_inst|u_uart[1]|u_regs|Selector12~1_combout ),
  36628. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~7_combout ),
  36629. .D(\macro_inst|u_uart[1]|u_regs|Selector12~9_combout ),
  36630. .Cin(),
  36631. .Qin(),
  36632. .Clk(),
  36633. .AsyncReset(),
  36634. .SyncReset(),
  36635. .ShiftData(),
  36636. .SyncLoad(),
  36637. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~10_combout ),
  36638. .Cout(),
  36639. .Q());
  36640. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .coord_x = 16;
  36641. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .coord_y = 3;
  36642. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .coord_z = 1;
  36643. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .mask = 16'hD585;
  36644. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .modeMux = 1'b0;
  36645. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .FeedbackMux = 1'b0;
  36646. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .ShiftMux = 1'b0;
  36647. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .BypassEn = 1'b0;
  36648. defparam \macro_inst|u_uart[1]|u_regs|Selector12~10 .CarryEnb = 1'b1;
  36649. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~2 (
  36650. .A(\macro_inst|u_ahb2apb|paddr [8]),
  36651. .B(\macro_inst|u_uart[1]|u_rx[0]|framing_error~q ),
  36652. .C(\macro_inst|u_uart[1]|u_rx[1]|framing_error~q ),
  36653. .D(\macro_inst|u_ahb2apb|paddr [9]),
  36654. .Cin(),
  36655. .Qin(),
  36656. .Clk(),
  36657. .AsyncReset(),
  36658. .SyncReset(),
  36659. .ShiftData(),
  36660. .SyncLoad(),
  36661. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~2_combout ),
  36662. .Cout(),
  36663. .Q());
  36664. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .coord_x = 18;
  36665. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .coord_y = 6;
  36666. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .coord_z = 1;
  36667. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .mask = 16'hAAE4;
  36668. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .modeMux = 1'b0;
  36669. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .FeedbackMux = 1'b0;
  36670. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .ShiftMux = 1'b0;
  36671. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .BypassEn = 1'b0;
  36672. defparam \macro_inst|u_uart[1]|u_regs|Selector12~2 .CarryEnb = 1'b1;
  36673. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~3 (
  36674. .A(\macro_inst|u_uart[1]|u_rx[3]|framing_error~q ),
  36675. .B(\macro_inst|u_ahb2apb|paddr [9]),
  36676. .C(\macro_inst|u_uart[1]|u_rx[2]|framing_error~q ),
  36677. .D(\macro_inst|u_uart[1]|u_regs|Selector12~2_combout ),
  36678. .Cin(),
  36679. .Qin(),
  36680. .Clk(),
  36681. .AsyncReset(),
  36682. .SyncReset(),
  36683. .ShiftData(),
  36684. .SyncLoad(),
  36685. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~3_combout ),
  36686. .Cout(),
  36687. .Q());
  36688. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .coord_x = 18;
  36689. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .coord_y = 6;
  36690. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .coord_z = 12;
  36691. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .mask = 16'hBBC0;
  36692. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .modeMux = 1'b0;
  36693. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .FeedbackMux = 1'b0;
  36694. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .ShiftMux = 1'b0;
  36695. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .BypassEn = 1'b0;
  36696. defparam \macro_inst|u_uart[1]|u_regs|Selector12~3 .CarryEnb = 1'b1;
  36697. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~4 (
  36698. .A(\macro_inst|u_uart[1]|u_regs|Selector12~3_combout ),
  36699. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  36700. .C(\macro_inst|u_uart[1]|u_regs|rx_reg [0]),
  36701. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36702. .Cin(),
  36703. .Qin(),
  36704. .Clk(),
  36705. .AsyncReset(),
  36706. .SyncReset(),
  36707. .ShiftData(),
  36708. .SyncLoad(),
  36709. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~4_combout ),
  36710. .Cout(),
  36711. .Q());
  36712. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .coord_x = 16;
  36713. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .coord_y = 6;
  36714. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .coord_z = 11;
  36715. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .mask = 16'hCCB8;
  36716. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .modeMux = 1'b0;
  36717. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .FeedbackMux = 1'b0;
  36718. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .ShiftMux = 1'b0;
  36719. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .BypassEn = 1'b0;
  36720. defparam \macro_inst|u_uart[1]|u_regs|Selector12~4 .CarryEnb = 1'b1;
  36721. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~5 (
  36722. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  36723. .B(\macro_inst|u_uart[1]|u_rx[4]|framing_error~q ),
  36724. .C(\macro_inst|u_uart[1]|u_rx[5]|framing_error~q ),
  36725. .D(\macro_inst|u_uart[1]|u_regs|Selector12~4_combout ),
  36726. .Cin(),
  36727. .Qin(),
  36728. .Clk(),
  36729. .AsyncReset(),
  36730. .SyncReset(),
  36731. .ShiftData(),
  36732. .SyncLoad(),
  36733. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~5_combout ),
  36734. .Cout(),
  36735. .Q());
  36736. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .coord_x = 16;
  36737. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .coord_y = 6;
  36738. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .coord_z = 0;
  36739. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .mask = 16'hF588;
  36740. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .modeMux = 1'b0;
  36741. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .FeedbackMux = 1'b0;
  36742. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .ShiftMux = 1'b0;
  36743. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .BypassEn = 1'b0;
  36744. defparam \macro_inst|u_uart[1]|u_regs|Selector12~5 .CarryEnb = 1'b1;
  36745. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~6 (
  36746. .A(\macro_inst|u_ahb2apb|paddr [5]),
  36747. .B(\macro_inst|u_ahb2apb|paddr [2]),
  36748. .C(\macro_inst|u_uart[1]|u_regs|uart_en~q ),
  36749. .D(\macro_inst|u_ahb2apb|paddr [3]),
  36750. .Cin(),
  36751. .Qin(),
  36752. .Clk(),
  36753. .AsyncReset(),
  36754. .SyncReset(),
  36755. .ShiftData(),
  36756. .SyncLoad(),
  36757. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~6_combout ),
  36758. .Cout(),
  36759. .Q());
  36760. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .coord_x = 16;
  36761. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .coord_y = 6;
  36762. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .coord_z = 12;
  36763. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .mask = 16'h0020;
  36764. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .modeMux = 1'b0;
  36765. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .FeedbackMux = 1'b0;
  36766. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .ShiftMux = 1'b0;
  36767. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .BypassEn = 1'b0;
  36768. defparam \macro_inst|u_uart[1]|u_regs|Selector12~6 .CarryEnb = 1'b1;
  36769. alta_slice \macro_inst|u_uart[1]|u_regs|Selector12~8 (
  36770. .A(\macro_inst|u_uart[1]|u_regs|Selector12~6_combout ),
  36771. .B(\macro_inst|u_uart[1]|u_regs|Selector12~7_combout ),
  36772. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  36773. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  36774. .Cin(),
  36775. .Qin(),
  36776. .Clk(),
  36777. .AsyncReset(),
  36778. .SyncReset(),
  36779. .ShiftData(),
  36780. .SyncLoad(),
  36781. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~8_combout ),
  36782. .Cout(),
  36783. .Q());
  36784. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .coord_x = 16;
  36785. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .coord_y = 6;
  36786. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .coord_z = 7;
  36787. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .mask = 16'h0FAC;
  36788. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .modeMux = 1'b0;
  36789. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .FeedbackMux = 1'b0;
  36790. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .ShiftMux = 1'b0;
  36791. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .BypassEn = 1'b0;
  36792. defparam \macro_inst|u_uart[1]|u_regs|Selector12~8 .CarryEnb = 1'b1;
  36793. alta_slice \macro_inst|u_uart[1]|u_regs|Selector1~0 (
  36794. .A(\macro_inst|u_ahb2apb|paddr [8]),
  36795. .B(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [1]),
  36796. .C(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [0]),
  36797. .D(\macro_inst|u_ahb2apb|paddr [9]),
  36798. .Cin(),
  36799. .Qin(),
  36800. .Clk(),
  36801. .AsyncReset(),
  36802. .SyncReset(),
  36803. .ShiftData(),
  36804. .SyncLoad(),
  36805. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector1~0_combout ),
  36806. .Cout(),
  36807. .Q());
  36808. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .coord_x = 18;
  36809. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .coord_y = 7;
  36810. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .coord_z = 0;
  36811. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .mask = 16'hAAD8;
  36812. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .modeMux = 1'b0;
  36813. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .FeedbackMux = 1'b0;
  36814. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .ShiftMux = 1'b0;
  36815. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .BypassEn = 1'b0;
  36816. defparam \macro_inst|u_uart[1]|u_regs|Selector1~0 .CarryEnb = 1'b1;
  36817. alta_slice \macro_inst|u_uart[1]|u_regs|Selector2~2 (
  36818. .A(\macro_inst|u_uart[1]|u_regs|Selector2~1_combout ),
  36819. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  36820. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  36821. .D(\macro_inst|u_uart[1]|u_regs|ibrd [10]),
  36822. .Cin(),
  36823. .Qin(),
  36824. .Clk(),
  36825. .AsyncReset(),
  36826. .SyncReset(),
  36827. .ShiftData(),
  36828. .SyncLoad(),
  36829. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector2~2_combout ),
  36830. .Cout(),
  36831. .Q());
  36832. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .coord_x = 16;
  36833. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .coord_y = 8;
  36834. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .coord_z = 13;
  36835. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .mask = 16'hCBC8;
  36836. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .modeMux = 1'b0;
  36837. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .FeedbackMux = 1'b0;
  36838. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .ShiftMux = 1'b0;
  36839. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .BypassEn = 1'b0;
  36840. defparam \macro_inst|u_uart[1]|u_regs|Selector2~2 .CarryEnb = 1'b1;
  36841. alta_slice \macro_inst|u_uart[1]|u_regs|Selector2~3 (
  36842. .A(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [5]),
  36843. .B(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [4]),
  36844. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  36845. .D(\macro_inst|u_uart[1]|u_regs|Selector2~2_combout ),
  36846. .Cin(),
  36847. .Qin(),
  36848. .Clk(),
  36849. .AsyncReset(),
  36850. .SyncReset(),
  36851. .ShiftData(),
  36852. .SyncLoad(),
  36853. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector2~3_combout ),
  36854. .Cout(),
  36855. .Q());
  36856. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .coord_x = 16;
  36857. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .coord_y = 8;
  36858. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .coord_z = 5;
  36859. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .mask = 16'hAFC0;
  36860. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .modeMux = 1'b0;
  36861. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .FeedbackMux = 1'b0;
  36862. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .ShiftMux = 1'b0;
  36863. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .BypassEn = 1'b0;
  36864. defparam \macro_inst|u_uart[1]|u_regs|Selector2~3 .CarryEnb = 1'b1;
  36865. alta_slice \macro_inst|u_uart[1]|u_regs|Selector4~0 (
  36866. .A(\macro_inst|u_ahb2apb|paddr [9]),
  36867. .B(\macro_inst|u_uart[1]|u_regs|parity_error_ie [1]),
  36868. .C(\macro_inst|u_uart[1]|u_regs|parity_error_ie [0]),
  36869. .D(\macro_inst|u_ahb2apb|paddr [8]),
  36870. .Cin(),
  36871. .Qin(),
  36872. .Clk(),
  36873. .AsyncReset(),
  36874. .SyncReset(),
  36875. .ShiftData(),
  36876. .SyncLoad(),
  36877. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector4~0_combout ),
  36878. .Cout(),
  36879. .Q());
  36880. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .coord_x = 17;
  36881. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .coord_y = 7;
  36882. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .coord_z = 7;
  36883. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .mask = 16'hEE50;
  36884. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .modeMux = 1'b0;
  36885. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .FeedbackMux = 1'b0;
  36886. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .ShiftMux = 1'b0;
  36887. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .BypassEn = 1'b0;
  36888. defparam \macro_inst|u_uart[1]|u_regs|Selector4~0 .CarryEnb = 1'b1;
  36889. alta_slice \macro_inst|u_uart[1]|u_regs|Selector4~3 (
  36890. .A(\macro_inst|u_uart[1]|u_regs|parity_error_ie [5]),
  36891. .B(\macro_inst|u_uart[1]|u_regs|parity_error_ie [4]),
  36892. .C(\macro_inst|u_uart[1]|u_regs|Selector4~2_combout ),
  36893. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  36894. .Cin(),
  36895. .Qin(),
  36896. .Clk(),
  36897. .AsyncReset(),
  36898. .SyncReset(),
  36899. .ShiftData(),
  36900. .SyncLoad(),
  36901. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector4~3_combout ),
  36902. .Cout(),
  36903. .Q());
  36904. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .coord_x = 16;
  36905. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .coord_y = 8;
  36906. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .coord_z = 1;
  36907. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .mask = 16'hACF0;
  36908. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .modeMux = 1'b0;
  36909. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .FeedbackMux = 1'b0;
  36910. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .ShiftMux = 1'b0;
  36911. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .BypassEn = 1'b0;
  36912. defparam \macro_inst|u_uart[1]|u_regs|Selector4~3 .CarryEnb = 1'b1;
  36913. alta_slice \macro_inst|u_uart[1]|u_regs|Selector5~6 (
  36914. .A(\macro_inst|u_uart[1]|u_regs|status_reg [4]),
  36915. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  36916. .C(\macro_inst|u_uart[1]|u_regs|Selector5~5_combout ),
  36917. .D(\macro_inst|u_uart[1]|u_regs|Selector5~4_combout ),
  36918. .Cin(),
  36919. .Qin(),
  36920. .Clk(),
  36921. .AsyncReset(),
  36922. .SyncReset(),
  36923. .ShiftData(),
  36924. .SyncLoad(),
  36925. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~6_combout ),
  36926. .Cout(),
  36927. .Q());
  36928. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .coord_x = 17;
  36929. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .coord_y = 7;
  36930. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .coord_z = 10;
  36931. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .mask = 16'hE222;
  36932. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .modeMux = 1'b0;
  36933. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .FeedbackMux = 1'b0;
  36934. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .ShiftMux = 1'b0;
  36935. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .BypassEn = 1'b0;
  36936. defparam \macro_inst|u_uart[1]|u_regs|Selector5~6 .CarryEnb = 1'b1;
  36937. alta_slice \macro_inst|u_uart[1]|u_regs|Selector5~7 (
  36938. .A(\macro_inst|u_uart[1]|u_regs|Selector5~6_combout ),
  36939. .B(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  36940. .C(\macro_inst|u_uart[1]|u_regs|Selector5~3_combout ),
  36941. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  36942. .Cin(),
  36943. .Qin(),
  36944. .Clk(),
  36945. .AsyncReset(),
  36946. .SyncReset(),
  36947. .ShiftData(),
  36948. .SyncLoad(),
  36949. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~7_combout ),
  36950. .Cout(),
  36951. .Q());
  36952. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .coord_x = 17;
  36953. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .coord_y = 7;
  36954. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .coord_z = 2;
  36955. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .mask = 16'hC088;
  36956. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .modeMux = 1'b0;
  36957. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .FeedbackMux = 1'b0;
  36958. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .ShiftMux = 1'b0;
  36959. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .BypassEn = 1'b0;
  36960. defparam \macro_inst|u_uart[1]|u_regs|Selector5~7 .CarryEnb = 1'b1;
  36961. alta_slice \macro_inst|u_uart[1]|u_regs|Selector5~9 (
  36962. .A(\macro_inst|u_uart[1]|u_regs|Selector5~7_combout ),
  36963. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  36964. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  36965. .D(\macro_inst|u_uart[1]|u_regs|Selector5~8_combout ),
  36966. .Cin(),
  36967. .Qin(),
  36968. .Clk(),
  36969. .AsyncReset(),
  36970. .SyncReset(),
  36971. .ShiftData(),
  36972. .SyncLoad(),
  36973. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~9_combout ),
  36974. .Cout(),
  36975. .Q());
  36976. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .coord_x = 16;
  36977. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .coord_y = 6;
  36978. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .coord_z = 15;
  36979. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .mask = 16'h2F2C;
  36980. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .modeMux = 1'b0;
  36981. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .FeedbackMux = 1'b0;
  36982. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .ShiftMux = 1'b0;
  36983. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .BypassEn = 1'b0;
  36984. defparam \macro_inst|u_uart[1]|u_regs|Selector5~9 .CarryEnb = 1'b1;
  36985. alta_slice \macro_inst|u_uart[1]|u_regs|Selector6~0 (
  36986. .A(\macro_inst|u_uart[0]|u_regs|Selector6~1_combout ),
  36987. .B(\macro_inst|u_uart[1]|u_regs|rx_reg [6]),
  36988. .C(\macro_inst|u_ahb2apb|paddr [4]),
  36989. .D(\macro_inst|u_uart[1]|u_regs|status_reg [1]),
  36990. .Cin(),
  36991. .Qin(),
  36992. .Clk(),
  36993. .AsyncReset(),
  36994. .SyncReset(),
  36995. .ShiftData(),
  36996. .SyncLoad(),
  36997. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector6~0_combout ),
  36998. .Cout(),
  36999. .Q());
  37000. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .coord_x = 15;
  37001. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .coord_y = 8;
  37002. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .coord_z = 2;
  37003. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .mask = 16'h08A8;
  37004. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .modeMux = 1'b0;
  37005. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .FeedbackMux = 1'b0;
  37006. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .ShiftMux = 1'b0;
  37007. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .BypassEn = 1'b0;
  37008. defparam \macro_inst|u_uart[1]|u_regs|Selector6~0 .CarryEnb = 1'b1;
  37009. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~12 (
  37010. .A(\macro_inst|u_uart[1]|u_regs|Selector7~11_combout ),
  37011. .B(\macro_inst|u_uart[1]|u_regs|status_reg [2]),
  37012. .C(\macro_inst|u_uart[1]|u_regs|Selector7~10_combout ),
  37013. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  37014. .Cin(),
  37015. .Qin(),
  37016. .Clk(),
  37017. .AsyncReset(),
  37018. .SyncReset(),
  37019. .ShiftData(),
  37020. .SyncLoad(),
  37021. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~12_combout ),
  37022. .Cout(),
  37023. .Q());
  37024. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .coord_x = 16;
  37025. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .coord_y = 7;
  37026. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .coord_z = 8;
  37027. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .mask = 16'hA0CC;
  37028. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .modeMux = 1'b0;
  37029. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .FeedbackMux = 1'b0;
  37030. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .ShiftMux = 1'b0;
  37031. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .BypassEn = 1'b0;
  37032. defparam \macro_inst|u_uart[1]|u_regs|Selector7~12 .CarryEnb = 1'b1;
  37033. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~13 (
  37034. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37035. .B(\macro_inst|u_uart[1]|u_regs|Selector7~14_combout ),
  37036. .C(\macro_inst|u_uart[1]|u_regs|fbrd [5]),
  37037. .D(\macro_inst|u_uart[1]|u_regs|Selector7~8_combout ),
  37038. .Cin(),
  37039. .Qin(),
  37040. .Clk(),
  37041. .AsyncReset(),
  37042. .SyncReset(),
  37043. .ShiftData(),
  37044. .SyncLoad(),
  37045. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~13_combout ),
  37046. .Cout(),
  37047. .Q());
  37048. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .coord_x = 16;
  37049. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .coord_y = 7;
  37050. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .coord_z = 15;
  37051. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .mask = 16'hEE50;
  37052. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .modeMux = 1'b0;
  37053. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .FeedbackMux = 1'b0;
  37054. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .ShiftMux = 1'b0;
  37055. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .BypassEn = 1'b0;
  37056. defparam \macro_inst|u_uart[1]|u_regs|Selector7~13 .CarryEnb = 1'b1;
  37057. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~14 (
  37058. .A(\macro_inst|u_ahb2apb|paddr [5]),
  37059. .B(\macro_inst|u_uart[1]|u_regs|Selector7~12_combout ),
  37060. .C(\macro_inst|u_uart[1]|u_regs|Selector7~9_combout ),
  37061. .D(\macro_inst|u_ahb2apb|paddr [10]),
  37062. .Cin(),
  37063. .Qin(),
  37064. .Clk(),
  37065. .AsyncReset(),
  37066. .SyncReset(),
  37067. .ShiftData(),
  37068. .SyncLoad(),
  37069. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~14_combout ),
  37070. .Cout(),
  37071. .Q());
  37072. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .coord_x = 16;
  37073. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .coord_y = 7;
  37074. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .coord_z = 13;
  37075. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .mask = 16'hE4CC;
  37076. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .modeMux = 1'b0;
  37077. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .FeedbackMux = 1'b0;
  37078. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .ShiftMux = 1'b0;
  37079. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .BypassEn = 1'b0;
  37080. defparam \macro_inst|u_uart[1]|u_regs|Selector7~14 .CarryEnb = 1'b1;
  37081. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~4 (
  37082. .A(\macro_inst|u_ahb2apb|paddr [8]),
  37083. .B(\macro_inst|u_ahb2apb|paddr [9]),
  37084. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_complete~q ),
  37085. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_complete~q ),
  37086. .Cin(),
  37087. .Qin(),
  37088. .Clk(),
  37089. .AsyncReset(),
  37090. .SyncReset(),
  37091. .ShiftData(),
  37092. .SyncLoad(),
  37093. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~4_combout ),
  37094. .Cout(),
  37095. .Q());
  37096. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .coord_x = 18;
  37097. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .coord_y = 7;
  37098. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .coord_z = 1;
  37099. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .mask = 16'hE6A2;
  37100. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .modeMux = 1'b0;
  37101. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .FeedbackMux = 1'b0;
  37102. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .ShiftMux = 1'b0;
  37103. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .BypassEn = 1'b0;
  37104. defparam \macro_inst|u_uart[1]|u_regs|Selector7~4 .CarryEnb = 1'b1;
  37105. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~5 (
  37106. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_complete~q ),
  37107. .B(\macro_inst|u_ahb2apb|paddr [9]),
  37108. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_complete~q ),
  37109. .D(\macro_inst|u_uart[1]|u_regs|Selector7~4_combout ),
  37110. .Cin(),
  37111. .Qin(),
  37112. .Clk(),
  37113. .AsyncReset(),
  37114. .SyncReset(),
  37115. .ShiftData(),
  37116. .SyncLoad(),
  37117. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~5_combout ),
  37118. .Cout(),
  37119. .Q());
  37120. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .coord_x = 18;
  37121. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .coord_y = 7;
  37122. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .coord_z = 2;
  37123. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .mask = 16'hEE30;
  37124. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .modeMux = 1'b0;
  37125. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .FeedbackMux = 1'b0;
  37126. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .ShiftMux = 1'b0;
  37127. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .BypassEn = 1'b0;
  37128. defparam \macro_inst|u_uart[1]|u_regs|Selector7~5 .CarryEnb = 1'b1;
  37129. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~6 (
  37130. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37131. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_complete~q ),
  37132. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_complete~q ),
  37133. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  37134. .Cin(),
  37135. .Qin(),
  37136. .Clk(),
  37137. .AsyncReset(),
  37138. .SyncReset(),
  37139. .ShiftData(),
  37140. .SyncLoad(),
  37141. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~6_combout ),
  37142. .Cout(),
  37143. .Q());
  37144. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .coord_x = 18;
  37145. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .coord_y = 7;
  37146. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .coord_z = 3;
  37147. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .mask = 16'hDDA0;
  37148. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .modeMux = 1'b0;
  37149. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .FeedbackMux = 1'b0;
  37150. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .ShiftMux = 1'b0;
  37151. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .BypassEn = 1'b0;
  37152. defparam \macro_inst|u_uart[1]|u_regs|Selector7~6 .CarryEnb = 1'b1;
  37153. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~7 (
  37154. .A(\macro_inst|u_uart[1]|u_regs|Selector7~5_combout ),
  37155. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37156. .C(\macro_inst|u_uart[1]|u_regs|rx_reg [5]),
  37157. .D(\macro_inst|u_uart[1]|u_regs|Selector7~6_combout ),
  37158. .Cin(),
  37159. .Qin(),
  37160. .Clk(),
  37161. .AsyncReset(),
  37162. .SyncReset(),
  37163. .ShiftData(),
  37164. .SyncLoad(),
  37165. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~7_combout ),
  37166. .Cout(),
  37167. .Q());
  37168. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .coord_x = 18;
  37169. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .coord_y = 7;
  37170. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .coord_z = 12;
  37171. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .mask = 16'hEE30;
  37172. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .modeMux = 1'b0;
  37173. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .FeedbackMux = 1'b0;
  37174. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .ShiftMux = 1'b0;
  37175. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .BypassEn = 1'b0;
  37176. defparam \macro_inst|u_uart[1]|u_regs|Selector7~7 .CarryEnb = 1'b1;
  37177. alta_slice \macro_inst|u_uart[1]|u_regs|Selector7~8 (
  37178. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37179. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  37180. .C(\macro_inst|u_uart[1]|u_regs|ibrd [5]),
  37181. .D(\macro_inst|u_uart[1]|u_regs|Selector7~7_combout ),
  37182. .Cin(),
  37183. .Qin(),
  37184. .Clk(),
  37185. .AsyncReset(),
  37186. .SyncReset(),
  37187. .ShiftData(),
  37188. .SyncLoad(),
  37189. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~8_combout ),
  37190. .Cout(),
  37191. .Q());
  37192. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .coord_x = 16;
  37193. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .coord_y = 7;
  37194. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .coord_z = 7;
  37195. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .mask = 16'hE6C4;
  37196. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .modeMux = 1'b0;
  37197. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .FeedbackMux = 1'b0;
  37198. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .ShiftMux = 1'b0;
  37199. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .BypassEn = 1'b0;
  37200. defparam \macro_inst|u_uart[1]|u_regs|Selector7~8 .CarryEnb = 1'b1;
  37201. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~12 (
  37202. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  37203. .B(\macro_inst|u_uart[1]|u_regs|status_reg [1]),
  37204. .C(\macro_inst|u_uart[1]|u_regs|Selector8~10_combout ),
  37205. .D(\macro_inst|u_uart[1]|u_regs|Selector8~11_combout ),
  37206. .Cin(),
  37207. .Qin(),
  37208. .Clk(),
  37209. .AsyncReset(),
  37210. .SyncReset(),
  37211. .ShiftData(),
  37212. .SyncLoad(),
  37213. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~12_combout ),
  37214. .Cout(),
  37215. .Q());
  37216. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .coord_x = 15;
  37217. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .coord_y = 8;
  37218. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .coord_z = 9;
  37219. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .mask = 16'hE444;
  37220. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .modeMux = 1'b0;
  37221. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .FeedbackMux = 1'b0;
  37222. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .ShiftMux = 1'b0;
  37223. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .BypassEn = 1'b0;
  37224. defparam \macro_inst|u_uart[1]|u_regs|Selector8~12 .CarryEnb = 1'b1;
  37225. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~13 (
  37226. .A(\macro_inst|u_uart[1]|u_regs|fbrd [4]),
  37227. .B(\macro_inst|u_uart[1]|u_regs|Selector8~14_combout ),
  37228. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37229. .D(\macro_inst|u_uart[1]|u_regs|Selector8~8_combout ),
  37230. .Cin(),
  37231. .Qin(),
  37232. .Clk(),
  37233. .AsyncReset(),
  37234. .SyncReset(),
  37235. .ShiftData(),
  37236. .SyncLoad(),
  37237. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~13_combout ),
  37238. .Cout(),
  37239. .Q());
  37240. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .coord_x = 15;
  37241. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .coord_y = 6;
  37242. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .coord_z = 1;
  37243. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .mask = 16'hFC0A;
  37244. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .modeMux = 1'b0;
  37245. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .FeedbackMux = 1'b0;
  37246. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .ShiftMux = 1'b0;
  37247. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .BypassEn = 1'b0;
  37248. defparam \macro_inst|u_uart[1]|u_regs|Selector8~13 .CarryEnb = 1'b1;
  37249. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~14 (
  37250. .A(\macro_inst|u_uart[1]|u_regs|Selector8~9_combout ),
  37251. .B(\macro_inst|u_ahb2apb|paddr [5]),
  37252. .C(\macro_inst|u_uart[1]|u_regs|Selector8~12_combout ),
  37253. .D(\macro_inst|u_ahb2apb|paddr [10]),
  37254. .Cin(),
  37255. .Qin(),
  37256. .Clk(),
  37257. .AsyncReset(),
  37258. .SyncReset(),
  37259. .ShiftData(),
  37260. .SyncLoad(),
  37261. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~14_combout ),
  37262. .Cout(),
  37263. .Q());
  37264. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .coord_x = 15;
  37265. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .coord_y = 6;
  37266. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .coord_z = 0;
  37267. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .mask = 16'hB8F0;
  37268. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .modeMux = 1'b0;
  37269. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .FeedbackMux = 1'b0;
  37270. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .ShiftMux = 1'b0;
  37271. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .BypassEn = 1'b0;
  37272. defparam \macro_inst|u_uart[1]|u_regs|Selector8~14 .CarryEnb = 1'b1;
  37273. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~4 (
  37274. .A(\macro_inst|u_ahb2apb|paddr [8]),
  37275. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_idle~q ),
  37276. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_idle~q ),
  37277. .D(\macro_inst|u_ahb2apb|paddr [9]),
  37278. .Cin(),
  37279. .Qin(),
  37280. .Clk(),
  37281. .AsyncReset(),
  37282. .SyncReset(),
  37283. .ShiftData(),
  37284. .SyncLoad(),
  37285. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~4_combout ),
  37286. .Cout(),
  37287. .Q());
  37288. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .coord_x = 18;
  37289. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .coord_y = 7;
  37290. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .coord_z = 9;
  37291. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .mask = 16'hEE50;
  37292. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .modeMux = 1'b0;
  37293. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .FeedbackMux = 1'b0;
  37294. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .ShiftMux = 1'b0;
  37295. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .BypassEn = 1'b0;
  37296. defparam \macro_inst|u_uart[1]|u_regs|Selector8~4 .CarryEnb = 1'b1;
  37297. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~5 (
  37298. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_idle~q ),
  37299. .B(\macro_inst|u_uart[1]|u_regs|Selector8~4_combout ),
  37300. .C(\macro_inst|u_ahb2apb|paddr [8]),
  37301. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_idle~q ),
  37302. .Cin(),
  37303. .Qin(),
  37304. .Clk(),
  37305. .AsyncReset(),
  37306. .SyncReset(),
  37307. .ShiftData(),
  37308. .SyncLoad(),
  37309. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~5_combout ),
  37310. .Cout(),
  37311. .Q());
  37312. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .coord_x = 18;
  37313. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .coord_y = 7;
  37314. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .coord_z = 14;
  37315. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .mask = 16'hEC2C;
  37316. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .modeMux = 1'b0;
  37317. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .FeedbackMux = 1'b0;
  37318. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .ShiftMux = 1'b0;
  37319. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .BypassEn = 1'b0;
  37320. defparam \macro_inst|u_uart[1]|u_regs|Selector8~5 .CarryEnb = 1'b1;
  37321. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~6 (
  37322. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_idle~q ),
  37323. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_idle~q ),
  37324. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  37325. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37326. .Cin(),
  37327. .Qin(),
  37328. .Clk(),
  37329. .AsyncReset(),
  37330. .SyncReset(),
  37331. .ShiftData(),
  37332. .SyncLoad(),
  37333. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~6_combout ),
  37334. .Cout(),
  37335. .Q());
  37336. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .coord_x = 18;
  37337. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .coord_y = 7;
  37338. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .coord_z = 13;
  37339. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .mask = 16'hACF0;
  37340. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .modeMux = 1'b0;
  37341. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .FeedbackMux = 1'b0;
  37342. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .ShiftMux = 1'b0;
  37343. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .BypassEn = 1'b0;
  37344. defparam \macro_inst|u_uart[1]|u_regs|Selector8~6 .CarryEnb = 1'b1;
  37345. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~7 (
  37346. .A(\macro_inst|u_uart[1]|u_regs|rx_reg [4]),
  37347. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37348. .C(\macro_inst|u_uart[1]|u_regs|Selector8~5_combout ),
  37349. .D(\macro_inst|u_uart[1]|u_regs|Selector8~6_combout ),
  37350. .Cin(),
  37351. .Qin(),
  37352. .Clk(),
  37353. .AsyncReset(),
  37354. .SyncReset(),
  37355. .ShiftData(),
  37356. .SyncLoad(),
  37357. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~7_combout ),
  37358. .Cout(),
  37359. .Q());
  37360. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .coord_x = 18;
  37361. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .coord_y = 7;
  37362. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .coord_z = 15;
  37363. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .mask = 16'hFC22;
  37364. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .modeMux = 1'b0;
  37365. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .FeedbackMux = 1'b0;
  37366. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .ShiftMux = 1'b0;
  37367. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .BypassEn = 1'b0;
  37368. defparam \macro_inst|u_uart[1]|u_regs|Selector8~7 .CarryEnb = 1'b1;
  37369. alta_slice \macro_inst|u_uart[1]|u_regs|Selector8~8 (
  37370. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~5_combout ),
  37371. .B(\macro_inst|u_uart[1]|u_regs|Selector8~7_combout ),
  37372. .C(\macro_inst|u_uart[1]|u_regs|ibrd [4]),
  37373. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37374. .Cin(),
  37375. .Qin(),
  37376. .Clk(),
  37377. .AsyncReset(),
  37378. .SyncReset(),
  37379. .ShiftData(),
  37380. .SyncLoad(),
  37381. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~8_combout ),
  37382. .Cout(),
  37383. .Q());
  37384. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .coord_x = 15;
  37385. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .coord_y = 6;
  37386. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .coord_z = 13;
  37387. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .mask = 16'hE4AA;
  37388. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .modeMux = 1'b0;
  37389. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .FeedbackMux = 1'b0;
  37390. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .ShiftMux = 1'b0;
  37391. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .BypassEn = 1'b0;
  37392. defparam \macro_inst|u_uart[1]|u_regs|Selector8~8 .CarryEnb = 1'b1;
  37393. alta_slice \macro_inst|u_uart[1]|u_regs|Selector9~0 (
  37394. .A(\macro_inst|u_uart[1]|u_rx[0]|overrun_error~q ),
  37395. .B(\macro_inst|u_ahb2apb|paddr [8]),
  37396. .C(\macro_inst|u_ahb2apb|paddr [9]),
  37397. .D(\macro_inst|u_uart[1]|u_rx[1]|overrun_error~q ),
  37398. .Cin(),
  37399. .Qin(),
  37400. .Clk(),
  37401. .AsyncReset(),
  37402. .SyncReset(),
  37403. .ShiftData(),
  37404. .SyncLoad(),
  37405. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~0_combout ),
  37406. .Cout(),
  37407. .Q());
  37408. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .coord_x = 17;
  37409. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .coord_y = 5;
  37410. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .coord_z = 5;
  37411. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .mask = 16'hCEC2;
  37412. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .modeMux = 1'b0;
  37413. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .FeedbackMux = 1'b0;
  37414. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .ShiftMux = 1'b0;
  37415. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .BypassEn = 1'b0;
  37416. defparam \macro_inst|u_uart[1]|u_regs|Selector9~0 .CarryEnb = 1'b1;
  37417. alta_slice \macro_inst|u_uart[1]|u_regs|Selector9~1 (
  37418. .A(\macro_inst|u_ahb2apb|paddr [9]),
  37419. .B(\macro_inst|u_uart[1]|u_rx[3]|overrun_error~q ),
  37420. .C(\macro_inst|u_uart[1]|u_rx[2]|overrun_error~q ),
  37421. .D(\macro_inst|u_uart[1]|u_regs|Selector9~0_combout ),
  37422. .Cin(),
  37423. .Qin(),
  37424. .Clk(),
  37425. .AsyncReset(),
  37426. .SyncReset(),
  37427. .ShiftData(),
  37428. .SyncLoad(),
  37429. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~1_combout ),
  37430. .Cout(),
  37431. .Q());
  37432. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .coord_x = 17;
  37433. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .coord_y = 5;
  37434. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .coord_z = 12;
  37435. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .mask = 16'hDDA0;
  37436. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .modeMux = 1'b0;
  37437. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .FeedbackMux = 1'b0;
  37438. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .ShiftMux = 1'b0;
  37439. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .BypassEn = 1'b0;
  37440. defparam \macro_inst|u_uart[1]|u_regs|Selector9~1 .CarryEnb = 1'b1;
  37441. alta_slice \macro_inst|u_uart[1]|u_regs|Selector9~2 (
  37442. .A(\macro_inst|u_uart[1]|u_regs|Selector9~1_combout ),
  37443. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~2_combout ),
  37444. .C(\macro_inst|u_uart[1]|u_regs|rx_reg [3]),
  37445. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37446. .Cin(),
  37447. .Qin(),
  37448. .Clk(),
  37449. .AsyncReset(),
  37450. .SyncReset(),
  37451. .ShiftData(),
  37452. .SyncLoad(),
  37453. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~2_combout ),
  37454. .Cout(),
  37455. .Q());
  37456. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .coord_x = 16;
  37457. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .coord_y = 5;
  37458. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .coord_z = 7;
  37459. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .mask = 16'hCCB8;
  37460. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .modeMux = 1'b0;
  37461. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .FeedbackMux = 1'b0;
  37462. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .ShiftMux = 1'b0;
  37463. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .BypassEn = 1'b0;
  37464. defparam \macro_inst|u_uart[1]|u_regs|Selector9~2 .CarryEnb = 1'b1;
  37465. alta_slice \macro_inst|u_uart[1]|u_regs|Selector9~3 (
  37466. .A(\macro_inst|u_uart[1]|u_rx[5]|overrun_error~q ),
  37467. .B(\macro_inst|u_uart[1]|u_regs|Selector9~2_combout ),
  37468. .C(\macro_inst|u_uart[1]|u_rx[4]|overrun_error~q ),
  37469. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~1_combout ),
  37470. .Cin(),
  37471. .Qin(),
  37472. .Clk(),
  37473. .AsyncReset(),
  37474. .SyncReset(),
  37475. .ShiftData(),
  37476. .SyncLoad(),
  37477. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~3_combout ),
  37478. .Cout(),
  37479. .Q());
  37480. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .coord_x = 16;
  37481. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .coord_y = 5;
  37482. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .coord_z = 2;
  37483. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .mask = 16'hB8CC;
  37484. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .modeMux = 1'b0;
  37485. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .FeedbackMux = 1'b0;
  37486. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .ShiftMux = 1'b0;
  37487. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .BypassEn = 1'b0;
  37488. defparam \macro_inst|u_uart[1]|u_regs|Selector9~3 .CarryEnb = 1'b1;
  37489. alta_slice \macro_inst|u_uart[1]|u_regs|Selector9~5 (
  37490. .A(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  37491. .B(\macro_inst|u_uart[1]|u_regs|Selector9~4_combout ),
  37492. .C(\macro_inst|u_uart[1]|u_regs|fbrd [3]),
  37493. .D(\macro_inst|u_ahb2apb|paddr [3]),
  37494. .Cin(),
  37495. .Qin(),
  37496. .Clk(),
  37497. .AsyncReset(),
  37498. .SyncReset(),
  37499. .ShiftData(),
  37500. .SyncLoad(),
  37501. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~5_combout ),
  37502. .Cout(),
  37503. .Q());
  37504. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .coord_x = 16;
  37505. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .coord_y = 7;
  37506. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .coord_z = 1;
  37507. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .mask = 16'hE2CC;
  37508. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .modeMux = 1'b0;
  37509. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .FeedbackMux = 1'b0;
  37510. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .ShiftMux = 1'b0;
  37511. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .BypassEn = 1'b0;
  37512. defparam \macro_inst|u_uart[1]|u_regs|Selector9~5 .CarryEnb = 1'b1;
  37513. alta_slice \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 (
  37514. .A(vcc),
  37515. .B(\macro_inst|u_ahb2apb|paddr [9]),
  37516. .C(vcc),
  37517. .D(\macro_inst|u_ahb2apb|paddr [10]),
  37518. .Cin(),
  37519. .Qin(),
  37520. .Clk(),
  37521. .AsyncReset(),
  37522. .SyncReset(),
  37523. .ShiftData(),
  37524. .SyncLoad(),
  37525. .LutOut(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  37526. .Cout(),
  37527. .Q());
  37528. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .coord_x = 16;
  37529. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .coord_y = 2;
  37530. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .coord_z = 11;
  37531. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .mask = 16'h3300;
  37532. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .modeMux = 1'b0;
  37533. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .FeedbackMux = 1'b0;
  37534. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .ShiftMux = 1'b0;
  37535. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .BypassEn = 1'b0;
  37536. defparam \macro_inst|u_uart[1]|u_regs|ShiftLeft0~0 .CarryEnb = 1'b1;
  37537. alta_slice \macro_inst|u_uart[1]|u_regs|always2~0 (
  37538. .A(\macro_inst|u_ahb2apb|paddr [4]),
  37539. .B(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37540. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  37541. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  37542. .Cin(),
  37543. .Qin(),
  37544. .Clk(),
  37545. .AsyncReset(),
  37546. .SyncReset(),
  37547. .ShiftData(),
  37548. .SyncLoad(),
  37549. .LutOut(\macro_inst|u_uart[1]|u_regs|always2~0_combout ),
  37550. .Cout(),
  37551. .Q());
  37552. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .coord_x = 16;
  37553. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .coord_y = 7;
  37554. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .coord_z = 0;
  37555. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .mask = 16'h4000;
  37556. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .modeMux = 1'b0;
  37557. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .FeedbackMux = 1'b0;
  37558. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .ShiftMux = 1'b0;
  37559. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .BypassEn = 1'b0;
  37560. defparam \macro_inst|u_uart[1]|u_regs|always2~0 .CarryEnb = 1'b1;
  37561. alta_slice \macro_inst|u_uart[1]|u_regs|always7~0 (
  37562. .A(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  37563. .B(\macro_inst|u_ahb2apb|paddr [4]),
  37564. .C(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37565. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  37566. .Cin(),
  37567. .Qin(),
  37568. .Clk(),
  37569. .AsyncReset(),
  37570. .SyncReset(),
  37571. .ShiftData(),
  37572. .SyncLoad(),
  37573. .LutOut(\macro_inst|u_uart[1]|u_regs|always7~0_combout ),
  37574. .Cout(),
  37575. .Q());
  37576. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .coord_x = 16;
  37577. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .coord_y = 4;
  37578. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .coord_z = 14;
  37579. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .mask = 16'h8000;
  37580. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .modeMux = 1'b0;
  37581. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .FeedbackMux = 1'b0;
  37582. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .ShiftMux = 1'b0;
  37583. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .BypassEn = 1'b0;
  37584. defparam \macro_inst|u_uart[1]|u_regs|always7~0 .CarryEnb = 1'b1;
  37585. alta_slice \macro_inst|u_uart[1]|u_regs|always8~1 (
  37586. .A(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  37587. .B(\macro_inst|u_ahb2apb|paddr [7]),
  37588. .C(\macro_inst|u_uart[1]|u_regs|Equal2~0_combout ),
  37589. .D(\macro_inst|u_ahb2apb|paddr [6]),
  37590. .Cin(),
  37591. .Qin(),
  37592. .Clk(),
  37593. .AsyncReset(),
  37594. .SyncReset(),
  37595. .ShiftData(),
  37596. .SyncLoad(),
  37597. .LutOut(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  37598. .Cout(),
  37599. .Q());
  37600. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .coord_x = 17;
  37601. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .coord_y = 4;
  37602. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .coord_z = 11;
  37603. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .mask = 16'h2000;
  37604. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .modeMux = 1'b0;
  37605. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .FeedbackMux = 1'b0;
  37606. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .ShiftMux = 1'b0;
  37607. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .BypassEn = 1'b0;
  37608. defparam \macro_inst|u_uart[1]|u_regs|always8~1 .CarryEnb = 1'b1;
  37609. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[0] (
  37610. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~0_combout ),
  37611. .B(\macro_inst|u_uart[1]|u_regs|rx_dma_en [5]),
  37612. .C(\macro_inst|u_uart[1]|u_regs|rx_dma_en [4]),
  37613. .D(\macro_inst|u_uart[1]|u_regs|Selector12~10_combout ),
  37614. .Cin(),
  37615. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [0]),
  37616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X51_Y4_SIG_SIG ),
  37617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y4_SIG ),
  37618. .SyncReset(\macro_inst|u_ahb2apb|paddr[7]__SyncReset_X51_Y4_SIG ),
  37619. .ShiftData(),
  37620. .SyncLoad(SyncLoad_X51_Y4_GND),
  37621. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~11_combout ),
  37622. .Cout(),
  37623. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [0]));
  37624. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .coord_x = 16;
  37625. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .coord_y = 3;
  37626. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .coord_z = 4;
  37627. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .mask = 16'hF588;
  37628. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .modeMux = 1'b0;
  37629. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .FeedbackMux = 1'b0;
  37630. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .ShiftMux = 1'b0;
  37631. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .BypassEn = 1'b1;
  37632. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[0] .CarryEnb = 1'b1;
  37633. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[10] (
  37634. .A(vcc),
  37635. .B(vcc),
  37636. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  37637. .D(\macro_inst|u_uart[1]|u_regs|Selector2~3_combout ),
  37638. .Cin(),
  37639. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [10]),
  37640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ),
  37641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  37642. .SyncReset(),
  37643. .ShiftData(),
  37644. .SyncLoad(),
  37645. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector2~4_combout ),
  37646. .Cout(),
  37647. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [10]));
  37648. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .coord_x = 16;
  37649. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .coord_y = 8;
  37650. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .coord_z = 6;
  37651. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .mask = 16'h0F00;
  37652. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .modeMux = 1'b0;
  37653. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .FeedbackMux = 1'b0;
  37654. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .ShiftMux = 1'b0;
  37655. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .BypassEn = 1'b0;
  37656. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[10] .CarryEnb = 1'b1;
  37657. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[11] (
  37658. .A(vcc),
  37659. .B(vcc),
  37660. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  37661. .D(\macro_inst|u_uart[1]|u_regs|Selector1~3_combout ),
  37662. .Cin(),
  37663. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [11]),
  37664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ),
  37665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  37666. .SyncReset(),
  37667. .ShiftData(),
  37668. .SyncLoad(),
  37669. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector1~4_combout ),
  37670. .Cout(),
  37671. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [11]));
  37672. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .coord_x = 16;
  37673. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .coord_y = 8;
  37674. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .coord_z = 3;
  37675. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .mask = 16'h0F00;
  37676. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .modeMux = 1'b0;
  37677. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .FeedbackMux = 1'b0;
  37678. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .ShiftMux = 1'b0;
  37679. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .BypassEn = 1'b0;
  37680. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11] .CarryEnb = 1'b1;
  37681. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 (
  37682. .A(\macro_inst|u_ahb2apb|paddr [4]),
  37683. .B(\macro_inst|u_ahb2apb|paddr [8]),
  37684. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  37685. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  37686. .Cin(),
  37687. .Qin(),
  37688. .Clk(),
  37689. .AsyncReset(),
  37690. .SyncReset(),
  37691. .ShiftData(),
  37692. .SyncLoad(),
  37693. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  37694. .Cout(),
  37695. .Q());
  37696. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .coord_x = 15;
  37697. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .coord_y = 8;
  37698. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .coord_z = 13;
  37699. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .mask = 16'h8AAA;
  37700. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .modeMux = 1'b0;
  37701. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .FeedbackMux = 1'b0;
  37702. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .ShiftMux = 1'b0;
  37703. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .BypassEn = 1'b0;
  37704. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4 .CarryEnb = 1'b1;
  37705. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 (
  37706. .A(\macro_inst|u_ahb2apb|paddr [2]),
  37707. .B(\macro_inst|u_ahb2apb|paddr [4]),
  37708. .C(\macro_inst|u_ahb2apb|paddr [3]),
  37709. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37710. .Cin(),
  37711. .Qin(),
  37712. .Clk(),
  37713. .AsyncReset(),
  37714. .SyncReset(),
  37715. .ShiftData(),
  37716. .SyncLoad(),
  37717. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  37718. .Cout(),
  37719. .Q());
  37720. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .coord_x = 14;
  37721. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .coord_y = 7;
  37722. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .coord_z = 11;
  37723. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .mask = 16'hBDFF;
  37724. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .modeMux = 1'b0;
  37725. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .FeedbackMux = 1'b0;
  37726. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .ShiftMux = 1'b0;
  37727. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .BypassEn = 1'b0;
  37728. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5 .CarryEnb = 1'b1;
  37729. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 (
  37730. .A(\macro_inst|u_ahb2apb|paddr [3]),
  37731. .B(\macro_inst|u_ahb2apb|paddr [2]),
  37732. .C(\macro_inst|u_ahb2apb|paddr [4]),
  37733. .D(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~16_combout ),
  37734. .Cin(),
  37735. .Qin(),
  37736. .Clk(),
  37737. .AsyncReset(),
  37738. .SyncReset(),
  37739. .ShiftData(),
  37740. .SyncLoad(),
  37741. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  37742. .Cout(),
  37743. .Q());
  37744. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .coord_x = 15;
  37745. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .coord_y = 8;
  37746. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .coord_z = 1;
  37747. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .mask = 16'h2000;
  37748. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .modeMux = 1'b0;
  37749. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .FeedbackMux = 1'b0;
  37750. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .ShiftMux = 1'b0;
  37751. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .BypassEn = 1'b0;
  37752. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9 .CarryEnb = 1'b1;
  37753. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[12] (
  37754. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  37755. .B(vcc),
  37756. .C(\macro_inst|u_uart[1]|u_regs|Selector0~3_combout ),
  37757. .D(vcc),
  37758. .Cin(),
  37759. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [12]),
  37760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ),
  37761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  37762. .SyncReset(),
  37763. .ShiftData(),
  37764. .SyncLoad(),
  37765. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector0~4_combout ),
  37766. .Cout(),
  37767. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [12]));
  37768. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .coord_x = 16;
  37769. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .coord_y = 8;
  37770. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .coord_z = 11;
  37771. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .mask = 16'h5050;
  37772. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .modeMux = 1'b0;
  37773. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .FeedbackMux = 1'b0;
  37774. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .ShiftMux = 1'b0;
  37775. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .BypassEn = 1'b0;
  37776. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[12] .CarryEnb = 1'b1;
  37777. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[13] (
  37778. .A(\macro_inst|u_ahb2apb|paddr [2]),
  37779. .B(\macro_inst|u_uart[1]|u_regs|ibrd [13]),
  37780. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37781. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37782. .Cin(),
  37783. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [13]),
  37784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  37785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  37786. .SyncReset(),
  37787. .ShiftData(),
  37788. .SyncLoad(),
  37789. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata~6_combout ),
  37790. .Cout(),
  37791. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [13]));
  37792. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .coord_x = 15;
  37793. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .coord_y = 6;
  37794. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .coord_z = 15;
  37795. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .mask = 16'h8000;
  37796. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .modeMux = 1'b0;
  37797. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .FeedbackMux = 1'b0;
  37798. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .ShiftMux = 1'b0;
  37799. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .BypassEn = 1'b0;
  37800. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[13] .CarryEnb = 1'b1;
  37801. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[14] (
  37802. .A(\macro_inst|u_uart[1]|u_regs|ibrd [14]),
  37803. .B(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37804. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37805. .D(\macro_inst|u_ahb2apb|paddr [2]),
  37806. .Cin(),
  37807. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [14]),
  37808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ),
  37809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  37810. .SyncReset(),
  37811. .ShiftData(),
  37812. .SyncLoad(),
  37813. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata~7_combout ),
  37814. .Cout(),
  37815. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [14]));
  37816. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .coord_x = 16;
  37817. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .coord_y = 7;
  37818. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .coord_z = 11;
  37819. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .mask = 16'h8000;
  37820. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .modeMux = 1'b0;
  37821. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .FeedbackMux = 1'b0;
  37822. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .ShiftMux = 1'b0;
  37823. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .BypassEn = 1'b0;
  37824. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[14] .CarryEnb = 1'b1;
  37825. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[15] (
  37826. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  37827. .B(\macro_inst|u_ahb2apb|paddr [2]),
  37828. .C(\macro_inst|u_uart[1]|u_regs|ibrd [15]),
  37829. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  37830. .Cin(),
  37831. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [15]),
  37832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ),
  37833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  37834. .SyncReset(),
  37835. .ShiftData(),
  37836. .SyncLoad(),
  37837. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_prdata~8_combout ),
  37838. .Cout(),
  37839. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [15]));
  37840. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .coord_x = 16;
  37841. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .coord_y = 7;
  37842. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .coord_z = 9;
  37843. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .mask = 16'h8000;
  37844. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .modeMux = 1'b0;
  37845. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .FeedbackMux = 1'b0;
  37846. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .ShiftMux = 1'b0;
  37847. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .BypassEn = 1'b0;
  37848. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[15] .CarryEnb = 1'b1;
  37849. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[1] (
  37850. .A(vcc),
  37851. .B(\macro_inst|u_ahb2apb|paddr [4]),
  37852. .C(\macro_inst|u_ahb2apb|paddr [7]),
  37853. .D(\macro_inst|u_uart[1]|u_regs|Selector11~14_combout ),
  37854. .Cin(),
  37855. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [1]),
  37856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ),
  37857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  37858. .SyncReset(),
  37859. .ShiftData(),
  37860. .SyncLoad(),
  37861. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~15_combout ),
  37862. .Cout(),
  37863. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [1]));
  37864. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .coord_x = 16;
  37865. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .coord_y = 7;
  37866. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .coord_z = 5;
  37867. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .mask = 16'h0300;
  37868. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .modeMux = 1'b0;
  37869. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .FeedbackMux = 1'b0;
  37870. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .ShiftMux = 1'b0;
  37871. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .BypassEn = 1'b0;
  37872. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[1] .CarryEnb = 1'b1;
  37873. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[2] (
  37874. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~12_combout ),
  37875. .B(\macro_inst|u_ahb2apb|paddr [4]),
  37876. .C(\macro_inst|u_uart[1]|u_regs|Equal2~1_combout ),
  37877. .D(\macro_inst|u_uart[1]|u_regs|Selector10~5_combout ),
  37878. .Cin(),
  37879. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [2]),
  37880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  37881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  37882. .SyncReset(),
  37883. .ShiftData(),
  37884. .SyncLoad(),
  37885. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~6_combout ),
  37886. .Cout(),
  37887. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [2]));
  37888. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .coord_x = 15;
  37889. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .coord_y = 6;
  37890. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .coord_z = 2;
  37891. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .mask = 16'h2000;
  37892. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .modeMux = 1'b0;
  37893. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .FeedbackMux = 1'b0;
  37894. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .ShiftMux = 1'b0;
  37895. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .BypassEn = 1'b0;
  37896. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[2] .CarryEnb = 1'b1;
  37897. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[3] (
  37898. .A(\macro_inst|u_uart[0]|u_regs|Selector9~10_combout ),
  37899. .B(\macro_inst|u_ahb2apb|paddr [4]),
  37900. .C(\macro_inst|u_uart[1]|u_regs|status_reg [0]),
  37901. .D(\macro_inst|u_uart[1]|u_regs|Selector9~5_combout ),
  37902. .Cin(),
  37903. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [3]),
  37904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ),
  37905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  37906. .SyncReset(),
  37907. .ShiftData(),
  37908. .SyncLoad(),
  37909. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~6_combout ),
  37910. .Cout(),
  37911. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [3]));
  37912. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .coord_x = 16;
  37913. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .coord_y = 7;
  37914. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .coord_z = 12;
  37915. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .mask = 16'hA280;
  37916. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .modeMux = 1'b0;
  37917. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .FeedbackMux = 1'b0;
  37918. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .ShiftMux = 1'b0;
  37919. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .BypassEn = 1'b0;
  37920. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[3] .CarryEnb = 1'b1;
  37921. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[4] (
  37922. .A(\macro_inst|u_ahb2apb|paddr [6]),
  37923. .B(\macro_inst|u_ahb2apb|paddr [7]),
  37924. .C(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ),
  37925. .D(\macro_inst|u_uart[1]|u_regs|Selector8~13_combout ),
  37926. .Cin(),
  37927. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [4]),
  37928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  37929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  37930. .SyncReset(),
  37931. .ShiftData(),
  37932. .SyncLoad(),
  37933. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~15_combout ),
  37934. .Cout(),
  37935. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [4]));
  37936. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .coord_x = 15;
  37937. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .coord_y = 6;
  37938. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .coord_z = 14;
  37939. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .mask = 16'h0100;
  37940. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .modeMux = 1'b0;
  37941. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .FeedbackMux = 1'b0;
  37942. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .ShiftMux = 1'b0;
  37943. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .BypassEn = 1'b0;
  37944. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[4] .CarryEnb = 1'b1;
  37945. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[5] (
  37946. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~18_combout ),
  37947. .B(\macro_inst|u_ahb2apb|paddr [6]),
  37948. .C(\macro_inst|u_ahb2apb|paddr [7]),
  37949. .D(\macro_inst|u_uart[1]|u_regs|Selector7~13_combout ),
  37950. .Cin(),
  37951. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [5]),
  37952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y4_SIG_SIG ),
  37953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  37954. .SyncReset(),
  37955. .ShiftData(),
  37956. .SyncLoad(),
  37957. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~15_combout ),
  37958. .Cout(),
  37959. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [5]));
  37960. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .coord_x = 16;
  37961. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .coord_y = 7;
  37962. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .coord_z = 10;
  37963. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .mask = 16'h0100;
  37964. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .modeMux = 1'b0;
  37965. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .FeedbackMux = 1'b0;
  37966. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .ShiftMux = 1'b0;
  37967. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .BypassEn = 1'b0;
  37968. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[5] .CarryEnb = 1'b1;
  37969. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[6] (
  37970. .A(\macro_inst|u_uart[0]|u_regs|Selector6~0_combout ),
  37971. .B(\macro_inst|u_uart[1]|u_regs|Selector6~0_combout ),
  37972. .C(\macro_inst|u_uart[1]|u_regs|ibrd [6]),
  37973. .D(\macro_inst|u_ahb2apb|paddr [5]),
  37974. .Cin(),
  37975. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [6]),
  37976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  37977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  37978. .SyncReset(),
  37979. .ShiftData(),
  37980. .SyncLoad(),
  37981. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector6~1_combout ),
  37982. .Cout(),
  37983. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [6]));
  37984. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .coord_x = 15;
  37985. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .coord_y = 6;
  37986. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .coord_z = 10;
  37987. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .mask = 16'hA888;
  37988. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .modeMux = 1'b0;
  37989. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .FeedbackMux = 1'b0;
  37990. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .ShiftMux = 1'b0;
  37991. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .BypassEn = 1'b0;
  37992. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[6] .CarryEnb = 1'b1;
  37993. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[7] (
  37994. .A(vcc),
  37995. .B(\macro_inst|u_ahb2apb|paddr [7]),
  37996. .C(\macro_inst|u_ahb2apb|paddr [6]),
  37997. .D(\macro_inst|u_uart[1]|u_regs|Selector5~10_combout ),
  37998. .Cin(),
  37999. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [7]),
  38000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X60_Y5_SIG_SIG ),
  38001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y5_SIG ),
  38002. .SyncReset(),
  38003. .ShiftData(),
  38004. .SyncLoad(),
  38005. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~11_combout ),
  38006. .Cout(),
  38007. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [7]));
  38008. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .coord_x = 15;
  38009. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .coord_y = 6;
  38010. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .coord_z = 8;
  38011. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .mask = 16'h0300;
  38012. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .modeMux = 1'b0;
  38013. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .FeedbackMux = 1'b0;
  38014. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .ShiftMux = 1'b0;
  38015. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .BypassEn = 1'b0;
  38016. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[7] .CarryEnb = 1'b1;
  38017. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[8] (
  38018. .A(vcc),
  38019. .B(vcc),
  38020. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  38021. .D(\macro_inst|u_uart[1]|u_regs|Selector4~3_combout ),
  38022. .Cin(),
  38023. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [8]),
  38024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ),
  38025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  38026. .SyncReset(),
  38027. .ShiftData(),
  38028. .SyncLoad(),
  38029. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector4~4_combout ),
  38030. .Cout(),
  38031. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [8]));
  38032. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .coord_x = 16;
  38033. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .coord_y = 8;
  38034. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .coord_z = 4;
  38035. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .mask = 16'h0F00;
  38036. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .modeMux = 1'b0;
  38037. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .FeedbackMux = 1'b0;
  38038. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .ShiftMux = 1'b0;
  38039. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .BypassEn = 1'b0;
  38040. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[8] .CarryEnb = 1'b1;
  38041. alta_slice \macro_inst|u_uart[1]|u_regs|apb_prdata[9] (
  38042. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~5_combout ),
  38043. .B(\macro_inst|u_uart[1]|u_regs|Selector3~0_combout ),
  38044. .C(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  38045. .D(\macro_inst|u_uart[1]|u_regs|Selector3~3_combout ),
  38046. .Cin(),
  38047. .Qin(\macro_inst|u_uart[1]|u_regs|apb_prdata [9]),
  38048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|apb_read1~combout_X61_Y6_SIG_SIG ),
  38049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  38050. .SyncReset(),
  38051. .ShiftData(),
  38052. .SyncLoad(),
  38053. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector3~4_combout ),
  38054. .Cout(),
  38055. .Q(\macro_inst|u_uart[1]|u_regs|apb_prdata [9]));
  38056. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .coord_x = 16;
  38057. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .coord_y = 8;
  38058. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .coord_z = 12;
  38059. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .mask = 16'h4540;
  38060. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .modeMux = 1'b0;
  38061. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .FeedbackMux = 1'b0;
  38062. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .ShiftMux = 1'b0;
  38063. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .BypassEn = 1'b0;
  38064. defparam \macro_inst|u_uart[1]|u_regs|apb_prdata[9] .CarryEnb = 1'b1;
  38065. alta_slice \macro_inst|u_uart[1]|u_regs|apb_pready (
  38066. .A(\macro_inst|u_ahb2apb|penable~q ),
  38067. .B(\macro_inst|u_ahb2apb|paddr [12]),
  38068. .C(\macro_inst|u_ahb2apb|psel~q ),
  38069. .D(\macro_inst|u_ahb2apb|pwrite~q ),
  38070. .Cin(),
  38071. .Qin(\macro_inst|u_uart[1]|u_regs|apb_pready~q ),
  38072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  38073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  38074. .SyncReset(),
  38075. .ShiftData(),
  38076. .SyncLoad(),
  38077. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  38078. .Cout(),
  38079. .Q(\macro_inst|u_uart[1]|u_regs|apb_pready~q ));
  38080. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .coord_x = 16;
  38081. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .coord_y = 2;
  38082. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .coord_z = 4;
  38083. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .mask = 16'h0040;
  38084. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .modeMux = 1'b0;
  38085. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .FeedbackMux = 1'b0;
  38086. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .ShiftMux = 1'b0;
  38087. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .BypassEn = 1'b0;
  38088. defparam \macro_inst|u_uart[1]|u_regs|apb_pready .CarryEnb = 1'b1;
  38089. alta_slice \macro_inst|u_uart[1]|u_regs|apb_write~0 (
  38090. .A(\macro_inst|u_ahb2apb|paddr [12]),
  38091. .B(\macro_inst|u_ahb2apb|pwrite~q ),
  38092. .C(\macro_inst|u_ahb2apb|psel~q ),
  38093. .D(\macro_inst|u_ahb2apb|penable~q ),
  38094. .Cin(),
  38095. .Qin(),
  38096. .Clk(),
  38097. .AsyncReset(),
  38098. .SyncReset(),
  38099. .ShiftData(),
  38100. .SyncLoad(),
  38101. .LutOut(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  38102. .Cout(),
  38103. .Q());
  38104. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .coord_x = 16;
  38105. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .coord_y = 4;
  38106. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .coord_z = 13;
  38107. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .mask = 16'h0080;
  38108. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .modeMux = 1'b0;
  38109. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .FeedbackMux = 1'b0;
  38110. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .ShiftMux = 1'b0;
  38111. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .BypassEn = 1'b0;
  38112. defparam \macro_inst|u_uart[1]|u_regs|apb_write~0 .CarryEnb = 1'b1;
  38113. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[0] (
  38114. .A(\macro_inst|u_uart[1]|u_regs|break_error_ie [1]),
  38115. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38116. .C(\rv32.mem_ahb_hwdata[9] ),
  38117. .D(\macro_inst|u_ahb2apb|paddr [8]),
  38118. .Cin(),
  38119. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [0]),
  38120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  38121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38122. .SyncReset(SyncReset_X59_Y7_GND),
  38123. .ShiftData(),
  38124. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38125. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector3~1_combout ),
  38126. .Cout(),
  38127. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [0]));
  38128. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .coord_x = 17;
  38129. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .coord_y = 7;
  38130. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .coord_z = 11;
  38131. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .mask = 16'h22FC;
  38132. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .modeMux = 1'b0;
  38133. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .FeedbackMux = 1'b1;
  38134. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .ShiftMux = 1'b0;
  38135. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .BypassEn = 1'b1;
  38136. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[0] .CarryEnb = 1'b1;
  38137. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[1] (
  38138. .A(\macro_inst|u_uart[1]|u_regs|framing_error_ie [5]),
  38139. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  38140. .C(\rv32.mem_ahb_hwdata[9] ),
  38141. .D(\macro_inst|u_uart[1]|u_regs|framing_error_ie [4]),
  38142. .Cin(),
  38143. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [1]),
  38144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ),
  38145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38146. .SyncReset(SyncReset_X59_Y7_GND),
  38147. .ShiftData(),
  38148. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38149. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~3_combout ),
  38150. .Cout(),
  38151. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [1]));
  38152. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .coord_x = 17;
  38153. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .coord_y = 7;
  38154. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .coord_z = 3;
  38155. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .mask = 16'hBB88;
  38156. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .modeMux = 1'b0;
  38157. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .FeedbackMux = 1'b0;
  38158. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .ShiftMux = 1'b0;
  38159. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .BypassEn = 1'b1;
  38160. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[1] .CarryEnb = 1'b1;
  38161. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[2] (
  38162. .A(),
  38163. .B(),
  38164. .C(vcc),
  38165. .D(\rv32.mem_ahb_hwdata[9] ),
  38166. .Cin(),
  38167. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [2]),
  38168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  38169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  38170. .SyncReset(),
  38171. .ShiftData(),
  38172. .SyncLoad(),
  38173. .LutOut(\macro_inst|u_uart[1]|u_regs|break_error_ie[2]__feeder__LutOut ),
  38174. .Cout(),
  38175. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [2]));
  38176. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .coord_x = 17;
  38177. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .coord_y = 5;
  38178. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .coord_z = 7;
  38179. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .mask = 16'hFF00;
  38180. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .modeMux = 1'b1;
  38181. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .FeedbackMux = 1'b0;
  38182. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .ShiftMux = 1'b0;
  38183. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .BypassEn = 1'b0;
  38184. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[2] .CarryEnb = 1'b1;
  38185. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[3] (
  38186. .A(\macro_inst|u_ahb2apb|paddr [9]),
  38187. .B(\macro_inst|u_uart[1]|u_regs|Selector3~1_combout ),
  38188. .C(\rv32.mem_ahb_hwdata[9] ),
  38189. .D(\macro_inst|u_uart[1]|u_regs|break_error_ie [2]),
  38190. .Cin(),
  38191. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [3]),
  38192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  38193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  38194. .SyncReset(SyncReset_X60_Y7_GND),
  38195. .ShiftData(),
  38196. .SyncLoad(SyncLoad_X60_Y7_VCC),
  38197. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector3~2_combout ),
  38198. .Cout(),
  38199. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [3]));
  38200. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .coord_x = 18;
  38201. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .coord_y = 9;
  38202. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .coord_z = 1;
  38203. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .mask = 16'hEC64;
  38204. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .modeMux = 1'b0;
  38205. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .FeedbackMux = 1'b1;
  38206. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .ShiftMux = 1'b0;
  38207. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .BypassEn = 1'b1;
  38208. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[3] .CarryEnb = 1'b1;
  38209. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[4] (
  38210. .A(),
  38211. .B(),
  38212. .C(vcc),
  38213. .D(\rv32.mem_ahb_hwdata[9] ),
  38214. .Cin(),
  38215. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [4]),
  38216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  38217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  38218. .SyncReset(),
  38219. .ShiftData(),
  38220. .SyncLoad(),
  38221. .LutOut(\macro_inst|u_uart[1]|u_regs|break_error_ie[4]__feeder__LutOut ),
  38222. .Cout(),
  38223. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [4]));
  38224. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .coord_x = 17;
  38225. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .coord_y = 8;
  38226. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .coord_z = 12;
  38227. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .mask = 16'hFF00;
  38228. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .modeMux = 1'b1;
  38229. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .FeedbackMux = 1'b0;
  38230. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .ShiftMux = 1'b0;
  38231. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .BypassEn = 1'b0;
  38232. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[4] .CarryEnb = 1'b1;
  38233. alta_slice \macro_inst|u_uart[1]|u_regs|break_error_ie[5] (
  38234. .A(\macro_inst|u_uart[1]|u_regs|ibrd [9]),
  38235. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  38236. .C(\rv32.mem_ahb_hwdata[9] ),
  38237. .D(\macro_inst|u_uart[1]|u_regs|Selector3~2_combout ),
  38238. .Cin(),
  38239. .Qin(\macro_inst|u_uart[1]|u_regs|break_error_ie [5]),
  38240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ),
  38241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  38242. .SyncReset(SyncReset_X61_Y6_GND),
  38243. .ShiftData(),
  38244. .SyncLoad(SyncLoad_X61_Y6_VCC),
  38245. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector3~3_combout ),
  38246. .Cout(),
  38247. .Q(\macro_inst|u_uart[1]|u_regs|break_error_ie [5]));
  38248. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .coord_x = 16;
  38249. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .coord_y = 8;
  38250. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .coord_z = 15;
  38251. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .mask = 16'hEE22;
  38252. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .modeMux = 1'b0;
  38253. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .FeedbackMux = 1'b0;
  38254. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .ShiftMux = 1'b0;
  38255. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .BypassEn = 1'b1;
  38256. defparam \macro_inst|u_uart[1]|u_regs|break_error_ie[5] .CarryEnb = 1'b1;
  38257. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 (
  38258. .A(\macro_inst|u_ahb2apb|paddr [8]),
  38259. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38260. .C(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38261. .D(\macro_inst|u_ahb2apb|paddr [10]),
  38262. .Cin(),
  38263. .Qin(),
  38264. .Clk(),
  38265. .AsyncReset(),
  38266. .SyncReset(),
  38267. .ShiftData(),
  38268. .SyncLoad(),
  38269. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  38270. .Cout(),
  38271. .Q());
  38272. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .coord_x = 16;
  38273. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .coord_y = 5;
  38274. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .coord_z = 5;
  38275. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .mask = 16'hFFEF;
  38276. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .modeMux = 1'b0;
  38277. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .FeedbackMux = 1'b0;
  38278. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .ShiftMux = 1'b0;
  38279. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .BypassEn = 1'b0;
  38280. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[0]~12 .CarryEnb = 1'b1;
  38281. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 (
  38282. .A(\macro_inst|u_ahb2apb|paddr [10]),
  38283. .B(\macro_inst|u_ahb2apb|paddr [8]),
  38284. .C(\macro_inst|u_ahb2apb|paddr [9]),
  38285. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38286. .Cin(),
  38287. .Qin(),
  38288. .Clk(),
  38289. .AsyncReset(),
  38290. .SyncReset(),
  38291. .ShiftData(),
  38292. .SyncLoad(),
  38293. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ),
  38294. .Cout(),
  38295. .Q());
  38296. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .coord_x = 18;
  38297. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .coord_y = 8;
  38298. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .coord_z = 1;
  38299. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .mask = 16'h0400;
  38300. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .modeMux = 1'b0;
  38301. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .FeedbackMux = 1'b0;
  38302. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .ShiftMux = 1'b0;
  38303. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .BypassEn = 1'b0;
  38304. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[1]~13 .CarryEnb = 1'b1;
  38305. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 (
  38306. .A(\macro_inst|u_ahb2apb|paddr [10]),
  38307. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38308. .C(\macro_inst|u_ahb2apb|paddr [8]),
  38309. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38310. .Cin(),
  38311. .Qin(),
  38312. .Clk(),
  38313. .AsyncReset(),
  38314. .SyncReset(),
  38315. .ShiftData(),
  38316. .SyncLoad(),
  38317. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ),
  38318. .Cout(),
  38319. .Q());
  38320. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .coord_x = 17;
  38321. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .coord_y = 6;
  38322. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .coord_z = 9;
  38323. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .mask = 16'hFBFF;
  38324. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .modeMux = 1'b0;
  38325. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .FeedbackMux = 1'b0;
  38326. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .ShiftMux = 1'b0;
  38327. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .BypassEn = 1'b0;
  38328. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[2]~14 .CarryEnb = 1'b1;
  38329. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 (
  38330. .A(\macro_inst|u_ahb2apb|paddr [10]),
  38331. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38332. .C(\macro_inst|u_ahb2apb|paddr [8]),
  38333. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38334. .Cin(),
  38335. .Qin(),
  38336. .Clk(),
  38337. .AsyncReset(),
  38338. .SyncReset(),
  38339. .ShiftData(),
  38340. .SyncLoad(),
  38341. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  38342. .Cout(),
  38343. .Q());
  38344. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .coord_x = 19;
  38345. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .coord_y = 8;
  38346. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .coord_z = 4;
  38347. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .mask = 16'h4000;
  38348. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .modeMux = 1'b0;
  38349. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .FeedbackMux = 1'b0;
  38350. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .ShiftMux = 1'b0;
  38351. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .BypassEn = 1'b0;
  38352. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[3]~11 .CarryEnb = 1'b1;
  38353. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 (
  38354. .A(\macro_inst|u_ahb2apb|paddr [10]),
  38355. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38356. .C(\macro_inst|u_ahb2apb|paddr [8]),
  38357. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38358. .Cin(),
  38359. .Qin(),
  38360. .Clk(),
  38361. .AsyncReset(),
  38362. .SyncReset(),
  38363. .ShiftData(),
  38364. .SyncLoad(),
  38365. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  38366. .Cout(),
  38367. .Q());
  38368. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .coord_x = 19;
  38369. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .coord_y = 8;
  38370. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .coord_z = 12;
  38371. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .mask = 16'hFDFF;
  38372. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .modeMux = 1'b0;
  38373. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .FeedbackMux = 1'b0;
  38374. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .ShiftMux = 1'b0;
  38375. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .BypassEn = 1'b0;
  38376. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[4]~15 .CarryEnb = 1'b1;
  38377. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 (
  38378. .A(\macro_inst|u_ahb2apb|paddr [8]),
  38379. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38380. .C(\macro_inst|u_ahb2apb|paddr [10]),
  38381. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38382. .Cin(),
  38383. .Qin(),
  38384. .Clk(),
  38385. .AsyncReset(),
  38386. .SyncReset(),
  38387. .ShiftData(),
  38388. .SyncLoad(),
  38389. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  38390. .Cout(),
  38391. .Q());
  38392. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .coord_x = 19;
  38393. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .coord_y = 8;
  38394. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .coord_z = 13;
  38395. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .mask = 16'h2000;
  38396. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .modeMux = 1'b0;
  38397. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .FeedbackMux = 1'b0;
  38398. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .ShiftMux = 1'b0;
  38399. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .BypassEn = 1'b0;
  38400. defparam \macro_inst|u_uart[1]|u_regs|clear_flags[5]~16 .CarryEnb = 1'b1;
  38401. alta_slice \macro_inst|u_uart[1]|u_regs|clear_flags~10 (
  38402. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  38403. .B(\macro_inst|u_uart[0]|u_regs|Decoder1~1_combout ),
  38404. .C(\macro_inst|u_ahb2apb|paddr [7]),
  38405. .D(\macro_inst|u_ahb2apb|paddr [5]),
  38406. .Cin(),
  38407. .Qin(),
  38408. .Clk(),
  38409. .AsyncReset(),
  38410. .SyncReset(),
  38411. .ShiftData(),
  38412. .SyncLoad(),
  38413. .LutOut(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  38414. .Cout(),
  38415. .Q());
  38416. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .coord_x = 16;
  38417. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .coord_y = 5;
  38418. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .coord_z = 4;
  38419. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .mask = 16'h0008;
  38420. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .modeMux = 1'b0;
  38421. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .FeedbackMux = 1'b0;
  38422. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .ShiftMux = 1'b0;
  38423. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .BypassEn = 1'b0;
  38424. defparam \macro_inst|u_uart[1]|u_regs|clear_flags~10 .CarryEnb = 1'b1;
  38425. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[0] (
  38426. .A(\macro_inst|u_uart[0]|u_regs|ibrd [0]),
  38427. .B(vcc),
  38428. .C(\rv32.mem_ahb_hwdata[0] ),
  38429. .D(vcc),
  38430. .Cin(),
  38431. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [0]),
  38432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X58_Y5_SIG_SIG ),
  38433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  38434. .SyncReset(SyncReset_X58_Y5_GND),
  38435. .ShiftData(),
  38436. .SyncLoad(SyncLoad_X58_Y5_VCC),
  38437. .LutOut(\macro_inst|u_uart[0]|u_regs|ibrd[0]~_wirecell_combout ),
  38438. .Cout(),
  38439. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [0]));
  38440. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .coord_x = 17;
  38441. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .coord_y = 6;
  38442. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .coord_z = 3;
  38443. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .mask = 16'h5555;
  38444. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .modeMux = 1'b0;
  38445. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .FeedbackMux = 1'b0;
  38446. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .ShiftMux = 1'b0;
  38447. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .BypassEn = 1'b1;
  38448. defparam \macro_inst|u_uart[1]|u_regs|fbrd[0] .CarryEnb = 1'b1;
  38449. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[1] (
  38450. .A(\macro_inst|u_uart[0]|u_regs|tx_write [3]),
  38451. .B(vcc),
  38452. .C(\rv32.mem_ahb_hwdata[1] ),
  38453. .D(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|counter [0]),
  38454. .Cin(),
  38455. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [1]),
  38456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ),
  38457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  38458. .SyncReset(SyncReset_X61_Y4_GND),
  38459. .ShiftData(),
  38460. .SyncLoad(SyncLoad_X61_Y4_VCC),
  38461. .LutOut(\macro_inst|u_uart[0]|u_tx[3]|tx_fifo|wrreq~0_combout ),
  38462. .Cout(),
  38463. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [1]));
  38464. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .coord_x = 14;
  38465. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .coord_y = 9;
  38466. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .coord_z = 9;
  38467. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .mask = 16'h00AA;
  38468. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .modeMux = 1'b0;
  38469. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .FeedbackMux = 1'b0;
  38470. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .ShiftMux = 1'b0;
  38471. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .BypassEn = 1'b1;
  38472. defparam \macro_inst|u_uart[1]|u_regs|fbrd[1] .CarryEnb = 1'b1;
  38473. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[2] (
  38474. .A(\macro_inst|u_uart[1]|u_baud|f_cnt [3]),
  38475. .B(\macro_inst|u_uart[1]|u_regs|fbrd [2]),
  38476. .C(\rv32.mem_ahb_hwdata[2] ),
  38477. .D(vcc),
  38478. .Cin(\macro_inst|u_uart[1]|u_baud|LessThan0~3_cout ),
  38479. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [2]),
  38480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ),
  38481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  38482. .SyncReset(SyncReset_X61_Y4_GND),
  38483. .ShiftData(),
  38484. .SyncLoad(SyncLoad_X61_Y4_VCC),
  38485. .LutOut(),
  38486. .Cout(\macro_inst|u_uart[1]|u_baud|LessThan0~5_cout ),
  38487. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [2]));
  38488. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .coord_x = 14;
  38489. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .coord_y = 9;
  38490. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .coord_z = 2;
  38491. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .mask = 16'h004D;
  38492. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .modeMux = 1'b1;
  38493. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .FeedbackMux = 1'b0;
  38494. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .ShiftMux = 1'b0;
  38495. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .BypassEn = 1'b1;
  38496. defparam \macro_inst|u_uart[1]|u_regs|fbrd[2] .CarryEnb = 1'b0;
  38497. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[3] (
  38498. .A(\macro_inst|u_uart[1]|u_baud|f_cnt [2]),
  38499. .B(\macro_inst|u_uart[1]|u_regs|fbrd [3]),
  38500. .C(\rv32.mem_ahb_hwdata[3] ),
  38501. .D(vcc),
  38502. .Cin(\macro_inst|u_uart[1]|u_baud|LessThan0~5_cout ),
  38503. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [3]),
  38504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ),
  38505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  38506. .SyncReset(SyncReset_X61_Y4_GND),
  38507. .ShiftData(),
  38508. .SyncLoad(SyncLoad_X61_Y4_VCC),
  38509. .LutOut(),
  38510. .Cout(\macro_inst|u_uart[1]|u_baud|LessThan0~7_cout ),
  38511. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [3]));
  38512. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .coord_x = 14;
  38513. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .coord_y = 9;
  38514. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .coord_z = 3;
  38515. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .mask = 16'h002B;
  38516. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .modeMux = 1'b1;
  38517. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .FeedbackMux = 1'b0;
  38518. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .ShiftMux = 1'b0;
  38519. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .BypassEn = 1'b1;
  38520. defparam \macro_inst|u_uart[1]|u_regs|fbrd[3] .CarryEnb = 1'b0;
  38521. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[4] (
  38522. .A(\macro_inst|u_uart[1]|u_baud|f_cnt [1]),
  38523. .B(\macro_inst|u_uart[1]|u_regs|fbrd [4]),
  38524. .C(\rv32.mem_ahb_hwdata[4] ),
  38525. .D(vcc),
  38526. .Cin(\macro_inst|u_uart[1]|u_baud|LessThan0~7_cout ),
  38527. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [4]),
  38528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ),
  38529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  38530. .SyncReset(SyncReset_X61_Y4_GND),
  38531. .ShiftData(),
  38532. .SyncLoad(SyncLoad_X61_Y4_VCC),
  38533. .LutOut(),
  38534. .Cout(\macro_inst|u_uart[1]|u_baud|LessThan0~9_cout ),
  38535. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [4]));
  38536. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .coord_x = 14;
  38537. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .coord_y = 9;
  38538. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .coord_z = 4;
  38539. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .mask = 16'h004D;
  38540. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .modeMux = 1'b1;
  38541. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .FeedbackMux = 1'b0;
  38542. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .ShiftMux = 1'b0;
  38543. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .BypassEn = 1'b1;
  38544. defparam \macro_inst|u_uart[1]|u_regs|fbrd[4] .CarryEnb = 1'b0;
  38545. alta_slice \macro_inst|u_uart[1]|u_regs|fbrd[5] (
  38546. .A(),
  38547. .B(),
  38548. .C(vcc),
  38549. .D(\rv32.mem_ahb_hwdata[5] ),
  38550. .Cin(),
  38551. .Qin(\macro_inst|u_uart[1]|u_regs|fbrd [5]),
  38552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always2~0_combout_X61_Y4_SIG_SIG ),
  38553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y4_SIG ),
  38554. .SyncReset(),
  38555. .ShiftData(),
  38556. .SyncLoad(),
  38557. .LutOut(\macro_inst|u_uart[1]|u_regs|fbrd[5]__feeder__LutOut ),
  38558. .Cout(),
  38559. .Q(\macro_inst|u_uart[1]|u_regs|fbrd [5]));
  38560. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .coord_x = 14;
  38561. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .coord_y = 9;
  38562. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .coord_z = 7;
  38563. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .mask = 16'hFF00;
  38564. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .modeMux = 1'b1;
  38565. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .FeedbackMux = 1'b0;
  38566. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .ShiftMux = 1'b0;
  38567. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .BypassEn = 1'b0;
  38568. defparam \macro_inst|u_uart[1]|u_regs|fbrd[5] .CarryEnb = 1'b1;
  38569. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] (
  38570. .A(\macro_inst|u_ahb2apb|paddr [9]),
  38571. .B(\macro_inst|u_uart[1]|u_regs|framing_error_ie [2]),
  38572. .C(\rv32.mem_ahb_hwdata[7] ),
  38573. .D(\macro_inst|u_ahb2apb|paddr [8]),
  38574. .Cin(),
  38575. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [0]),
  38576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  38577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38578. .SyncReset(SyncReset_X59_Y7_GND),
  38579. .ShiftData(),
  38580. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38581. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~4_combout ),
  38582. .Cout(),
  38583. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [0]));
  38584. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .coord_x = 17;
  38585. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .coord_y = 7;
  38586. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .coord_z = 1;
  38587. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .mask = 16'hFFD8;
  38588. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .modeMux = 1'b0;
  38589. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .FeedbackMux = 1'b1;
  38590. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .ShiftMux = 1'b0;
  38591. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .BypassEn = 1'b1;
  38592. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[0] .CarryEnb = 1'b1;
  38593. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] (
  38594. .A(\macro_inst|u_uart[1]|u_regs|framing_error_ie [3]),
  38595. .B(\macro_inst|u_ahb2apb|paddr [9]),
  38596. .C(\rv32.mem_ahb_hwdata[7] ),
  38597. .D(\macro_inst|u_ahb2apb|paddr [8]),
  38598. .Cin(),
  38599. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [1]),
  38600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ),
  38601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  38602. .SyncReset(SyncReset_X59_Y7_GND),
  38603. .ShiftData(),
  38604. .SyncLoad(SyncLoad_X59_Y7_VCC),
  38605. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~5_combout ),
  38606. .Cout(),
  38607. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [1]));
  38608. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .coord_x = 17;
  38609. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .coord_y = 7;
  38610. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .coord_z = 0;
  38611. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .mask = 16'hB8FF;
  38612. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .modeMux = 1'b0;
  38613. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .FeedbackMux = 1'b1;
  38614. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .ShiftMux = 1'b0;
  38615. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .BypassEn = 1'b1;
  38616. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[1] .CarryEnb = 1'b1;
  38617. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] (
  38618. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  38619. .B(vcc),
  38620. .C(\rv32.mem_ahb_hwdata[7] ),
  38621. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  38622. .Cin(),
  38623. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [2]),
  38624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  38625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  38626. .SyncReset(SyncReset_X58_Y7_GND),
  38627. .ShiftData(),
  38628. .SyncLoad(SyncLoad_X58_Y7_VCC),
  38629. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector4~3_combout ),
  38630. .Cout(),
  38631. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [2]));
  38632. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .coord_x = 17;
  38633. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .coord_y = 5;
  38634. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .coord_z = 1;
  38635. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .mask = 16'h0055;
  38636. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .modeMux = 1'b0;
  38637. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .FeedbackMux = 1'b0;
  38638. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .ShiftMux = 1'b0;
  38639. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .BypassEn = 1'b1;
  38640. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[2] .CarryEnb = 1'b1;
  38641. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] (
  38642. .A(\macro_inst|u_uart[1]|u_rx[3]|framing_error~q ),
  38643. .B(\macro_inst|u_uart[1]|u_regs|parity_error_ie [3]),
  38644. .C(\rv32.mem_ahb_hwdata[7] ),
  38645. .D(\macro_inst|u_uart[1]|u_rx[3]|parity_error~q ),
  38646. .Cin(),
  38647. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [3]),
  38648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  38649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  38650. .SyncReset(SyncReset_X60_Y7_GND),
  38651. .ShiftData(),
  38652. .SyncLoad(SyncLoad_X60_Y7_VCC),
  38653. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~16_combout ),
  38654. .Cout(),
  38655. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [3]));
  38656. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .coord_x = 18;
  38657. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .coord_y = 9;
  38658. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .coord_z = 7;
  38659. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .mask = 16'hECA0;
  38660. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .modeMux = 1'b0;
  38661. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .FeedbackMux = 1'b1;
  38662. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .ShiftMux = 1'b0;
  38663. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .BypassEn = 1'b1;
  38664. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[3] .CarryEnb = 1'b1;
  38665. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] (
  38666. .A(),
  38667. .B(),
  38668. .C(vcc),
  38669. .D(\rv32.mem_ahb_hwdata[7] ),
  38670. .Cin(),
  38671. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [4]),
  38672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  38673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  38674. .SyncReset(),
  38675. .ShiftData(),
  38676. .SyncLoad(),
  38677. .LutOut(\macro_inst|u_uart[1]|u_regs|framing_error_ie[4]__feeder__LutOut ),
  38678. .Cout(),
  38679. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [4]));
  38680. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .coord_x = 17;
  38681. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .coord_y = 8;
  38682. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .coord_z = 15;
  38683. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .mask = 16'hFF00;
  38684. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .modeMux = 1'b1;
  38685. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .FeedbackMux = 1'b0;
  38686. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .ShiftMux = 1'b0;
  38687. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .BypassEn = 1'b0;
  38688. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[4] .CarryEnb = 1'b1;
  38689. alta_slice \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] (
  38690. .A(vcc),
  38691. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ),
  38692. .C(\rv32.mem_ahb_hwdata[7] ),
  38693. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  38694. .Cin(),
  38695. .Qin(\macro_inst|u_uart[1]|u_regs|framing_error_ie [5]),
  38696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y7_SIG_SIG ),
  38697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  38698. .SyncReset(SyncReset_X61_Y7_GND),
  38699. .ShiftData(),
  38700. .SyncLoad(SyncLoad_X61_Y7_VCC),
  38701. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector3~0_combout ),
  38702. .Cout(),
  38703. .Q(\macro_inst|u_uart[1]|u_regs|framing_error_ie [5]));
  38704. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .coord_x = 17;
  38705. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .coord_y = 9;
  38706. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .coord_z = 8;
  38707. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .mask = 16'h00CC;
  38708. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .modeMux = 1'b0;
  38709. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .FeedbackMux = 1'b0;
  38710. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .ShiftMux = 1'b0;
  38711. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .BypassEn = 1'b1;
  38712. defparam \macro_inst|u_uart[1]|u_regs|framing_error_ie[5] .CarryEnb = 1'b1;
  38713. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[0] (
  38714. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ),
  38715. .B(\macro_inst|u_uart[1]|u_regs|Selector12~8_combout ),
  38716. .C(\rv32.mem_ahb_hwdata[0] ),
  38717. .D(\macro_inst|u_uart[1]|u_regs|Selector12~5_combout ),
  38718. .Cin(),
  38719. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [0]),
  38720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  38721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  38722. .SyncReset(SyncReset_X59_Y5_GND),
  38723. .ShiftData(),
  38724. .SyncLoad(SyncLoad_X59_Y5_VCC),
  38725. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~9_combout ),
  38726. .Cout(),
  38727. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [0]));
  38728. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .coord_x = 16;
  38729. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .coord_y = 6;
  38730. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .coord_z = 1;
  38731. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .mask = 16'hEC64;
  38732. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .modeMux = 1'b0;
  38733. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .FeedbackMux = 1'b1;
  38734. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .ShiftMux = 1'b0;
  38735. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .BypassEn = 1'b1;
  38736. defparam \macro_inst|u_uart[1]|u_regs|ibrd[0] .CarryEnb = 1'b1;
  38737. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[10] (
  38738. .A(),
  38739. .B(),
  38740. .C(vcc),
  38741. .D(\rv32.mem_ahb_hwdata[10] ),
  38742. .Cin(),
  38743. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [10]),
  38744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38746. .SyncReset(),
  38747. .ShiftData(),
  38748. .SyncLoad(),
  38749. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[10]__feeder__LutOut ),
  38750. .Cout(),
  38751. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [10]));
  38752. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .coord_x = 15;
  38753. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .coord_y = 8;
  38754. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .coord_z = 6;
  38755. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .mask = 16'hFF00;
  38756. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .modeMux = 1'b1;
  38757. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .FeedbackMux = 1'b0;
  38758. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .ShiftMux = 1'b0;
  38759. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .BypassEn = 1'b0;
  38760. defparam \macro_inst|u_uart[1]|u_regs|ibrd[10] .CarryEnb = 1'b1;
  38761. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[11] (
  38762. .A(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  38763. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  38764. .C(\rv32.mem_ahb_hwdata[11] ),
  38765. .D(\macro_inst|u_uart[1]|u_regs|Selector1~1_combout ),
  38766. .Cin(),
  38767. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [11]),
  38768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38770. .SyncReset(SyncReset_X61_Y5_GND),
  38771. .ShiftData(),
  38772. .SyncLoad(SyncLoad_X61_Y5_VCC),
  38773. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector1~2_combout ),
  38774. .Cout(),
  38775. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [11]));
  38776. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .coord_x = 15;
  38777. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .coord_y = 8;
  38778. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .coord_z = 0;
  38779. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .mask = 16'hDC98;
  38780. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .modeMux = 1'b0;
  38781. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .FeedbackMux = 1'b1;
  38782. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .ShiftMux = 1'b0;
  38783. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .BypassEn = 1'b1;
  38784. defparam \macro_inst|u_uart[1]|u_regs|ibrd[11] .CarryEnb = 1'b1;
  38785. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[12] (
  38786. .A(\macro_inst|u_ahb2apb|paddr [4]),
  38787. .B(\macro_inst|u_ahb2apb|paddr [5]),
  38788. .C(\rv32.mem_ahb_hwdata[12] ),
  38789. .D(\macro_inst|u_ahb2apb|paddr [3]),
  38790. .Cin(),
  38791. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [12]),
  38792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38794. .SyncReset(SyncReset_X61_Y5_GND),
  38795. .ShiftData(),
  38796. .SyncLoad(SyncLoad_X61_Y5_VCC),
  38797. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector6~1_combout ),
  38798. .Cout(),
  38799. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [12]));
  38800. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .coord_x = 15;
  38801. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .coord_y = 8;
  38802. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .coord_z = 12;
  38803. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .mask = 16'h2211;
  38804. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .modeMux = 1'b0;
  38805. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .FeedbackMux = 1'b0;
  38806. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .ShiftMux = 1'b0;
  38807. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .BypassEn = 1'b1;
  38808. defparam \macro_inst|u_uart[1]|u_regs|ibrd[12] .CarryEnb = 1'b1;
  38809. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[13] (
  38810. .A(\macro_inst|u_uart[1]|u_regs|rx_reg [7]),
  38811. .B(vcc),
  38812. .C(\rv32.mem_ahb_hwdata[13] ),
  38813. .D(\macro_inst|u_ahb2apb|paddr [2]),
  38814. .Cin(),
  38815. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [13]),
  38816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  38817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  38818. .SyncReset(SyncReset_X59_Y5_GND),
  38819. .ShiftData(),
  38820. .SyncLoad(SyncLoad_X59_Y5_VCC),
  38821. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~2_combout ),
  38822. .Cout(),
  38823. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [13]));
  38824. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .coord_x = 16;
  38825. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .coord_y = 6;
  38826. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .coord_z = 2;
  38827. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .mask = 16'h00AA;
  38828. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .modeMux = 1'b0;
  38829. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .FeedbackMux = 1'b0;
  38830. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .ShiftMux = 1'b0;
  38831. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .BypassEn = 1'b1;
  38832. defparam \macro_inst|u_uart[1]|u_regs|ibrd[13] .CarryEnb = 1'b1;
  38833. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[14] (
  38834. .A(\macro_inst|u_ahb2apb|paddr [3]),
  38835. .B(\macro_inst|u_ahb2apb|paddr [5]),
  38836. .C(\rv32.mem_ahb_hwdata[14] ),
  38837. .D(\macro_inst|u_uart[0]|u_regs|Selector11~9_combout ),
  38838. .Cin(),
  38839. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [14]),
  38840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ),
  38841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
  38842. .SyncReset(SyncReset_X59_Y4_GND),
  38843. .ShiftData(),
  38844. .SyncLoad(SyncLoad_X59_Y4_VCC),
  38845. .LutOut(\macro_inst|u_uart[0]|u_regs|Selector11~13_combout ),
  38846. .Cout(),
  38847. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [14]));
  38848. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .coord_x = 16;
  38849. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .coord_y = 5;
  38850. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .coord_z = 1;
  38851. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .mask = 16'hDD00;
  38852. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .modeMux = 1'b0;
  38853. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .FeedbackMux = 1'b0;
  38854. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .ShiftMux = 1'b0;
  38855. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .BypassEn = 1'b1;
  38856. defparam \macro_inst|u_uart[1]|u_regs|ibrd[14] .CarryEnb = 1'b1;
  38857. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[15] (
  38858. .A(\macro_inst|u_ahb2apb|paddr [4]),
  38859. .B(vcc),
  38860. .C(\rv32.mem_ahb_hwdata[15] ),
  38861. .D(\macro_inst|u_ahb2apb|paddr [3]),
  38862. .Cin(),
  38863. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [15]),
  38864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38866. .SyncReset(SyncReset_X61_Y5_GND),
  38867. .ShiftData(),
  38868. .SyncLoad(SyncLoad_X61_Y5_VCC),
  38869. .LutOut(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~4_combout ),
  38870. .Cout(),
  38871. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [15]));
  38872. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .coord_x = 15;
  38873. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .coord_y = 8;
  38874. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .coord_z = 3;
  38875. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .mask = 16'h0055;
  38876. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .modeMux = 1'b0;
  38877. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .FeedbackMux = 1'b0;
  38878. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .ShiftMux = 1'b0;
  38879. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .BypassEn = 1'b1;
  38880. defparam \macro_inst|u_uart[1]|u_regs|ibrd[15] .CarryEnb = 1'b1;
  38881. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[1] (
  38882. .A(),
  38883. .B(),
  38884. .C(vcc),
  38885. .D(\rv32.mem_ahb_hwdata[1] ),
  38886. .Cin(),
  38887. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [1]),
  38888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X58_Y2_SIG_SIG ),
  38889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y2_SIG ),
  38890. .SyncReset(),
  38891. .ShiftData(),
  38892. .SyncLoad(),
  38893. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[1]__feeder__LutOut ),
  38894. .Cout(),
  38895. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [1]));
  38896. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .coord_x = 15;
  38897. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .coord_y = 4;
  38898. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .coord_z = 7;
  38899. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .mask = 16'hFF00;
  38900. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .modeMux = 1'b1;
  38901. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .FeedbackMux = 1'b0;
  38902. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .ShiftMux = 1'b0;
  38903. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .BypassEn = 1'b0;
  38904. defparam \macro_inst|u_uart[1]|u_regs|ibrd[1] .CarryEnb = 1'b1;
  38905. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[2] (
  38906. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  38907. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  38908. .C(\rv32.mem_ahb_hwdata[2] ),
  38909. .D(\macro_inst|u_uart[1]|u_regs|Selector10~3_combout ),
  38910. .Cin(),
  38911. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [2]),
  38912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  38913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  38914. .SyncReset(SyncReset_X59_Y5_GND),
  38915. .ShiftData(),
  38916. .SyncLoad(SyncLoad_X59_Y5_VCC),
  38917. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector10~4_combout ),
  38918. .Cout(),
  38919. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [2]));
  38920. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .coord_x = 16;
  38921. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .coord_y = 6;
  38922. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .coord_z = 14;
  38923. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .mask = 16'hD591;
  38924. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .modeMux = 1'b0;
  38925. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .FeedbackMux = 1'b1;
  38926. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .ShiftMux = 1'b0;
  38927. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .BypassEn = 1'b1;
  38928. defparam \macro_inst|u_uart[1]|u_regs|ibrd[2] .CarryEnb = 1'b1;
  38929. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[3] (
  38930. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~14_combout ),
  38931. .B(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~13_combout ),
  38932. .C(\rv32.mem_ahb_hwdata[3] ),
  38933. .D(\macro_inst|u_uart[1]|u_regs|Selector9~3_combout ),
  38934. .Cin(),
  38935. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [3]),
  38936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y4_SIG_SIG ),
  38937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y4_SIG ),
  38938. .SyncReset(SyncReset_X59_Y4_GND),
  38939. .ShiftData(),
  38940. .SyncLoad(SyncLoad_X59_Y4_VCC),
  38941. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector9~4_combout ),
  38942. .Cout(),
  38943. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [3]));
  38944. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .coord_x = 16;
  38945. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .coord_y = 5;
  38946. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .coord_z = 3;
  38947. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .mask = 16'hD591;
  38948. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .modeMux = 1'b0;
  38949. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .FeedbackMux = 1'b1;
  38950. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .ShiftMux = 1'b0;
  38951. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .BypassEn = 1'b1;
  38952. defparam \macro_inst|u_uart[1]|u_regs|ibrd[3] .CarryEnb = 1'b1;
  38953. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[4] (
  38954. .A(),
  38955. .B(),
  38956. .C(vcc),
  38957. .D(\rv32.mem_ahb_hwdata[4] ),
  38958. .Cin(),
  38959. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [4]),
  38960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38962. .SyncReset(),
  38963. .ShiftData(),
  38964. .SyncLoad(),
  38965. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[4]__feeder__LutOut ),
  38966. .Cout(),
  38967. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [4]));
  38968. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .coord_x = 15;
  38969. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .coord_y = 8;
  38970. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .coord_z = 10;
  38971. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .mask = 16'hFF00;
  38972. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .modeMux = 1'b1;
  38973. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .FeedbackMux = 1'b0;
  38974. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .ShiftMux = 1'b0;
  38975. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .BypassEn = 1'b0;
  38976. defparam \macro_inst|u_uart[1]|u_regs|ibrd[4] .CarryEnb = 1'b1;
  38977. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[5] (
  38978. .A(),
  38979. .B(),
  38980. .C(vcc),
  38981. .D(\rv32.mem_ahb_hwdata[5] ),
  38982. .Cin(),
  38983. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [5]),
  38984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  38985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  38986. .SyncReset(),
  38987. .ShiftData(),
  38988. .SyncLoad(),
  38989. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[5]__feeder__LutOut ),
  38990. .Cout(),
  38991. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [5]));
  38992. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .coord_x = 15;
  38993. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .coord_y = 8;
  38994. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .coord_z = 4;
  38995. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .mask = 16'hFF00;
  38996. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .modeMux = 1'b1;
  38997. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .FeedbackMux = 1'b0;
  38998. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .ShiftMux = 1'b0;
  38999. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .BypassEn = 1'b0;
  39000. defparam \macro_inst|u_uart[1]|u_regs|ibrd[5] .CarryEnb = 1'b1;
  39001. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[6] (
  39002. .A(),
  39003. .B(),
  39004. .C(vcc),
  39005. .D(\rv32.mem_ahb_hwdata[6] ),
  39006. .Cin(),
  39007. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [6]),
  39008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  39009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  39010. .SyncReset(),
  39011. .ShiftData(),
  39012. .SyncLoad(),
  39013. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[6]__feeder__LutOut ),
  39014. .Cout(),
  39015. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [6]));
  39016. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .coord_x = 15;
  39017. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .coord_y = 8;
  39018. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .coord_z = 8;
  39019. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .mask = 16'hFF00;
  39020. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .modeMux = 1'b1;
  39021. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .FeedbackMux = 1'b0;
  39022. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .ShiftMux = 1'b0;
  39023. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .BypassEn = 1'b0;
  39024. defparam \macro_inst|u_uart[1]|u_regs|ibrd[6] .CarryEnb = 1'b1;
  39025. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[7] (
  39026. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[0]~3_combout ),
  39027. .B(\macro_inst|u_uart[1]|u_regs|Selector5~2_combout ),
  39028. .C(\rv32.mem_ahb_hwdata[7] ),
  39029. .D(\macro_inst|u_uart[1]|u_regs|Selector5~9_combout ),
  39030. .Cin(),
  39031. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [7]),
  39032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X59_Y5_SIG_SIG ),
  39033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y5_SIG ),
  39034. .SyncReset(SyncReset_X59_Y5_GND),
  39035. .ShiftData(),
  39036. .SyncLoad(SyncLoad_X59_Y5_VCC),
  39037. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~10_combout ),
  39038. .Cout(),
  39039. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [7]));
  39040. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .coord_x = 16;
  39041. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .coord_y = 6;
  39042. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .coord_z = 3;
  39043. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .mask = 16'hDDA0;
  39044. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .modeMux = 1'b0;
  39045. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .FeedbackMux = 1'b1;
  39046. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .ShiftMux = 1'b0;
  39047. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .BypassEn = 1'b1;
  39048. defparam \macro_inst|u_uart[1]|u_regs|ibrd[7] .CarryEnb = 1'b1;
  39049. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[8] (
  39050. .A(\macro_inst|u_uart[1]|u_regs|Selector4~1_combout ),
  39051. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  39052. .C(\rv32.mem_ahb_hwdata[8] ),
  39053. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  39054. .Cin(),
  39055. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [8]),
  39056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  39057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  39058. .SyncReset(SyncReset_X61_Y5_GND),
  39059. .ShiftData(),
  39060. .SyncLoad(SyncLoad_X61_Y5_VCC),
  39061. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector4~2_combout ),
  39062. .Cout(),
  39063. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [8]));
  39064. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .coord_x = 15;
  39065. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .coord_y = 8;
  39066. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .coord_z = 11;
  39067. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .mask = 16'hCCB8;
  39068. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .modeMux = 1'b0;
  39069. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .FeedbackMux = 1'b1;
  39070. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .ShiftMux = 1'b0;
  39071. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .BypassEn = 1'b1;
  39072. defparam \macro_inst|u_uart[1]|u_regs|ibrd[8] .CarryEnb = 1'b1;
  39073. alta_slice \macro_inst|u_uart[1]|u_regs|ibrd[9] (
  39074. .A(\macro_inst|u_ahb2apb|paddr [2]),
  39075. .B(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  39076. .C(\rv32.mem_ahb_hwdata[9] ),
  39077. .D(\macro_inst|u_ahb2apb|paddr [5]),
  39078. .Cin(),
  39079. .Qin(\macro_inst|u_uart[1]|u_regs|ibrd [9]),
  39080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always1~0_combout_X61_Y5_SIG_SIG ),
  39081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y5_SIG ),
  39082. .SyncReset(SyncReset_X61_Y5_GND),
  39083. .ShiftData(),
  39084. .SyncLoad(SyncLoad_X61_Y5_VCC),
  39085. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector5~8_combout ),
  39086. .Cout(),
  39087. .Q(\macro_inst|u_uart[1]|u_regs|ibrd [9]));
  39088. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .coord_x = 15;
  39089. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .coord_y = 8;
  39090. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .coord_z = 14;
  39091. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .mask = 16'h8800;
  39092. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .modeMux = 1'b0;
  39093. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .FeedbackMux = 1'b0;
  39094. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .ShiftMux = 1'b0;
  39095. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .BypassEn = 1'b1;
  39096. defparam \macro_inst|u_uart[1]|u_regs|ibrd[9] .CarryEnb = 1'b1;
  39097. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[0] (
  39098. .A(\macro_inst|u_uart[1]|u_regs|interrupts~2_combout ),
  39099. .B(\macro_inst|u_uart[1]|u_regs|interrupts~1_combout ),
  39100. .C(\macro_inst|u_uart[1]|u_regs|interrupts~0_combout ),
  39101. .D(\macro_inst|u_uart[1]|u_regs|interrupts~3_combout ),
  39102. .Cin(),
  39103. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [0]),
  39104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ),
  39105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  39106. .SyncReset(),
  39107. .ShiftData(),
  39108. .SyncLoad(),
  39109. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~4_combout ),
  39110. .Cout(),
  39111. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [0]));
  39112. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .coord_x = 17;
  39113. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .coord_y = 5;
  39114. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .coord_z = 8;
  39115. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .mask = 16'hFFFE;
  39116. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .modeMux = 1'b0;
  39117. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .FeedbackMux = 1'b0;
  39118. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .ShiftMux = 1'b0;
  39119. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .BypassEn = 1'b0;
  39120. defparam \macro_inst|u_uart[1]|u_regs|interrupts[0] .CarryEnb = 1'b1;
  39121. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[1] (
  39122. .A(\macro_inst|u_uart[1]|u_regs|interrupts~8_combout ),
  39123. .B(\macro_inst|u_uart[1]|u_regs|interrupts~5_combout ),
  39124. .C(\macro_inst|u_uart[1]|u_regs|interrupts~7_combout ),
  39125. .D(\macro_inst|u_uart[1]|u_regs|interrupts~6_combout ),
  39126. .Cin(),
  39127. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [1]),
  39128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  39129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  39130. .SyncReset(),
  39131. .ShiftData(),
  39132. .SyncLoad(),
  39133. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~9_combout ),
  39134. .Cout(),
  39135. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [1]));
  39136. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .coord_x = 18;
  39137. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .coord_y = 4;
  39138. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .coord_z = 10;
  39139. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .mask = 16'hFFFE;
  39140. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .modeMux = 1'b0;
  39141. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .FeedbackMux = 1'b0;
  39142. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .ShiftMux = 1'b0;
  39143. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .BypassEn = 1'b0;
  39144. defparam \macro_inst|u_uart[1]|u_regs|interrupts[1] .CarryEnb = 1'b1;
  39145. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[2] (
  39146. .A(\macro_inst|u_uart[1]|u_regs|interrupts~10_combout ),
  39147. .B(\macro_inst|u_uart[1]|u_regs|interrupts~12_combout ),
  39148. .C(\macro_inst|u_uart[1]|u_regs|interrupts~13_combout ),
  39149. .D(\macro_inst|u_uart[1]|u_regs|interrupts~11_combout ),
  39150. .Cin(),
  39151. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [2]),
  39152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ),
  39153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  39154. .SyncReset(),
  39155. .ShiftData(),
  39156. .SyncLoad(),
  39157. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~14_combout ),
  39158. .Cout(),
  39159. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [2]));
  39160. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .coord_x = 17;
  39161. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .coord_y = 5;
  39162. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .coord_z = 2;
  39163. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .mask = 16'hFFFE;
  39164. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .modeMux = 1'b0;
  39165. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .FeedbackMux = 1'b0;
  39166. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .ShiftMux = 1'b0;
  39167. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .BypassEn = 1'b0;
  39168. defparam \macro_inst|u_uart[1]|u_regs|interrupts[2] .CarryEnb = 1'b1;
  39169. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[3] (
  39170. .A(\macro_inst|u_uart[1]|u_regs|interrupts~17_combout ),
  39171. .B(\macro_inst|u_uart[1]|u_regs|interrupts~16_combout ),
  39172. .C(\macro_inst|u_uart[1]|u_regs|interrupts~15_combout ),
  39173. .D(\macro_inst|u_uart[1]|u_regs|interrupts~18_combout ),
  39174. .Cin(),
  39175. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [3]),
  39176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  39177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  39178. .SyncReset(),
  39179. .ShiftData(),
  39180. .SyncLoad(),
  39181. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~19_combout ),
  39182. .Cout(),
  39183. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [3]));
  39184. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .coord_x = 18;
  39185. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .coord_y = 9;
  39186. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .coord_z = 6;
  39187. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .mask = 16'hFFFE;
  39188. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .modeMux = 1'b0;
  39189. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .FeedbackMux = 1'b0;
  39190. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .ShiftMux = 1'b0;
  39191. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .BypassEn = 1'b0;
  39192. defparam \macro_inst|u_uart[1]|u_regs|interrupts[3] .CarryEnb = 1'b1;
  39193. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[4] (
  39194. .A(\macro_inst|u_uart[1]|u_regs|interrupts~21_combout ),
  39195. .B(\macro_inst|u_uart[1]|u_regs|interrupts~22_combout ),
  39196. .C(\macro_inst|u_uart[1]|u_regs|interrupts~20_combout ),
  39197. .D(\macro_inst|u_uart[1]|u_regs|interrupts~23_combout ),
  39198. .Cin(),
  39199. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [4]),
  39200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  39201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  39202. .SyncReset(),
  39203. .ShiftData(),
  39204. .SyncLoad(),
  39205. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~24_combout ),
  39206. .Cout(),
  39207. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [4]));
  39208. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .coord_x = 17;
  39209. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .coord_y = 8;
  39210. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .coord_z = 11;
  39211. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .mask = 16'hFFFE;
  39212. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .modeMux = 1'b0;
  39213. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .FeedbackMux = 1'b0;
  39214. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .ShiftMux = 1'b0;
  39215. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .BypassEn = 1'b0;
  39216. defparam \macro_inst|u_uart[1]|u_regs|interrupts[4] .CarryEnb = 1'b1;
  39217. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts[5] (
  39218. .A(\macro_inst|u_uart[1]|u_regs|interrupts~26_combout ),
  39219. .B(\macro_inst|u_uart[1]|u_regs|interrupts~25_combout ),
  39220. .C(\macro_inst|u_uart[1]|u_regs|interrupts~27_combout ),
  39221. .D(\macro_inst|u_uart[1]|u_regs|interrupts~28_combout ),
  39222. .Cin(),
  39223. .Qin(\macro_inst|u_uart[1]|u_regs|interrupts [5]),
  39224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  39225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  39226. .SyncReset(),
  39227. .ShiftData(),
  39228. .SyncLoad(),
  39229. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~29_combout ),
  39230. .Cout(),
  39231. .Q(\macro_inst|u_uart[1]|u_regs|interrupts [5]));
  39232. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .coord_x = 17;
  39233. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .coord_y = 9;
  39234. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .coord_z = 15;
  39235. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .mask = 16'hFFFE;
  39236. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .modeMux = 1'b0;
  39237. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .FeedbackMux = 1'b0;
  39238. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .ShiftMux = 1'b0;
  39239. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .BypassEn = 1'b0;
  39240. defparam \macro_inst|u_uart[1]|u_regs|interrupts[5] .CarryEnb = 1'b1;
  39241. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~0 (
  39242. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  39243. .B(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [0]),
  39244. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  39245. .D(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [0]),
  39246. .Cin(),
  39247. .Qin(),
  39248. .Clk(),
  39249. .AsyncReset(),
  39250. .SyncReset(),
  39251. .ShiftData(),
  39252. .SyncLoad(),
  39253. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~0_combout ),
  39254. .Cout(),
  39255. .Q());
  39256. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .coord_x = 17;
  39257. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .coord_y = 5;
  39258. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .coord_z = 14;
  39259. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .mask = 16'hF444;
  39260. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .modeMux = 1'b0;
  39261. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .FeedbackMux = 1'b0;
  39262. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .ShiftMux = 1'b0;
  39263. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .BypassEn = 1'b0;
  39264. defparam \macro_inst|u_uart[1]|u_regs|interrupts~0 .CarryEnb = 1'b1;
  39265. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~13 (
  39266. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_complete~q ),
  39267. .B(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [2]),
  39268. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_idle~q ),
  39269. .D(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [2]),
  39270. .Cin(),
  39271. .Qin(),
  39272. .Clk(),
  39273. .AsyncReset(),
  39274. .SyncReset(),
  39275. .ShiftData(),
  39276. .SyncLoad(),
  39277. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~13_combout ),
  39278. .Cout(),
  39279. .Q());
  39280. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .coord_x = 18;
  39281. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .coord_y = 4;
  39282. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .coord_z = 2;
  39283. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .mask = 16'hEAC0;
  39284. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .modeMux = 1'b0;
  39285. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .FeedbackMux = 1'b0;
  39286. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .ShiftMux = 1'b0;
  39287. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .BypassEn = 1'b0;
  39288. defparam \macro_inst|u_uart[1]|u_regs|interrupts~13 .CarryEnb = 1'b1;
  39289. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~17 (
  39290. .A(\macro_inst|u_uart[1]|u_rx[3]|overrun_error~q ),
  39291. .B(\macro_inst|u_uart[1]|u_regs|break_error_ie [3]),
  39292. .C(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [3]),
  39293. .D(\macro_inst|u_uart[1]|u_rx[3]|break_error~q ),
  39294. .Cin(),
  39295. .Qin(),
  39296. .Clk(),
  39297. .AsyncReset(),
  39298. .SyncReset(),
  39299. .ShiftData(),
  39300. .SyncLoad(),
  39301. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~17_combout ),
  39302. .Cout(),
  39303. .Q());
  39304. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .coord_x = 18;
  39305. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .coord_y = 9;
  39306. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .coord_z = 10;
  39307. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .mask = 16'hECA0;
  39308. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .modeMux = 1'b0;
  39309. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .FeedbackMux = 1'b0;
  39310. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .ShiftMux = 1'b0;
  39311. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .BypassEn = 1'b0;
  39312. defparam \macro_inst|u_uart[1]|u_regs|interrupts~17 .CarryEnb = 1'b1;
  39313. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~18 (
  39314. .A(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [3]),
  39315. .B(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [3]),
  39316. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_complete~q ),
  39317. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_idle~q ),
  39318. .Cin(),
  39319. .Qin(),
  39320. .Clk(),
  39321. .AsyncReset(),
  39322. .SyncReset(),
  39323. .ShiftData(),
  39324. .SyncLoad(),
  39325. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~18_combout ),
  39326. .Cout(),
  39327. .Q());
  39328. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .coord_x = 18;
  39329. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .coord_y = 7;
  39330. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .coord_z = 6;
  39331. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .mask = 16'hEAC0;
  39332. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .modeMux = 1'b0;
  39333. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .FeedbackMux = 1'b0;
  39334. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .ShiftMux = 1'b0;
  39335. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .BypassEn = 1'b0;
  39336. defparam \macro_inst|u_uart[1]|u_regs|interrupts~18 .CarryEnb = 1'b1;
  39337. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~2 (
  39338. .A(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [0]),
  39339. .B(\macro_inst|u_uart[1]|u_rx[0]|overrun_error~q ),
  39340. .C(\macro_inst|u_uart[1]|u_rx[0]|break_error~q ),
  39341. .D(\macro_inst|u_uart[1]|u_regs|break_error_ie [0]),
  39342. .Cin(),
  39343. .Qin(),
  39344. .Clk(),
  39345. .AsyncReset(),
  39346. .SyncReset(),
  39347. .ShiftData(),
  39348. .SyncLoad(),
  39349. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~2_combout ),
  39350. .Cout(),
  39351. .Q());
  39352. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .coord_x = 17;
  39353. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .coord_y = 7;
  39354. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .coord_z = 8;
  39355. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .mask = 16'hF888;
  39356. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .modeMux = 1'b0;
  39357. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .FeedbackMux = 1'b0;
  39358. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .ShiftMux = 1'b0;
  39359. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .BypassEn = 1'b0;
  39360. defparam \macro_inst|u_uart[1]|u_regs|interrupts~2 .CarryEnb = 1'b1;
  39361. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~20 (
  39362. .A(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [4]),
  39363. .B(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [4]),
  39364. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  39365. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  39366. .Cin(),
  39367. .Qin(),
  39368. .Clk(),
  39369. .AsyncReset(),
  39370. .SyncReset(),
  39371. .ShiftData(),
  39372. .SyncLoad(),
  39373. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~20_combout ),
  39374. .Cout(),
  39375. .Q());
  39376. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .coord_x = 17;
  39377. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .coord_y = 8;
  39378. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .coord_z = 6;
  39379. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .mask = 16'hC0EA;
  39380. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .modeMux = 1'b0;
  39381. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .FeedbackMux = 1'b0;
  39382. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .ShiftMux = 1'b0;
  39383. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .BypassEn = 1'b0;
  39384. defparam \macro_inst|u_uart[1]|u_regs|interrupts~20 .CarryEnb = 1'b1;
  39385. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~26 (
  39386. .A(\macro_inst|u_uart[1]|u_regs|framing_error_ie [5]),
  39387. .B(\macro_inst|u_uart[1]|u_regs|parity_error_ie [5]),
  39388. .C(\macro_inst|u_uart[1]|u_rx[5]|framing_error~q ),
  39389. .D(\macro_inst|u_uart[1]|u_rx[5]|parity_error~q ),
  39390. .Cin(),
  39391. .Qin(),
  39392. .Clk(),
  39393. .AsyncReset(),
  39394. .SyncReset(),
  39395. .ShiftData(),
  39396. .SyncLoad(),
  39397. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~26_combout ),
  39398. .Cout(),
  39399. .Q());
  39400. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .coord_x = 17;
  39401. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .coord_y = 9;
  39402. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .coord_z = 2;
  39403. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .mask = 16'hECA0;
  39404. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .modeMux = 1'b0;
  39405. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .FeedbackMux = 1'b0;
  39406. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .ShiftMux = 1'b0;
  39407. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .BypassEn = 1'b0;
  39408. defparam \macro_inst|u_uart[1]|u_regs|interrupts~26 .CarryEnb = 1'b1;
  39409. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~27 (
  39410. .A(\macro_inst|u_uart[1]|u_rx[5]|overrun_error~q ),
  39411. .B(\macro_inst|u_uart[1]|u_rx[5]|break_error~q ),
  39412. .C(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [5]),
  39413. .D(\macro_inst|u_uart[1]|u_regs|break_error_ie [5]),
  39414. .Cin(),
  39415. .Qin(),
  39416. .Clk(),
  39417. .AsyncReset(),
  39418. .SyncReset(),
  39419. .ShiftData(),
  39420. .SyncLoad(),
  39421. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~27_combout ),
  39422. .Cout(),
  39423. .Q());
  39424. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .coord_x = 16;
  39425. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .coord_y = 8;
  39426. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .coord_z = 14;
  39427. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .mask = 16'hECA0;
  39428. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .modeMux = 1'b0;
  39429. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .FeedbackMux = 1'b0;
  39430. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .ShiftMux = 1'b0;
  39431. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .BypassEn = 1'b0;
  39432. defparam \macro_inst|u_uart[1]|u_regs|interrupts~27 .CarryEnb = 1'b1;
  39433. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~28 (
  39434. .A(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [5]),
  39435. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_complete~q ),
  39436. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_idle~q ),
  39437. .D(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [5]),
  39438. .Cin(),
  39439. .Qin(),
  39440. .Clk(),
  39441. .AsyncReset(),
  39442. .SyncReset(),
  39443. .ShiftData(),
  39444. .SyncLoad(),
  39445. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~28_combout ),
  39446. .Cout(),
  39447. .Q());
  39448. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .coord_x = 18;
  39449. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .coord_y = 7;
  39450. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .coord_z = 8;
  39451. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .mask = 16'hECA0;
  39452. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .modeMux = 1'b0;
  39453. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .FeedbackMux = 1'b0;
  39454. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .ShiftMux = 1'b0;
  39455. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .BypassEn = 1'b0;
  39456. defparam \macro_inst|u_uart[1]|u_regs|interrupts~28 .CarryEnb = 1'b1;
  39457. alta_slice \macro_inst|u_uart[1]|u_regs|interrupts~5 (
  39458. .A(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [1]),
  39459. .B(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [1]),
  39460. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  39461. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  39462. .Cin(),
  39463. .Qin(),
  39464. .Clk(),
  39465. .AsyncReset(),
  39466. .SyncReset(),
  39467. .ShiftData(),
  39468. .SyncLoad(),
  39469. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~5_combout ),
  39470. .Cout(),
  39471. .Q());
  39472. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .coord_x = 18;
  39473. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .coord_y = 4;
  39474. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .coord_z = 11;
  39475. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .mask = 16'hA0EC;
  39476. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .modeMux = 1'b0;
  39477. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .FeedbackMux = 1'b0;
  39478. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .ShiftMux = 1'b0;
  39479. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .BypassEn = 1'b0;
  39480. defparam \macro_inst|u_uart[1]|u_regs|interrupts~5 .CarryEnb = 1'b1;
  39481. alta_slice \macro_inst|u_uart[1]|u_regs|lcr_eps (
  39482. .A(vcc),
  39483. .B(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  39484. .C(\rv32.mem_ahb_hwdata[2] ),
  39485. .D(\macro_inst|u_uart[0]|u_regs|always5~0_combout ),
  39486. .Cin(),
  39487. .Qin(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  39488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ),
  39489. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  39490. .SyncReset(SyncReset_X62_Y6_GND),
  39491. .ShiftData(),
  39492. .SyncLoad(SyncLoad_X62_Y6_VCC),
  39493. .LutOut(\macro_inst|u_uart[1]|u_regs|always5~0_combout ),
  39494. .Cout(),
  39495. .Q(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ));
  39496. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .coord_x = 15;
  39497. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .coord_y = 11;
  39498. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .coord_z = 3;
  39499. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .mask = 16'hCC00;
  39500. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .modeMux = 1'b0;
  39501. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .FeedbackMux = 1'b0;
  39502. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .ShiftMux = 1'b0;
  39503. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .BypassEn = 1'b1;
  39504. defparam \macro_inst|u_uart[1]|u_regs|lcr_eps .CarryEnb = 1'b1;
  39505. alta_slice \macro_inst|u_uart[1]|u_regs|lcr_pen (
  39506. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ),
  39507. .B(vcc),
  39508. .C(\rv32.mem_ahb_hwdata[1] ),
  39509. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  39510. .Cin(),
  39511. .Qin(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  39512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ),
  39513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  39514. .SyncReset(SyncReset_X62_Y6_GND),
  39515. .ShiftData(),
  39516. .SyncLoad(SyncLoad_X62_Y6_VCC),
  39517. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector3~0_combout ),
  39518. .Cout(),
  39519. .Q(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ));
  39520. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .coord_x = 15;
  39521. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .coord_y = 11;
  39522. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .coord_z = 12;
  39523. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .mask = 16'h00AA;
  39524. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .modeMux = 1'b0;
  39525. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .FeedbackMux = 1'b0;
  39526. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .ShiftMux = 1'b0;
  39527. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .BypassEn = 1'b1;
  39528. defparam \macro_inst|u_uart[1]|u_regs|lcr_pen .CarryEnb = 1'b1;
  39529. alta_slice \macro_inst|u_uart[1]|u_regs|lcr_sps (
  39530. .A(),
  39531. .B(),
  39532. .C(vcc),
  39533. .D(\rv32.mem_ahb_hwdata[7] ),
  39534. .Cin(),
  39535. .Qin(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  39536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ),
  39537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  39538. .SyncReset(),
  39539. .ShiftData(),
  39540. .SyncLoad(),
  39541. .LutOut(\macro_inst|u_uart[1]|u_regs|lcr_sps__feeder__LutOut ),
  39542. .Cout(),
  39543. .Q(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ));
  39544. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .coord_x = 15;
  39545. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .coord_y = 11;
  39546. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .coord_z = 2;
  39547. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .mask = 16'hFF00;
  39548. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .modeMux = 1'b1;
  39549. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .FeedbackMux = 1'b0;
  39550. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .ShiftMux = 1'b0;
  39551. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .BypassEn = 1'b0;
  39552. defparam \macro_inst|u_uart[1]|u_regs|lcr_sps .CarryEnb = 1'b1;
  39553. alta_slice \macro_inst|u_uart[1]|u_regs|lcr_stp2 (
  39554. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ),
  39555. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  39556. .C(\rv32.mem_ahb_hwdata[3] ),
  39557. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  39558. .Cin(),
  39559. .Qin(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  39560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|always5~0_combout_X62_Y6_SIG_SIG ),
  39561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  39562. .SyncReset(SyncReset_X62_Y6_GND),
  39563. .ShiftData(),
  39564. .SyncLoad(SyncLoad_X62_Y6_VCC),
  39565. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ),
  39566. .Cout(),
  39567. .Q(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ));
  39568. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .coord_x = 15;
  39569. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .coord_y = 11;
  39570. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .coord_z = 5;
  39571. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .mask = 16'h4400;
  39572. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .modeMux = 1'b0;
  39573. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .FeedbackMux = 1'b0;
  39574. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .ShiftMux = 1'b0;
  39575. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .BypassEn = 1'b1;
  39576. defparam \macro_inst|u_uart[1]|u_regs|lcr_stp2 .CarryEnb = 1'b1;
  39577. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] (
  39578. .A(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [1]),
  39579. .B(\macro_inst|u_ahb2apb|paddr [8]),
  39580. .C(\rv32.mem_ahb_hwdata[10] ),
  39581. .D(\macro_inst|u_ahb2apb|paddr [9]),
  39582. .Cin(),
  39583. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [0]),
  39584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  39585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  39586. .SyncReset(SyncReset_X59_Y7_GND),
  39587. .ShiftData(),
  39588. .SyncLoad(SyncLoad_X59_Y7_VCC),
  39589. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector2~0_combout ),
  39590. .Cout(),
  39591. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [0]));
  39592. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .coord_x = 17;
  39593. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .coord_y = 7;
  39594. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .coord_z = 14;
  39595. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .mask = 16'hCCB8;
  39596. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .modeMux = 1'b0;
  39597. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .FeedbackMux = 1'b1;
  39598. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .ShiftMux = 1'b0;
  39599. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .BypassEn = 1'b1;
  39600. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[0] .CarryEnb = 1'b1;
  39601. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] (
  39602. .A(\macro_inst|u_uart[1]|u_rx[1]|break_error~q ),
  39603. .B(\macro_inst|u_uart[1]|u_regs|break_error_ie [1]),
  39604. .C(\rv32.mem_ahb_hwdata[10] ),
  39605. .D(\macro_inst|u_uart[1]|u_rx[1]|overrun_error~q ),
  39606. .Cin(),
  39607. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [1]),
  39608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ),
  39609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  39610. .SyncReset(SyncReset_X59_Y7_GND),
  39611. .ShiftData(),
  39612. .SyncLoad(SyncLoad_X59_Y7_VCC),
  39613. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~7_combout ),
  39614. .Cout(),
  39615. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [1]));
  39616. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .coord_x = 17;
  39617. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .coord_y = 7;
  39618. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .coord_z = 15;
  39619. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .mask = 16'hF888;
  39620. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .modeMux = 1'b0;
  39621. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .FeedbackMux = 1'b1;
  39622. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .ShiftMux = 1'b0;
  39623. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .BypassEn = 1'b1;
  39624. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[1] .CarryEnb = 1'b1;
  39625. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] (
  39626. .A(\macro_inst|u_uart[1]|u_rx[2]|overrun_error~q ),
  39627. .B(\macro_inst|u_uart[1]|u_regs|break_error_ie [2]),
  39628. .C(\rv32.mem_ahb_hwdata[10] ),
  39629. .D(\macro_inst|u_uart[1]|u_rx[2]|break_error~q ),
  39630. .Cin(),
  39631. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [2]),
  39632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  39633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  39634. .SyncReset(SyncReset_X58_Y7_GND),
  39635. .ShiftData(),
  39636. .SyncLoad(SyncLoad_X58_Y7_VCC),
  39637. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~12_combout ),
  39638. .Cout(),
  39639. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [2]));
  39640. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .coord_x = 17;
  39641. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .coord_y = 5;
  39642. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .coord_z = 11;
  39643. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .mask = 16'hECA0;
  39644. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .modeMux = 1'b0;
  39645. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .FeedbackMux = 1'b1;
  39646. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .ShiftMux = 1'b0;
  39647. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .BypassEn = 1'b1;
  39648. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[2] .CarryEnb = 1'b1;
  39649. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] (
  39650. .A(\macro_inst|u_ahb2apb|paddr [9]),
  39651. .B(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [2]),
  39652. .C(\rv32.mem_ahb_hwdata[10] ),
  39653. .D(\macro_inst|u_uart[1]|u_regs|Selector2~0_combout ),
  39654. .Cin(),
  39655. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [3]),
  39656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  39657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  39658. .SyncReset(SyncReset_X60_Y7_GND),
  39659. .ShiftData(),
  39660. .SyncLoad(SyncLoad_X60_Y7_VCC),
  39661. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector2~1_combout ),
  39662. .Cout(),
  39663. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [3]));
  39664. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .coord_x = 18;
  39665. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .coord_y = 9;
  39666. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .coord_z = 9;
  39667. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .mask = 16'hF588;
  39668. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .modeMux = 1'b0;
  39669. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .FeedbackMux = 1'b1;
  39670. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .ShiftMux = 1'b0;
  39671. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .BypassEn = 1'b1;
  39672. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[3] .CarryEnb = 1'b1;
  39673. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] (
  39674. .A(\macro_inst|u_uart[1]|u_regs|break_error_ie [4]),
  39675. .B(\macro_inst|u_uart[1]|u_rx[4]|overrun_error~q ),
  39676. .C(\rv32.mem_ahb_hwdata[10] ),
  39677. .D(\macro_inst|u_uart[1]|u_rx[4]|break_error~q ),
  39678. .Cin(),
  39679. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [4]),
  39680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  39681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  39682. .SyncReset(SyncReset_X60_Y8_GND),
  39683. .ShiftData(),
  39684. .SyncLoad(SyncLoad_X60_Y8_VCC),
  39685. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~22_combout ),
  39686. .Cout(),
  39687. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [4]));
  39688. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .coord_x = 17;
  39689. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .coord_y = 8;
  39690. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .coord_z = 13;
  39691. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .mask = 16'hEAC0;
  39692. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .modeMux = 1'b0;
  39693. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .FeedbackMux = 1'b1;
  39694. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .ShiftMux = 1'b0;
  39695. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .BypassEn = 1'b1;
  39696. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[4] .CarryEnb = 1'b1;
  39697. alta_slice \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] (
  39698. .A(\macro_inst|u_ahb2apb|paddr [4]),
  39699. .B(\macro_inst|u_ahb2apb|paddr [8]),
  39700. .C(\rv32.mem_ahb_hwdata[10] ),
  39701. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  39702. .Cin(),
  39703. .Qin(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [5]),
  39704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ),
  39705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  39706. .SyncReset(SyncReset_X61_Y6_GND),
  39707. .ShiftData(),
  39708. .SyncLoad(SyncLoad_X61_Y6_VCC),
  39709. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~13_combout ),
  39710. .Cout(),
  39711. .Q(\macro_inst|u_uart[1]|u_regs|overrun_error_ie [5]));
  39712. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .coord_x = 16;
  39713. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .coord_y = 8;
  39714. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .coord_z = 10;
  39715. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .mask = 16'h8800;
  39716. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .modeMux = 1'b0;
  39717. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .FeedbackMux = 1'b0;
  39718. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .ShiftMux = 1'b0;
  39719. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .BypassEn = 1'b1;
  39720. defparam \macro_inst|u_uart[1]|u_regs|overrun_error_ie[5] .CarryEnb = 1'b1;
  39721. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] (
  39722. .A(\macro_inst|u_uart[1]|u_rx[0]|parity_error~q ),
  39723. .B(\macro_inst|u_uart[1]|u_regs|framing_error_ie [0]),
  39724. .C(\rv32.mem_ahb_hwdata[8] ),
  39725. .D(\macro_inst|u_uart[1]|u_rx[0]|framing_error~q ),
  39726. .Cin(),
  39727. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [0]),
  39728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  39729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  39730. .SyncReset(SyncReset_X59_Y7_GND),
  39731. .ShiftData(),
  39732. .SyncLoad(SyncLoad_X59_Y7_VCC),
  39733. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~1_combout ),
  39734. .Cout(),
  39735. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [0]));
  39736. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .coord_x = 17;
  39737. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .coord_y = 7;
  39738. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .coord_z = 12;
  39739. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .mask = 16'hECA0;
  39740. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .modeMux = 1'b0;
  39741. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .FeedbackMux = 1'b1;
  39742. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .ShiftMux = 1'b0;
  39743. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .BypassEn = 1'b1;
  39744. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[0] .CarryEnb = 1'b1;
  39745. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] (
  39746. .A(\macro_inst|u_uart[1]|u_regs|framing_error_ie [1]),
  39747. .B(\macro_inst|u_uart[1]|u_rx[1]|framing_error~q ),
  39748. .C(\rv32.mem_ahb_hwdata[8] ),
  39749. .D(\macro_inst|u_uart[1]|u_rx[1]|parity_error~q ),
  39750. .Cin(),
  39751. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [1]),
  39752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ),
  39753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  39754. .SyncReset(SyncReset_X59_Y7_GND),
  39755. .ShiftData(),
  39756. .SyncLoad(SyncLoad_X59_Y7_VCC),
  39757. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~6_combout ),
  39758. .Cout(),
  39759. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [1]));
  39760. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .coord_x = 17;
  39761. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .coord_y = 7;
  39762. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .coord_z = 9;
  39763. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .mask = 16'hF888;
  39764. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .modeMux = 1'b0;
  39765. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .FeedbackMux = 1'b1;
  39766. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .ShiftMux = 1'b0;
  39767. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .BypassEn = 1'b1;
  39768. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[1] .CarryEnb = 1'b1;
  39769. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] (
  39770. .A(\macro_inst|u_uart[1]|u_rx[2]|framing_error~q ),
  39771. .B(\macro_inst|u_uart[1]|u_rx[2]|parity_error~q ),
  39772. .C(\rv32.mem_ahb_hwdata[8] ),
  39773. .D(\macro_inst|u_uart[1]|u_regs|framing_error_ie [2]),
  39774. .Cin(),
  39775. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [2]),
  39776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  39777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  39778. .SyncReset(SyncReset_X58_Y7_GND),
  39779. .ShiftData(),
  39780. .SyncLoad(SyncLoad_X58_Y7_VCC),
  39781. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~11_combout ),
  39782. .Cout(),
  39783. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [2]));
  39784. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .coord_x = 17;
  39785. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .coord_y = 5;
  39786. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .coord_z = 3;
  39787. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .mask = 16'hEAC0;
  39788. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .modeMux = 1'b0;
  39789. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .FeedbackMux = 1'b1;
  39790. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .ShiftMux = 1'b0;
  39791. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .BypassEn = 1'b1;
  39792. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[2] .CarryEnb = 1'b1;
  39793. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] (
  39794. .A(\macro_inst|u_uart[1]|u_regs|parity_error_ie [2]),
  39795. .B(\macro_inst|u_ahb2apb|paddr [9]),
  39796. .C(\rv32.mem_ahb_hwdata[8] ),
  39797. .D(\macro_inst|u_uart[1]|u_regs|Selector4~0_combout ),
  39798. .Cin(),
  39799. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [3]),
  39800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  39801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  39802. .SyncReset(SyncReset_X60_Y7_GND),
  39803. .ShiftData(),
  39804. .SyncLoad(SyncLoad_X60_Y7_VCC),
  39805. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector4~1_combout ),
  39806. .Cout(),
  39807. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [3]));
  39808. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .coord_x = 18;
  39809. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .coord_y = 9;
  39810. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .coord_z = 11;
  39811. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .mask = 16'hF388;
  39812. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .modeMux = 1'b0;
  39813. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .FeedbackMux = 1'b1;
  39814. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .ShiftMux = 1'b0;
  39815. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .BypassEn = 1'b1;
  39816. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[3] .CarryEnb = 1'b1;
  39817. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] (
  39818. .A(\macro_inst|u_uart[1]|u_rx[4]|framing_error~q ),
  39819. .B(\macro_inst|u_uart[1]|u_regs|framing_error_ie [4]),
  39820. .C(\rv32.mem_ahb_hwdata[8] ),
  39821. .D(\macro_inst|u_uart[1]|u_rx[4]|parity_error~q ),
  39822. .Cin(),
  39823. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [4]),
  39824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  39825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  39826. .SyncReset(SyncReset_X60_Y8_GND),
  39827. .ShiftData(),
  39828. .SyncLoad(SyncLoad_X60_Y8_VCC),
  39829. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~21_combout ),
  39830. .Cout(),
  39831. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [4]));
  39832. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .coord_x = 17;
  39833. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .coord_y = 8;
  39834. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .coord_z = 8;
  39835. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .mask = 16'hF888;
  39836. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .modeMux = 1'b0;
  39837. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .FeedbackMux = 1'b1;
  39838. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .ShiftMux = 1'b0;
  39839. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .BypassEn = 1'b1;
  39840. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[4] .CarryEnb = 1'b1;
  39841. alta_slice \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] (
  39842. .A(\macro_inst|u_uart[1]|u_regs|break_error_ie [4]),
  39843. .B(\macro_inst|u_uart[1]|u_regs|break_error_ie [5]),
  39844. .C(\rv32.mem_ahb_hwdata[8] ),
  39845. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~4_combout ),
  39846. .Cin(),
  39847. .Qin(\macro_inst|u_uart[1]|u_regs|parity_error_ie [5]),
  39848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ),
  39849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  39850. .SyncReset(SyncReset_X61_Y6_GND),
  39851. .ShiftData(),
  39852. .SyncLoad(SyncLoad_X61_Y6_VCC),
  39853. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector3~0_combout ),
  39854. .Cout(),
  39855. .Q(\macro_inst|u_uart[1]|u_regs|parity_error_ie [5]));
  39856. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .coord_x = 16;
  39857. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .coord_y = 8;
  39858. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .coord_z = 9;
  39859. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .mask = 16'hCCAA;
  39860. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .modeMux = 1'b0;
  39861. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .FeedbackMux = 1'b0;
  39862. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .ShiftMux = 1'b0;
  39863. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .BypassEn = 1'b1;
  39864. defparam \macro_inst|u_uart[1]|u_regs|parity_error_ie[5] .CarryEnb = 1'b1;
  39865. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] (
  39866. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  39867. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  39868. .C(\rv32.mem_ahb_hwdata[0] ),
  39869. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  39870. .Cin(),
  39871. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [0]),
  39872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout_X59_Y8_SIG_SIG ),
  39873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  39874. .SyncReset(SyncReset_X59_Y8_GND),
  39875. .ShiftData(),
  39876. .SyncLoad(SyncLoad_X59_Y8_VCC),
  39877. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~0_combout ),
  39878. .Cout(),
  39879. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [0]));
  39880. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .coord_x = 19;
  39881. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .coord_y = 8;
  39882. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .coord_z = 14;
  39883. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .mask = 16'h44CC;
  39884. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .modeMux = 1'b0;
  39885. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .FeedbackMux = 1'b0;
  39886. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .ShiftMux = 1'b0;
  39887. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .BypassEn = 1'b1;
  39888. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0] .CarryEnb = 1'b1;
  39889. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 (
  39890. .A(vcc),
  39891. .B(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  39892. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  39893. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  39894. .Cin(),
  39895. .Qin(),
  39896. .Clk(),
  39897. .AsyncReset(),
  39898. .SyncReset(),
  39899. .ShiftData(),
  39900. .SyncLoad(),
  39901. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout ),
  39902. .Cout(),
  39903. .Q());
  39904. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .coord_x = 19;
  39905. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .coord_y = 8;
  39906. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .coord_z = 10;
  39907. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .mask = 16'hC000;
  39908. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .modeMux = 1'b0;
  39909. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .FeedbackMux = 1'b0;
  39910. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .ShiftMux = 1'b0;
  39911. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .BypassEn = 1'b0;
  39912. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4 .CarryEnb = 1'b1;
  39913. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] (
  39914. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  39915. .B(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  39916. .C(\rv32.mem_ahb_hwdata[0] ),
  39917. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  39918. .Cin(),
  39919. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [1]),
  39920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout_X59_Y8_SIG_SIG ),
  39921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  39922. .SyncReset(SyncReset_X59_Y8_GND),
  39923. .ShiftData(),
  39924. .SyncLoad(SyncLoad_X59_Y8_VCC),
  39925. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout ),
  39926. .Cout(),
  39927. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [1]));
  39928. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .coord_x = 19;
  39929. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .coord_y = 8;
  39930. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .coord_z = 6;
  39931. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .mask = 16'h8800;
  39932. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .modeMux = 1'b0;
  39933. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .FeedbackMux = 1'b0;
  39934. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .ShiftMux = 1'b0;
  39935. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .BypassEn = 1'b1;
  39936. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[1] .CarryEnb = 1'b1;
  39937. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] (
  39938. .A(),
  39939. .B(),
  39940. .C(vcc),
  39941. .D(\rv32.mem_ahb_hwdata[0] ),
  39942. .Cin(),
  39943. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [2]),
  39944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout_X56_Y4_SIG_SIG ),
  39945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  39946. .SyncReset(),
  39947. .ShiftData(),
  39948. .SyncLoad(),
  39949. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[2]__feeder__LutOut ),
  39950. .Cout(),
  39951. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [2]));
  39952. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .coord_x = 18;
  39953. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .coord_y = 5;
  39954. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .coord_z = 3;
  39955. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .mask = 16'hFF00;
  39956. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .modeMux = 1'b1;
  39957. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .FeedbackMux = 1'b0;
  39958. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .ShiftMux = 1'b0;
  39959. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .BypassEn = 1'b0;
  39960. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[2] .CarryEnb = 1'b1;
  39961. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] (
  39962. .A(\macro_inst|u_uart[1]|u_regs|rx_dma_en [2]),
  39963. .B(\macro_inst|u_ahb2apb|paddr [9]),
  39964. .C(\rv32.mem_ahb_hwdata[0] ),
  39965. .D(\macro_inst|u_uart[1]|u_regs|Selector12~0_combout ),
  39966. .Cin(),
  39967. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [3]),
  39968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout_X56_Y4_SIG_SIG ),
  39969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  39970. .SyncReset(SyncReset_X56_Y4_GND),
  39971. .ShiftData(),
  39972. .SyncLoad(SyncLoad_X56_Y4_VCC),
  39973. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector12~1_combout ),
  39974. .Cout(),
  39975. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [3]));
  39976. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .coord_x = 18;
  39977. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .coord_y = 5;
  39978. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .coord_z = 11;
  39979. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .mask = 16'hF388;
  39980. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .modeMux = 1'b0;
  39981. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .FeedbackMux = 1'b1;
  39982. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .ShiftMux = 1'b0;
  39983. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .BypassEn = 1'b1;
  39984. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3] .CarryEnb = 1'b1;
  39985. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 (
  39986. .A(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  39987. .B(\macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~5_combout ),
  39988. .C(\macro_inst|u_uart[1]|u_regs|Equal2~0_combout ),
  39989. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  39990. .Cin(),
  39991. .Qin(),
  39992. .Clk(),
  39993. .AsyncReset(),
  39994. .SyncReset(),
  39995. .ShiftData(),
  39996. .SyncLoad(),
  39997. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout ),
  39998. .Cout(),
  39999. .Q());
  40000. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .coord_x = 17;
  40001. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .coord_y = 4;
  40002. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .coord_z = 0;
  40003. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .mask = 16'h8000;
  40004. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .modeMux = 1'b0;
  40005. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .FeedbackMux = 1'b0;
  40006. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .ShiftMux = 1'b0;
  40007. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .BypassEn = 1'b0;
  40008. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6 .CarryEnb = 1'b1;
  40009. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] (
  40010. .A(),
  40011. .B(),
  40012. .C(vcc),
  40013. .D(\rv32.mem_ahb_hwdata[0] ),
  40014. .Cin(),
  40015. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [4]),
  40016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout_X46_Y2_SIG_SIG ),
  40017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y2_SIG ),
  40018. .SyncReset(),
  40019. .ShiftData(),
  40020. .SyncLoad(),
  40021. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[4]__feeder__LutOut ),
  40022. .Cout(),
  40023. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [4]));
  40024. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .coord_x = 7;
  40025. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .coord_y = 2;
  40026. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .coord_z = 13;
  40027. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .mask = 16'hFF00;
  40028. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .modeMux = 1'b1;
  40029. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .FeedbackMux = 1'b0;
  40030. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .ShiftMux = 1'b0;
  40031. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .BypassEn = 1'b0;
  40032. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4] .CarryEnb = 1'b1;
  40033. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 (
  40034. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40035. .B(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  40036. .C(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40037. .D(\macro_inst|u_ahb2apb|paddr [8]),
  40038. .Cin(),
  40039. .Qin(),
  40040. .Clk(),
  40041. .AsyncReset(),
  40042. .SyncReset(),
  40043. .ShiftData(),
  40044. .SyncLoad(),
  40045. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout ),
  40046. .Cout(),
  40047. .Q());
  40048. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .coord_x = 7;
  40049. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .coord_y = 2;
  40050. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .coord_z = 14;
  40051. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .mask = 16'h0080;
  40052. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .modeMux = 1'b0;
  40053. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .FeedbackMux = 1'b0;
  40054. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .ShiftMux = 1'b0;
  40055. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .BypassEn = 1'b0;
  40056. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1 .CarryEnb = 1'b1;
  40057. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] (
  40058. .A(\macro_inst|u_ahb2apb|paddr [7]),
  40059. .B(\macro_inst|u_ahb2apb|paddr [6]),
  40060. .C(\rv32.mem_ahb_hwdata[0] ),
  40061. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40062. .Cin(),
  40063. .Qin(\macro_inst|u_uart[1]|u_regs|rx_dma_en [5]),
  40064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout_X60_Y4_SIG_SIG ),
  40065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  40066. .SyncReset(SyncReset_X60_Y4_GND),
  40067. .ShiftData(),
  40068. .SyncLoad(SyncLoad_X60_Y4_VCC),
  40069. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~5_combout ),
  40070. .Cout(),
  40071. .Q(\macro_inst|u_uart[1]|u_regs|rx_dma_en [5]));
  40072. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .coord_x = 16;
  40073. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .coord_y = 7;
  40074. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .coord_z = 14;
  40075. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .mask = 16'h4400;
  40076. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .modeMux = 1'b0;
  40077. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .FeedbackMux = 1'b0;
  40078. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .ShiftMux = 1'b0;
  40079. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .BypassEn = 1'b1;
  40080. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5] .CarryEnb = 1'b1;
  40081. alta_slice \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 (
  40082. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40083. .B(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  40084. .C(\macro_inst|u_ahb2apb|paddr [8]),
  40085. .D(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40086. .Cin(),
  40087. .Qin(),
  40088. .Clk(),
  40089. .AsyncReset(),
  40090. .SyncReset(),
  40091. .ShiftData(),
  40092. .SyncLoad(),
  40093. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout ),
  40094. .Cout(),
  40095. .Q());
  40096. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .coord_x = 17;
  40097. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .coord_y = 4;
  40098. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .coord_z = 7;
  40099. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .mask = 16'h8000;
  40100. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .modeMux = 1'b0;
  40101. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .FeedbackMux = 1'b0;
  40102. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .ShiftMux = 1'b0;
  40103. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .BypassEn = 1'b0;
  40104. defparam \macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0 .CarryEnb = 1'b1;
  40105. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] (
  40106. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_complete~q ),
  40107. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_idle~q ),
  40108. .C(\rv32.mem_ahb_hwdata[11] ),
  40109. .D(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [0]),
  40110. .Cin(),
  40111. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [0]),
  40112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X60_Y6_SIG_SIG ),
  40113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  40114. .SyncReset(SyncReset_X60_Y6_GND),
  40115. .ShiftData(),
  40116. .SyncLoad(SyncLoad_X60_Y6_VCC),
  40117. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~3_combout ),
  40118. .Cout(),
  40119. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [0]));
  40120. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .coord_x = 18;
  40121. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .coord_y = 7;
  40122. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .coord_z = 4;
  40123. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .mask = 16'hEAC0;
  40124. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .modeMux = 1'b0;
  40125. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .FeedbackMux = 1'b1;
  40126. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .ShiftMux = 1'b0;
  40127. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .BypassEn = 1'b1;
  40128. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[0] .CarryEnb = 1'b1;
  40129. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] (
  40130. .A(),
  40131. .B(),
  40132. .C(vcc),
  40133. .D(\rv32.mem_ahb_hwdata[11] ),
  40134. .Cin(),
  40135. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [1]),
  40136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X60_Y6_SIG_SIG ),
  40137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  40138. .SyncReset(),
  40139. .ShiftData(),
  40140. .SyncLoad(),
  40141. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_idle_ie[1]__feeder__LutOut ),
  40142. .Cout(),
  40143. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [1]));
  40144. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .coord_x = 18;
  40145. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .coord_y = 7;
  40146. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .coord_z = 11;
  40147. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .mask = 16'hFF00;
  40148. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .modeMux = 1'b1;
  40149. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .FeedbackMux = 1'b0;
  40150. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .ShiftMux = 1'b0;
  40151. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .BypassEn = 1'b0;
  40152. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[1] .CarryEnb = 1'b1;
  40153. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] (
  40154. .A(),
  40155. .B(),
  40156. .C(vcc),
  40157. .D(\rv32.mem_ahb_hwdata[11] ),
  40158. .Cin(),
  40159. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [2]),
  40160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  40161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  40162. .SyncReset(),
  40163. .ShiftData(),
  40164. .SyncLoad(),
  40165. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_idle_ie[2]__feeder__LutOut ),
  40166. .Cout(),
  40167. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [2]));
  40168. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .coord_x = 17;
  40169. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .coord_y = 5;
  40170. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .coord_z = 10;
  40171. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .mask = 16'hFF00;
  40172. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .modeMux = 1'b1;
  40173. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .FeedbackMux = 1'b0;
  40174. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .ShiftMux = 1'b0;
  40175. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .BypassEn = 1'b0;
  40176. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[2] .CarryEnb = 1'b1;
  40177. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] (
  40178. .A(\macro_inst|u_ahb2apb|paddr [9]),
  40179. .B(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [2]),
  40180. .C(\rv32.mem_ahb_hwdata[11] ),
  40181. .D(\macro_inst|u_uart[1]|u_regs|Selector1~0_combout ),
  40182. .Cin(),
  40183. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [3]),
  40184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  40185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  40186. .SyncReset(SyncReset_X60_Y7_GND),
  40187. .ShiftData(),
  40188. .SyncLoad(SyncLoad_X60_Y7_VCC),
  40189. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector1~1_combout ),
  40190. .Cout(),
  40191. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [3]));
  40192. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .coord_x = 18;
  40193. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .coord_y = 9;
  40194. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .coord_z = 4;
  40195. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .mask = 16'hF588;
  40196. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .modeMux = 1'b0;
  40197. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .FeedbackMux = 1'b1;
  40198. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .ShiftMux = 1'b0;
  40199. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .BypassEn = 1'b1;
  40200. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[3] .CarryEnb = 1'b1;
  40201. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] (
  40202. .A(\macro_inst|u_ahb2apb|paddr [4]),
  40203. .B(\macro_inst|u_ahb2apb|paddr [8]),
  40204. .C(\rv32.mem_ahb_hwdata[11] ),
  40205. .D(\macro_inst|u_uart[0]|u_regs|Decoder1~0_combout ),
  40206. .Cin(),
  40207. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [4]),
  40208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  40209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  40210. .SyncReset(SyncReset_X60_Y8_GND),
  40211. .ShiftData(),
  40212. .SyncLoad(SyncLoad_X60_Y8_VCC),
  40213. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~11_combout ),
  40214. .Cout(),
  40215. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [4]));
  40216. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .coord_x = 17;
  40217. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .coord_y = 8;
  40218. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .coord_z = 4;
  40219. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .mask = 16'h2200;
  40220. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .modeMux = 1'b0;
  40221. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .FeedbackMux = 1'b0;
  40222. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .ShiftMux = 1'b0;
  40223. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .BypassEn = 1'b1;
  40224. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[4] .CarryEnb = 1'b1;
  40225. alta_slice \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] (
  40226. .A(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [4]),
  40227. .B(\macro_inst|u_uart[1]|u_regs|Selector1~2_combout ),
  40228. .C(\rv32.mem_ahb_hwdata[11] ),
  40229. .D(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  40230. .Cin(),
  40231. .Qin(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [5]),
  40232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ),
  40233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  40234. .SyncReset(SyncReset_X61_Y6_GND),
  40235. .ShiftData(),
  40236. .SyncLoad(SyncLoad_X61_Y6_VCC),
  40237. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector1~3_combout ),
  40238. .Cout(),
  40239. .Q(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [5]));
  40240. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .coord_x = 16;
  40241. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .coord_y = 8;
  40242. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .coord_z = 2;
  40243. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .mask = 16'hE2CC;
  40244. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .modeMux = 1'b0;
  40245. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .FeedbackMux = 1'b1;
  40246. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .ShiftMux = 1'b0;
  40247. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .BypassEn = 1'b1;
  40248. defparam \macro_inst|u_uart[1]|u_regs|rx_idle_ie[5] .CarryEnb = 1'b1;
  40249. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] (
  40250. .A(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [3]),
  40251. .B(\macro_inst|u_ahb2apb|paddr [9]),
  40252. .C(\rv32.mem_ahb_hwdata[4] ),
  40253. .D(\macro_inst|u_ahb2apb|paddr [8]),
  40254. .Cin(),
  40255. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [0]),
  40256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  40257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  40258. .SyncReset(SyncReset_X59_Y7_GND),
  40259. .ShiftData(),
  40260. .SyncLoad(SyncLoad_X59_Y7_VCC),
  40261. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~11_combout ),
  40262. .Cout(),
  40263. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [0]));
  40264. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .coord_x = 17;
  40265. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .coord_y = 7;
  40266. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .coord_z = 5;
  40267. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .mask = 16'hBBFC;
  40268. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .modeMux = 1'b0;
  40269. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .FeedbackMux = 1'b1;
  40270. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .ShiftMux = 1'b0;
  40271. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .BypassEn = 1'b1;
  40272. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0] .CarryEnb = 1'b1;
  40273. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 (
  40274. .A(\macro_inst|u_ahb2apb|paddr [9]),
  40275. .B(\macro_inst|u_ahb2apb|paddr [8]),
  40276. .C(\macro_inst|u_ahb2apb|paddr [10]),
  40277. .D(\macro_inst|u_uart[1]|u_regs|always7~0_combout ),
  40278. .Cin(),
  40279. .Qin(),
  40280. .Clk(),
  40281. .AsyncReset(),
  40282. .SyncReset(),
  40283. .ShiftData(),
  40284. .SyncLoad(),
  40285. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout ),
  40286. .Cout(),
  40287. .Q());
  40288. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .coord_x = 17;
  40289. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .coord_y = 7;
  40290. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .coord_z = 6;
  40291. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .mask = 16'h0100;
  40292. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .modeMux = 1'b0;
  40293. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .FeedbackMux = 1'b0;
  40294. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .ShiftMux = 1'b0;
  40295. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .BypassEn = 1'b0;
  40296. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15 .CarryEnb = 1'b1;
  40297. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] (
  40298. .A(\macro_inst|u_ahb2apb|paddr [9]),
  40299. .B(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [2]),
  40300. .C(\rv32.mem_ahb_hwdata[4] ),
  40301. .D(\macro_inst|u_ahb2apb|paddr [8]),
  40302. .Cin(),
  40303. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [1]),
  40304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X59_Y7_SIG_SIG ),
  40305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  40306. .SyncReset(SyncReset_X59_Y7_GND),
  40307. .ShiftData(),
  40308. .SyncLoad(SyncLoad_X59_Y7_VCC),
  40309. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~10_combout ),
  40310. .Cout(),
  40311. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [1]));
  40312. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .coord_x = 17;
  40313. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .coord_y = 7;
  40314. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .coord_z = 4;
  40315. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .mask = 16'hFADD;
  40316. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .modeMux = 1'b0;
  40317. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .FeedbackMux = 1'b1;
  40318. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .ShiftMux = 1'b0;
  40319. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .BypassEn = 1'b1;
  40320. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1] .CarryEnb = 1'b1;
  40321. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 (
  40322. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  40323. .B(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~16_combout ),
  40324. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  40325. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40326. .Cin(),
  40327. .Qin(),
  40328. .Clk(),
  40329. .AsyncReset(),
  40330. .SyncReset(),
  40331. .ShiftData(),
  40332. .SyncLoad(),
  40333. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout ),
  40334. .Cout(),
  40335. .Q());
  40336. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .coord_x = 16;
  40337. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .coord_y = 4;
  40338. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .coord_z = 2;
  40339. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .mask = 16'h8000;
  40340. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .modeMux = 1'b0;
  40341. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .FeedbackMux = 1'b0;
  40342. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .ShiftMux = 1'b0;
  40343. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .BypassEn = 1'b0;
  40344. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8 .CarryEnb = 1'b1;
  40345. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] (
  40346. .A(),
  40347. .B(),
  40348. .C(vcc),
  40349. .D(\rv32.mem_ahb_hwdata[4] ),
  40350. .Cin(),
  40351. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [2]),
  40352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  40353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  40354. .SyncReset(),
  40355. .ShiftData(),
  40356. .SyncLoad(),
  40357. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]__feeder__LutOut ),
  40358. .Cout(),
  40359. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [2]));
  40360. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .coord_x = 17;
  40361. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .coord_y = 5;
  40362. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .coord_z = 4;
  40363. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .mask = 16'hFF00;
  40364. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .modeMux = 1'b1;
  40365. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .FeedbackMux = 1'b0;
  40366. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .ShiftMux = 1'b0;
  40367. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .BypassEn = 1'b0;
  40368. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2] .CarryEnb = 1'b1;
  40369. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 (
  40370. .A(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~16_combout ),
  40371. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  40372. .C(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40373. .D(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  40374. .Cin(),
  40375. .Qin(),
  40376. .Clk(),
  40377. .AsyncReset(),
  40378. .SyncReset(),
  40379. .ShiftData(),
  40380. .SyncLoad(),
  40381. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout ),
  40382. .Cout(),
  40383. .Q());
  40384. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .coord_x = 17;
  40385. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .coord_y = 4;
  40386. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .coord_z = 14;
  40387. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .mask = 16'h8000;
  40388. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .modeMux = 1'b0;
  40389. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .FeedbackMux = 1'b0;
  40390. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .ShiftMux = 1'b0;
  40391. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .BypassEn = 1'b0;
  40392. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9 .CarryEnb = 1'b1;
  40393. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] (
  40394. .A(vcc),
  40395. .B(\macro_inst|u_uart[1]|u_regs|tx_write [3]),
  40396. .C(\rv32.mem_ahb_hwdata[4] ),
  40397. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  40398. .Cin(),
  40399. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [3]),
  40400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  40401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  40402. .SyncReset(SyncReset_X60_Y7_GND),
  40403. .ShiftData(),
  40404. .SyncLoad(SyncLoad_X60_Y7_VCC),
  40405. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout ),
  40406. .Cout(),
  40407. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [3]));
  40408. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .coord_x = 18;
  40409. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .coord_y = 9;
  40410. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .coord_z = 14;
  40411. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .mask = 16'h00CC;
  40412. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .modeMux = 1'b0;
  40413. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .FeedbackMux = 1'b0;
  40414. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .ShiftMux = 1'b0;
  40415. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .BypassEn = 1'b1;
  40416. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3] .CarryEnb = 1'b1;
  40417. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 (
  40418. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  40419. .B(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40420. .C(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  40421. .D(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~16_combout ),
  40422. .Cin(),
  40423. .Qin(),
  40424. .Clk(),
  40425. .AsyncReset(),
  40426. .SyncReset(),
  40427. .ShiftData(),
  40428. .SyncLoad(),
  40429. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout ),
  40430. .Cout(),
  40431. .Q());
  40432. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .coord_x = 16;
  40433. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .coord_y = 7;
  40434. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .coord_z = 4;
  40435. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .mask = 16'h8000;
  40436. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .modeMux = 1'b0;
  40437. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .FeedbackMux = 1'b0;
  40438. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .ShiftMux = 1'b0;
  40439. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .BypassEn = 1'b0;
  40440. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10 .CarryEnb = 1'b1;
  40441. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] (
  40442. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  40443. .B(vcc),
  40444. .C(\rv32.mem_ahb_hwdata[4] ),
  40445. .D(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [5]),
  40446. .Cin(),
  40447. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [4]),
  40448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  40449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  40450. .SyncReset(SyncReset_X60_Y8_GND),
  40451. .ShiftData(),
  40452. .SyncLoad(SyncLoad_X60_Y8_VCC),
  40453. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector8~9_combout ),
  40454. .Cout(),
  40455. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [4]));
  40456. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .coord_x = 17;
  40457. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .coord_y = 8;
  40458. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .coord_z = 9;
  40459. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .mask = 16'hFA50;
  40460. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .modeMux = 1'b0;
  40461. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .FeedbackMux = 1'b1;
  40462. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .ShiftMux = 1'b0;
  40463. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .BypassEn = 1'b1;
  40464. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4] .CarryEnb = 1'b1;
  40465. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 (
  40466. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40467. .B(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~11_combout ),
  40468. .C(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40469. .D(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  40470. .Cin(),
  40471. .Qin(),
  40472. .Clk(),
  40473. .AsyncReset(),
  40474. .SyncReset(),
  40475. .ShiftData(),
  40476. .SyncLoad(),
  40477. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout ),
  40478. .Cout(),
  40479. .Q());
  40480. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .coord_x = 17;
  40481. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .coord_y = 8;
  40482. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .coord_z = 5;
  40483. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .mask = 16'h8000;
  40484. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .modeMux = 1'b0;
  40485. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .FeedbackMux = 1'b0;
  40486. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .ShiftMux = 1'b0;
  40487. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .BypassEn = 1'b0;
  40488. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12 .CarryEnb = 1'b1;
  40489. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] (
  40490. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  40491. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  40492. .C(\rv32.mem_ahb_hwdata[4] ),
  40493. .D(\macro_inst|u_ahb2apb|paddr [8]),
  40494. .Cin(),
  40495. .Qin(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [5]),
  40496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y7_SIG_SIG ),
  40497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  40498. .SyncReset(SyncReset_X61_Y7_GND),
  40499. .ShiftData(),
  40500. .SyncLoad(SyncLoad_X61_Y7_VCC),
  40501. .LutOut(\macro_inst|u_uart[1]|u_regs|status_reg[2]~1_combout ),
  40502. .Cout(),
  40503. .Q(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [5]));
  40504. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .coord_x = 17;
  40505. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .coord_y = 9;
  40506. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .coord_z = 3;
  40507. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .mask = 16'hCCAA;
  40508. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .modeMux = 1'b0;
  40509. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .FeedbackMux = 1'b0;
  40510. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .ShiftMux = 1'b0;
  40511. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .BypassEn = 1'b1;
  40512. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5] .CarryEnb = 1'b1;
  40513. alta_slice \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 (
  40514. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  40515. .B(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40516. .C(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~13_combout ),
  40517. .D(\macro_inst|u_uart[1]|u_regs|always8~0_combout ),
  40518. .Cin(),
  40519. .Qin(),
  40520. .Clk(),
  40521. .AsyncReset(),
  40522. .SyncReset(),
  40523. .ShiftData(),
  40524. .SyncLoad(),
  40525. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout ),
  40526. .Cout(),
  40527. .Q());
  40528. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .coord_x = 16;
  40529. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .coord_y = 8;
  40530. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .coord_z = 0;
  40531. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .mask = 16'h8000;
  40532. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .modeMux = 1'b0;
  40533. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .FeedbackMux = 1'b0;
  40534. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .ShiftMux = 1'b0;
  40535. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .BypassEn = 1'b0;
  40536. defparam \macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14 .CarryEnb = 1'b1;
  40537. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[0] (
  40538. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  40539. .B(vcc),
  40540. .C(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40541. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40542. .Cin(),
  40543. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [0]),
  40544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  40545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  40546. .SyncReset(),
  40547. .ShiftData(),
  40548. .SyncLoad(),
  40549. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~0_combout ),
  40550. .Cout(),
  40551. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [0]));
  40552. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .coord_x = 18;
  40553. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .coord_y = 4;
  40554. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .coord_z = 8;
  40555. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .mask = 16'hA000;
  40556. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .modeMux = 1'b0;
  40557. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .FeedbackMux = 1'b0;
  40558. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .ShiftMux = 1'b0;
  40559. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .BypassEn = 1'b0;
  40560. defparam \macro_inst|u_uart[1]|u_regs|rx_read[0] .CarryEnb = 1'b1;
  40561. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[1] (
  40562. .A(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40563. .B(vcc),
  40564. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  40565. .D(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40566. .Cin(),
  40567. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [1]),
  40568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  40569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  40570. .SyncReset(),
  40571. .ShiftData(),
  40572. .SyncLoad(),
  40573. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~1_combout ),
  40574. .Cout(),
  40575. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [1]));
  40576. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .coord_x = 18;
  40577. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .coord_y = 8;
  40578. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .coord_z = 10;
  40579. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .mask = 16'hA000;
  40580. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .modeMux = 1'b0;
  40581. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .FeedbackMux = 1'b0;
  40582. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .ShiftMux = 1'b0;
  40583. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .BypassEn = 1'b0;
  40584. defparam \macro_inst|u_uart[1]|u_regs|rx_read[1] .CarryEnb = 1'b1;
  40585. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[2] (
  40586. .A(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40587. .B(vcc),
  40588. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40589. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  40590. .Cin(),
  40591. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [2]),
  40592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  40593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  40594. .SyncReset(),
  40595. .ShiftData(),
  40596. .SyncLoad(),
  40597. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~2_combout ),
  40598. .Cout(),
  40599. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [2]));
  40600. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .coord_x = 18;
  40601. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .coord_y = 4;
  40602. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .coord_z = 7;
  40603. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .mask = 16'hA000;
  40604. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .modeMux = 1'b0;
  40605. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .FeedbackMux = 1'b0;
  40606. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .ShiftMux = 1'b0;
  40607. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .BypassEn = 1'b0;
  40608. defparam \macro_inst|u_uart[1]|u_regs|rx_read[2] .CarryEnb = 1'b1;
  40609. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[3] (
  40610. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  40611. .B(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40612. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40613. .D(vcc),
  40614. .Cin(),
  40615. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [3]),
  40616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  40617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  40618. .SyncReset(),
  40619. .ShiftData(),
  40620. .SyncLoad(),
  40621. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~3_combout ),
  40622. .Cout(),
  40623. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [3]));
  40624. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .coord_x = 18;
  40625. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .coord_y = 4;
  40626. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .coord_z = 13;
  40627. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .mask = 16'h8080;
  40628. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .modeMux = 1'b0;
  40629. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .FeedbackMux = 1'b0;
  40630. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .ShiftMux = 1'b0;
  40631. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .BypassEn = 1'b0;
  40632. defparam \macro_inst|u_uart[1]|u_regs|rx_read[3] .CarryEnb = 1'b1;
  40633. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[4] (
  40634. .A(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40635. .B(\macro_inst|u_ahb2apb|paddr [8]),
  40636. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40637. .D(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40638. .Cin(),
  40639. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [4]),
  40640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  40641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  40642. .SyncReset(),
  40643. .ShiftData(),
  40644. .SyncLoad(),
  40645. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~4_combout ),
  40646. .Cout(),
  40647. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [4]));
  40648. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .coord_x = 18;
  40649. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .coord_y = 8;
  40650. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .coord_z = 15;
  40651. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .mask = 16'h2000;
  40652. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .modeMux = 1'b0;
  40653. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .FeedbackMux = 1'b0;
  40654. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .ShiftMux = 1'b0;
  40655. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .BypassEn = 1'b0;
  40656. defparam \macro_inst|u_uart[1]|u_regs|rx_read[4] .CarryEnb = 1'b1;
  40657. alta_slice \macro_inst|u_uart[1]|u_regs|rx_read[5] (
  40658. .A(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  40659. .B(\macro_inst|u_ahb2apb|paddr [8]),
  40660. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  40661. .D(\macro_inst|u_uart[1]|u_regs|apb_read0~combout ),
  40662. .Cin(),
  40663. .Qin(\macro_inst|u_uart[1]|u_regs|rx_read [5]),
  40664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  40665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  40666. .SyncReset(),
  40667. .ShiftData(),
  40668. .SyncLoad(),
  40669. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_read~5_combout ),
  40670. .Cout(),
  40671. .Q(\macro_inst|u_uart[1]|u_regs|rx_read [5]));
  40672. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .coord_x = 18;
  40673. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .coord_y = 8;
  40674. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .coord_z = 6;
  40675. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .mask = 16'h8000;
  40676. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .modeMux = 1'b0;
  40677. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .FeedbackMux = 1'b0;
  40678. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .ShiftMux = 1'b0;
  40679. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .BypassEn = 1'b0;
  40680. defparam \macro_inst|u_uart[1]|u_regs|rx_read[5] .CarryEnb = 1'b1;
  40681. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[0] (
  40682. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40683. .B(\macro_inst|u_ahb2apb|paddr [9]),
  40684. .C(\macro_inst|u_uart[1]|u_regs|Mux0~4_combout ),
  40685. .D(\macro_inst|u_uart[1]|u_regs|Mux0~2_combout ),
  40686. .Cin(),
  40687. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [0]),
  40688. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40689. .AsyncReset(AsyncReset_X58_Y11_GND),
  40690. .SyncReset(),
  40691. .ShiftData(),
  40692. .SyncLoad(),
  40693. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux0~5_combout ),
  40694. .Cout(),
  40695. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [0]));
  40696. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .coord_x = 20;
  40697. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .coord_y = 7;
  40698. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .coord_z = 6;
  40699. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .mask = 16'h7250;
  40700. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .modeMux = 1'b0;
  40701. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .FeedbackMux = 1'b0;
  40702. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .ShiftMux = 1'b0;
  40703. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .BypassEn = 1'b0;
  40704. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[0] .CarryEnb = 1'b1;
  40705. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[1] (
  40706. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40707. .B(\macro_inst|u_uart[1]|u_regs|Mux1~4_combout ),
  40708. .C(\macro_inst|u_uart[1]|u_regs|Mux1~2_combout ),
  40709. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40710. .Cin(),
  40711. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [1]),
  40712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40713. .AsyncReset(AsyncReset_X58_Y11_GND),
  40714. .SyncReset(),
  40715. .ShiftData(),
  40716. .SyncLoad(),
  40717. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux1~5_combout ),
  40718. .Cout(),
  40719. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [1]));
  40720. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .coord_x = 20;
  40721. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .coord_y = 7;
  40722. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .coord_z = 5;
  40723. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .mask = 16'h44E4;
  40724. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .modeMux = 1'b0;
  40725. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .FeedbackMux = 1'b0;
  40726. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .ShiftMux = 1'b0;
  40727. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .BypassEn = 1'b0;
  40728. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[1] .CarryEnb = 1'b1;
  40729. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[2] (
  40730. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40731. .B(\macro_inst|u_uart[1]|u_regs|Mux2~4_combout ),
  40732. .C(\macro_inst|u_uart[1]|u_regs|Mux2~2_combout ),
  40733. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40734. .Cin(),
  40735. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [2]),
  40736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  40737. .AsyncReset(AsyncReset_X59_Y6_GND),
  40738. .SyncReset(),
  40739. .ShiftData(),
  40740. .SyncLoad(),
  40741. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux2~5_combout ),
  40742. .Cout(),
  40743. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [2]));
  40744. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .coord_x = 18;
  40745. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .coord_y = 6;
  40746. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .coord_z = 14;
  40747. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .mask = 16'h44E4;
  40748. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .modeMux = 1'b0;
  40749. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .FeedbackMux = 1'b0;
  40750. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .ShiftMux = 1'b0;
  40751. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .BypassEn = 1'b0;
  40752. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[2] .CarryEnb = 1'b1;
  40753. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[3] (
  40754. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40755. .B(\macro_inst|u_uart[1]|u_regs|Mux3~4_combout ),
  40756. .C(\macro_inst|u_uart[1]|u_regs|Mux3~2_combout ),
  40757. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40758. .Cin(),
  40759. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [3]),
  40760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40761. .AsyncReset(AsyncReset_X58_Y11_GND),
  40762. .SyncReset(),
  40763. .ShiftData(),
  40764. .SyncLoad(),
  40765. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux3~5_combout ),
  40766. .Cout(),
  40767. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [3]));
  40768. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .coord_x = 20;
  40769. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .coord_y = 7;
  40770. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .coord_z = 2;
  40771. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .mask = 16'h44E4;
  40772. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .modeMux = 1'b0;
  40773. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .FeedbackMux = 1'b0;
  40774. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .ShiftMux = 1'b0;
  40775. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .BypassEn = 1'b0;
  40776. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[3] .CarryEnb = 1'b1;
  40777. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[4] (
  40778. .A(\macro_inst|u_uart[1]|u_regs|Mux4~2_combout ),
  40779. .B(\macro_inst|u_uart[1]|u_regs|Mux4~4_combout ),
  40780. .C(\macro_inst|u_ahb2apb|paddr [10]),
  40781. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40782. .Cin(),
  40783. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [4]),
  40784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40785. .AsyncReset(AsyncReset_X58_Y11_GND),
  40786. .SyncReset(),
  40787. .ShiftData(),
  40788. .SyncLoad(),
  40789. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux4~5_combout ),
  40790. .Cout(),
  40791. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [4]));
  40792. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .coord_x = 20;
  40793. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .coord_y = 7;
  40794. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .coord_z = 13;
  40795. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .mask = 16'h0CAC;
  40796. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .modeMux = 1'b0;
  40797. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .FeedbackMux = 1'b0;
  40798. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .ShiftMux = 1'b0;
  40799. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .BypassEn = 1'b0;
  40800. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[4] .CarryEnb = 1'b1;
  40801. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[5] (
  40802. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40803. .B(\macro_inst|u_uart[1]|u_regs|Mux5~4_combout ),
  40804. .C(\macro_inst|u_uart[1]|u_regs|Mux5~2_combout ),
  40805. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40806. .Cin(),
  40807. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [5]),
  40808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40809. .AsyncReset(AsyncReset_X58_Y11_GND),
  40810. .SyncReset(),
  40811. .ShiftData(),
  40812. .SyncLoad(),
  40813. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux5~5_combout ),
  40814. .Cout(),
  40815. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [5]));
  40816. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .coord_x = 20;
  40817. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .coord_y = 7;
  40818. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .coord_z = 12;
  40819. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .mask = 16'h44E4;
  40820. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .modeMux = 1'b0;
  40821. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .FeedbackMux = 1'b0;
  40822. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .ShiftMux = 1'b0;
  40823. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .BypassEn = 1'b0;
  40824. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[5] .CarryEnb = 1'b1;
  40825. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[6] (
  40826. .A(\macro_inst|u_ahb2apb|paddr [10]),
  40827. .B(\macro_inst|u_ahb2apb|paddr [9]),
  40828. .C(\macro_inst|u_uart[1]|u_regs|Mux6~2_combout ),
  40829. .D(\macro_inst|u_uart[1]|u_regs|Mux6~4_combout ),
  40830. .Cin(),
  40831. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [6]),
  40832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40833. .AsyncReset(AsyncReset_X58_Y11_GND),
  40834. .SyncReset(),
  40835. .ShiftData(),
  40836. .SyncLoad(),
  40837. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux6~5_combout ),
  40838. .Cout(),
  40839. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [6]));
  40840. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .coord_x = 20;
  40841. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .coord_y = 7;
  40842. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .coord_z = 9;
  40843. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .mask = 16'h7520;
  40844. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .modeMux = 1'b0;
  40845. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .FeedbackMux = 1'b0;
  40846. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .ShiftMux = 1'b0;
  40847. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .BypassEn = 1'b0;
  40848. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[6] .CarryEnb = 1'b1;
  40849. alta_slice \macro_inst|u_uart[1]|u_regs|rx_reg[7] (
  40850. .A(\macro_inst|u_uart[1]|u_regs|Mux7~4_combout ),
  40851. .B(\macro_inst|u_uart[1]|u_regs|Mux7~2_combout ),
  40852. .C(\macro_inst|u_ahb2apb|paddr [10]),
  40853. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40854. .Cin(),
  40855. .Qin(\macro_inst|u_uart[1]|u_regs|rx_reg [7]),
  40856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y11_SIG_VCC ),
  40857. .AsyncReset(AsyncReset_X58_Y11_GND),
  40858. .SyncReset(),
  40859. .ShiftData(),
  40860. .SyncLoad(),
  40861. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux7~5_combout ),
  40862. .Cout(),
  40863. .Q(\macro_inst|u_uart[1]|u_regs|rx_reg [7]));
  40864. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .coord_x = 20;
  40865. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .coord_y = 7;
  40866. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .coord_z = 15;
  40867. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .mask = 16'h0ACA;
  40868. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .modeMux = 1'b0;
  40869. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .FeedbackMux = 1'b0;
  40870. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .ShiftMux = 1'b0;
  40871. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .BypassEn = 1'b0;
  40872. defparam \macro_inst|u_uart[1]|u_regs|rx_reg[7] .CarryEnb = 1'b1;
  40873. alta_slice \macro_inst|u_uart[1]|u_regs|status_reg[0] (
  40874. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  40875. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  40876. .C(\macro_inst|u_uart[1]|u_regs|Mux12~1_combout ),
  40877. .D(\macro_inst|u_ahb2apb|paddr [8]),
  40878. .Cin(),
  40879. .Qin(\macro_inst|u_uart[1]|u_regs|status_reg [0]),
  40880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  40881. .AsyncReset(AsyncReset_X57_Y7_GND),
  40882. .SyncReset(SyncReset_X57_Y7_GND),
  40883. .ShiftData(),
  40884. .SyncLoad(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X57_Y7_INV ),
  40885. .LutOut(\macro_inst|u_uart[1]|u_regs|status_reg[0]~0_combout ),
  40886. .Cout(),
  40887. .Q(\macro_inst|u_uart[1]|u_regs|status_reg [0]));
  40888. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .coord_x = 18;
  40889. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .coord_y = 4;
  40890. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .coord_z = 14;
  40891. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .mask = 16'hAACC;
  40892. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .modeMux = 1'b0;
  40893. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .FeedbackMux = 1'b0;
  40894. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .ShiftMux = 1'b0;
  40895. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .BypassEn = 1'b1;
  40896. defparam \macro_inst|u_uart[1]|u_regs|status_reg[0] .CarryEnb = 1'b1;
  40897. alta_slice \macro_inst|u_uart[1]|u_regs|status_reg[1] (
  40898. .A(vcc),
  40899. .B(\macro_inst|u_uart[1]|u_regs|Mux11~2_combout ),
  40900. .C(\macro_inst|u_uart[1]|u_regs|Mux11~0_combout ),
  40901. .D(\macro_inst|u_ahb2apb|paddr [10]),
  40902. .Cin(),
  40903. .Qin(\macro_inst|u_uart[1]|u_regs|status_reg [1]),
  40904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y4_SIG_VCC ),
  40905. .AsyncReset(AsyncReset_X61_Y4_GND),
  40906. .SyncReset(),
  40907. .ShiftData(),
  40908. .SyncLoad(),
  40909. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux11~3_combout ),
  40910. .Cout(),
  40911. .Q(\macro_inst|u_uart[1]|u_regs|status_reg [1]));
  40912. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .coord_x = 14;
  40913. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .coord_y = 9;
  40914. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .coord_z = 8;
  40915. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .mask = 16'h0F03;
  40916. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .modeMux = 1'b0;
  40917. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .FeedbackMux = 1'b0;
  40918. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .ShiftMux = 1'b0;
  40919. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .BypassEn = 1'b0;
  40920. defparam \macro_inst|u_uart[1]|u_regs|status_reg[1] .CarryEnb = 1'b1;
  40921. alta_slice \macro_inst|u_uart[1]|u_regs|status_reg[2] (
  40922. .A(\macro_inst|u_uart[1]|u_regs|status_reg[2]~1_combout ),
  40923. .B(vcc),
  40924. .C(\macro_inst|u_uart[1]|u_regs|Mux10~1_combout ),
  40925. .D(vcc),
  40926. .Cin(),
  40927. .Qin(\macro_inst|u_uart[1]|u_regs|status_reg [2]),
  40928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  40929. .AsyncReset(AsyncReset_X56_Y5_GND),
  40930. .SyncReset(SyncReset_X56_Y5_GND),
  40931. .ShiftData(),
  40932. .SyncLoad(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X56_Y5_INV ),
  40933. .LutOut(\macro_inst|u_uart[1]|u_regs|status_reg[2]~feeder_combout ),
  40934. .Cout(),
  40935. .Q(\macro_inst|u_uart[1]|u_regs|status_reg [2]));
  40936. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .coord_x = 17;
  40937. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .coord_y = 3;
  40938. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .coord_z = 8;
  40939. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .mask = 16'hAAAA;
  40940. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .modeMux = 1'b0;
  40941. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .FeedbackMux = 1'b0;
  40942. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .ShiftMux = 1'b0;
  40943. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .BypassEn = 1'b1;
  40944. defparam \macro_inst|u_uart[1]|u_regs|status_reg[2] .CarryEnb = 1'b1;
  40945. alta_slice \macro_inst|u_uart[1]|u_regs|status_reg[4] (
  40946. .A(\macro_inst|u_uart[1]|u_regs|Mux10~1_combout ),
  40947. .B(vcc),
  40948. .C(\macro_inst|u_uart[1]|u_regs|status_reg[2]~1_combout ),
  40949. .D(\macro_inst|u_ahb2apb|paddr [10]),
  40950. .Cin(),
  40951. .Qin(\macro_inst|u_uart[1]|u_regs|status_reg [4]),
  40952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  40953. .AsyncReset(AsyncReset_X56_Y5_GND),
  40954. .SyncReset(),
  40955. .ShiftData(),
  40956. .SyncLoad(),
  40957. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux8~0_combout ),
  40958. .Cout(),
  40959. .Q(\macro_inst|u_uart[1]|u_regs|status_reg [4]));
  40960. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .coord_x = 17;
  40961. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .coord_y = 3;
  40962. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .coord_z = 10;
  40963. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .mask = 16'h0F55;
  40964. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .modeMux = 1'b0;
  40965. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .FeedbackMux = 1'b0;
  40966. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .ShiftMux = 1'b0;
  40967. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .BypassEn = 1'b0;
  40968. defparam \macro_inst|u_uart[1]|u_regs|status_reg[4] .CarryEnb = 1'b1;
  40969. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] (
  40970. .A(\macro_inst|u_ahb2apb|paddr [8]),
  40971. .B(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [1]),
  40972. .C(\rv32.mem_ahb_hwdata[12] ),
  40973. .D(\macro_inst|u_ahb2apb|paddr [9]),
  40974. .Cin(),
  40975. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [0]),
  40976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X60_Y6_SIG_SIG ),
  40977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  40978. .SyncReset(SyncReset_X60_Y6_GND),
  40979. .ShiftData(),
  40980. .SyncLoad(SyncLoad_X60_Y6_VCC),
  40981. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector0~0_combout ),
  40982. .Cout(),
  40983. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [0]));
  40984. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .coord_x = 18;
  40985. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .coord_y = 7;
  40986. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .coord_z = 5;
  40987. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .mask = 16'hAAD8;
  40988. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .modeMux = 1'b0;
  40989. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .FeedbackMux = 1'b1;
  40990. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .ShiftMux = 1'b0;
  40991. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .BypassEn = 1'b1;
  40992. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[0] .CarryEnb = 1'b1;
  40993. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] (
  40994. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_complete~q ),
  40995. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_idle~q ),
  40996. .C(\rv32.mem_ahb_hwdata[12] ),
  40997. .D(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [1]),
  40998. .Cin(),
  40999. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [1]),
  41000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X60_Y6_SIG_SIG ),
  41001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  41002. .SyncReset(SyncReset_X60_Y6_GND),
  41003. .ShiftData(),
  41004. .SyncLoad(SyncLoad_X60_Y6_VCC),
  41005. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~8_combout ),
  41006. .Cout(),
  41007. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [1]));
  41008. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .coord_x = 18;
  41009. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .coord_y = 7;
  41010. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .coord_z = 7;
  41011. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .mask = 16'hECA0;
  41012. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .modeMux = 1'b0;
  41013. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .FeedbackMux = 1'b1;
  41014. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .ShiftMux = 1'b0;
  41015. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .BypassEn = 1'b1;
  41016. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[1] .CarryEnb = 1'b1;
  41017. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] (
  41018. .A(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  41019. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  41020. .C(\rv32.mem_ahb_hwdata[12] ),
  41021. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  41022. .Cin(),
  41023. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [2]),
  41024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y6_SIG_SIG ),
  41025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  41026. .SyncReset(SyncReset_X58_Y6_GND),
  41027. .ShiftData(),
  41028. .SyncLoad(SyncLoad_X58_Y6_VCC),
  41029. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~0_combout ),
  41030. .Cout(),
  41031. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [2]));
  41032. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .coord_x = 18;
  41033. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .coord_y = 3;
  41034. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .coord_z = 13;
  41035. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .mask = 16'h8800;
  41036. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .modeMux = 1'b0;
  41037. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .FeedbackMux = 1'b0;
  41038. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .ShiftMux = 1'b0;
  41039. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .BypassEn = 1'b1;
  41040. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[2] .CarryEnb = 1'b1;
  41041. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] (
  41042. .A(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [2]),
  41043. .B(\macro_inst|u_ahb2apb|paddr [9]),
  41044. .C(\rv32.mem_ahb_hwdata[12] ),
  41045. .D(\macro_inst|u_uart[1]|u_regs|Selector0~0_combout ),
  41046. .Cin(),
  41047. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [3]),
  41048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X59_Y6_SIG_SIG ),
  41049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  41050. .SyncReset(SyncReset_X59_Y6_GND),
  41051. .ShiftData(),
  41052. .SyncLoad(SyncLoad_X59_Y6_VCC),
  41053. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector0~1_combout ),
  41054. .Cout(),
  41055. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [3]));
  41056. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .coord_x = 18;
  41057. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .coord_y = 6;
  41058. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .coord_z = 4;
  41059. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .mask = 16'hF388;
  41060. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .modeMux = 1'b0;
  41061. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .FeedbackMux = 1'b1;
  41062. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .ShiftMux = 1'b0;
  41063. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .BypassEn = 1'b1;
  41064. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[3] .CarryEnb = 1'b1;
  41065. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] (
  41066. .A(\macro_inst|u_uart[1]|u_regs|rx_idle_ie [4]),
  41067. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_complete~q ),
  41068. .C(\rv32.mem_ahb_hwdata[12] ),
  41069. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_idle~q ),
  41070. .Cin(),
  41071. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [4]),
  41072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  41073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  41074. .SyncReset(SyncReset_X60_Y8_GND),
  41075. .ShiftData(),
  41076. .SyncLoad(SyncLoad_X60_Y8_VCC),
  41077. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~23_combout ),
  41078. .Cout(),
  41079. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [4]));
  41080. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .coord_x = 17;
  41081. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .coord_y = 8;
  41082. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .coord_z = 10;
  41083. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .mask = 16'hEAC0;
  41084. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .modeMux = 1'b0;
  41085. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .FeedbackMux = 1'b1;
  41086. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .ShiftMux = 1'b0;
  41087. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .BypassEn = 1'b1;
  41088. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[4] .CarryEnb = 1'b1;
  41089. alta_slice \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] (
  41090. .A(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [4]),
  41091. .B(\macro_inst|u_uart[1]|u_regs|apb_prdata[11]~9_combout ),
  41092. .C(\rv32.mem_ahb_hwdata[12] ),
  41093. .D(\macro_inst|u_uart[1]|u_regs|Selector0~2_combout ),
  41094. .Cin(),
  41095. .Qin(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [5]),
  41096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y6_SIG_SIG ),
  41097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y6_SIG ),
  41098. .SyncReset(SyncReset_X61_Y6_GND),
  41099. .ShiftData(),
  41100. .SyncLoad(SyncLoad_X61_Y6_VCC),
  41101. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector0~3_combout ),
  41102. .Cout(),
  41103. .Q(\macro_inst|u_uart[1]|u_regs|tx_complete_ie [5]));
  41104. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .coord_x = 16;
  41105. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .coord_y = 8;
  41106. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .coord_z = 8;
  41107. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .mask = 16'hF388;
  41108. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .modeMux = 1'b0;
  41109. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .FeedbackMux = 1'b1;
  41110. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .ShiftMux = 1'b0;
  41111. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .BypassEn = 1'b1;
  41112. defparam \macro_inst|u_uart[1]|u_regs|tx_complete_ie[5] .CarryEnb = 1'b1;
  41113. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] (
  41114. .A(\macro_inst|u_ahb2apb|paddr [8]),
  41115. .B(\macro_inst|u_uart[1]|u_regs|tx_dma_en [1]),
  41116. .C(\rv32.mem_ahb_hwdata[1] ),
  41117. .D(\macro_inst|u_ahb2apb|paddr [9]),
  41118. .Cin(),
  41119. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [0]),
  41120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[0]~4_combout_X59_Y8_SIG_SIG ),
  41121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41122. .SyncReset(SyncReset_X59_Y8_GND),
  41123. .ShiftData(),
  41124. .SyncLoad(SyncLoad_X59_Y8_VCC),
  41125. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~10_combout ),
  41126. .Cout(),
  41127. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [0]));
  41128. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .coord_x = 19;
  41129. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .coord_y = 8;
  41130. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .coord_z = 11;
  41131. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .mask = 16'hAAD8;
  41132. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .modeMux = 1'b0;
  41133. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .FeedbackMux = 1'b1;
  41134. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .ShiftMux = 1'b0;
  41135. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .BypassEn = 1'b1;
  41136. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[0] .CarryEnb = 1'b1;
  41137. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] (
  41138. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  41139. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  41140. .C(\rv32.mem_ahb_hwdata[1] ),
  41141. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  41142. .Cin(),
  41143. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [1]),
  41144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[1]~3_combout_X59_Y8_SIG_SIG ),
  41145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y8_SIG ),
  41146. .SyncReset(SyncReset_X59_Y8_GND),
  41147. .ShiftData(),
  41148. .SyncLoad(SyncLoad_X59_Y8_VCC),
  41149. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~0_combout ),
  41150. .Cout(),
  41151. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [1]));
  41152. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .coord_x = 19;
  41153. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .coord_y = 8;
  41154. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .coord_z = 15;
  41155. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .mask = 16'h7700;
  41156. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .modeMux = 1'b0;
  41157. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .FeedbackMux = 1'b0;
  41158. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .ShiftMux = 1'b0;
  41159. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .BypassEn = 1'b1;
  41160. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[1] .CarryEnb = 1'b1;
  41161. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] (
  41162. .A(\macro_inst|u_uart[1]|u_regs|always8~1_combout ),
  41163. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  41164. .C(\rv32.mem_ahb_hwdata[1] ),
  41165. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41166. .Cin(),
  41167. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [2]),
  41168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout_X56_Y4_SIG_SIG ),
  41169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  41170. .SyncReset(SyncReset_X56_Y4_GND),
  41171. .ShiftData(),
  41172. .SyncLoad(SyncLoad_X56_Y4_VCC),
  41173. .LutOut(\macro_inst|u_uart[1]|u_regs|rx_dma_en[2]~2_combout ),
  41174. .Cout(),
  41175. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [2]));
  41176. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .coord_x = 18;
  41177. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .coord_y = 5;
  41178. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .coord_z = 6;
  41179. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .mask = 16'h8800;
  41180. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .modeMux = 1'b0;
  41181. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .FeedbackMux = 1'b0;
  41182. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .ShiftMux = 1'b0;
  41183. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .BypassEn = 1'b1;
  41184. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[2] .CarryEnb = 1'b1;
  41185. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] (
  41186. .A(\macro_inst|u_uart[1]|u_regs|tx_dma_en [2]),
  41187. .B(\macro_inst|u_ahb2apb|paddr [9]),
  41188. .C(\rv32.mem_ahb_hwdata[1] ),
  41189. .D(\macro_inst|u_uart[1]|u_regs|Selector11~10_combout ),
  41190. .Cin(),
  41191. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [3]),
  41192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[3]~6_combout_X56_Y4_SIG_SIG ),
  41193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y4_SIG ),
  41194. .SyncReset(SyncReset_X56_Y4_GND),
  41195. .ShiftData(),
  41196. .SyncLoad(SyncLoad_X56_Y4_VCC),
  41197. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~11_combout ),
  41198. .Cout(),
  41199. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [3]));
  41200. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .coord_x = 18;
  41201. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .coord_y = 5;
  41202. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .coord_z = 13;
  41203. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .mask = 16'hF388;
  41204. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .modeMux = 1'b0;
  41205. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .FeedbackMux = 1'b1;
  41206. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .ShiftMux = 1'b0;
  41207. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .BypassEn = 1'b1;
  41208. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[3] .CarryEnb = 1'b1;
  41209. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] (
  41210. .A(),
  41211. .B(),
  41212. .C(vcc),
  41213. .D(\rv32.mem_ahb_hwdata[1] ),
  41214. .Cin(),
  41215. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [4]),
  41216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[4]~1_combout_X46_Y2_SIG_SIG ),
  41217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X46_Y2_SIG ),
  41218. .SyncReset(),
  41219. .ShiftData(),
  41220. .SyncLoad(),
  41221. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_dma_en[4]__feeder__LutOut ),
  41222. .Cout(),
  41223. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [4]));
  41224. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .coord_x = 7;
  41225. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .coord_y = 2;
  41226. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .coord_z = 8;
  41227. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .mask = 16'hFF00;
  41228. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .modeMux = 1'b1;
  41229. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .FeedbackMux = 1'b0;
  41230. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .ShiftMux = 1'b0;
  41231. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .BypassEn = 1'b0;
  41232. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[4] .CarryEnb = 1'b1;
  41233. alta_slice \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] (
  41234. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[1]~9_combout ),
  41235. .B(\macro_inst|u_uart[1]|u_regs|tx_dma_en [4]),
  41236. .C(\rv32.mem_ahb_hwdata[1] ),
  41237. .D(\macro_inst|u_uart[1]|u_regs|Selector11~13_combout ),
  41238. .Cin(),
  41239. .Qin(\macro_inst|u_uart[1]|u_regs|tx_dma_en [5]),
  41240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_dma_en[5]~0_combout_X60_Y4_SIG_SIG ),
  41241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y4_SIG ),
  41242. .SyncReset(SyncReset_X60_Y4_GND),
  41243. .ShiftData(),
  41244. .SyncLoad(SyncLoad_X60_Y4_VCC),
  41245. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector11~14_combout ),
  41246. .Cout(),
  41247. .Q(\macro_inst|u_uart[1]|u_regs|tx_dma_en [5]));
  41248. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .coord_x = 16;
  41249. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .coord_y = 7;
  41250. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .coord_z = 3;
  41251. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .mask = 16'hDDA0;
  41252. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .modeMux = 1'b0;
  41253. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .FeedbackMux = 1'b1;
  41254. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .ShiftMux = 1'b0;
  41255. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .BypassEn = 1'b1;
  41256. defparam \macro_inst|u_uart[1]|u_regs|tx_dma_en[5] .CarryEnb = 1'b1;
  41257. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] (
  41258. .A(\macro_inst|u_ahb2apb|paddr [9]),
  41259. .B(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [2]),
  41260. .C(\rv32.mem_ahb_hwdata[5] ),
  41261. .D(\macro_inst|u_ahb2apb|paddr [8]),
  41262. .Cin(),
  41263. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [0]),
  41264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[0]~15_combout_X59_Y7_SIG_SIG ),
  41265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y7_SIG ),
  41266. .SyncReset(SyncReset_X59_Y7_GND),
  41267. .ShiftData(),
  41268. .SyncLoad(SyncLoad_X59_Y7_VCC),
  41269. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~10_combout ),
  41270. .Cout(),
  41271. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [0]));
  41272. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .coord_x = 17;
  41273. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .coord_y = 7;
  41274. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .coord_z = 13;
  41275. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .mask = 16'hFFD8;
  41276. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .modeMux = 1'b0;
  41277. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .FeedbackMux = 1'b1;
  41278. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .ShiftMux = 1'b0;
  41279. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .BypassEn = 1'b1;
  41280. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[0] .CarryEnb = 1'b1;
  41281. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] (
  41282. .A(\macro_inst|u_ahb2apb|paddr [8]),
  41283. .B(\macro_inst|u_ahb2apb|paddr [9]),
  41284. .C(\rv32.mem_ahb_hwdata[5] ),
  41285. .D(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [3]),
  41286. .Cin(),
  41287. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [1]),
  41288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[1]~8_combout_X60_Y6_SIG_SIG ),
  41289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y6_SIG ),
  41290. .SyncReset(SyncReset_X60_Y6_GND),
  41291. .ShiftData(),
  41292. .SyncLoad(SyncLoad_X60_Y6_VCC),
  41293. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~11_combout ),
  41294. .Cout(),
  41295. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [1]));
  41296. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .coord_x = 18;
  41297. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .coord_y = 7;
  41298. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .coord_z = 10;
  41299. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .mask = 16'hFD75;
  41300. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .modeMux = 1'b0;
  41301. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .FeedbackMux = 1'b1;
  41302. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .ShiftMux = 1'b0;
  41303. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .BypassEn = 1'b1;
  41304. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[1] .CarryEnb = 1'b1;
  41305. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] (
  41306. .A(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [2]),
  41307. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  41308. .C(\rv32.mem_ahb_hwdata[5] ),
  41309. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  41310. .Cin(),
  41311. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [2]),
  41312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[2]~9_combout_X58_Y7_SIG_SIG ),
  41313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  41314. .SyncReset(SyncReset_X58_Y7_GND),
  41315. .ShiftData(),
  41316. .SyncLoad(SyncLoad_X58_Y7_VCC),
  41317. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~10_combout ),
  41318. .Cout(),
  41319. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [2]));
  41320. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .coord_x = 17;
  41321. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .coord_y = 5;
  41322. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .coord_z = 0;
  41323. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .mask = 16'hBA30;
  41324. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .modeMux = 1'b0;
  41325. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .FeedbackMux = 1'b1;
  41326. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .ShiftMux = 1'b0;
  41327. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .BypassEn = 1'b1;
  41328. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[2] .CarryEnb = 1'b1;
  41329. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] (
  41330. .A(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [3]),
  41331. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  41332. .C(\rv32.mem_ahb_hwdata[5] ),
  41333. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  41334. .Cin(),
  41335. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [3]),
  41336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[3]~10_combout_X60_Y7_SIG_SIG ),
  41337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  41338. .SyncReset(SyncReset_X60_Y7_GND),
  41339. .ShiftData(),
  41340. .SyncLoad(SyncLoad_X60_Y7_VCC),
  41341. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~15_combout ),
  41342. .Cout(),
  41343. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [3]));
  41344. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .coord_x = 18;
  41345. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .coord_y = 9;
  41346. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .coord_z = 0;
  41347. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .mask = 16'h88F8;
  41348. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .modeMux = 1'b0;
  41349. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .FeedbackMux = 1'b1;
  41350. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .ShiftMux = 1'b0;
  41351. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .BypassEn = 1'b1;
  41352. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[3] .CarryEnb = 1'b1;
  41353. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] (
  41354. .A(\macro_inst|u_uart[0]|u_regs|apb_prdata[4]~17_combout ),
  41355. .B(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [5]),
  41356. .C(\rv32.mem_ahb_hwdata[5] ),
  41357. .D(vcc),
  41358. .Cin(),
  41359. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [4]),
  41360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[4]~12_combout_X60_Y8_SIG_SIG ),
  41361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  41362. .SyncReset(SyncReset_X60_Y8_GND),
  41363. .ShiftData(),
  41364. .SyncLoad(SyncLoad_X60_Y8_VCC),
  41365. .LutOut(\macro_inst|u_uart[1]|u_regs|Selector7~9_combout ),
  41366. .Cout(),
  41367. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [4]));
  41368. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .coord_x = 17;
  41369. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .coord_y = 8;
  41370. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .coord_z = 0;
  41371. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .mask = 16'hD8D8;
  41372. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .modeMux = 1'b0;
  41373. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .FeedbackMux = 1'b1;
  41374. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .ShiftMux = 1'b0;
  41375. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .BypassEn = 1'b1;
  41376. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[4] .CarryEnb = 1'b1;
  41377. alta_slice \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] (
  41378. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  41379. .B(\macro_inst|u_uart[1]|u_regs|rx_not_empty_ie [5]),
  41380. .C(\rv32.mem_ahb_hwdata[5] ),
  41381. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  41382. .Cin(),
  41383. .Qin(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [5]),
  41384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_regs|rx_not_empty_ie[5]~14_combout_X61_Y7_SIG_SIG ),
  41385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  41386. .SyncReset(SyncReset_X61_Y7_GND),
  41387. .ShiftData(),
  41388. .SyncLoad(SyncLoad_X61_Y7_VCC),
  41389. .LutOut(\macro_inst|u_uart[1]|u_regs|interrupts~25_combout ),
  41390. .Cout(),
  41391. .Q(\macro_inst|u_uart[1]|u_regs|tx_not_full_ie [5]));
  41392. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .coord_x = 17;
  41393. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .coord_y = 9;
  41394. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .coord_z = 13;
  41395. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .mask = 16'h88F8;
  41396. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .modeMux = 1'b0;
  41397. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .FeedbackMux = 1'b1;
  41398. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .ShiftMux = 1'b0;
  41399. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .BypassEn = 1'b1;
  41400. defparam \macro_inst|u_uart[1]|u_regs|tx_not_full_ie[5] .CarryEnb = 1'b1;
  41401. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[0] (
  41402. .A(vcc),
  41403. .B(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41404. .C(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41405. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  41406. .Cin(),
  41407. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [0]),
  41408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  41409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  41410. .SyncReset(),
  41411. .ShiftData(),
  41412. .SyncLoad(),
  41413. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~0_combout ),
  41414. .Cout(),
  41415. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [0]));
  41416. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .coord_x = 19;
  41417. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .coord_y = 4;
  41418. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .coord_z = 5;
  41419. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .mask = 16'hC000;
  41420. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .modeMux = 1'b0;
  41421. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .FeedbackMux = 1'b0;
  41422. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .ShiftMux = 1'b0;
  41423. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .BypassEn = 1'b0;
  41424. defparam \macro_inst|u_uart[1]|u_regs|tx_write[0] .CarryEnb = 1'b1;
  41425. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[1] (
  41426. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  41427. .B(vcc),
  41428. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41429. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41430. .Cin(),
  41431. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [1]),
  41432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  41433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  41434. .SyncReset(),
  41435. .ShiftData(),
  41436. .SyncLoad(),
  41437. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~1_combout ),
  41438. .Cout(),
  41439. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [1]));
  41440. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .coord_x = 18;
  41441. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .coord_y = 8;
  41442. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .coord_z = 8;
  41443. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .mask = 16'hA000;
  41444. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .modeMux = 1'b0;
  41445. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .FeedbackMux = 1'b0;
  41446. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .ShiftMux = 1'b0;
  41447. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .BypassEn = 1'b0;
  41448. defparam \macro_inst|u_uart[1]|u_regs|tx_write[1] .CarryEnb = 1'b1;
  41449. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[2] (
  41450. .A(vcc),
  41451. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  41452. .C(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41453. .D(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41454. .Cin(),
  41455. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [2]),
  41456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y4_SIG_VCC ),
  41457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X54_Y4_SIG ),
  41458. .SyncReset(),
  41459. .ShiftData(),
  41460. .SyncLoad(),
  41461. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~2_combout ),
  41462. .Cout(),
  41463. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [2]));
  41464. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .coord_x = 19;
  41465. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .coord_y = 2;
  41466. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .coord_z = 12;
  41467. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .mask = 16'hC000;
  41468. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .modeMux = 1'b0;
  41469. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .FeedbackMux = 1'b0;
  41470. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .ShiftMux = 1'b0;
  41471. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .BypassEn = 1'b0;
  41472. defparam \macro_inst|u_uart[1]|u_regs|tx_write[2] .CarryEnb = 1'b1;
  41473. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[3] (
  41474. .A(vcc),
  41475. .B(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41476. .C(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[3]~15_combout ),
  41477. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41478. .Cin(),
  41479. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [3]),
  41480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  41481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  41482. .SyncReset(),
  41483. .ShiftData(),
  41484. .SyncLoad(),
  41485. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~3_combout ),
  41486. .Cout(),
  41487. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [3]));
  41488. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .coord_x = 17;
  41489. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .coord_y = 9;
  41490. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .coord_z = 10;
  41491. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .mask = 16'hC000;
  41492. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .modeMux = 1'b0;
  41493. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .FeedbackMux = 1'b0;
  41494. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .ShiftMux = 1'b0;
  41495. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .BypassEn = 1'b0;
  41496. defparam \macro_inst|u_uart[1]|u_regs|tx_write[3] .CarryEnb = 1'b1;
  41497. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[4] (
  41498. .A(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  41499. .B(\macro_inst|u_ahb2apb|paddr [8]),
  41500. .C(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41501. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41502. .Cin(),
  41503. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [4]),
  41504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  41505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  41506. .SyncReset(),
  41507. .ShiftData(),
  41508. .SyncLoad(),
  41509. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~4_combout ),
  41510. .Cout(),
  41511. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [4]));
  41512. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .coord_x = 18;
  41513. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .coord_y = 8;
  41514. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .coord_z = 0;
  41515. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .mask = 16'h2000;
  41516. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .modeMux = 1'b0;
  41517. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .FeedbackMux = 1'b0;
  41518. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .ShiftMux = 1'b0;
  41519. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .BypassEn = 1'b0;
  41520. defparam \macro_inst|u_uart[1]|u_regs|tx_write[4] .CarryEnb = 1'b1;
  41521. alta_slice \macro_inst|u_uart[1]|u_regs|tx_write[5] (
  41522. .A(\macro_inst|u_uart[1]|u_regs|Equal2~2_combout ),
  41523. .B(\macro_inst|u_ahb2apb|paddr [8]),
  41524. .C(\macro_inst|u_uart[1]|u_regs|ShiftLeft0~0_combout ),
  41525. .D(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41526. .Cin(),
  41527. .Qin(\macro_inst|u_uart[1]|u_regs|tx_write [5]),
  41528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  41529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  41530. .SyncReset(),
  41531. .ShiftData(),
  41532. .SyncLoad(),
  41533. .LutOut(\macro_inst|u_uart[1]|u_regs|tx_write~5_combout ),
  41534. .Cout(),
  41535. .Q(\macro_inst|u_uart[1]|u_regs|tx_write [5]));
  41536. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .coord_x = 17;
  41537. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .coord_y = 9;
  41538. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .coord_z = 4;
  41539. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .mask = 16'h8000;
  41540. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .modeMux = 1'b0;
  41541. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .FeedbackMux = 1'b0;
  41542. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .ShiftMux = 1'b0;
  41543. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .BypassEn = 1'b0;
  41544. defparam \macro_inst|u_uart[1]|u_regs|tx_write[5] .CarryEnb = 1'b1;
  41545. alta_slice \macro_inst|u_uart[1]|u_regs|uart_en (
  41546. .A(\macro_inst|u_uart[1]|u_regs|apb_write~0_combout ),
  41547. .B(\rv32.mem_ahb_hwdata[0] ),
  41548. .C(vcc),
  41549. .D(\macro_inst|u_uart[0]|u_regs|always6~0_combout ),
  41550. .Cin(),
  41551. .Qin(\macro_inst|u_uart[1]|u_regs|uart_en~q ),
  41552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  41553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  41554. .SyncReset(),
  41555. .ShiftData(),
  41556. .SyncLoad(),
  41557. .LutOut(\macro_inst|u_uart[1]|u_regs|uart_en~0_combout ),
  41558. .Cout(),
  41559. .Q(\macro_inst|u_uart[1]|u_regs|uart_en~q ));
  41560. defparam \macro_inst|u_uart[1]|u_regs|uart_en .coord_x = 17;
  41561. defparam \macro_inst|u_uart[1]|u_regs|uart_en .coord_y = 8;
  41562. defparam \macro_inst|u_uart[1]|u_regs|uart_en .coord_z = 2;
  41563. defparam \macro_inst|u_uart[1]|u_regs|uart_en .mask = 16'hD8F0;
  41564. defparam \macro_inst|u_uart[1]|u_regs|uart_en .modeMux = 1'b0;
  41565. defparam \macro_inst|u_uart[1]|u_regs|uart_en .FeedbackMux = 1'b1;
  41566. defparam \macro_inst|u_uart[1]|u_regs|uart_en .ShiftMux = 1'b0;
  41567. defparam \macro_inst|u_uart[1]|u_regs|uart_en .BypassEn = 1'b0;
  41568. defparam \macro_inst|u_uart[1]|u_regs|uart_en .CarryEnb = 1'b1;
  41569. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Add4~0 (
  41570. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2]),
  41571. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [3]),
  41572. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]),
  41573. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]),
  41574. .Cin(),
  41575. .Qin(),
  41576. .Clk(),
  41577. .AsyncReset(),
  41578. .SyncReset(),
  41579. .ShiftData(),
  41580. .SyncLoad(),
  41581. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Add4~0_combout ),
  41582. .Cout(),
  41583. .Q());
  41584. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .coord_x = 19;
  41585. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .coord_y = 2;
  41586. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .coord_z = 6;
  41587. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .mask = 16'h3336;
  41588. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .modeMux = 1'b0;
  41589. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .FeedbackMux = 1'b0;
  41590. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .ShiftMux = 1'b0;
  41591. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .BypassEn = 1'b0;
  41592. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~0 .CarryEnb = 1'b1;
  41593. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Add4~1 (
  41594. .A(vcc),
  41595. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2]),
  41596. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]),
  41597. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]),
  41598. .Cin(),
  41599. .Qin(),
  41600. .Clk(),
  41601. .AsyncReset(),
  41602. .SyncReset(),
  41603. .ShiftData(),
  41604. .SyncLoad(),
  41605. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Add4~1_combout ),
  41606. .Cout(),
  41607. .Q());
  41608. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .coord_x = 19;
  41609. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .coord_y = 2;
  41610. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .coord_z = 1;
  41611. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .mask = 16'h333C;
  41612. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .modeMux = 1'b0;
  41613. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .FeedbackMux = 1'b0;
  41614. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .ShiftMux = 1'b0;
  41615. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .BypassEn = 1'b0;
  41616. defparam \macro_inst|u_uart[1]|u_rx[0]|Add4~1 .CarryEnb = 1'b1;
  41617. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 (
  41618. .A(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  41619. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  41620. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ),
  41621. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  41622. .Cin(),
  41623. .Qin(),
  41624. .Clk(),
  41625. .AsyncReset(),
  41626. .SyncReset(),
  41627. .ShiftData(),
  41628. .SyncLoad(),
  41629. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  41630. .Cout(),
  41631. .Q());
  41632. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .coord_x = 19;
  41633. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .coord_y = 6;
  41634. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .coord_z = 5;
  41635. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .mask = 16'h0020;
  41636. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .modeMux = 1'b0;
  41637. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .FeedbackMux = 1'b0;
  41638. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .ShiftMux = 1'b0;
  41639. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .BypassEn = 1'b0;
  41640. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~1 .CarryEnb = 1'b1;
  41641. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 (
  41642. .A(vcc),
  41643. .B(vcc),
  41644. .C(\macro_inst|u_uart[1]|u_rx[0]|Selector4~1_combout ),
  41645. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  41646. .Cin(),
  41647. .Qin(),
  41648. .Clk(),
  41649. .AsyncReset(),
  41650. .SyncReset(),
  41651. .ShiftData(),
  41652. .SyncLoad(),
  41653. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~3_combout ),
  41654. .Cout(),
  41655. .Q());
  41656. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .coord_x = 20;
  41657. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .coord_y = 2;
  41658. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .coord_z = 6;
  41659. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .mask = 16'hF000;
  41660. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .modeMux = 1'b0;
  41661. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .FeedbackMux = 1'b0;
  41662. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .ShiftMux = 1'b0;
  41663. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .BypassEn = 1'b0;
  41664. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~3 .CarryEnb = 1'b1;
  41665. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 (
  41666. .A(\macro_inst|u_uart[1]|u_rx[0]|Selector2~3_combout ),
  41667. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  41668. .C(\macro_inst|u_uart[1]|u_rx[0]|always3~2_combout ),
  41669. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  41670. .Cin(),
  41671. .Qin(),
  41672. .Clk(),
  41673. .AsyncReset(),
  41674. .SyncReset(),
  41675. .ShiftData(),
  41676. .SyncLoad(),
  41677. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~4_combout ),
  41678. .Cout(),
  41679. .Q());
  41680. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .coord_x = 20;
  41681. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .coord_y = 2;
  41682. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .coord_z = 13;
  41683. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .mask = 16'hFE00;
  41684. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .modeMux = 1'b0;
  41685. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .FeedbackMux = 1'b0;
  41686. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .ShiftMux = 1'b0;
  41687. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .BypassEn = 1'b0;
  41688. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~4 .CarryEnb = 1'b1;
  41689. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 (
  41690. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ),
  41691. .B(\macro_inst|u_uart[1]|u_rx[0]|Selector2~4_combout ),
  41692. .C(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  41693. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41694. .Cin(),
  41695. .Qin(),
  41696. .Clk(),
  41697. .AsyncReset(),
  41698. .SyncReset(),
  41699. .ShiftData(),
  41700. .SyncLoad(),
  41701. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~5_combout ),
  41702. .Cout(),
  41703. .Q());
  41704. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .coord_x = 20;
  41705. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .coord_y = 2;
  41706. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .coord_z = 15;
  41707. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .mask = 16'h3200;
  41708. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .modeMux = 1'b0;
  41709. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .FeedbackMux = 1'b0;
  41710. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .ShiftMux = 1'b0;
  41711. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .BypassEn = 1'b0;
  41712. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector2~5 .CarryEnb = 1'b1;
  41713. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 (
  41714. .A(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  41715. .B(vcc),
  41716. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41717. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  41718. .Cin(),
  41719. .Qin(),
  41720. .Clk(),
  41721. .AsyncReset(),
  41722. .SyncReset(),
  41723. .ShiftData(),
  41724. .SyncLoad(),
  41725. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector3~0_combout ),
  41726. .Cout(),
  41727. .Q());
  41728. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .coord_x = 19;
  41729. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .coord_y = 2;
  41730. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .coord_z = 14;
  41731. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .mask = 16'hA000;
  41732. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .modeMux = 1'b0;
  41733. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .FeedbackMux = 1'b0;
  41734. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .ShiftMux = 1'b0;
  41735. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .BypassEn = 1'b0;
  41736. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector3~0 .CarryEnb = 1'b1;
  41737. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 (
  41738. .A(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  41739. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  41740. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41741. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  41742. .Cin(),
  41743. .Qin(),
  41744. .Clk(),
  41745. .AsyncReset(),
  41746. .SyncReset(),
  41747. .ShiftData(),
  41748. .SyncLoad(),
  41749. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector4~0_combout ),
  41750. .Cout(),
  41751. .Q());
  41752. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .coord_x = 20;
  41753. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .coord_y = 2;
  41754. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .coord_z = 12;
  41755. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .mask = 16'hCC80;
  41756. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .modeMux = 1'b0;
  41757. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .FeedbackMux = 1'b0;
  41758. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .ShiftMux = 1'b0;
  41759. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .BypassEn = 1'b0;
  41760. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~0 .CarryEnb = 1'b1;
  41761. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 (
  41762. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3]),
  41763. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  41764. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  41765. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0]),
  41766. .Cin(),
  41767. .Qin(),
  41768. .Clk(),
  41769. .AsyncReset(),
  41770. .SyncReset(),
  41771. .ShiftData(),
  41772. .SyncLoad(),
  41773. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector4~1_combout ),
  41774. .Cout(),
  41775. .Q());
  41776. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .coord_x = 20;
  41777. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .coord_y = 8;
  41778. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .coord_z = 9;
  41779. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .mask = 16'h0001;
  41780. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .modeMux = 1'b0;
  41781. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .FeedbackMux = 1'b0;
  41782. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .ShiftMux = 1'b0;
  41783. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .BypassEn = 1'b0;
  41784. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~1 .CarryEnb = 1'b1;
  41785. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 (
  41786. .A(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  41787. .B(\macro_inst|u_uart[1]|u_rx[0]|Selector4~2_combout ),
  41788. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ),
  41789. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  41790. .Cin(),
  41791. .Qin(),
  41792. .Clk(),
  41793. .AsyncReset(),
  41794. .SyncReset(),
  41795. .ShiftData(),
  41796. .SyncLoad(),
  41797. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector4~3_combout ),
  41798. .Cout(),
  41799. .Q());
  41800. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .coord_x = 20;
  41801. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .coord_y = 2;
  41802. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .coord_z = 5;
  41803. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .mask = 16'hE5C5;
  41804. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .modeMux = 1'b0;
  41805. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .FeedbackMux = 1'b0;
  41806. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .ShiftMux = 1'b0;
  41807. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .BypassEn = 1'b0;
  41808. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~3 .CarryEnb = 1'b1;
  41809. alta_slice \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 (
  41810. .A(\macro_inst|u_uart[1]|u_rx[0]|Selector4~0_combout ),
  41811. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  41812. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41813. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector4~3_combout ),
  41814. .Cin(),
  41815. .Qin(),
  41816. .Clk(),
  41817. .AsyncReset(),
  41818. .SyncReset(),
  41819. .ShiftData(),
  41820. .SyncLoad(),
  41821. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector4~4_combout ),
  41822. .Cout(),
  41823. .Q());
  41824. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .coord_x = 20;
  41825. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .coord_y = 2;
  41826. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .coord_z = 0;
  41827. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .mask = 16'hABAA;
  41828. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .modeMux = 1'b0;
  41829. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .FeedbackMux = 1'b0;
  41830. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .ShiftMux = 1'b0;
  41831. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .BypassEn = 1'b0;
  41832. defparam \macro_inst|u_uart[1]|u_rx[0]|Selector4~4 .CarryEnb = 1'b1;
  41833. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always11~2 (
  41834. .A(\macro_inst|u_uart[1]|u_rx[0]|always11~0_combout ),
  41835. .B(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  41836. .C(\macro_inst|u_uart[1]|u_rx[0]|always11~1_combout ),
  41837. .D(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  41838. .Cin(),
  41839. .Qin(),
  41840. .Clk(),
  41841. .AsyncReset(),
  41842. .SyncReset(),
  41843. .ShiftData(),
  41844. .SyncLoad(),
  41845. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always11~2_combout ),
  41846. .Cout(),
  41847. .Q());
  41848. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .coord_x = 19;
  41849. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .coord_y = 6;
  41850. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .coord_z = 1;
  41851. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .mask = 16'h0080;
  41852. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .modeMux = 1'b0;
  41853. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .FeedbackMux = 1'b0;
  41854. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .ShiftMux = 1'b0;
  41855. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .BypassEn = 1'b0;
  41856. defparam \macro_inst|u_uart[1]|u_rx[0]|always11~2 .CarryEnb = 1'b1;
  41857. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always3~1 (
  41858. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2]),
  41859. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [3]),
  41860. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]),
  41861. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]),
  41862. .Cin(),
  41863. .Qin(),
  41864. .Clk(),
  41865. .AsyncReset(),
  41866. .SyncReset(),
  41867. .ShiftData(),
  41868. .SyncLoad(),
  41869. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  41870. .Cout(),
  41871. .Q());
  41872. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .coord_x = 19;
  41873. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .coord_y = 2;
  41874. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .coord_z = 10;
  41875. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .mask = 16'h0001;
  41876. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .modeMux = 1'b0;
  41877. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .FeedbackMux = 1'b0;
  41878. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .ShiftMux = 1'b0;
  41879. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .BypassEn = 1'b0;
  41880. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~1 .CarryEnb = 1'b1;
  41881. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always3~2 (
  41882. .A(vcc),
  41883. .B(vcc),
  41884. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41885. .D(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  41886. .Cin(),
  41887. .Qin(),
  41888. .Clk(),
  41889. .AsyncReset(),
  41890. .SyncReset(),
  41891. .ShiftData(),
  41892. .SyncLoad(),
  41893. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always3~2_combout ),
  41894. .Cout(),
  41895. .Q());
  41896. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .coord_x = 19;
  41897. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .coord_y = 2;
  41898. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .coord_z = 11;
  41899. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .mask = 16'hF000;
  41900. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .modeMux = 1'b0;
  41901. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .FeedbackMux = 1'b0;
  41902. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .ShiftMux = 1'b0;
  41903. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .BypassEn = 1'b0;
  41904. defparam \macro_inst|u_uart[1]|u_rx[0]|always3~2 .CarryEnb = 1'b1;
  41905. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always4~2 (
  41906. .A(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  41907. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  41908. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  41909. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  41910. .Cin(),
  41911. .Qin(),
  41912. .Clk(),
  41913. .AsyncReset(),
  41914. .SyncReset(),
  41915. .ShiftData(),
  41916. .SyncLoad(),
  41917. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always4~2_combout ),
  41918. .Cout(),
  41919. .Q());
  41920. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .coord_x = 19;
  41921. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .coord_y = 6;
  41922. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .coord_z = 15;
  41923. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .mask = 16'h0020;
  41924. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .modeMux = 1'b0;
  41925. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .FeedbackMux = 1'b0;
  41926. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .ShiftMux = 1'b0;
  41927. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .BypassEn = 1'b0;
  41928. defparam \macro_inst|u_uart[1]|u_rx[0]|always4~2 .CarryEnb = 1'b1;
  41929. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always6~1 (
  41930. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_in [2]),
  41931. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_in [4]),
  41932. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ),
  41933. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_in [3]),
  41934. .Cin(),
  41935. .Qin(),
  41936. .Clk(),
  41937. .AsyncReset(),
  41938. .SyncReset(),
  41939. .ShiftData(),
  41940. .SyncLoad(),
  41941. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout ),
  41942. .Cout(),
  41943. .Q());
  41944. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .coord_x = 20;
  41945. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .coord_y = 8;
  41946. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .coord_z = 14;
  41947. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .mask = 16'h0B02;
  41948. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .modeMux = 1'b0;
  41949. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .FeedbackMux = 1'b0;
  41950. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .ShiftMux = 1'b0;
  41951. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .BypassEn = 1'b0;
  41952. defparam \macro_inst|u_uart[1]|u_rx[0]|always6~1 .CarryEnb = 1'b1;
  41953. alta_slice \macro_inst|u_uart[1]|u_rx[0]|always8~0 (
  41954. .A(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  41955. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  41956. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~q ),
  41957. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ),
  41958. .Cin(),
  41959. .Qin(),
  41960. .Clk(),
  41961. .AsyncReset(),
  41962. .SyncReset(),
  41963. .ShiftData(),
  41964. .SyncLoad(),
  41965. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always8~0_combout ),
  41966. .Cout(),
  41967. .Q());
  41968. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .coord_x = 19;
  41969. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .coord_y = 2;
  41970. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .coord_z = 2;
  41971. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .mask = 16'h0080;
  41972. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .modeMux = 1'b0;
  41973. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .FeedbackMux = 1'b0;
  41974. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .ShiftMux = 1'b0;
  41975. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .BypassEn = 1'b0;
  41976. defparam \macro_inst|u_uart[1]|u_rx[0]|always8~0 .CarryEnb = 1'b1;
  41977. alta_slice \macro_inst|u_uart[1]|u_rx[0]|break_error (
  41978. .A(vcc),
  41979. .B(\macro_inst|u_uart[1]|u_rx[0]|always11~2_combout ),
  41980. .C(vcc),
  41981. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  41982. .Cin(),
  41983. .Qin(\macro_inst|u_uart[1]|u_rx[0]|break_error~q ),
  41984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  41985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  41986. .SyncReset(),
  41987. .ShiftData(),
  41988. .SyncLoad(),
  41989. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|break_error~0_combout ),
  41990. .Cout(),
  41991. .Q(\macro_inst|u_uart[1]|u_rx[0]|break_error~q ));
  41992. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .coord_x = 18;
  41993. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .coord_y = 6;
  41994. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .coord_z = 11;
  41995. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .mask = 16'hFCCC;
  41996. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .modeMux = 1'b0;
  41997. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .FeedbackMux = 1'b1;
  41998. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .ShiftMux = 1'b0;
  41999. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .BypassEn = 1'b0;
  42000. defparam \macro_inst|u_uart[1]|u_rx[0]|break_error .CarryEnb = 1'b1;
  42001. alta_slice \macro_inst|u_uart[1]|u_rx[0]|framing_error (
  42002. .A(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  42003. .B(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  42004. .C(vcc),
  42005. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  42006. .Cin(),
  42007. .Qin(\macro_inst|u_uart[1]|u_rx[0]|framing_error~q ),
  42008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  42009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  42010. .SyncReset(),
  42011. .ShiftData(),
  42012. .SyncLoad(),
  42013. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|framing_error~0_combout ),
  42014. .Cout(),
  42015. .Q(\macro_inst|u_uart[1]|u_rx[0]|framing_error~q ));
  42016. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .coord_x = 18;
  42017. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .coord_y = 6;
  42018. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .coord_z = 5;
  42019. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .mask = 16'hF222;
  42020. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .modeMux = 1'b0;
  42021. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .FeedbackMux = 1'b1;
  42022. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .ShiftMux = 1'b0;
  42023. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .BypassEn = 1'b0;
  42024. defparam \macro_inst|u_uart[1]|u_rx[0]|framing_error .CarryEnb = 1'b1;
  42025. alta_slice \macro_inst|u_uart[1]|u_rx[0]|overrun_error (
  42026. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  42027. .B(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  42028. .C(vcc),
  42029. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  42030. .Cin(),
  42031. .Qin(\macro_inst|u_uart[1]|u_rx[0]|overrun_error~q ),
  42032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ),
  42033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  42034. .SyncReset(),
  42035. .ShiftData(),
  42036. .SyncLoad(),
  42037. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|overrun_error~0_combout ),
  42038. .Cout(),
  42039. .Q(\macro_inst|u_uart[1]|u_rx[0]|overrun_error~q ));
  42040. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .coord_x = 17;
  42041. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .coord_y = 5;
  42042. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .coord_z = 6;
  42043. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .mask = 16'hEAC0;
  42044. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .modeMux = 1'b0;
  42045. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .FeedbackMux = 1'b1;
  42046. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .ShiftMux = 1'b0;
  42047. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .BypassEn = 1'b0;
  42048. defparam \macro_inst|u_uart[1]|u_rx[0]|overrun_error .CarryEnb = 1'b1;
  42049. alta_slice \macro_inst|u_uart[1]|u_rx[0]|parity_error (
  42050. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_sample~0_combout ),
  42051. .B(\macro_inst|u_uart[1]|u_rx[0]|parity_error~0_combout ),
  42052. .C(vcc),
  42053. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  42054. .Cin(),
  42055. .Qin(\macro_inst|u_uart[1]|u_rx[0]|parity_error~q ),
  42056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  42057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  42058. .SyncReset(),
  42059. .ShiftData(),
  42060. .SyncLoad(),
  42061. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|parity_error~1_combout ),
  42062. .Cout(),
  42063. .Q(\macro_inst|u_uart[1]|u_rx[0]|parity_error~q ));
  42064. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .coord_x = 16;
  42065. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .coord_y = 2;
  42066. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .coord_z = 12;
  42067. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .mask = 16'hF888;
  42068. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .modeMux = 1'b0;
  42069. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .FeedbackMux = 1'b1;
  42070. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .ShiftMux = 1'b0;
  42071. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .BypassEn = 1'b0;
  42072. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error .CarryEnb = 1'b1;
  42073. alta_slice \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 (
  42074. .A(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  42075. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~q ),
  42076. .C(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  42077. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  42078. .Cin(),
  42079. .Qin(),
  42080. .Clk(),
  42081. .AsyncReset(),
  42082. .SyncReset(),
  42083. .ShiftData(),
  42084. .SyncLoad(),
  42085. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|parity_error~0_combout ),
  42086. .Cout(),
  42087. .Q());
  42088. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .coord_x = 19;
  42089. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .coord_y = 2;
  42090. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .coord_z = 13;
  42091. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .mask = 16'h6000;
  42092. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .modeMux = 1'b0;
  42093. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .FeedbackMux = 1'b0;
  42094. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .ShiftMux = 1'b0;
  42095. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .BypassEn = 1'b0;
  42096. defparam \macro_inst|u_uart[1]|u_rx[0]|parity_error~0 .CarryEnb = 1'b1;
  42097. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] (
  42098. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0]),
  42099. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  42100. .C(\~GND~combout ),
  42101. .D(vcc),
  42102. .Cin(),
  42103. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0]),
  42104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  42105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  42106. .SyncReset(SyncReset_X58_Y8_GND),
  42107. .ShiftData(),
  42108. .SyncLoad(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ),
  42109. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0]~4_combout ),
  42110. .Cout(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0]~5 ),
  42111. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0]));
  42112. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .coord_x = 20;
  42113. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .coord_y = 8;
  42114. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .coord_z = 1;
  42115. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .mask = 16'h6688;
  42116. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .modeMux = 1'b0;
  42117. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  42118. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  42119. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .BypassEn = 1'b1;
  42120. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  42121. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] (
  42122. .A(vcc),
  42123. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  42124. .C(vcc),
  42125. .D(vcc),
  42126. .Cin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[0]~5 ),
  42127. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  42128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  42129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  42130. .SyncReset(SyncReset_X58_Y8_GND),
  42131. .ShiftData(),
  42132. .SyncLoad(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ),
  42133. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1]~6_combout ),
  42134. .Cout(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1]~7 ),
  42135. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]));
  42136. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .coord_x = 20;
  42137. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .coord_y = 8;
  42138. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .coord_z = 2;
  42139. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .mask = 16'h3C3F;
  42140. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .modeMux = 1'b1;
  42141. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  42142. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  42143. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .BypassEn = 1'b1;
  42144. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  42145. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] (
  42146. .A(vcc),
  42147. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  42148. .C(\~GND~combout ),
  42149. .D(vcc),
  42150. .Cin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[1]~7 ),
  42151. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  42152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  42153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  42154. .SyncReset(SyncReset_X58_Y8_GND),
  42155. .ShiftData(),
  42156. .SyncLoad(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ),
  42157. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2]~8_combout ),
  42158. .Cout(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2]~9 ),
  42159. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]));
  42160. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .coord_x = 20;
  42161. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .coord_y = 8;
  42162. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .coord_z = 3;
  42163. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .mask = 16'hC30C;
  42164. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .modeMux = 1'b1;
  42165. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  42166. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  42167. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .BypassEn = 1'b1;
  42168. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  42169. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] (
  42170. .A(vcc),
  42171. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3]),
  42172. .C(\~GND~combout ),
  42173. .D(vcc),
  42174. .Cin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[2]~9 ),
  42175. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3]),
  42176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  42177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  42178. .SyncReset(SyncReset_X58_Y8_GND),
  42179. .ShiftData(),
  42180. .SyncLoad(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ),
  42181. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3]~10_combout ),
  42182. .Cout(),
  42183. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3]));
  42184. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .coord_x = 20;
  42185. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .coord_y = 8;
  42186. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .coord_z = 4;
  42187. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .mask = 16'h3C3C;
  42188. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .modeMux = 1'b1;
  42189. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  42190. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  42191. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .BypassEn = 1'b1;
  42192. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  42193. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_bit (
  42194. .A(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  42195. .B(vcc),
  42196. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  42197. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  42198. .Cin(),
  42199. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  42201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  42202. .SyncReset(),
  42203. .ShiftData(),
  42204. .SyncLoad(),
  42205. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always2~1_combout ),
  42206. .Cout(),
  42207. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ));
  42208. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .coord_x = 20;
  42209. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .coord_y = 8;
  42210. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .coord_z = 15;
  42211. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .mask = 16'hA000;
  42212. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .modeMux = 1'b0;
  42213. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .FeedbackMux = 1'b0;
  42214. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .ShiftMux = 1'b0;
  42215. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .BypassEn = 1'b0;
  42216. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_bit .CarryEnb = 1'b1;
  42217. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] (
  42218. .A(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  42219. .B(\macro_inst|u_uart[1]|u_rx[0]|always3~2_combout ),
  42220. .C(vcc),
  42221. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42222. .Cin(),
  42223. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]),
  42224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout_X54_Y4_SIG_SIG ),
  42225. .AsyncReset(AsyncReset_X54_Y4_GND),
  42226. .SyncReset(),
  42227. .ShiftData(),
  42228. .SyncLoad(),
  42229. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~4_combout ),
  42230. .Cout(),
  42231. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]));
  42232. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .coord_x = 19;
  42233. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .coord_y = 2;
  42234. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .coord_z = 8;
  42235. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .mask = 16'hFF07;
  42236. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .modeMux = 1'b0;
  42237. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  42238. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .ShiftMux = 1'b0;
  42239. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .BypassEn = 1'b0;
  42240. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[0] .CarryEnb = 1'b1;
  42241. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] (
  42242. .A(\macro_inst|u_uart[1]|u_rx[0]|Add4~2_combout ),
  42243. .B(\macro_inst|u_uart[1]|u_rx[0]|always3~2_combout ),
  42244. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42245. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  42246. .Cin(),
  42247. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]),
  42248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout_X54_Y4_SIG_SIG ),
  42249. .AsyncReset(AsyncReset_X54_Y4_GND),
  42250. .SyncReset(),
  42251. .ShiftData(),
  42252. .SyncLoad(),
  42253. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~5_combout ),
  42254. .Cout(),
  42255. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]));
  42256. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .coord_x = 19;
  42257. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .coord_y = 2;
  42258. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .coord_z = 9;
  42259. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .mask = 16'hFDF1;
  42260. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .modeMux = 1'b0;
  42261. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  42262. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .ShiftMux = 1'b0;
  42263. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .BypassEn = 1'b0;
  42264. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1] .CarryEnb = 1'b1;
  42265. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 (
  42266. .A(vcc),
  42267. .B(vcc),
  42268. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42269. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42270. .Cin(),
  42271. .Qin(),
  42272. .Clk(),
  42273. .AsyncReset(),
  42274. .SyncReset(),
  42275. .ShiftData(),
  42276. .SyncLoad(),
  42277. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout ),
  42278. .Cout(),
  42279. .Q());
  42280. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .coord_x = 19;
  42281. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .coord_y = 2;
  42282. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .coord_z = 3;
  42283. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .mask = 16'hFFF0;
  42284. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .modeMux = 1'b0;
  42285. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .FeedbackMux = 1'b0;
  42286. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .ShiftMux = 1'b0;
  42287. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .BypassEn = 1'b0;
  42288. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3 .CarryEnb = 1'b1;
  42289. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] (
  42290. .A(\macro_inst|u_uart[1]|u_rx[0]|always3~1_combout ),
  42291. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  42292. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42293. .D(\macro_inst|u_uart[1]|u_rx[0]|Add4~1_combout ),
  42294. .Cin(),
  42295. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2]),
  42296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[1]~3_combout_X54_Y4_SIG_SIG ),
  42297. .AsyncReset(AsyncReset_X54_Y4_GND),
  42298. .SyncReset(),
  42299. .ShiftData(),
  42300. .SyncLoad(),
  42301. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~2_combout ),
  42302. .Cout(),
  42303. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [2]));
  42304. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .coord_x = 19;
  42305. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .coord_y = 2;
  42306. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .coord_z = 0;
  42307. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .mask = 16'hF0F7;
  42308. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .modeMux = 1'b0;
  42309. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  42310. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .ShiftMux = 1'b0;
  42311. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .BypassEn = 1'b0;
  42312. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[2] .CarryEnb = 1'b1;
  42313. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] (
  42314. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42315. .B(\macro_inst|u_uart[1]|u_rx[0]|Add4~0_combout ),
  42316. .C(vcc),
  42317. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42318. .Cin(),
  42319. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [3]),
  42320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y4_SIG_VCC ),
  42321. .AsyncReset(AsyncReset_X54_Y4_GND),
  42322. .SyncReset(),
  42323. .ShiftData(),
  42324. .SyncLoad(),
  42325. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt~1_combout ),
  42326. .Cout(),
  42327. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [3]));
  42328. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .coord_x = 19;
  42329. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .coord_y = 2;
  42330. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .coord_z = 7;
  42331. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .mask = 16'h1150;
  42332. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .modeMux = 1'b0;
  42333. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  42334. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .ShiftMux = 1'b0;
  42335. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .BypassEn = 1'b0;
  42336. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt[3] .CarryEnb = 1'b1;
  42337. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] (
  42338. .A(vcc),
  42339. .B(\macro_inst|u_uart[1]|u_rx[0]|Selector2~1_combout ),
  42340. .C(vcc),
  42341. .D(\macro_inst|u_uart[1]|u_regs|rx_read [0]),
  42342. .Cin(),
  42343. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  42344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  42345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  42346. .SyncReset(),
  42347. .ShiftData(),
  42348. .SyncLoad(),
  42349. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter~0_combout ),
  42350. .Cout(),
  42351. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]));
  42352. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .coord_x = 18;
  42353. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .coord_y = 4;
  42354. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .coord_z = 9;
  42355. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .mask = 16'h0CFC;
  42356. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .modeMux = 1'b0;
  42357. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  42358. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  42359. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .BypassEn = 1'b0;
  42360. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  42361. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] (
  42362. .A(\macro_inst|u_ahb2apb|paddr [9]),
  42363. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~q ),
  42364. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [0]),
  42365. .D(\macro_inst|u_ahb2apb|paddr [8]),
  42366. .Cin(),
  42367. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0]~q ),
  42368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42369. .AsyncReset(AsyncReset_X56_Y11_GND),
  42370. .SyncReset(SyncReset_X56_Y11_GND),
  42371. .ShiftData(),
  42372. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42373. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux0~3_combout ),
  42374. .Cout(),
  42375. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0]~q ));
  42376. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .coord_x = 20;
  42377. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .coord_y = 6;
  42378. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .coord_z = 7;
  42379. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .mask = 16'hEE50;
  42380. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  42381. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  42382. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  42383. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  42384. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  42385. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] (
  42386. .A(\macro_inst|u_ahb2apb|paddr [9]),
  42387. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42388. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1]),
  42389. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~q ),
  42390. .Cin(),
  42391. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1]~q ),
  42392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42393. .AsyncReset(AsyncReset_X56_Y11_GND),
  42394. .SyncReset(SyncReset_X56_Y11_GND),
  42395. .ShiftData(),
  42396. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42397. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux1~3_combout ),
  42398. .Cout(),
  42399. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1]~q ));
  42400. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .coord_x = 20;
  42401. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .coord_y = 6;
  42402. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .coord_z = 14;
  42403. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .mask = 16'hDC98;
  42404. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  42405. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  42406. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  42407. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  42408. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  42409. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] (
  42410. .A(\macro_inst|u_ahb2apb|paddr [9]),
  42411. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42412. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2]),
  42413. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~q ),
  42414. .Cin(),
  42415. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2]~q ),
  42416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42417. .AsyncReset(AsyncReset_X56_Y11_GND),
  42418. .SyncReset(SyncReset_X56_Y11_GND),
  42419. .ShiftData(),
  42420. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42421. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux2~3_combout ),
  42422. .Cout(),
  42423. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2]~q ));
  42424. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .coord_x = 20;
  42425. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .coord_y = 6;
  42426. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .coord_z = 13;
  42427. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .mask = 16'hDC98;
  42428. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  42429. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  42430. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  42431. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  42432. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  42433. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] (
  42434. .A(\macro_inst|u_ahb2apb|paddr [9]),
  42435. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~q ),
  42436. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [3]),
  42437. .D(\macro_inst|u_ahb2apb|paddr [8]),
  42438. .Cin(),
  42439. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3]~q ),
  42440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42441. .AsyncReset(AsyncReset_X56_Y11_GND),
  42442. .SyncReset(SyncReset_X56_Y11_GND),
  42443. .ShiftData(),
  42444. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42445. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux3~3_combout ),
  42446. .Cout(),
  42447. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3]~q ));
  42448. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .coord_x = 20;
  42449. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .coord_y = 6;
  42450. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .coord_z = 2;
  42451. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .mask = 16'hEE50;
  42452. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  42453. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  42454. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  42455. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  42456. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  42457. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] (
  42458. .A(\macro_inst|u_ahb2apb|paddr [9]),
  42459. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42460. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4]),
  42461. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~q ),
  42462. .Cin(),
  42463. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4]~q ),
  42464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42465. .AsyncReset(AsyncReset_X56_Y11_GND),
  42466. .SyncReset(SyncReset_X56_Y11_GND),
  42467. .ShiftData(),
  42468. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42469. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux4~3_combout ),
  42470. .Cout(),
  42471. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4]~q ));
  42472. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .coord_x = 20;
  42473. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .coord_y = 6;
  42474. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .coord_z = 10;
  42475. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .mask = 16'hDC98;
  42476. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  42477. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  42478. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  42479. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  42480. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  42481. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] (
  42482. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~q ),
  42483. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42484. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5]),
  42485. .D(\macro_inst|u_ahb2apb|paddr [9]),
  42486. .Cin(),
  42487. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5]~q ),
  42488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42489. .AsyncReset(AsyncReset_X56_Y11_GND),
  42490. .SyncReset(SyncReset_X56_Y11_GND),
  42491. .ShiftData(),
  42492. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42493. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux5~3_combout ),
  42494. .Cout(),
  42495. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5]~q ));
  42496. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .coord_x = 20;
  42497. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .coord_y = 6;
  42498. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .coord_z = 11;
  42499. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .mask = 16'hCCB8;
  42500. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  42501. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  42502. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  42503. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  42504. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  42505. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] (
  42506. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~q ),
  42507. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42508. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [6]),
  42509. .D(\macro_inst|u_ahb2apb|paddr [9]),
  42510. .Cin(),
  42511. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6]~q ),
  42512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42513. .AsyncReset(AsyncReset_X56_Y11_GND),
  42514. .SyncReset(SyncReset_X56_Y11_GND),
  42515. .ShiftData(),
  42516. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42517. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux6~3_combout ),
  42518. .Cout(),
  42519. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6]~q ));
  42520. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .coord_x = 20;
  42521. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .coord_y = 6;
  42522. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .coord_z = 4;
  42523. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .mask = 16'hCCB8;
  42524. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  42525. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  42526. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  42527. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  42528. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  42529. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] (
  42530. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~q ),
  42531. .B(\macro_inst|u_ahb2apb|paddr [8]),
  42532. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]),
  42533. .D(\macro_inst|u_ahb2apb|paddr [9]),
  42534. .Cin(),
  42535. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7]~q ),
  42536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  42537. .AsyncReset(AsyncReset_X56_Y11_GND),
  42538. .SyncReset(SyncReset_X56_Y11_GND),
  42539. .ShiftData(),
  42540. .SyncLoad(SyncLoad_X56_Y11_VCC),
  42541. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux7~3_combout ),
  42542. .Cout(),
  42543. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7]~q ));
  42544. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .coord_x = 20;
  42545. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .coord_y = 6;
  42546. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .coord_z = 9;
  42547. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .mask = 16'hCCB8;
  42548. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  42549. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  42550. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  42551. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  42552. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  42553. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 (
  42554. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ),
  42555. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_sample~0_combout ),
  42556. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  42557. .D(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  42558. .Cin(),
  42559. .Qin(),
  42560. .Clk(),
  42561. .AsyncReset(),
  42562. .SyncReset(),
  42563. .ShiftData(),
  42564. .SyncLoad(),
  42565. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0_combout ),
  42566. .Cout(),
  42567. .Q());
  42568. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .coord_x = 19;
  42569. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .coord_y = 6;
  42570. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .coord_z = 10;
  42571. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .mask = 16'h0800;
  42572. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  42573. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  42574. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  42575. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  42576. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  42577. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_idle (
  42578. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  42579. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  42580. .C(vcc),
  42581. .D(\macro_inst|u_uart[1]|u_rx[0]|always8~0_combout ),
  42582. .Cin(),
  42583. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_idle~q ),
  42584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ),
  42585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  42586. .SyncReset(),
  42587. .ShiftData(),
  42588. .SyncLoad(),
  42589. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_idle~0_combout ),
  42590. .Cout(),
  42591. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_idle~q ));
  42592. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .coord_x = 18;
  42593. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .coord_y = 3;
  42594. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .coord_z = 12;
  42595. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .mask = 16'hFF70;
  42596. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .modeMux = 1'b0;
  42597. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .FeedbackMux = 1'b1;
  42598. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .ShiftMux = 1'b0;
  42599. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .BypassEn = 1'b0;
  42600. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle .CarryEnb = 1'b1;
  42601. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en (
  42602. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  42603. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[0]~12_combout ),
  42604. .C(vcc),
  42605. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_fifo|counter [0]),
  42606. .Cin(),
  42607. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~q ),
  42608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  42609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  42610. .SyncReset(),
  42611. .ShiftData(),
  42612. .SyncLoad(),
  42613. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~0_combout ),
  42614. .Cout(),
  42615. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_idle_en~q ));
  42616. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .coord_x = 19;
  42617. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .coord_y = 4;
  42618. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .coord_z = 3;
  42619. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .mask = 16'hFF70;
  42620. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .modeMux = 1'b0;
  42621. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .FeedbackMux = 1'b1;
  42622. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .ShiftMux = 1'b0;
  42623. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .BypassEn = 1'b0;
  42624. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_idle_en .CarryEnb = 1'b1;
  42625. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] (
  42626. .A(vcc),
  42627. .B(\SIM_IO[6]~input_o ),
  42628. .C(vcc),
  42629. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  42630. .Cin(),
  42631. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_in [0]),
  42632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ),
  42633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42634. .SyncReset(),
  42635. .ShiftData(),
  42636. .SyncLoad(),
  42637. .LutOut(\macro_inst|uart_rxd [6]),
  42638. .Cout(),
  42639. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_in [0]));
  42640. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .coord_x = 19;
  42641. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .coord_y = 6;
  42642. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .coord_z = 2;
  42643. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .mask = 16'h0033;
  42644. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .modeMux = 1'b0;
  42645. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .FeedbackMux = 1'b0;
  42646. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .ShiftMux = 1'b0;
  42647. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .BypassEn = 1'b0;
  42648. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[0] .CarryEnb = 1'b1;
  42649. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] (
  42650. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  42651. .B(\macro_inst|u_uart[1]|u_rx[5]|Selector2~2_combout ),
  42652. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_in [0]),
  42653. .D(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  42654. .Cin(),
  42655. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_in [1]),
  42656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y11_SIG_SIG ),
  42657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  42658. .SyncReset(SyncReset_X60_Y11_GND),
  42659. .ShiftData(),
  42660. .SyncLoad(SyncLoad_X60_Y11_VCC),
  42661. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector0~0_combout ),
  42662. .Cout(),
  42663. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_in [1]));
  42664. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .coord_x = 18;
  42665. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .coord_y = 11;
  42666. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .coord_z = 6;
  42667. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .mask = 16'h2233;
  42668. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .modeMux = 1'b0;
  42669. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .FeedbackMux = 1'b0;
  42670. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .ShiftMux = 1'b0;
  42671. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .BypassEn = 1'b1;
  42672. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[1] .CarryEnb = 1'b1;
  42673. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] (
  42674. .A(vcc),
  42675. .B(vcc),
  42676. .C(vcc),
  42677. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_in [1]),
  42678. .Cin(),
  42679. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_in [2]),
  42680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ),
  42681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42682. .SyncReset(),
  42683. .ShiftData(),
  42684. .SyncLoad(),
  42685. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_in[2]~feeder_combout ),
  42686. .Cout(),
  42687. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_in [2]));
  42688. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .coord_x = 19;
  42689. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .coord_y = 6;
  42690. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .coord_z = 8;
  42691. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .mask = 16'hFF00;
  42692. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .modeMux = 1'b0;
  42693. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .FeedbackMux = 1'b0;
  42694. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .ShiftMux = 1'b0;
  42695. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .BypassEn = 1'b0;
  42696. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[2] .CarryEnb = 1'b1;
  42697. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] (
  42698. .A(vcc),
  42699. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [2]),
  42700. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_in [2]),
  42701. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [1]),
  42702. .Cin(),
  42703. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_in [3]),
  42704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ),
  42705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42706. .SyncReset(SyncReset_X57_Y8_GND),
  42707. .ShiftData(),
  42708. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42709. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_sample~0_combout ),
  42710. .Cout(),
  42711. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_in [3]));
  42712. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .coord_x = 19;
  42713. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .coord_y = 6;
  42714. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .coord_z = 11;
  42715. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .mask = 16'h0033;
  42716. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .modeMux = 1'b0;
  42717. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .FeedbackMux = 1'b0;
  42718. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .ShiftMux = 1'b0;
  42719. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .BypassEn = 1'b1;
  42720. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[3] .CarryEnb = 1'b1;
  42721. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] (
  42722. .A(vcc),
  42723. .B(vcc),
  42724. .C(vcc),
  42725. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_in [3]),
  42726. .Cin(),
  42727. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_in [4]),
  42728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X57_Y8_SIG_SIG ),
  42729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42730. .SyncReset(),
  42731. .ShiftData(),
  42732. .SyncLoad(),
  42733. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_in[4]~0_combout ),
  42734. .Cout(),
  42735. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_in [4]));
  42736. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .coord_x = 19;
  42737. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .coord_y = 6;
  42738. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .coord_z = 7;
  42739. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .mask = 16'h00FF;
  42740. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .modeMux = 1'b0;
  42741. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .FeedbackMux = 1'b0;
  42742. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .ShiftMux = 1'b0;
  42743. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .BypassEn = 1'b0;
  42744. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_in[4] .CarryEnb = 1'b1;
  42745. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_parity (
  42746. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~0_combout ),
  42747. .B(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  42748. .C(vcc),
  42749. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  42750. .Cin(),
  42751. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~q ),
  42752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X54_Y4_SIG_VCC ),
  42753. .AsyncReset(AsyncReset_X54_Y4_GND),
  42754. .SyncReset(),
  42755. .ShiftData(),
  42756. .SyncLoad(),
  42757. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~1_combout ),
  42758. .Cout(),
  42759. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~q ));
  42760. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .coord_x = 19;
  42761. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .coord_y = 2;
  42762. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .coord_z = 5;
  42763. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .mask = 16'h335A;
  42764. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .modeMux = 1'b0;
  42765. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .FeedbackMux = 1'b1;
  42766. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .ShiftMux = 1'b0;
  42767. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .BypassEn = 1'b0;
  42768. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity .CarryEnb = 1'b1;
  42769. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 (
  42770. .A(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  42771. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42772. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  42773. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]),
  42774. .Cin(),
  42775. .Qin(),
  42776. .Clk(),
  42777. .AsyncReset(),
  42778. .SyncReset(),
  42779. .ShiftData(),
  42780. .SyncLoad(),
  42781. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_parity~0_combout ),
  42782. .Cout(),
  42783. .Q());
  42784. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .coord_x = 19;
  42785. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .coord_y = 6;
  42786. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .coord_z = 9;
  42787. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .mask = 16'h4000;
  42788. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .modeMux = 1'b0;
  42789. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .FeedbackMux = 1'b0;
  42790. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .ShiftMux = 1'b0;
  42791. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .BypassEn = 1'b0;
  42792. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_parity~0 .CarryEnb = 1'b1;
  42793. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] (
  42794. .A(vcc),
  42795. .B(vcc),
  42796. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1]),
  42797. .D(vcc),
  42798. .Cin(),
  42799. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [0]),
  42800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y7_SIG_SIG ),
  42801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  42802. .SyncReset(),
  42803. .ShiftData(),
  42804. .SyncLoad(),
  42805. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0]~feeder_combout ),
  42806. .Cout(),
  42807. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [0]));
  42808. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .coord_x = 18;
  42809. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .coord_y = 4;
  42810. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .coord_z = 15;
  42811. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .mask = 16'hF0F0;
  42812. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .modeMux = 1'b0;
  42813. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  42814. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .ShiftMux = 1'b0;
  42815. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .BypassEn = 1'b0;
  42816. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[0] .CarryEnb = 1'b1;
  42817. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] (
  42818. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  42819. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [3]),
  42820. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2]),
  42821. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_baud_cnt [0]),
  42822. .Cin(),
  42823. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1]),
  42824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42826. .SyncReset(SyncReset_X57_Y8_GND),
  42827. .ShiftData(),
  42828. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42829. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  42830. .Cout(),
  42831. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1]));
  42832. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .coord_x = 19;
  42833. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .coord_y = 6;
  42834. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .coord_z = 3;
  42835. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .mask = 16'h8800;
  42836. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .modeMux = 1'b0;
  42837. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  42838. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .ShiftMux = 1'b0;
  42839. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .BypassEn = 1'b1;
  42840. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[1] .CarryEnb = 1'b1;
  42841. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] (
  42842. .A(vcc),
  42843. .B(\macro_inst|u_uart[1]|u_regs|tx_write [0]),
  42844. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [3]),
  42845. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  42846. .Cin(),
  42847. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2]),
  42848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42850. .SyncReset(SyncReset_X57_Y8_GND),
  42851. .ShiftData(),
  42852. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42853. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout ),
  42854. .Cout(),
  42855. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2]));
  42856. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .coord_x = 19;
  42857. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .coord_y = 6;
  42858. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .coord_z = 14;
  42859. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .mask = 16'h00CC;
  42860. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .modeMux = 1'b0;
  42861. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  42862. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .ShiftMux = 1'b0;
  42863. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .BypassEn = 1'b1;
  42864. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[2] .CarryEnb = 1'b1;
  42865. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] (
  42866. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [2]),
  42867. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [0]),
  42868. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4]),
  42869. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [1]),
  42870. .Cin(),
  42871. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [3]),
  42872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42874. .SyncReset(SyncReset_X57_Y8_GND),
  42875. .ShiftData(),
  42876. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42877. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always11~1_combout ),
  42878. .Cout(),
  42879. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [3]));
  42880. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .coord_x = 19;
  42881. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .coord_y = 6;
  42882. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .coord_z = 4;
  42883. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .mask = 16'h0001;
  42884. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .modeMux = 1'b0;
  42885. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .FeedbackMux = 1'b1;
  42886. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .ShiftMux = 1'b0;
  42887. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .BypassEn = 1'b1;
  42888. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[3] .CarryEnb = 1'b1;
  42889. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] (
  42890. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ),
  42891. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42892. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5]),
  42893. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector4~1_combout ),
  42894. .Cin(),
  42895. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4]),
  42896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42898. .SyncReset(SyncReset_X57_Y8_GND),
  42899. .ShiftData(),
  42900. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42901. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector4~2_combout ),
  42902. .Cout(),
  42903. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4]));
  42904. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .coord_x = 19;
  42905. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .coord_y = 6;
  42906. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .coord_z = 6;
  42907. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .mask = 16'h4400;
  42908. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .modeMux = 1'b0;
  42909. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  42910. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .ShiftMux = 1'b0;
  42911. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .BypassEn = 1'b1;
  42912. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[4] .CarryEnb = 1'b1;
  42913. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] (
  42914. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_in [2]),
  42915. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_in [4]),
  42916. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [6]),
  42917. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_in [3]),
  42918. .Cin(),
  42919. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5]),
  42920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42922. .SyncReset(SyncReset_X57_Y8_GND),
  42923. .ShiftData(),
  42924. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42925. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  42926. .Cout(),
  42927. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5]));
  42928. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .coord_x = 19;
  42929. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .coord_y = 6;
  42930. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .coord_z = 0;
  42931. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .mask = 16'h44DD;
  42932. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .modeMux = 1'b0;
  42933. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  42934. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .ShiftMux = 1'b0;
  42935. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .BypassEn = 1'b1;
  42936. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[5] .CarryEnb = 1'b1;
  42937. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] (
  42938. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [4]),
  42939. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [5]),
  42940. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]),
  42941. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]),
  42942. .Cin(),
  42943. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [6]),
  42944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42946. .SyncReset(SyncReset_X57_Y8_GND),
  42947. .ShiftData(),
  42948. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42949. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|always11~0_combout ),
  42950. .Cout(),
  42951. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [6]));
  42952. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .coord_x = 19;
  42953. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .coord_y = 6;
  42954. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .coord_z = 12;
  42955. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .mask = 16'h0001;
  42956. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .modeMux = 1'b0;
  42957. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .FeedbackMux = 1'b1;
  42958. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .ShiftMux = 1'b0;
  42959. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .BypassEn = 1'b1;
  42960. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[6] .CarryEnb = 1'b1;
  42961. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] (
  42962. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ),
  42963. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_sample~0_combout ),
  42964. .C(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  42965. .D(\macro_inst|u_uart[1]|u_rx[0]|always2~0_combout ),
  42966. .Cin(),
  42967. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]),
  42968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[0]|always4~2_combout_X57_Y8_SIG_SIG ),
  42969. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y8_SIG ),
  42970. .SyncReset(SyncReset_X57_Y8_GND),
  42971. .ShiftData(),
  42972. .SyncLoad(SyncLoad_X57_Y8_VCC),
  42973. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~2_combout ),
  42974. .Cout(),
  42975. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg [7]));
  42976. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .coord_x = 19;
  42977. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .coord_y = 6;
  42978. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .coord_z = 13;
  42979. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .mask = 16'h8000;
  42980. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .modeMux = 1'b0;
  42981. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  42982. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .ShiftMux = 1'b0;
  42983. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .BypassEn = 1'b1;
  42984. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_shift_reg[7] .CarryEnb = 1'b1;
  42985. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA (
  42986. .A(\macro_inst|u_uart[1]|u_rx[0]|Selector2~3_combout ),
  42987. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  42988. .C(\macro_inst|u_uart[1]|u_rx[0]|Selector2~5_combout ),
  42989. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector2~2_combout ),
  42990. .Cin(),
  42991. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ),
  42992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ),
  42993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ),
  42994. .SyncReset(),
  42995. .ShiftData(),
  42996. .SyncLoad(),
  42997. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector2~6_combout ),
  42998. .Cout(),
  42999. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA~q ));
  43000. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .coord_x = 20;
  43001. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .coord_y = 2;
  43002. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .coord_z = 14;
  43003. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .mask = 16'h00F8;
  43004. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .modeMux = 1'b0;
  43005. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  43006. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .ShiftMux = 1'b0;
  43007. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .BypassEn = 1'b0;
  43008. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_DATA .CarryEnb = 1'b1;
  43009. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE (
  43010. .A(vcc),
  43011. .B(\macro_inst|u_uart[1]|u_rx[0]|Add1~0_combout ),
  43012. .C(vcc),
  43013. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector2~2_combout ),
  43014. .Cin(),
  43015. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ),
  43016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ),
  43017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ),
  43018. .SyncReset(),
  43019. .ShiftData(),
  43020. .SyncLoad(),
  43021. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector0~0_combout ),
  43022. .Cout(),
  43023. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE~q ));
  43024. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .coord_x = 20;
  43025. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .coord_y = 2;
  43026. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .coord_z = 2;
  43027. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .mask = 16'h00F3;
  43028. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .modeMux = 1'b0;
  43029. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  43030. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  43031. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .BypassEn = 1'b0;
  43032. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  43033. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY (
  43034. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0_combout ),
  43035. .B(\macro_inst|u_uart[1]|u_rx[0]|Selector3~0_combout ),
  43036. .C(vcc),
  43037. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector4~4_combout ),
  43038. .Cin(),
  43039. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  43040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ),
  43041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ),
  43042. .SyncReset(),
  43043. .ShiftData(),
  43044. .SyncLoad(),
  43045. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~1_combout ),
  43046. .Cout(),
  43047. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ));
  43048. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .coord_x = 20;
  43049. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .coord_y = 2;
  43050. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .coord_z = 1;
  43051. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .mask = 16'h88F8;
  43052. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .modeMux = 1'b0;
  43053. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  43054. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  43055. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .BypassEn = 1'b0;
  43056. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  43057. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 (
  43058. .A(vcc),
  43059. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  43060. .C(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  43061. .D(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  43062. .Cin(),
  43063. .Qin(),
  43064. .Clk(),
  43065. .AsyncReset(),
  43066. .SyncReset(),
  43067. .ShiftData(),
  43068. .SyncLoad(),
  43069. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0_combout ),
  43070. .Cout(),
  43071. .Q());
  43072. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .coord_x = 17;
  43073. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .coord_y = 2;
  43074. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .coord_z = 12;
  43075. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .mask = 16'h0CCC;
  43076. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  43077. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  43078. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  43079. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  43080. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  43081. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START (
  43082. .A(\macro_inst|u_uart[1]|u_rx[0]|Selector2~2_combout ),
  43083. .B(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout ),
  43084. .C(vcc),
  43085. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector2~4_combout ),
  43086. .Cin(),
  43087. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ),
  43088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X43_Y4_SIG_VCC ),
  43089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X43_Y4_SIG ),
  43090. .SyncReset(),
  43091. .ShiftData(),
  43092. .SyncLoad(),
  43093. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Selector1~0_combout ),
  43094. .Cout(),
  43095. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START~q ));
  43096. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .coord_x = 20;
  43097. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .coord_y = 2;
  43098. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .coord_z = 7;
  43099. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .mask = 16'h4454;
  43100. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .modeMux = 1'b0;
  43101. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .FeedbackMux = 1'b1;
  43102. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .ShiftMux = 1'b0;
  43103. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .BypassEn = 1'b0;
  43104. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_START .CarryEnb = 1'b1;
  43105. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP (
  43106. .A(vcc),
  43107. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0_combout ),
  43108. .C(vcc),
  43109. .D(\macro_inst|u_uart[1]|u_rx[0]|Selector4~4_combout ),
  43110. .Cin(),
  43111. .Qin(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ),
  43112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  43113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  43114. .SyncReset(),
  43115. .ShiftData(),
  43116. .SyncLoad(),
  43117. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~1_combout ),
  43118. .Cout(),
  43119. .Q(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~q ));
  43120. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .coord_x = 19;
  43121. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .coord_y = 7;
  43122. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .coord_z = 14;
  43123. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .mask = 16'hCCF0;
  43124. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .modeMux = 1'b0;
  43125. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  43126. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .ShiftMux = 1'b0;
  43127. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .BypassEn = 1'b0;
  43128. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP .CarryEnb = 1'b1;
  43129. alta_slice \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 (
  43130. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_bit~q ),
  43131. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_PARITY~q ),
  43132. .C(\macro_inst|u_uart[1]|u_rx[0]|Selector3~0_combout ),
  43133. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  43134. .Cin(),
  43135. .Qin(),
  43136. .Clk(),
  43137. .AsyncReset(),
  43138. .SyncReset(),
  43139. .ShiftData(),
  43140. .SyncLoad(),
  43141. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0_combout ),
  43142. .Cout(),
  43143. .Q());
  43144. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .coord_x = 19;
  43145. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .coord_y = 2;
  43146. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .coord_z = 4;
  43147. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .mask = 16'h88F8;
  43148. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  43149. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  43150. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  43151. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  43152. defparam \macro_inst|u_uart[1]|u_rx[0]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  43153. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Add4~0 (
  43154. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]),
  43155. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2]),
  43156. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [3]),
  43157. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]),
  43158. .Cin(),
  43159. .Qin(),
  43160. .Clk(),
  43161. .AsyncReset(),
  43162. .SyncReset(),
  43163. .ShiftData(),
  43164. .SyncLoad(),
  43165. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Add4~0_combout ),
  43166. .Cout(),
  43167. .Q());
  43168. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .coord_x = 18;
  43169. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .coord_y = 1;
  43170. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .coord_z = 0;
  43171. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .mask = 16'h0F1E;
  43172. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .modeMux = 1'b0;
  43173. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .FeedbackMux = 1'b0;
  43174. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .ShiftMux = 1'b0;
  43175. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .BypassEn = 1'b0;
  43176. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~0 .CarryEnb = 1'b1;
  43177. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Add4~1 (
  43178. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]),
  43179. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2]),
  43180. .C(vcc),
  43181. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]),
  43182. .Cin(),
  43183. .Qin(),
  43184. .Clk(),
  43185. .AsyncReset(),
  43186. .SyncReset(),
  43187. .ShiftData(),
  43188. .SyncLoad(),
  43189. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Add4~1_combout ),
  43190. .Cout(),
  43191. .Q());
  43192. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .coord_x = 18;
  43193. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .coord_y = 1;
  43194. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .coord_z = 2;
  43195. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .mask = 16'h3366;
  43196. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .modeMux = 1'b0;
  43197. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .FeedbackMux = 1'b0;
  43198. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .ShiftMux = 1'b0;
  43199. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .BypassEn = 1'b0;
  43200. defparam \macro_inst|u_uart[1]|u_rx[1]|Add4~1 .CarryEnb = 1'b1;
  43201. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 (
  43202. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43203. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43204. .C(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  43205. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ),
  43206. .Cin(),
  43207. .Qin(),
  43208. .Clk(),
  43209. .AsyncReset(),
  43210. .SyncReset(),
  43211. .ShiftData(),
  43212. .SyncLoad(),
  43213. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43214. .Cout(),
  43215. .Q());
  43216. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .coord_x = 17;
  43217. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .coord_y = 1;
  43218. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .coord_z = 12;
  43219. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .mask = 16'h1000;
  43220. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .modeMux = 1'b0;
  43221. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .FeedbackMux = 1'b0;
  43222. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .ShiftMux = 1'b0;
  43223. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .BypassEn = 1'b0;
  43224. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~1 .CarryEnb = 1'b1;
  43225. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 (
  43226. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ),
  43227. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_sample~0_combout ),
  43228. .C(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  43229. .D(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  43230. .Cin(),
  43231. .Qin(),
  43232. .Clk(),
  43233. .AsyncReset(),
  43234. .SyncReset(),
  43235. .ShiftData(),
  43236. .SyncLoad(),
  43237. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~2_combout ),
  43238. .Cout(),
  43239. .Q());
  43240. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .coord_x = 17;
  43241. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .coord_y = 3;
  43242. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .coord_z = 11;
  43243. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .mask = 16'h8000;
  43244. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .modeMux = 1'b0;
  43245. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .FeedbackMux = 1'b0;
  43246. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .ShiftMux = 1'b0;
  43247. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .BypassEn = 1'b0;
  43248. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~2 .CarryEnb = 1'b1;
  43249. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 (
  43250. .A(vcc),
  43251. .B(vcc),
  43252. .C(\macro_inst|u_uart[1]|u_rx[1]|Selector4~2_combout ),
  43253. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  43254. .Cin(),
  43255. .Qin(),
  43256. .Clk(),
  43257. .AsyncReset(),
  43258. .SyncReset(),
  43259. .ShiftData(),
  43260. .SyncLoad(),
  43261. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~3_combout ),
  43262. .Cout(),
  43263. .Q());
  43264. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .coord_x = 18;
  43265. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .coord_y = 1;
  43266. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .coord_z = 1;
  43267. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .mask = 16'hF000;
  43268. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .modeMux = 1'b0;
  43269. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .FeedbackMux = 1'b0;
  43270. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .ShiftMux = 1'b0;
  43271. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .BypassEn = 1'b0;
  43272. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~3 .CarryEnb = 1'b1;
  43273. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 (
  43274. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  43275. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector2~3_combout ),
  43276. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  43277. .D(\macro_inst|u_uart[1]|u_rx[1]|always3~2_combout ),
  43278. .Cin(),
  43279. .Qin(),
  43280. .Clk(),
  43281. .AsyncReset(),
  43282. .SyncReset(),
  43283. .ShiftData(),
  43284. .SyncLoad(),
  43285. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~4_combout ),
  43286. .Cout(),
  43287. .Q());
  43288. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .coord_x = 18;
  43289. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .coord_y = 1;
  43290. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .coord_z = 15;
  43291. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .mask = 16'hAAA8;
  43292. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .modeMux = 1'b0;
  43293. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .FeedbackMux = 1'b0;
  43294. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .ShiftMux = 1'b0;
  43295. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .BypassEn = 1'b0;
  43296. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~4 .CarryEnb = 1'b1;
  43297. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 (
  43298. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ),
  43299. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector2~4_combout ),
  43300. .C(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  43301. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43302. .Cin(),
  43303. .Qin(),
  43304. .Clk(),
  43305. .AsyncReset(),
  43306. .SyncReset(),
  43307. .ShiftData(),
  43308. .SyncLoad(),
  43309. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~5_combout ),
  43310. .Cout(),
  43311. .Q());
  43312. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .coord_x = 18;
  43313. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .coord_y = 1;
  43314. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .coord_z = 6;
  43315. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .mask = 16'h3200;
  43316. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .modeMux = 1'b0;
  43317. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .FeedbackMux = 1'b0;
  43318. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .ShiftMux = 1'b0;
  43319. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .BypassEn = 1'b0;
  43320. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector2~5 .CarryEnb = 1'b1;
  43321. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 (
  43322. .A(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  43323. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43324. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  43325. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  43326. .Cin(),
  43327. .Qin(),
  43328. .Clk(),
  43329. .AsyncReset(),
  43330. .SyncReset(),
  43331. .ShiftData(),
  43332. .SyncLoad(),
  43333. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~1_combout ),
  43334. .Cout(),
  43335. .Q());
  43336. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .coord_x = 18;
  43337. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .coord_y = 3;
  43338. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .coord_z = 14;
  43339. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .mask = 16'hF800;
  43340. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .modeMux = 1'b0;
  43341. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .FeedbackMux = 1'b0;
  43342. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .ShiftMux = 1'b0;
  43343. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .BypassEn = 1'b0;
  43344. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~1 .CarryEnb = 1'b1;
  43345. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 (
  43346. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3]),
  43347. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0]),
  43348. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43349. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43350. .Cin(),
  43351. .Qin(),
  43352. .Clk(),
  43353. .AsyncReset(),
  43354. .SyncReset(),
  43355. .ShiftData(),
  43356. .SyncLoad(),
  43357. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~2_combout ),
  43358. .Cout(),
  43359. .Q());
  43360. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .coord_x = 18;
  43361. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .coord_y = 1;
  43362. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .coord_z = 12;
  43363. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .mask = 16'h0001;
  43364. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .modeMux = 1'b0;
  43365. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .FeedbackMux = 1'b0;
  43366. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .ShiftMux = 1'b0;
  43367. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .BypassEn = 1'b0;
  43368. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~2 .CarryEnb = 1'b1;
  43369. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 (
  43370. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ),
  43371. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector4~3_combout ),
  43372. .C(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  43373. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43374. .Cin(),
  43375. .Qin(),
  43376. .Clk(),
  43377. .AsyncReset(),
  43378. .SyncReset(),
  43379. .ShiftData(),
  43380. .SyncLoad(),
  43381. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~4_combout ),
  43382. .Cout(),
  43383. .Q());
  43384. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .coord_x = 18;
  43385. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .coord_y = 3;
  43386. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .coord_z = 4;
  43387. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .mask = 16'hAD8D;
  43388. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .modeMux = 1'b0;
  43389. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .FeedbackMux = 1'b0;
  43390. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .ShiftMux = 1'b0;
  43391. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .BypassEn = 1'b0;
  43392. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~4 .CarryEnb = 1'b1;
  43393. alta_slice \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 (
  43394. .A(\macro_inst|u_uart[1]|u_rx[1]|Selector4~1_combout ),
  43395. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43396. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  43397. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector4~4_combout ),
  43398. .Cin(),
  43399. .Qin(),
  43400. .Clk(),
  43401. .AsyncReset(),
  43402. .SyncReset(),
  43403. .ShiftData(),
  43404. .SyncLoad(),
  43405. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~5_combout ),
  43406. .Cout(),
  43407. .Q());
  43408. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .coord_x = 18;
  43409. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .coord_y = 3;
  43410. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .coord_z = 5;
  43411. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .mask = 16'hABAA;
  43412. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .modeMux = 1'b0;
  43413. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .FeedbackMux = 1'b0;
  43414. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .ShiftMux = 1'b0;
  43415. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .BypassEn = 1'b0;
  43416. defparam \macro_inst|u_uart[1]|u_rx[1]|Selector4~5 .CarryEnb = 1'b1;
  43417. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always10~2 (
  43418. .A(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  43419. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_sample~0_combout ),
  43420. .C(\macro_inst|u_uart[1]|u_rx[1]|always10~1_combout ),
  43421. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  43422. .Cin(),
  43423. .Qin(),
  43424. .Clk(),
  43425. .AsyncReset(),
  43426. .SyncReset(),
  43427. .ShiftData(),
  43428. .SyncLoad(),
  43429. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always10~2_combout ),
  43430. .Cout(),
  43431. .Q());
  43432. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .coord_x = 16;
  43433. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .coord_y = 1;
  43434. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .coord_z = 11;
  43435. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .mask = 16'h8000;
  43436. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .modeMux = 1'b0;
  43437. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .FeedbackMux = 1'b0;
  43438. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .ShiftMux = 1'b0;
  43439. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .BypassEn = 1'b0;
  43440. defparam \macro_inst|u_uart[1]|u_rx[1]|always10~2 .CarryEnb = 1'b1;
  43441. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always11~2 (
  43442. .A(\macro_inst|u_uart[1]|u_rx[1]|always11~1_combout ),
  43443. .B(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  43444. .C(\macro_inst|u_uart[1]|u_rx[1]|always11~0_combout ),
  43445. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43446. .Cin(),
  43447. .Qin(),
  43448. .Clk(),
  43449. .AsyncReset(),
  43450. .SyncReset(),
  43451. .ShiftData(),
  43452. .SyncLoad(),
  43453. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always11~2_combout ),
  43454. .Cout(),
  43455. .Q());
  43456. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .coord_x = 18;
  43457. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .coord_y = 6;
  43458. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .coord_z = 15;
  43459. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .mask = 16'h2000;
  43460. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .modeMux = 1'b0;
  43461. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .FeedbackMux = 1'b0;
  43462. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .ShiftMux = 1'b0;
  43463. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .BypassEn = 1'b0;
  43464. defparam \macro_inst|u_uart[1]|u_rx[1]|always11~2 .CarryEnb = 1'b1;
  43465. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always3~1 (
  43466. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]),
  43467. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2]),
  43468. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [3]),
  43469. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]),
  43470. .Cin(),
  43471. .Qin(),
  43472. .Clk(),
  43473. .AsyncReset(),
  43474. .SyncReset(),
  43475. .ShiftData(),
  43476. .SyncLoad(),
  43477. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  43478. .Cout(),
  43479. .Q());
  43480. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .coord_x = 18;
  43481. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .coord_y = 1;
  43482. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .coord_z = 14;
  43483. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .mask = 16'h0001;
  43484. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .modeMux = 1'b0;
  43485. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .FeedbackMux = 1'b0;
  43486. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .ShiftMux = 1'b0;
  43487. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .BypassEn = 1'b0;
  43488. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~1 .CarryEnb = 1'b1;
  43489. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always3~2 (
  43490. .A(vcc),
  43491. .B(vcc),
  43492. .C(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  43493. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43494. .Cin(),
  43495. .Qin(),
  43496. .Clk(),
  43497. .AsyncReset(),
  43498. .SyncReset(),
  43499. .ShiftData(),
  43500. .SyncLoad(),
  43501. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always3~2_combout ),
  43502. .Cout(),
  43503. .Q());
  43504. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .coord_x = 18;
  43505. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .coord_y = 1;
  43506. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .coord_z = 13;
  43507. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .mask = 16'hF000;
  43508. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .modeMux = 1'b0;
  43509. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .FeedbackMux = 1'b0;
  43510. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .ShiftMux = 1'b0;
  43511. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .BypassEn = 1'b0;
  43512. defparam \macro_inst|u_uart[1]|u_rx[1]|always3~2 .CarryEnb = 1'b1;
  43513. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always4~2 (
  43514. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43515. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43516. .C(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  43517. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43518. .Cin(),
  43519. .Qin(),
  43520. .Clk(),
  43521. .AsyncReset(),
  43522. .SyncReset(),
  43523. .ShiftData(),
  43524. .SyncLoad(),
  43525. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always4~2_combout ),
  43526. .Cout(),
  43527. .Q());
  43528. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .coord_x = 19;
  43529. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .coord_y = 3;
  43530. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .coord_z = 8;
  43531. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .mask = 16'h0020;
  43532. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .modeMux = 1'b0;
  43533. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .FeedbackMux = 1'b0;
  43534. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .ShiftMux = 1'b0;
  43535. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .BypassEn = 1'b0;
  43536. defparam \macro_inst|u_uart[1]|u_rx[1]|always4~2 .CarryEnb = 1'b1;
  43537. alta_slice \macro_inst|u_uart[1]|u_rx[1]|always8~0 (
  43538. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ),
  43539. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~q ),
  43540. .C(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  43541. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  43542. .Cin(),
  43543. .Qin(),
  43544. .Clk(),
  43545. .AsyncReset(),
  43546. .SyncReset(),
  43547. .ShiftData(),
  43548. .SyncLoad(),
  43549. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always8~0_combout ),
  43550. .Cout(),
  43551. .Q());
  43552. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .coord_x = 18;
  43553. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .coord_y = 3;
  43554. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .coord_z = 8;
  43555. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .mask = 16'h4000;
  43556. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .modeMux = 1'b0;
  43557. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .FeedbackMux = 1'b0;
  43558. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .ShiftMux = 1'b0;
  43559. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .BypassEn = 1'b0;
  43560. defparam \macro_inst|u_uart[1]|u_rx[1]|always8~0 .CarryEnb = 1'b1;
  43561. alta_slice \macro_inst|u_uart[1]|u_rx[1]|break_error (
  43562. .A(vcc),
  43563. .B(\macro_inst|u_uart[1]|u_rx[1]|always11~2_combout ),
  43564. .C(vcc),
  43565. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ),
  43566. .Cin(),
  43567. .Qin(\macro_inst|u_uart[1]|u_rx[1]|break_error~q ),
  43568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  43569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  43570. .SyncReset(),
  43571. .ShiftData(),
  43572. .SyncLoad(),
  43573. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|break_error~0_combout ),
  43574. .Cout(),
  43575. .Q(\macro_inst|u_uart[1]|u_rx[1]|break_error~q ));
  43576. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .coord_x = 18;
  43577. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .coord_y = 6;
  43578. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .coord_z = 10;
  43579. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .mask = 16'hCCFC;
  43580. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .modeMux = 1'b0;
  43581. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .FeedbackMux = 1'b1;
  43582. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .ShiftMux = 1'b0;
  43583. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .BypassEn = 1'b0;
  43584. defparam \macro_inst|u_uart[1]|u_rx[1]|break_error .CarryEnb = 1'b1;
  43585. alta_slice \macro_inst|u_uart[1]|u_rx[1]|framing_error (
  43586. .A(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43587. .B(\macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ),
  43588. .C(vcc),
  43589. .D(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  43590. .Cin(),
  43591. .Qin(\macro_inst|u_uart[1]|u_rx[1]|framing_error~q ),
  43592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  43593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  43594. .SyncReset(),
  43595. .ShiftData(),
  43596. .SyncLoad(),
  43597. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|framing_error~0_combout ),
  43598. .Cout(),
  43599. .Q(\macro_inst|u_uart[1]|u_rx[1]|framing_error~q ));
  43600. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .coord_x = 18;
  43601. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .coord_y = 8;
  43602. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .coord_z = 2;
  43603. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .mask = 16'h30BA;
  43604. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .modeMux = 1'b0;
  43605. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .FeedbackMux = 1'b1;
  43606. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .ShiftMux = 1'b0;
  43607. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .BypassEn = 1'b0;
  43608. defparam \macro_inst|u_uart[1]|u_rx[1]|framing_error .CarryEnb = 1'b1;
  43609. alta_slice \macro_inst|u_uart[1]|u_rx[1]|overrun_error (
  43610. .A(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43611. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  43612. .C(vcc),
  43613. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ),
  43614. .Cin(),
  43615. .Qin(\macro_inst|u_uart[1]|u_rx[1]|overrun_error~q ),
  43616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  43617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  43618. .SyncReset(),
  43619. .ShiftData(),
  43620. .SyncLoad(),
  43621. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|overrun_error~0_combout ),
  43622. .Cout(),
  43623. .Q(\macro_inst|u_uart[1]|u_rx[1]|overrun_error~q ));
  43624. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .coord_x = 18;
  43625. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .coord_y = 8;
  43626. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .coord_z = 3;
  43627. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .mask = 16'h88F8;
  43628. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .modeMux = 1'b0;
  43629. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .FeedbackMux = 1'b1;
  43630. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .ShiftMux = 1'b0;
  43631. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .BypassEn = 1'b0;
  43632. defparam \macro_inst|u_uart[1]|u_rx[1]|overrun_error .CarryEnb = 1'b1;
  43633. alta_slice \macro_inst|u_uart[1]|u_rx[1]|parity_error (
  43634. .A(\macro_inst|u_uart[1]|u_rx[1]|always10~2_combout ),
  43635. .B(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  43636. .C(vcc),
  43637. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  43638. .Cin(),
  43639. .Qin(\macro_inst|u_uart[1]|u_rx[1]|parity_error~q ),
  43640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y3_SIG_VCC ),
  43641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  43642. .SyncReset(),
  43643. .ShiftData(),
  43644. .SyncLoad(),
  43645. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|parity_error~0_combout ),
  43646. .Cout(),
  43647. .Q(\macro_inst|u_uart[1]|u_rx[1]|parity_error~q ));
  43648. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .coord_x = 16;
  43649. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .coord_y = 2;
  43650. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .coord_z = 14;
  43651. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .mask = 16'hBAFA;
  43652. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .modeMux = 1'b0;
  43653. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .FeedbackMux = 1'b1;
  43654. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .ShiftMux = 1'b0;
  43655. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .BypassEn = 1'b0;
  43656. defparam \macro_inst|u_uart[1]|u_rx[1]|parity_error .CarryEnb = 1'b1;
  43657. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] (
  43658. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0]),
  43659. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  43660. .C(\~GND~combout ),
  43661. .D(vcc),
  43662. .Cin(),
  43663. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0]),
  43664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  43665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ),
  43666. .SyncReset(SyncReset_X56_Y6_GND),
  43667. .ShiftData(),
  43668. .SyncLoad(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ),
  43669. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0]~4_combout ),
  43670. .Cout(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0]~5 ),
  43671. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0]));
  43672. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .coord_x = 18;
  43673. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .coord_y = 1;
  43674. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .coord_z = 7;
  43675. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .mask = 16'h6688;
  43676. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .modeMux = 1'b0;
  43677. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  43678. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  43679. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .BypassEn = 1'b1;
  43680. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  43681. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] (
  43682. .A(vcc),
  43683. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43684. .C(vcc),
  43685. .D(vcc),
  43686. .Cin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[0]~5 ),
  43687. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43688. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  43689. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ),
  43690. .SyncReset(SyncReset_X56_Y6_GND),
  43691. .ShiftData(),
  43692. .SyncLoad(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ),
  43693. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1]~6_combout ),
  43694. .Cout(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1]~7 ),
  43695. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]));
  43696. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .coord_x = 18;
  43697. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .coord_y = 1;
  43698. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .coord_z = 8;
  43699. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .mask = 16'h3C3F;
  43700. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .modeMux = 1'b1;
  43701. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  43702. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  43703. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .BypassEn = 1'b1;
  43704. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  43705. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] (
  43706. .A(vcc),
  43707. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43708. .C(\~GND~combout ),
  43709. .D(vcc),
  43710. .Cin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[1]~7 ),
  43711. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  43713. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ),
  43714. .SyncReset(SyncReset_X56_Y6_GND),
  43715. .ShiftData(),
  43716. .SyncLoad(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ),
  43717. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2]~8_combout ),
  43718. .Cout(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2]~9 ),
  43719. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]));
  43720. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .coord_x = 18;
  43721. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .coord_y = 1;
  43722. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .coord_z = 9;
  43723. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .mask = 16'hC30C;
  43724. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .modeMux = 1'b1;
  43725. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  43726. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  43727. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .BypassEn = 1'b1;
  43728. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  43729. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] (
  43730. .A(vcc),
  43731. .B(vcc),
  43732. .C(\~GND~combout ),
  43733. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3]),
  43734. .Cin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[2]~9 ),
  43735. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3]),
  43736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  43737. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ),
  43738. .SyncReset(SyncReset_X56_Y6_GND),
  43739. .ShiftData(),
  43740. .SyncLoad(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ),
  43741. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3]~10_combout ),
  43742. .Cout(),
  43743. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3]));
  43744. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .coord_x = 18;
  43745. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .coord_y = 1;
  43746. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .coord_z = 10;
  43747. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .mask = 16'h0FF0;
  43748. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .modeMux = 1'b1;
  43749. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  43750. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  43751. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .BypassEn = 1'b1;
  43752. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  43753. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_bit (
  43754. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  43755. .B(vcc),
  43756. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  43757. .D(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  43758. .Cin(),
  43759. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  43760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X52_Y3_SIG_VCC ),
  43761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  43762. .SyncReset(),
  43763. .ShiftData(),
  43764. .SyncLoad(),
  43765. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always2~1_combout ),
  43766. .Cout(),
  43767. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ));
  43768. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .coord_x = 17;
  43769. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .coord_y = 1;
  43770. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .coord_z = 5;
  43771. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .mask = 16'hA000;
  43772. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .modeMux = 1'b0;
  43773. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .FeedbackMux = 1'b0;
  43774. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .ShiftMux = 1'b0;
  43775. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .BypassEn = 1'b0;
  43776. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_bit .CarryEnb = 1'b1;
  43777. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] (
  43778. .A(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  43779. .B(\macro_inst|u_uart[1]|u_rx[1]|always3~2_combout ),
  43780. .C(vcc),
  43781. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  43782. .Cin(),
  43783. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]),
  43784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X57_Y6_SIG_SIG ),
  43785. .AsyncReset(AsyncReset_X57_Y6_GND),
  43786. .SyncReset(),
  43787. .ShiftData(),
  43788. .SyncLoad(),
  43789. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~4_combout ),
  43790. .Cout(),
  43791. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]));
  43792. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .coord_x = 19;
  43793. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .coord_y = 1;
  43794. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .coord_z = 1;
  43795. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .mask = 16'hFF07;
  43796. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .modeMux = 1'b0;
  43797. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  43798. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .ShiftMux = 1'b0;
  43799. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .BypassEn = 1'b0;
  43800. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0] .CarryEnb = 1'b1;
  43801. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] (
  43802. .A(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  43803. .B(\macro_inst|u_uart[1]|u_rx[1]|always3~2_combout ),
  43804. .C(\macro_inst|u_uart[1]|u_rx[1]|Add4~2_combout ),
  43805. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  43806. .Cin(),
  43807. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]),
  43808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X56_Y6_SIG_SIG ),
  43809. .AsyncReset(AsyncReset_X56_Y6_GND),
  43810. .SyncReset(),
  43811. .ShiftData(),
  43812. .SyncLoad(),
  43813. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~5_combout ),
  43814. .Cout(),
  43815. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]));
  43816. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .coord_x = 18;
  43817. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .coord_y = 1;
  43818. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .coord_z = 5;
  43819. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .mask = 16'hFF8B;
  43820. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .modeMux = 1'b0;
  43821. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  43822. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .ShiftMux = 1'b0;
  43823. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .BypassEn = 1'b0;
  43824. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[1] .CarryEnb = 1'b1;
  43825. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] (
  43826. .A(\macro_inst|u_uart[1]|u_rx[1]|Add4~1_combout ),
  43827. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  43828. .C(\macro_inst|u_uart[1]|u_rx[1]|always3~1_combout ),
  43829. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  43830. .Cin(),
  43831. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2]),
  43832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout_X56_Y6_SIG_SIG ),
  43833. .AsyncReset(AsyncReset_X56_Y6_GND),
  43834. .SyncReset(),
  43835. .ShiftData(),
  43836. .SyncLoad(),
  43837. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~2_combout ),
  43838. .Cout(),
  43839. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [2]));
  43840. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .coord_x = 18;
  43841. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .coord_y = 1;
  43842. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .coord_z = 11;
  43843. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .mask = 16'hCDDD;
  43844. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .modeMux = 1'b0;
  43845. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  43846. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .ShiftMux = 1'b0;
  43847. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .BypassEn = 1'b0;
  43848. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[2] .CarryEnb = 1'b1;
  43849. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] (
  43850. .A(\macro_inst|u_uart[1]|u_rx[1]|Add4~0_combout ),
  43851. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  43852. .C(vcc),
  43853. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  43854. .Cin(),
  43855. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [3]),
  43856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  43857. .AsyncReset(AsyncReset_X56_Y6_GND),
  43858. .SyncReset(),
  43859. .ShiftData(),
  43860. .SyncLoad(),
  43861. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt~1_combout ),
  43862. .Cout(),
  43863. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [3]));
  43864. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .coord_x = 18;
  43865. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .coord_y = 1;
  43866. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .coord_z = 4;
  43867. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .mask = 16'h0074;
  43868. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .modeMux = 1'b0;
  43869. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  43870. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .ShiftMux = 1'b0;
  43871. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .BypassEn = 1'b0;
  43872. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[3] .CarryEnb = 1'b1;
  43873. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] (
  43874. .A(\macro_inst|u_uart[1]|u_rx[1]|Selector2~1_combout ),
  43875. .B(vcc),
  43876. .C(vcc),
  43877. .D(\macro_inst|u_uart[1]|u_regs|rx_read [1]),
  43878. .Cin(),
  43879. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  43880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  43881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  43882. .SyncReset(),
  43883. .ShiftData(),
  43884. .SyncLoad(),
  43885. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter~0_combout ),
  43886. .Cout(),
  43887. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]));
  43888. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .coord_x = 18;
  43889. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .coord_y = 8;
  43890. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .coord_z = 11;
  43891. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .mask = 16'h0AFA;
  43892. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .modeMux = 1'b0;
  43893. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  43894. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  43895. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .BypassEn = 1'b0;
  43896. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  43897. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] (
  43898. .A(vcc),
  43899. .B(vcc),
  43900. .C(vcc),
  43901. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [0]),
  43902. .Cin(),
  43903. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~q ),
  43904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  43905. .AsyncReset(AsyncReset_X56_Y11_GND),
  43906. .SyncReset(),
  43907. .ShiftData(),
  43908. .SyncLoad(),
  43909. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~feeder_combout ),
  43910. .Cout(),
  43911. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0]~q ));
  43912. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .coord_x = 20;
  43913. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .coord_y = 6;
  43914. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .coord_z = 3;
  43915. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .mask = 16'hFF00;
  43916. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  43917. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  43918. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  43919. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .BypassEn = 1'b0;
  43920. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  43921. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] (
  43922. .A(vcc),
  43923. .B(vcc),
  43924. .C(vcc),
  43925. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1]),
  43926. .Cin(),
  43927. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~q ),
  43928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  43929. .AsyncReset(AsyncReset_X56_Y11_GND),
  43930. .SyncReset(),
  43931. .ShiftData(),
  43932. .SyncLoad(),
  43933. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~feeder_combout ),
  43934. .Cout(),
  43935. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1]~q ));
  43936. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .coord_x = 20;
  43937. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .coord_y = 6;
  43938. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .coord_z = 15;
  43939. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .mask = 16'hFF00;
  43940. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  43941. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  43942. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  43943. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .BypassEn = 1'b0;
  43944. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  43945. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] (
  43946. .A(vcc),
  43947. .B(vcc),
  43948. .C(vcc),
  43949. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2]),
  43950. .Cin(),
  43951. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~q ),
  43952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  43953. .AsyncReset(AsyncReset_X56_Y11_GND),
  43954. .SyncReset(),
  43955. .ShiftData(),
  43956. .SyncLoad(),
  43957. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~feeder_combout ),
  43958. .Cout(),
  43959. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2]~q ));
  43960. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .coord_x = 20;
  43961. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .coord_y = 6;
  43962. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .coord_z = 12;
  43963. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .mask = 16'hFF00;
  43964. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  43965. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  43966. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  43967. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .BypassEn = 1'b0;
  43968. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  43969. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] (
  43970. .A(vcc),
  43971. .B(vcc),
  43972. .C(vcc),
  43973. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3]),
  43974. .Cin(),
  43975. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~q ),
  43976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  43977. .AsyncReset(AsyncReset_X56_Y11_GND),
  43978. .SyncReset(),
  43979. .ShiftData(),
  43980. .SyncLoad(),
  43981. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~feeder_combout ),
  43982. .Cout(),
  43983. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3]~q ));
  43984. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .coord_x = 20;
  43985. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .coord_y = 6;
  43986. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .coord_z = 1;
  43987. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .mask = 16'hFF00;
  43988. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  43989. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  43990. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  43991. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .BypassEn = 1'b0;
  43992. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  43993. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] (
  43994. .A(vcc),
  43995. .B(vcc),
  43996. .C(vcc),
  43997. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [4]),
  43998. .Cin(),
  43999. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~q ),
  44000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  44001. .AsyncReset(AsyncReset_X56_Y11_GND),
  44002. .SyncReset(),
  44003. .ShiftData(),
  44004. .SyncLoad(),
  44005. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~feeder_combout ),
  44006. .Cout(),
  44007. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4]~q ));
  44008. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .coord_x = 20;
  44009. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .coord_y = 6;
  44010. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .coord_z = 5;
  44011. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .mask = 16'hFF00;
  44012. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  44013. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  44014. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  44015. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .BypassEn = 1'b0;
  44016. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  44017. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] (
  44018. .A(vcc),
  44019. .B(vcc),
  44020. .C(vcc),
  44021. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5]),
  44022. .Cin(),
  44023. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~q ),
  44024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  44025. .AsyncReset(AsyncReset_X56_Y11_GND),
  44026. .SyncReset(),
  44027. .ShiftData(),
  44028. .SyncLoad(),
  44029. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~feeder_combout ),
  44030. .Cout(),
  44031. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5]~q ));
  44032. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .coord_x = 20;
  44033. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .coord_y = 6;
  44034. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .coord_z = 0;
  44035. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .mask = 16'hFF00;
  44036. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  44037. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  44038. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  44039. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .BypassEn = 1'b0;
  44040. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  44041. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] (
  44042. .A(vcc),
  44043. .B(vcc),
  44044. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6]),
  44045. .D(vcc),
  44046. .Cin(),
  44047. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~q ),
  44048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y7_SIG_SIG ),
  44049. .AsyncReset(AsyncReset_X56_Y7_GND),
  44050. .SyncReset(),
  44051. .ShiftData(),
  44052. .SyncLoad(),
  44053. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~feeder_combout ),
  44054. .Cout(),
  44055. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6]~q ));
  44056. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .coord_x = 19;
  44057. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .coord_y = 4;
  44058. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .coord_z = 6;
  44059. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .mask = 16'hF0F0;
  44060. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  44061. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  44062. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  44063. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .BypassEn = 1'b0;
  44064. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  44065. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] (
  44066. .A(vcc),
  44067. .B(vcc),
  44068. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7]),
  44069. .D(vcc),
  44070. .Cin(),
  44071. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~q ),
  44072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout_X56_Y11_SIG_SIG ),
  44073. .AsyncReset(AsyncReset_X56_Y11_GND),
  44074. .SyncReset(),
  44075. .ShiftData(),
  44076. .SyncLoad(),
  44077. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~feeder_combout ),
  44078. .Cout(),
  44079. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7]~q ));
  44080. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .coord_x = 20;
  44081. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .coord_y = 6;
  44082. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .coord_z = 8;
  44083. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .mask = 16'hF0F0;
  44084. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  44085. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  44086. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  44087. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .BypassEn = 1'b0;
  44088. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  44089. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 (
  44090. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_sample~0_combout ),
  44091. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ),
  44092. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  44093. .D(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  44094. .Cin(),
  44095. .Qin(),
  44096. .Clk(),
  44097. .AsyncReset(),
  44098. .SyncReset(),
  44099. .ShiftData(),
  44100. .SyncLoad(),
  44101. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0_combout ),
  44102. .Cout(),
  44103. .Q());
  44104. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .coord_x = 19;
  44105. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .coord_y = 4;
  44106. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .coord_z = 1;
  44107. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .mask = 16'h0800;
  44108. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  44109. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  44110. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  44111. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  44112. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  44113. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_idle (
  44114. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  44115. .B(\macro_inst|u_uart[1]|u_rx[1]|always8~0_combout ),
  44116. .C(vcc),
  44117. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  44118. .Cin(),
  44119. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_idle~q ),
  44120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ),
  44121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  44122. .SyncReset(),
  44123. .ShiftData(),
  44124. .SyncLoad(),
  44125. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_idle~0_combout ),
  44126. .Cout(),
  44127. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_idle~q ));
  44128. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .coord_x = 18;
  44129. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .coord_y = 3;
  44130. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .coord_z = 9;
  44131. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .mask = 16'hDCFC;
  44132. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .modeMux = 1'b0;
  44133. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .FeedbackMux = 1'b1;
  44134. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .ShiftMux = 1'b0;
  44135. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .BypassEn = 1'b0;
  44136. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle .CarryEnb = 1'b1;
  44137. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en (
  44138. .A(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[1]~13_combout ),
  44139. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_fifo|counter [0]),
  44140. .C(vcc),
  44141. .D(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  44142. .Cin(),
  44143. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~q ),
  44144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  44145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  44146. .SyncReset(),
  44147. .ShiftData(),
  44148. .SyncLoad(),
  44149. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~0_combout ),
  44150. .Cout(),
  44151. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_idle_en~q ));
  44152. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .coord_x = 18;
  44153. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .coord_y = 8;
  44154. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .coord_z = 14;
  44155. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .mask = 16'hDCFC;
  44156. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .modeMux = 1'b0;
  44157. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .FeedbackMux = 1'b1;
  44158. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .ShiftMux = 1'b0;
  44159. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .BypassEn = 1'b0;
  44160. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_idle_en .CarryEnb = 1'b1;
  44161. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] (
  44162. .A(vcc),
  44163. .B(vcc),
  44164. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  44165. .D(\SIM_IO[7]~input_o ),
  44166. .Cin(),
  44167. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_in [0]),
  44168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  44169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  44170. .SyncReset(),
  44171. .ShiftData(),
  44172. .SyncLoad(),
  44173. .LutOut(\macro_inst|uart_rxd [7]),
  44174. .Cout(),
  44175. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_in [0]));
  44176. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .coord_x = 18;
  44177. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .coord_y = 2;
  44178. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .coord_z = 4;
  44179. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .mask = 16'h000F;
  44180. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .modeMux = 1'b0;
  44181. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .FeedbackMux = 1'b0;
  44182. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .ShiftMux = 1'b0;
  44183. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .BypassEn = 1'b0;
  44184. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[0] .CarryEnb = 1'b1;
  44185. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] (
  44186. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_in [3]),
  44187. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_in [2]),
  44188. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_in [0]),
  44189. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_in [4]),
  44190. .Cin(),
  44191. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_in [1]),
  44192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  44193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  44194. .SyncReset(SyncReset_X53_Y4_GND),
  44195. .ShiftData(),
  44196. .SyncLoad(SyncLoad_X53_Y4_VCC),
  44197. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  44198. .Cout(),
  44199. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_in [1]));
  44200. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .coord_x = 18;
  44201. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .coord_y = 2;
  44202. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .coord_z = 1;
  44203. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .mask = 16'h7711;
  44204. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .modeMux = 1'b0;
  44205. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .FeedbackMux = 1'b0;
  44206. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .ShiftMux = 1'b0;
  44207. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .BypassEn = 1'b1;
  44208. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[1] .CarryEnb = 1'b1;
  44209. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] (
  44210. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_in [3]),
  44211. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_in [4]),
  44212. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_in [1]),
  44213. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ),
  44214. .Cin(),
  44215. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_in [2]),
  44216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X56_Y9_SIG_SIG ),
  44217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44218. .SyncReset(SyncReset_X56_Y9_GND),
  44219. .ShiftData(),
  44220. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44221. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout ),
  44222. .Cout(),
  44223. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_in [2]));
  44224. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .coord_x = 19;
  44225. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .coord_y = 3;
  44226. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .coord_z = 2;
  44227. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .mask = 16'h00B2;
  44228. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .modeMux = 1'b0;
  44229. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .FeedbackMux = 1'b1;
  44230. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .ShiftMux = 1'b0;
  44231. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .BypassEn = 1'b1;
  44232. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[2] .CarryEnb = 1'b1;
  44233. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] (
  44234. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_in [2]),
  44235. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~q ),
  44236. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_in [2]),
  44237. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_in [4]),
  44238. .Cin(),
  44239. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_in [3]),
  44240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X56_Y9_SIG_SIG ),
  44241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44242. .SyncReset(SyncReset_X56_Y9_GND),
  44243. .ShiftData(),
  44244. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44245. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always10~1_combout ),
  44246. .Cout(),
  44247. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_in [3]));
  44248. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .coord_x = 19;
  44249. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .coord_y = 3;
  44250. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .coord_z = 3;
  44251. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .mask = 16'h93C9;
  44252. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .modeMux = 1'b0;
  44253. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .FeedbackMux = 1'b1;
  44254. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .ShiftMux = 1'b0;
  44255. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .BypassEn = 1'b1;
  44256. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[3] .CarryEnb = 1'b1;
  44257. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] (
  44258. .A(vcc),
  44259. .B(vcc),
  44260. .C(vcc),
  44261. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_in [3]),
  44262. .Cin(),
  44263. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_in [4]),
  44264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X56_Y9_SIG_SIG ),
  44265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44266. .SyncReset(),
  44267. .ShiftData(),
  44268. .SyncLoad(),
  44269. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_in[4]~0_combout ),
  44270. .Cout(),
  44271. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_in [4]));
  44272. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .coord_x = 19;
  44273. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .coord_y = 3;
  44274. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .coord_z = 7;
  44275. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .mask = 16'h00FF;
  44276. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .modeMux = 1'b0;
  44277. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .FeedbackMux = 1'b0;
  44278. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .ShiftMux = 1'b0;
  44279. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .BypassEn = 1'b0;
  44280. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_in[4] .CarryEnb = 1'b1;
  44281. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_parity (
  44282. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~0_combout ),
  44283. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  44284. .C(vcc),
  44285. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  44286. .Cin(),
  44287. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~q ),
  44288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  44289. .AsyncReset(AsyncReset_X56_Y7_GND),
  44290. .SyncReset(),
  44291. .ShiftData(),
  44292. .SyncLoad(),
  44293. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~1_combout ),
  44294. .Cout(),
  44295. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~q ));
  44296. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .coord_x = 19;
  44297. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .coord_y = 4;
  44298. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .coord_z = 13;
  44299. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .mask = 16'h12DE;
  44300. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .modeMux = 1'b0;
  44301. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .FeedbackMux = 1'b1;
  44302. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .ShiftMux = 1'b0;
  44303. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .BypassEn = 1'b0;
  44304. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_parity .CarryEnb = 1'b1;
  44305. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 (
  44306. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [2]),
  44307. .B(vcc),
  44308. .C(vcc),
  44309. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [1]),
  44310. .Cin(),
  44311. .Qin(),
  44312. .Clk(),
  44313. .AsyncReset(),
  44314. .SyncReset(),
  44315. .ShiftData(),
  44316. .SyncLoad(),
  44317. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_sample~0_combout ),
  44318. .Cout(),
  44319. .Q());
  44320. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .coord_x = 17;
  44321. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .coord_y = 3;
  44322. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .coord_z = 9;
  44323. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .mask = 16'h0055;
  44324. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .modeMux = 1'b0;
  44325. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .FeedbackMux = 1'b0;
  44326. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .ShiftMux = 1'b0;
  44327. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .BypassEn = 1'b0;
  44328. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_sample~0 .CarryEnb = 1'b1;
  44329. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] (
  44330. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3]),
  44331. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1]),
  44332. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1]),
  44333. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2]),
  44334. .Cin(),
  44335. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [0]),
  44336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44338. .SyncReset(SyncReset_X56_Y9_GND),
  44339. .ShiftData(),
  44340. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44341. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always11~1_combout ),
  44342. .Cout(),
  44343. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [0]));
  44344. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .coord_x = 19;
  44345. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .coord_y = 3;
  44346. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .coord_z = 0;
  44347. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .mask = 16'h0001;
  44348. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .modeMux = 1'b0;
  44349. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .FeedbackMux = 1'b1;
  44350. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .ShiftMux = 1'b0;
  44351. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .BypassEn = 1'b1;
  44352. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[0] .CarryEnb = 1'b1;
  44353. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] (
  44354. .A(vcc),
  44355. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ),
  44356. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2]),
  44357. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  44358. .Cin(),
  44359. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1]),
  44360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44362. .SyncReset(SyncReset_X56_Y9_GND),
  44363. .ShiftData(),
  44364. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44365. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector3~0_combout ),
  44366. .Cout(),
  44367. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [1]));
  44368. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .coord_x = 19;
  44369. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .coord_y = 3;
  44370. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .coord_z = 1;
  44371. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .mask = 16'h00CC;
  44372. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .modeMux = 1'b0;
  44373. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  44374. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .ShiftMux = 1'b0;
  44375. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .BypassEn = 1'b1;
  44376. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[1] .CarryEnb = 1'b1;
  44377. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] (
  44378. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  44379. .B(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  44380. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3]),
  44381. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  44382. .Cin(),
  44383. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2]),
  44384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44386. .SyncReset(SyncReset_X56_Y9_GND),
  44387. .ShiftData(),
  44388. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44389. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  44390. .Cout(),
  44391. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [2]));
  44392. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .coord_x = 19;
  44393. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .coord_y = 3;
  44394. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .coord_z = 11;
  44395. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .mask = 16'hDD00;
  44396. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .modeMux = 1'b0;
  44397. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  44398. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .ShiftMux = 1'b0;
  44399. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .BypassEn = 1'b1;
  44400. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[2] .CarryEnb = 1'b1;
  44401. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] (
  44402. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  44403. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  44404. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [4]),
  44405. .D(vcc),
  44406. .Cin(),
  44407. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3]),
  44408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44410. .SyncReset(SyncReset_X56_Y9_GND),
  44411. .ShiftData(),
  44412. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44413. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector5~3_combout ),
  44414. .Cout(),
  44415. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [3]));
  44416. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .coord_x = 19;
  44417. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .coord_y = 3;
  44418. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .coord_z = 10;
  44419. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .mask = 16'h2222;
  44420. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .modeMux = 1'b0;
  44421. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  44422. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .ShiftMux = 1'b0;
  44423. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .BypassEn = 1'b1;
  44424. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[3] .CarryEnb = 1'b1;
  44425. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] (
  44426. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7]),
  44427. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6]),
  44428. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5]),
  44429. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5]),
  44430. .Cin(),
  44431. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [4]),
  44432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44434. .SyncReset(SyncReset_X56_Y9_GND),
  44435. .ShiftData(),
  44436. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44437. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always11~0_combout ),
  44438. .Cout(),
  44439. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [4]));
  44440. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .coord_x = 19;
  44441. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .coord_y = 3;
  44442. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .coord_z = 14;
  44443. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .mask = 16'h0001;
  44444. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .modeMux = 1'b0;
  44445. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  44446. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .ShiftMux = 1'b0;
  44447. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .BypassEn = 1'b1;
  44448. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[4] .CarryEnb = 1'b1;
  44449. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] (
  44450. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  44451. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  44452. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6]),
  44453. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  44454. .Cin(),
  44455. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5]),
  44456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44458. .SyncReset(SyncReset_X56_Y9_GND),
  44459. .ShiftData(),
  44460. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44461. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout ),
  44462. .Cout(),
  44463. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [5]));
  44464. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .coord_x = 19;
  44465. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .coord_y = 3;
  44466. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .coord_z = 15;
  44467. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .mask = 16'hFF88;
  44468. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .modeMux = 1'b0;
  44469. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  44470. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .ShiftMux = 1'b0;
  44471. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .BypassEn = 1'b1;
  44472. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[5] .CarryEnb = 1'b1;
  44473. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] (
  44474. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  44475. .B(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  44476. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7]),
  44477. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  44478. .Cin(),
  44479. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6]),
  44480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44482. .SyncReset(SyncReset_X56_Y9_GND),
  44483. .ShiftData(),
  44484. .SyncLoad(SyncLoad_X56_Y9_VCC),
  44485. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_parity~0_combout ),
  44486. .Cout(),
  44487. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [6]));
  44488. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .coord_x = 19;
  44489. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .coord_y = 3;
  44490. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .coord_z = 9;
  44491. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .mask = 16'h2000;
  44492. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .modeMux = 1'b0;
  44493. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  44494. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .ShiftMux = 1'b0;
  44495. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .BypassEn = 1'b1;
  44496. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[6] .CarryEnb = 1'b1;
  44497. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] (
  44498. .A(vcc),
  44499. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_in [3]),
  44500. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_in [2]),
  44501. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_in [4]),
  44502. .Cin(),
  44503. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7]),
  44504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[1]|always4~2_combout_X56_Y9_SIG_SIG ),
  44505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y9_SIG ),
  44506. .SyncReset(),
  44507. .ShiftData(),
  44508. .SyncLoad(),
  44509. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  44510. .Cout(),
  44511. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg [7]));
  44512. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .coord_x = 19;
  44513. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .coord_y = 3;
  44514. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .coord_z = 6;
  44515. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .mask = 16'h3F03;
  44516. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .modeMux = 1'b0;
  44517. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  44518. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .ShiftMux = 1'b0;
  44519. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .BypassEn = 1'b0;
  44520. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_shift_reg[7] .CarryEnb = 1'b1;
  44521. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA (
  44522. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  44523. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector2~3_combout ),
  44524. .C(\macro_inst|u_uart[1]|u_rx[1]|Selector2~5_combout ),
  44525. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector2~2_combout ),
  44526. .Cin(),
  44527. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ),
  44528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y6_SIG_VCC ),
  44529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y6_SIG ),
  44530. .SyncReset(),
  44531. .ShiftData(),
  44532. .SyncLoad(),
  44533. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector2~6_combout ),
  44534. .Cout(),
  44535. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA~q ));
  44536. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .coord_x = 18;
  44537. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .coord_y = 1;
  44538. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .coord_z = 3;
  44539. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .mask = 16'h00F8;
  44540. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .modeMux = 1'b0;
  44541. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  44542. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .ShiftMux = 1'b0;
  44543. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .BypassEn = 1'b0;
  44544. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_DATA .CarryEnb = 1'b1;
  44545. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE (
  44546. .A(\macro_inst|u_uart[1]|u_rx[1]|Add1~0_combout ),
  44547. .B(vcc),
  44548. .C(vcc),
  44549. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector2~2_combout ),
  44550. .Cin(),
  44551. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ),
  44552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  44553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ),
  44554. .SyncReset(),
  44555. .ShiftData(),
  44556. .SyncLoad(),
  44557. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector0~0_combout ),
  44558. .Cout(),
  44559. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE~q ));
  44560. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .coord_x = 17;
  44561. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .coord_y = 3;
  44562. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .coord_z = 12;
  44563. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .mask = 16'h00F5;
  44564. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .modeMux = 1'b0;
  44565. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  44566. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  44567. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .BypassEn = 1'b0;
  44568. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  44569. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY (
  44570. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~0_combout ),
  44571. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector4~0_combout ),
  44572. .C(vcc),
  44573. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector4~5_combout ),
  44574. .Cin(),
  44575. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  44576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ),
  44577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  44578. .SyncReset(),
  44579. .ShiftData(),
  44580. .SyncLoad(),
  44581. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~1_combout ),
  44582. .Cout(),
  44583. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ));
  44584. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .coord_x = 18;
  44585. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .coord_y = 3;
  44586. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .coord_z = 6;
  44587. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .mask = 16'h88F8;
  44588. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .modeMux = 1'b0;
  44589. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  44590. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  44591. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .BypassEn = 1'b0;
  44592. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  44593. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START (
  44594. .A(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout ),
  44595. .B(\macro_inst|u_uart[1]|u_rx[1]|Selector2~2_combout ),
  44596. .C(vcc),
  44597. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector2~4_combout ),
  44598. .Cin(),
  44599. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  44600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  44601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ),
  44602. .SyncReset(),
  44603. .ShiftData(),
  44604. .SyncLoad(),
  44605. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector1~0_combout ),
  44606. .Cout(),
  44607. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ));
  44608. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .coord_x = 17;
  44609. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .coord_y = 3;
  44610. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .coord_z = 5;
  44611. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .mask = 16'h2232;
  44612. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .modeMux = 1'b0;
  44613. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .FeedbackMux = 1'b1;
  44614. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .ShiftMux = 1'b0;
  44615. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .BypassEn = 1'b0;
  44616. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START .CarryEnb = 1'b1;
  44617. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP (
  44618. .A(vcc),
  44619. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0_combout ),
  44620. .C(vcc),
  44621. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector4~5_combout ),
  44622. .Cin(),
  44623. .Qin(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ),
  44624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ),
  44625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  44626. .SyncReset(),
  44627. .ShiftData(),
  44628. .SyncLoad(),
  44629. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~1_combout ),
  44630. .Cout(),
  44631. .Q(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ));
  44632. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .coord_x = 18;
  44633. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .coord_y = 3;
  44634. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .coord_z = 10;
  44635. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .mask = 16'hCCF0;
  44636. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .modeMux = 1'b0;
  44637. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  44638. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .ShiftMux = 1'b0;
  44639. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .BypassEn = 1'b0;
  44640. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP .CarryEnb = 1'b1;
  44641. alta_slice \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 (
  44642. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  44643. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  44644. .C(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_PARITY~q ),
  44645. .D(\macro_inst|u_uart[1]|u_rx[1]|Selector4~0_combout ),
  44646. .Cin(),
  44647. .Qin(),
  44648. .Clk(),
  44649. .AsyncReset(),
  44650. .SyncReset(),
  44651. .ShiftData(),
  44652. .SyncLoad(),
  44653. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0_combout ),
  44654. .Cout(),
  44655. .Q());
  44656. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .coord_x = 18;
  44657. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .coord_y = 3;
  44658. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .coord_z = 7;
  44659. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .mask = 16'hD5C0;
  44660. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  44661. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  44662. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  44663. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  44664. defparam \macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  44665. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Add4~0 (
  44666. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]),
  44667. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2]),
  44668. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]),
  44669. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [3]),
  44670. .Cin(),
  44671. .Qin(),
  44672. .Clk(),
  44673. .AsyncReset(),
  44674. .SyncReset(),
  44675. .ShiftData(),
  44676. .SyncLoad(),
  44677. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Add4~0_combout ),
  44678. .Cout(),
  44679. .Q());
  44680. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .coord_x = 18;
  44681. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .coord_y = 5;
  44682. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .coord_z = 2;
  44683. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .mask = 16'h01FE;
  44684. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .modeMux = 1'b0;
  44685. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .FeedbackMux = 1'b0;
  44686. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .ShiftMux = 1'b0;
  44687. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .BypassEn = 1'b0;
  44688. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~0 .CarryEnb = 1'b1;
  44689. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Add4~1 (
  44690. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]),
  44691. .B(vcc),
  44692. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]),
  44693. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2]),
  44694. .Cin(),
  44695. .Qin(),
  44696. .Clk(),
  44697. .AsyncReset(),
  44698. .SyncReset(),
  44699. .ShiftData(),
  44700. .SyncLoad(),
  44701. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Add4~1_combout ),
  44702. .Cout(),
  44703. .Q());
  44704. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .coord_x = 18;
  44705. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .coord_y = 5;
  44706. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .coord_z = 8;
  44707. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .mask = 16'h05FA;
  44708. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .modeMux = 1'b0;
  44709. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .FeedbackMux = 1'b0;
  44710. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .ShiftMux = 1'b0;
  44711. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .BypassEn = 1'b0;
  44712. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~1 .CarryEnb = 1'b1;
  44713. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Add4~2 (
  44714. .A(vcc),
  44715. .B(vcc),
  44716. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]),
  44717. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]),
  44718. .Cin(),
  44719. .Qin(),
  44720. .Clk(),
  44721. .AsyncReset(),
  44722. .SyncReset(),
  44723. .ShiftData(),
  44724. .SyncLoad(),
  44725. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Add4~2_combout ),
  44726. .Cout(),
  44727. .Q());
  44728. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .coord_x = 18;
  44729. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .coord_y = 5;
  44730. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .coord_z = 14;
  44731. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .mask = 16'h0FF0;
  44732. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .modeMux = 1'b0;
  44733. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .FeedbackMux = 1'b0;
  44734. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .ShiftMux = 1'b0;
  44735. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .BypassEn = 1'b0;
  44736. defparam \macro_inst|u_uart[1]|u_rx[2]|Add4~2 .CarryEnb = 1'b1;
  44737. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 (
  44738. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  44739. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ),
  44740. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  44741. .D(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  44742. .Cin(),
  44743. .Qin(),
  44744. .Clk(),
  44745. .AsyncReset(),
  44746. .SyncReset(),
  44747. .ShiftData(),
  44748. .SyncLoad(),
  44749. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  44750. .Cout(),
  44751. .Q());
  44752. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .coord_x = 15;
  44753. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .coord_y = 7;
  44754. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .coord_z = 3;
  44755. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .mask = 16'h0400;
  44756. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .modeMux = 1'b0;
  44757. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .FeedbackMux = 1'b0;
  44758. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .ShiftMux = 1'b0;
  44759. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .BypassEn = 1'b0;
  44760. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~1 .CarryEnb = 1'b1;
  44761. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 (
  44762. .A(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  44763. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_sample~0_combout ),
  44764. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ),
  44765. .D(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  44766. .Cin(),
  44767. .Qin(),
  44768. .Clk(),
  44769. .AsyncReset(),
  44770. .SyncReset(),
  44771. .ShiftData(),
  44772. .SyncLoad(),
  44773. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~2_combout ),
  44774. .Cout(),
  44775. .Q());
  44776. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .coord_x = 18;
  44777. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .coord_y = 5;
  44778. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .coord_z = 4;
  44779. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .mask = 16'h8000;
  44780. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .modeMux = 1'b0;
  44781. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .FeedbackMux = 1'b0;
  44782. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .ShiftMux = 1'b0;
  44783. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .BypassEn = 1'b0;
  44784. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~2 .CarryEnb = 1'b1;
  44785. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 (
  44786. .A(vcc),
  44787. .B(vcc),
  44788. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  44789. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector4~0_combout ),
  44790. .Cin(),
  44791. .Qin(),
  44792. .Clk(),
  44793. .AsyncReset(),
  44794. .SyncReset(),
  44795. .ShiftData(),
  44796. .SyncLoad(),
  44797. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~3_combout ),
  44798. .Cout(),
  44799. .Q());
  44800. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .coord_x = 19;
  44801. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .coord_y = 5;
  44802. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .coord_z = 14;
  44803. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .mask = 16'hF000;
  44804. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .modeMux = 1'b0;
  44805. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .FeedbackMux = 1'b0;
  44806. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .ShiftMux = 1'b0;
  44807. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .BypassEn = 1'b0;
  44808. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~3 .CarryEnb = 1'b1;
  44809. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 (
  44810. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  44811. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector2~3_combout ),
  44812. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  44813. .D(\macro_inst|u_uart[1]|u_rx[2]|always3~2_combout ),
  44814. .Cin(),
  44815. .Qin(),
  44816. .Clk(),
  44817. .AsyncReset(),
  44818. .SyncReset(),
  44819. .ShiftData(),
  44820. .SyncLoad(),
  44821. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~4_combout ),
  44822. .Cout(),
  44823. .Q());
  44824. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .coord_x = 17;
  44825. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .coord_y = 4;
  44826. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .coord_z = 5;
  44827. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .mask = 16'hAAA8;
  44828. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .modeMux = 1'b0;
  44829. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .FeedbackMux = 1'b0;
  44830. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .ShiftMux = 1'b0;
  44831. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .BypassEn = 1'b0;
  44832. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~4 .CarryEnb = 1'b1;
  44833. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 (
  44834. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  44835. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ),
  44836. .C(\macro_inst|u_uart[1]|u_rx[2]|Selector2~4_combout ),
  44837. .D(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  44838. .Cin(),
  44839. .Qin(),
  44840. .Clk(),
  44841. .AsyncReset(),
  44842. .SyncReset(),
  44843. .ShiftData(),
  44844. .SyncLoad(),
  44845. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~5_combout ),
  44846. .Cout(),
  44847. .Q());
  44848. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .coord_x = 19;
  44849. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .coord_y = 5;
  44850. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .coord_z = 9;
  44851. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .mask = 16'h0A08;
  44852. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .modeMux = 1'b0;
  44853. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .FeedbackMux = 1'b0;
  44854. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .ShiftMux = 1'b0;
  44855. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .BypassEn = 1'b0;
  44856. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector2~5 .CarryEnb = 1'b1;
  44857. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 (
  44858. .A(vcc),
  44859. .B(vcc),
  44860. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  44861. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  44862. .Cin(),
  44863. .Qin(),
  44864. .Clk(),
  44865. .AsyncReset(),
  44866. .SyncReset(),
  44867. .ShiftData(),
  44868. .SyncLoad(),
  44869. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector3~0_combout ),
  44870. .Cout(),
  44871. .Q());
  44872. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .coord_x = 17;
  44873. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .coord_y = 6;
  44874. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .coord_z = 11;
  44875. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .mask = 16'hF000;
  44876. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .modeMux = 1'b0;
  44877. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .FeedbackMux = 1'b0;
  44878. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .ShiftMux = 1'b0;
  44879. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .BypassEn = 1'b0;
  44880. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~0 .CarryEnb = 1'b1;
  44881. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 (
  44882. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  44883. .B(vcc),
  44884. .C(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  44885. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  44886. .Cin(),
  44887. .Qin(),
  44888. .Clk(),
  44889. .AsyncReset(),
  44890. .SyncReset(),
  44891. .ShiftData(),
  44892. .SyncLoad(),
  44893. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector3~1_combout ),
  44894. .Cout(),
  44895. .Q());
  44896. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .coord_x = 17;
  44897. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .coord_y = 3;
  44898. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .coord_z = 0;
  44899. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .mask = 16'hA000;
  44900. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .modeMux = 1'b0;
  44901. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .FeedbackMux = 1'b0;
  44902. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .ShiftMux = 1'b0;
  44903. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .BypassEn = 1'b0;
  44904. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector3~1 .CarryEnb = 1'b1;
  44905. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 (
  44906. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  44907. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  44908. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0]),
  44909. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3]),
  44910. .Cin(),
  44911. .Qin(),
  44912. .Clk(),
  44913. .AsyncReset(),
  44914. .SyncReset(),
  44915. .ShiftData(),
  44916. .SyncLoad(),
  44917. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector4~0_combout ),
  44918. .Cout(),
  44919. .Q());
  44920. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .coord_x = 19;
  44921. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .coord_y = 5;
  44922. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .coord_z = 5;
  44923. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .mask = 16'h0001;
  44924. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .modeMux = 1'b0;
  44925. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .FeedbackMux = 1'b0;
  44926. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .ShiftMux = 1'b0;
  44927. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .BypassEn = 1'b0;
  44928. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~0 .CarryEnb = 1'b1;
  44929. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 (
  44930. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  44931. .B(vcc),
  44932. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ),
  44933. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector4~0_combout ),
  44934. .Cin(),
  44935. .Qin(),
  44936. .Clk(),
  44937. .AsyncReset(),
  44938. .SyncReset(),
  44939. .ShiftData(),
  44940. .SyncLoad(),
  44941. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector4~1_combout ),
  44942. .Cout(),
  44943. .Q());
  44944. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .coord_x = 17;
  44945. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .coord_y = 3;
  44946. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .coord_z = 3;
  44947. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .mask = 16'h0A00;
  44948. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .modeMux = 1'b0;
  44949. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .FeedbackMux = 1'b0;
  44950. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .ShiftMux = 1'b0;
  44951. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .BypassEn = 1'b0;
  44952. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~1 .CarryEnb = 1'b1;
  44953. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 (
  44954. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector4~1_combout ),
  44955. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  44956. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ),
  44957. .D(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  44958. .Cin(),
  44959. .Qin(),
  44960. .Clk(),
  44961. .AsyncReset(),
  44962. .SyncReset(),
  44963. .ShiftData(),
  44964. .SyncLoad(),
  44965. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector4~2_combout ),
  44966. .Cout(),
  44967. .Q());
  44968. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .coord_x = 15;
  44969. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .coord_y = 7;
  44970. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .coord_z = 5;
  44971. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .mask = 16'hE0AF;
  44972. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .modeMux = 1'b0;
  44973. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .FeedbackMux = 1'b0;
  44974. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .ShiftMux = 1'b0;
  44975. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .BypassEn = 1'b0;
  44976. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~2 .CarryEnb = 1'b1;
  44977. alta_slice \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 (
  44978. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector4~2_combout ),
  44979. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector3~0_combout ),
  44980. .C(\macro_inst|u_uart[1]|u_rx[2]|Selector3~1_combout ),
  44981. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector4~3_combout ),
  44982. .Cin(),
  44983. .Qin(),
  44984. .Clk(),
  44985. .AsyncReset(),
  44986. .SyncReset(),
  44987. .ShiftData(),
  44988. .SyncLoad(),
  44989. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector4~4_combout ),
  44990. .Cout(),
  44991. .Q());
  44992. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .coord_x = 17;
  44993. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .coord_y = 6;
  44994. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .coord_z = 7;
  44995. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .mask = 16'hFEFC;
  44996. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .modeMux = 1'b0;
  44997. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .FeedbackMux = 1'b0;
  44998. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .ShiftMux = 1'b0;
  44999. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .BypassEn = 1'b0;
  45000. defparam \macro_inst|u_uart[1]|u_rx[2]|Selector4~4 .CarryEnb = 1'b1;
  45001. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always10~1 (
  45002. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]),
  45003. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~q ),
  45004. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_in [4]),
  45005. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]),
  45006. .Cin(),
  45007. .Qin(),
  45008. .Clk(),
  45009. .AsyncReset(),
  45010. .SyncReset(),
  45011. .ShiftData(),
  45012. .SyncLoad(),
  45013. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always10~1_combout ),
  45014. .Cout(),
  45015. .Q());
  45016. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .coord_x = 19;
  45017. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .coord_y = 8;
  45018. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .coord_z = 5;
  45019. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .mask = 16'h9C39;
  45020. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .modeMux = 1'b0;
  45021. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .FeedbackMux = 1'b0;
  45022. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .ShiftMux = 1'b0;
  45023. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .BypassEn = 1'b0;
  45024. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~1 .CarryEnb = 1'b1;
  45025. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always10~2 (
  45026. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  45027. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_sample~0_combout ),
  45028. .C(\macro_inst|u_uart[1]|u_rx[2]|always10~1_combout ),
  45029. .D(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  45030. .Cin(),
  45031. .Qin(),
  45032. .Clk(),
  45033. .AsyncReset(),
  45034. .SyncReset(),
  45035. .ShiftData(),
  45036. .SyncLoad(),
  45037. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always10~2_combout ),
  45038. .Cout(),
  45039. .Q());
  45040. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .coord_x = 17;
  45041. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .coord_y = 5;
  45042. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .coord_z = 9;
  45043. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .mask = 16'h8000;
  45044. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .modeMux = 1'b0;
  45045. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .FeedbackMux = 1'b0;
  45046. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .ShiftMux = 1'b0;
  45047. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .BypassEn = 1'b0;
  45048. defparam \macro_inst|u_uart[1]|u_rx[2]|always10~2 .CarryEnb = 1'b1;
  45049. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always11~2 (
  45050. .A(\macro_inst|u_uart[1]|u_rx[2]|always11~1_combout ),
  45051. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  45052. .C(\macro_inst|u_uart[1]|u_rx[2]|always11~0_combout ),
  45053. .D(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  45054. .Cin(),
  45055. .Qin(),
  45056. .Clk(),
  45057. .AsyncReset(),
  45058. .SyncReset(),
  45059. .ShiftData(),
  45060. .SyncLoad(),
  45061. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always11~2_combout ),
  45062. .Cout(),
  45063. .Q());
  45064. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .coord_x = 15;
  45065. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .coord_y = 7;
  45066. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .coord_z = 4;
  45067. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .mask = 16'h0080;
  45068. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .modeMux = 1'b0;
  45069. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .FeedbackMux = 1'b0;
  45070. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .ShiftMux = 1'b0;
  45071. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .BypassEn = 1'b0;
  45072. defparam \macro_inst|u_uart[1]|u_rx[2]|always11~2 .CarryEnb = 1'b1;
  45073. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always2~0 (
  45074. .A(vcc),
  45075. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  45076. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0]),
  45077. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3]),
  45078. .Cin(),
  45079. .Qin(),
  45080. .Clk(),
  45081. .AsyncReset(),
  45082. .SyncReset(),
  45083. .ShiftData(),
  45084. .SyncLoad(),
  45085. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  45086. .Cout(),
  45087. .Q());
  45088. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .coord_x = 19;
  45089. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .coord_y = 5;
  45090. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .coord_z = 12;
  45091. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .mask = 16'hC000;
  45092. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .modeMux = 1'b0;
  45093. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .FeedbackMux = 1'b0;
  45094. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .ShiftMux = 1'b0;
  45095. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .BypassEn = 1'b0;
  45096. defparam \macro_inst|u_uart[1]|u_rx[2]|always2~0 .CarryEnb = 1'b1;
  45097. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always3~1 (
  45098. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]),
  45099. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2]),
  45100. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]),
  45101. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [3]),
  45102. .Cin(),
  45103. .Qin(),
  45104. .Clk(),
  45105. .AsyncReset(),
  45106. .SyncReset(),
  45107. .ShiftData(),
  45108. .SyncLoad(),
  45109. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  45110. .Cout(),
  45111. .Q());
  45112. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .coord_x = 18;
  45113. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .coord_y = 5;
  45114. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .coord_z = 12;
  45115. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .mask = 16'h0001;
  45116. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .modeMux = 1'b0;
  45117. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .FeedbackMux = 1'b0;
  45118. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .ShiftMux = 1'b0;
  45119. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .BypassEn = 1'b0;
  45120. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~1 .CarryEnb = 1'b1;
  45121. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always3~2 (
  45122. .A(vcc),
  45123. .B(vcc),
  45124. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  45125. .D(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  45126. .Cin(),
  45127. .Qin(),
  45128. .Clk(),
  45129. .AsyncReset(),
  45130. .SyncReset(),
  45131. .ShiftData(),
  45132. .SyncLoad(),
  45133. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always3~2_combout ),
  45134. .Cout(),
  45135. .Q());
  45136. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .coord_x = 19;
  45137. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .coord_y = 5;
  45138. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .coord_z = 10;
  45139. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .mask = 16'hF000;
  45140. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .modeMux = 1'b0;
  45141. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .FeedbackMux = 1'b0;
  45142. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .ShiftMux = 1'b0;
  45143. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .BypassEn = 1'b0;
  45144. defparam \macro_inst|u_uart[1]|u_rx[2]|always3~2 .CarryEnb = 1'b1;
  45145. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always4~2 (
  45146. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  45147. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  45148. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  45149. .D(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  45150. .Cin(),
  45151. .Qin(),
  45152. .Clk(),
  45153. .AsyncReset(),
  45154. .SyncReset(),
  45155. .ShiftData(),
  45156. .SyncLoad(),
  45157. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always4~2_combout ),
  45158. .Cout(),
  45159. .Q());
  45160. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .coord_x = 18;
  45161. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .coord_y = 4;
  45162. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .coord_z = 6;
  45163. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .mask = 16'h0200;
  45164. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .modeMux = 1'b0;
  45165. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .FeedbackMux = 1'b0;
  45166. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .ShiftMux = 1'b0;
  45167. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .BypassEn = 1'b0;
  45168. defparam \macro_inst|u_uart[1]|u_rx[2]|always4~2 .CarryEnb = 1'b1;
  45169. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always6~1 (
  45170. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]),
  45171. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]),
  45172. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_in [4]),
  45173. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ),
  45174. .Cin(),
  45175. .Qin(),
  45176. .Clk(),
  45177. .AsyncReset(),
  45178. .SyncReset(),
  45179. .ShiftData(),
  45180. .SyncLoad(),
  45181. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout ),
  45182. .Cout(),
  45183. .Q());
  45184. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .coord_x = 19;
  45185. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .coord_y = 8;
  45186. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .coord_z = 1;
  45187. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .mask = 16'h008E;
  45188. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .modeMux = 1'b0;
  45189. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .FeedbackMux = 1'b0;
  45190. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .ShiftMux = 1'b0;
  45191. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .BypassEn = 1'b0;
  45192. defparam \macro_inst|u_uart[1]|u_rx[2]|always6~1 .CarryEnb = 1'b1;
  45193. alta_slice \macro_inst|u_uart[1]|u_rx[2]|always8~0 (
  45194. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  45195. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~q ),
  45196. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ),
  45197. .D(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  45198. .Cin(),
  45199. .Qin(),
  45200. .Clk(),
  45201. .AsyncReset(),
  45202. .SyncReset(),
  45203. .ShiftData(),
  45204. .SyncLoad(),
  45205. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always8~0_combout ),
  45206. .Cout(),
  45207. .Q());
  45208. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .coord_x = 19;
  45209. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .coord_y = 4;
  45210. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .coord_z = 9;
  45211. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .mask = 16'h0800;
  45212. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .modeMux = 1'b0;
  45213. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .FeedbackMux = 1'b0;
  45214. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .ShiftMux = 1'b0;
  45215. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .BypassEn = 1'b0;
  45216. defparam \macro_inst|u_uart[1]|u_rx[2]|always8~0 .CarryEnb = 1'b1;
  45217. alta_slice \macro_inst|u_uart[1]|u_rx[2]|break_error (
  45218. .A(vcc),
  45219. .B(\macro_inst|u_uart[1]|u_rx[2]|always11~2_combout ),
  45220. .C(vcc),
  45221. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ),
  45222. .Cin(),
  45223. .Qin(\macro_inst|u_uart[1]|u_rx[2]|break_error~q ),
  45224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  45225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  45226. .SyncReset(),
  45227. .ShiftData(),
  45228. .SyncLoad(),
  45229. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|break_error~0_combout ),
  45230. .Cout(),
  45231. .Q(\macro_inst|u_uart[1]|u_rx[2]|break_error~q ));
  45232. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .coord_x = 17;
  45233. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .coord_y = 6;
  45234. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .coord_z = 15;
  45235. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .mask = 16'hFCCC;
  45236. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .modeMux = 1'b0;
  45237. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .FeedbackMux = 1'b1;
  45238. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .ShiftMux = 1'b0;
  45239. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .BypassEn = 1'b0;
  45240. defparam \macro_inst|u_uart[1]|u_rx[2]|break_error .CarryEnb = 1'b1;
  45241. alta_slice \macro_inst|u_uart[1]|u_rx[2]|framing_error (
  45242. .A(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  45243. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  45244. .C(vcc),
  45245. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ),
  45246. .Cin(),
  45247. .Qin(\macro_inst|u_uart[1]|u_rx[2]|framing_error~q ),
  45248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  45249. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  45250. .SyncReset(),
  45251. .ShiftData(),
  45252. .SyncLoad(),
  45253. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|framing_error~0_combout ),
  45254. .Cout(),
  45255. .Q(\macro_inst|u_uart[1]|u_rx[2]|framing_error~q ));
  45256. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .coord_x = 18;
  45257. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .coord_y = 6;
  45258. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .coord_z = 2;
  45259. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .mask = 16'hF444;
  45260. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .modeMux = 1'b0;
  45261. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .FeedbackMux = 1'b1;
  45262. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .ShiftMux = 1'b0;
  45263. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .BypassEn = 1'b0;
  45264. defparam \macro_inst|u_uart[1]|u_rx[2]|framing_error .CarryEnb = 1'b1;
  45265. alta_slice \macro_inst|u_uart[1]|u_rx[2]|overrun_error (
  45266. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  45267. .B(\macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ),
  45268. .C(vcc),
  45269. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  45270. .Cin(),
  45271. .Qin(\macro_inst|u_uart[1]|u_rx[2]|overrun_error~q ),
  45272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  45273. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  45274. .SyncReset(),
  45275. .ShiftData(),
  45276. .SyncLoad(),
  45277. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|overrun_error~0_combout ),
  45278. .Cout(),
  45279. .Q(\macro_inst|u_uart[1]|u_rx[2]|overrun_error~q ));
  45280. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .coord_x = 17;
  45281. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .coord_y = 6;
  45282. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .coord_z = 1;
  45283. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .mask = 16'hEAC0;
  45284. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .modeMux = 1'b0;
  45285. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .FeedbackMux = 1'b1;
  45286. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .ShiftMux = 1'b0;
  45287. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .BypassEn = 1'b0;
  45288. defparam \macro_inst|u_uart[1]|u_rx[2]|overrun_error .CarryEnb = 1'b1;
  45289. alta_slice \macro_inst|u_uart[1]|u_rx[2]|parity_error (
  45290. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  45291. .B(\macro_inst|u_uart[1]|u_rx[2]|always10~2_combout ),
  45292. .C(vcc),
  45293. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  45294. .Cin(),
  45295. .Qin(\macro_inst|u_uart[1]|u_rx[2]|parity_error~q ),
  45296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ),
  45297. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  45298. .SyncReset(),
  45299. .ShiftData(),
  45300. .SyncLoad(),
  45301. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|parity_error~0_combout ),
  45302. .Cout(),
  45303. .Q(\macro_inst|u_uart[1]|u_rx[2]|parity_error~q ));
  45304. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .coord_x = 17;
  45305. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .coord_y = 5;
  45306. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .coord_z = 13;
  45307. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .mask = 16'hDCFC;
  45308. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .modeMux = 1'b0;
  45309. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .FeedbackMux = 1'b1;
  45310. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .ShiftMux = 1'b0;
  45311. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .BypassEn = 1'b0;
  45312. defparam \macro_inst|u_uart[1]|u_rx[2]|parity_error .CarryEnb = 1'b1;
  45313. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] (
  45314. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0]),
  45315. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  45316. .C(\~GND~combout ),
  45317. .D(vcc),
  45318. .Cin(),
  45319. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0]),
  45320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  45321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  45322. .SyncReset(SyncReset_X57_Y4_GND),
  45323. .ShiftData(),
  45324. .SyncLoad(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ),
  45325. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0]~4_combout ),
  45326. .Cout(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0]~5 ),
  45327. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [0]));
  45328. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .coord_x = 19;
  45329. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .coord_y = 5;
  45330. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .coord_z = 0;
  45331. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .mask = 16'h6688;
  45332. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .modeMux = 1'b0;
  45333. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  45334. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  45335. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .BypassEn = 1'b1;
  45336. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  45337. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] (
  45338. .A(vcc),
  45339. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  45340. .C(vcc),
  45341. .D(vcc),
  45342. .Cin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[0]~5 ),
  45343. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  45344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  45345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  45346. .SyncReset(SyncReset_X57_Y4_GND),
  45347. .ShiftData(),
  45348. .SyncLoad(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ),
  45349. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1]~6_combout ),
  45350. .Cout(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1]~7 ),
  45351. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]));
  45352. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .coord_x = 19;
  45353. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .coord_y = 5;
  45354. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .coord_z = 1;
  45355. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .mask = 16'h3C3F;
  45356. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .modeMux = 1'b1;
  45357. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  45358. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  45359. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .BypassEn = 1'b1;
  45360. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  45361. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] (
  45362. .A(vcc),
  45363. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  45364. .C(\~GND~combout ),
  45365. .D(vcc),
  45366. .Cin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[1]~7 ),
  45367. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  45368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  45369. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  45370. .SyncReset(SyncReset_X57_Y4_GND),
  45371. .ShiftData(),
  45372. .SyncLoad(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ),
  45373. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2]~8_combout ),
  45374. .Cout(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2]~9 ),
  45375. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]));
  45376. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .coord_x = 19;
  45377. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .coord_y = 5;
  45378. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .coord_z = 2;
  45379. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .mask = 16'hC30C;
  45380. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .modeMux = 1'b1;
  45381. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  45382. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  45383. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .BypassEn = 1'b1;
  45384. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  45385. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] (
  45386. .A(vcc),
  45387. .B(vcc),
  45388. .C(\~GND~combout ),
  45389. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3]),
  45390. .Cin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[2]~9 ),
  45391. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3]),
  45392. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  45393. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  45394. .SyncReset(SyncReset_X57_Y4_GND),
  45395. .ShiftData(),
  45396. .SyncLoad(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ),
  45397. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3]~10_combout ),
  45398. .Cout(),
  45399. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [3]));
  45400. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .coord_x = 19;
  45401. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .coord_y = 5;
  45402. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .coord_z = 3;
  45403. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .mask = 16'h0FF0;
  45404. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .modeMux = 1'b1;
  45405. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  45406. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  45407. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .BypassEn = 1'b1;
  45408. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  45409. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_bit (
  45410. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  45411. .B(vcc),
  45412. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  45413. .D(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  45414. .Cin(),
  45415. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  45416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  45417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  45418. .SyncReset(),
  45419. .ShiftData(),
  45420. .SyncLoad(),
  45421. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always2~1_combout ),
  45422. .Cout(),
  45423. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ));
  45424. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .coord_x = 19;
  45425. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .coord_y = 4;
  45426. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .coord_z = 12;
  45427. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .mask = 16'hA000;
  45428. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .modeMux = 1'b0;
  45429. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .FeedbackMux = 1'b0;
  45430. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .ShiftMux = 1'b0;
  45431. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .BypassEn = 1'b0;
  45432. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_bit .CarryEnb = 1'b1;
  45433. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] (
  45434. .A(\macro_inst|u_uart[1]|u_rx[2]|always3~2_combout ),
  45435. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45436. .C(vcc),
  45437. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  45438. .Cin(),
  45439. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]),
  45440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout_X57_Y4_SIG_SIG ),
  45441. .AsyncReset(AsyncReset_X57_Y4_GND),
  45442. .SyncReset(),
  45443. .ShiftData(),
  45444. .SyncLoad(),
  45445. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~4_combout ),
  45446. .Cout(),
  45447. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [0]));
  45448. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .coord_x = 19;
  45449. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .coord_y = 5;
  45450. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .coord_z = 6;
  45451. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .mask = 16'hCDCF;
  45452. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .modeMux = 1'b0;
  45453. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  45454. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .ShiftMux = 1'b0;
  45455. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .BypassEn = 1'b0;
  45456. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[0] .CarryEnb = 1'b1;
  45457. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] (
  45458. .A(\macro_inst|u_uart[1]|u_rx[2]|always3~2_combout ),
  45459. .B(\macro_inst|u_uart[1]|u_rx[2]|Add4~2_combout ),
  45460. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45461. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  45462. .Cin(),
  45463. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]),
  45464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout_X57_Y4_SIG_SIG ),
  45465. .AsyncReset(AsyncReset_X57_Y4_GND),
  45466. .SyncReset(),
  45467. .ShiftData(),
  45468. .SyncLoad(),
  45469. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~5_combout ),
  45470. .Cout(),
  45471. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [1]));
  45472. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .coord_x = 19;
  45473. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .coord_y = 5;
  45474. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .coord_z = 15;
  45475. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .mask = 16'hFBF1;
  45476. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .modeMux = 1'b0;
  45477. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  45478. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .ShiftMux = 1'b0;
  45479. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .BypassEn = 1'b0;
  45480. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[1] .CarryEnb = 1'b1;
  45481. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] (
  45482. .A(\macro_inst|u_uart[1]|u_rx[2]|Add4~1_combout ),
  45483. .B(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  45484. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45485. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  45486. .Cin(),
  45487. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2]),
  45488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout_X57_Y4_SIG_SIG ),
  45489. .AsyncReset(AsyncReset_X57_Y4_GND),
  45490. .SyncReset(),
  45491. .ShiftData(),
  45492. .SyncLoad(),
  45493. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~2_combout ),
  45494. .Cout(),
  45495. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [2]));
  45496. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .coord_x = 19;
  45497. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .coord_y = 5;
  45498. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .coord_z = 7;
  45499. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .mask = 16'hF1F5;
  45500. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .modeMux = 1'b0;
  45501. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  45502. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .ShiftMux = 1'b0;
  45503. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .BypassEn = 1'b0;
  45504. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2] .CarryEnb = 1'b1;
  45505. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 (
  45506. .A(vcc),
  45507. .B(vcc),
  45508. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45509. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  45510. .Cin(),
  45511. .Qin(),
  45512. .Clk(),
  45513. .AsyncReset(),
  45514. .SyncReset(),
  45515. .ShiftData(),
  45516. .SyncLoad(),
  45517. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3_combout ),
  45518. .Cout(),
  45519. .Q());
  45520. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .coord_x = 19;
  45521. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .coord_y = 5;
  45522. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .coord_z = 8;
  45523. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .mask = 16'hFFF0;
  45524. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .modeMux = 1'b0;
  45525. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .FeedbackMux = 1'b0;
  45526. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .ShiftMux = 1'b0;
  45527. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .BypassEn = 1'b0;
  45528. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[2]~3 .CarryEnb = 1'b1;
  45529. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] (
  45530. .A(\macro_inst|u_uart[1]|u_rx[2]|Add4~0_combout ),
  45531. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45532. .C(vcc),
  45533. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  45534. .Cin(),
  45535. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [3]),
  45536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  45537. .AsyncReset(AsyncReset_X57_Y4_GND),
  45538. .SyncReset(),
  45539. .ShiftData(),
  45540. .SyncLoad(),
  45541. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt~1_combout ),
  45542. .Cout(),
  45543. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt [3]));
  45544. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .coord_x = 19;
  45545. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .coord_y = 5;
  45546. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .coord_z = 13;
  45547. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .mask = 16'h1130;
  45548. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .modeMux = 1'b0;
  45549. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  45550. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .ShiftMux = 1'b0;
  45551. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .BypassEn = 1'b0;
  45552. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_data_cnt[3] .CarryEnb = 1'b1;
  45553. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] (
  45554. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector2~1_combout ),
  45555. .B(\macro_inst|u_uart[1]|u_regs|rx_read [2]),
  45556. .C(vcc),
  45557. .D(vcc),
  45558. .Cin(),
  45559. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  45560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  45561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  45562. .SyncReset(),
  45563. .ShiftData(),
  45564. .SyncLoad(),
  45565. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter~0_combout ),
  45566. .Cout(),
  45567. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]));
  45568. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .coord_x = 18;
  45569. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .coord_y = 4;
  45570. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .coord_z = 3;
  45571. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .mask = 16'h3A3A;
  45572. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .modeMux = 1'b0;
  45573. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  45574. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  45575. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .BypassEn = 1'b0;
  45576. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  45577. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] (
  45578. .A(),
  45579. .B(),
  45580. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [0]),
  45581. .D(),
  45582. .Cin(),
  45583. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0]~q ),
  45584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45585. .AsyncReset(AsyncReset_X57_Y11_GND),
  45586. .SyncReset(SyncReset_X57_Y11_GND),
  45587. .ShiftData(),
  45588. .SyncLoad(SyncLoad_X57_Y11_VCC),
  45589. .LutOut(),
  45590. .Cout(),
  45591. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0]~q ));
  45592. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .coord_x = 20;
  45593. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .coord_y = 5;
  45594. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .coord_z = 13;
  45595. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .mask = 16'hFFFF;
  45596. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .modeMux = 1'b1;
  45597. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  45598. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  45599. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  45600. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  45601. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] (
  45602. .A(vcc),
  45603. .B(vcc),
  45604. .C(vcc),
  45605. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1]),
  45606. .Cin(),
  45607. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~q ),
  45608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45609. .AsyncReset(AsyncReset_X57_Y11_GND),
  45610. .SyncReset(),
  45611. .ShiftData(),
  45612. .SyncLoad(),
  45613. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~feeder_combout ),
  45614. .Cout(),
  45615. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~q ));
  45616. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .coord_x = 20;
  45617. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .coord_y = 5;
  45618. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .coord_z = 10;
  45619. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .mask = 16'hFF00;
  45620. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  45621. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  45622. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  45623. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .BypassEn = 1'b0;
  45624. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  45625. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] (
  45626. .A(vcc),
  45627. .B(vcc),
  45628. .C(vcc),
  45629. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2]),
  45630. .Cin(),
  45631. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~q ),
  45632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45633. .AsyncReset(AsyncReset_X57_Y11_GND),
  45634. .SyncReset(),
  45635. .ShiftData(),
  45636. .SyncLoad(),
  45637. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~feeder_combout ),
  45638. .Cout(),
  45639. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~q ));
  45640. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .coord_x = 20;
  45641. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .coord_y = 5;
  45642. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .coord_z = 0;
  45643. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .mask = 16'hFF00;
  45644. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  45645. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  45646. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  45647. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .BypassEn = 1'b0;
  45648. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  45649. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] (
  45650. .A(),
  45651. .B(),
  45652. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [3]),
  45653. .D(),
  45654. .Cin(),
  45655. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3]~q ),
  45656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45657. .AsyncReset(AsyncReset_X57_Y11_GND),
  45658. .SyncReset(SyncReset_X57_Y11_GND),
  45659. .ShiftData(),
  45660. .SyncLoad(SyncLoad_X57_Y11_VCC),
  45661. .LutOut(),
  45662. .Cout(),
  45663. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3]~q ));
  45664. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .coord_x = 20;
  45665. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .coord_y = 5;
  45666. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .coord_z = 7;
  45667. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .mask = 16'hFFFF;
  45668. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .modeMux = 1'b1;
  45669. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  45670. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  45671. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  45672. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  45673. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] (
  45674. .A(vcc),
  45675. .B(vcc),
  45676. .C(vcc),
  45677. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4]),
  45678. .Cin(),
  45679. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~q ),
  45680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45681. .AsyncReset(AsyncReset_X57_Y11_GND),
  45682. .SyncReset(),
  45683. .ShiftData(),
  45684. .SyncLoad(),
  45685. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~feeder_combout ),
  45686. .Cout(),
  45687. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~q ));
  45688. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .coord_x = 20;
  45689. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .coord_y = 5;
  45690. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .coord_z = 6;
  45691. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .mask = 16'hFF00;
  45692. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  45693. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  45694. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  45695. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .BypassEn = 1'b0;
  45696. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  45697. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] (
  45698. .A(vcc),
  45699. .B(vcc),
  45700. .C(vcc),
  45701. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5]),
  45702. .Cin(),
  45703. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~q ),
  45704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45705. .AsyncReset(AsyncReset_X57_Y11_GND),
  45706. .SyncReset(),
  45707. .ShiftData(),
  45708. .SyncLoad(),
  45709. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~feeder_combout ),
  45710. .Cout(),
  45711. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~q ));
  45712. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .coord_x = 20;
  45713. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .coord_y = 5;
  45714. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .coord_z = 12;
  45715. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .mask = 16'hFF00;
  45716. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  45717. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  45718. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  45719. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .BypassEn = 1'b0;
  45720. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  45721. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] (
  45722. .A(),
  45723. .B(),
  45724. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [6]),
  45725. .D(),
  45726. .Cin(),
  45727. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6]~q ),
  45728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45729. .AsyncReset(AsyncReset_X57_Y11_GND),
  45730. .SyncReset(SyncReset_X57_Y11_GND),
  45731. .ShiftData(),
  45732. .SyncLoad(SyncLoad_X57_Y11_VCC),
  45733. .LutOut(),
  45734. .Cout(),
  45735. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6]~q ));
  45736. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .coord_x = 20;
  45737. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .coord_y = 5;
  45738. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .coord_z = 8;
  45739. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .mask = 16'hFFFF;
  45740. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .modeMux = 1'b1;
  45741. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  45742. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  45743. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  45744. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  45745. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] (
  45746. .A(vcc),
  45747. .B(vcc),
  45748. .C(vcc),
  45749. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]),
  45750. .Cin(),
  45751. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~q ),
  45752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout_X57_Y11_SIG_SIG ),
  45753. .AsyncReset(AsyncReset_X57_Y11_GND),
  45754. .SyncReset(),
  45755. .ShiftData(),
  45756. .SyncLoad(),
  45757. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~feeder_combout ),
  45758. .Cout(),
  45759. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~q ));
  45760. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .coord_x = 20;
  45761. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .coord_y = 5;
  45762. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .coord_z = 5;
  45763. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .mask = 16'hFF00;
  45764. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  45765. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  45766. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  45767. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .BypassEn = 1'b0;
  45768. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  45769. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 (
  45770. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_sample~0_combout ),
  45771. .B(\macro_inst|u_uart[1]|u_rx[2]|always2~0_combout ),
  45772. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ),
  45773. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  45774. .Cin(),
  45775. .Qin(),
  45776. .Clk(),
  45777. .AsyncReset(),
  45778. .SyncReset(),
  45779. .ShiftData(),
  45780. .SyncLoad(),
  45781. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0_combout ),
  45782. .Cout(),
  45783. .Q());
  45784. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .coord_x = 19;
  45785. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .coord_y = 4;
  45786. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .coord_z = 14;
  45787. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .mask = 16'h0080;
  45788. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  45789. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  45790. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  45791. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  45792. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  45793. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_idle (
  45794. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  45795. .B(\macro_inst|u_uart[1]|u_rx[2]|always8~0_combout ),
  45796. .C(vcc),
  45797. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  45798. .Cin(),
  45799. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_idle~q ),
  45800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  45801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  45802. .SyncReset(),
  45803. .ShiftData(),
  45804. .SyncLoad(),
  45805. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_idle~0_combout ),
  45806. .Cout(),
  45807. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_idle~q ));
  45808. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .coord_x = 18;
  45809. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .coord_y = 4;
  45810. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .coord_z = 0;
  45811. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .mask = 16'hDCFC;
  45812. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .modeMux = 1'b0;
  45813. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .FeedbackMux = 1'b1;
  45814. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .ShiftMux = 1'b0;
  45815. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .BypassEn = 1'b0;
  45816. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle .CarryEnb = 1'b1;
  45817. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en (
  45818. .A(\macro_inst|u_uart[1]|u_regs|clear_flags~10_combout ),
  45819. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|counter [0]),
  45820. .C(vcc),
  45821. .D(\macro_inst|u_uart[0]|u_regs|rx_not_empty_ie[2]~14_combout ),
  45822. .Cin(),
  45823. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~q ),
  45824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  45825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  45826. .SyncReset(),
  45827. .ShiftData(),
  45828. .SyncLoad(),
  45829. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~0_combout ),
  45830. .Cout(),
  45831. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_idle_en~q ));
  45832. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .coord_x = 19;
  45833. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .coord_y = 4;
  45834. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .coord_z = 15;
  45835. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .mask = 16'hDCFC;
  45836. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .modeMux = 1'b0;
  45837. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .FeedbackMux = 1'b1;
  45838. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .ShiftMux = 1'b0;
  45839. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .BypassEn = 1'b0;
  45840. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_idle_en .CarryEnb = 1'b1;
  45841. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] (
  45842. .A(vcc),
  45843. .B(vcc),
  45844. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  45845. .D(\SIM_IO[8]~input_o ),
  45846. .Cin(),
  45847. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_in [0]),
  45848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y3_SIG_SIG ),
  45849. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y3_SIG ),
  45850. .SyncReset(),
  45851. .ShiftData(),
  45852. .SyncLoad(),
  45853. .LutOut(\macro_inst|uart_rxd [8]),
  45854. .Cout(),
  45855. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_in [0]));
  45856. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .coord_x = 16;
  45857. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .coord_y = 2;
  45858. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .coord_z = 2;
  45859. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .mask = 16'h000F;
  45860. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .modeMux = 1'b0;
  45861. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .FeedbackMux = 1'b0;
  45862. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .ShiftMux = 1'b0;
  45863. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .BypassEn = 1'b0;
  45864. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[0] .CarryEnb = 1'b1;
  45865. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] (
  45866. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  45867. .B(vcc),
  45868. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_in [0]),
  45869. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  45870. .Cin(),
  45871. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_in [1]),
  45872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X58_Y9_SIG_SIG ),
  45873. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  45874. .SyncReset(SyncReset_X58_Y9_GND),
  45875. .ShiftData(),
  45876. .SyncLoad(SyncLoad_X58_Y9_VCC),
  45877. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout ),
  45878. .Cout(),
  45879. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_in [1]));
  45880. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .coord_x = 18;
  45881. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .coord_y = 8;
  45882. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .coord_z = 4;
  45883. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .mask = 16'h0055;
  45884. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .modeMux = 1'b0;
  45885. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .FeedbackMux = 1'b0;
  45886. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .ShiftMux = 1'b0;
  45887. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .BypassEn = 1'b1;
  45888. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[1] .CarryEnb = 1'b1;
  45889. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] (
  45890. .A(vcc),
  45891. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  45892. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_in [1]),
  45893. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  45894. .Cin(),
  45895. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]),
  45896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  45897. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  45898. .SyncReset(SyncReset_X60_Y9_GND),
  45899. .ShiftData(),
  45900. .SyncLoad(SyncLoad_X60_Y9_VCC),
  45901. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout ),
  45902. .Cout(),
  45903. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]));
  45904. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .coord_x = 18;
  45905. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .coord_y = 10;
  45906. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .coord_z = 11;
  45907. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .mask = 16'hFFCC;
  45908. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .modeMux = 1'b0;
  45909. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .FeedbackMux = 1'b0;
  45910. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .ShiftMux = 1'b0;
  45911. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .BypassEn = 1'b1;
  45912. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[2] .CarryEnb = 1'b1;
  45913. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] (
  45914. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_in [2]),
  45915. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_in [4]),
  45916. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]),
  45917. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_in [3]),
  45918. .Cin(),
  45919. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]),
  45920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  45921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  45922. .SyncReset(SyncReset_X60_Y9_GND),
  45923. .ShiftData(),
  45924. .SyncLoad(SyncLoad_X60_Y9_VCC),
  45925. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  45926. .Cout(),
  45927. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]));
  45928. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .coord_x = 18;
  45929. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .coord_y = 10;
  45930. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .coord_z = 1;
  45931. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .mask = 16'h44DD;
  45932. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .modeMux = 1'b0;
  45933. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .FeedbackMux = 1'b0;
  45934. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .ShiftMux = 1'b0;
  45935. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .BypassEn = 1'b1;
  45936. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[3] .CarryEnb = 1'b1;
  45937. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] (
  45938. .A(vcc),
  45939. .B(vcc),
  45940. .C(vcc),
  45941. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]),
  45942. .Cin(),
  45943. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_in [4]),
  45944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  45945. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  45946. .SyncReset(),
  45947. .ShiftData(),
  45948. .SyncLoad(),
  45949. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_in[4]~0_combout ),
  45950. .Cout(),
  45951. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_in [4]));
  45952. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .coord_x = 18;
  45953. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .coord_y = 10;
  45954. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .coord_z = 10;
  45955. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .mask = 16'h00FF;
  45956. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .modeMux = 1'b0;
  45957. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .FeedbackMux = 1'b0;
  45958. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .ShiftMux = 1'b0;
  45959. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .BypassEn = 1'b0;
  45960. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_in[4] .CarryEnb = 1'b1;
  45961. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_parity (
  45962. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~0_combout ),
  45963. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  45964. .C(vcc),
  45965. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  45966. .Cin(),
  45967. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~q ),
  45968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  45969. .AsyncReset(AsyncReset_X56_Y8_GND),
  45970. .SyncReset(),
  45971. .ShiftData(),
  45972. .SyncLoad(),
  45973. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~1_combout ),
  45974. .Cout(),
  45975. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~q ));
  45976. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .coord_x = 19;
  45977. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .coord_y = 7;
  45978. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .coord_z = 3;
  45979. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .mask = 16'h12DE;
  45980. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .modeMux = 1'b0;
  45981. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .FeedbackMux = 1'b1;
  45982. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .ShiftMux = 1'b0;
  45983. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .BypassEn = 1'b0;
  45984. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity .CarryEnb = 1'b1;
  45985. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 (
  45986. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  45987. .B(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  45988. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]),
  45989. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  45990. .Cin(),
  45991. .Qin(),
  45992. .Clk(),
  45993. .AsyncReset(),
  45994. .SyncReset(),
  45995. .ShiftData(),
  45996. .SyncLoad(),
  45997. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_parity~0_combout ),
  45998. .Cout(),
  45999. .Q());
  46000. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .coord_x = 18;
  46001. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .coord_y = 5;
  46002. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .coord_z = 15;
  46003. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .mask = 16'h2000;
  46004. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .modeMux = 1'b0;
  46005. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .FeedbackMux = 1'b0;
  46006. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .ShiftMux = 1'b0;
  46007. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .BypassEn = 1'b0;
  46008. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_parity~0 .CarryEnb = 1'b1;
  46009. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 (
  46010. .A(vcc),
  46011. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [1]),
  46012. .C(vcc),
  46013. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_baud_cnt [2]),
  46014. .Cin(),
  46015. .Qin(),
  46016. .Clk(),
  46017. .AsyncReset(),
  46018. .SyncReset(),
  46019. .ShiftData(),
  46020. .SyncLoad(),
  46021. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_sample~0_combout ),
  46022. .Cout(),
  46023. .Q());
  46024. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .coord_x = 18;
  46025. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .coord_y = 5;
  46026. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .coord_z = 1;
  46027. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .mask = 16'h0033;
  46028. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .modeMux = 1'b0;
  46029. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .FeedbackMux = 1'b0;
  46030. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .ShiftMux = 1'b0;
  46031. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .BypassEn = 1'b0;
  46032. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_sample~0 .CarryEnb = 1'b1;
  46033. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] (
  46034. .A(vcc),
  46035. .B(vcc),
  46036. .C(vcc),
  46037. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1]),
  46038. .Cin(),
  46039. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [0]),
  46040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46042. .SyncReset(),
  46043. .ShiftData(),
  46044. .SyncLoad(),
  46045. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0]~feeder_combout ),
  46046. .Cout(),
  46047. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [0]));
  46048. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .coord_x = 20;
  46049. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .coord_y = 5;
  46050. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .coord_z = 4;
  46051. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .mask = 16'hFF00;
  46052. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .modeMux = 1'b0;
  46053. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  46054. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .ShiftMux = 1'b0;
  46055. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .BypassEn = 1'b0;
  46056. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[0] .CarryEnb = 1'b1;
  46057. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] (
  46058. .A(vcc),
  46059. .B(vcc),
  46060. .C(vcc),
  46061. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2]),
  46062. .Cin(),
  46063. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1]),
  46064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46066. .SyncReset(),
  46067. .ShiftData(),
  46068. .SyncLoad(),
  46069. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1]~feeder_combout ),
  46070. .Cout(),
  46071. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1]));
  46072. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .coord_x = 20;
  46073. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .coord_y = 5;
  46074. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .coord_z = 9;
  46075. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .mask = 16'hFF00;
  46076. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .modeMux = 1'b0;
  46077. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  46078. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .ShiftMux = 1'b0;
  46079. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .BypassEn = 1'b0;
  46080. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[1] .CarryEnb = 1'b1;
  46081. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] (
  46082. .A(),
  46083. .B(),
  46084. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [3]),
  46085. .D(),
  46086. .Cin(),
  46087. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2]),
  46088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46090. .SyncReset(SyncReset_X57_Y11_GND),
  46091. .ShiftData(),
  46092. .SyncLoad(SyncLoad_X57_Y11_VCC),
  46093. .LutOut(),
  46094. .Cout(),
  46095. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2]));
  46096. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .coord_x = 20;
  46097. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .coord_y = 5;
  46098. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .coord_z = 1;
  46099. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .mask = 16'hFFFF;
  46100. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .modeMux = 1'b1;
  46101. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  46102. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .ShiftMux = 1'b0;
  46103. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .BypassEn = 1'b1;
  46104. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[2] .CarryEnb = 1'b1;
  46105. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] (
  46106. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [0]),
  46107. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [1]),
  46108. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4]),
  46109. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [2]),
  46110. .Cin(),
  46111. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [3]),
  46112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46114. .SyncReset(SyncReset_X57_Y11_GND),
  46115. .ShiftData(),
  46116. .SyncLoad(SyncLoad_X57_Y11_VCC),
  46117. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always11~1_combout ),
  46118. .Cout(),
  46119. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [3]));
  46120. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .coord_x = 20;
  46121. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .coord_y = 5;
  46122. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .coord_z = 14;
  46123. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .mask = 16'h0001;
  46124. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .modeMux = 1'b0;
  46125. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .FeedbackMux = 1'b1;
  46126. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .ShiftMux = 1'b0;
  46127. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .BypassEn = 1'b1;
  46128. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[3] .CarryEnb = 1'b1;
  46129. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] (
  46130. .A(vcc),
  46131. .B(vcc),
  46132. .C(vcc),
  46133. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5]),
  46134. .Cin(),
  46135. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4]),
  46136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46138. .SyncReset(),
  46139. .ShiftData(),
  46140. .SyncLoad(),
  46141. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4]~feeder_combout ),
  46142. .Cout(),
  46143. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4]));
  46144. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .coord_x = 20;
  46145. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .coord_y = 5;
  46146. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .coord_z = 15;
  46147. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .mask = 16'hFF00;
  46148. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .modeMux = 1'b0;
  46149. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  46150. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .ShiftMux = 1'b0;
  46151. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .BypassEn = 1'b0;
  46152. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[4] .CarryEnb = 1'b1;
  46153. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] (
  46154. .A(),
  46155. .B(),
  46156. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [6]),
  46157. .D(),
  46158. .Cin(),
  46159. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5]),
  46160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46162. .SyncReset(SyncReset_X57_Y11_GND),
  46163. .ShiftData(),
  46164. .SyncLoad(SyncLoad_X57_Y11_VCC),
  46165. .LutOut(),
  46166. .Cout(),
  46167. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5]));
  46168. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .coord_x = 20;
  46169. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .coord_y = 5;
  46170. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .coord_z = 11;
  46171. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .mask = 16'hFFFF;
  46172. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .modeMux = 1'b1;
  46173. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  46174. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .ShiftMux = 1'b0;
  46175. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .BypassEn = 1'b1;
  46176. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[5] .CarryEnb = 1'b1;
  46177. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] (
  46178. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]),
  46179. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [4]),
  46180. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]),
  46181. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [5]),
  46182. .Cin(),
  46183. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [6]),
  46184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46186. .SyncReset(SyncReset_X57_Y11_GND),
  46187. .ShiftData(),
  46188. .SyncLoad(SyncLoad_X57_Y11_VCC),
  46189. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|always11~0_combout ),
  46190. .Cout(),
  46191. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [6]));
  46192. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .coord_x = 20;
  46193. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .coord_y = 5;
  46194. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .coord_z = 2;
  46195. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .mask = 16'h0001;
  46196. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .modeMux = 1'b0;
  46197. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .FeedbackMux = 1'b1;
  46198. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .ShiftMux = 1'b0;
  46199. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .BypassEn = 1'b1;
  46200. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[6] .CarryEnb = 1'b1;
  46201. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] (
  46202. .A(vcc),
  46203. .B(vcc),
  46204. .C(vcc),
  46205. .D(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  46206. .Cin(),
  46207. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]),
  46208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[2]|always4~2_combout_X57_Y11_SIG_SIG ),
  46209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y11_SIG ),
  46210. .SyncReset(),
  46211. .ShiftData(),
  46212. .SyncLoad(),
  46213. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7]~feeder_combout ),
  46214. .Cout(),
  46215. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg [7]));
  46216. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .coord_x = 20;
  46217. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .coord_y = 5;
  46218. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .coord_z = 3;
  46219. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .mask = 16'hFF00;
  46220. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .modeMux = 1'b0;
  46221. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  46222. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .ShiftMux = 1'b0;
  46223. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .BypassEn = 1'b0;
  46224. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_shift_reg[7] .CarryEnb = 1'b1;
  46225. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA (
  46226. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector2~3_combout ),
  46227. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  46228. .C(\macro_inst|u_uart[1]|u_rx[2]|Selector2~2_combout ),
  46229. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector2~5_combout ),
  46230. .Cin(),
  46231. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  46232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  46233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  46234. .SyncReset(),
  46235. .ShiftData(),
  46236. .SyncLoad(),
  46237. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector2~6_combout ),
  46238. .Cout(),
  46239. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ));
  46240. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .coord_x = 19;
  46241. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .coord_y = 5;
  46242. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .coord_z = 11;
  46243. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .mask = 16'h0F08;
  46244. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .modeMux = 1'b0;
  46245. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  46246. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .ShiftMux = 1'b0;
  46247. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .BypassEn = 1'b0;
  46248. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA .CarryEnb = 1'b1;
  46249. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE (
  46250. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector2~2_combout ),
  46251. .B(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  46252. .C(vcc),
  46253. .D(vcc),
  46254. .Cin(),
  46255. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ),
  46256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  46257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ),
  46258. .SyncReset(),
  46259. .ShiftData(),
  46260. .SyncLoad(),
  46261. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector0~0_combout ),
  46262. .Cout(),
  46263. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE~q ));
  46264. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .coord_x = 17;
  46265. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .coord_y = 3;
  46266. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .coord_z = 4;
  46267. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .mask = 16'h5151;
  46268. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .modeMux = 1'b0;
  46269. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  46270. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  46271. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .BypassEn = 1'b0;
  46272. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  46273. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY (
  46274. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector3~1_combout ),
  46275. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0_combout ),
  46276. .C(vcc),
  46277. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector4~4_combout ),
  46278. .Cin(),
  46279. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  46280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  46281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  46282. .SyncReset(),
  46283. .ShiftData(),
  46284. .SyncLoad(),
  46285. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~1_combout ),
  46286. .Cout(),
  46287. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ));
  46288. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .coord_x = 17;
  46289. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .coord_y = 6;
  46290. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .coord_z = 6;
  46291. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .mask = 16'h88F8;
  46292. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .modeMux = 1'b0;
  46293. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  46294. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  46295. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .BypassEn = 1'b0;
  46296. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  46297. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 (
  46298. .A(vcc),
  46299. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  46300. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~q ),
  46301. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  46302. .Cin(),
  46303. .Qin(),
  46304. .Clk(),
  46305. .AsyncReset(),
  46306. .SyncReset(),
  46307. .ShiftData(),
  46308. .SyncLoad(),
  46309. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0_combout ),
  46310. .Cout(),
  46311. .Q());
  46312. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .coord_x = 17;
  46313. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .coord_y = 6;
  46314. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .coord_z = 13;
  46315. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .mask = 16'h0CCC;
  46316. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  46317. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  46318. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  46319. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  46320. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  46321. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START (
  46322. .A(\macro_inst|u_uart[1]|u_rx[2]|Selector2~4_combout ),
  46323. .B(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout ),
  46324. .C(vcc),
  46325. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector2~2_combout ),
  46326. .Cin(),
  46327. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ),
  46328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y4_SIG_VCC ),
  46329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y4_SIG ),
  46330. .SyncReset(),
  46331. .ShiftData(),
  46332. .SyncLoad(),
  46333. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Selector1~0_combout ),
  46334. .Cout(),
  46335. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START~q ));
  46336. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .coord_x = 19;
  46337. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .coord_y = 5;
  46338. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .coord_z = 4;
  46339. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .mask = 16'h00DC;
  46340. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .modeMux = 1'b0;
  46341. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .FeedbackMux = 1'b1;
  46342. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .ShiftMux = 1'b0;
  46343. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .BypassEn = 1'b0;
  46344. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_START .CarryEnb = 1'b1;
  46345. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP (
  46346. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0_combout ),
  46347. .B(\macro_inst|u_uart[1]|u_rx[2]|Selector3~0_combout ),
  46348. .C(vcc),
  46349. .D(\macro_inst|u_uart[1]|u_rx[2]|Selector4~4_combout ),
  46350. .Cin(),
  46351. .Qin(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ),
  46352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  46353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  46354. .SyncReset(),
  46355. .ShiftData(),
  46356. .SyncLoad(),
  46357. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~1_combout ),
  46358. .Cout(),
  46359. .Q(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~q ));
  46360. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .coord_x = 17;
  46361. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .coord_y = 6;
  46362. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .coord_z = 5;
  46363. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .mask = 16'hEEF0;
  46364. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .modeMux = 1'b0;
  46365. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  46366. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .ShiftMux = 1'b0;
  46367. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .BypassEn = 1'b0;
  46368. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP .CarryEnb = 1'b1;
  46369. alta_slice \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 (
  46370. .A(\macro_inst|u_uart[1]|u_rx[2]|always3~1_combout ),
  46371. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_bit~q ),
  46372. .C(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_DATA~q ),
  46373. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  46374. .Cin(),
  46375. .Qin(),
  46376. .Clk(),
  46377. .AsyncReset(),
  46378. .SyncReset(),
  46379. .ShiftData(),
  46380. .SyncLoad(),
  46381. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0_combout ),
  46382. .Cout(),
  46383. .Q());
  46384. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .coord_x = 17;
  46385. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .coord_y = 6;
  46386. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .coord_z = 10;
  46387. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .mask = 16'h0080;
  46388. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  46389. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  46390. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  46391. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  46392. defparam \macro_inst|u_uart[1]|u_rx[2]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  46393. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Add4~0 (
  46394. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [3]),
  46395. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2]),
  46396. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]),
  46397. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]),
  46398. .Cin(),
  46399. .Qin(),
  46400. .Clk(),
  46401. .AsyncReset(),
  46402. .SyncReset(),
  46403. .ShiftData(),
  46404. .SyncLoad(),
  46405. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Add4~0_combout ),
  46406. .Cout(),
  46407. .Q());
  46408. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .coord_x = 20;
  46409. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .coord_y = 12;
  46410. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .coord_z = 5;
  46411. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .mask = 16'h5556;
  46412. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .modeMux = 1'b0;
  46413. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .FeedbackMux = 1'b0;
  46414. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .ShiftMux = 1'b0;
  46415. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .BypassEn = 1'b0;
  46416. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~0 .CarryEnb = 1'b1;
  46417. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Add4~1 (
  46418. .A(vcc),
  46419. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2]),
  46420. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]),
  46421. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]),
  46422. .Cin(),
  46423. .Qin(),
  46424. .Clk(),
  46425. .AsyncReset(),
  46426. .SyncReset(),
  46427. .ShiftData(),
  46428. .SyncLoad(),
  46429. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Add4~1_combout ),
  46430. .Cout(),
  46431. .Q());
  46432. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .coord_x = 20;
  46433. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .coord_y = 12;
  46434. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .coord_z = 8;
  46435. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .mask = 16'h333C;
  46436. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .modeMux = 1'b0;
  46437. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .FeedbackMux = 1'b0;
  46438. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .ShiftMux = 1'b0;
  46439. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .BypassEn = 1'b0;
  46440. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~1 .CarryEnb = 1'b1;
  46441. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Add4~2 (
  46442. .A(vcc),
  46443. .B(vcc),
  46444. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]),
  46445. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]),
  46446. .Cin(),
  46447. .Qin(),
  46448. .Clk(),
  46449. .AsyncReset(),
  46450. .SyncReset(),
  46451. .ShiftData(),
  46452. .SyncLoad(),
  46453. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Add4~2_combout ),
  46454. .Cout(),
  46455. .Q());
  46456. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .coord_x = 20;
  46457. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .coord_y = 12;
  46458. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .coord_z = 1;
  46459. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .mask = 16'h0FF0;
  46460. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .modeMux = 1'b0;
  46461. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .FeedbackMux = 1'b0;
  46462. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .ShiftMux = 1'b0;
  46463. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .BypassEn = 1'b0;
  46464. defparam \macro_inst|u_uart[1]|u_rx[3]|Add4~2 .CarryEnb = 1'b1;
  46465. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 (
  46466. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ),
  46467. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  46468. .C(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  46469. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  46470. .Cin(),
  46471. .Qin(),
  46472. .Clk(),
  46473. .AsyncReset(),
  46474. .SyncReset(),
  46475. .ShiftData(),
  46476. .SyncLoad(),
  46477. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  46478. .Cout(),
  46479. .Q());
  46480. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .coord_x = 19;
  46481. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .coord_y = 9;
  46482. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .coord_z = 2;
  46483. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .mask = 16'h0020;
  46484. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .modeMux = 1'b0;
  46485. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .FeedbackMux = 1'b0;
  46486. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .ShiftMux = 1'b0;
  46487. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .BypassEn = 1'b0;
  46488. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~1 .CarryEnb = 1'b1;
  46489. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 (
  46490. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_sample~0_combout ),
  46491. .B(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  46492. .C(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46493. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ),
  46494. .Cin(),
  46495. .Qin(),
  46496. .Clk(),
  46497. .AsyncReset(),
  46498. .SyncReset(),
  46499. .ShiftData(),
  46500. .SyncLoad(),
  46501. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~2_combout ),
  46502. .Cout(),
  46503. .Q());
  46504. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .coord_x = 20;
  46505. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .coord_y = 9;
  46506. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .coord_z = 4;
  46507. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .mask = 16'h8000;
  46508. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .modeMux = 1'b0;
  46509. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .FeedbackMux = 1'b0;
  46510. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .ShiftMux = 1'b0;
  46511. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .BypassEn = 1'b0;
  46512. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~2 .CarryEnb = 1'b1;
  46513. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 (
  46514. .A(vcc),
  46515. .B(vcc),
  46516. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  46517. .D(\macro_inst|u_uart[1]|u_rx[3]|Selector4~0_combout ),
  46518. .Cin(),
  46519. .Qin(),
  46520. .Clk(),
  46521. .AsyncReset(),
  46522. .SyncReset(),
  46523. .ShiftData(),
  46524. .SyncLoad(),
  46525. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~3_combout ),
  46526. .Cout(),
  46527. .Q());
  46528. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .coord_x = 20;
  46529. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .coord_y = 9;
  46530. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .coord_z = 2;
  46531. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .mask = 16'hF000;
  46532. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .modeMux = 1'b0;
  46533. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .FeedbackMux = 1'b0;
  46534. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .ShiftMux = 1'b0;
  46535. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .BypassEn = 1'b0;
  46536. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~3 .CarryEnb = 1'b1;
  46537. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 (
  46538. .A(\macro_inst|u_uart[1]|u_rx[3]|always3~2_combout ),
  46539. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  46540. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector2~3_combout ),
  46541. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  46542. .Cin(),
  46543. .Qin(),
  46544. .Clk(),
  46545. .AsyncReset(),
  46546. .SyncReset(),
  46547. .ShiftData(),
  46548. .SyncLoad(),
  46549. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~4_combout ),
  46550. .Cout(),
  46551. .Q());
  46552. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .coord_x = 19;
  46553. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .coord_y = 9;
  46554. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .coord_z = 10;
  46555. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .mask = 16'hFE00;
  46556. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .modeMux = 1'b0;
  46557. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .FeedbackMux = 1'b0;
  46558. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .ShiftMux = 1'b0;
  46559. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .BypassEn = 1'b0;
  46560. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~4 .CarryEnb = 1'b1;
  46561. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 (
  46562. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector2~4_combout ),
  46563. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  46564. .C(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46565. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  46566. .Cin(),
  46567. .Qin(),
  46568. .Clk(),
  46569. .AsyncReset(),
  46570. .SyncReset(),
  46571. .ShiftData(),
  46572. .SyncLoad(),
  46573. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~5_combout ),
  46574. .Cout(),
  46575. .Q());
  46576. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .coord_x = 20;
  46577. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .coord_y = 9;
  46578. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .coord_z = 0;
  46579. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .mask = 16'h5400;
  46580. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .modeMux = 1'b0;
  46581. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .FeedbackMux = 1'b0;
  46582. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .ShiftMux = 1'b0;
  46583. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .BypassEn = 1'b0;
  46584. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector2~5 .CarryEnb = 1'b1;
  46585. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 (
  46586. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  46587. .B(vcc),
  46588. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  46589. .D(\macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ),
  46590. .Cin(),
  46591. .Qin(),
  46592. .Clk(),
  46593. .AsyncReset(),
  46594. .SyncReset(),
  46595. .ShiftData(),
  46596. .SyncLoad(),
  46597. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector3~0_combout ),
  46598. .Cout(),
  46599. .Q());
  46600. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .coord_x = 19;
  46601. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .coord_y = 10;
  46602. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .coord_z = 3;
  46603. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .mask = 16'hA000;
  46604. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .modeMux = 1'b0;
  46605. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .FeedbackMux = 1'b0;
  46606. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .ShiftMux = 1'b0;
  46607. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .BypassEn = 1'b0;
  46608. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector3~0 .CarryEnb = 1'b1;
  46609. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 (
  46610. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0]),
  46611. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3]),
  46612. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  46613. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  46614. .Cin(),
  46615. .Qin(),
  46616. .Clk(),
  46617. .AsyncReset(),
  46618. .SyncReset(),
  46619. .ShiftData(),
  46620. .SyncLoad(),
  46621. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector4~0_combout ),
  46622. .Cout(),
  46623. .Q());
  46624. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .coord_x = 20;
  46625. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .coord_y = 9;
  46626. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .coord_z = 13;
  46627. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .mask = 16'h0001;
  46628. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .modeMux = 1'b0;
  46629. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .FeedbackMux = 1'b0;
  46630. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .ShiftMux = 1'b0;
  46631. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .BypassEn = 1'b0;
  46632. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~0 .CarryEnb = 1'b1;
  46633. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 (
  46634. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  46635. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector4~0_combout ),
  46636. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ),
  46637. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  46638. .Cin(),
  46639. .Qin(),
  46640. .Clk(),
  46641. .AsyncReset(),
  46642. .SyncReset(),
  46643. .ShiftData(),
  46644. .SyncLoad(),
  46645. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector4~1_combout ),
  46646. .Cout(),
  46647. .Q());
  46648. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .coord_x = 19;
  46649. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .coord_y = 9;
  46650. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .coord_z = 1;
  46651. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .mask = 16'hAA08;
  46652. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .modeMux = 1'b0;
  46653. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .FeedbackMux = 1'b0;
  46654. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .ShiftMux = 1'b0;
  46655. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .BypassEn = 1'b0;
  46656. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~1 .CarryEnb = 1'b1;
  46657. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 (
  46658. .A(vcc),
  46659. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  46660. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  46661. .D(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46662. .Cin(),
  46663. .Qin(),
  46664. .Clk(),
  46665. .AsyncReset(),
  46666. .SyncReset(),
  46667. .ShiftData(),
  46668. .SyncLoad(),
  46669. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector4~2_combout ),
  46670. .Cout(),
  46671. .Q());
  46672. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .coord_x = 19;
  46673. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .coord_y = 9;
  46674. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .coord_z = 7;
  46675. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .mask = 16'hF300;
  46676. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .modeMux = 1'b0;
  46677. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .FeedbackMux = 1'b0;
  46678. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .ShiftMux = 1'b0;
  46679. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .BypassEn = 1'b0;
  46680. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~2 .CarryEnb = 1'b1;
  46681. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 (
  46682. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  46683. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  46684. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector4~1_combout ),
  46685. .D(\macro_inst|u_uart[1]|u_rx[3]|Selector4~2_combout ),
  46686. .Cin(),
  46687. .Qin(),
  46688. .Clk(),
  46689. .AsyncReset(),
  46690. .SyncReset(),
  46691. .ShiftData(),
  46692. .SyncLoad(),
  46693. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector4~3_combout ),
  46694. .Cout(),
  46695. .Q());
  46696. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .coord_x = 19;
  46697. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .coord_y = 9;
  46698. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .coord_z = 0;
  46699. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .mask = 16'hBBAE;
  46700. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .modeMux = 1'b0;
  46701. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .FeedbackMux = 1'b0;
  46702. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .ShiftMux = 1'b0;
  46703. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .BypassEn = 1'b0;
  46704. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~3 .CarryEnb = 1'b1;
  46705. alta_slice \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 (
  46706. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector3~0_combout ),
  46707. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector4~1_combout ),
  46708. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector4~3_combout ),
  46709. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  46710. .Cin(),
  46711. .Qin(),
  46712. .Clk(),
  46713. .AsyncReset(),
  46714. .SyncReset(),
  46715. .ShiftData(),
  46716. .SyncLoad(),
  46717. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector4~4_combout ),
  46718. .Cout(),
  46719. .Q());
  46720. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .coord_x = 19;
  46721. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .coord_y = 9;
  46722. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .coord_z = 15;
  46723. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .mask = 16'hEEAF;
  46724. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .modeMux = 1'b0;
  46725. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .FeedbackMux = 1'b0;
  46726. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .ShiftMux = 1'b0;
  46727. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .BypassEn = 1'b0;
  46728. defparam \macro_inst|u_uart[1]|u_rx[3]|Selector4~4 .CarryEnb = 1'b1;
  46729. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always11~2 (
  46730. .A(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46731. .B(\macro_inst|u_uart[1]|u_rx[3]|always11~1_combout ),
  46732. .C(\macro_inst|u_uart[1]|u_rx[3]|always11~0_combout ),
  46733. .D(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  46734. .Cin(),
  46735. .Qin(),
  46736. .Clk(),
  46737. .AsyncReset(),
  46738. .SyncReset(),
  46739. .ShiftData(),
  46740. .SyncLoad(),
  46741. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always11~2_combout ),
  46742. .Cout(),
  46743. .Q());
  46744. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .coord_x = 18;
  46745. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .coord_y = 3;
  46746. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .coord_z = 11;
  46747. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .mask = 16'h4000;
  46748. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .modeMux = 1'b0;
  46749. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .FeedbackMux = 1'b0;
  46750. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .ShiftMux = 1'b0;
  46751. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .BypassEn = 1'b0;
  46752. defparam \macro_inst|u_uart[1]|u_rx[3]|always11~2 .CarryEnb = 1'b1;
  46753. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always2~0 (
  46754. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  46755. .B(vcc),
  46756. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0]),
  46757. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3]),
  46758. .Cin(),
  46759. .Qin(),
  46760. .Clk(),
  46761. .AsyncReset(),
  46762. .SyncReset(),
  46763. .ShiftData(),
  46764. .SyncLoad(),
  46765. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  46766. .Cout(),
  46767. .Q());
  46768. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .coord_x = 20;
  46769. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .coord_y = 9;
  46770. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .coord_z = 3;
  46771. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .mask = 16'hA000;
  46772. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .modeMux = 1'b0;
  46773. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .FeedbackMux = 1'b0;
  46774. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .ShiftMux = 1'b0;
  46775. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .BypassEn = 1'b0;
  46776. defparam \macro_inst|u_uart[1]|u_rx[3]|always2~0 .CarryEnb = 1'b1;
  46777. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always3~1 (
  46778. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [3]),
  46779. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2]),
  46780. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]),
  46781. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]),
  46782. .Cin(),
  46783. .Qin(),
  46784. .Clk(),
  46785. .AsyncReset(),
  46786. .SyncReset(),
  46787. .ShiftData(),
  46788. .SyncLoad(),
  46789. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ),
  46790. .Cout(),
  46791. .Q());
  46792. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .coord_x = 19;
  46793. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .coord_y = 9;
  46794. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .coord_z = 5;
  46795. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .mask = 16'h0001;
  46796. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .modeMux = 1'b0;
  46797. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .FeedbackMux = 1'b0;
  46798. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .ShiftMux = 1'b0;
  46799. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .BypassEn = 1'b0;
  46800. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~1 .CarryEnb = 1'b1;
  46801. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always3~2 (
  46802. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  46803. .B(vcc),
  46804. .C(vcc),
  46805. .D(\macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ),
  46806. .Cin(),
  46807. .Qin(),
  46808. .Clk(),
  46809. .AsyncReset(),
  46810. .SyncReset(),
  46811. .ShiftData(),
  46812. .SyncLoad(),
  46813. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always3~2_combout ),
  46814. .Cout(),
  46815. .Q());
  46816. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .coord_x = 19;
  46817. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .coord_y = 9;
  46818. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .coord_z = 12;
  46819. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .mask = 16'hAA00;
  46820. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .modeMux = 1'b0;
  46821. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .FeedbackMux = 1'b0;
  46822. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .ShiftMux = 1'b0;
  46823. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .BypassEn = 1'b0;
  46824. defparam \macro_inst|u_uart[1]|u_rx[3]|always3~2 .CarryEnb = 1'b1;
  46825. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always4~2 (
  46826. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  46827. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  46828. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  46829. .D(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  46830. .Cin(),
  46831. .Qin(),
  46832. .Clk(),
  46833. .AsyncReset(),
  46834. .SyncReset(),
  46835. .ShiftData(),
  46836. .SyncLoad(),
  46837. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always4~2_combout ),
  46838. .Cout(),
  46839. .Q());
  46840. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .coord_x = 20;
  46841. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .coord_y = 9;
  46842. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .coord_z = 10;
  46843. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .mask = 16'h0200;
  46844. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .modeMux = 1'b0;
  46845. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .FeedbackMux = 1'b0;
  46846. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .ShiftMux = 1'b0;
  46847. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .BypassEn = 1'b0;
  46848. defparam \macro_inst|u_uart[1]|u_rx[3]|always4~2 .CarryEnb = 1'b1;
  46849. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always6~1 (
  46850. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  46851. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_in [3]),
  46852. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_in [2]),
  46853. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_in [4]),
  46854. .Cin(),
  46855. .Qin(),
  46856. .Clk(),
  46857. .AsyncReset(),
  46858. .SyncReset(),
  46859. .ShiftData(),
  46860. .SyncLoad(),
  46861. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout ),
  46862. .Cout(),
  46863. .Q());
  46864. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .coord_x = 18;
  46865. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .coord_y = 10;
  46866. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .coord_z = 5;
  46867. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .mask = 16'h4054;
  46868. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .modeMux = 1'b0;
  46869. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .FeedbackMux = 1'b0;
  46870. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .ShiftMux = 1'b0;
  46871. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .BypassEn = 1'b0;
  46872. defparam \macro_inst|u_uart[1]|u_rx[3]|always6~1 .CarryEnb = 1'b1;
  46873. alta_slice \macro_inst|u_uart[1]|u_rx[3]|always8~0 (
  46874. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  46875. .B(\macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ),
  46876. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~q ),
  46877. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  46878. .Cin(),
  46879. .Qin(),
  46880. .Clk(),
  46881. .AsyncReset(),
  46882. .SyncReset(),
  46883. .ShiftData(),
  46884. .SyncLoad(),
  46885. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always8~0_combout ),
  46886. .Cout(),
  46887. .Q());
  46888. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .coord_x = 19;
  46889. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .coord_y = 10;
  46890. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .coord_z = 13;
  46891. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .mask = 16'h4000;
  46892. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .modeMux = 1'b0;
  46893. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .FeedbackMux = 1'b0;
  46894. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .ShiftMux = 1'b0;
  46895. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .BypassEn = 1'b0;
  46896. defparam \macro_inst|u_uart[1]|u_rx[3]|always8~0 .CarryEnb = 1'b1;
  46897. alta_slice \macro_inst|u_uart[1]|u_rx[3]|break_error (
  46898. .A(\macro_inst|u_uart[1]|u_rx[3]|always11~2_combout ),
  46899. .B(vcc),
  46900. .C(vcc),
  46901. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  46902. .Cin(),
  46903. .Qin(\macro_inst|u_uart[1]|u_rx[3]|break_error~q ),
  46904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  46905. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  46906. .SyncReset(),
  46907. .ShiftData(),
  46908. .SyncLoad(),
  46909. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|break_error~0_combout ),
  46910. .Cout(),
  46911. .Q(\macro_inst|u_uart[1]|u_rx[3]|break_error~q ));
  46912. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .coord_x = 18;
  46913. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .coord_y = 6;
  46914. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .coord_z = 0;
  46915. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .mask = 16'hAAFA;
  46916. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .modeMux = 1'b0;
  46917. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .FeedbackMux = 1'b1;
  46918. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .ShiftMux = 1'b0;
  46919. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .BypassEn = 1'b0;
  46920. defparam \macro_inst|u_uart[1]|u_rx[3]|break_error .CarryEnb = 1'b1;
  46921. alta_slice \macro_inst|u_uart[1]|u_rx[3]|framing_error (
  46922. .A(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46923. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  46924. .C(vcc),
  46925. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  46926. .Cin(),
  46927. .Qin(\macro_inst|u_uart[1]|u_rx[3]|framing_error~q ),
  46928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  46929. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  46930. .SyncReset(),
  46931. .ShiftData(),
  46932. .SyncLoad(),
  46933. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|framing_error~0_combout ),
  46934. .Cout(),
  46935. .Q(\macro_inst|u_uart[1]|u_rx[3]|framing_error~q ));
  46936. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .coord_x = 18;
  46937. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .coord_y = 6;
  46938. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .coord_z = 8;
  46939. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .mask = 16'h44F4;
  46940. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .modeMux = 1'b0;
  46941. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .FeedbackMux = 1'b1;
  46942. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .ShiftMux = 1'b0;
  46943. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .BypassEn = 1'b0;
  46944. defparam \macro_inst|u_uart[1]|u_rx[3]|framing_error .CarryEnb = 1'b1;
  46945. alta_slice \macro_inst|u_uart[1]|u_rx[3]|overrun_error (
  46946. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  46947. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  46948. .C(vcc),
  46949. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  46950. .Cin(),
  46951. .Qin(\macro_inst|u_uart[1]|u_rx[3]|overrun_error~q ),
  46952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y7_SIG_VCC ),
  46953. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y7_SIG ),
  46954. .SyncReset(),
  46955. .ShiftData(),
  46956. .SyncLoad(),
  46957. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|overrun_error~0_combout ),
  46958. .Cout(),
  46959. .Q(\macro_inst|u_uart[1]|u_rx[3]|overrun_error~q ));
  46960. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .coord_x = 17;
  46961. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .coord_y = 5;
  46962. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .coord_z = 15;
  46963. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .mask = 16'h88F8;
  46964. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .modeMux = 1'b0;
  46965. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .FeedbackMux = 1'b1;
  46966. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .ShiftMux = 1'b0;
  46967. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .BypassEn = 1'b0;
  46968. defparam \macro_inst|u_uart[1]|u_rx[3]|overrun_error .CarryEnb = 1'b1;
  46969. alta_slice \macro_inst|u_uart[1]|u_rx[3]|parity_error (
  46970. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_sample~0_combout ),
  46971. .B(\macro_inst|u_uart[1]|u_rx[3]|parity_error~0_combout ),
  46972. .C(vcc),
  46973. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  46974. .Cin(),
  46975. .Qin(\macro_inst|u_uart[1]|u_rx[3]|parity_error~q ),
  46976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  46977. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  46978. .SyncReset(),
  46979. .ShiftData(),
  46980. .SyncLoad(),
  46981. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|parity_error~1_combout ),
  46982. .Cout(),
  46983. .Q(\macro_inst|u_uart[1]|u_rx[3]|parity_error~q ));
  46984. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .coord_x = 18;
  46985. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .coord_y = 9;
  46986. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .coord_z = 5;
  46987. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .mask = 16'h88F8;
  46988. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .modeMux = 1'b0;
  46989. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .FeedbackMux = 1'b1;
  46990. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .ShiftMux = 1'b0;
  46991. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .BypassEn = 1'b0;
  46992. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error .CarryEnb = 1'b1;
  46993. alta_slice \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 (
  46994. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~q ),
  46995. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  46996. .C(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  46997. .D(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  46998. .Cin(),
  46999. .Qin(),
  47000. .Clk(),
  47001. .AsyncReset(),
  47002. .SyncReset(),
  47003. .ShiftData(),
  47004. .SyncLoad(),
  47005. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|parity_error~0_combout ),
  47006. .Cout(),
  47007. .Q());
  47008. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .coord_x = 18;
  47009. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .coord_y = 9;
  47010. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .coord_z = 15;
  47011. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .mask = 16'h4800;
  47012. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .modeMux = 1'b0;
  47013. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .FeedbackMux = 1'b0;
  47014. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .ShiftMux = 1'b0;
  47015. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .BypassEn = 1'b0;
  47016. defparam \macro_inst|u_uart[1]|u_rx[3]|parity_error~0 .CarryEnb = 1'b1;
  47017. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] (
  47018. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0]),
  47019. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  47020. .C(\~GND~combout ),
  47021. .D(vcc),
  47022. .Cin(),
  47023. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0]),
  47024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47026. .SyncReset(SyncReset_X60_Y10_GND),
  47027. .ShiftData(),
  47028. .SyncLoad(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ),
  47029. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0]~4_combout ),
  47030. .Cout(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0]~5 ),
  47031. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [0]));
  47032. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .coord_x = 20;
  47033. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .coord_y = 9;
  47034. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .coord_z = 6;
  47035. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .mask = 16'h6688;
  47036. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .modeMux = 1'b0;
  47037. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  47038. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  47039. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .BypassEn = 1'b1;
  47040. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  47041. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] (
  47042. .A(vcc),
  47043. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  47044. .C(vcc),
  47045. .D(vcc),
  47046. .Cin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[0]~5 ),
  47047. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  47048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47050. .SyncReset(SyncReset_X60_Y10_GND),
  47051. .ShiftData(),
  47052. .SyncLoad(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ),
  47053. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1]~6_combout ),
  47054. .Cout(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1]~7 ),
  47055. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]));
  47056. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .coord_x = 20;
  47057. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .coord_y = 9;
  47058. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .coord_z = 7;
  47059. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .mask = 16'h3C3F;
  47060. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .modeMux = 1'b1;
  47061. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  47062. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  47063. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .BypassEn = 1'b1;
  47064. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  47065. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] (
  47066. .A(vcc),
  47067. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  47068. .C(\~GND~combout ),
  47069. .D(vcc),
  47070. .Cin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[1]~7 ),
  47071. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  47072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47074. .SyncReset(SyncReset_X60_Y10_GND),
  47075. .ShiftData(),
  47076. .SyncLoad(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ),
  47077. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2]~8_combout ),
  47078. .Cout(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2]~9 ),
  47079. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]));
  47080. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .coord_x = 20;
  47081. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .coord_y = 9;
  47082. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .coord_z = 8;
  47083. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .mask = 16'hC30C;
  47084. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .modeMux = 1'b1;
  47085. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  47086. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  47087. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .BypassEn = 1'b1;
  47088. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  47089. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] (
  47090. .A(vcc),
  47091. .B(vcc),
  47092. .C(\~GND~combout ),
  47093. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3]),
  47094. .Cin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[2]~9 ),
  47095. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3]),
  47096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47098. .SyncReset(SyncReset_X60_Y10_GND),
  47099. .ShiftData(),
  47100. .SyncLoad(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ),
  47101. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3]~10_combout ),
  47102. .Cout(),
  47103. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [3]));
  47104. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .coord_x = 20;
  47105. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .coord_y = 9;
  47106. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .coord_z = 9;
  47107. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .mask = 16'h0FF0;
  47108. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .modeMux = 1'b1;
  47109. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  47110. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  47111. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .BypassEn = 1'b1;
  47112. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  47113. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_bit (
  47114. .A(vcc),
  47115. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  47116. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  47117. .D(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  47118. .Cin(),
  47119. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  47120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47122. .SyncReset(),
  47123. .ShiftData(),
  47124. .SyncLoad(),
  47125. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always2~1_combout ),
  47126. .Cout(),
  47127. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ));
  47128. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .coord_x = 20;
  47129. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .coord_y = 9;
  47130. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .coord_z = 15;
  47131. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .mask = 16'hC000;
  47132. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .modeMux = 1'b0;
  47133. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .FeedbackMux = 1'b0;
  47134. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .ShiftMux = 1'b0;
  47135. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .BypassEn = 1'b0;
  47136. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_bit .CarryEnb = 1'b1;
  47137. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] (
  47138. .A(\macro_inst|u_uart[1]|u_rx[3]|always3~2_combout ),
  47139. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47140. .C(vcc),
  47141. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  47142. .Cin(),
  47143. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]),
  47144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout_X59_Y10_SIG_SIG ),
  47145. .AsyncReset(AsyncReset_X59_Y10_GND),
  47146. .SyncReset(),
  47147. .ShiftData(),
  47148. .SyncLoad(),
  47149. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~4_combout ),
  47150. .Cout(),
  47151. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [0]));
  47152. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .coord_x = 19;
  47153. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .coord_y = 9;
  47154. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .coord_z = 14;
  47155. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .mask = 16'hCDCF;
  47156. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .modeMux = 1'b0;
  47157. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  47158. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .ShiftMux = 1'b0;
  47159. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .BypassEn = 1'b0;
  47160. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0] .CarryEnb = 1'b1;
  47161. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] (
  47162. .A(\macro_inst|u_uart[1]|u_rx[3]|always3~2_combout ),
  47163. .B(\macro_inst|u_uart[1]|u_rx[3]|Add4~2_combout ),
  47164. .C(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  47165. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47166. .Cin(),
  47167. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]),
  47168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout_X59_Y10_SIG_SIG ),
  47169. .AsyncReset(AsyncReset_X59_Y10_GND),
  47170. .SyncReset(),
  47171. .ShiftData(),
  47172. .SyncLoad(),
  47173. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~5_combout ),
  47174. .Cout(),
  47175. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [1]));
  47176. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .coord_x = 19;
  47177. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .coord_y = 9;
  47178. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .coord_z = 9;
  47179. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .mask = 16'hFFB1;
  47180. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .modeMux = 1'b0;
  47181. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  47182. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .ShiftMux = 1'b0;
  47183. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .BypassEn = 1'b0;
  47184. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[1] .CarryEnb = 1'b1;
  47185. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] (
  47186. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47187. .B(\macro_inst|u_uart[1]|u_rx[3]|always3~1_combout ),
  47188. .C(\macro_inst|u_uart[1]|u_rx[3]|Add4~1_combout ),
  47189. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  47190. .Cin(),
  47191. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2]),
  47192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[0]~3_combout_X59_Y10_SIG_SIG ),
  47193. .AsyncReset(AsyncReset_X59_Y10_GND),
  47194. .SyncReset(),
  47195. .ShiftData(),
  47196. .SyncLoad(),
  47197. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~2_combout ),
  47198. .Cout(),
  47199. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [2]));
  47200. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .coord_x = 19;
  47201. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .coord_y = 9;
  47202. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .coord_z = 11;
  47203. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .mask = 16'hABAF;
  47204. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .modeMux = 1'b0;
  47205. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  47206. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .ShiftMux = 1'b0;
  47207. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .BypassEn = 1'b0;
  47208. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[2] .CarryEnb = 1'b1;
  47209. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] (
  47210. .A(\macro_inst|u_uart[1]|u_rx[3]|Add4~0_combout ),
  47211. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  47212. .C(vcc),
  47213. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47214. .Cin(),
  47215. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [3]),
  47216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y10_SIG_VCC ),
  47217. .AsyncReset(AsyncReset_X59_Y10_GND),
  47218. .SyncReset(),
  47219. .ShiftData(),
  47220. .SyncLoad(),
  47221. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt~1_combout ),
  47222. .Cout(),
  47223. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt [3]));
  47224. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .coord_x = 19;
  47225. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .coord_y = 9;
  47226. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .coord_z = 8;
  47227. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .mask = 16'h0074;
  47228. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .modeMux = 1'b0;
  47229. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  47230. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .ShiftMux = 1'b0;
  47231. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .BypassEn = 1'b0;
  47232. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_data_cnt[3] .CarryEnb = 1'b1;
  47233. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] (
  47234. .A(vcc),
  47235. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector2~1_combout ),
  47236. .C(vcc),
  47237. .D(\macro_inst|u_uart[1]|u_regs|rx_read [3]),
  47238. .Cin(),
  47239. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  47240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y7_SIG_VCC ),
  47241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y7_SIG ),
  47242. .SyncReset(),
  47243. .ShiftData(),
  47244. .SyncLoad(),
  47245. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter~0_combout ),
  47246. .Cout(),
  47247. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]));
  47248. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .coord_x = 18;
  47249. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .coord_y = 4;
  47250. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .coord_z = 12;
  47251. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .mask = 16'h0CFC;
  47252. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .modeMux = 1'b0;
  47253. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  47254. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  47255. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .BypassEn = 1'b0;
  47256. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  47257. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] (
  47258. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][0]~q ),
  47259. .B(\macro_inst|u_uart[1]|u_regs|Mux0~3_combout ),
  47260. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [0]),
  47261. .D(\macro_inst|u_ahb2apb|paddr [9]),
  47262. .Cin(),
  47263. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0]~q ),
  47264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47265. .AsyncReset(AsyncReset_X58_Y11_GND),
  47266. .SyncReset(SyncReset_X58_Y11_GND),
  47267. .ShiftData(),
  47268. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47269. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux0~4_combout ),
  47270. .Cout(),
  47271. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0]~q ));
  47272. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .coord_x = 20;
  47273. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .coord_y = 7;
  47274. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .coord_z = 0;
  47275. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .mask = 16'hE2CC;
  47276. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  47277. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  47278. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  47279. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  47280. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  47281. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] (
  47282. .A(\macro_inst|u_uart[1]|u_regs|Mux1~3_combout ),
  47283. .B(\macro_inst|u_ahb2apb|paddr [9]),
  47284. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1]),
  47285. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][1]~q ),
  47286. .Cin(),
  47287. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1]~q ),
  47288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47289. .AsyncReset(AsyncReset_X58_Y11_GND),
  47290. .SyncReset(SyncReset_X58_Y11_GND),
  47291. .ShiftData(),
  47292. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47293. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux1~4_combout ),
  47294. .Cout(),
  47295. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1]~q ));
  47296. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .coord_x = 20;
  47297. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .coord_y = 7;
  47298. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .coord_z = 3;
  47299. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .mask = 16'hE6A2;
  47300. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  47301. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  47302. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  47303. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  47304. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  47305. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] (
  47306. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][2]~q ),
  47307. .B(\macro_inst|u_uart[1]|u_regs|Mux2~3_combout ),
  47308. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [2]),
  47309. .D(\macro_inst|u_ahb2apb|paddr [9]),
  47310. .Cin(),
  47311. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2]~q ),
  47312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47313. .AsyncReset(AsyncReset_X58_Y11_GND),
  47314. .SyncReset(SyncReset_X58_Y11_GND),
  47315. .ShiftData(),
  47316. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47317. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux2~4_combout ),
  47318. .Cout(),
  47319. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2]~q ));
  47320. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .coord_x = 20;
  47321. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .coord_y = 7;
  47322. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .coord_z = 4;
  47323. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .mask = 16'hE2CC;
  47324. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  47325. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  47326. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  47327. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  47328. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  47329. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] (
  47330. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][3]~q ),
  47331. .B(\macro_inst|u_uart[1]|u_regs|Mux3~3_combout ),
  47332. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3]),
  47333. .D(\macro_inst|u_ahb2apb|paddr [9]),
  47334. .Cin(),
  47335. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3]~q ),
  47336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47337. .AsyncReset(AsyncReset_X58_Y11_GND),
  47338. .SyncReset(SyncReset_X58_Y11_GND),
  47339. .ShiftData(),
  47340. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47341. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux3~4_combout ),
  47342. .Cout(),
  47343. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3]~q ));
  47344. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .coord_x = 20;
  47345. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .coord_y = 7;
  47346. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .coord_z = 11;
  47347. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .mask = 16'hE2CC;
  47348. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  47349. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  47350. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  47351. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  47352. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  47353. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] (
  47354. .A(\macro_inst|u_uart[1]|u_regs|Mux4~3_combout ),
  47355. .B(\macro_inst|u_ahb2apb|paddr [9]),
  47356. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [4]),
  47357. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][4]~q ),
  47358. .Cin(),
  47359. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4]~q ),
  47360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47361. .AsyncReset(AsyncReset_X58_Y11_GND),
  47362. .SyncReset(SyncReset_X58_Y11_GND),
  47363. .ShiftData(),
  47364. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47365. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux4~4_combout ),
  47366. .Cout(),
  47367. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4]~q ));
  47368. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .coord_x = 20;
  47369. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .coord_y = 7;
  47370. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .coord_z = 1;
  47371. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .mask = 16'hE6A2;
  47372. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  47373. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  47374. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  47375. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  47376. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  47377. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] (
  47378. .A(\macro_inst|u_uart[1]|u_regs|Mux5~3_combout ),
  47379. .B(\macro_inst|u_ahb2apb|paddr [9]),
  47380. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5]),
  47381. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][5]~q ),
  47382. .Cin(),
  47383. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5]~q ),
  47384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47385. .AsyncReset(AsyncReset_X58_Y11_GND),
  47386. .SyncReset(SyncReset_X58_Y11_GND),
  47387. .ShiftData(),
  47388. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47389. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux5~4_combout ),
  47390. .Cout(),
  47391. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5]~q ));
  47392. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .coord_x = 20;
  47393. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .coord_y = 7;
  47394. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .coord_z = 10;
  47395. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .mask = 16'hE6A2;
  47396. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  47397. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  47398. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  47399. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  47400. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  47401. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] (
  47402. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][6]~q ),
  47403. .B(\macro_inst|u_uart[1]|u_regs|Mux6~3_combout ),
  47404. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6]),
  47405. .D(\macro_inst|u_ahb2apb|paddr [9]),
  47406. .Cin(),
  47407. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6]~q ),
  47408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47409. .AsyncReset(AsyncReset_X58_Y11_GND),
  47410. .SyncReset(SyncReset_X58_Y11_GND),
  47411. .ShiftData(),
  47412. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47413. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux6~4_combout ),
  47414. .Cout(),
  47415. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6]~q ));
  47416. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .coord_x = 20;
  47417. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .coord_y = 7;
  47418. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .coord_z = 8;
  47419. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .mask = 16'hE2CC;
  47420. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  47421. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  47422. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  47423. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  47424. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  47425. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] (
  47426. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_fifo|fifo[1][7]~q ),
  47427. .B(\macro_inst|u_ahb2apb|paddr [9]),
  47428. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]),
  47429. .D(\macro_inst|u_uart[1]|u_regs|Mux7~3_combout ),
  47430. .Cin(),
  47431. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7]~q ),
  47432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout_X58_Y11_SIG_SIG ),
  47433. .AsyncReset(AsyncReset_X58_Y11_GND),
  47434. .SyncReset(SyncReset_X58_Y11_GND),
  47435. .ShiftData(),
  47436. .SyncLoad(SyncLoad_X58_Y11_VCC),
  47437. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux7~4_combout ),
  47438. .Cout(),
  47439. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7]~q ));
  47440. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .coord_x = 20;
  47441. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .coord_y = 7;
  47442. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .coord_z = 14;
  47443. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .mask = 16'hF388;
  47444. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  47445. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  47446. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  47447. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  47448. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  47449. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 (
  47450. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ),
  47451. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_sample~0_combout ),
  47452. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  47453. .D(\macro_inst|u_uart[1]|u_rx[3]|always2~0_combout ),
  47454. .Cin(),
  47455. .Qin(),
  47456. .Clk(),
  47457. .AsyncReset(),
  47458. .SyncReset(),
  47459. .ShiftData(),
  47460. .SyncLoad(),
  47461. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0_combout ),
  47462. .Cout(),
  47463. .Q());
  47464. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .coord_x = 19;
  47465. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .coord_y = 9;
  47466. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .coord_z = 4;
  47467. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .mask = 16'h0800;
  47468. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  47469. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  47470. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  47471. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  47472. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  47473. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_idle (
  47474. .A(vcc),
  47475. .B(\macro_inst|u_uart[1]|u_rx[3]|always8~0_combout ),
  47476. .C(vcc),
  47477. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  47478. .Cin(),
  47479. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_idle~q ),
  47480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y6_SIG_VCC ),
  47481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y6_SIG ),
  47482. .SyncReset(),
  47483. .ShiftData(),
  47484. .SyncLoad(),
  47485. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_idle~0_combout ),
  47486. .Cout(),
  47487. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_idle~q ));
  47488. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .coord_x = 18;
  47489. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .coord_y = 6;
  47490. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .coord_z = 6;
  47491. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .mask = 16'hCCFC;
  47492. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .modeMux = 1'b0;
  47493. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .FeedbackMux = 1'b1;
  47494. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .ShiftMux = 1'b0;
  47495. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .BypassEn = 1'b0;
  47496. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle .CarryEnb = 1'b1;
  47497. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en (
  47498. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_fifo|counter [0]),
  47499. .B(vcc),
  47500. .C(vcc),
  47501. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  47502. .Cin(),
  47503. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~q ),
  47504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  47505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  47506. .SyncReset(),
  47507. .ShiftData(),
  47508. .SyncLoad(),
  47509. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~0_combout ),
  47510. .Cout(),
  47511. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_idle_en~q ));
  47512. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .coord_x = 20;
  47513. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .coord_y = 8;
  47514. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .coord_z = 5;
  47515. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .mask = 16'hAAFA;
  47516. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .modeMux = 1'b0;
  47517. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .FeedbackMux = 1'b1;
  47518. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .ShiftMux = 1'b0;
  47519. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .BypassEn = 1'b0;
  47520. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_idle_en .CarryEnb = 1'b1;
  47521. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] (
  47522. .A(vcc),
  47523. .B(vcc),
  47524. .C(\SIM_IO[9]~input_o ),
  47525. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  47526. .Cin(),
  47527. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_in [0]),
  47528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  47529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  47530. .SyncReset(),
  47531. .ShiftData(),
  47532. .SyncLoad(),
  47533. .LutOut(\macro_inst|uart_rxd [9]),
  47534. .Cout(),
  47535. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_in [0]));
  47536. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .coord_x = 18;
  47537. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .coord_y = 2;
  47538. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .coord_z = 14;
  47539. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .mask = 16'h000F;
  47540. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .modeMux = 1'b0;
  47541. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .FeedbackMux = 1'b0;
  47542. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .ShiftMux = 1'b0;
  47543. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .BypassEn = 1'b0;
  47544. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[0] .CarryEnb = 1'b1;
  47545. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] (
  47546. .A(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [0]),
  47547. .B(\macro_inst|u_uart[1]|u_rx[0]|rx_data_cnt [1]),
  47548. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_in [0]),
  47549. .D(vcc),
  47550. .Cin(),
  47551. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_in [1]),
  47552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  47553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  47554. .SyncReset(SyncReset_X53_Y4_GND),
  47555. .ShiftData(),
  47556. .SyncLoad(SyncLoad_X53_Y4_VCC),
  47557. .LutOut(\macro_inst|u_uart[1]|u_rx[0]|Add4~2_combout ),
  47558. .Cout(),
  47559. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_in [1]));
  47560. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .coord_x = 18;
  47561. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .coord_y = 2;
  47562. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .coord_z = 2;
  47563. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .mask = 16'h6666;
  47564. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .modeMux = 1'b0;
  47565. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .FeedbackMux = 1'b0;
  47566. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .ShiftMux = 1'b0;
  47567. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .BypassEn = 1'b1;
  47568. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[1] .CarryEnb = 1'b1;
  47569. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] (
  47570. .A(vcc),
  47571. .B(vcc),
  47572. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_in [1]),
  47573. .D(vcc),
  47574. .Cin(),
  47575. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_in [2]),
  47576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  47577. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  47578. .SyncReset(),
  47579. .ShiftData(),
  47580. .SyncLoad(),
  47581. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_in[2]~feeder_combout ),
  47582. .Cout(),
  47583. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_in [2]));
  47584. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .coord_x = 18;
  47585. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .coord_y = 10;
  47586. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .coord_z = 12;
  47587. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .mask = 16'hF0F0;
  47588. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .modeMux = 1'b0;
  47589. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .FeedbackMux = 1'b0;
  47590. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .ShiftMux = 1'b0;
  47591. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .BypassEn = 1'b0;
  47592. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[2] .CarryEnb = 1'b1;
  47593. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] (
  47594. .A(\macro_inst|u_uart[1]|u_rx[2]|rx_in [4]),
  47595. .B(\macro_inst|u_uart[1]|u_rx[2]|rx_in [2]),
  47596. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_in [2]),
  47597. .D(\macro_inst|u_uart[1]|u_rx[2]|rx_in [3]),
  47598. .Cin(),
  47599. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_in [3]),
  47600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  47601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  47602. .SyncReset(SyncReset_X60_Y9_GND),
  47603. .ShiftData(),
  47604. .SyncLoad(SyncLoad_X60_Y9_VCC),
  47605. .LutOut(\macro_inst|u_uart[1]|u_rx[2]|Add1~0_combout ),
  47606. .Cout(),
  47607. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_in [3]));
  47608. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .coord_x = 18;
  47609. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .coord_y = 10;
  47610. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .coord_z = 13;
  47611. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .mask = 16'h22BB;
  47612. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .modeMux = 1'b0;
  47613. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .FeedbackMux = 1'b0;
  47614. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .ShiftMux = 1'b0;
  47615. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .BypassEn = 1'b1;
  47616. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[3] .CarryEnb = 1'b1;
  47617. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] (
  47618. .A(vcc),
  47619. .B(vcc),
  47620. .C(vcc),
  47621. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_in [3]),
  47622. .Cin(),
  47623. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_in [4]),
  47624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  47625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  47626. .SyncReset(),
  47627. .ShiftData(),
  47628. .SyncLoad(),
  47629. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_in[4]~0_combout ),
  47630. .Cout(),
  47631. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_in [4]));
  47632. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .coord_x = 18;
  47633. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .coord_y = 10;
  47634. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .coord_z = 9;
  47635. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .mask = 16'h00FF;
  47636. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .modeMux = 1'b0;
  47637. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .FeedbackMux = 1'b0;
  47638. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .ShiftMux = 1'b0;
  47639. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .BypassEn = 1'b0;
  47640. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_in[4] .CarryEnb = 1'b1;
  47641. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_parity (
  47642. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47643. .B(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  47644. .C(vcc),
  47645. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~0_combout ),
  47646. .Cin(),
  47647. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~q ),
  47648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  47649. .AsyncReset(AsyncReset_X60_Y9_GND),
  47650. .SyncReset(),
  47651. .ShiftData(),
  47652. .SyncLoad(),
  47653. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~1_combout ),
  47654. .Cout(),
  47655. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~q ));
  47656. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .coord_x = 18;
  47657. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .coord_y = 10;
  47658. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .coord_z = 8;
  47659. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .mask = 16'h2772;
  47660. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .modeMux = 1'b0;
  47661. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .FeedbackMux = 1'b1;
  47662. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .ShiftMux = 1'b0;
  47663. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .BypassEn = 1'b0;
  47664. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity .CarryEnb = 1'b1;
  47665. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 (
  47666. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]),
  47667. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  47668. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  47669. .D(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  47670. .Cin(),
  47671. .Qin(),
  47672. .Clk(),
  47673. .AsyncReset(),
  47674. .SyncReset(),
  47675. .ShiftData(),
  47676. .SyncLoad(),
  47677. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_parity~0_combout ),
  47678. .Cout(),
  47679. .Q());
  47680. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .coord_x = 19;
  47681. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .coord_y = 10;
  47682. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .coord_z = 10;
  47683. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .mask = 16'h0080;
  47684. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .modeMux = 1'b0;
  47685. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .FeedbackMux = 1'b0;
  47686. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .ShiftMux = 1'b0;
  47687. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .BypassEn = 1'b0;
  47688. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_parity~0 .CarryEnb = 1'b1;
  47689. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 (
  47690. .A(vcc),
  47691. .B(vcc),
  47692. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [2]),
  47693. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_baud_cnt [1]),
  47694. .Cin(),
  47695. .Qin(),
  47696. .Clk(),
  47697. .AsyncReset(),
  47698. .SyncReset(),
  47699. .ShiftData(),
  47700. .SyncLoad(),
  47701. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_sample~0_combout ),
  47702. .Cout(),
  47703. .Q());
  47704. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .coord_x = 20;
  47705. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .coord_y = 9;
  47706. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .coord_z = 5;
  47707. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .mask = 16'h000F;
  47708. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .modeMux = 1'b0;
  47709. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .FeedbackMux = 1'b0;
  47710. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .ShiftMux = 1'b0;
  47711. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .BypassEn = 1'b0;
  47712. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_sample~0 .CarryEnb = 1'b1;
  47713. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] (
  47714. .A(\macro_inst|u_uart[1]|u_rx[1]|Selector4~2_combout ),
  47715. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_STOP~q ),
  47716. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1]),
  47717. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  47718. .Cin(),
  47719. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [0]),
  47720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y6_SIG_SIG ),
  47721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y6_SIG ),
  47722. .SyncReset(SyncReset_X57_Y6_GND),
  47723. .ShiftData(),
  47724. .SyncLoad(SyncLoad_X57_Y6_VCC),
  47725. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Selector4~3_combout ),
  47726. .Cout(),
  47727. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [0]));
  47728. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .coord_x = 19;
  47729. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .coord_y = 1;
  47730. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .coord_z = 15;
  47731. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .mask = 16'h2200;
  47732. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .modeMux = 1'b0;
  47733. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  47734. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .ShiftMux = 1'b0;
  47735. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .BypassEn = 1'b1;
  47736. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[0] .CarryEnb = 1'b1;
  47737. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] (
  47738. .A(vcc),
  47739. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_state.UART_START~q ),
  47740. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [2]),
  47741. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_bit~q ),
  47742. .Cin(),
  47743. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1]),
  47744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y6_SIG_SIG ),
  47745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y6_SIG ),
  47746. .SyncReset(SyncReset_X57_Y6_GND),
  47747. .ShiftData(),
  47748. .SyncLoad(SyncLoad_X57_Y6_VCC),
  47749. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt[0]~3_combout ),
  47750. .Cout(),
  47751. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1]));
  47752. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .coord_x = 19;
  47753. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .coord_y = 1;
  47754. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .coord_z = 2;
  47755. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .mask = 16'hFFCC;
  47756. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .modeMux = 1'b0;
  47757. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  47758. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .ShiftMux = 1'b0;
  47759. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .BypassEn = 1'b1;
  47760. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[1] .CarryEnb = 1'b1;
  47761. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] (
  47762. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [1]),
  47763. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [0]),
  47764. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3]),
  47765. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3]),
  47766. .Cin(),
  47767. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [2]),
  47768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y6_SIG_SIG ),
  47769. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y6_SIG ),
  47770. .SyncReset(SyncReset_X57_Y6_GND),
  47771. .ShiftData(),
  47772. .SyncLoad(SyncLoad_X57_Y6_VCC),
  47773. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always11~1_combout ),
  47774. .Cout(),
  47775. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [2]));
  47776. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .coord_x = 19;
  47777. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .coord_y = 1;
  47778. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .coord_z = 3;
  47779. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .mask = 16'h0001;
  47780. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .modeMux = 1'b0;
  47781. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .FeedbackMux = 1'b1;
  47782. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .ShiftMux = 1'b0;
  47783. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .BypassEn = 1'b1;
  47784. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[2] .CarryEnb = 1'b1;
  47785. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] (
  47786. .A(vcc),
  47787. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ),
  47788. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [4]),
  47789. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  47790. .Cin(),
  47791. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3]),
  47792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ),
  47793. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  47794. .SyncReset(SyncReset_X57_Y10_GND),
  47795. .ShiftData(),
  47796. .SyncLoad(SyncLoad_X57_Y10_VCC),
  47797. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector3~0_combout ),
  47798. .Cout(),
  47799. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [3]));
  47800. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .coord_x = 19;
  47801. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .coord_y = 12;
  47802. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .coord_z = 8;
  47803. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .mask = 16'h00CC;
  47804. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .modeMux = 1'b0;
  47805. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  47806. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .ShiftMux = 1'b0;
  47807. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .BypassEn = 1'b1;
  47808. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[3] .CarryEnb = 1'b1;
  47809. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] (
  47810. .A(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6]),
  47811. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]),
  47812. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5]),
  47813. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5]),
  47814. .Cin(),
  47815. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [4]),
  47816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ),
  47817. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  47818. .SyncReset(SyncReset_X57_Y10_GND),
  47819. .ShiftData(),
  47820. .SyncLoad(SyncLoad_X57_Y10_VCC),
  47821. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|always11~0_combout ),
  47822. .Cout(),
  47823. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [4]));
  47824. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .coord_x = 19;
  47825. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .coord_y = 12;
  47826. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .coord_z = 2;
  47827. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .mask = 16'h0001;
  47828. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .modeMux = 1'b0;
  47829. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  47830. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .ShiftMux = 1'b0;
  47831. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .BypassEn = 1'b1;
  47832. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[4] .CarryEnb = 1'b1;
  47833. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] (
  47834. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  47835. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  47836. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6]),
  47837. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  47838. .Cin(),
  47839. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5]),
  47840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ),
  47841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  47842. .SyncReset(SyncReset_X57_Y10_GND),
  47843. .ShiftData(),
  47844. .SyncLoad(SyncLoad_X57_Y10_VCC),
  47845. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout ),
  47846. .Cout(),
  47847. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [5]));
  47848. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .coord_x = 19;
  47849. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .coord_y = 12;
  47850. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .coord_z = 3;
  47851. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .mask = 16'hFF88;
  47852. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .modeMux = 1'b0;
  47853. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  47854. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .ShiftMux = 1'b0;
  47855. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .BypassEn = 1'b1;
  47856. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[5] .CarryEnb = 1'b1;
  47857. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] (
  47858. .A(vcc),
  47859. .B(\macro_inst|u_uart[1]|u_regs|tx_write [1]),
  47860. .C(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]),
  47861. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  47862. .Cin(),
  47863. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6]),
  47864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X57_Y10_SIG_SIG ),
  47865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  47866. .SyncReset(SyncReset_X57_Y10_GND),
  47867. .ShiftData(),
  47868. .SyncLoad(SyncLoad_X57_Y10_VCC),
  47869. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout ),
  47870. .Cout(),
  47871. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [6]));
  47872. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .coord_x = 19;
  47873. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .coord_y = 12;
  47874. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .coord_z = 6;
  47875. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .mask = 16'h00CC;
  47876. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .modeMux = 1'b0;
  47877. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  47878. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .ShiftMux = 1'b0;
  47879. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .BypassEn = 1'b1;
  47880. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[6] .CarryEnb = 1'b1;
  47881. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] (
  47882. .A(vcc),
  47883. .B(vcc),
  47884. .C(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  47885. .D(vcc),
  47886. .Cin(),
  47887. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]),
  47888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[3]|always4~2_combout_X60_Y10_SIG_SIG ),
  47889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47890. .SyncReset(),
  47891. .ShiftData(),
  47892. .SyncLoad(),
  47893. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7]~feeder_combout ),
  47894. .Cout(),
  47895. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg [7]));
  47896. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .coord_x = 20;
  47897. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .coord_y = 9;
  47898. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .coord_z = 12;
  47899. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .mask = 16'hF0F0;
  47900. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .modeMux = 1'b0;
  47901. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  47902. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .ShiftMux = 1'b0;
  47903. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .BypassEn = 1'b0;
  47904. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_shift_reg[7] .CarryEnb = 1'b1;
  47905. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA (
  47906. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector2~3_combout ),
  47907. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector2~5_combout ),
  47908. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector2~2_combout ),
  47909. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  47910. .Cin(),
  47911. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ),
  47912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47914. .SyncReset(),
  47915. .ShiftData(),
  47916. .SyncLoad(),
  47917. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector2~6_combout ),
  47918. .Cout(),
  47919. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA~q ));
  47920. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .coord_x = 20;
  47921. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .coord_y = 9;
  47922. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .coord_z = 1;
  47923. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .mask = 16'h0E0C;
  47924. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .modeMux = 1'b0;
  47925. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  47926. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .ShiftMux = 1'b0;
  47927. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .BypassEn = 1'b0;
  47928. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_DATA .CarryEnb = 1'b1;
  47929. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE (
  47930. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector2~2_combout ),
  47931. .B(\macro_inst|u_uart[1]|u_rx[3]|Add1~0_combout ),
  47932. .C(vcc),
  47933. .D(vcc),
  47934. .Cin(),
  47935. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ),
  47936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47938. .SyncReset(),
  47939. .ShiftData(),
  47940. .SyncLoad(),
  47941. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector0~0_combout ),
  47942. .Cout(),
  47943. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE~q ));
  47944. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .coord_x = 20;
  47945. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .coord_y = 9;
  47946. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .coord_z = 11;
  47947. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .mask = 16'h5151;
  47948. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .modeMux = 1'b0;
  47949. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  47950. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  47951. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .BypassEn = 1'b0;
  47952. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  47953. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY (
  47954. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector3~0_combout ),
  47955. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector4~4_combout ),
  47956. .C(vcc),
  47957. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~0_combout ),
  47958. .Cin(),
  47959. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  47960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y10_SIG_VCC ),
  47961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  47962. .SyncReset(),
  47963. .ShiftData(),
  47964. .SyncLoad(),
  47965. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~1_combout ),
  47966. .Cout(),
  47967. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ));
  47968. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .coord_x = 19;
  47969. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .coord_y = 9;
  47970. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .coord_z = 13;
  47971. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .mask = 16'hBA30;
  47972. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .modeMux = 1'b0;
  47973. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  47974. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  47975. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .BypassEn = 1'b0;
  47976. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  47977. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START (
  47978. .A(\macro_inst|u_uart[1]|u_rx[3]|Selector2~4_combout ),
  47979. .B(\macro_inst|u_uart[1]|u_rx[3]|Selector2~2_combout ),
  47980. .C(vcc),
  47981. .D(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout ),
  47982. .Cin(),
  47983. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ),
  47984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y10_SIG_VCC ),
  47985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y10_SIG ),
  47986. .SyncReset(),
  47987. .ShiftData(),
  47988. .SyncLoad(),
  47989. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|Selector1~0_combout ),
  47990. .Cout(),
  47991. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START~q ));
  47992. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .coord_x = 20;
  47993. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .coord_y = 9;
  47994. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .coord_z = 14;
  47995. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .mask = 16'h3310;
  47996. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .modeMux = 1'b0;
  47997. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .FeedbackMux = 1'b1;
  47998. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .ShiftMux = 1'b0;
  47999. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .BypassEn = 1'b0;
  48000. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_START .CarryEnb = 1'b1;
  48001. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP (
  48002. .A(vcc),
  48003. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0_combout ),
  48004. .C(vcc),
  48005. .D(\macro_inst|u_uart[1]|u_rx[3]|Selector4~4_combout ),
  48006. .Cin(),
  48007. .Qin(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ),
  48008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y10_SIG_VCC ),
  48009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y10_SIG ),
  48010. .SyncReset(),
  48011. .ShiftData(),
  48012. .SyncLoad(),
  48013. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~1_combout ),
  48014. .Cout(),
  48015. .Q(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~q ));
  48016. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .coord_x = 19;
  48017. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .coord_y = 9;
  48018. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .coord_z = 6;
  48019. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .mask = 16'hCCF0;
  48020. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .modeMux = 1'b0;
  48021. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  48022. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .ShiftMux = 1'b0;
  48023. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .BypassEn = 1'b0;
  48024. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP .CarryEnb = 1'b1;
  48025. alta_slice \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 (
  48026. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  48027. .B(\macro_inst|u_uart[1]|u_rx[3]|rx_bit~q ),
  48028. .C(\macro_inst|u_uart[1]|u_rx[3]|Selector3~0_combout ),
  48029. .D(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_PARITY~q ),
  48030. .Cin(),
  48031. .Qin(),
  48032. .Clk(),
  48033. .AsyncReset(),
  48034. .SyncReset(),
  48035. .ShiftData(),
  48036. .SyncLoad(),
  48037. .LutOut(\macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0_combout ),
  48038. .Cout(),
  48039. .Q());
  48040. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .coord_x = 19;
  48041. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .coord_y = 9;
  48042. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .coord_z = 3;
  48043. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .mask = 16'hDC50;
  48044. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  48045. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  48046. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  48047. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  48048. defparam \macro_inst|u_uart[1]|u_rx[3]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  48049. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Add4~0 (
  48050. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [3]),
  48051. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2]),
  48052. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]),
  48053. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]),
  48054. .Cin(),
  48055. .Qin(),
  48056. .Clk(),
  48057. .AsyncReset(),
  48058. .SyncReset(),
  48059. .ShiftData(),
  48060. .SyncLoad(),
  48061. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Add4~0_combout ),
  48062. .Cout(),
  48063. .Q());
  48064. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .coord_x = 19;
  48065. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .coord_y = 10;
  48066. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .coord_z = 9;
  48067. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .mask = 16'h5556;
  48068. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .modeMux = 1'b0;
  48069. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .FeedbackMux = 1'b0;
  48070. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .ShiftMux = 1'b0;
  48071. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .BypassEn = 1'b0;
  48072. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~0 .CarryEnb = 1'b1;
  48073. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Add4~1 (
  48074. .A(vcc),
  48075. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2]),
  48076. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]),
  48077. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]),
  48078. .Cin(),
  48079. .Qin(),
  48080. .Clk(),
  48081. .AsyncReset(),
  48082. .SyncReset(),
  48083. .ShiftData(),
  48084. .SyncLoad(),
  48085. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Add4~1_combout ),
  48086. .Cout(),
  48087. .Q());
  48088. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .coord_x = 19;
  48089. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .coord_y = 10;
  48090. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .coord_z = 14;
  48091. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .mask = 16'h333C;
  48092. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .modeMux = 1'b0;
  48093. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .FeedbackMux = 1'b0;
  48094. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .ShiftMux = 1'b0;
  48095. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .BypassEn = 1'b0;
  48096. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~1 .CarryEnb = 1'b1;
  48097. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Add4~2 (
  48098. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]),
  48099. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]),
  48100. .C(vcc),
  48101. .D(vcc),
  48102. .Cin(),
  48103. .Qin(),
  48104. .Clk(),
  48105. .AsyncReset(),
  48106. .SyncReset(),
  48107. .ShiftData(),
  48108. .SyncLoad(),
  48109. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Add4~2_combout ),
  48110. .Cout(),
  48111. .Q());
  48112. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .coord_x = 18;
  48113. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .coord_y = 8;
  48114. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .coord_z = 12;
  48115. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .mask = 16'h6666;
  48116. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .modeMux = 1'b0;
  48117. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .FeedbackMux = 1'b0;
  48118. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .ShiftMux = 1'b0;
  48119. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .BypassEn = 1'b0;
  48120. defparam \macro_inst|u_uart[1]|u_rx[4]|Add4~2 .CarryEnb = 1'b1;
  48121. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 (
  48122. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ),
  48123. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48124. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48125. .D(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48126. .Cin(),
  48127. .Qin(),
  48128. .Clk(),
  48129. .AsyncReset(),
  48130. .SyncReset(),
  48131. .ShiftData(),
  48132. .SyncLoad(),
  48133. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  48134. .Cout(),
  48135. .Q());
  48136. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .coord_x = 20;
  48137. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .coord_y = 11;
  48138. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .coord_z = 4;
  48139. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .mask = 16'h0200;
  48140. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .modeMux = 1'b0;
  48141. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .FeedbackMux = 1'b0;
  48142. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .ShiftMux = 1'b0;
  48143. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .BypassEn = 1'b0;
  48144. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~1 .CarryEnb = 1'b1;
  48145. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 (
  48146. .A(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  48147. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_sample~0_combout ),
  48148. .C(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48149. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ),
  48150. .Cin(),
  48151. .Qin(),
  48152. .Clk(),
  48153. .AsyncReset(),
  48154. .SyncReset(),
  48155. .ShiftData(),
  48156. .SyncLoad(),
  48157. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector0~2_combout ),
  48158. .Cout(),
  48159. .Q());
  48160. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .coord_x = 20;
  48161. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .coord_y = 10;
  48162. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .coord_z = 5;
  48163. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .mask = 16'h8000;
  48164. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .modeMux = 1'b0;
  48165. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .FeedbackMux = 1'b0;
  48166. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .ShiftMux = 1'b0;
  48167. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .BypassEn = 1'b0;
  48168. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~2 .CarryEnb = 1'b1;
  48169. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 (
  48170. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  48171. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector2~0_combout ),
  48172. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48173. .D(\macro_inst|u_uart[1]|u_rx[4]|always3~2_combout ),
  48174. .Cin(),
  48175. .Qin(),
  48176. .Clk(),
  48177. .AsyncReset(),
  48178. .SyncReset(),
  48179. .ShiftData(),
  48180. .SyncLoad(),
  48181. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector0~4_combout ),
  48182. .Cout(),
  48183. .Q());
  48184. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .coord_x = 19;
  48185. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .coord_y = 8;
  48186. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .coord_z = 9;
  48187. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .mask = 16'hF0E0;
  48188. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .modeMux = 1'b0;
  48189. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .FeedbackMux = 1'b0;
  48190. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .ShiftMux = 1'b0;
  48191. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .BypassEn = 1'b0;
  48192. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector0~4 .CarryEnb = 1'b1;
  48193. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 (
  48194. .A(vcc),
  48195. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector4~0_combout ),
  48196. .C(vcc),
  48197. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48198. .Cin(),
  48199. .Qin(),
  48200. .Clk(),
  48201. .AsyncReset(),
  48202. .SyncReset(),
  48203. .ShiftData(),
  48204. .SyncLoad(),
  48205. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector2~0_combout ),
  48206. .Cout(),
  48207. .Q());
  48208. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .coord_x = 20;
  48209. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .coord_y = 10;
  48210. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .coord_z = 3;
  48211. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .mask = 16'hCC00;
  48212. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .modeMux = 1'b0;
  48213. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .FeedbackMux = 1'b0;
  48214. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .ShiftMux = 1'b0;
  48215. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .BypassEn = 1'b0;
  48216. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~0 .CarryEnb = 1'b1;
  48217. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 (
  48218. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48219. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector0~4_combout ),
  48220. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  48221. .D(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  48222. .Cin(),
  48223. .Qin(),
  48224. .Clk(),
  48225. .AsyncReset(),
  48226. .SyncReset(),
  48227. .ShiftData(),
  48228. .SyncLoad(),
  48229. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector2~1_combout ),
  48230. .Cout(),
  48231. .Q());
  48232. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .coord_x = 20;
  48233. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .coord_y = 10;
  48234. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .coord_z = 0;
  48235. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .mask = 16'h2220;
  48236. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .modeMux = 1'b0;
  48237. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .FeedbackMux = 1'b0;
  48238. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .ShiftMux = 1'b0;
  48239. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .BypassEn = 1'b0;
  48240. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector2~1 .CarryEnb = 1'b1;
  48241. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 (
  48242. .A(\macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ),
  48243. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48244. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48245. .D(vcc),
  48246. .Cin(),
  48247. .Qin(),
  48248. .Clk(),
  48249. .AsyncReset(),
  48250. .SyncReset(),
  48251. .ShiftData(),
  48252. .SyncLoad(),
  48253. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector3~0_combout ),
  48254. .Cout(),
  48255. .Q());
  48256. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .coord_x = 19;
  48257. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .coord_y = 8;
  48258. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .coord_z = 3;
  48259. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .mask = 16'h8080;
  48260. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .modeMux = 1'b0;
  48261. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .FeedbackMux = 1'b0;
  48262. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .ShiftMux = 1'b0;
  48263. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .BypassEn = 1'b0;
  48264. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector3~0 .CarryEnb = 1'b1;
  48265. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 (
  48266. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3]),
  48267. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0]),
  48268. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48269. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48270. .Cin(),
  48271. .Qin(),
  48272. .Clk(),
  48273. .AsyncReset(),
  48274. .SyncReset(),
  48275. .ShiftData(),
  48276. .SyncLoad(),
  48277. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector4~0_combout ),
  48278. .Cout(),
  48279. .Q());
  48280. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .coord_x = 20;
  48281. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .coord_y = 10;
  48282. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .coord_z = 1;
  48283. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .mask = 16'h0001;
  48284. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .modeMux = 1'b0;
  48285. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .FeedbackMux = 1'b0;
  48286. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .ShiftMux = 1'b0;
  48287. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .BypassEn = 1'b0;
  48288. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~0 .CarryEnb = 1'b1;
  48289. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 (
  48290. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48291. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  48292. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ),
  48293. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector4~0_combout ),
  48294. .Cin(),
  48295. .Qin(),
  48296. .Clk(),
  48297. .AsyncReset(),
  48298. .SyncReset(),
  48299. .ShiftData(),
  48300. .SyncLoad(),
  48301. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector4~1_combout ),
  48302. .Cout(),
  48303. .Q());
  48304. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .coord_x = 20;
  48305. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .coord_y = 10;
  48306. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .coord_z = 15;
  48307. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .mask = 16'h8A88;
  48308. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .modeMux = 1'b0;
  48309. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .FeedbackMux = 1'b0;
  48310. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .ShiftMux = 1'b0;
  48311. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .BypassEn = 1'b0;
  48312. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~1 .CarryEnb = 1'b1;
  48313. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 (
  48314. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48315. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector4~2_combout ),
  48316. .C(\macro_inst|u_uart[1]|u_rx[4]|Selector4~1_combout ),
  48317. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  48318. .Cin(),
  48319. .Qin(),
  48320. .Clk(),
  48321. .AsyncReset(),
  48322. .SyncReset(),
  48323. .ShiftData(),
  48324. .SyncLoad(),
  48325. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector4~3_combout ),
  48326. .Cout(),
  48327. .Q());
  48328. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .coord_x = 20;
  48329. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .coord_y = 11;
  48330. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .coord_z = 7;
  48331. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .mask = 16'hABEE;
  48332. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .modeMux = 1'b0;
  48333. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .FeedbackMux = 1'b0;
  48334. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .ShiftMux = 1'b0;
  48335. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .BypassEn = 1'b0;
  48336. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~3 .CarryEnb = 1'b1;
  48337. alta_slice \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 (
  48338. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  48339. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector4~3_combout ),
  48340. .C(\macro_inst|u_uart[1]|u_rx[4]|Selector4~1_combout ),
  48341. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector3~0_combout ),
  48342. .Cin(),
  48343. .Qin(),
  48344. .Clk(),
  48345. .AsyncReset(),
  48346. .SyncReset(),
  48347. .ShiftData(),
  48348. .SyncLoad(),
  48349. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector4~4_combout ),
  48350. .Cout(),
  48351. .Q());
  48352. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .coord_x = 20;
  48353. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .coord_y = 11;
  48354. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .coord_z = 11;
  48355. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .mask = 16'hFFB1;
  48356. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .modeMux = 1'b0;
  48357. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .FeedbackMux = 1'b0;
  48358. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .ShiftMux = 1'b0;
  48359. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .BypassEn = 1'b0;
  48360. defparam \macro_inst|u_uart[1]|u_rx[4]|Selector4~4 .CarryEnb = 1'b1;
  48361. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always11~0 (
  48362. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6]),
  48363. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]),
  48364. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5]),
  48365. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4]),
  48366. .Cin(),
  48367. .Qin(),
  48368. .Clk(),
  48369. .AsyncReset(),
  48370. .SyncReset(),
  48371. .ShiftData(),
  48372. .SyncLoad(),
  48373. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always11~0_combout ),
  48374. .Cout(),
  48375. .Q());
  48376. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .coord_x = 20;
  48377. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .coord_y = 11;
  48378. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .coord_z = 13;
  48379. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .mask = 16'h0001;
  48380. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .modeMux = 1'b0;
  48381. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .FeedbackMux = 1'b0;
  48382. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .ShiftMux = 1'b0;
  48383. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .BypassEn = 1'b0;
  48384. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~0 .CarryEnb = 1'b1;
  48385. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always11~2 (
  48386. .A(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  48387. .B(\macro_inst|u_uart[1]|u_rx[4]|always11~1_combout ),
  48388. .C(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  48389. .D(\macro_inst|u_uart[1]|u_rx[4]|always11~0_combout ),
  48390. .Cin(),
  48391. .Qin(),
  48392. .Clk(),
  48393. .AsyncReset(),
  48394. .SyncReset(),
  48395. .ShiftData(),
  48396. .SyncLoad(),
  48397. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always11~2_combout ),
  48398. .Cout(),
  48399. .Q());
  48400. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .coord_x = 20;
  48401. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .coord_y = 11;
  48402. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .coord_z = 10;
  48403. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .mask = 16'h0800;
  48404. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .modeMux = 1'b0;
  48405. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .FeedbackMux = 1'b0;
  48406. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .ShiftMux = 1'b0;
  48407. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .BypassEn = 1'b0;
  48408. defparam \macro_inst|u_uart[1]|u_rx[4]|always11~2 .CarryEnb = 1'b1;
  48409. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always2~0 (
  48410. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  48411. .B(vcc),
  48412. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3]),
  48413. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0]),
  48414. .Cin(),
  48415. .Qin(),
  48416. .Clk(),
  48417. .AsyncReset(),
  48418. .SyncReset(),
  48419. .ShiftData(),
  48420. .SyncLoad(),
  48421. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48422. .Cout(),
  48423. .Q());
  48424. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .coord_x = 20;
  48425. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .coord_y = 10;
  48426. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .coord_z = 12;
  48427. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .mask = 16'hA000;
  48428. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .modeMux = 1'b0;
  48429. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .FeedbackMux = 1'b0;
  48430. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .ShiftMux = 1'b0;
  48431. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .BypassEn = 1'b0;
  48432. defparam \macro_inst|u_uart[1]|u_rx[4]|always2~0 .CarryEnb = 1'b1;
  48433. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always3~1 (
  48434. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [3]),
  48435. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2]),
  48436. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]),
  48437. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]),
  48438. .Cin(),
  48439. .Qin(),
  48440. .Clk(),
  48441. .AsyncReset(),
  48442. .SyncReset(),
  48443. .ShiftData(),
  48444. .SyncLoad(),
  48445. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ),
  48446. .Cout(),
  48447. .Q());
  48448. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .coord_x = 19;
  48449. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .coord_y = 10;
  48450. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .coord_z = 0;
  48451. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .mask = 16'h0001;
  48452. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .modeMux = 1'b0;
  48453. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .FeedbackMux = 1'b0;
  48454. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .ShiftMux = 1'b0;
  48455. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .BypassEn = 1'b0;
  48456. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~1 .CarryEnb = 1'b1;
  48457. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always3~2 (
  48458. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48459. .B(vcc),
  48460. .C(\macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ),
  48461. .D(vcc),
  48462. .Cin(),
  48463. .Qin(),
  48464. .Clk(),
  48465. .AsyncReset(),
  48466. .SyncReset(),
  48467. .ShiftData(),
  48468. .SyncLoad(),
  48469. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always3~2_combout ),
  48470. .Cout(),
  48471. .Q());
  48472. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .coord_x = 19;
  48473. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .coord_y = 8;
  48474. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .coord_z = 7;
  48475. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .mask = 16'hA0A0;
  48476. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .modeMux = 1'b0;
  48477. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .FeedbackMux = 1'b0;
  48478. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .ShiftMux = 1'b0;
  48479. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .BypassEn = 1'b0;
  48480. defparam \macro_inst|u_uart[1]|u_rx[4]|always3~2 .CarryEnb = 1'b1;
  48481. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always4~2 (
  48482. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48483. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48484. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48485. .D(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48486. .Cin(),
  48487. .Qin(),
  48488. .Clk(),
  48489. .AsyncReset(),
  48490. .SyncReset(),
  48491. .ShiftData(),
  48492. .SyncLoad(),
  48493. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always4~2_combout ),
  48494. .Cout(),
  48495. .Q());
  48496. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .coord_x = 20;
  48497. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .coord_y = 11;
  48498. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .coord_z = 15;
  48499. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .mask = 16'h0200;
  48500. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .modeMux = 1'b0;
  48501. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .FeedbackMux = 1'b0;
  48502. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .ShiftMux = 1'b0;
  48503. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .BypassEn = 1'b0;
  48504. defparam \macro_inst|u_uart[1]|u_rx[4]|always4~2 .CarryEnb = 1'b1;
  48505. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always6~1 (
  48506. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  48507. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_in [4]),
  48508. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_in [2]),
  48509. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_in [3]),
  48510. .Cin(),
  48511. .Qin(),
  48512. .Clk(),
  48513. .AsyncReset(),
  48514. .SyncReset(),
  48515. .ShiftData(),
  48516. .SyncLoad(),
  48517. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout ),
  48518. .Cout(),
  48519. .Q());
  48520. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .coord_x = 19;
  48521. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .coord_y = 2;
  48522. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .coord_z = 15;
  48523. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .mask = 16'h5110;
  48524. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .modeMux = 1'b0;
  48525. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .FeedbackMux = 1'b0;
  48526. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .ShiftMux = 1'b0;
  48527. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .BypassEn = 1'b0;
  48528. defparam \macro_inst|u_uart[1]|u_rx[4]|always6~1 .CarryEnb = 1'b1;
  48529. alta_slice \macro_inst|u_uart[1]|u_rx[4]|always8~0 (
  48530. .A(\macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ),
  48531. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  48532. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48533. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~q ),
  48534. .Cin(),
  48535. .Qin(),
  48536. .Clk(),
  48537. .AsyncReset(),
  48538. .SyncReset(),
  48539. .ShiftData(),
  48540. .SyncLoad(),
  48541. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always8~0_combout ),
  48542. .Cout(),
  48543. .Q());
  48544. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .coord_x = 19;
  48545. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .coord_y = 8;
  48546. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .coord_z = 0;
  48547. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .mask = 16'h2000;
  48548. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .modeMux = 1'b0;
  48549. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .FeedbackMux = 1'b0;
  48550. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .ShiftMux = 1'b0;
  48551. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .BypassEn = 1'b0;
  48552. defparam \macro_inst|u_uart[1]|u_rx[4]|always8~0 .CarryEnb = 1'b1;
  48553. alta_slice \macro_inst|u_uart[1]|u_rx[4]|break_error (
  48554. .A(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  48555. .B(\macro_inst|u_uart[1]|u_rx[4]|always11~2_combout ),
  48556. .C(vcc),
  48557. .D(vcc),
  48558. .Cin(),
  48559. .Qin(\macro_inst|u_uart[1]|u_rx[4]|break_error~q ),
  48560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  48561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  48562. .SyncReset(),
  48563. .ShiftData(),
  48564. .SyncLoad(),
  48565. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|break_error~0_combout ),
  48566. .Cout(),
  48567. .Q(\macro_inst|u_uart[1]|u_rx[4]|break_error~q ));
  48568. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .coord_x = 20;
  48569. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .coord_y = 8;
  48570. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .coord_z = 7;
  48571. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .mask = 16'hECEC;
  48572. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .modeMux = 1'b0;
  48573. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .FeedbackMux = 1'b1;
  48574. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .ShiftMux = 1'b0;
  48575. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .BypassEn = 1'b0;
  48576. defparam \macro_inst|u_uart[1]|u_rx[4]|break_error .CarryEnb = 1'b1;
  48577. alta_slice \macro_inst|u_uart[1]|u_rx[4]|framing_error (
  48578. .A(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  48579. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  48580. .C(vcc),
  48581. .D(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  48582. .Cin(),
  48583. .Qin(\macro_inst|u_uart[1]|u_rx[4]|framing_error~q ),
  48584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  48585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  48586. .SyncReset(),
  48587. .ShiftData(),
  48588. .SyncLoad(),
  48589. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|framing_error~0_combout ),
  48590. .Cout(),
  48591. .Q(\macro_inst|u_uart[1]|u_rx[4]|framing_error~q ));
  48592. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .coord_x = 20;
  48593. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .coord_y = 8;
  48594. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .coord_z = 6;
  48595. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .mask = 16'hA0EC;
  48596. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .modeMux = 1'b0;
  48597. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .FeedbackMux = 1'b1;
  48598. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .ShiftMux = 1'b0;
  48599. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .BypassEn = 1'b0;
  48600. defparam \macro_inst|u_uart[1]|u_rx[4]|framing_error .CarryEnb = 1'b1;
  48601. alta_slice \macro_inst|u_uart[1]|u_rx[4]|overrun_error (
  48602. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  48603. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  48604. .C(vcc),
  48605. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  48606. .Cin(),
  48607. .Qin(\macro_inst|u_uart[1]|u_rx[4]|overrun_error~q ),
  48608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  48609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  48610. .SyncReset(),
  48611. .ShiftData(),
  48612. .SyncLoad(),
  48613. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|overrun_error~0_combout ),
  48614. .Cout(),
  48615. .Q(\macro_inst|u_uart[1]|u_rx[4]|overrun_error~q ));
  48616. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .coord_x = 17;
  48617. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .coord_y = 8;
  48618. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .coord_z = 7;
  48619. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .mask = 16'hF888;
  48620. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .modeMux = 1'b0;
  48621. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .FeedbackMux = 1'b1;
  48622. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .ShiftMux = 1'b0;
  48623. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .BypassEn = 1'b0;
  48624. defparam \macro_inst|u_uart[1]|u_rx[4]|overrun_error .CarryEnb = 1'b1;
  48625. alta_slice \macro_inst|u_uart[1]|u_rx[4]|parity_error (
  48626. .A(\macro_inst|u_uart[1]|u_rx[4]|parity_error~0_combout ),
  48627. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_sample~0_combout ),
  48628. .C(vcc),
  48629. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  48630. .Cin(),
  48631. .Qin(\macro_inst|u_uart[1]|u_rx[4]|parity_error~q ),
  48632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  48633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  48634. .SyncReset(),
  48635. .ShiftData(),
  48636. .SyncLoad(),
  48637. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|parity_error~1_combout ),
  48638. .Cout(),
  48639. .Q(\macro_inst|u_uart[1]|u_rx[4]|parity_error~q ));
  48640. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .coord_x = 20;
  48641. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .coord_y = 8;
  48642. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .coord_z = 10;
  48643. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .mask = 16'hF888;
  48644. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .modeMux = 1'b0;
  48645. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .FeedbackMux = 1'b1;
  48646. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .ShiftMux = 1'b0;
  48647. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .BypassEn = 1'b0;
  48648. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error .CarryEnb = 1'b1;
  48649. alta_slice \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 (
  48650. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  48651. .B(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48652. .C(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  48653. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~q ),
  48654. .Cin(),
  48655. .Qin(),
  48656. .Clk(),
  48657. .AsyncReset(),
  48658. .SyncReset(),
  48659. .ShiftData(),
  48660. .SyncLoad(),
  48661. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|parity_error~0_combout ),
  48662. .Cout(),
  48663. .Q());
  48664. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .coord_x = 20;
  48665. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .coord_y = 8;
  48666. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .coord_z = 8;
  48667. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .mask = 16'h0880;
  48668. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .modeMux = 1'b0;
  48669. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .FeedbackMux = 1'b0;
  48670. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .ShiftMux = 1'b0;
  48671. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .BypassEn = 1'b0;
  48672. defparam \macro_inst|u_uart[1]|u_rx[4]|parity_error~0 .CarryEnb = 1'b1;
  48673. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] (
  48674. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0]),
  48675. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  48676. .C(\~GND~combout ),
  48677. .D(vcc),
  48678. .Cin(),
  48679. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0]),
  48680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  48681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  48682. .SyncReset(SyncReset_X58_Y12_GND),
  48683. .ShiftData(),
  48684. .SyncLoad(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ),
  48685. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0]~4_combout ),
  48686. .Cout(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0]~5 ),
  48687. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [0]));
  48688. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .coord_x = 20;
  48689. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .coord_y = 10;
  48690. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .coord_z = 7;
  48691. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .mask = 16'h6688;
  48692. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .modeMux = 1'b0;
  48693. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  48694. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  48695. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .BypassEn = 1'b1;
  48696. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  48697. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] (
  48698. .A(vcc),
  48699. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48700. .C(vcc),
  48701. .D(vcc),
  48702. .Cin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[0]~5 ),
  48703. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  48705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  48706. .SyncReset(SyncReset_X58_Y12_GND),
  48707. .ShiftData(),
  48708. .SyncLoad(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ),
  48709. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1]~6_combout ),
  48710. .Cout(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1]~7 ),
  48711. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]));
  48712. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .coord_x = 20;
  48713. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .coord_y = 10;
  48714. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .coord_z = 8;
  48715. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .mask = 16'h3C3F;
  48716. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .modeMux = 1'b1;
  48717. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  48718. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  48719. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .BypassEn = 1'b1;
  48720. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  48721. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] (
  48722. .A(vcc),
  48723. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48724. .C(\~GND~combout ),
  48725. .D(vcc),
  48726. .Cin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[1]~7 ),
  48727. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  48729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  48730. .SyncReset(SyncReset_X58_Y12_GND),
  48731. .ShiftData(),
  48732. .SyncLoad(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ),
  48733. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2]~8_combout ),
  48734. .Cout(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2]~9 ),
  48735. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]));
  48736. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .coord_x = 20;
  48737. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .coord_y = 10;
  48738. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .coord_z = 9;
  48739. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .mask = 16'hC30C;
  48740. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .modeMux = 1'b1;
  48741. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  48742. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  48743. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .BypassEn = 1'b1;
  48744. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  48745. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] (
  48746. .A(vcc),
  48747. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3]),
  48748. .C(\~GND~combout ),
  48749. .D(vcc),
  48750. .Cin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[2]~9 ),
  48751. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3]),
  48752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  48753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  48754. .SyncReset(SyncReset_X58_Y12_GND),
  48755. .ShiftData(),
  48756. .SyncLoad(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ),
  48757. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3]~10_combout ),
  48758. .Cout(),
  48759. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [3]));
  48760. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .coord_x = 20;
  48761. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .coord_y = 10;
  48762. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .coord_z = 10;
  48763. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .mask = 16'h3C3C;
  48764. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .modeMux = 1'b1;
  48765. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  48766. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  48767. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .BypassEn = 1'b1;
  48768. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  48769. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_bit (
  48770. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  48771. .B(vcc),
  48772. .C(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  48773. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  48774. .Cin(),
  48775. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  48777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  48778. .SyncReset(),
  48779. .ShiftData(),
  48780. .SyncLoad(),
  48781. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always2~1_combout ),
  48782. .Cout(),
  48783. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ));
  48784. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .coord_x = 20;
  48785. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .coord_y = 10;
  48786. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .coord_z = 4;
  48787. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .mask = 16'hA000;
  48788. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .modeMux = 1'b0;
  48789. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .FeedbackMux = 1'b0;
  48790. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .ShiftMux = 1'b0;
  48791. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .BypassEn = 1'b0;
  48792. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_bit .CarryEnb = 1'b1;
  48793. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] (
  48794. .A(\macro_inst|u_uart[1]|u_rx[4]|always3~2_combout ),
  48795. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48796. .C(vcc),
  48797. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  48798. .Cin(),
  48799. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]),
  48800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout_X59_Y9_SIG_SIG ),
  48801. .AsyncReset(AsyncReset_X59_Y9_GND),
  48802. .SyncReset(),
  48803. .ShiftData(),
  48804. .SyncLoad(),
  48805. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~4_combout ),
  48806. .Cout(),
  48807. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [0]));
  48808. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .coord_x = 19;
  48809. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .coord_y = 10;
  48810. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .coord_z = 7;
  48811. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .mask = 16'hCDCF;
  48812. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .modeMux = 1'b0;
  48813. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  48814. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .ShiftMux = 1'b0;
  48815. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .BypassEn = 1'b0;
  48816. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0] .CarryEnb = 1'b1;
  48817. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 (
  48818. .A(vcc),
  48819. .B(vcc),
  48820. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48821. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48822. .Cin(),
  48823. .Qin(),
  48824. .Clk(),
  48825. .AsyncReset(),
  48826. .SyncReset(),
  48827. .ShiftData(),
  48828. .SyncLoad(),
  48829. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout ),
  48830. .Cout(),
  48831. .Q());
  48832. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .coord_x = 19;
  48833. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .coord_y = 10;
  48834. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .coord_z = 2;
  48835. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .mask = 16'hFFF0;
  48836. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .modeMux = 1'b0;
  48837. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .FeedbackMux = 1'b0;
  48838. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .ShiftMux = 1'b0;
  48839. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .BypassEn = 1'b0;
  48840. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3 .CarryEnb = 1'b1;
  48841. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] (
  48842. .A(\macro_inst|u_uart[1]|u_rx[4]|always3~2_combout ),
  48843. .B(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  48844. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48845. .D(\macro_inst|u_uart[1]|u_rx[4]|Add4~2_combout ),
  48846. .Cin(),
  48847. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]),
  48848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout_X59_Y9_SIG_SIG ),
  48849. .AsyncReset(AsyncReset_X59_Y9_GND),
  48850. .SyncReset(),
  48851. .ShiftData(),
  48852. .SyncLoad(),
  48853. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~5_combout ),
  48854. .Cout(),
  48855. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [1]));
  48856. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .coord_x = 19;
  48857. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .coord_y = 10;
  48858. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .coord_z = 6;
  48859. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .mask = 16'hF8FD;
  48860. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .modeMux = 1'b0;
  48861. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  48862. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .ShiftMux = 1'b0;
  48863. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .BypassEn = 1'b0;
  48864. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[1] .CarryEnb = 1'b1;
  48865. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] (
  48866. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48867. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  48868. .C(\macro_inst|u_uart[1]|u_rx[4]|always3~1_combout ),
  48869. .D(\macro_inst|u_uart[1]|u_rx[4]|Add4~1_combout ),
  48870. .Cin(),
  48871. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2]),
  48872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[0]~3_combout_X59_Y9_SIG_SIG ),
  48873. .AsyncReset(AsyncReset_X59_Y9_GND),
  48874. .SyncReset(),
  48875. .ShiftData(),
  48876. .SyncLoad(),
  48877. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~2_combout ),
  48878. .Cout(),
  48879. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [2]));
  48880. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .coord_x = 19;
  48881. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .coord_y = 10;
  48882. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .coord_z = 15;
  48883. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .mask = 16'hAABF;
  48884. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .modeMux = 1'b0;
  48885. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  48886. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .ShiftMux = 1'b0;
  48887. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .BypassEn = 1'b0;
  48888. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[2] .CarryEnb = 1'b1;
  48889. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] (
  48890. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  48891. .B(\macro_inst|u_uart[1]|u_rx[4]|Add4~0_combout ),
  48892. .C(vcc),
  48893. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  48894. .Cin(),
  48895. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [3]),
  48896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y9_SIG_VCC ),
  48897. .AsyncReset(AsyncReset_X59_Y9_GND),
  48898. .SyncReset(),
  48899. .ShiftData(),
  48900. .SyncLoad(),
  48901. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt~1_combout ),
  48902. .Cout(),
  48903. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt [3]));
  48904. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .coord_x = 19;
  48905. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .coord_y = 10;
  48906. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .coord_z = 12;
  48907. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .mask = 16'h1150;
  48908. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .modeMux = 1'b0;
  48909. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  48910. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .ShiftMux = 1'b0;
  48911. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .BypassEn = 1'b0;
  48912. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_data_cnt[3] .CarryEnb = 1'b1;
  48913. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] (
  48914. .A(vcc),
  48915. .B(\macro_inst|u_uart[1]|u_regs|rx_read [4]),
  48916. .C(vcc),
  48917. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  48918. .Cin(),
  48919. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  48920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y9_SIG_VCC ),
  48921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y9_SIG ),
  48922. .SyncReset(),
  48923. .ShiftData(),
  48924. .SyncLoad(),
  48925. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter~0_combout ),
  48926. .Cout(),
  48927. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]));
  48928. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .coord_x = 19;
  48929. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .coord_y = 10;
  48930. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .coord_z = 4;
  48931. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .mask = 16'h3F30;
  48932. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .modeMux = 1'b0;
  48933. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  48934. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  48935. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .BypassEn = 1'b0;
  48936. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  48937. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] (
  48938. .A(vcc),
  48939. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~q ),
  48940. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [0]),
  48941. .D(\macro_inst|u_ahb2apb|paddr [8]),
  48942. .Cin(),
  48943. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0]~q ),
  48944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  48945. .AsyncReset(AsyncReset_X59_Y11_GND),
  48946. .SyncReset(SyncReset_X59_Y11_GND),
  48947. .ShiftData(),
  48948. .SyncLoad(SyncLoad_X59_Y11_VCC),
  48949. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux0~2_combout ),
  48950. .Cout(),
  48951. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0]~q ));
  48952. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .coord_x = 19;
  48953. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .coord_y = 11;
  48954. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .coord_z = 1;
  48955. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .mask = 16'hCCF0;
  48956. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  48957. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b1;
  48958. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  48959. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .BypassEn = 1'b1;
  48960. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  48961. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] (
  48962. .A(vcc),
  48963. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~q ),
  48964. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1]),
  48965. .D(\macro_inst|u_ahb2apb|paddr [8]),
  48966. .Cin(),
  48967. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1]~q ),
  48968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  48969. .AsyncReset(AsyncReset_X59_Y11_GND),
  48970. .SyncReset(SyncReset_X59_Y11_GND),
  48971. .ShiftData(),
  48972. .SyncLoad(SyncLoad_X59_Y11_VCC),
  48973. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux1~2_combout ),
  48974. .Cout(),
  48975. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1]~q ));
  48976. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .coord_x = 19;
  48977. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .coord_y = 11;
  48978. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .coord_z = 4;
  48979. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .mask = 16'hCCF0;
  48980. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  48981. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b1;
  48982. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  48983. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .BypassEn = 1'b1;
  48984. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  48985. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] (
  48986. .A(vcc),
  48987. .B(\macro_inst|u_ahb2apb|paddr [8]),
  48988. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2]),
  48989. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2]~q ),
  48990. .Cin(),
  48991. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2]~q ),
  48992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  48993. .AsyncReset(AsyncReset_X59_Y11_GND),
  48994. .SyncReset(SyncReset_X59_Y11_GND),
  48995. .ShiftData(),
  48996. .SyncLoad(SyncLoad_X59_Y11_VCC),
  48997. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux2~2_combout ),
  48998. .Cout(),
  48999. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2]~q ));
  49000. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .coord_x = 19;
  49001. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .coord_y = 11;
  49002. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .coord_z = 7;
  49003. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .mask = 16'hFC30;
  49004. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .modeMux = 1'b0;
  49005. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b1;
  49006. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  49007. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  49008. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  49009. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] (
  49010. .A(vcc),
  49011. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~q ),
  49012. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [3]),
  49013. .D(\macro_inst|u_ahb2apb|paddr [8]),
  49014. .Cin(),
  49015. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3]~q ),
  49016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  49017. .AsyncReset(AsyncReset_X59_Y11_GND),
  49018. .SyncReset(SyncReset_X59_Y11_GND),
  49019. .ShiftData(),
  49020. .SyncLoad(SyncLoad_X59_Y11_VCC),
  49021. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux3~2_combout ),
  49022. .Cout(),
  49023. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3]~q ));
  49024. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .coord_x = 19;
  49025. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .coord_y = 11;
  49026. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .coord_z = 6;
  49027. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .mask = 16'hCCF0;
  49028. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  49029. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b1;
  49030. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  49031. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .BypassEn = 1'b1;
  49032. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  49033. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] (
  49034. .A(vcc),
  49035. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~q ),
  49036. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4]),
  49037. .D(\macro_inst|u_ahb2apb|paddr [8]),
  49038. .Cin(),
  49039. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4]~q ),
  49040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  49041. .AsyncReset(AsyncReset_X59_Y11_GND),
  49042. .SyncReset(SyncReset_X59_Y11_GND),
  49043. .ShiftData(),
  49044. .SyncLoad(SyncLoad_X59_Y11_VCC),
  49045. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux4~2_combout ),
  49046. .Cout(),
  49047. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4]~q ));
  49048. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .coord_x = 19;
  49049. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .coord_y = 11;
  49050. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .coord_z = 13;
  49051. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .mask = 16'hCCF0;
  49052. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  49053. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b1;
  49054. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  49055. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .BypassEn = 1'b1;
  49056. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  49057. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] (
  49058. .A(vcc),
  49059. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~q ),
  49060. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5]),
  49061. .D(\macro_inst|u_ahb2apb|paddr [8]),
  49062. .Cin(),
  49063. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5]~q ),
  49064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  49065. .AsyncReset(AsyncReset_X59_Y11_GND),
  49066. .SyncReset(SyncReset_X59_Y11_GND),
  49067. .ShiftData(),
  49068. .SyncLoad(SyncLoad_X59_Y11_VCC),
  49069. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux5~2_combout ),
  49070. .Cout(),
  49071. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5]~q ));
  49072. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .coord_x = 19;
  49073. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .coord_y = 11;
  49074. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .coord_z = 14;
  49075. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .mask = 16'hCCF0;
  49076. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  49077. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b1;
  49078. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  49079. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .BypassEn = 1'b1;
  49080. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  49081. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] (
  49082. .A(vcc),
  49083. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~q ),
  49084. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6]),
  49085. .D(\macro_inst|u_ahb2apb|paddr [8]),
  49086. .Cin(),
  49087. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6]~q ),
  49088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  49089. .AsyncReset(AsyncReset_X59_Y11_GND),
  49090. .SyncReset(SyncReset_X59_Y11_GND),
  49091. .ShiftData(),
  49092. .SyncLoad(SyncLoad_X59_Y11_VCC),
  49093. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux6~2_combout ),
  49094. .Cout(),
  49095. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6]~q ));
  49096. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .coord_x = 19;
  49097. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .coord_y = 11;
  49098. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .coord_z = 10;
  49099. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .mask = 16'hCCF0;
  49100. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  49101. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b1;
  49102. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  49103. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .BypassEn = 1'b1;
  49104. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  49105. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] (
  49106. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7]~q ),
  49107. .B(vcc),
  49108. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]),
  49109. .D(\macro_inst|u_ahb2apb|paddr [8]),
  49110. .Cin(),
  49111. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7]~q ),
  49112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  49113. .AsyncReset(AsyncReset_X59_Y11_GND),
  49114. .SyncReset(SyncReset_X59_Y11_GND),
  49115. .ShiftData(),
  49116. .SyncLoad(SyncLoad_X59_Y11_VCC),
  49117. .LutOut(\macro_inst|u_uart[1]|u_regs|Mux7~2_combout ),
  49118. .Cout(),
  49119. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7]~q ));
  49120. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .coord_x = 19;
  49121. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .coord_y = 11;
  49122. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .coord_z = 2;
  49123. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .mask = 16'hAAF0;
  49124. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .modeMux = 1'b0;
  49125. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b1;
  49126. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  49127. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  49128. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  49129. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 (
  49130. .A(\macro_inst|u_uart[1]|u_rx[4]|always2~0_combout ),
  49131. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  49132. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ),
  49133. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_sample~0_combout ),
  49134. .Cin(),
  49135. .Qin(),
  49136. .Clk(),
  49137. .AsyncReset(),
  49138. .SyncReset(),
  49139. .ShiftData(),
  49140. .SyncLoad(),
  49141. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0_combout ),
  49142. .Cout(),
  49143. .Q());
  49144. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .coord_x = 20;
  49145. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .coord_y = 10;
  49146. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .coord_z = 14;
  49147. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .mask = 16'h2000;
  49148. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  49149. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  49150. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  49151. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  49152. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  49153. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_idle (
  49154. .A(vcc),
  49155. .B(\macro_inst|u_uart[1]|u_rx[4]|always8~0_combout ),
  49156. .C(vcc),
  49157. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  49158. .Cin(),
  49159. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_idle~q ),
  49160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  49161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  49162. .SyncReset(),
  49163. .ShiftData(),
  49164. .SyncLoad(),
  49165. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_idle~0_combout ),
  49166. .Cout(),
  49167. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_idle~q ));
  49168. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .coord_x = 17;
  49169. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .coord_y = 8;
  49170. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .coord_z = 1;
  49171. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .mask = 16'hFCCC;
  49172. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .modeMux = 1'b0;
  49173. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .FeedbackMux = 1'b1;
  49174. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .ShiftMux = 1'b0;
  49175. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .BypassEn = 1'b0;
  49176. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle .CarryEnb = 1'b1;
  49177. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en (
  49178. .A(vcc),
  49179. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_fifo|counter [0]),
  49180. .C(vcc),
  49181. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  49182. .Cin(),
  49183. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~q ),
  49184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  49185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  49186. .SyncReset(),
  49187. .ShiftData(),
  49188. .SyncLoad(),
  49189. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~0_combout ),
  49190. .Cout(),
  49191. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_idle_en~q ));
  49192. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .coord_x = 20;
  49193. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .coord_y = 8;
  49194. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .coord_z = 11;
  49195. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .mask = 16'hFCCC;
  49196. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .modeMux = 1'b0;
  49197. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .FeedbackMux = 1'b1;
  49198. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .ShiftMux = 1'b0;
  49199. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .BypassEn = 1'b0;
  49200. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_idle_en .CarryEnb = 1'b1;
  49201. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] (
  49202. .A(vcc),
  49203. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [1]),
  49204. .C(\macro_inst|uart_rxd [10]),
  49205. .D(\macro_inst|u_uart[1]|u_rx[1]|rx_data_cnt [0]),
  49206. .Cin(),
  49207. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_in [0]),
  49208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  49209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  49210. .SyncReset(SyncReset_X53_Y4_GND),
  49211. .ShiftData(),
  49212. .SyncLoad(SyncLoad_X53_Y4_VCC),
  49213. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|Add4~2_combout ),
  49214. .Cout(),
  49215. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_in [0]));
  49216. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .coord_x = 18;
  49217. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .coord_y = 2;
  49218. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .coord_z = 10;
  49219. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .mask = 16'h33CC;
  49220. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .modeMux = 1'b0;
  49221. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .FeedbackMux = 1'b0;
  49222. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .ShiftMux = 1'b0;
  49223. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .BypassEn = 1'b1;
  49224. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[0] .CarryEnb = 1'b1;
  49225. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] (
  49226. .A(),
  49227. .B(),
  49228. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_in [0]),
  49229. .D(),
  49230. .Cin(),
  49231. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_in [1]),
  49232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  49233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  49234. .SyncReset(SyncReset_X53_Y4_GND),
  49235. .ShiftData(),
  49236. .SyncLoad(SyncLoad_X53_Y4_VCC),
  49237. .LutOut(),
  49238. .Cout(),
  49239. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_in [1]));
  49240. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .coord_x = 18;
  49241. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .coord_y = 2;
  49242. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .coord_z = 15;
  49243. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .mask = 16'hFFFF;
  49244. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .modeMux = 1'b1;
  49245. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .FeedbackMux = 1'b0;
  49246. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .ShiftMux = 1'b0;
  49247. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .BypassEn = 1'b1;
  49248. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[1] .CarryEnb = 1'b1;
  49249. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] (
  49250. .A(vcc),
  49251. .B(vcc),
  49252. .C(vcc),
  49253. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_in [1]),
  49254. .Cin(),
  49255. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_in [2]),
  49256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  49257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  49258. .SyncReset(),
  49259. .ShiftData(),
  49260. .SyncLoad(),
  49261. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_in[2]~feeder_combout ),
  49262. .Cout(),
  49263. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_in [2]));
  49264. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .coord_x = 18;
  49265. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .coord_y = 2;
  49266. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .coord_z = 0;
  49267. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .mask = 16'hFF00;
  49268. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .modeMux = 1'b0;
  49269. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .FeedbackMux = 1'b0;
  49270. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .ShiftMux = 1'b0;
  49271. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .BypassEn = 1'b0;
  49272. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[2] .CarryEnb = 1'b1;
  49273. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] (
  49274. .A(),
  49275. .B(),
  49276. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_in [2]),
  49277. .D(),
  49278. .Cin(),
  49279. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_in [3]),
  49280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  49281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  49282. .SyncReset(SyncReset_X53_Y4_GND),
  49283. .ShiftData(),
  49284. .SyncLoad(SyncLoad_X53_Y4_VCC),
  49285. .LutOut(),
  49286. .Cout(),
  49287. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_in [3]));
  49288. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .coord_x = 18;
  49289. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .coord_y = 2;
  49290. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .coord_z = 12;
  49291. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .mask = 16'hFFFF;
  49292. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .modeMux = 1'b1;
  49293. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .FeedbackMux = 1'b0;
  49294. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .ShiftMux = 1'b0;
  49295. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .BypassEn = 1'b1;
  49296. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[3] .CarryEnb = 1'b1;
  49297. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] (
  49298. .A(vcc),
  49299. .B(vcc),
  49300. .C(vcc),
  49301. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_in [3]),
  49302. .Cin(),
  49303. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_in [4]),
  49304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X53_Y4_SIG_SIG ),
  49305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X53_Y4_SIG ),
  49306. .SyncReset(),
  49307. .ShiftData(),
  49308. .SyncLoad(),
  49309. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_in[4]~0_combout ),
  49310. .Cout(),
  49311. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_in [4]));
  49312. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .coord_x = 18;
  49313. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .coord_y = 2;
  49314. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .coord_z = 13;
  49315. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .mask = 16'h00FF;
  49316. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .modeMux = 1'b0;
  49317. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .FeedbackMux = 1'b0;
  49318. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .ShiftMux = 1'b0;
  49319. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .BypassEn = 1'b0;
  49320. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_in[4] .CarryEnb = 1'b1;
  49321. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_parity (
  49322. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~0_combout ),
  49323. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  49324. .C(vcc),
  49325. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  49326. .Cin(),
  49327. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~q ),
  49328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  49329. .AsyncReset(AsyncReset_X58_Y8_GND),
  49330. .SyncReset(),
  49331. .ShiftData(),
  49332. .SyncLoad(),
  49333. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~1_combout ),
  49334. .Cout(),
  49335. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~q ));
  49336. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .coord_x = 20;
  49337. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .coord_y = 8;
  49338. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .coord_z = 13;
  49339. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .mask = 16'h12DE;
  49340. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .modeMux = 1'b0;
  49341. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .FeedbackMux = 1'b1;
  49342. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .ShiftMux = 1'b0;
  49343. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .BypassEn = 1'b0;
  49344. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity .CarryEnb = 1'b1;
  49345. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 (
  49346. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  49347. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]),
  49348. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  49349. .D(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  49350. .Cin(),
  49351. .Qin(),
  49352. .Clk(),
  49353. .AsyncReset(),
  49354. .SyncReset(),
  49355. .ShiftData(),
  49356. .SyncLoad(),
  49357. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_parity~0_combout ),
  49358. .Cout(),
  49359. .Q());
  49360. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .coord_x = 19;
  49361. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .coord_y = 8;
  49362. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .coord_z = 2;
  49363. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .mask = 16'h0080;
  49364. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .modeMux = 1'b0;
  49365. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .FeedbackMux = 1'b0;
  49366. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .ShiftMux = 1'b0;
  49367. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .BypassEn = 1'b0;
  49368. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_parity~0 .CarryEnb = 1'b1;
  49369. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 (
  49370. .A(vcc),
  49371. .B(vcc),
  49372. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [1]),
  49373. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_baud_cnt [2]),
  49374. .Cin(),
  49375. .Qin(),
  49376. .Clk(),
  49377. .AsyncReset(),
  49378. .SyncReset(),
  49379. .ShiftData(),
  49380. .SyncLoad(),
  49381. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_sample~0_combout ),
  49382. .Cout(),
  49383. .Q());
  49384. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .coord_x = 20;
  49385. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .coord_y = 10;
  49386. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .coord_z = 11;
  49387. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .mask = 16'h000F;
  49388. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .modeMux = 1'b0;
  49389. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .FeedbackMux = 1'b0;
  49390. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .ShiftMux = 1'b0;
  49391. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .BypassEn = 1'b0;
  49392. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_sample~0 .CarryEnb = 1'b1;
  49393. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] (
  49394. .A(vcc),
  49395. .B(vcc),
  49396. .C(vcc),
  49397. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1]),
  49398. .Cin(),
  49399. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [0]),
  49400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49402. .SyncReset(),
  49403. .ShiftData(),
  49404. .SyncLoad(),
  49405. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0]~feeder_combout ),
  49406. .Cout(),
  49407. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [0]));
  49408. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .coord_x = 20;
  49409. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .coord_y = 11;
  49410. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .coord_z = 14;
  49411. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .mask = 16'hFF00;
  49412. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .modeMux = 1'b0;
  49413. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .FeedbackMux = 1'b0;
  49414. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .ShiftMux = 1'b0;
  49415. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .BypassEn = 1'b0;
  49416. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[0] .CarryEnb = 1'b1;
  49417. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] (
  49418. .A(vcc),
  49419. .B(vcc),
  49420. .C(vcc),
  49421. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2]),
  49422. .Cin(),
  49423. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1]),
  49424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49426. .SyncReset(),
  49427. .ShiftData(),
  49428. .SyncLoad(),
  49429. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1]~feeder_combout ),
  49430. .Cout(),
  49431. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1]));
  49432. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .coord_x = 20;
  49433. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .coord_y = 11;
  49434. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .coord_z = 3;
  49435. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .mask = 16'hFF00;
  49436. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .modeMux = 1'b0;
  49437. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  49438. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .ShiftMux = 1'b0;
  49439. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .BypassEn = 1'b0;
  49440. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[1] .CarryEnb = 1'b1;
  49441. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] (
  49442. .A(vcc),
  49443. .B(vcc),
  49444. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [3]),
  49445. .D(vcc),
  49446. .Cin(),
  49447. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2]),
  49448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49450. .SyncReset(),
  49451. .ShiftData(),
  49452. .SyncLoad(),
  49453. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2]~feeder_combout ),
  49454. .Cout(),
  49455. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2]));
  49456. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .coord_x = 20;
  49457. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .coord_y = 11;
  49458. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .coord_z = 1;
  49459. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .mask = 16'hF0F0;
  49460. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .modeMux = 1'b0;
  49461. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  49462. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .ShiftMux = 1'b0;
  49463. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .BypassEn = 1'b0;
  49464. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[2] .CarryEnb = 1'b1;
  49465. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] (
  49466. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [0]),
  49467. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [1]),
  49468. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4]),
  49469. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [2]),
  49470. .Cin(),
  49471. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [3]),
  49472. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49473. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49474. .SyncReset(SyncReset_X59_Y12_GND),
  49475. .ShiftData(),
  49476. .SyncLoad(SyncLoad_X59_Y12_VCC),
  49477. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|always11~1_combout ),
  49478. .Cout(),
  49479. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [3]));
  49480. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .coord_x = 20;
  49481. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .coord_y = 11;
  49482. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .coord_z = 9;
  49483. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .mask = 16'h0001;
  49484. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .modeMux = 1'b0;
  49485. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .FeedbackMux = 1'b1;
  49486. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .ShiftMux = 1'b0;
  49487. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .BypassEn = 1'b1;
  49488. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[3] .CarryEnb = 1'b1;
  49489. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] (
  49490. .A(),
  49491. .B(),
  49492. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5]),
  49493. .D(),
  49494. .Cin(),
  49495. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4]),
  49496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49498. .SyncReset(SyncReset_X59_Y12_GND),
  49499. .ShiftData(),
  49500. .SyncLoad(SyncLoad_X59_Y12_VCC),
  49501. .LutOut(),
  49502. .Cout(),
  49503. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [4]));
  49504. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .coord_x = 20;
  49505. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .coord_y = 11;
  49506. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .coord_z = 12;
  49507. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .mask = 16'hFFFF;
  49508. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .modeMux = 1'b1;
  49509. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .FeedbackMux = 1'b0;
  49510. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .ShiftMux = 1'b0;
  49511. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .BypassEn = 1'b1;
  49512. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[4] .CarryEnb = 1'b1;
  49513. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] (
  49514. .A(\macro_inst|u_uart[1]|u_rx[4]|Selector0~1_combout ),
  49515. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  49516. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6]),
  49517. .D(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  49518. .Cin(),
  49519. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5]),
  49520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49521. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49522. .SyncReset(SyncReset_X59_Y12_GND),
  49523. .ShiftData(),
  49524. .SyncLoad(SyncLoad_X59_Y12_VCC),
  49525. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector4~2_combout ),
  49526. .Cout(),
  49527. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [5]));
  49528. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .coord_x = 20;
  49529. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .coord_y = 11;
  49530. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .coord_z = 6;
  49531. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .mask = 16'hBB00;
  49532. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .modeMux = 1'b0;
  49533. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  49534. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .ShiftMux = 1'b0;
  49535. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .BypassEn = 1'b1;
  49536. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[5] .CarryEnb = 1'b1;
  49537. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] (
  49538. .A(vcc),
  49539. .B(vcc),
  49540. .C(vcc),
  49541. .D(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]),
  49542. .Cin(),
  49543. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6]),
  49544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49546. .SyncReset(),
  49547. .ShiftData(),
  49548. .SyncLoad(),
  49549. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6]~feeder_combout ),
  49550. .Cout(),
  49551. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [6]));
  49552. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .coord_x = 20;
  49553. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .coord_y = 11;
  49554. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .coord_z = 0;
  49555. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .mask = 16'hFF00;
  49556. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .modeMux = 1'b0;
  49557. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  49558. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .ShiftMux = 1'b0;
  49559. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .BypassEn = 1'b0;
  49560. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[6] .CarryEnb = 1'b1;
  49561. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] (
  49562. .A(vcc),
  49563. .B(vcc),
  49564. .C(vcc),
  49565. .D(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  49566. .Cin(),
  49567. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]),
  49568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[4]|always4~2_combout_X59_Y12_SIG_SIG ),
  49569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49570. .SyncReset(),
  49571. .ShiftData(),
  49572. .SyncLoad(),
  49573. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7]~feeder_combout ),
  49574. .Cout(),
  49575. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg [7]));
  49576. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .coord_x = 20;
  49577. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .coord_y = 11;
  49578. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .coord_z = 5;
  49579. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .mask = 16'hFF00;
  49580. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .modeMux = 1'b0;
  49581. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  49582. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .ShiftMux = 1'b0;
  49583. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .BypassEn = 1'b0;
  49584. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_shift_reg[7] .CarryEnb = 1'b1;
  49585. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA (
  49586. .A(\macro_inst|u_uart[1]|u_rx[4]|Selector2~1_combout ),
  49587. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector2~0_combout ),
  49588. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  49589. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector0~2_combout ),
  49590. .Cin(),
  49591. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ),
  49592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  49593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  49594. .SyncReset(),
  49595. .ShiftData(),
  49596. .SyncLoad(),
  49597. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector2~2_combout ),
  49598. .Cout(),
  49599. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA~q ));
  49600. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .coord_x = 20;
  49601. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .coord_y = 10;
  49602. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .coord_z = 6;
  49603. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .mask = 16'h00EA;
  49604. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .modeMux = 1'b0;
  49605. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  49606. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .ShiftMux = 1'b0;
  49607. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .BypassEn = 1'b0;
  49608. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_DATA .CarryEnb = 1'b1;
  49609. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE (
  49610. .A(vcc),
  49611. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector0~2_combout ),
  49612. .C(vcc),
  49613. .D(\macro_inst|u_uart[1]|u_rx[4]|Add1~0_combout ),
  49614. .Cin(),
  49615. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ),
  49616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  49617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  49618. .SyncReset(),
  49619. .ShiftData(),
  49620. .SyncLoad(),
  49621. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector0~3_combout ),
  49622. .Cout(),
  49623. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE~q ));
  49624. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .coord_x = 20;
  49625. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .coord_y = 10;
  49626. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .coord_z = 2;
  49627. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .mask = 16'h3033;
  49628. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .modeMux = 1'b0;
  49629. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .FeedbackMux = 1'b1;
  49630. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  49631. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .BypassEn = 1'b0;
  49632. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  49633. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY (
  49634. .A(\macro_inst|u_uart[1]|u_rx[4]|Selector3~0_combout ),
  49635. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~0_combout ),
  49636. .C(vcc),
  49637. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector4~4_combout ),
  49638. .Cin(),
  49639. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  49640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y12_SIG_VCC ),
  49641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49642. .SyncReset(),
  49643. .ShiftData(),
  49644. .SyncLoad(),
  49645. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~1_combout ),
  49646. .Cout(),
  49647. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ));
  49648. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .coord_x = 20;
  49649. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .coord_y = 11;
  49650. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .coord_z = 2;
  49651. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .mask = 16'h88F8;
  49652. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .modeMux = 1'b0;
  49653. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  49654. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  49655. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .BypassEn = 1'b0;
  49656. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  49657. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START (
  49658. .A(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout ),
  49659. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector0~4_combout ),
  49660. .C(vcc),
  49661. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector0~2_combout ),
  49662. .Cin(),
  49663. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ),
  49664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y12_SIG_VCC ),
  49665. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y12_SIG ),
  49666. .SyncReset(),
  49667. .ShiftData(),
  49668. .SyncLoad(),
  49669. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|Selector1~0_combout ),
  49670. .Cout(),
  49671. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START~q ));
  49672. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .coord_x = 20;
  49673. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .coord_y = 10;
  49674. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .coord_z = 13;
  49675. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .mask = 16'h00BA;
  49676. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .modeMux = 1'b0;
  49677. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .FeedbackMux = 1'b1;
  49678. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .ShiftMux = 1'b0;
  49679. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .BypassEn = 1'b0;
  49680. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_START .CarryEnb = 1'b1;
  49681. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP (
  49682. .A(vcc),
  49683. .B(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0_combout ),
  49684. .C(vcc),
  49685. .D(\macro_inst|u_uart[1]|u_rx[4]|Selector4~4_combout ),
  49686. .Cin(),
  49687. .Qin(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ),
  49688. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X59_Y12_SIG_VCC ),
  49689. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X59_Y12_SIG ),
  49690. .SyncReset(),
  49691. .ShiftData(),
  49692. .SyncLoad(),
  49693. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~1_combout ),
  49694. .Cout(),
  49695. .Q(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~q ));
  49696. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .coord_x = 20;
  49697. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .coord_y = 11;
  49698. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .coord_z = 8;
  49699. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .mask = 16'hCCF0;
  49700. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .modeMux = 1'b0;
  49701. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  49702. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .ShiftMux = 1'b0;
  49703. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .BypassEn = 1'b0;
  49704. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP .CarryEnb = 1'b1;
  49705. alta_slice \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 (
  49706. .A(\macro_inst|u_uart[1]|u_rx[4]|rx_bit~q ),
  49707. .B(\macro_inst|u_uart[1]|u_rx[4]|Selector3~0_combout ),
  49708. .C(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_PARITY~q ),
  49709. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  49710. .Cin(),
  49711. .Qin(),
  49712. .Clk(),
  49713. .AsyncReset(),
  49714. .SyncReset(),
  49715. .ShiftData(),
  49716. .SyncLoad(),
  49717. .LutOut(\macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0_combout ),
  49718. .Cout(),
  49719. .Q());
  49720. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .coord_x = 19;
  49721. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .coord_y = 8;
  49722. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .coord_z = 8;
  49723. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .mask = 16'hA0EC;
  49724. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  49725. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  49726. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  49727. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  49728. defparam \macro_inst|u_uart[1]|u_rx[4]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  49729. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Add3~0 (
  49730. .A(vcc),
  49731. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  49732. .C(vcc),
  49733. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  49734. .Cin(),
  49735. .Qin(),
  49736. .Clk(),
  49737. .AsyncReset(),
  49738. .SyncReset(),
  49739. .ShiftData(),
  49740. .SyncLoad(),
  49741. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  49742. .Cout(),
  49743. .Q());
  49744. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .coord_x = 17;
  49745. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .coord_y = 3;
  49746. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .coord_z = 1;
  49747. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .mask = 16'h33CC;
  49748. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .modeMux = 1'b0;
  49749. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .FeedbackMux = 1'b0;
  49750. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .ShiftMux = 1'b0;
  49751. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .BypassEn = 1'b0;
  49752. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~0 .CarryEnb = 1'b1;
  49753. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Add3~1 (
  49754. .A(vcc),
  49755. .B(vcc),
  49756. .C(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  49757. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  49758. .Cin(),
  49759. .Qin(),
  49760. .Clk(),
  49761. .AsyncReset(),
  49762. .SyncReset(),
  49763. .ShiftData(),
  49764. .SyncLoad(),
  49765. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  49766. .Cout(),
  49767. .Q());
  49768. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .coord_x = 15;
  49769. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .coord_y = 11;
  49770. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .coord_z = 4;
  49771. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .mask = 16'hFFF0;
  49772. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .modeMux = 1'b0;
  49773. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .FeedbackMux = 1'b0;
  49774. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .ShiftMux = 1'b0;
  49775. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .BypassEn = 1'b0;
  49776. defparam \macro_inst|u_uart[1]|u_rx[5]|Add3~1 .CarryEnb = 1'b1;
  49777. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Add4~0 (
  49778. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [3]),
  49779. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]),
  49780. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2]),
  49781. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]),
  49782. .Cin(),
  49783. .Qin(),
  49784. .Clk(),
  49785. .AsyncReset(),
  49786. .SyncReset(),
  49787. .ShiftData(),
  49788. .SyncLoad(),
  49789. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add4~0_combout ),
  49790. .Cout(),
  49791. .Q());
  49792. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .coord_x = 18;
  49793. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .coord_y = 12;
  49794. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .coord_z = 2;
  49795. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .mask = 16'h5556;
  49796. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .modeMux = 1'b0;
  49797. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .FeedbackMux = 1'b0;
  49798. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .ShiftMux = 1'b0;
  49799. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .BypassEn = 1'b0;
  49800. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~0 .CarryEnb = 1'b1;
  49801. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Add4~1 (
  49802. .A(vcc),
  49803. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]),
  49804. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2]),
  49805. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]),
  49806. .Cin(),
  49807. .Qin(),
  49808. .Clk(),
  49809. .AsyncReset(),
  49810. .SyncReset(),
  49811. .ShiftData(),
  49812. .SyncLoad(),
  49813. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add4~1_combout ),
  49814. .Cout(),
  49815. .Q());
  49816. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .coord_x = 18;
  49817. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .coord_y = 12;
  49818. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .coord_z = 10;
  49819. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .mask = 16'h0F3C;
  49820. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .modeMux = 1'b0;
  49821. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .FeedbackMux = 1'b0;
  49822. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .ShiftMux = 1'b0;
  49823. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .BypassEn = 1'b0;
  49824. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~1 .CarryEnb = 1'b1;
  49825. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Add4~2 (
  49826. .A(vcc),
  49827. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]),
  49828. .C(vcc),
  49829. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]),
  49830. .Cin(),
  49831. .Qin(),
  49832. .Clk(),
  49833. .AsyncReset(),
  49834. .SyncReset(),
  49835. .ShiftData(),
  49836. .SyncLoad(),
  49837. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add4~2_combout ),
  49838. .Cout(),
  49839. .Q());
  49840. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .coord_x = 18;
  49841. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .coord_y = 12;
  49842. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .coord_z = 4;
  49843. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .mask = 16'h33CC;
  49844. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .modeMux = 1'b0;
  49845. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .FeedbackMux = 1'b0;
  49846. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .ShiftMux = 1'b0;
  49847. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .BypassEn = 1'b0;
  49848. defparam \macro_inst|u_uart[1]|u_rx[5]|Add4~2 .CarryEnb = 1'b1;
  49849. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 (
  49850. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  49851. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ),
  49852. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  49853. .D(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  49854. .Cin(),
  49855. .Qin(),
  49856. .Clk(),
  49857. .AsyncReset(),
  49858. .SyncReset(),
  49859. .ShiftData(),
  49860. .SyncLoad(),
  49861. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  49862. .Cout(),
  49863. .Q());
  49864. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .coord_x = 18;
  49865. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .coord_y = 11;
  49866. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .coord_z = 11;
  49867. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .mask = 16'h0400;
  49868. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .modeMux = 1'b0;
  49869. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .FeedbackMux = 1'b0;
  49870. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .ShiftMux = 1'b0;
  49871. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .BypassEn = 1'b0;
  49872. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~1 .CarryEnb = 1'b1;
  49873. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 (
  49874. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ),
  49875. .B(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  49876. .C(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  49877. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_sample~0_combout ),
  49878. .Cin(),
  49879. .Qin(),
  49880. .Clk(),
  49881. .AsyncReset(),
  49882. .SyncReset(),
  49883. .ShiftData(),
  49884. .SyncLoad(),
  49885. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~2_combout ),
  49886. .Cout(),
  49887. .Q());
  49888. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .coord_x = 18;
  49889. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .coord_y = 11;
  49890. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .coord_z = 15;
  49891. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .mask = 16'h8000;
  49892. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .modeMux = 1'b0;
  49893. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .FeedbackMux = 1'b0;
  49894. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .ShiftMux = 1'b0;
  49895. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .BypassEn = 1'b0;
  49896. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~2 .CarryEnb = 1'b1;
  49897. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 (
  49898. .A(vcc),
  49899. .B(vcc),
  49900. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  49901. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector4~0_combout ),
  49902. .Cin(),
  49903. .Qin(),
  49904. .Clk(),
  49905. .AsyncReset(),
  49906. .SyncReset(),
  49907. .ShiftData(),
  49908. .SyncLoad(),
  49909. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~3_combout ),
  49910. .Cout(),
  49911. .Q());
  49912. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .coord_x = 17;
  49913. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .coord_y = 11;
  49914. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .coord_z = 12;
  49915. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .mask = 16'hF000;
  49916. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .modeMux = 1'b0;
  49917. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .FeedbackMux = 1'b0;
  49918. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .ShiftMux = 1'b0;
  49919. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .BypassEn = 1'b0;
  49920. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~3 .CarryEnb = 1'b1;
  49921. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 (
  49922. .A(\macro_inst|u_uart[1]|u_rx[5]|Selector2~3_combout ),
  49923. .B(\macro_inst|u_uart[1]|u_rx[5]|always3~2_combout ),
  49924. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  49925. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  49926. .Cin(),
  49927. .Qin(),
  49928. .Clk(),
  49929. .AsyncReset(),
  49930. .SyncReset(),
  49931. .ShiftData(),
  49932. .SyncLoad(),
  49933. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~4_combout ),
  49934. .Cout(),
  49935. .Q());
  49936. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .coord_x = 17;
  49937. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .coord_y = 11;
  49938. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .coord_z = 3;
  49939. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .mask = 16'hFE00;
  49940. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .modeMux = 1'b0;
  49941. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .FeedbackMux = 1'b0;
  49942. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .ShiftMux = 1'b0;
  49943. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .BypassEn = 1'b0;
  49944. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~4 .CarryEnb = 1'b1;
  49945. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 (
  49946. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  49947. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  49948. .C(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  49949. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector2~4_combout ),
  49950. .Cin(),
  49951. .Qin(),
  49952. .Clk(),
  49953. .AsyncReset(),
  49954. .SyncReset(),
  49955. .ShiftData(),
  49956. .SyncLoad(),
  49957. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~5_combout ),
  49958. .Cout(),
  49959. .Q());
  49960. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .coord_x = 17;
  49961. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .coord_y = 11;
  49962. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .coord_z = 4;
  49963. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .mask = 16'h00C8;
  49964. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .modeMux = 1'b0;
  49965. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .FeedbackMux = 1'b0;
  49966. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .ShiftMux = 1'b0;
  49967. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .BypassEn = 1'b0;
  49968. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector2~5 .CarryEnb = 1'b1;
  49969. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 (
  49970. .A(vcc),
  49971. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  49972. .C(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  49973. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  49974. .Cin(),
  49975. .Qin(),
  49976. .Clk(),
  49977. .AsyncReset(),
  49978. .SyncReset(),
  49979. .ShiftData(),
  49980. .SyncLoad(),
  49981. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector3~1_combout ),
  49982. .Cout(),
  49983. .Q());
  49984. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .coord_x = 17;
  49985. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .coord_y = 11;
  49986. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .coord_z = 15;
  49987. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .mask = 16'hC000;
  49988. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .modeMux = 1'b0;
  49989. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .FeedbackMux = 1'b0;
  49990. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .ShiftMux = 1'b0;
  49991. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .BypassEn = 1'b0;
  49992. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector3~1 .CarryEnb = 1'b1;
  49993. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 (
  49994. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0]),
  49995. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3]),
  49996. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  49997. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  49998. .Cin(),
  49999. .Qin(),
  50000. .Clk(),
  50001. .AsyncReset(),
  50002. .SyncReset(),
  50003. .ShiftData(),
  50004. .SyncLoad(),
  50005. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector4~0_combout ),
  50006. .Cout(),
  50007. .Q());
  50008. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .coord_x = 18;
  50009. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .coord_y = 12;
  50010. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .coord_z = 9;
  50011. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .mask = 16'h0001;
  50012. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .modeMux = 1'b0;
  50013. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .FeedbackMux = 1'b0;
  50014. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .ShiftMux = 1'b0;
  50015. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .BypassEn = 1'b0;
  50016. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~0 .CarryEnb = 1'b1;
  50017. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 (
  50018. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  50019. .B(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  50020. .C(\macro_inst|u_uart[1]|u_rx[5]|Selector4~1_combout ),
  50021. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  50022. .Cin(),
  50023. .Qin(),
  50024. .Clk(),
  50025. .AsyncReset(),
  50026. .SyncReset(),
  50027. .ShiftData(),
  50028. .SyncLoad(),
  50029. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector4~2_combout ),
  50030. .Cout(),
  50031. .Q());
  50032. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .coord_x = 18;
  50033. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .coord_y = 11;
  50034. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .coord_z = 7;
  50035. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .mask = 16'hB9B1;
  50036. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .modeMux = 1'b0;
  50037. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .FeedbackMux = 1'b0;
  50038. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .ShiftMux = 1'b0;
  50039. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .BypassEn = 1'b0;
  50040. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~2 .CarryEnb = 1'b1;
  50041. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 (
  50042. .A(vcc),
  50043. .B(vcc),
  50044. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  50045. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  50046. .Cin(),
  50047. .Qin(),
  50048. .Clk(),
  50049. .AsyncReset(),
  50050. .SyncReset(),
  50051. .ShiftData(),
  50052. .SyncLoad(),
  50053. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector4~3_combout ),
  50054. .Cout(),
  50055. .Q());
  50056. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .coord_x = 17;
  50057. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .coord_y = 11;
  50058. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .coord_z = 10;
  50059. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .mask = 16'h000F;
  50060. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .modeMux = 1'b0;
  50061. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .FeedbackMux = 1'b0;
  50062. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .ShiftMux = 1'b0;
  50063. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .BypassEn = 1'b0;
  50064. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~3 .CarryEnb = 1'b1;
  50065. alta_slice \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 (
  50066. .A(\macro_inst|u_uart[1]|u_rx[5]|Selector3~1_combout ),
  50067. .B(\macro_inst|u_uart[1]|u_rx[5]|Selector3~0_combout ),
  50068. .C(\macro_inst|u_uart[1]|u_rx[5]|Selector4~3_combout ),
  50069. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector4~2_combout ),
  50070. .Cin(),
  50071. .Qin(),
  50072. .Clk(),
  50073. .AsyncReset(),
  50074. .SyncReset(),
  50075. .ShiftData(),
  50076. .SyncLoad(),
  50077. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector4~4_combout ),
  50078. .Cout(),
  50079. .Q());
  50080. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .coord_x = 17;
  50081. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .coord_y = 11;
  50082. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .coord_z = 11;
  50083. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .mask = 16'hFEEE;
  50084. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .modeMux = 1'b0;
  50085. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .FeedbackMux = 1'b0;
  50086. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .ShiftMux = 1'b0;
  50087. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .BypassEn = 1'b0;
  50088. defparam \macro_inst|u_uart[1]|u_rx[5]|Selector4~4 .CarryEnb = 1'b1;
  50089. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always11~2 (
  50090. .A(\macro_inst|u_uart[1]|u_rx[5]|always11~1_combout ),
  50091. .B(\macro_inst|u_uart[1]|u_rx[5]|always11~0_combout ),
  50092. .C(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  50093. .D(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  50094. .Cin(),
  50095. .Qin(),
  50096. .Clk(),
  50097. .AsyncReset(),
  50098. .SyncReset(),
  50099. .ShiftData(),
  50100. .SyncLoad(),
  50101. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always11~2_combout ),
  50102. .Cout(),
  50103. .Q());
  50104. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .coord_x = 18;
  50105. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .coord_y = 10;
  50106. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .coord_z = 3;
  50107. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .mask = 16'h0080;
  50108. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .modeMux = 1'b0;
  50109. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .FeedbackMux = 1'b0;
  50110. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .ShiftMux = 1'b0;
  50111. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .BypassEn = 1'b0;
  50112. defparam \macro_inst|u_uart[1]|u_rx[5]|always11~2 .CarryEnb = 1'b1;
  50113. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always2~0 (
  50114. .A(vcc),
  50115. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3]),
  50116. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0]),
  50117. .D(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  50118. .Cin(),
  50119. .Qin(),
  50120. .Clk(),
  50121. .AsyncReset(),
  50122. .SyncReset(),
  50123. .ShiftData(),
  50124. .SyncLoad(),
  50125. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  50126. .Cout(),
  50127. .Q());
  50128. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .coord_x = 18;
  50129. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .coord_y = 12;
  50130. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .coord_z = 5;
  50131. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .mask = 16'hC000;
  50132. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .modeMux = 1'b0;
  50133. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .FeedbackMux = 1'b0;
  50134. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .ShiftMux = 1'b0;
  50135. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .BypassEn = 1'b0;
  50136. defparam \macro_inst|u_uart[1]|u_rx[5]|always2~0 .CarryEnb = 1'b1;
  50137. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always3~1 (
  50138. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [3]),
  50139. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]),
  50140. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2]),
  50141. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]),
  50142. .Cin(),
  50143. .Qin(),
  50144. .Clk(),
  50145. .AsyncReset(),
  50146. .SyncReset(),
  50147. .ShiftData(),
  50148. .SyncLoad(),
  50149. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  50150. .Cout(),
  50151. .Q());
  50152. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .coord_x = 18;
  50153. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .coord_y = 12;
  50154. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .coord_z = 7;
  50155. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .mask = 16'h0001;
  50156. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .modeMux = 1'b0;
  50157. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .FeedbackMux = 1'b0;
  50158. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .ShiftMux = 1'b0;
  50159. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .BypassEn = 1'b0;
  50160. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~1 .CarryEnb = 1'b1;
  50161. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always3~2 (
  50162. .A(vcc),
  50163. .B(vcc),
  50164. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  50165. .D(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  50166. .Cin(),
  50167. .Qin(),
  50168. .Clk(),
  50169. .AsyncReset(),
  50170. .SyncReset(),
  50171. .ShiftData(),
  50172. .SyncLoad(),
  50173. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always3~2_combout ),
  50174. .Cout(),
  50175. .Q());
  50176. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .coord_x = 18;
  50177. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .coord_y = 12;
  50178. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .coord_z = 8;
  50179. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .mask = 16'hF000;
  50180. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .modeMux = 1'b0;
  50181. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .FeedbackMux = 1'b0;
  50182. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .ShiftMux = 1'b0;
  50183. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .BypassEn = 1'b0;
  50184. defparam \macro_inst|u_uart[1]|u_rx[5]|always3~2 .CarryEnb = 1'b1;
  50185. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always4~2 (
  50186. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  50187. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  50188. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  50189. .D(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  50190. .Cin(),
  50191. .Qin(),
  50192. .Clk(),
  50193. .AsyncReset(),
  50194. .SyncReset(),
  50195. .ShiftData(),
  50196. .SyncLoad(),
  50197. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always4~2_combout ),
  50198. .Cout(),
  50199. .Q());
  50200. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .coord_x = 18;
  50201. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .coord_y = 11;
  50202. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .coord_z = 0;
  50203. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .mask = 16'h0400;
  50204. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .modeMux = 1'b0;
  50205. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .FeedbackMux = 1'b0;
  50206. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .ShiftMux = 1'b0;
  50207. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .BypassEn = 1'b0;
  50208. defparam \macro_inst|u_uart[1]|u_rx[5]|always4~2 .CarryEnb = 1'b1;
  50209. alta_slice \macro_inst|u_uart[1]|u_rx[5]|always8~0 (
  50210. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  50211. .B(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  50212. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~q ),
  50213. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  50214. .Cin(),
  50215. .Qin(),
  50216. .Clk(),
  50217. .AsyncReset(),
  50218. .SyncReset(),
  50219. .ShiftData(),
  50220. .SyncLoad(),
  50221. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always8~0_combout ),
  50222. .Cout(),
  50223. .Q());
  50224. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .coord_x = 17;
  50225. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .coord_y = 11;
  50226. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .coord_z = 14;
  50227. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .mask = 16'h4000;
  50228. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .modeMux = 1'b0;
  50229. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .FeedbackMux = 1'b0;
  50230. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .ShiftMux = 1'b0;
  50231. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .BypassEn = 1'b0;
  50232. defparam \macro_inst|u_uart[1]|u_rx[5]|always8~0 .CarryEnb = 1'b1;
  50233. alta_slice \macro_inst|u_uart[1]|u_rx[5]|break_error (
  50234. .A(vcc),
  50235. .B(\macro_inst|u_uart[1]|u_rx[5]|always11~2_combout ),
  50236. .C(vcc),
  50237. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50238. .Cin(),
  50239. .Qin(\macro_inst|u_uart[1]|u_rx[5]|break_error~q ),
  50240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  50241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  50242. .SyncReset(),
  50243. .ShiftData(),
  50244. .SyncLoad(),
  50245. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|break_error~0_combout ),
  50246. .Cout(),
  50247. .Q(\macro_inst|u_uart[1]|u_rx[5]|break_error~q ));
  50248. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .coord_x = 18;
  50249. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .coord_y = 10;
  50250. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .coord_z = 4;
  50251. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .mask = 16'hCCFC;
  50252. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .modeMux = 1'b0;
  50253. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .FeedbackMux = 1'b1;
  50254. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .ShiftMux = 1'b0;
  50255. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .BypassEn = 1'b0;
  50256. defparam \macro_inst|u_uart[1]|u_rx[5]|break_error .CarryEnb = 1'b1;
  50257. alta_slice \macro_inst|u_uart[1]|u_rx[5]|framing_error (
  50258. .A(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  50259. .B(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  50260. .C(vcc),
  50261. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50262. .Cin(),
  50263. .Qin(\macro_inst|u_uart[1]|u_rx[5]|framing_error~q ),
  50264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  50265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  50266. .SyncReset(),
  50267. .ShiftData(),
  50268. .SyncLoad(),
  50269. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|framing_error~0_combout ),
  50270. .Cout(),
  50271. .Q(\macro_inst|u_uart[1]|u_rx[5]|framing_error~q ));
  50272. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .coord_x = 18;
  50273. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .coord_y = 10;
  50274. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .coord_z = 2;
  50275. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .mask = 16'h22F2;
  50276. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .modeMux = 1'b0;
  50277. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .FeedbackMux = 1'b1;
  50278. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .ShiftMux = 1'b0;
  50279. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .BypassEn = 1'b0;
  50280. defparam \macro_inst|u_uart[1]|u_rx[5]|framing_error .CarryEnb = 1'b1;
  50281. alta_slice \macro_inst|u_uart[1]|u_rx[5]|overrun_error (
  50282. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  50283. .B(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50284. .C(vcc),
  50285. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  50286. .Cin(),
  50287. .Qin(\macro_inst|u_uart[1]|u_rx[5]|overrun_error~q ),
  50288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  50289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  50290. .SyncReset(),
  50291. .ShiftData(),
  50292. .SyncLoad(),
  50293. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|overrun_error~0_combout ),
  50294. .Cout(),
  50295. .Q(\macro_inst|u_uart[1]|u_rx[5]|overrun_error~q ));
  50296. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .coord_x = 17;
  50297. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .coord_y = 8;
  50298. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .coord_z = 14;
  50299. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .mask = 16'hBA30;
  50300. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .modeMux = 1'b0;
  50301. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .FeedbackMux = 1'b1;
  50302. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .ShiftMux = 1'b0;
  50303. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .BypassEn = 1'b0;
  50304. defparam \macro_inst|u_uart[1]|u_rx[5]|overrun_error .CarryEnb = 1'b1;
  50305. alta_slice \macro_inst|u_uart[1]|u_rx[5]|parity_error (
  50306. .A(\macro_inst|u_uart[1]|u_rx[5]|parity_error~0_combout ),
  50307. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_sample~0_combout ),
  50308. .C(vcc),
  50309. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50310. .Cin(),
  50311. .Qin(\macro_inst|u_uart[1]|u_rx[5]|parity_error~q ),
  50312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  50313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  50314. .SyncReset(),
  50315. .ShiftData(),
  50316. .SyncLoad(),
  50317. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|parity_error~1_combout ),
  50318. .Cout(),
  50319. .Q(\macro_inst|u_uart[1]|u_rx[5]|parity_error~q ));
  50320. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .coord_x = 15;
  50321. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .coord_y = 9;
  50322. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .coord_z = 10;
  50323. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .mask = 16'h88F8;
  50324. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .modeMux = 1'b0;
  50325. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .FeedbackMux = 1'b1;
  50326. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .ShiftMux = 1'b0;
  50327. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .BypassEn = 1'b0;
  50328. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error .CarryEnb = 1'b1;
  50329. alta_slice \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 (
  50330. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  50331. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~q ),
  50332. .C(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  50333. .D(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  50334. .Cin(),
  50335. .Qin(),
  50336. .Clk(),
  50337. .AsyncReset(),
  50338. .SyncReset(),
  50339. .ShiftData(),
  50340. .SyncLoad(),
  50341. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|parity_error~0_combout ),
  50342. .Cout(),
  50343. .Q());
  50344. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .coord_x = 17;
  50345. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .coord_y = 11;
  50346. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .coord_z = 5;
  50347. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .mask = 16'h2080;
  50348. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .modeMux = 1'b0;
  50349. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .FeedbackMux = 1'b0;
  50350. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .ShiftMux = 1'b0;
  50351. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .BypassEn = 1'b0;
  50352. defparam \macro_inst|u_uart[1]|u_rx[5]|parity_error~0 .CarryEnb = 1'b1;
  50353. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] (
  50354. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0]),
  50355. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  50356. .C(\~GND~combout ),
  50357. .D(vcc),
  50358. .Cin(),
  50359. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0]),
  50360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ),
  50361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ),
  50362. .SyncReset(SyncReset_X62_Y11_GND),
  50363. .ShiftData(),
  50364. .SyncLoad(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ),
  50365. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0]~4_combout ),
  50366. .Cout(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0]~5 ),
  50367. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [0]));
  50368. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .coord_x = 18;
  50369. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .coord_y = 12;
  50370. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .coord_z = 12;
  50371. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .mask = 16'h6688;
  50372. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .modeMux = 1'b0;
  50373. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .FeedbackMux = 1'b0;
  50374. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .ShiftMux = 1'b0;
  50375. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .BypassEn = 1'b1;
  50376. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0] .CarryEnb = 1'b0;
  50377. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] (
  50378. .A(vcc),
  50379. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  50380. .C(vcc),
  50381. .D(vcc),
  50382. .Cin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[0]~5 ),
  50383. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  50384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ),
  50385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ),
  50386. .SyncReset(SyncReset_X62_Y11_GND),
  50387. .ShiftData(),
  50388. .SyncLoad(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ),
  50389. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1]~6_combout ),
  50390. .Cout(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1]~7 ),
  50391. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]));
  50392. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .coord_x = 18;
  50393. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .coord_y = 12;
  50394. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .coord_z = 13;
  50395. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .mask = 16'h3C3F;
  50396. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .modeMux = 1'b1;
  50397. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .FeedbackMux = 1'b0;
  50398. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .ShiftMux = 1'b0;
  50399. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .BypassEn = 1'b1;
  50400. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1] .CarryEnb = 1'b0;
  50401. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] (
  50402. .A(vcc),
  50403. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  50404. .C(\~GND~combout ),
  50405. .D(vcc),
  50406. .Cin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[1]~7 ),
  50407. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  50408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ),
  50409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ),
  50410. .SyncReset(SyncReset_X62_Y11_GND),
  50411. .ShiftData(),
  50412. .SyncLoad(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ),
  50413. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2]~8_combout ),
  50414. .Cout(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2]~9 ),
  50415. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]));
  50416. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .coord_x = 18;
  50417. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .coord_y = 12;
  50418. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .coord_z = 14;
  50419. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .mask = 16'hC30C;
  50420. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .modeMux = 1'b1;
  50421. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .FeedbackMux = 1'b0;
  50422. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .ShiftMux = 1'b0;
  50423. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .BypassEn = 1'b1;
  50424. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2] .CarryEnb = 1'b0;
  50425. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] (
  50426. .A(vcc),
  50427. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3]),
  50428. .C(\~GND~combout ),
  50429. .D(vcc),
  50430. .Cin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[2]~9 ),
  50431. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3]),
  50432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ),
  50433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y11_SIG ),
  50434. .SyncReset(SyncReset_X62_Y11_GND),
  50435. .ShiftData(),
  50436. .SyncLoad(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ),
  50437. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3]~10_combout ),
  50438. .Cout(),
  50439. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [3]));
  50440. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .coord_x = 18;
  50441. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .coord_y = 12;
  50442. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .coord_z = 15;
  50443. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .mask = 16'h3C3C;
  50444. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .modeMux = 1'b1;
  50445. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .FeedbackMux = 1'b0;
  50446. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .ShiftMux = 1'b0;
  50447. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .BypassEn = 1'b1;
  50448. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt[3] .CarryEnb = 1'b1;
  50449. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_bit (
  50450. .A(vcc),
  50451. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ),
  50452. .C(\macro_inst|u_uart[1]|u_rx[5]|always2~1_combout ),
  50453. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector4~0_combout ),
  50454. .Cin(),
  50455. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  50456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  50457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  50458. .SyncReset(SyncReset_X61_Y11_GND),
  50459. .ShiftData(),
  50460. .SyncLoad(SyncLoad_X61_Y11_VCC),
  50461. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector4~1_combout ),
  50462. .Cout(),
  50463. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ));
  50464. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .coord_x = 17;
  50465. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .coord_y = 11;
  50466. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .coord_z = 1;
  50467. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .mask = 16'h3000;
  50468. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .modeMux = 1'b0;
  50469. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .FeedbackMux = 1'b1;
  50470. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .ShiftMux = 1'b0;
  50471. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .BypassEn = 1'b1;
  50472. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_bit .CarryEnb = 1'b1;
  50473. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] (
  50474. .A(\macro_inst|u_uart[1]|u_rx[5]|always3~2_combout ),
  50475. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  50476. .C(vcc),
  50477. .D(\macro_inst|u_uart[1]|u_rx[5]|Add3~0_combout ),
  50478. .Cin(),
  50479. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]),
  50480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout_X62_Y11_SIG_SIG ),
  50481. .AsyncReset(AsyncReset_X62_Y11_GND),
  50482. .SyncReset(),
  50483. .ShiftData(),
  50484. .SyncLoad(),
  50485. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~4_combout ),
  50486. .Cout(),
  50487. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [0]));
  50488. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .coord_x = 18;
  50489. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .coord_y = 12;
  50490. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .coord_z = 1;
  50491. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .mask = 16'hCDCF;
  50492. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .modeMux = 1'b0;
  50493. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .FeedbackMux = 1'b1;
  50494. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .ShiftMux = 1'b0;
  50495. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .BypassEn = 1'b0;
  50496. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0] .CarryEnb = 1'b1;
  50497. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 (
  50498. .A(vcc),
  50499. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  50500. .C(vcc),
  50501. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  50502. .Cin(),
  50503. .Qin(),
  50504. .Clk(),
  50505. .AsyncReset(),
  50506. .SyncReset(),
  50507. .ShiftData(),
  50508. .SyncLoad(),
  50509. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout ),
  50510. .Cout(),
  50511. .Q());
  50512. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .coord_x = 18;
  50513. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .coord_y = 12;
  50514. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .coord_z = 3;
  50515. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .mask = 16'hFFCC;
  50516. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .modeMux = 1'b0;
  50517. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .FeedbackMux = 1'b0;
  50518. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .ShiftMux = 1'b0;
  50519. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .BypassEn = 1'b0;
  50520. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3 .CarryEnb = 1'b1;
  50521. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] (
  50522. .A(\macro_inst|u_uart[1]|u_rx[5]|Add4~2_combout ),
  50523. .B(\macro_inst|u_uart[1]|u_rx[5]|Add3~1_combout ),
  50524. .C(\macro_inst|u_uart[1]|u_rx[5]|always3~2_combout ),
  50525. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  50526. .Cin(),
  50527. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]),
  50528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout_X62_Y11_SIG_SIG ),
  50529. .AsyncReset(AsyncReset_X62_Y11_GND),
  50530. .SyncReset(),
  50531. .ShiftData(),
  50532. .SyncLoad(),
  50533. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~5_combout ),
  50534. .Cout(),
  50535. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [1]));
  50536. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .coord_x = 18;
  50537. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .coord_y = 12;
  50538. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .coord_z = 11;
  50539. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .mask = 16'hFFC5;
  50540. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .modeMux = 1'b0;
  50541. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .FeedbackMux = 1'b0;
  50542. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .ShiftMux = 1'b0;
  50543. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .BypassEn = 1'b0;
  50544. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[1] .CarryEnb = 1'b1;
  50545. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] (
  50546. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  50547. .B(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  50548. .C(\macro_inst|u_uart[1]|u_rx[5]|Add4~1_combout ),
  50549. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  50550. .Cin(),
  50551. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2]),
  50552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[0]~3_combout_X62_Y11_SIG_SIG ),
  50553. .AsyncReset(AsyncReset_X62_Y11_GND),
  50554. .SyncReset(),
  50555. .ShiftData(),
  50556. .SyncLoad(),
  50557. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~2_combout ),
  50558. .Cout(),
  50559. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [2]));
  50560. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .coord_x = 18;
  50561. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .coord_y = 12;
  50562. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .coord_z = 0;
  50563. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .mask = 16'hFF07;
  50564. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .modeMux = 1'b0;
  50565. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .FeedbackMux = 1'b0;
  50566. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .ShiftMux = 1'b0;
  50567. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .BypassEn = 1'b0;
  50568. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[2] .CarryEnb = 1'b1;
  50569. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] (
  50570. .A(\macro_inst|u_uart[1]|u_rx[5]|Add4~0_combout ),
  50571. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  50572. .C(vcc),
  50573. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  50574. .Cin(),
  50575. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [3]),
  50576. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y11_SIG_VCC ),
  50577. .AsyncReset(AsyncReset_X62_Y11_GND),
  50578. .SyncReset(),
  50579. .ShiftData(),
  50580. .SyncLoad(),
  50581. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt~1_combout ),
  50582. .Cout(),
  50583. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt [3]));
  50584. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .coord_x = 18;
  50585. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .coord_y = 12;
  50586. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .coord_z = 6;
  50587. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .mask = 16'h1130;
  50588. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .modeMux = 1'b0;
  50589. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .FeedbackMux = 1'b1;
  50590. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .ShiftMux = 1'b0;
  50591. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .BypassEn = 1'b0;
  50592. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_data_cnt[3] .CarryEnb = 1'b1;
  50593. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] (
  50594. .A(\macro_inst|u_uart[1]|u_rx[5]|Selector2~1_combout ),
  50595. .B(vcc),
  50596. .C(vcc),
  50597. .D(\macro_inst|u_uart[1]|u_regs|rx_read [5]),
  50598. .Cin(),
  50599. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  50600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  50601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  50602. .SyncReset(),
  50603. .ShiftData(),
  50604. .SyncLoad(),
  50605. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter~0_combout ),
  50606. .Cout(),
  50607. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]));
  50608. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .coord_x = 18;
  50609. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .coord_y = 10;
  50610. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .coord_z = 14;
  50611. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .mask = 16'h0AFA;
  50612. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .modeMux = 1'b0;
  50613. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .FeedbackMux = 1'b1;
  50614. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .ShiftMux = 1'b0;
  50615. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .BypassEn = 1'b0;
  50616. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter[0] .CarryEnb = 1'b1;
  50617. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] (
  50618. .A(vcc),
  50619. .B(vcc),
  50620. .C(vcc),
  50621. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [0]),
  50622. .Cin(),
  50623. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~q ),
  50624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50625. .AsyncReset(AsyncReset_X59_Y11_GND),
  50626. .SyncReset(),
  50627. .ShiftData(),
  50628. .SyncLoad(),
  50629. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~feeder_combout ),
  50630. .Cout(),
  50631. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0]~q ));
  50632. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .coord_x = 19;
  50633. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .coord_y = 11;
  50634. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .coord_z = 0;
  50635. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .mask = 16'hFF00;
  50636. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .modeMux = 1'b0;
  50637. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  50638. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  50639. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .BypassEn = 1'b0;
  50640. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  50641. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] (
  50642. .A(vcc),
  50643. .B(vcc),
  50644. .C(vcc),
  50645. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1]),
  50646. .Cin(),
  50647. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~q ),
  50648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50649. .AsyncReset(AsyncReset_X59_Y11_GND),
  50650. .SyncReset(),
  50651. .ShiftData(),
  50652. .SyncLoad(),
  50653. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~feeder_combout ),
  50654. .Cout(),
  50655. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1]~q ));
  50656. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .coord_x = 19;
  50657. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .coord_y = 11;
  50658. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .coord_z = 15;
  50659. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .mask = 16'hFF00;
  50660. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .modeMux = 1'b0;
  50661. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  50662. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  50663. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .BypassEn = 1'b0;
  50664. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  50665. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] (
  50666. .A(),
  50667. .B(),
  50668. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2]),
  50669. .D(),
  50670. .Cin(),
  50671. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2]~q ),
  50672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50673. .AsyncReset(AsyncReset_X59_Y11_GND),
  50674. .SyncReset(SyncReset_X59_Y11_GND),
  50675. .ShiftData(),
  50676. .SyncLoad(SyncLoad_X59_Y11_VCC),
  50677. .LutOut(),
  50678. .Cout(),
  50679. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2]~q ));
  50680. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .coord_x = 19;
  50681. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .coord_y = 11;
  50682. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .coord_z = 9;
  50683. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .mask = 16'hFFFF;
  50684. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .modeMux = 1'b1;
  50685. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  50686. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  50687. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .BypassEn = 1'b1;
  50688. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  50689. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] (
  50690. .A(vcc),
  50691. .B(vcc),
  50692. .C(vcc),
  50693. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3]),
  50694. .Cin(),
  50695. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~q ),
  50696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50697. .AsyncReset(AsyncReset_X59_Y11_GND),
  50698. .SyncReset(),
  50699. .ShiftData(),
  50700. .SyncLoad(),
  50701. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~feeder_combout ),
  50702. .Cout(),
  50703. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3]~q ));
  50704. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .coord_x = 19;
  50705. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .coord_y = 11;
  50706. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .coord_z = 5;
  50707. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .mask = 16'hFF00;
  50708. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .modeMux = 1'b0;
  50709. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  50710. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  50711. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .BypassEn = 1'b0;
  50712. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  50713. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] (
  50714. .A(vcc),
  50715. .B(vcc),
  50716. .C(vcc),
  50717. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [4]),
  50718. .Cin(),
  50719. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~q ),
  50720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50721. .AsyncReset(AsyncReset_X59_Y11_GND),
  50722. .SyncReset(),
  50723. .ShiftData(),
  50724. .SyncLoad(),
  50725. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~feeder_combout ),
  50726. .Cout(),
  50727. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4]~q ));
  50728. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .coord_x = 19;
  50729. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .coord_y = 11;
  50730. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .coord_z = 12;
  50731. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .mask = 16'hFF00;
  50732. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .modeMux = 1'b0;
  50733. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  50734. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  50735. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .BypassEn = 1'b0;
  50736. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  50737. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] (
  50738. .A(vcc),
  50739. .B(vcc),
  50740. .C(vcc),
  50741. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5]),
  50742. .Cin(),
  50743. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~q ),
  50744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50745. .AsyncReset(AsyncReset_X59_Y11_GND),
  50746. .SyncReset(),
  50747. .ShiftData(),
  50748. .SyncLoad(),
  50749. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~feeder_combout ),
  50750. .Cout(),
  50751. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5]~q ));
  50752. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .coord_x = 19;
  50753. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .coord_y = 11;
  50754. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .coord_z = 3;
  50755. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .mask = 16'hFF00;
  50756. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .modeMux = 1'b0;
  50757. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  50758. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  50759. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .BypassEn = 1'b0;
  50760. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  50761. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] (
  50762. .A(vcc),
  50763. .B(vcc),
  50764. .C(vcc),
  50765. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6]),
  50766. .Cin(),
  50767. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~q ),
  50768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50769. .AsyncReset(AsyncReset_X59_Y11_GND),
  50770. .SyncReset(),
  50771. .ShiftData(),
  50772. .SyncLoad(),
  50773. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~feeder_combout ),
  50774. .Cout(),
  50775. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6]~q ));
  50776. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .coord_x = 19;
  50777. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .coord_y = 11;
  50778. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .coord_z = 11;
  50779. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .mask = 16'hFF00;
  50780. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .modeMux = 1'b0;
  50781. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  50782. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  50783. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .BypassEn = 1'b0;
  50784. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  50785. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] (
  50786. .A(),
  50787. .B(),
  50788. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7]),
  50789. .D(),
  50790. .Cin(),
  50791. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7]~q ),
  50792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout_X59_Y11_SIG_SIG ),
  50793. .AsyncReset(AsyncReset_X59_Y11_GND),
  50794. .SyncReset(SyncReset_X59_Y11_GND),
  50795. .ShiftData(),
  50796. .SyncLoad(SyncLoad_X59_Y11_VCC),
  50797. .LutOut(),
  50798. .Cout(),
  50799. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7]~q ));
  50800. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .coord_x = 19;
  50801. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .coord_y = 11;
  50802. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .coord_z = 8;
  50803. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .mask = 16'hFFFF;
  50804. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .modeMux = 1'b1;
  50805. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  50806. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  50807. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .BypassEn = 1'b1;
  50808. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  50809. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 (
  50810. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ),
  50811. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_sample~0_combout ),
  50812. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  50813. .D(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  50814. .Cin(),
  50815. .Qin(),
  50816. .Clk(),
  50817. .AsyncReset(),
  50818. .SyncReset(),
  50819. .ShiftData(),
  50820. .SyncLoad(),
  50821. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0_combout ),
  50822. .Cout(),
  50823. .Q());
  50824. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .coord_x = 18;
  50825. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .coord_y = 11;
  50826. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .coord_z = 3;
  50827. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .mask = 16'h0800;
  50828. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .modeMux = 1'b0;
  50829. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  50830. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .ShiftMux = 1'b0;
  50831. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .BypassEn = 1'b0;
  50832. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_fifo|wrreq~0 .CarryEnb = 1'b1;
  50833. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_idle (
  50834. .A(vcc),
  50835. .B(\macro_inst|u_uart[1]|u_rx[5]|always8~0_combout ),
  50836. .C(vcc),
  50837. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50838. .Cin(),
  50839. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_idle~q ),
  50840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  50841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  50842. .SyncReset(),
  50843. .ShiftData(),
  50844. .SyncLoad(),
  50845. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_idle~0_combout ),
  50846. .Cout(),
  50847. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_idle~q ));
  50848. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .coord_x = 18;
  50849. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .coord_y = 9;
  50850. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .coord_z = 8;
  50851. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .mask = 16'hCCFC;
  50852. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .modeMux = 1'b0;
  50853. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .FeedbackMux = 1'b1;
  50854. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .ShiftMux = 1'b0;
  50855. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .BypassEn = 1'b0;
  50856. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle .CarryEnb = 1'b1;
  50857. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en (
  50858. .A(vcc),
  50859. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_fifo|counter [0]),
  50860. .C(vcc),
  50861. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  50862. .Cin(),
  50863. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~q ),
  50864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y8_SIG_VCC ),
  50865. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y8_SIG ),
  50866. .SyncReset(),
  50867. .ShiftData(),
  50868. .SyncLoad(),
  50869. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~0_combout ),
  50870. .Cout(),
  50871. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_idle_en~q ));
  50872. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .coord_x = 15;
  50873. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .coord_y = 9;
  50874. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .coord_z = 3;
  50875. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .mask = 16'hCCFC;
  50876. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .modeMux = 1'b0;
  50877. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .FeedbackMux = 1'b1;
  50878. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .ShiftMux = 1'b0;
  50879. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .BypassEn = 1'b0;
  50880. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_idle_en .CarryEnb = 1'b1;
  50881. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] (
  50882. .A(vcc),
  50883. .B(vcc),
  50884. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  50885. .D(\SIM_IO[11]~input_o ),
  50886. .Cin(),
  50887. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_in [0]),
  50888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X52_Y3_SIG_SIG ),
  50889. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  50890. .SyncReset(),
  50891. .ShiftData(),
  50892. .SyncLoad(),
  50893. .LutOut(\macro_inst|uart_rxd [11]),
  50894. .Cout(),
  50895. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_in [0]));
  50896. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .coord_x = 17;
  50897. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .coord_y = 1;
  50898. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .coord_z = 8;
  50899. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .mask = 16'h000F;
  50900. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .modeMux = 1'b0;
  50901. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .FeedbackMux = 1'b0;
  50902. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .ShiftMux = 1'b0;
  50903. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .BypassEn = 1'b0;
  50904. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[0] .CarryEnb = 1'b1;
  50905. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] (
  50906. .A(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [3]),
  50907. .B(\macro_inst|u_uart[1]|u_rx[1]|rx_baud_cnt [0]),
  50908. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_in [0]),
  50909. .D(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  50910. .Cin(),
  50911. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_in [1]),
  50912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X52_Y3_SIG_SIG ),
  50913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X52_Y3_SIG ),
  50914. .SyncReset(SyncReset_X52_Y3_GND),
  50915. .ShiftData(),
  50916. .SyncLoad(SyncLoad_X52_Y3_VCC),
  50917. .LutOut(\macro_inst|u_uart[1]|u_rx[1]|always2~0_combout ),
  50918. .Cout(),
  50919. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_in [1]));
  50920. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .coord_x = 17;
  50921. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .coord_y = 1;
  50922. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .coord_z = 4;
  50923. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .mask = 16'h8800;
  50924. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .modeMux = 1'b0;
  50925. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .FeedbackMux = 1'b0;
  50926. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .ShiftMux = 1'b0;
  50927. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .BypassEn = 1'b1;
  50928. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[1] .CarryEnb = 1'b1;
  50929. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] (
  50930. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  50931. .B(vcc),
  50932. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_in [1]),
  50933. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  50934. .Cin(),
  50935. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_in [2]),
  50936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y11_SIG_SIG ),
  50937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  50938. .SyncReset(SyncReset_X60_Y11_GND),
  50939. .ShiftData(),
  50940. .SyncLoad(SyncLoad_X60_Y11_VCC),
  50941. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_sample~0_combout ),
  50942. .Cout(),
  50943. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_in [2]));
  50944. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .coord_x = 18;
  50945. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .coord_y = 11;
  50946. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .coord_z = 2;
  50947. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .mask = 16'h0055;
  50948. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .modeMux = 1'b0;
  50949. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .FeedbackMux = 1'b0;
  50950. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .ShiftMux = 1'b0;
  50951. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .BypassEn = 1'b1;
  50952. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[2] .CarryEnb = 1'b1;
  50953. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] (
  50954. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_in [2]),
  50955. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  50956. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_in [2]),
  50957. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_in [4]),
  50958. .Cin(),
  50959. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_in [3]),
  50960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y11_SIG_SIG ),
  50961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  50962. .SyncReset(SyncReset_X60_Y11_GND),
  50963. .ShiftData(),
  50964. .SyncLoad(SyncLoad_X60_Y11_VCC),
  50965. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout ),
  50966. .Cout(),
  50967. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_in [3]));
  50968. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .coord_x = 18;
  50969. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .coord_y = 11;
  50970. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .coord_z = 10;
  50971. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .mask = 16'h2032;
  50972. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .modeMux = 1'b0;
  50973. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .FeedbackMux = 1'b1;
  50974. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .ShiftMux = 1'b0;
  50975. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .BypassEn = 1'b1;
  50976. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[3] .CarryEnb = 1'b1;
  50977. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] (
  50978. .A(vcc),
  50979. .B(vcc),
  50980. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_in [3]),
  50981. .D(vcc),
  50982. .Cin(),
  50983. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_in [4]),
  50984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_baud|baud16~q_X60_Y9_SIG_SIG ),
  50985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  50986. .SyncReset(),
  50987. .ShiftData(),
  50988. .SyncLoad(),
  50989. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_in[4]~0_combout ),
  50990. .Cout(),
  50991. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_in [4]));
  50992. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .coord_x = 18;
  50993. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .coord_y = 10;
  50994. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .coord_z = 7;
  50995. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .mask = 16'h0F0F;
  50996. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .modeMux = 1'b0;
  50997. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .FeedbackMux = 1'b0;
  50998. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .ShiftMux = 1'b0;
  50999. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .BypassEn = 1'b0;
  51000. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_in[4] .CarryEnb = 1'b1;
  51001. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_parity (
  51002. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~0_combout ),
  51003. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  51004. .C(vcc),
  51005. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  51006. .Cin(),
  51007. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~q ),
  51008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  51009. .AsyncReset(AsyncReset_X61_Y10_GND),
  51010. .SyncReset(),
  51011. .ShiftData(),
  51012. .SyncLoad(),
  51013. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~1_combout ),
  51014. .Cout(),
  51015. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~q ));
  51016. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .coord_x = 17;
  51017. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .coord_y = 10;
  51018. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .coord_z = 0;
  51019. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .mask = 16'h12DE;
  51020. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .modeMux = 1'b0;
  51021. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .FeedbackMux = 1'b1;
  51022. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .ShiftMux = 1'b0;
  51023. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .BypassEn = 1'b0;
  51024. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_parity .CarryEnb = 1'b1;
  51025. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] (
  51026. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2]),
  51027. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3]),
  51028. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1]),
  51029. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1]),
  51030. .Cin(),
  51031. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [0]),
  51032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51034. .SyncReset(SyncReset_X60_Y11_GND),
  51035. .ShiftData(),
  51036. .SyncLoad(SyncLoad_X60_Y11_VCC),
  51037. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always11~1_combout ),
  51038. .Cout(),
  51039. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [0]));
  51040. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .coord_x = 18;
  51041. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .coord_y = 11;
  51042. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .coord_z = 14;
  51043. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .mask = 16'h0001;
  51044. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .modeMux = 1'b0;
  51045. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .FeedbackMux = 1'b1;
  51046. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .ShiftMux = 1'b0;
  51047. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .BypassEn = 1'b1;
  51048. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[0] .CarryEnb = 1'b1;
  51049. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] (
  51050. .A(vcc),
  51051. .B(vcc),
  51052. .C(vcc),
  51053. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2]),
  51054. .Cin(),
  51055. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1]),
  51056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51057. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51058. .SyncReset(),
  51059. .ShiftData(),
  51060. .SyncLoad(),
  51061. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1]~feeder_combout ),
  51062. .Cout(),
  51063. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [1]));
  51064. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .coord_x = 18;
  51065. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .coord_y = 11;
  51066. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .coord_z = 13;
  51067. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .mask = 16'hFF00;
  51068. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .modeMux = 1'b0;
  51069. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .FeedbackMux = 1'b0;
  51070. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .ShiftMux = 1'b0;
  51071. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .BypassEn = 1'b0;
  51072. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[1] .CarryEnb = 1'b1;
  51073. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] (
  51074. .A(vcc),
  51075. .B(vcc),
  51076. .C(vcc),
  51077. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3]),
  51078. .Cin(),
  51079. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2]),
  51080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51081. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51082. .SyncReset(),
  51083. .ShiftData(),
  51084. .SyncLoad(),
  51085. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2]~feeder_combout ),
  51086. .Cout(),
  51087. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [2]));
  51088. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .coord_x = 18;
  51089. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .coord_y = 11;
  51090. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .coord_z = 12;
  51091. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .mask = 16'hFF00;
  51092. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .modeMux = 1'b0;
  51093. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .FeedbackMux = 1'b0;
  51094. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .ShiftMux = 1'b0;
  51095. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .BypassEn = 1'b0;
  51096. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[2] .CarryEnb = 1'b1;
  51097. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] (
  51098. .A(vcc),
  51099. .B(vcc),
  51100. .C(vcc),
  51101. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [4]),
  51102. .Cin(),
  51103. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3]),
  51104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51106. .SyncReset(),
  51107. .ShiftData(),
  51108. .SyncLoad(),
  51109. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3]~feeder_combout ),
  51110. .Cout(),
  51111. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [3]));
  51112. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .coord_x = 18;
  51113. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .coord_y = 11;
  51114. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .coord_z = 1;
  51115. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .mask = 16'hFF00;
  51116. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .modeMux = 1'b0;
  51117. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .FeedbackMux = 1'b0;
  51118. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .ShiftMux = 1'b0;
  51119. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .BypassEn = 1'b0;
  51120. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[3] .CarryEnb = 1'b1;
  51121. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] (
  51122. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5]),
  51123. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7]),
  51124. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5]),
  51125. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6]),
  51126. .Cin(),
  51127. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [4]),
  51128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51130. .SyncReset(SyncReset_X60_Y11_GND),
  51131. .ShiftData(),
  51132. .SyncLoad(SyncLoad_X60_Y11_VCC),
  51133. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always11~0_combout ),
  51134. .Cout(),
  51135. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [4]));
  51136. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .coord_x = 18;
  51137. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .coord_y = 11;
  51138. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .coord_z = 9;
  51139. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .mask = 16'h0001;
  51140. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .modeMux = 1'b0;
  51141. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .FeedbackMux = 1'b1;
  51142. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .ShiftMux = 1'b0;
  51143. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .BypassEn = 1'b1;
  51144. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[4] .CarryEnb = 1'b1;
  51145. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] (
  51146. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [1]),
  51147. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_baud_cnt [2]),
  51148. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6]),
  51149. .D(\macro_inst|u_uart[1]|u_rx[5]|always2~0_combout ),
  51150. .Cin(),
  51151. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5]),
  51152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51154. .SyncReset(SyncReset_X60_Y11_GND),
  51155. .ShiftData(),
  51156. .SyncLoad(SyncLoad_X60_Y11_VCC),
  51157. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|always2~1_combout ),
  51158. .Cout(),
  51159. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [5]));
  51160. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .coord_x = 18;
  51161. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .coord_y = 11;
  51162. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .coord_z = 4;
  51163. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .mask = 16'h8800;
  51164. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .modeMux = 1'b0;
  51165. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .FeedbackMux = 1'b0;
  51166. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .ShiftMux = 1'b0;
  51167. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .BypassEn = 1'b1;
  51168. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[5] .CarryEnb = 1'b1;
  51169. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] (
  51170. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  51171. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  51172. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7]),
  51173. .D(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  51174. .Cin(),
  51175. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6]),
  51176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51178. .SyncReset(SyncReset_X60_Y11_GND),
  51179. .ShiftData(),
  51180. .SyncLoad(SyncLoad_X60_Y11_VCC),
  51181. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_parity~0_combout ),
  51182. .Cout(),
  51183. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [6]));
  51184. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .coord_x = 18;
  51185. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .coord_y = 11;
  51186. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .coord_z = 5;
  51187. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .mask = 16'h0080;
  51188. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .modeMux = 1'b0;
  51189. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .FeedbackMux = 1'b0;
  51190. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .ShiftMux = 1'b0;
  51191. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .BypassEn = 1'b1;
  51192. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[6] .CarryEnb = 1'b1;
  51193. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] (
  51194. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_in [3]),
  51195. .B(vcc),
  51196. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_in [2]),
  51197. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_in [4]),
  51198. .Cin(),
  51199. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7]),
  51200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_rx[5]|always4~2_combout_X60_Y11_SIG_SIG ),
  51201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y11_SIG ),
  51202. .SyncReset(),
  51203. .ShiftData(),
  51204. .SyncLoad(),
  51205. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Add1~0_combout ),
  51206. .Cout(),
  51207. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg [7]));
  51208. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .coord_x = 18;
  51209. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .coord_y = 11;
  51210. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .coord_z = 8;
  51211. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .mask = 16'h5F05;
  51212. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .modeMux = 1'b0;
  51213. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .FeedbackMux = 1'b0;
  51214. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .ShiftMux = 1'b0;
  51215. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .BypassEn = 1'b0;
  51216. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_shift_reg[7] .CarryEnb = 1'b1;
  51217. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA (
  51218. .A(\macro_inst|u_uart[1]|u_rx[5]|Selector2~5_combout ),
  51219. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  51220. .C(\macro_inst|u_uart[1]|u_rx[5]|Selector2~3_combout ),
  51221. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector2~2_combout ),
  51222. .Cin(),
  51223. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  51224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  51225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  51226. .SyncReset(),
  51227. .ShiftData(),
  51228. .SyncLoad(),
  51229. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector2~6_combout ),
  51230. .Cout(),
  51231. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ));
  51232. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .coord_x = 17;
  51233. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .coord_y = 11;
  51234. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .coord_z = 7;
  51235. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .mask = 16'h00EA;
  51236. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .modeMux = 1'b0;
  51237. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .FeedbackMux = 1'b0;
  51238. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .ShiftMux = 1'b0;
  51239. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .BypassEn = 1'b0;
  51240. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA .CarryEnb = 1'b1;
  51241. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE (
  51242. .A(vcc),
  51243. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  51244. .C(\macro_inst|u_uart[1]|u_rx[5]|Selector0~0_combout ),
  51245. .D(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  51246. .Cin(),
  51247. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ),
  51248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  51249. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  51250. .SyncReset(SyncReset_X61_Y11_GND),
  51251. .ShiftData(),
  51252. .SyncLoad(SyncLoad_X61_Y11_VCC),
  51253. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector3~0_combout ),
  51254. .Cout(),
  51255. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE~q ));
  51256. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .coord_x = 17;
  51257. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .coord_y = 11;
  51258. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .coord_z = 9;
  51259. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .mask = 16'hCC00;
  51260. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .modeMux = 1'b0;
  51261. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .FeedbackMux = 1'b0;
  51262. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .ShiftMux = 1'b0;
  51263. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .BypassEn = 1'b1;
  51264. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_IDLE .CarryEnb = 1'b1;
  51265. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY (
  51266. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0_combout ),
  51267. .B(\macro_inst|u_uart[1]|u_rx[5]|Selector3~1_combout ),
  51268. .C(vcc),
  51269. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector4~4_combout ),
  51270. .Cin(),
  51271. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  51272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  51273. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  51274. .SyncReset(),
  51275. .ShiftData(),
  51276. .SyncLoad(),
  51277. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~1_combout ),
  51278. .Cout(),
  51279. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ));
  51280. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .coord_x = 17;
  51281. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .coord_y = 11;
  51282. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .coord_z = 8;
  51283. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .mask = 16'h88F8;
  51284. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .modeMux = 1'b0;
  51285. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .FeedbackMux = 1'b1;
  51286. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .ShiftMux = 1'b0;
  51287. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .BypassEn = 1'b0;
  51288. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY .CarryEnb = 1'b1;
  51289. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 (
  51290. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~q ),
  51291. .B(vcc),
  51292. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  51293. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  51294. .Cin(),
  51295. .Qin(),
  51296. .Clk(),
  51297. .AsyncReset(),
  51298. .SyncReset(),
  51299. .ShiftData(),
  51300. .SyncLoad(),
  51301. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0_combout ),
  51302. .Cout(),
  51303. .Q());
  51304. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .coord_x = 17;
  51305. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .coord_y = 11;
  51306. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .coord_z = 0;
  51307. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .mask = 16'h5F00;
  51308. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .modeMux = 1'b0;
  51309. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .FeedbackMux = 1'b0;
  51310. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .ShiftMux = 1'b0;
  51311. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .BypassEn = 1'b0;
  51312. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_PARITY~0 .CarryEnb = 1'b1;
  51313. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START (
  51314. .A(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout ),
  51315. .B(\macro_inst|u_uart[1]|u_rx[5]|Selector2~4_combout ),
  51316. .C(vcc),
  51317. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector2~2_combout ),
  51318. .Cin(),
  51319. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ),
  51320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  51321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  51322. .SyncReset(),
  51323. .ShiftData(),
  51324. .SyncLoad(),
  51325. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|Selector1~0_combout ),
  51326. .Cout(),
  51327. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START~q ));
  51328. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .coord_x = 17;
  51329. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .coord_y = 11;
  51330. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .coord_z = 2;
  51331. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .mask = 16'h00BA;
  51332. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .modeMux = 1'b0;
  51333. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .FeedbackMux = 1'b1;
  51334. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .ShiftMux = 1'b0;
  51335. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .BypassEn = 1'b0;
  51336. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_START .CarryEnb = 1'b1;
  51337. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP (
  51338. .A(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0_combout ),
  51339. .B(\macro_inst|u_uart[1]|u_rx[5]|Selector3~0_combout ),
  51340. .C(vcc),
  51341. .D(\macro_inst|u_uart[1]|u_rx[5]|Selector4~4_combout ),
  51342. .Cin(),
  51343. .Qin(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ),
  51344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y11_SIG_VCC ),
  51345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y11_SIG ),
  51346. .SyncReset(),
  51347. .ShiftData(),
  51348. .SyncLoad(),
  51349. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~1_combout ),
  51350. .Cout(),
  51351. .Q(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~q ));
  51352. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .coord_x = 17;
  51353. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .coord_y = 11;
  51354. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .coord_z = 13;
  51355. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .mask = 16'hEEF0;
  51356. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .modeMux = 1'b0;
  51357. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .FeedbackMux = 1'b1;
  51358. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .ShiftMux = 1'b0;
  51359. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .BypassEn = 1'b0;
  51360. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP .CarryEnb = 1'b1;
  51361. alta_slice \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 (
  51362. .A(\macro_inst|u_uart[1]|u_rx[5]|always3~1_combout ),
  51363. .B(\macro_inst|u_uart[1]|u_rx[5]|rx_bit~q ),
  51364. .C(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_DATA~q ),
  51365. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  51366. .Cin(),
  51367. .Qin(),
  51368. .Clk(),
  51369. .AsyncReset(),
  51370. .SyncReset(),
  51371. .ShiftData(),
  51372. .SyncLoad(),
  51373. .LutOut(\macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0_combout ),
  51374. .Cout(),
  51375. .Q());
  51376. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .coord_x = 17;
  51377. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .coord_y = 11;
  51378. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .coord_z = 6;
  51379. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .mask = 16'h0080;
  51380. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .modeMux = 1'b0;
  51381. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .FeedbackMux = 1'b0;
  51382. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .ShiftMux = 1'b0;
  51383. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .BypassEn = 1'b0;
  51384. defparam \macro_inst|u_uart[1]|u_rx[5]|rx_state.UART_STOP~0 .CarryEnb = 1'b1;
  51385. alta_slice \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 (
  51386. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ),
  51387. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  51388. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ),
  51389. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51390. .Cin(),
  51391. .Qin(),
  51392. .Clk(),
  51393. .AsyncReset(),
  51394. .SyncReset(),
  51395. .ShiftData(),
  51396. .SyncLoad(),
  51397. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector4~0_combout ),
  51398. .Cout(),
  51399. .Q());
  51400. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .coord_x = 19;
  51401. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .coord_y = 3;
  51402. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .coord_z = 12;
  51403. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .mask = 16'hEACC;
  51404. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .modeMux = 1'b0;
  51405. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .FeedbackMux = 1'b0;
  51406. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .ShiftMux = 1'b0;
  51407. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .BypassEn = 1'b0;
  51408. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector4~0 .CarryEnb = 1'b1;
  51409. alta_slice \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 (
  51410. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  51411. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~q ),
  51412. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ),
  51413. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0]),
  51414. .Cin(),
  51415. .Qin(),
  51416. .Clk(),
  51417. .AsyncReset(),
  51418. .SyncReset(),
  51419. .ShiftData(),
  51420. .SyncLoad(),
  51421. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector5~2_combout ),
  51422. .Cout(),
  51423. .Q());
  51424. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .coord_x = 19;
  51425. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .coord_y = 3;
  51426. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .coord_z = 4;
  51427. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .mask = 16'hEAC0;
  51428. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .modeMux = 1'b0;
  51429. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .FeedbackMux = 1'b0;
  51430. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .ShiftMux = 1'b0;
  51431. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .BypassEn = 1'b0;
  51432. defparam \macro_inst|u_uart[1]|u_tx[0]|Selector5~2 .CarryEnb = 1'b1;
  51433. alta_slice \macro_inst|u_uart[1]|u_tx[0]|always0~0 (
  51434. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [2]),
  51435. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [1]),
  51436. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0]),
  51437. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51438. .Cin(),
  51439. .Qin(),
  51440. .Clk(),
  51441. .AsyncReset(),
  51442. .SyncReset(),
  51443. .ShiftData(),
  51444. .SyncLoad(),
  51445. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ),
  51446. .Cout(),
  51447. .Q());
  51448. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .coord_x = 20;
  51449. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .coord_y = 3;
  51450. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .coord_z = 15;
  51451. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .mask = 16'h0100;
  51452. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .modeMux = 1'b0;
  51453. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .FeedbackMux = 1'b0;
  51454. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .ShiftMux = 1'b0;
  51455. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .BypassEn = 1'b0;
  51456. defparam \macro_inst|u_uart[1]|u_tx[0]|always0~0 .CarryEnb = 1'b1;
  51457. alta_slice \macro_inst|u_uart[1]|u_tx[0]|always6~0 (
  51458. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  51459. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [0]),
  51460. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [1]),
  51461. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [2]),
  51462. .Cin(),
  51463. .Qin(),
  51464. .Clk(),
  51465. .AsyncReset(),
  51466. .SyncReset(),
  51467. .ShiftData(),
  51468. .SyncLoad(),
  51469. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|always6~0_combout ),
  51470. .Cout(),
  51471. .Q());
  51472. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .coord_x = 20;
  51473. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .coord_y = 3;
  51474. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .coord_z = 12;
  51475. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .mask = 16'h8000;
  51476. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .modeMux = 1'b0;
  51477. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .FeedbackMux = 1'b0;
  51478. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .ShiftMux = 1'b0;
  51479. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .BypassEn = 1'b0;
  51480. defparam \macro_inst|u_uart[1]|u_tx[0]|always6~0 .CarryEnb = 1'b1;
  51481. alta_slice \macro_inst|u_uart[1]|u_tx[0]|comb~1 (
  51482. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ),
  51483. .B(vcc),
  51484. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  51485. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51486. .Cin(),
  51487. .Qin(),
  51488. .Clk(),
  51489. .AsyncReset(),
  51490. .SyncReset(),
  51491. .ShiftData(),
  51492. .SyncLoad(),
  51493. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  51494. .Cout(),
  51495. .Q());
  51496. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .coord_x = 19;
  51497. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .coord_y = 3;
  51498. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .coord_z = 13;
  51499. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .mask = 16'h5000;
  51500. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .modeMux = 1'b0;
  51501. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .FeedbackMux = 1'b0;
  51502. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .ShiftMux = 1'b0;
  51503. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .BypassEn = 1'b0;
  51504. defparam \macro_inst|u_uart[1]|u_tx[0]|comb~1 .CarryEnb = 1'b1;
  51505. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] (
  51506. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  51507. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [0]),
  51508. .C(vcc),
  51509. .D(vcc),
  51510. .Cin(),
  51511. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [0]),
  51512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  51514. .SyncReset(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ),
  51515. .ShiftData(),
  51516. .SyncLoad(SyncLoad_X57_Y9_GND),
  51517. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0]~4_combout ),
  51518. .Cout(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0]~5 ),
  51519. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [0]));
  51520. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .coord_x = 20;
  51521. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .coord_y = 3;
  51522. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .coord_z = 7;
  51523. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .mask = 16'h6688;
  51524. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .modeMux = 1'b0;
  51525. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  51526. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  51527. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .BypassEn = 1'b1;
  51528. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  51529. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] (
  51530. .A(vcc),
  51531. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [1]),
  51532. .C(vcc),
  51533. .D(vcc),
  51534. .Cin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[0]~5 ),
  51535. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [1]),
  51536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  51538. .SyncReset(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ),
  51539. .ShiftData(),
  51540. .SyncLoad(SyncLoad_X57_Y9_GND),
  51541. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1]~6_combout ),
  51542. .Cout(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1]~7 ),
  51543. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [1]));
  51544. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .coord_x = 20;
  51545. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .coord_y = 3;
  51546. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .coord_z = 8;
  51547. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .mask = 16'h3C3F;
  51548. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .modeMux = 1'b1;
  51549. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  51550. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  51551. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .BypassEn = 1'b1;
  51552. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  51553. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] (
  51554. .A(vcc),
  51555. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [2]),
  51556. .C(vcc),
  51557. .D(vcc),
  51558. .Cin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[1]~7 ),
  51559. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [2]),
  51560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  51562. .SyncReset(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ),
  51563. .ShiftData(),
  51564. .SyncLoad(SyncLoad_X57_Y9_GND),
  51565. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2]~8_combout ),
  51566. .Cout(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2]~9 ),
  51567. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [2]));
  51568. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .coord_x = 20;
  51569. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .coord_y = 3;
  51570. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .coord_z = 9;
  51571. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .mask = 16'hC30C;
  51572. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .modeMux = 1'b1;
  51573. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  51574. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  51575. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .BypassEn = 1'b1;
  51576. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  51577. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] (
  51578. .A(vcc),
  51579. .B(vcc),
  51580. .C(vcc),
  51581. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [3]),
  51582. .Cin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[2]~9 ),
  51583. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [3]),
  51584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  51586. .SyncReset(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ),
  51587. .ShiftData(),
  51588. .SyncLoad(SyncLoad_X57_Y9_GND),
  51589. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3]~10_combout ),
  51590. .Cout(),
  51591. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [3]));
  51592. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .coord_x = 20;
  51593. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .coord_y = 3;
  51594. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .coord_z = 10;
  51595. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .mask = 16'h0FF0;
  51596. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .modeMux = 1'b1;
  51597. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  51598. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  51599. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .BypassEn = 1'b1;
  51600. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  51601. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_bit (
  51602. .A(vcc),
  51603. .B(vcc),
  51604. .C(\macro_inst|u_uart[1]|u_tx[0]|always6~0_combout ),
  51605. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_baud_cnt [3]),
  51606. .Cin(),
  51607. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  51610. .SyncReset(),
  51611. .ShiftData(),
  51612. .SyncLoad(),
  51613. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|always6~1_combout ),
  51614. .Cout(),
  51615. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ));
  51616. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .coord_x = 20;
  51617. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .coord_y = 3;
  51618. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .coord_z = 11;
  51619. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .mask = 16'hF000;
  51620. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .modeMux = 1'b0;
  51621. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .FeedbackMux = 1'b0;
  51622. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .ShiftMux = 1'b0;
  51623. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .BypassEn = 1'b0;
  51624. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_bit .CarryEnb = 1'b1;
  51625. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_complete (
  51626. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  51627. .B(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  51628. .C(vcc),
  51629. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[0]~12_combout ),
  51630. .Cin(),
  51631. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_complete~q ),
  51632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y6_SIG_VCC ),
  51633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y6_SIG ),
  51634. .SyncReset(),
  51635. .ShiftData(),
  51636. .SyncLoad(),
  51637. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_complete~0_combout ),
  51638. .Cout(),
  51639. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_complete~q ));
  51640. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .coord_x = 18;
  51641. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .coord_y = 3;
  51642. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .coord_z = 15;
  51643. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .mask = 16'h5444;
  51644. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .modeMux = 1'b0;
  51645. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .FeedbackMux = 1'b1;
  51646. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .ShiftMux = 1'b0;
  51647. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .BypassEn = 1'b0;
  51648. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_complete .CarryEnb = 1'b1;
  51649. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] (
  51650. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  51651. .B(vcc),
  51652. .C(vcc),
  51653. .D(vcc),
  51654. .Cin(),
  51655. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0]),
  51656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout_X57_Y9_SIG_SIG ),
  51657. .AsyncReset(AsyncReset_X57_Y9_GND),
  51658. .SyncReset(),
  51659. .ShiftData(),
  51660. .SyncLoad(),
  51661. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~2_combout ),
  51662. .Cout(),
  51663. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0]));
  51664. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .coord_x = 20;
  51665. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .coord_y = 3;
  51666. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .coord_z = 4;
  51667. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .mask = 16'hAFAF;
  51668. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .modeMux = 1'b0;
  51669. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  51670. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .ShiftMux = 1'b0;
  51671. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .BypassEn = 1'b0;
  51672. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[0] .CarryEnb = 1'b1;
  51673. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] (
  51674. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  51675. .B(vcc),
  51676. .C(vcc),
  51677. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0]),
  51678. .Cin(),
  51679. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [1]),
  51680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout_X57_Y9_SIG_SIG ),
  51681. .AsyncReset(AsyncReset_X57_Y9_GND),
  51682. .SyncReset(),
  51683. .ShiftData(),
  51684. .SyncLoad(),
  51685. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~0_combout ),
  51686. .Cout(),
  51687. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [1]));
  51688. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .coord_x = 20;
  51689. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .coord_y = 3;
  51690. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .coord_z = 3;
  51691. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .mask = 16'hFAAF;
  51692. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .modeMux = 1'b0;
  51693. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  51694. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .ShiftMux = 1'b0;
  51695. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .BypassEn = 1'b0;
  51696. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[1] .CarryEnb = 1'b1;
  51697. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] (
  51698. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  51699. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [0]),
  51700. .C(vcc),
  51701. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [1]),
  51702. .Cin(),
  51703. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [2]),
  51704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2]~1_combout_X57_Y9_SIG_SIG ),
  51705. .AsyncReset(AsyncReset_X57_Y9_GND),
  51706. .SyncReset(),
  51707. .ShiftData(),
  51708. .SyncLoad(),
  51709. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt~3_combout ),
  51710. .Cout(),
  51711. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt [2]));
  51712. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .coord_x = 20;
  51713. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .coord_y = 3;
  51714. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .coord_z = 6;
  51715. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .mask = 16'hFAEB;
  51716. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .modeMux = 1'b0;
  51717. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  51718. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .ShiftMux = 1'b0;
  51719. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .BypassEn = 1'b0;
  51720. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_data_cnt[2] .CarryEnb = 1'b1;
  51721. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] (
  51722. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  51723. .B(\macro_inst|u_uart[1]|u_regs|tx_write [0]),
  51724. .C(vcc),
  51725. .D(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  51726. .Cin(),
  51727. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  51728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  51729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  51730. .SyncReset(),
  51731. .ShiftData(),
  51732. .SyncLoad(),
  51733. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter~0_combout ),
  51734. .Cout(),
  51735. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]));
  51736. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .coord_x = 19;
  51737. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .coord_y = 4;
  51738. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .coord_z = 4;
  51739. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .mask = 16'h0CAC;
  51740. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .modeMux = 1'b0;
  51741. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  51742. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  51743. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .BypassEn = 1'b0;
  51744. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  51745. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] (
  51746. .A(),
  51747. .B(),
  51748. .C(vcc),
  51749. .D(\rv32.mem_ahb_hwdata[0] ),
  51750. .Cin(),
  51751. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]~q ),
  51752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51753. .AsyncReset(AsyncReset_X57_Y12_GND),
  51754. .SyncReset(),
  51755. .ShiftData(),
  51756. .SyncLoad(),
  51757. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  51758. .Cout(),
  51759. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]~q ));
  51760. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .coord_x = 20;
  51761. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .coord_y = 4;
  51762. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .coord_z = 15;
  51763. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  51764. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  51765. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  51766. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  51767. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  51768. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  51769. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] (
  51770. .A(),
  51771. .B(),
  51772. .C(vcc),
  51773. .D(\rv32.mem_ahb_hwdata[1] ),
  51774. .Cin(),
  51775. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]~q ),
  51776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51777. .AsyncReset(AsyncReset_X57_Y12_GND),
  51778. .SyncReset(),
  51779. .ShiftData(),
  51780. .SyncLoad(),
  51781. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  51782. .Cout(),
  51783. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]~q ));
  51784. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .coord_x = 20;
  51785. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .coord_y = 4;
  51786. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .coord_z = 11;
  51787. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  51788. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  51789. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  51790. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  51791. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  51792. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  51793. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] (
  51794. .A(),
  51795. .B(),
  51796. .C(vcc),
  51797. .D(\rv32.mem_ahb_hwdata[2] ),
  51798. .Cin(),
  51799. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]~q ),
  51800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51801. .AsyncReset(AsyncReset_X57_Y12_GND),
  51802. .SyncReset(),
  51803. .ShiftData(),
  51804. .SyncLoad(),
  51805. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  51806. .Cout(),
  51807. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]~q ));
  51808. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .coord_x = 20;
  51809. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .coord_y = 4;
  51810. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .coord_z = 13;
  51811. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  51812. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  51813. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  51814. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  51815. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  51816. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  51817. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] (
  51818. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  51819. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51820. .C(\rv32.mem_ahb_hwdata[3] ),
  51821. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  51822. .Cin(),
  51823. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3]~q ),
  51824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51825. .AsyncReset(AsyncReset_X57_Y12_GND),
  51826. .SyncReset(SyncReset_X57_Y12_GND),
  51827. .ShiftData(),
  51828. .SyncLoad(SyncLoad_X57_Y12_VCC),
  51829. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout ),
  51830. .Cout(),
  51831. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3]~q ));
  51832. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .coord_x = 20;
  51833. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .coord_y = 4;
  51834. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .coord_z = 0;
  51835. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .mask = 16'hFF88;
  51836. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .modeMux = 1'b0;
  51837. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  51838. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  51839. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .BypassEn = 1'b1;
  51840. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  51841. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] (
  51842. .A(),
  51843. .B(),
  51844. .C(vcc),
  51845. .D(\rv32.mem_ahb_hwdata[4] ),
  51846. .Cin(),
  51847. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]~q ),
  51848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51849. .AsyncReset(AsyncReset_X57_Y12_GND),
  51850. .SyncReset(),
  51851. .ShiftData(),
  51852. .SyncLoad(),
  51853. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  51854. .Cout(),
  51855. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]~q ));
  51856. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .coord_x = 20;
  51857. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .coord_y = 4;
  51858. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .coord_z = 9;
  51859. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  51860. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  51861. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  51862. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  51863. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  51864. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  51865. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] (
  51866. .A(),
  51867. .B(),
  51868. .C(vcc),
  51869. .D(\rv32.mem_ahb_hwdata[5] ),
  51870. .Cin(),
  51871. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]~q ),
  51872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51873. .AsyncReset(AsyncReset_X57_Y12_GND),
  51874. .SyncReset(),
  51875. .ShiftData(),
  51876. .SyncLoad(),
  51877. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  51878. .Cout(),
  51879. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]~q ));
  51880. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .coord_x = 20;
  51881. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .coord_y = 4;
  51882. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .coord_z = 3;
  51883. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  51884. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  51885. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  51886. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  51887. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  51888. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  51889. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] (
  51890. .A(),
  51891. .B(),
  51892. .C(vcc),
  51893. .D(\rv32.mem_ahb_hwdata[6] ),
  51894. .Cin(),
  51895. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]~q ),
  51896. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51897. .AsyncReset(AsyncReset_X57_Y12_GND),
  51898. .SyncReset(),
  51899. .ShiftData(),
  51900. .SyncLoad(),
  51901. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  51902. .Cout(),
  51903. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]~q ));
  51904. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .coord_x = 20;
  51905. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .coord_y = 4;
  51906. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .coord_z = 6;
  51907. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  51908. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  51909. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  51910. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  51911. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  51912. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  51913. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] (
  51914. .A(),
  51915. .B(),
  51916. .C(vcc),
  51917. .D(\rv32.mem_ahb_hwdata[7] ),
  51918. .Cin(),
  51919. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]~q ),
  51920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_fifo|wrreq~0_combout_X57_Y12_SIG_SIG ),
  51921. .AsyncReset(AsyncReset_X57_Y12_GND),
  51922. .SyncReset(),
  51923. .ShiftData(),
  51924. .SyncLoad(),
  51925. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  51926. .Cout(),
  51927. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]~q ));
  51928. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .coord_x = 20;
  51929. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .coord_y = 4;
  51930. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .coord_z = 14;
  51931. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  51932. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  51933. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  51934. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  51935. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  51936. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  51937. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_parity (
  51938. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  51939. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~0_combout ),
  51940. .C(vcc),
  51941. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  51942. .Cin(),
  51943. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~q ),
  51944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  51945. .AsyncReset(AsyncReset_X57_Y9_GND),
  51946. .SyncReset(),
  51947. .ShiftData(),
  51948. .SyncLoad(),
  51949. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~1_combout ),
  51950. .Cout(),
  51951. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~q ));
  51952. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .coord_x = 20;
  51953. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .coord_y = 3;
  51954. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .coord_z = 13;
  51955. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .mask = 16'h14BE;
  51956. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .modeMux = 1'b0;
  51957. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .FeedbackMux = 1'b1;
  51958. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .ShiftMux = 1'b0;
  51959. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .BypassEn = 1'b0;
  51960. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity .CarryEnb = 1'b1;
  51961. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 (
  51962. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  51963. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  51964. .C(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  51965. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0]),
  51966. .Cin(),
  51967. .Qin(),
  51968. .Clk(),
  51969. .AsyncReset(),
  51970. .SyncReset(),
  51971. .ShiftData(),
  51972. .SyncLoad(),
  51973. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_parity~0_combout ),
  51974. .Cout(),
  51975. .Q());
  51976. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .coord_x = 19;
  51977. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .coord_y = 3;
  51978. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .coord_z = 5;
  51979. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .mask = 16'h0800;
  51980. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .modeMux = 1'b0;
  51981. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .FeedbackMux = 1'b0;
  51982. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .ShiftMux = 1'b0;
  51983. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .BypassEn = 1'b0;
  51984. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_parity~0 .CarryEnb = 1'b1;
  51985. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] (
  51986. .A(vcc),
  51987. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][0]~q ),
  51988. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [1]),
  51989. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  51990. .Cin(),
  51991. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0]),
  51992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  51993. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  51994. .SyncReset(),
  51995. .ShiftData(),
  51996. .SyncLoad(),
  51997. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~0_combout ),
  51998. .Cout(),
  51999. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0]));
  52000. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .coord_x = 20;
  52001. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .coord_y = 4;
  52002. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .coord_z = 7;
  52003. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .mask = 16'hCCF0;
  52004. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .modeMux = 1'b0;
  52005. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  52006. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .ShiftMux = 1'b0;
  52007. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .BypassEn = 1'b0;
  52008. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[0] .CarryEnb = 1'b1;
  52009. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] (
  52010. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [2]),
  52011. .B(vcc),
  52012. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][1]~q ),
  52013. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52014. .Cin(),
  52015. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [1]),
  52016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52017. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52018. .SyncReset(),
  52019. .ShiftData(),
  52020. .SyncLoad(),
  52021. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~2_combout ),
  52022. .Cout(),
  52023. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [1]));
  52024. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .coord_x = 20;
  52025. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .coord_y = 4;
  52026. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .coord_z = 10;
  52027. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .mask = 16'hF0AA;
  52028. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .modeMux = 1'b0;
  52029. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  52030. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .ShiftMux = 1'b0;
  52031. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .BypassEn = 1'b0;
  52032. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[1] .CarryEnb = 1'b1;
  52033. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] (
  52034. .A(vcc),
  52035. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [3]),
  52036. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][2]~q ),
  52037. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52038. .Cin(),
  52039. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [2]),
  52040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52041. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52042. .SyncReset(),
  52043. .ShiftData(),
  52044. .SyncLoad(),
  52045. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~3_combout ),
  52046. .Cout(),
  52047. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [2]));
  52048. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .coord_x = 20;
  52049. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .coord_y = 4;
  52050. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .coord_z = 12;
  52051. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .mask = 16'hF0CC;
  52052. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .modeMux = 1'b0;
  52053. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  52054. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .ShiftMux = 1'b0;
  52055. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .BypassEn = 1'b0;
  52056. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[2] .CarryEnb = 1'b1;
  52057. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] (
  52058. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [4]),
  52059. .B(vcc),
  52060. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][3]~q ),
  52061. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52062. .Cin(),
  52063. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [3]),
  52064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52065. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52066. .SyncReset(),
  52067. .ShiftData(),
  52068. .SyncLoad(),
  52069. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~4_combout ),
  52070. .Cout(),
  52071. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [3]));
  52072. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .coord_x = 20;
  52073. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .coord_y = 4;
  52074. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .coord_z = 1;
  52075. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .mask = 16'hF0AA;
  52076. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .modeMux = 1'b0;
  52077. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  52078. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .ShiftMux = 1'b0;
  52079. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .BypassEn = 1'b0;
  52080. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[3] .CarryEnb = 1'b1;
  52081. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] (
  52082. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [5]),
  52083. .B(vcc),
  52084. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][4]~q ),
  52085. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52086. .Cin(),
  52087. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [4]),
  52088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52089. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52090. .SyncReset(),
  52091. .ShiftData(),
  52092. .SyncLoad(),
  52093. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~5_combout ),
  52094. .Cout(),
  52095. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [4]));
  52096. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .coord_x = 20;
  52097. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .coord_y = 4;
  52098. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .coord_z = 8;
  52099. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .mask = 16'hF0AA;
  52100. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .modeMux = 1'b0;
  52101. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  52102. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .ShiftMux = 1'b0;
  52103. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .BypassEn = 1'b0;
  52104. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[4] .CarryEnb = 1'b1;
  52105. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] (
  52106. .A(vcc),
  52107. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [6]),
  52108. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][5]~q ),
  52109. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52110. .Cin(),
  52111. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [5]),
  52112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52113. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52114. .SyncReset(),
  52115. .ShiftData(),
  52116. .SyncLoad(),
  52117. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~6_combout ),
  52118. .Cout(),
  52119. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [5]));
  52120. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .coord_x = 20;
  52121. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .coord_y = 4;
  52122. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .coord_z = 2;
  52123. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .mask = 16'hF0CC;
  52124. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .modeMux = 1'b0;
  52125. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  52126. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .ShiftMux = 1'b0;
  52127. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .BypassEn = 1'b0;
  52128. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5] .CarryEnb = 1'b1;
  52129. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] (
  52130. .A(vcc),
  52131. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [7]),
  52132. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][6]~q ),
  52133. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52134. .Cin(),
  52135. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [6]),
  52136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52137. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52138. .SyncReset(),
  52139. .ShiftData(),
  52140. .SyncLoad(),
  52141. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~7_combout ),
  52142. .Cout(),
  52143. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [6]));
  52144. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .coord_x = 20;
  52145. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .coord_y = 4;
  52146. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .coord_z = 5;
  52147. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .mask = 16'hF0CC;
  52148. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .modeMux = 1'b0;
  52149. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  52150. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .ShiftMux = 1'b0;
  52151. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .BypassEn = 1'b0;
  52152. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[6] .CarryEnb = 1'b1;
  52153. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] (
  52154. .A(vcc),
  52155. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [0]),
  52156. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|fifo[1][7]~q ),
  52157. .D(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52158. .Cin(),
  52159. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [7]),
  52160. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[5]~1_combout_X57_Y12_SIG_SIG ),
  52161. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y12_SIG ),
  52162. .SyncReset(),
  52163. .ShiftData(),
  52164. .SyncLoad(),
  52165. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg~8_combout ),
  52166. .Cout(),
  52167. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg [7]));
  52168. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .coord_x = 20;
  52169. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .coord_y = 4;
  52170. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .coord_z = 4;
  52171. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .mask = 16'hF0CC;
  52172. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .modeMux = 1'b0;
  52173. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  52174. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .ShiftMux = 1'b0;
  52175. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .BypassEn = 1'b0;
  52176. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_shift_reg[7] .CarryEnb = 1'b1;
  52177. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA (
  52178. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  52179. .B(\macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ),
  52180. .C(vcc),
  52181. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  52182. .Cin(),
  52183. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  52184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  52185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  52186. .SyncReset(),
  52187. .ShiftData(),
  52188. .SyncLoad(),
  52189. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector2~0_combout ),
  52190. .Cout(),
  52191. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ));
  52192. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .coord_x = 20;
  52193. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .coord_y = 3;
  52194. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .coord_z = 1;
  52195. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .mask = 16'hBA30;
  52196. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .modeMux = 1'b0;
  52197. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  52198. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .ShiftMux = 1'b0;
  52199. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .BypassEn = 1'b0;
  52200. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA .CarryEnb = 1'b1;
  52201. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE (
  52202. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_fifo|counter [0]),
  52203. .B(vcc),
  52204. .C(vcc),
  52205. .D(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  52206. .Cin(),
  52207. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  52208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y8_SIG_VCC ),
  52209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y8_SIG ),
  52210. .SyncReset(),
  52211. .ShiftData(),
  52212. .SyncLoad(),
  52213. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector0~0_combout ),
  52214. .Cout(),
  52215. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ));
  52216. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .coord_x = 20;
  52217. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .coord_y = 8;
  52218. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .coord_z = 0;
  52219. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .mask = 16'hAAFA;
  52220. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .modeMux = 1'b0;
  52221. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  52222. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  52223. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .BypassEn = 1'b0;
  52224. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  52225. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY (
  52226. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  52227. .B(\macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ),
  52228. .C(\macro_inst|u_uart[1]|u_tx[0]|Selector3~0_combout ),
  52229. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  52230. .Cin(),
  52231. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ),
  52232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  52233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  52234. .SyncReset(),
  52235. .ShiftData(),
  52236. .SyncLoad(),
  52237. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector3~1_combout ),
  52238. .Cout(),
  52239. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY~q ));
  52240. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .coord_x = 20;
  52241. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .coord_y = 3;
  52242. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .coord_z = 5;
  52243. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .mask = 16'hF8F0;
  52244. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .modeMux = 1'b0;
  52245. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  52246. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  52247. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .BypassEn = 1'b0;
  52248. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  52249. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START (
  52250. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0_combout ),
  52251. .B(\macro_inst|u_uart[1]|u_tx[0]|fifo_rden~combout ),
  52252. .C(vcc),
  52253. .D(\macro_inst|u_uart[1]|u_tx[0]|comb~1_combout ),
  52254. .Cin(),
  52255. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  52256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  52257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  52258. .SyncReset(),
  52259. .ShiftData(),
  52260. .SyncLoad(),
  52261. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~1_combout ),
  52262. .Cout(),
  52263. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ));
  52264. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .coord_x = 20;
  52265. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .coord_y = 3;
  52266. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .coord_z = 14;
  52267. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .mask = 16'hCCEC;
  52268. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .modeMux = 1'b0;
  52269. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .FeedbackMux = 1'b1;
  52270. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .ShiftMux = 1'b0;
  52271. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .BypassEn = 1'b0;
  52272. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START .CarryEnb = 1'b1;
  52273. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 (
  52274. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  52275. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  52276. .C(\macro_inst|u_uart[1]|u_tx[0]|Selector5~3_combout ),
  52277. .D(\macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ),
  52278. .Cin(),
  52279. .Qin(),
  52280. .Clk(),
  52281. .AsyncReset(),
  52282. .SyncReset(),
  52283. .ShiftData(),
  52284. .SyncLoad(),
  52285. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0_combout ),
  52286. .Cout(),
  52287. .Q());
  52288. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .coord_x = 20;
  52289. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .coord_y = 3;
  52290. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .coord_z = 2;
  52291. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .mask = 16'h1FDF;
  52292. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .modeMux = 1'b0;
  52293. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  52294. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  52295. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .BypassEn = 1'b0;
  52296. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  52297. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP (
  52298. .A(\macro_inst|u_uart[1]|u_tx[0]|Selector4~0_combout ),
  52299. .B(\macro_inst|u_uart[1]|u_tx[0]|always0~0_combout ),
  52300. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_DATA~q ),
  52301. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  52302. .Cin(),
  52303. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  52304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y9_SIG_VCC ),
  52305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y9_SIG ),
  52306. .SyncReset(),
  52307. .ShiftData(),
  52308. .SyncLoad(),
  52309. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector4~1_combout ),
  52310. .Cout(),
  52311. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ));
  52312. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .coord_x = 20;
  52313. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .coord_y = 3;
  52314. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .coord_z = 0;
  52315. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .mask = 16'hAAEA;
  52316. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .modeMux = 1'b0;
  52317. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  52318. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .ShiftMux = 1'b0;
  52319. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .BypassEn = 1'b0;
  52320. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP .CarryEnb = 1'b1;
  52321. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt (
  52322. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0_combout ),
  52323. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  52324. .C(vcc),
  52325. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  52326. .Cin(),
  52327. .Qin(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ),
  52328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  52329. .AsyncReset(AsyncReset_X56_Y7_GND),
  52330. .SyncReset(),
  52331. .ShiftData(),
  52332. .SyncLoad(),
  52333. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~1_combout ),
  52334. .Cout(),
  52335. .Q(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ));
  52336. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .coord_x = 19;
  52337. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .coord_y = 4;
  52338. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .coord_z = 2;
  52339. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .mask = 16'hEEAA;
  52340. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .modeMux = 1'b0;
  52341. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .FeedbackMux = 1'b0;
  52342. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .ShiftMux = 1'b0;
  52343. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .BypassEn = 1'b0;
  52344. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt .CarryEnb = 1'b1;
  52345. alta_slice \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 (
  52346. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~q ),
  52347. .B(\macro_inst|u_uart[1]|u_tx[0]|tx_bit~q ),
  52348. .C(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_START~q ),
  52349. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  52350. .Cin(),
  52351. .Qin(),
  52352. .Clk(),
  52353. .AsyncReset(),
  52354. .SyncReset(),
  52355. .ShiftData(),
  52356. .SyncLoad(),
  52357. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0_combout ),
  52358. .Cout(),
  52359. .Q());
  52360. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .coord_x = 19;
  52361. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .coord_y = 4;
  52362. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .coord_z = 8;
  52363. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .mask = 16'h060A;
  52364. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .modeMux = 1'b0;
  52365. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  52366. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  52367. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .BypassEn = 1'b0;
  52368. defparam \macro_inst|u_uart[1]|u_tx[0]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  52369. alta_slice \macro_inst|u_uart[1]|u_tx[0]|uart_txd (
  52370. .A(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_IDLE~q ),
  52371. .B(\macro_inst|u_uart[1]|u_tx[0]|Selector5~2_combout ),
  52372. .C(vcc),
  52373. .D(\macro_inst|u_uart[1]|u_tx[0]|tx_state.UART_STOP~q ),
  52374. .Cin(),
  52375. .Qin(\macro_inst|u_uart[1]|u_tx[0]|uart_txd~q ),
  52376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  52377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  52378. .SyncReset(),
  52379. .ShiftData(),
  52380. .SyncLoad(),
  52381. .LutOut(\macro_inst|u_uart[1]|u_tx[0]|Selector5~4_combout ),
  52382. .Cout(),
  52383. .Q(\macro_inst|u_uart[1]|u_tx[0]|uart_txd~q ));
  52384. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .coord_x = 19;
  52385. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .coord_y = 4;
  52386. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .coord_z = 0;
  52387. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .mask = 16'h0022;
  52388. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .modeMux = 1'b0;
  52389. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .FeedbackMux = 1'b0;
  52390. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .ShiftMux = 1'b0;
  52391. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .BypassEn = 1'b0;
  52392. defparam \macro_inst|u_uart[1]|u_tx[0]|uart_txd .CarryEnb = 1'b1;
  52393. alta_slice \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 (
  52394. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ),
  52395. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  52396. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ),
  52397. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52398. .Cin(),
  52399. .Qin(),
  52400. .Clk(),
  52401. .AsyncReset(),
  52402. .SyncReset(),
  52403. .ShiftData(),
  52404. .SyncLoad(),
  52405. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector4~0_combout ),
  52406. .Cout(),
  52407. .Q());
  52408. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .coord_x = 10;
  52409. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .coord_y = 4;
  52410. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .coord_z = 3;
  52411. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .mask = 16'hEACC;
  52412. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .modeMux = 1'b0;
  52413. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .FeedbackMux = 1'b0;
  52414. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .ShiftMux = 1'b0;
  52415. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .BypassEn = 1'b0;
  52416. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector4~0 .CarryEnb = 1'b1;
  52417. alta_slice \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 (
  52418. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  52419. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~q ),
  52420. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0]),
  52421. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ),
  52422. .Cin(),
  52423. .Qin(),
  52424. .Clk(),
  52425. .AsyncReset(),
  52426. .SyncReset(),
  52427. .ShiftData(),
  52428. .SyncLoad(),
  52429. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector5~2_combout ),
  52430. .Cout(),
  52431. .Q());
  52432. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .coord_x = 19;
  52433. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .coord_y = 4;
  52434. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .coord_z = 11;
  52435. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .mask = 16'hECA0;
  52436. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .modeMux = 1'b0;
  52437. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .FeedbackMux = 1'b0;
  52438. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .ShiftMux = 1'b0;
  52439. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .BypassEn = 1'b0;
  52440. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~2 .CarryEnb = 1'b1;
  52441. alta_slice \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 (
  52442. .A(vcc),
  52443. .B(vcc),
  52444. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  52445. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  52446. .Cin(),
  52447. .Qin(),
  52448. .Clk(),
  52449. .AsyncReset(),
  52450. .SyncReset(),
  52451. .ShiftData(),
  52452. .SyncLoad(),
  52453. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector5~3_combout ),
  52454. .Cout(),
  52455. .Q());
  52456. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .coord_x = 19;
  52457. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .coord_y = 7;
  52458. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .coord_z = 11;
  52459. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .mask = 16'h0F00;
  52460. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .modeMux = 1'b0;
  52461. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .FeedbackMux = 1'b0;
  52462. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .ShiftMux = 1'b0;
  52463. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .BypassEn = 1'b0;
  52464. defparam \macro_inst|u_uart[1]|u_tx[1]|Selector5~3 .CarryEnb = 1'b1;
  52465. alta_slice \macro_inst|u_uart[1]|u_tx[1]|always0~0 (
  52466. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52467. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0]),
  52468. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [2]),
  52469. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [1]),
  52470. .Cin(),
  52471. .Qin(),
  52472. .Clk(),
  52473. .AsyncReset(),
  52474. .SyncReset(),
  52475. .ShiftData(),
  52476. .SyncLoad(),
  52477. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ),
  52478. .Cout(),
  52479. .Q());
  52480. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .coord_x = 19;
  52481. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .coord_y = 7;
  52482. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .coord_z = 4;
  52483. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .mask = 16'h0002;
  52484. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .modeMux = 1'b0;
  52485. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .FeedbackMux = 1'b0;
  52486. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .ShiftMux = 1'b0;
  52487. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .BypassEn = 1'b0;
  52488. defparam \macro_inst|u_uart[1]|u_tx[1]|always0~0 .CarryEnb = 1'b1;
  52489. alta_slice \macro_inst|u_uart[1]|u_tx[1]|always6~0 (
  52490. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  52491. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [2]),
  52492. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [1]),
  52493. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [0]),
  52494. .Cin(),
  52495. .Qin(),
  52496. .Clk(),
  52497. .AsyncReset(),
  52498. .SyncReset(),
  52499. .ShiftData(),
  52500. .SyncLoad(),
  52501. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|always6~0_combout ),
  52502. .Cout(),
  52503. .Q());
  52504. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .coord_x = 19;
  52505. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .coord_y = 7;
  52506. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .coord_z = 5;
  52507. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .mask = 16'h8000;
  52508. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .modeMux = 1'b0;
  52509. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .FeedbackMux = 1'b0;
  52510. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .ShiftMux = 1'b0;
  52511. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .BypassEn = 1'b0;
  52512. defparam \macro_inst|u_uart[1]|u_tx[1]|always6~0 .CarryEnb = 1'b1;
  52513. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] (
  52514. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  52515. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [0]),
  52516. .C(vcc),
  52517. .D(vcc),
  52518. .Cin(),
  52519. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [0]),
  52520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  52521. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  52522. .SyncReset(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ),
  52523. .ShiftData(),
  52524. .SyncLoad(SyncLoad_X56_Y8_GND),
  52525. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0]~4_combout ),
  52526. .Cout(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0]~5 ),
  52527. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [0]));
  52528. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .coord_x = 19;
  52529. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .coord_y = 7;
  52530. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .coord_z = 7;
  52531. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .mask = 16'h6688;
  52532. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .modeMux = 1'b0;
  52533. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  52534. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  52535. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .BypassEn = 1'b1;
  52536. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  52537. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] (
  52538. .A(vcc),
  52539. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [1]),
  52540. .C(vcc),
  52541. .D(vcc),
  52542. .Cin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[0]~5 ),
  52543. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [1]),
  52544. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  52545. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  52546. .SyncReset(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ),
  52547. .ShiftData(),
  52548. .SyncLoad(SyncLoad_X56_Y8_GND),
  52549. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1]~6_combout ),
  52550. .Cout(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1]~7 ),
  52551. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [1]));
  52552. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .coord_x = 19;
  52553. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .coord_y = 7;
  52554. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .coord_z = 8;
  52555. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .mask = 16'h3C3F;
  52556. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .modeMux = 1'b1;
  52557. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  52558. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  52559. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .BypassEn = 1'b1;
  52560. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  52561. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] (
  52562. .A(vcc),
  52563. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [2]),
  52564. .C(vcc),
  52565. .D(vcc),
  52566. .Cin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[1]~7 ),
  52567. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [2]),
  52568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  52569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  52570. .SyncReset(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ),
  52571. .ShiftData(),
  52572. .SyncLoad(SyncLoad_X56_Y8_GND),
  52573. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2]~8_combout ),
  52574. .Cout(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2]~9 ),
  52575. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [2]));
  52576. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .coord_x = 19;
  52577. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .coord_y = 7;
  52578. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .coord_z = 9;
  52579. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .mask = 16'hC30C;
  52580. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .modeMux = 1'b1;
  52581. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  52582. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  52583. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .BypassEn = 1'b1;
  52584. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  52585. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] (
  52586. .A(vcc),
  52587. .B(vcc),
  52588. .C(vcc),
  52589. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [3]),
  52590. .Cin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[2]~9 ),
  52591. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [3]),
  52592. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  52593. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  52594. .SyncReset(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ),
  52595. .ShiftData(),
  52596. .SyncLoad(SyncLoad_X56_Y8_GND),
  52597. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3]~10_combout ),
  52598. .Cout(),
  52599. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [3]));
  52600. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .coord_x = 19;
  52601. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .coord_y = 7;
  52602. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .coord_z = 10;
  52603. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .mask = 16'h0FF0;
  52604. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .modeMux = 1'b1;
  52605. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  52606. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  52607. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .BypassEn = 1'b1;
  52608. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  52609. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_bit (
  52610. .A(vcc),
  52611. .B(vcc),
  52612. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_baud_cnt [3]),
  52613. .D(\macro_inst|u_uart[1]|u_tx[1]|always6~0_combout ),
  52614. .Cin(),
  52615. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52616. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  52617. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  52618. .SyncReset(),
  52619. .ShiftData(),
  52620. .SyncLoad(),
  52621. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|always6~1_combout ),
  52622. .Cout(),
  52623. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ));
  52624. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .coord_x = 19;
  52625. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .coord_y = 7;
  52626. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .coord_z = 15;
  52627. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .mask = 16'hF000;
  52628. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .modeMux = 1'b0;
  52629. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .FeedbackMux = 1'b0;
  52630. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .ShiftMux = 1'b0;
  52631. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .BypassEn = 1'b0;
  52632. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_bit .CarryEnb = 1'b1;
  52633. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_complete (
  52634. .A(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  52635. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  52636. .C(vcc),
  52637. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[1]~13_combout ),
  52638. .Cin(),
  52639. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_complete~q ),
  52640. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  52641. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  52642. .SyncReset(),
  52643. .ShiftData(),
  52644. .SyncLoad(),
  52645. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_complete~0_combout ),
  52646. .Cout(),
  52647. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_complete~q ));
  52648. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .coord_x = 18;
  52649. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .coord_y = 8;
  52650. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .coord_z = 9;
  52651. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .mask = 16'h2232;
  52652. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .modeMux = 1'b0;
  52653. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .FeedbackMux = 1'b1;
  52654. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .ShiftMux = 1'b0;
  52655. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .BypassEn = 1'b0;
  52656. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_complete .CarryEnb = 1'b1;
  52657. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] (
  52658. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  52659. .B(vcc),
  52660. .C(vcc),
  52661. .D(vcc),
  52662. .Cin(),
  52663. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0]),
  52664. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout_X56_Y8_SIG_SIG ),
  52665. .AsyncReset(AsyncReset_X56_Y8_GND),
  52666. .SyncReset(),
  52667. .ShiftData(),
  52668. .SyncLoad(),
  52669. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~2_combout ),
  52670. .Cout(),
  52671. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0]));
  52672. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .coord_x = 19;
  52673. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .coord_y = 7;
  52674. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .coord_z = 13;
  52675. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .mask = 16'hAFAF;
  52676. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .modeMux = 1'b0;
  52677. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  52678. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .ShiftMux = 1'b0;
  52679. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .BypassEn = 1'b0;
  52680. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0] .CarryEnb = 1'b1;
  52681. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 (
  52682. .A(vcc),
  52683. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52684. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  52685. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  52686. .Cin(),
  52687. .Qin(),
  52688. .Clk(),
  52689. .AsyncReset(),
  52690. .SyncReset(),
  52691. .ShiftData(),
  52692. .SyncLoad(),
  52693. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout ),
  52694. .Cout(),
  52695. .Q());
  52696. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .coord_x = 18;
  52697. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .coord_y = 5;
  52698. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .coord_z = 0;
  52699. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .mask = 16'hFCF0;
  52700. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .modeMux = 1'b0;
  52701. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .FeedbackMux = 1'b0;
  52702. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .ShiftMux = 1'b0;
  52703. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .BypassEn = 1'b0;
  52704. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1 .CarryEnb = 1'b1;
  52705. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] (
  52706. .A(vcc),
  52707. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0]),
  52708. .C(vcc),
  52709. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  52710. .Cin(),
  52711. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [1]),
  52712. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout_X56_Y8_SIG_SIG ),
  52713. .AsyncReset(AsyncReset_X56_Y8_GND),
  52714. .SyncReset(),
  52715. .ShiftData(),
  52716. .SyncLoad(),
  52717. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~0_combout ),
  52718. .Cout(),
  52719. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [1]));
  52720. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .coord_x = 19;
  52721. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .coord_y = 7;
  52722. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .coord_z = 1;
  52723. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .mask = 16'hFFC3;
  52724. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .modeMux = 1'b0;
  52725. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  52726. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .ShiftMux = 1'b0;
  52727. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .BypassEn = 1'b0;
  52728. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[1] .CarryEnb = 1'b1;
  52729. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] (
  52730. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  52731. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [1]),
  52732. .C(vcc),
  52733. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [0]),
  52734. .Cin(),
  52735. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [2]),
  52736. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[0]~1_combout_X56_Y8_SIG_SIG ),
  52737. .AsyncReset(AsyncReset_X56_Y8_GND),
  52738. .SyncReset(),
  52739. .ShiftData(),
  52740. .SyncLoad(),
  52741. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt~3_combout ),
  52742. .Cout(),
  52743. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt [2]));
  52744. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .coord_x = 19;
  52745. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .coord_y = 7;
  52746. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .coord_z = 6;
  52747. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .mask = 16'hFAEB;
  52748. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .modeMux = 1'b0;
  52749. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  52750. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .ShiftMux = 1'b0;
  52751. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .BypassEn = 1'b0;
  52752. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_data_cnt[2] .CarryEnb = 1'b1;
  52753. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] (
  52754. .A(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  52755. .B(\macro_inst|u_uart[1]|u_regs|tx_write [1]),
  52756. .C(vcc),
  52757. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  52758. .Cin(),
  52759. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  52760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  52761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  52762. .SyncReset(),
  52763. .ShiftData(),
  52764. .SyncLoad(),
  52765. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter~0_combout ),
  52766. .Cout(),
  52767. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]));
  52768. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .coord_x = 18;
  52769. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .coord_y = 8;
  52770. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .coord_z = 7;
  52771. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .mask = 16'h5C0C;
  52772. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .modeMux = 1'b0;
  52773. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  52774. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  52775. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .BypassEn = 1'b0;
  52776. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  52777. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] (
  52778. .A(),
  52779. .B(),
  52780. .C(vcc),
  52781. .D(\rv32.mem_ahb_hwdata[0] ),
  52782. .Cin(),
  52783. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]~q ),
  52784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52785. .AsyncReset(AsyncReset_X56_Y10_GND),
  52786. .SyncReset(),
  52787. .ShiftData(),
  52788. .SyncLoad(),
  52789. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  52790. .Cout(),
  52791. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]~q ));
  52792. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .coord_x = 14;
  52793. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .coord_y = 12;
  52794. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .coord_z = 12;
  52795. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  52796. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  52797. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  52798. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  52799. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  52800. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  52801. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] (
  52802. .A(\macro_inst|u_uart[1]|u_regs|tx_write [2]),
  52803. .B(vcc),
  52804. .C(\rv32.mem_ahb_hwdata[1] ),
  52805. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  52806. .Cin(),
  52807. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1]~q ),
  52808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52809. .AsyncReset(AsyncReset_X56_Y10_GND),
  52810. .SyncReset(SyncReset_X56_Y10_GND),
  52811. .ShiftData(),
  52812. .SyncLoad(SyncLoad_X56_Y10_VCC),
  52813. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout ),
  52814. .Cout(),
  52815. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1]~q ));
  52816. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .coord_x = 14;
  52817. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .coord_y = 12;
  52818. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .coord_z = 2;
  52819. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .mask = 16'h00AA;
  52820. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .modeMux = 1'b0;
  52821. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  52822. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  52823. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .BypassEn = 1'b1;
  52824. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  52825. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] (
  52826. .A(),
  52827. .B(),
  52828. .C(vcc),
  52829. .D(\rv32.mem_ahb_hwdata[2] ),
  52830. .Cin(),
  52831. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]~q ),
  52832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52833. .AsyncReset(AsyncReset_X56_Y10_GND),
  52834. .SyncReset(),
  52835. .ShiftData(),
  52836. .SyncLoad(),
  52837. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  52838. .Cout(),
  52839. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]~q ));
  52840. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .coord_x = 14;
  52841. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .coord_y = 12;
  52842. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .coord_z = 1;
  52843. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  52844. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  52845. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  52846. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  52847. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  52848. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  52849. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] (
  52850. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  52851. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  52852. .C(\rv32.mem_ahb_hwdata[3] ),
  52853. .D(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  52854. .Cin(),
  52855. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3]~q ),
  52856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52857. .AsyncReset(AsyncReset_X56_Y10_GND),
  52858. .SyncReset(SyncReset_X56_Y10_GND),
  52859. .ShiftData(),
  52860. .SyncLoad(SyncLoad_X56_Y10_VCC),
  52861. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  52862. .Cout(),
  52863. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3]~q ));
  52864. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .coord_x = 14;
  52865. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .coord_y = 12;
  52866. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .coord_z = 5;
  52867. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .mask = 16'hCC44;
  52868. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .modeMux = 1'b0;
  52869. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  52870. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  52871. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .BypassEn = 1'b1;
  52872. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  52873. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] (
  52874. .A(),
  52875. .B(),
  52876. .C(vcc),
  52877. .D(\rv32.mem_ahb_hwdata[4] ),
  52878. .Cin(),
  52879. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]~q ),
  52880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52881. .AsyncReset(AsyncReset_X56_Y10_GND),
  52882. .SyncReset(),
  52883. .ShiftData(),
  52884. .SyncLoad(),
  52885. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  52886. .Cout(),
  52887. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]~q ));
  52888. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .coord_x = 14;
  52889. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .coord_y = 12;
  52890. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .coord_z = 3;
  52891. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  52892. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  52893. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  52894. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  52895. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  52896. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  52897. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] (
  52898. .A(),
  52899. .B(),
  52900. .C(vcc),
  52901. .D(\rv32.mem_ahb_hwdata[5] ),
  52902. .Cin(),
  52903. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]~q ),
  52904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52905. .AsyncReset(AsyncReset_X56_Y10_GND),
  52906. .SyncReset(),
  52907. .ShiftData(),
  52908. .SyncLoad(),
  52909. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  52910. .Cout(),
  52911. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]~q ));
  52912. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .coord_x = 14;
  52913. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .coord_y = 12;
  52914. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .coord_z = 8;
  52915. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  52916. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  52917. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  52918. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  52919. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  52920. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  52921. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] (
  52922. .A(),
  52923. .B(),
  52924. .C(vcc),
  52925. .D(\rv32.mem_ahb_hwdata[6] ),
  52926. .Cin(),
  52927. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]~q ),
  52928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52929. .AsyncReset(AsyncReset_X56_Y10_GND),
  52930. .SyncReset(),
  52931. .ShiftData(),
  52932. .SyncLoad(),
  52933. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  52934. .Cout(),
  52935. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]~q ));
  52936. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .coord_x = 14;
  52937. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .coord_y = 12;
  52938. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .coord_z = 0;
  52939. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  52940. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  52941. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  52942. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  52943. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  52944. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  52945. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] (
  52946. .A(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  52947. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52948. .C(\rv32.mem_ahb_hwdata[7] ),
  52949. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  52950. .Cin(),
  52951. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7]~q ),
  52952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_fifo|wrreq~0_combout_X56_Y10_SIG_SIG ),
  52953. .AsyncReset(AsyncReset_X56_Y10_GND),
  52954. .SyncReset(SyncReset_X56_Y10_GND),
  52955. .ShiftData(),
  52956. .SyncLoad(SyncLoad_X56_Y10_VCC),
  52957. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout ),
  52958. .Cout(),
  52959. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7]~q ));
  52960. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .coord_x = 14;
  52961. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .coord_y = 12;
  52962. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .coord_z = 7;
  52963. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .mask = 16'hEEAA;
  52964. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .modeMux = 1'b0;
  52965. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  52966. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  52967. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .BypassEn = 1'b1;
  52968. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  52969. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_parity (
  52970. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~0_combout ),
  52971. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  52972. .C(vcc),
  52973. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  52974. .Cin(),
  52975. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~q ),
  52976. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  52977. .AsyncReset(AsyncReset_X56_Y7_GND),
  52978. .SyncReset(),
  52979. .ShiftData(),
  52980. .SyncLoad(),
  52981. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~1_combout ),
  52982. .Cout(),
  52983. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~q ));
  52984. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .coord_x = 19;
  52985. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .coord_y = 4;
  52986. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .coord_z = 7;
  52987. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .mask = 16'h12DE;
  52988. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .modeMux = 1'b0;
  52989. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .FeedbackMux = 1'b1;
  52990. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .ShiftMux = 1'b0;
  52991. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .BypassEn = 1'b0;
  52992. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity .CarryEnb = 1'b1;
  52993. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 (
  52994. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  52995. .B(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  52996. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0]),
  52997. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  52998. .Cin(),
  52999. .Qin(),
  53000. .Clk(),
  53001. .AsyncReset(),
  53002. .SyncReset(),
  53003. .ShiftData(),
  53004. .SyncLoad(),
  53005. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_parity~0_combout ),
  53006. .Cout(),
  53007. .Q());
  53008. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .coord_x = 18;
  53009. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .coord_y = 5;
  53010. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .coord_z = 7;
  53011. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .mask = 16'h2000;
  53012. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .modeMux = 1'b0;
  53013. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .FeedbackMux = 1'b0;
  53014. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .ShiftMux = 1'b0;
  53015. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .BypassEn = 1'b0;
  53016. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_parity~0 .CarryEnb = 1'b1;
  53017. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] (
  53018. .A(vcc),
  53019. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [1]),
  53020. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][0]~q ),
  53021. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53022. .Cin(),
  53023. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0]),
  53024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53025. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53026. .SyncReset(),
  53027. .ShiftData(),
  53028. .SyncLoad(),
  53029. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~0_combout ),
  53030. .Cout(),
  53031. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0]));
  53032. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .coord_x = 14;
  53033. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .coord_y = 12;
  53034. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .coord_z = 15;
  53035. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .mask = 16'hF0CC;
  53036. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .modeMux = 1'b0;
  53037. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  53038. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .ShiftMux = 1'b0;
  53039. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .BypassEn = 1'b0;
  53040. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[0] .CarryEnb = 1'b1;
  53041. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] (
  53042. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [2]),
  53043. .B(vcc),
  53044. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][1]~q ),
  53045. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53046. .Cin(),
  53047. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [1]),
  53048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53049. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53050. .SyncReset(),
  53051. .ShiftData(),
  53052. .SyncLoad(),
  53053. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~2_combout ),
  53054. .Cout(),
  53055. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [1]));
  53056. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .coord_x = 14;
  53057. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .coord_y = 12;
  53058. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .coord_z = 13;
  53059. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .mask = 16'hF0AA;
  53060. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .modeMux = 1'b0;
  53061. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  53062. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .ShiftMux = 1'b0;
  53063. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .BypassEn = 1'b0;
  53064. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[1] .CarryEnb = 1'b1;
  53065. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] (
  53066. .A(vcc),
  53067. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][2]~q ),
  53068. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [3]),
  53069. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53070. .Cin(),
  53071. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [2]),
  53072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53073. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53074. .SyncReset(),
  53075. .ShiftData(),
  53076. .SyncLoad(),
  53077. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~3_combout ),
  53078. .Cout(),
  53079. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [2]));
  53080. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .coord_x = 14;
  53081. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .coord_y = 12;
  53082. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .coord_z = 6;
  53083. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .mask = 16'hCCF0;
  53084. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .modeMux = 1'b0;
  53085. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  53086. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .ShiftMux = 1'b0;
  53087. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .BypassEn = 1'b0;
  53088. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[2] .CarryEnb = 1'b1;
  53089. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] (
  53090. .A(vcc),
  53091. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [4]),
  53092. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][3]~q ),
  53093. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53094. .Cin(),
  53095. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [3]),
  53096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53097. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53098. .SyncReset(),
  53099. .ShiftData(),
  53100. .SyncLoad(),
  53101. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~4_combout ),
  53102. .Cout(),
  53103. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [3]));
  53104. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .coord_x = 14;
  53105. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .coord_y = 12;
  53106. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .coord_z = 4;
  53107. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .mask = 16'hF0CC;
  53108. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .modeMux = 1'b0;
  53109. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  53110. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .ShiftMux = 1'b0;
  53111. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .BypassEn = 1'b0;
  53112. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[3] .CarryEnb = 1'b1;
  53113. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] (
  53114. .A(vcc),
  53115. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][4]~q ),
  53116. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [5]),
  53117. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53118. .Cin(),
  53119. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [4]),
  53120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53121. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53122. .SyncReset(),
  53123. .ShiftData(),
  53124. .SyncLoad(),
  53125. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~5_combout ),
  53126. .Cout(),
  53127. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [4]));
  53128. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .coord_x = 14;
  53129. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .coord_y = 12;
  53130. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .coord_z = 9;
  53131. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .mask = 16'hCCF0;
  53132. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .modeMux = 1'b0;
  53133. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  53134. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .ShiftMux = 1'b0;
  53135. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .BypassEn = 1'b0;
  53136. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[4] .CarryEnb = 1'b1;
  53137. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] (
  53138. .A(vcc),
  53139. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [6]),
  53140. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][5]~q ),
  53141. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53142. .Cin(),
  53143. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [5]),
  53144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53145. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53146. .SyncReset(),
  53147. .ShiftData(),
  53148. .SyncLoad(),
  53149. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~6_combout ),
  53150. .Cout(),
  53151. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [5]));
  53152. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .coord_x = 14;
  53153. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .coord_y = 12;
  53154. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .coord_z = 10;
  53155. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .mask = 16'hF0CC;
  53156. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .modeMux = 1'b0;
  53157. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  53158. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .ShiftMux = 1'b0;
  53159. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .BypassEn = 1'b0;
  53160. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[5] .CarryEnb = 1'b1;
  53161. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] (
  53162. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][6]~q ),
  53163. .B(vcc),
  53164. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [7]),
  53165. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53166. .Cin(),
  53167. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [6]),
  53168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53169. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53170. .SyncReset(),
  53171. .ShiftData(),
  53172. .SyncLoad(),
  53173. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~7_combout ),
  53174. .Cout(),
  53175. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [6]));
  53176. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .coord_x = 14;
  53177. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .coord_y = 12;
  53178. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .coord_z = 11;
  53179. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .mask = 16'hAAF0;
  53180. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .modeMux = 1'b0;
  53181. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  53182. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .ShiftMux = 1'b0;
  53183. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .BypassEn = 1'b0;
  53184. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[6] .CarryEnb = 1'b1;
  53185. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] (
  53186. .A(vcc),
  53187. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|fifo[1][7]~q ),
  53188. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [0]),
  53189. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53190. .Cin(),
  53191. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [7]),
  53192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7]~1_combout_X56_Y10_SIG_SIG ),
  53193. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y10_SIG ),
  53194. .SyncReset(),
  53195. .ShiftData(),
  53196. .SyncLoad(),
  53197. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg~8_combout ),
  53198. .Cout(),
  53199. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg [7]));
  53200. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .coord_x = 14;
  53201. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .coord_y = 12;
  53202. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .coord_z = 14;
  53203. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .mask = 16'hCCF0;
  53204. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .modeMux = 1'b0;
  53205. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  53206. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .ShiftMux = 1'b0;
  53207. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .BypassEn = 1'b0;
  53208. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_shift_reg[7] .CarryEnb = 1'b1;
  53209. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA (
  53210. .A(\macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ),
  53211. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  53212. .C(vcc),
  53213. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  53214. .Cin(),
  53215. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  53216. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y4_SIG_VCC ),
  53217. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y4_SIG ),
  53218. .SyncReset(),
  53219. .ShiftData(),
  53220. .SyncLoad(),
  53221. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector2~0_combout ),
  53222. .Cout(),
  53223. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ));
  53224. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .coord_x = 10;
  53225. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .coord_y = 4;
  53226. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .coord_z = 14;
  53227. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .mask = 16'hDC50;
  53228. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .modeMux = 1'b0;
  53229. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  53230. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .ShiftMux = 1'b0;
  53231. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .BypassEn = 1'b0;
  53232. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA .CarryEnb = 1'b1;
  53233. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE (
  53234. .A(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  53235. .B(vcc),
  53236. .C(vcc),
  53237. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  53238. .Cin(),
  53239. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  53240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y9_SIG_VCC ),
  53241. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y9_SIG ),
  53242. .SyncReset(),
  53243. .ShiftData(),
  53244. .SyncLoad(),
  53245. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector0~0_combout ),
  53246. .Cout(),
  53247. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ));
  53248. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .coord_x = 18;
  53249. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .coord_y = 8;
  53250. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .coord_z = 5;
  53251. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .mask = 16'hFF50;
  53252. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .modeMux = 1'b0;
  53253. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  53254. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  53255. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .BypassEn = 1'b0;
  53256. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  53257. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY (
  53258. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  53259. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  53260. .C(\macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ),
  53261. .D(\macro_inst|u_uart[1]|u_tx[1]|Selector3~0_combout ),
  53262. .Cin(),
  53263. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ),
  53264. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  53265. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  53266. .SyncReset(),
  53267. .ShiftData(),
  53268. .SyncLoad(),
  53269. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector3~1_combout ),
  53270. .Cout(),
  53271. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY~q ));
  53272. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .coord_x = 17;
  53273. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .coord_y = 9;
  53274. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .coord_z = 9;
  53275. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .mask = 16'hFF80;
  53276. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .modeMux = 1'b0;
  53277. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  53278. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  53279. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .BypassEn = 1'b0;
  53280. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  53281. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START (
  53282. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0_combout ),
  53283. .B(\macro_inst|u_uart[1]|u_tx[1]|comb~1_combout ),
  53284. .C(vcc),
  53285. .D(\macro_inst|u_uart[1]|u_tx[1]|fifo_rden~combout ),
  53286. .Cin(),
  53287. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  53288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y8_SIG_VCC ),
  53289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y8_SIG ),
  53290. .SyncReset(),
  53291. .ShiftData(),
  53292. .SyncLoad(),
  53293. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~1_combout ),
  53294. .Cout(),
  53295. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ));
  53296. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .coord_x = 19;
  53297. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .coord_y = 7;
  53298. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .coord_z = 0;
  53299. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .mask = 16'hFF20;
  53300. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .modeMux = 1'b0;
  53301. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .FeedbackMux = 1'b1;
  53302. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .ShiftMux = 1'b0;
  53303. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .BypassEn = 1'b0;
  53304. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START .CarryEnb = 1'b1;
  53305. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 (
  53306. .A(\macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ),
  53307. .B(\macro_inst|u_uart[1]|u_tx[1]|Selector5~3_combout ),
  53308. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  53309. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  53310. .Cin(),
  53311. .Qin(),
  53312. .Clk(),
  53313. .AsyncReset(),
  53314. .SyncReset(),
  53315. .ShiftData(),
  53316. .SyncLoad(),
  53317. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0_combout ),
  53318. .Cout(),
  53319. .Q());
  53320. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .coord_x = 19;
  53321. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .coord_y = 7;
  53322. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .coord_z = 12;
  53323. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .mask = 16'h773F;
  53324. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .modeMux = 1'b0;
  53325. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  53326. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  53327. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .BypassEn = 1'b0;
  53328. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  53329. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP (
  53330. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_DATA~q ),
  53331. .B(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  53332. .C(\macro_inst|u_uart[1]|u_tx[1]|always0~0_combout ),
  53333. .D(\macro_inst|u_uart[1]|u_tx[1]|Selector4~0_combout ),
  53334. .Cin(),
  53335. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  53336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y4_SIG_VCC ),
  53337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X47_Y4_SIG ),
  53338. .SyncReset(),
  53339. .ShiftData(),
  53340. .SyncLoad(),
  53341. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector4~1_combout ),
  53342. .Cout(),
  53343. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ));
  53344. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .coord_x = 10;
  53345. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .coord_y = 4;
  53346. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .coord_z = 9;
  53347. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .mask = 16'hFF20;
  53348. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .modeMux = 1'b0;
  53349. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  53350. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .ShiftMux = 1'b0;
  53351. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .BypassEn = 1'b0;
  53352. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP .CarryEnb = 1'b1;
  53353. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_stop (
  53354. .A(vcc),
  53355. .B(vcc),
  53356. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_fifo|counter [0]),
  53357. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  53358. .Cin(),
  53359. .Qin(),
  53360. .Clk(),
  53361. .AsyncReset(),
  53362. .SyncReset(),
  53363. .ShiftData(),
  53364. .SyncLoad(),
  53365. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout ),
  53366. .Cout(),
  53367. .Q());
  53368. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .coord_x = 19;
  53369. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .coord_y = 7;
  53370. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .coord_z = 2;
  53371. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .mask = 16'h000F;
  53372. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .modeMux = 1'b0;
  53373. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .FeedbackMux = 1'b0;
  53374. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .ShiftMux = 1'b0;
  53375. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .BypassEn = 1'b0;
  53376. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop .CarryEnb = 1'b1;
  53377. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt (
  53378. .A(vcc),
  53379. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0_combout ),
  53380. .C(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  53381. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  53382. .Cin(),
  53383. .Qin(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ),
  53384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X47_Y4_SIG_VCC ),
  53385. .AsyncReset(AsyncReset_X47_Y4_GND),
  53386. .SyncReset(),
  53387. .ShiftData(),
  53388. .SyncLoad(),
  53389. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~1_combout ),
  53390. .Cout(),
  53391. .Q(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ));
  53392. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .coord_x = 10;
  53393. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .coord_y = 4;
  53394. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .coord_z = 8;
  53395. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .mask = 16'hFCCC;
  53396. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .modeMux = 1'b0;
  53397. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .FeedbackMux = 1'b0;
  53398. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .ShiftMux = 1'b0;
  53399. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .BypassEn = 1'b0;
  53400. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt .CarryEnb = 1'b1;
  53401. alta_slice \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 (
  53402. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~q ),
  53403. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_bit~q ),
  53404. .C(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  53405. .D(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_START~q ),
  53406. .Cin(),
  53407. .Qin(),
  53408. .Clk(),
  53409. .AsyncReset(),
  53410. .SyncReset(),
  53411. .ShiftData(),
  53412. .SyncLoad(),
  53413. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0_combout ),
  53414. .Cout(),
  53415. .Q());
  53416. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .coord_x = 10;
  53417. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .coord_y = 4;
  53418. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .coord_z = 11;
  53419. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .mask = 16'h006A;
  53420. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .modeMux = 1'b0;
  53421. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  53422. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  53423. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .BypassEn = 1'b0;
  53424. defparam \macro_inst|u_uart[1]|u_tx[1]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  53425. alta_slice \macro_inst|u_uart[1]|u_tx[1]|uart_txd (
  53426. .A(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_IDLE~q ),
  53427. .B(\macro_inst|u_uart[1]|u_tx[1]|tx_state.UART_STOP~q ),
  53428. .C(vcc),
  53429. .D(\macro_inst|u_uart[1]|u_tx[1]|Selector5~2_combout ),
  53430. .Cin(),
  53431. .Qin(\macro_inst|u_uart[1]|u_tx[1]|uart_txd~q ),
  53432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y7_SIG_VCC ),
  53433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y7_SIG ),
  53434. .SyncReset(),
  53435. .ShiftData(),
  53436. .SyncLoad(),
  53437. .LutOut(\macro_inst|u_uart[1]|u_tx[1]|Selector5~4_combout ),
  53438. .Cout(),
  53439. .Q(\macro_inst|u_uart[1]|u_tx[1]|uart_txd~q ));
  53440. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .coord_x = 19;
  53441. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .coord_y = 4;
  53442. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .coord_z = 10;
  53443. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .mask = 16'h0022;
  53444. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .modeMux = 1'b0;
  53445. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .FeedbackMux = 1'b0;
  53446. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .ShiftMux = 1'b0;
  53447. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .BypassEn = 1'b0;
  53448. defparam \macro_inst|u_uart[1]|u_tx[1]|uart_txd .CarryEnb = 1'b1;
  53449. alta_slice \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 (
  53450. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0]),
  53451. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  53452. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~q ),
  53453. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ),
  53454. .Cin(),
  53455. .Qin(),
  53456. .Clk(),
  53457. .AsyncReset(),
  53458. .SyncReset(),
  53459. .ShiftData(),
  53460. .SyncLoad(),
  53461. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector5~2_combout ),
  53462. .Cout(),
  53463. .Q());
  53464. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .coord_x = 19;
  53465. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .coord_y = 12;
  53466. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .coord_z = 0;
  53467. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .mask = 16'hF888;
  53468. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .modeMux = 1'b0;
  53469. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .FeedbackMux = 1'b0;
  53470. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .ShiftMux = 1'b0;
  53471. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .BypassEn = 1'b0;
  53472. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~2 .CarryEnb = 1'b1;
  53473. alta_slice \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 (
  53474. .A(vcc),
  53475. .B(vcc),
  53476. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  53477. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  53478. .Cin(),
  53479. .Qin(),
  53480. .Clk(),
  53481. .AsyncReset(),
  53482. .SyncReset(),
  53483. .ShiftData(),
  53484. .SyncLoad(),
  53485. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector5~3_combout ),
  53486. .Cout(),
  53487. .Q());
  53488. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .coord_x = 20;
  53489. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .coord_y = 12;
  53490. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .coord_z = 7;
  53491. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .mask = 16'h0F00;
  53492. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .modeMux = 1'b0;
  53493. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .FeedbackMux = 1'b0;
  53494. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .ShiftMux = 1'b0;
  53495. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .BypassEn = 1'b0;
  53496. defparam \macro_inst|u_uart[1]|u_tx[2]|Selector5~3 .CarryEnb = 1'b1;
  53497. alta_slice \macro_inst|u_uart[1]|u_tx[2]|always0~0 (
  53498. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [2]),
  53499. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [1]),
  53500. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0]),
  53501. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  53502. .Cin(),
  53503. .Qin(),
  53504. .Clk(),
  53505. .AsyncReset(),
  53506. .SyncReset(),
  53507. .ShiftData(),
  53508. .SyncLoad(),
  53509. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ),
  53510. .Cout(),
  53511. .Q());
  53512. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .coord_x = 19;
  53513. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .coord_y = 12;
  53514. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .coord_z = 14;
  53515. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .mask = 16'h0100;
  53516. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .modeMux = 1'b0;
  53517. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .FeedbackMux = 1'b0;
  53518. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .ShiftMux = 1'b0;
  53519. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .BypassEn = 1'b0;
  53520. defparam \macro_inst|u_uart[1]|u_tx[2]|always0~0 .CarryEnb = 1'b1;
  53521. alta_slice \macro_inst|u_uart[1]|u_tx[2]|always6~0 (
  53522. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  53523. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [2]),
  53524. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [1]),
  53525. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [0]),
  53526. .Cin(),
  53527. .Qin(),
  53528. .Clk(),
  53529. .AsyncReset(),
  53530. .SyncReset(),
  53531. .ShiftData(),
  53532. .SyncLoad(),
  53533. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|always6~0_combout ),
  53534. .Cout(),
  53535. .Q());
  53536. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .coord_x = 20;
  53537. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .coord_y = 12;
  53538. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .coord_z = 4;
  53539. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .mask = 16'h8000;
  53540. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .modeMux = 1'b0;
  53541. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .FeedbackMux = 1'b0;
  53542. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .ShiftMux = 1'b0;
  53543. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .BypassEn = 1'b0;
  53544. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~0 .CarryEnb = 1'b1;
  53545. alta_slice \macro_inst|u_uart[1]|u_tx[2]|always6~1 (
  53546. .A(\macro_inst|u_uart[1]|u_tx[2]|always6~0_combout ),
  53547. .B(vcc),
  53548. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [3]),
  53549. .D(vcc),
  53550. .Cin(),
  53551. .Qin(),
  53552. .Clk(),
  53553. .AsyncReset(),
  53554. .SyncReset(),
  53555. .ShiftData(),
  53556. .SyncLoad(),
  53557. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|always6~1_combout ),
  53558. .Cout(),
  53559. .Q());
  53560. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .coord_x = 20;
  53561. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .coord_y = 12;
  53562. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .coord_z = 10;
  53563. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .mask = 16'hA0A0;
  53564. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .modeMux = 1'b0;
  53565. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .FeedbackMux = 1'b0;
  53566. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .ShiftMux = 1'b0;
  53567. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .BypassEn = 1'b0;
  53568. defparam \macro_inst|u_uart[1]|u_tx[2]|always6~1 .CarryEnb = 1'b1;
  53569. alta_slice \macro_inst|u_uart[1]|u_tx[2]|comb~1 (
  53570. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  53571. .B(vcc),
  53572. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ),
  53573. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  53574. .Cin(),
  53575. .Qin(),
  53576. .Clk(),
  53577. .AsyncReset(),
  53578. .SyncReset(),
  53579. .ShiftData(),
  53580. .SyncLoad(),
  53581. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  53582. .Cout(),
  53583. .Q());
  53584. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .coord_x = 19;
  53585. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .coord_y = 12;
  53586. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .coord_z = 10;
  53587. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .mask = 16'h0A00;
  53588. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .modeMux = 1'b0;
  53589. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .FeedbackMux = 1'b0;
  53590. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .ShiftMux = 1'b0;
  53591. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .BypassEn = 1'b0;
  53592. defparam \macro_inst|u_uart[1]|u_tx[2]|comb~1 .CarryEnb = 1'b1;
  53593. alta_slice \macro_inst|u_uart[1]|u_tx[2]|fifo_rden (
  53594. .A(vcc),
  53595. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  53596. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  53597. .D(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  53598. .Cin(),
  53599. .Qin(),
  53600. .Clk(),
  53601. .AsyncReset(),
  53602. .SyncReset(),
  53603. .ShiftData(),
  53604. .SyncLoad(),
  53605. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  53606. .Cout(),
  53607. .Q());
  53608. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .coord_x = 8;
  53609. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .coord_y = 3;
  53610. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .coord_z = 10;
  53611. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .mask = 16'hCC0C;
  53612. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .modeMux = 1'b0;
  53613. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .FeedbackMux = 1'b0;
  53614. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .ShiftMux = 1'b0;
  53615. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .BypassEn = 1'b0;
  53616. defparam \macro_inst|u_uart[1]|u_tx[2]|fifo_rden .CarryEnb = 1'b1;
  53617. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] (
  53618. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  53619. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [0]),
  53620. .C(vcc),
  53621. .D(vcc),
  53622. .Cin(),
  53623. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [0]),
  53624. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  53625. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  53626. .SyncReset(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ),
  53627. .ShiftData(),
  53628. .SyncLoad(SyncLoad_X58_Y10_GND),
  53629. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0]~4_combout ),
  53630. .Cout(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0]~5 ),
  53631. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [0]));
  53632. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .coord_x = 20;
  53633. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .coord_y = 12;
  53634. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .coord_z = 11;
  53635. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .mask = 16'h6688;
  53636. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .modeMux = 1'b0;
  53637. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  53638. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  53639. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .BypassEn = 1'b1;
  53640. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  53641. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] (
  53642. .A(vcc),
  53643. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [1]),
  53644. .C(vcc),
  53645. .D(vcc),
  53646. .Cin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[0]~5 ),
  53647. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [1]),
  53648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  53649. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  53650. .SyncReset(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ),
  53651. .ShiftData(),
  53652. .SyncLoad(SyncLoad_X58_Y10_GND),
  53653. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1]~6_combout ),
  53654. .Cout(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1]~7 ),
  53655. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [1]));
  53656. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .coord_x = 20;
  53657. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .coord_y = 12;
  53658. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .coord_z = 12;
  53659. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .mask = 16'h3C3F;
  53660. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .modeMux = 1'b1;
  53661. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  53662. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  53663. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .BypassEn = 1'b1;
  53664. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  53665. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] (
  53666. .A(vcc),
  53667. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [2]),
  53668. .C(vcc),
  53669. .D(vcc),
  53670. .Cin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[1]~7 ),
  53671. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [2]),
  53672. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  53673. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  53674. .SyncReset(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ),
  53675. .ShiftData(),
  53676. .SyncLoad(SyncLoad_X58_Y10_GND),
  53677. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2]~8_combout ),
  53678. .Cout(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2]~9 ),
  53679. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [2]));
  53680. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .coord_x = 20;
  53681. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .coord_y = 12;
  53682. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .coord_z = 13;
  53683. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .mask = 16'hC30C;
  53684. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .modeMux = 1'b1;
  53685. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  53686. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  53687. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .BypassEn = 1'b1;
  53688. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  53689. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] (
  53690. .A(vcc),
  53691. .B(vcc),
  53692. .C(vcc),
  53693. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [3]),
  53694. .Cin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[2]~9 ),
  53695. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [3]),
  53696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  53697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  53698. .SyncReset(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ),
  53699. .ShiftData(),
  53700. .SyncLoad(SyncLoad_X58_Y10_GND),
  53701. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3]~10_combout ),
  53702. .Cout(),
  53703. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt [3]));
  53704. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .coord_x = 20;
  53705. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .coord_y = 12;
  53706. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .coord_z = 14;
  53707. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .mask = 16'h0FF0;
  53708. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .modeMux = 1'b1;
  53709. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  53710. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  53711. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .BypassEn = 1'b1;
  53712. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  53713. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_bit (
  53714. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ),
  53715. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ),
  53716. .C(\macro_inst|u_uart[1]|u_tx[2]|always6~1_combout ),
  53717. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  53718. .Cin(),
  53719. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  53720. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  53721. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  53722. .SyncReset(SyncReset_X57_Y10_GND),
  53723. .ShiftData(),
  53724. .SyncLoad(SyncLoad_X57_Y10_VCC),
  53725. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector4~0_combout ),
  53726. .Cout(),
  53727. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ));
  53728. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .coord_x = 19;
  53729. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .coord_y = 12;
  53730. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .coord_z = 13;
  53731. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .mask = 16'hEFC0;
  53732. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .modeMux = 1'b0;
  53733. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .FeedbackMux = 1'b1;
  53734. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .ShiftMux = 1'b0;
  53735. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .BypassEn = 1'b1;
  53736. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_bit .CarryEnb = 1'b1;
  53737. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_complete (
  53738. .A(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  53739. .B(\macro_inst|u_uart[1]|u_regs|clear_flags[2]~14_combout ),
  53740. .C(vcc),
  53741. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  53742. .Cin(),
  53743. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_complete~q ),
  53744. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y5_SIG_VCC ),
  53745. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y5_SIG ),
  53746. .SyncReset(),
  53747. .ShiftData(),
  53748. .SyncLoad(),
  53749. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_complete~0_combout ),
  53750. .Cout(),
  53751. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_complete~q ));
  53752. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .coord_x = 17;
  53753. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .coord_y = 6;
  53754. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .coord_z = 14;
  53755. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .mask = 16'h00EA;
  53756. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .modeMux = 1'b0;
  53757. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .FeedbackMux = 1'b1;
  53758. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .ShiftMux = 1'b0;
  53759. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .BypassEn = 1'b0;
  53760. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_complete .CarryEnb = 1'b1;
  53761. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] (
  53762. .A(vcc),
  53763. .B(vcc),
  53764. .C(vcc),
  53765. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  53766. .Cin(),
  53767. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0]),
  53768. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout_X58_Y10_SIG_SIG ),
  53769. .AsyncReset(AsyncReset_X58_Y10_GND),
  53770. .SyncReset(),
  53771. .ShiftData(),
  53772. .SyncLoad(),
  53773. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~2_combout ),
  53774. .Cout(),
  53775. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0]));
  53776. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .coord_x = 20;
  53777. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .coord_y = 12;
  53778. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .coord_z = 15;
  53779. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .mask = 16'hFF0F;
  53780. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .modeMux = 1'b0;
  53781. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  53782. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .ShiftMux = 1'b0;
  53783. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .BypassEn = 1'b0;
  53784. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[0] .CarryEnb = 1'b1;
  53785. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] (
  53786. .A(vcc),
  53787. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0]),
  53788. .C(vcc),
  53789. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  53790. .Cin(),
  53791. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [1]),
  53792. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout_X58_Y10_SIG_SIG ),
  53793. .AsyncReset(AsyncReset_X58_Y10_GND),
  53794. .SyncReset(),
  53795. .ShiftData(),
  53796. .SyncLoad(),
  53797. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~0_combout ),
  53798. .Cout(),
  53799. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [1]));
  53800. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .coord_x = 20;
  53801. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .coord_y = 12;
  53802. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .coord_z = 0;
  53803. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .mask = 16'hFFC3;
  53804. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .modeMux = 1'b0;
  53805. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  53806. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .ShiftMux = 1'b0;
  53807. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .BypassEn = 1'b0;
  53808. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[1] .CarryEnb = 1'b1;
  53809. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] (
  53810. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [1]),
  53811. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [0]),
  53812. .C(vcc),
  53813. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  53814. .Cin(),
  53815. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [2]),
  53816. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2]~1_combout_X58_Y10_SIG_SIG ),
  53817. .AsyncReset(AsyncReset_X58_Y10_GND),
  53818. .SyncReset(),
  53819. .ShiftData(),
  53820. .SyncLoad(),
  53821. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt~3_combout ),
  53822. .Cout(),
  53823. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt [2]));
  53824. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .coord_x = 20;
  53825. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .coord_y = 12;
  53826. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .coord_z = 9;
  53827. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .mask = 16'hFFE1;
  53828. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .modeMux = 1'b0;
  53829. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  53830. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .ShiftMux = 1'b0;
  53831. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .BypassEn = 1'b0;
  53832. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_data_cnt[2] .CarryEnb = 1'b1;
  53833. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] (
  53834. .A(\macro_inst|u_uart[1]|u_regs|tx_write [2]),
  53835. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  53836. .C(vcc),
  53837. .D(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  53838. .Cin(),
  53839. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  53840. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  53841. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  53842. .SyncReset(),
  53843. .ShiftData(),
  53844. .SyncLoad(),
  53845. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter~0_combout ),
  53846. .Cout(),
  53847. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]));
  53848. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .coord_x = 8;
  53849. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .coord_y = 3;
  53850. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .coord_z = 9;
  53851. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .mask = 16'h0ACA;
  53852. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .modeMux = 1'b0;
  53853. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  53854. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  53855. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .BypassEn = 1'b0;
  53856. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  53857. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] (
  53858. .A(),
  53859. .B(),
  53860. .C(vcc),
  53861. .D(\rv32.mem_ahb_hwdata[0] ),
  53862. .Cin(),
  53863. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]~q ),
  53864. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53865. .AsyncReset(AsyncReset_X56_Y12_GND),
  53866. .SyncReset(),
  53867. .ShiftData(),
  53868. .SyncLoad(),
  53869. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  53870. .Cout(),
  53871. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]~q ));
  53872. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .coord_x = 14;
  53873. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .coord_y = 10;
  53874. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .coord_z = 9;
  53875. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  53876. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  53877. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  53878. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  53879. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  53880. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  53881. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] (
  53882. .A(),
  53883. .B(),
  53884. .C(vcc),
  53885. .D(\rv32.mem_ahb_hwdata[1] ),
  53886. .Cin(),
  53887. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]~q ),
  53888. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53889. .AsyncReset(AsyncReset_X56_Y12_GND),
  53890. .SyncReset(),
  53891. .ShiftData(),
  53892. .SyncLoad(),
  53893. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  53894. .Cout(),
  53895. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]~q ));
  53896. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .coord_x = 14;
  53897. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .coord_y = 10;
  53898. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .coord_z = 1;
  53899. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  53900. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  53901. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  53902. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  53903. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  53904. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  53905. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] (
  53906. .A(),
  53907. .B(),
  53908. .C(vcc),
  53909. .D(\rv32.mem_ahb_hwdata[2] ),
  53910. .Cin(),
  53911. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]~q ),
  53912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53913. .AsyncReset(AsyncReset_X56_Y12_GND),
  53914. .SyncReset(),
  53915. .ShiftData(),
  53916. .SyncLoad(),
  53917. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  53918. .Cout(),
  53919. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]~q ));
  53920. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .coord_x = 14;
  53921. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .coord_y = 10;
  53922. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .coord_z = 14;
  53923. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  53924. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  53925. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  53926. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  53927. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  53928. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  53929. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] (
  53930. .A(),
  53931. .B(),
  53932. .C(vcc),
  53933. .D(\rv32.mem_ahb_hwdata[3] ),
  53934. .Cin(),
  53935. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]~q ),
  53936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53937. .AsyncReset(AsyncReset_X56_Y12_GND),
  53938. .SyncReset(),
  53939. .ShiftData(),
  53940. .SyncLoad(),
  53941. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  53942. .Cout(),
  53943. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]~q ));
  53944. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .coord_x = 14;
  53945. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .coord_y = 10;
  53946. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .coord_z = 0;
  53947. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  53948. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  53949. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  53950. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  53951. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  53952. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  53953. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] (
  53954. .A(),
  53955. .B(),
  53956. .C(vcc),
  53957. .D(\rv32.mem_ahb_hwdata[4] ),
  53958. .Cin(),
  53959. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]~q ),
  53960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53961. .AsyncReset(AsyncReset_X56_Y12_GND),
  53962. .SyncReset(),
  53963. .ShiftData(),
  53964. .SyncLoad(),
  53965. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  53966. .Cout(),
  53967. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]~q ));
  53968. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .coord_x = 14;
  53969. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .coord_y = 10;
  53970. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .coord_z = 10;
  53971. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  53972. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  53973. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  53974. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  53975. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  53976. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  53977. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] (
  53978. .A(),
  53979. .B(),
  53980. .C(vcc),
  53981. .D(\rv32.mem_ahb_hwdata[5] ),
  53982. .Cin(),
  53983. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]~q ),
  53984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  53985. .AsyncReset(AsyncReset_X56_Y12_GND),
  53986. .SyncReset(),
  53987. .ShiftData(),
  53988. .SyncLoad(),
  53989. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  53990. .Cout(),
  53991. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]~q ));
  53992. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .coord_x = 14;
  53993. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .coord_y = 10;
  53994. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .coord_z = 6;
  53995. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  53996. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  53997. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  53998. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  53999. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  54000. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  54001. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] (
  54002. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54003. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  54004. .C(\rv32.mem_ahb_hwdata[6] ),
  54005. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54006. .Cin(),
  54007. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6]~q ),
  54008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  54009. .AsyncReset(AsyncReset_X56_Y12_GND),
  54010. .SyncReset(SyncReset_X56_Y12_GND),
  54011. .ShiftData(),
  54012. .SyncLoad(SyncLoad_X56_Y12_VCC),
  54013. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout ),
  54014. .Cout(),
  54015. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6]~q ));
  54016. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .coord_x = 14;
  54017. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .coord_y = 10;
  54018. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .coord_z = 15;
  54019. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .mask = 16'hFF88;
  54020. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .modeMux = 1'b0;
  54021. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  54022. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  54023. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .BypassEn = 1'b1;
  54024. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  54025. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] (
  54026. .A(),
  54027. .B(),
  54028. .C(vcc),
  54029. .D(\rv32.mem_ahb_hwdata[7] ),
  54030. .Cin(),
  54031. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]~q ),
  54032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_fifo|wrreq~0_combout_X56_Y12_SIG_SIG ),
  54033. .AsyncReset(AsyncReset_X56_Y12_GND),
  54034. .SyncReset(),
  54035. .ShiftData(),
  54036. .SyncLoad(),
  54037. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  54038. .Cout(),
  54039. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]~q ));
  54040. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .coord_x = 14;
  54041. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .coord_y = 10;
  54042. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .coord_z = 12;
  54043. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  54044. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  54045. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  54046. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  54047. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  54048. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  54049. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_parity (
  54050. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~0_combout ),
  54051. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  54052. .C(vcc),
  54053. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  54054. .Cin(),
  54055. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~q ),
  54056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  54057. .AsyncReset(AsyncReset_X58_Y10_GND),
  54058. .SyncReset(),
  54059. .ShiftData(),
  54060. .SyncLoad(),
  54061. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~1_combout ),
  54062. .Cout(),
  54063. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~q ));
  54064. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .coord_x = 20;
  54065. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .coord_y = 12;
  54066. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .coord_z = 2;
  54067. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .mask = 16'h12DE;
  54068. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .modeMux = 1'b0;
  54069. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .FeedbackMux = 1'b1;
  54070. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .ShiftMux = 1'b0;
  54071. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .BypassEn = 1'b0;
  54072. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity .CarryEnb = 1'b1;
  54073. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 (
  54074. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0]),
  54075. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54076. .C(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  54077. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  54078. .Cin(),
  54079. .Qin(),
  54080. .Clk(),
  54081. .AsyncReset(),
  54082. .SyncReset(),
  54083. .ShiftData(),
  54084. .SyncLoad(),
  54085. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_parity~0_combout ),
  54086. .Cout(),
  54087. .Q());
  54088. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .coord_x = 19;
  54089. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .coord_y = 12;
  54090. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .coord_z = 7;
  54091. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .mask = 16'h0800;
  54092. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .modeMux = 1'b0;
  54093. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .FeedbackMux = 1'b0;
  54094. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .ShiftMux = 1'b0;
  54095. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .BypassEn = 1'b0;
  54096. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_parity~0 .CarryEnb = 1'b1;
  54097. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] (
  54098. .A(vcc),
  54099. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][0]~q ),
  54100. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [1]),
  54101. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54102. .Cin(),
  54103. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0]),
  54104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54105. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54106. .SyncReset(),
  54107. .ShiftData(),
  54108. .SyncLoad(),
  54109. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~0_combout ),
  54110. .Cout(),
  54111. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0]));
  54112. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .coord_x = 14;
  54113. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .coord_y = 10;
  54114. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .coord_z = 5;
  54115. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .mask = 16'hCCF0;
  54116. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .modeMux = 1'b0;
  54117. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  54118. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .ShiftMux = 1'b0;
  54119. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .BypassEn = 1'b0;
  54120. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[0] .CarryEnb = 1'b1;
  54121. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] (
  54122. .A(vcc),
  54123. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][1]~q ),
  54124. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [2]),
  54125. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54126. .Cin(),
  54127. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [1]),
  54128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54130. .SyncReset(),
  54131. .ShiftData(),
  54132. .SyncLoad(),
  54133. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~2_combout ),
  54134. .Cout(),
  54135. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [1]));
  54136. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .coord_x = 14;
  54137. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .coord_y = 10;
  54138. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .coord_z = 2;
  54139. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .mask = 16'hCCF0;
  54140. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .modeMux = 1'b0;
  54141. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  54142. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .ShiftMux = 1'b0;
  54143. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .BypassEn = 1'b0;
  54144. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[1] .CarryEnb = 1'b1;
  54145. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] (
  54146. .A(vcc),
  54147. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [3]),
  54148. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][2]~q ),
  54149. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54150. .Cin(),
  54151. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [2]),
  54152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54153. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54154. .SyncReset(),
  54155. .ShiftData(),
  54156. .SyncLoad(),
  54157. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~3_combout ),
  54158. .Cout(),
  54159. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [2]));
  54160. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .coord_x = 14;
  54161. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .coord_y = 10;
  54162. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .coord_z = 8;
  54163. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .mask = 16'hF0CC;
  54164. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .modeMux = 1'b0;
  54165. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  54166. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .ShiftMux = 1'b0;
  54167. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .BypassEn = 1'b0;
  54168. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[2] .CarryEnb = 1'b1;
  54169. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] (
  54170. .A(vcc),
  54171. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [4]),
  54172. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][3]~q ),
  54173. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54174. .Cin(),
  54175. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [3]),
  54176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54177. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54178. .SyncReset(),
  54179. .ShiftData(),
  54180. .SyncLoad(),
  54181. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~4_combout ),
  54182. .Cout(),
  54183. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [3]));
  54184. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .coord_x = 14;
  54185. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .coord_y = 10;
  54186. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .coord_z = 13;
  54187. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .mask = 16'hF0CC;
  54188. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .modeMux = 1'b0;
  54189. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  54190. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .ShiftMux = 1'b0;
  54191. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .BypassEn = 1'b0;
  54192. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[3] .CarryEnb = 1'b1;
  54193. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] (
  54194. .A(vcc),
  54195. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [5]),
  54196. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][4]~q ),
  54197. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54198. .Cin(),
  54199. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [4]),
  54200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54201. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54202. .SyncReset(),
  54203. .ShiftData(),
  54204. .SyncLoad(),
  54205. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~5_combout ),
  54206. .Cout(),
  54207. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [4]));
  54208. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .coord_x = 14;
  54209. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .coord_y = 10;
  54210. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .coord_z = 11;
  54211. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .mask = 16'hF0CC;
  54212. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .modeMux = 1'b0;
  54213. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  54214. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .ShiftMux = 1'b0;
  54215. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .BypassEn = 1'b0;
  54216. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[4] .CarryEnb = 1'b1;
  54217. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] (
  54218. .A(vcc),
  54219. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [6]),
  54220. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][5]~q ),
  54221. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54222. .Cin(),
  54223. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [5]),
  54224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54225. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54226. .SyncReset(),
  54227. .ShiftData(),
  54228. .SyncLoad(),
  54229. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~6_combout ),
  54230. .Cout(),
  54231. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [5]));
  54232. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .coord_x = 14;
  54233. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .coord_y = 10;
  54234. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .coord_z = 7;
  54235. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .mask = 16'hF0CC;
  54236. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .modeMux = 1'b0;
  54237. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  54238. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .ShiftMux = 1'b0;
  54239. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .BypassEn = 1'b0;
  54240. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[5] .CarryEnb = 1'b1;
  54241. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] (
  54242. .A(vcc),
  54243. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][6]~q ),
  54244. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [7]),
  54245. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54246. .Cin(),
  54247. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [6]),
  54248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54249. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54250. .SyncReset(),
  54251. .ShiftData(),
  54252. .SyncLoad(),
  54253. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~7_combout ),
  54254. .Cout(),
  54255. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [6]));
  54256. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .coord_x = 14;
  54257. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .coord_y = 10;
  54258. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .coord_z = 3;
  54259. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .mask = 16'hCCF0;
  54260. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .modeMux = 1'b0;
  54261. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  54262. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .ShiftMux = 1'b0;
  54263. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .BypassEn = 1'b0;
  54264. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[6] .CarryEnb = 1'b1;
  54265. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] (
  54266. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|fifo[1][7]~q ),
  54267. .B(vcc),
  54268. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [0]),
  54269. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54270. .Cin(),
  54271. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [7]),
  54272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7]~1_combout_X56_Y12_SIG_SIG ),
  54273. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y12_SIG ),
  54274. .SyncReset(),
  54275. .ShiftData(),
  54276. .SyncLoad(),
  54277. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg~8_combout ),
  54278. .Cout(),
  54279. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg [7]));
  54280. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .coord_x = 14;
  54281. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .coord_y = 10;
  54282. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .coord_z = 4;
  54283. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .mask = 16'hAAF0;
  54284. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .modeMux = 1'b0;
  54285. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  54286. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .ShiftMux = 1'b0;
  54287. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .BypassEn = 1'b0;
  54288. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_shift_reg[7] .CarryEnb = 1'b1;
  54289. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA (
  54290. .A(\macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ),
  54291. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  54292. .C(vcc),
  54293. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  54294. .Cin(),
  54295. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  54297. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  54298. .SyncReset(),
  54299. .ShiftData(),
  54300. .SyncLoad(),
  54301. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector2~0_combout ),
  54302. .Cout(),
  54303. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ));
  54304. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .coord_x = 19;
  54305. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .coord_y = 12;
  54306. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .coord_z = 9;
  54307. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .mask = 16'hDC50;
  54308. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .modeMux = 1'b0;
  54309. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  54310. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .ShiftMux = 1'b0;
  54311. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .BypassEn = 1'b0;
  54312. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA .CarryEnb = 1'b1;
  54313. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE (
  54314. .A(vcc),
  54315. .B(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  54316. .C(vcc),
  54317. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  54318. .Cin(),
  54319. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  54320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X51_Y2_SIG_VCC ),
  54321. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X51_Y2_SIG ),
  54322. .SyncReset(),
  54323. .ShiftData(),
  54324. .SyncLoad(),
  54325. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector0~0_combout ),
  54326. .Cout(),
  54327. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ));
  54328. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .coord_x = 8;
  54329. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .coord_y = 3;
  54330. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .coord_z = 11;
  54331. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .mask = 16'hFF30;
  54332. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .modeMux = 1'b0;
  54333. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  54334. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  54335. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .BypassEn = 1'b0;
  54336. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  54337. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY (
  54338. .A(\macro_inst|u_uart[1]|u_tx[2]|Selector3~0_combout ),
  54339. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54340. .C(\macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ),
  54341. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  54342. .Cin(),
  54343. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ),
  54344. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  54345. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  54346. .SyncReset(),
  54347. .ShiftData(),
  54348. .SyncLoad(),
  54349. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector3~1_combout ),
  54350. .Cout(),
  54351. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY~q ));
  54352. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .coord_x = 19;
  54353. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .coord_y = 12;
  54354. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .coord_z = 1;
  54355. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .mask = 16'hEAAA;
  54356. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .modeMux = 1'b0;
  54357. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  54358. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  54359. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .BypassEn = 1'b0;
  54360. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  54361. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START (
  54362. .A(\macro_inst|u_uart[1]|u_tx[2]|comb~1_combout ),
  54363. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0_combout ),
  54364. .C(vcc),
  54365. .D(\macro_inst|u_uart[1]|u_tx[2]|fifo_rden~combout ),
  54366. .Cin(),
  54367. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  54368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  54369. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  54370. .SyncReset(),
  54371. .ShiftData(),
  54372. .SyncLoad(),
  54373. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~1_combout ),
  54374. .Cout(),
  54375. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ));
  54376. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .coord_x = 19;
  54377. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .coord_y = 12;
  54378. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .coord_z = 11;
  54379. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .mask = 16'hFF40;
  54380. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .modeMux = 1'b0;
  54381. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .FeedbackMux = 1'b1;
  54382. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .ShiftMux = 1'b0;
  54383. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .BypassEn = 1'b0;
  54384. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START .CarryEnb = 1'b1;
  54385. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 (
  54386. .A(\macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ),
  54387. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54388. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  54389. .D(\macro_inst|u_uart[1]|u_tx[2]|Selector5~3_combout ),
  54390. .Cin(),
  54391. .Qin(),
  54392. .Clk(),
  54393. .AsyncReset(),
  54394. .SyncReset(),
  54395. .ShiftData(),
  54396. .SyncLoad(),
  54397. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0_combout ),
  54398. .Cout(),
  54399. .Q());
  54400. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .coord_x = 19;
  54401. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .coord_y = 12;
  54402. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .coord_z = 15;
  54403. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .mask = 16'h47FF;
  54404. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .modeMux = 1'b0;
  54405. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  54406. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  54407. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .BypassEn = 1'b0;
  54408. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  54409. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP (
  54410. .A(\macro_inst|u_uart[1]|u_tx[2]|Selector4~0_combout ),
  54411. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_DATA~q ),
  54412. .C(\macro_inst|u_uart[1]|u_tx[2]|always0~0_combout ),
  54413. .D(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  54414. .Cin(),
  54415. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  54416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  54417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X57_Y10_SIG ),
  54418. .SyncReset(),
  54419. .ShiftData(),
  54420. .SyncLoad(),
  54421. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector4~1_combout ),
  54422. .Cout(),
  54423. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ));
  54424. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .coord_x = 19;
  54425. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .coord_y = 12;
  54426. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .coord_z = 12;
  54427. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .mask = 16'hAAEA;
  54428. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .modeMux = 1'b0;
  54429. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  54430. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .ShiftMux = 1'b0;
  54431. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .BypassEn = 1'b0;
  54432. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP .CarryEnb = 1'b1;
  54433. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_stop (
  54434. .A(vcc),
  54435. .B(vcc),
  54436. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_fifo|counter [0]),
  54437. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  54438. .Cin(),
  54439. .Qin(),
  54440. .Clk(),
  54441. .AsyncReset(),
  54442. .SyncReset(),
  54443. .ShiftData(),
  54444. .SyncLoad(),
  54445. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout ),
  54446. .Cout(),
  54447. .Q());
  54448. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .coord_x = 20;
  54449. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .coord_y = 12;
  54450. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .coord_z = 3;
  54451. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .mask = 16'h000F;
  54452. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .modeMux = 1'b0;
  54453. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .FeedbackMux = 1'b0;
  54454. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .ShiftMux = 1'b0;
  54455. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .BypassEn = 1'b0;
  54456. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop .CarryEnb = 1'b1;
  54457. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt (
  54458. .A(vcc),
  54459. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  54460. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0_combout ),
  54461. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  54462. .Cin(),
  54463. .Qin(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ),
  54464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X57_Y10_SIG_VCC ),
  54465. .AsyncReset(AsyncReset_X57_Y10_GND),
  54466. .SyncReset(),
  54467. .ShiftData(),
  54468. .SyncLoad(),
  54469. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~1_combout ),
  54470. .Cout(),
  54471. .Q(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ));
  54472. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .coord_x = 19;
  54473. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .coord_y = 12;
  54474. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .coord_z = 4;
  54475. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .mask = 16'hFCF0;
  54476. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .modeMux = 1'b0;
  54477. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .FeedbackMux = 1'b0;
  54478. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .ShiftMux = 1'b0;
  54479. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .BypassEn = 1'b0;
  54480. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt .CarryEnb = 1'b1;
  54481. alta_slice \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 (
  54482. .A(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~q ),
  54483. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_START~q ),
  54484. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  54485. .D(\macro_inst|u_uart[1]|u_tx[2]|tx_bit~q ),
  54486. .Cin(),
  54487. .Qin(),
  54488. .Clk(),
  54489. .AsyncReset(),
  54490. .SyncReset(),
  54491. .ShiftData(),
  54492. .SyncLoad(),
  54493. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0_combout ),
  54494. .Cout(),
  54495. .Q());
  54496. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .coord_x = 19;
  54497. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .coord_y = 12;
  54498. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .coord_z = 5;
  54499. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .mask = 16'h1222;
  54500. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .modeMux = 1'b0;
  54501. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  54502. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  54503. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .BypassEn = 1'b0;
  54504. defparam \macro_inst|u_uart[1]|u_tx[2]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  54505. alta_slice \macro_inst|u_uart[1]|u_tx[2]|uart_txd (
  54506. .A(\macro_inst|u_uart[1]|u_tx[2]|Selector5~2_combout ),
  54507. .B(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_IDLE~q ),
  54508. .C(\macro_inst|u_uart[1]|u_tx[2]|tx_state.UART_STOP~q ),
  54509. .D(vcc),
  54510. .Cin(),
  54511. .Qin(\macro_inst|u_uart[1]|u_tx[2]|uart_txd~q ),
  54512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X58_Y10_SIG_VCC ),
  54513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X58_Y10_SIG ),
  54514. .SyncReset(),
  54515. .ShiftData(),
  54516. .SyncLoad(),
  54517. .LutOut(\macro_inst|u_uart[1]|u_tx[2]|Selector5~4_combout ),
  54518. .Cout(),
  54519. .Q(\macro_inst|u_uart[1]|u_tx[2]|uart_txd~q ));
  54520. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .coord_x = 20;
  54521. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .coord_y = 12;
  54522. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .coord_z = 6;
  54523. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .mask = 16'h0404;
  54524. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .modeMux = 1'b0;
  54525. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .FeedbackMux = 1'b0;
  54526. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .ShiftMux = 1'b0;
  54527. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .BypassEn = 1'b0;
  54528. defparam \macro_inst|u_uart[1]|u_tx[2]|uart_txd .CarryEnb = 1'b1;
  54529. alta_slice \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 (
  54530. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ),
  54531. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ),
  54532. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54533. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  54534. .Cin(),
  54535. .Qin(),
  54536. .Clk(),
  54537. .AsyncReset(),
  54538. .SyncReset(),
  54539. .ShiftData(),
  54540. .SyncLoad(),
  54541. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector4~0_combout ),
  54542. .Cout(),
  54543. .Q());
  54544. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .coord_x = 16;
  54545. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .coord_y = 10;
  54546. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .coord_z = 14;
  54547. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .mask = 16'hEFC0;
  54548. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .modeMux = 1'b0;
  54549. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .FeedbackMux = 1'b0;
  54550. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .ShiftMux = 1'b0;
  54551. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .BypassEn = 1'b0;
  54552. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector4~0 .CarryEnb = 1'b1;
  54553. alta_slice \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 (
  54554. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  54555. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~q ),
  54556. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0]),
  54557. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ),
  54558. .Cin(),
  54559. .Qin(),
  54560. .Clk(),
  54561. .AsyncReset(),
  54562. .SyncReset(),
  54563. .ShiftData(),
  54564. .SyncLoad(),
  54565. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector5~2_combout ),
  54566. .Cout(),
  54567. .Q());
  54568. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .coord_x = 19;
  54569. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .coord_y = 10;
  54570. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .coord_z = 8;
  54571. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .mask = 16'hECA0;
  54572. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .modeMux = 1'b0;
  54573. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .FeedbackMux = 1'b0;
  54574. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .ShiftMux = 1'b0;
  54575. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .BypassEn = 1'b0;
  54576. defparam \macro_inst|u_uart[1]|u_tx[3]|Selector5~2 .CarryEnb = 1'b1;
  54577. alta_slice \macro_inst|u_uart[1]|u_tx[3]|always0~0 (
  54578. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0]),
  54579. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54580. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [1]),
  54581. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [2]),
  54582. .Cin(),
  54583. .Qin(),
  54584. .Clk(),
  54585. .AsyncReset(),
  54586. .SyncReset(),
  54587. .ShiftData(),
  54588. .SyncLoad(),
  54589. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ),
  54590. .Cout(),
  54591. .Q());
  54592. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .coord_x = 16;
  54593. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .coord_y = 10;
  54594. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .coord_z = 15;
  54595. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .mask = 16'h0004;
  54596. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .modeMux = 1'b0;
  54597. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .FeedbackMux = 1'b0;
  54598. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .ShiftMux = 1'b0;
  54599. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .BypassEn = 1'b0;
  54600. defparam \macro_inst|u_uart[1]|u_tx[3]|always0~0 .CarryEnb = 1'b1;
  54601. alta_slice \macro_inst|u_uart[1]|u_tx[3]|always6~0 (
  54602. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  54603. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [2]),
  54604. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [1]),
  54605. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [0]),
  54606. .Cin(),
  54607. .Qin(),
  54608. .Clk(),
  54609. .AsyncReset(),
  54610. .SyncReset(),
  54611. .ShiftData(),
  54612. .SyncLoad(),
  54613. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|always6~0_combout ),
  54614. .Cout(),
  54615. .Q());
  54616. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .coord_x = 16;
  54617. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .coord_y = 10;
  54618. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .coord_z = 4;
  54619. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .mask = 16'h8000;
  54620. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .modeMux = 1'b0;
  54621. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .FeedbackMux = 1'b0;
  54622. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .ShiftMux = 1'b0;
  54623. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .BypassEn = 1'b0;
  54624. defparam \macro_inst|u_uart[1]|u_tx[3]|always6~0 .CarryEnb = 1'b1;
  54625. alta_slice \macro_inst|u_uart[1]|u_tx[3]|comb~1 (
  54626. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54627. .B(vcc),
  54628. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  54629. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ),
  54630. .Cin(),
  54631. .Qin(),
  54632. .Clk(),
  54633. .AsyncReset(),
  54634. .SyncReset(),
  54635. .ShiftData(),
  54636. .SyncLoad(),
  54637. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  54638. .Cout(),
  54639. .Q());
  54640. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .coord_x = 17;
  54641. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .coord_y = 10;
  54642. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .coord_z = 12;
  54643. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .mask = 16'h00A0;
  54644. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .modeMux = 1'b0;
  54645. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .FeedbackMux = 1'b0;
  54646. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .ShiftMux = 1'b0;
  54647. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .BypassEn = 1'b0;
  54648. defparam \macro_inst|u_uart[1]|u_tx[3]|comb~1 .CarryEnb = 1'b1;
  54649. alta_slice \macro_inst|u_uart[1]|u_tx[3]|fifo_rden (
  54650. .A(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  54651. .B(vcc),
  54652. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  54653. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  54654. .Cin(),
  54655. .Qin(),
  54656. .Clk(),
  54657. .AsyncReset(),
  54658. .SyncReset(),
  54659. .ShiftData(),
  54660. .SyncLoad(),
  54661. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  54662. .Cout(),
  54663. .Q());
  54664. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .coord_x = 17;
  54665. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .coord_y = 10;
  54666. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .coord_z = 14;
  54667. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .mask = 16'hA0F0;
  54668. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .modeMux = 1'b0;
  54669. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .FeedbackMux = 1'b0;
  54670. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .ShiftMux = 1'b0;
  54671. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .BypassEn = 1'b0;
  54672. defparam \macro_inst|u_uart[1]|u_tx[3]|fifo_rden .CarryEnb = 1'b1;
  54673. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] (
  54674. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [0]),
  54675. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  54676. .C(vcc),
  54677. .D(vcc),
  54678. .Cin(),
  54679. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [0]),
  54680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  54681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  54682. .SyncReset(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ),
  54683. .ShiftData(),
  54684. .SyncLoad(SyncLoad_X62_Y9_GND),
  54685. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0]~4_combout ),
  54686. .Cout(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0]~5 ),
  54687. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [0]));
  54688. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .coord_x = 16;
  54689. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .coord_y = 10;
  54690. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .coord_z = 7;
  54691. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .mask = 16'h6688;
  54692. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .modeMux = 1'b0;
  54693. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  54694. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  54695. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .BypassEn = 1'b1;
  54696. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  54697. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] (
  54698. .A(vcc),
  54699. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [1]),
  54700. .C(vcc),
  54701. .D(vcc),
  54702. .Cin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[0]~5 ),
  54703. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [1]),
  54704. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  54705. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  54706. .SyncReset(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ),
  54707. .ShiftData(),
  54708. .SyncLoad(SyncLoad_X62_Y9_GND),
  54709. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1]~6_combout ),
  54710. .Cout(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1]~7 ),
  54711. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [1]));
  54712. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .coord_x = 16;
  54713. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .coord_y = 10;
  54714. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .coord_z = 8;
  54715. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .mask = 16'h3C3F;
  54716. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .modeMux = 1'b1;
  54717. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  54718. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  54719. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .BypassEn = 1'b1;
  54720. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  54721. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] (
  54722. .A(vcc),
  54723. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [2]),
  54724. .C(vcc),
  54725. .D(vcc),
  54726. .Cin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[1]~7 ),
  54727. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [2]),
  54728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  54729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  54730. .SyncReset(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ),
  54731. .ShiftData(),
  54732. .SyncLoad(SyncLoad_X62_Y9_GND),
  54733. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2]~8_combout ),
  54734. .Cout(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2]~9 ),
  54735. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [2]));
  54736. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .coord_x = 16;
  54737. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .coord_y = 10;
  54738. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .coord_z = 9;
  54739. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .mask = 16'hC30C;
  54740. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .modeMux = 1'b1;
  54741. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  54742. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  54743. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .BypassEn = 1'b1;
  54744. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  54745. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] (
  54746. .A(vcc),
  54747. .B(vcc),
  54748. .C(vcc),
  54749. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [3]),
  54750. .Cin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[2]~9 ),
  54751. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [3]),
  54752. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  54753. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  54754. .SyncReset(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ),
  54755. .ShiftData(),
  54756. .SyncLoad(SyncLoad_X62_Y9_GND),
  54757. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3]~10_combout ),
  54758. .Cout(),
  54759. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [3]));
  54760. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .coord_x = 16;
  54761. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .coord_y = 10;
  54762. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .coord_z = 10;
  54763. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .mask = 16'h0FF0;
  54764. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .modeMux = 1'b1;
  54765. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  54766. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  54767. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .BypassEn = 1'b1;
  54768. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  54769. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_bit (
  54770. .A(\macro_inst|u_uart[1]|u_tx[3]|always6~0_combout ),
  54771. .B(vcc),
  54772. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_baud_cnt [3]),
  54773. .D(vcc),
  54774. .Cin(),
  54775. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  54777. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  54778. .SyncReset(),
  54779. .ShiftData(),
  54780. .SyncLoad(),
  54781. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|always6~1_combout ),
  54782. .Cout(),
  54783. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ));
  54784. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .coord_x = 16;
  54785. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .coord_y = 10;
  54786. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .coord_z = 2;
  54787. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .mask = 16'hA0A0;
  54788. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .modeMux = 1'b0;
  54789. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .FeedbackMux = 1'b0;
  54790. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .ShiftMux = 1'b0;
  54791. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .BypassEn = 1'b0;
  54792. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_bit .CarryEnb = 1'b1;
  54793. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_complete (
  54794. .A(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  54795. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  54796. .C(vcc),
  54797. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[3]~11_combout ),
  54798. .Cin(),
  54799. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_complete~q ),
  54800. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  54801. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  54802. .SyncReset(),
  54803. .ShiftData(),
  54804. .SyncLoad(),
  54805. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_complete~0_combout ),
  54806. .Cout(),
  54807. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_complete~q ));
  54808. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .coord_x = 18;
  54809. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .coord_y = 9;
  54810. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .coord_z = 12;
  54811. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .mask = 16'h2232;
  54812. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .modeMux = 1'b0;
  54813. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .FeedbackMux = 1'b1;
  54814. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .ShiftMux = 1'b0;
  54815. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .BypassEn = 1'b0;
  54816. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_complete .CarryEnb = 1'b1;
  54817. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] (
  54818. .A(vcc),
  54819. .B(vcc),
  54820. .C(vcc),
  54821. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  54822. .Cin(),
  54823. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0]),
  54824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout_X62_Y9_SIG_SIG ),
  54825. .AsyncReset(AsyncReset_X62_Y9_GND),
  54826. .SyncReset(),
  54827. .ShiftData(),
  54828. .SyncLoad(),
  54829. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~2_combout ),
  54830. .Cout(),
  54831. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0]));
  54832. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .coord_x = 16;
  54833. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .coord_y = 10;
  54834. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .coord_z = 12;
  54835. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .mask = 16'hFF0F;
  54836. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .modeMux = 1'b0;
  54837. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  54838. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .ShiftMux = 1'b0;
  54839. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .BypassEn = 1'b0;
  54840. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[0] .CarryEnb = 1'b1;
  54841. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] (
  54842. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0]),
  54843. .B(vcc),
  54844. .C(vcc),
  54845. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  54846. .Cin(),
  54847. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [1]),
  54848. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout_X62_Y9_SIG_SIG ),
  54849. .AsyncReset(AsyncReset_X62_Y9_GND),
  54850. .SyncReset(),
  54851. .ShiftData(),
  54852. .SyncLoad(),
  54853. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~0_combout ),
  54854. .Cout(),
  54855. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [1]));
  54856. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .coord_x = 16;
  54857. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .coord_y = 10;
  54858. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .coord_z = 6;
  54859. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .mask = 16'hFFA5;
  54860. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .modeMux = 1'b0;
  54861. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  54862. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .ShiftMux = 1'b0;
  54863. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .BypassEn = 1'b0;
  54864. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[1] .CarryEnb = 1'b1;
  54865. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] (
  54866. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [1]),
  54867. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [0]),
  54868. .C(vcc),
  54869. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  54870. .Cin(),
  54871. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [2]),
  54872. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout_X62_Y9_SIG_SIG ),
  54873. .AsyncReset(AsyncReset_X62_Y9_GND),
  54874. .SyncReset(),
  54875. .ShiftData(),
  54876. .SyncLoad(),
  54877. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt~3_combout ),
  54878. .Cout(),
  54879. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt [2]));
  54880. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .coord_x = 16;
  54881. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .coord_y = 10;
  54882. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .coord_z = 13;
  54883. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .mask = 16'hFFE1;
  54884. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .modeMux = 1'b0;
  54885. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  54886. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .ShiftMux = 1'b0;
  54887. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .BypassEn = 1'b0;
  54888. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2] .CarryEnb = 1'b1;
  54889. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 (
  54890. .A(vcc),
  54891. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  54892. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54893. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  54894. .Cin(),
  54895. .Qin(),
  54896. .Clk(),
  54897. .AsyncReset(),
  54898. .SyncReset(),
  54899. .ShiftData(),
  54900. .SyncLoad(),
  54901. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1_combout ),
  54902. .Cout(),
  54903. .Q());
  54904. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .coord_x = 16;
  54905. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .coord_y = 10;
  54906. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .coord_z = 1;
  54907. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .mask = 16'hFFC0;
  54908. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .modeMux = 1'b0;
  54909. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .FeedbackMux = 1'b0;
  54910. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .ShiftMux = 1'b0;
  54911. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .BypassEn = 1'b0;
  54912. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_data_cnt[2]~1 .CarryEnb = 1'b1;
  54913. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] (
  54914. .A(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  54915. .B(\macro_inst|u_uart[1]|u_regs|tx_write [3]),
  54916. .C(vcc),
  54917. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  54918. .Cin(),
  54919. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  54920. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  54921. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  54922. .SyncReset(),
  54923. .ShiftData(),
  54924. .SyncLoad(),
  54925. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter~0_combout ),
  54926. .Cout(),
  54927. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]));
  54928. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .coord_x = 18;
  54929. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .coord_y = 9;
  54930. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .coord_z = 3;
  54931. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .mask = 16'h5C0C;
  54932. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .modeMux = 1'b0;
  54933. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  54934. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  54935. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .BypassEn = 1'b0;
  54936. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  54937. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] (
  54938. .A(),
  54939. .B(),
  54940. .C(vcc),
  54941. .D(\rv32.mem_ahb_hwdata[0] ),
  54942. .Cin(),
  54943. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]~q ),
  54944. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  54945. .AsyncReset(AsyncReset_X60_Y12_GND),
  54946. .SyncReset(),
  54947. .ShiftData(),
  54948. .SyncLoad(),
  54949. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  54950. .Cout(),
  54951. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]~q ));
  54952. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .coord_x = 15;
  54953. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .coord_y = 12;
  54954. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .coord_z = 8;
  54955. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  54956. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  54957. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  54958. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  54959. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  54960. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  54961. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] (
  54962. .A(),
  54963. .B(),
  54964. .C(vcc),
  54965. .D(\rv32.mem_ahb_hwdata[1] ),
  54966. .Cin(),
  54967. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]~q ),
  54968. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  54969. .AsyncReset(AsyncReset_X60_Y12_GND),
  54970. .SyncReset(),
  54971. .ShiftData(),
  54972. .SyncLoad(),
  54973. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  54974. .Cout(),
  54975. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]~q ));
  54976. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .coord_x = 15;
  54977. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .coord_y = 12;
  54978. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .coord_z = 13;
  54979. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  54980. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  54981. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  54982. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  54983. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  54984. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  54985. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] (
  54986. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  54987. .B(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  54988. .C(\rv32.mem_ahb_hwdata[2] ),
  54989. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  54990. .Cin(),
  54991. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2]~q ),
  54992. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  54993. .AsyncReset(AsyncReset_X60_Y12_GND),
  54994. .SyncReset(SyncReset_X60_Y12_GND),
  54995. .ShiftData(),
  54996. .SyncLoad(SyncLoad_X60_Y12_VCC),
  54997. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout ),
  54998. .Cout(),
  54999. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2]~q ));
  55000. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .coord_x = 15;
  55001. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .coord_y = 12;
  55002. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .coord_z = 10;
  55003. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .mask = 16'hEECC;
  55004. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .modeMux = 1'b0;
  55005. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  55006. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  55007. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .BypassEn = 1'b1;
  55008. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  55009. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] (
  55010. .A(),
  55011. .B(),
  55012. .C(vcc),
  55013. .D(\rv32.mem_ahb_hwdata[3] ),
  55014. .Cin(),
  55015. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]~q ),
  55016. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  55017. .AsyncReset(AsyncReset_X60_Y12_GND),
  55018. .SyncReset(),
  55019. .ShiftData(),
  55020. .SyncLoad(),
  55021. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  55022. .Cout(),
  55023. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]~q ));
  55024. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .coord_x = 15;
  55025. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .coord_y = 12;
  55026. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .coord_z = 7;
  55027. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  55028. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  55029. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  55030. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  55031. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  55032. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  55033. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] (
  55034. .A(),
  55035. .B(),
  55036. .C(vcc),
  55037. .D(\rv32.mem_ahb_hwdata[4] ),
  55038. .Cin(),
  55039. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]~q ),
  55040. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  55041. .AsyncReset(AsyncReset_X60_Y12_GND),
  55042. .SyncReset(),
  55043. .ShiftData(),
  55044. .SyncLoad(),
  55045. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  55046. .Cout(),
  55047. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]~q ));
  55048. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .coord_x = 15;
  55049. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .coord_y = 12;
  55050. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .coord_z = 0;
  55051. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  55052. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  55053. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  55054. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  55055. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  55056. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  55057. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] (
  55058. .A(),
  55059. .B(),
  55060. .C(vcc),
  55061. .D(\rv32.mem_ahb_hwdata[5] ),
  55062. .Cin(),
  55063. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]~q ),
  55064. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  55065. .AsyncReset(AsyncReset_X60_Y12_GND),
  55066. .SyncReset(),
  55067. .ShiftData(),
  55068. .SyncLoad(),
  55069. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  55070. .Cout(),
  55071. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]~q ));
  55072. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .coord_x = 15;
  55073. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .coord_y = 12;
  55074. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .coord_z = 11;
  55075. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  55076. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  55077. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  55078. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  55079. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  55080. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  55081. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] (
  55082. .A(),
  55083. .B(),
  55084. .C(vcc),
  55085. .D(\rv32.mem_ahb_hwdata[6] ),
  55086. .Cin(),
  55087. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]~q ),
  55088. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  55089. .AsyncReset(AsyncReset_X60_Y12_GND),
  55090. .SyncReset(),
  55091. .ShiftData(),
  55092. .SyncLoad(),
  55093. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  55094. .Cout(),
  55095. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]~q ));
  55096. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .coord_x = 15;
  55097. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .coord_y = 12;
  55098. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .coord_z = 3;
  55099. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  55100. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  55101. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  55102. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  55103. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  55104. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  55105. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] (
  55106. .A(),
  55107. .B(),
  55108. .C(vcc),
  55109. .D(\rv32.mem_ahb_hwdata[7] ),
  55110. .Cin(),
  55111. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]~q ),
  55112. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_fifo|wrreq~0_combout_X60_Y12_SIG_SIG ),
  55113. .AsyncReset(AsyncReset_X60_Y12_GND),
  55114. .SyncReset(),
  55115. .ShiftData(),
  55116. .SyncLoad(),
  55117. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  55118. .Cout(),
  55119. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]~q ));
  55120. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .coord_x = 15;
  55121. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .coord_y = 12;
  55122. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .coord_z = 15;
  55123. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  55124. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  55125. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  55126. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  55127. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  55128. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  55129. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_parity (
  55130. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~0_combout ),
  55131. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  55132. .C(vcc),
  55133. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  55134. .Cin(),
  55135. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~q ),
  55136. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  55137. .AsyncReset(AsyncReset_X60_Y9_GND),
  55138. .SyncReset(),
  55139. .ShiftData(),
  55140. .SyncLoad(),
  55141. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~1_combout ),
  55142. .Cout(),
  55143. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~q ));
  55144. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .coord_x = 18;
  55145. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .coord_y = 10;
  55146. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .coord_z = 15;
  55147. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .mask = 16'h12DE;
  55148. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .modeMux = 1'b0;
  55149. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .FeedbackMux = 1'b1;
  55150. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .ShiftMux = 1'b0;
  55151. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .BypassEn = 1'b0;
  55152. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity .CarryEnb = 1'b1;
  55153. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 (
  55154. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  55155. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  55156. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0]),
  55157. .D(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  55158. .Cin(),
  55159. .Qin(),
  55160. .Clk(),
  55161. .AsyncReset(),
  55162. .SyncReset(),
  55163. .ShiftData(),
  55164. .SyncLoad(),
  55165. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_parity~0_combout ),
  55166. .Cout(),
  55167. .Q());
  55168. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .coord_x = 19;
  55169. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .coord_y = 10;
  55170. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .coord_z = 5;
  55171. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .mask = 16'h0080;
  55172. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .modeMux = 1'b0;
  55173. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .FeedbackMux = 1'b0;
  55174. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .ShiftMux = 1'b0;
  55175. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .BypassEn = 1'b0;
  55176. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_parity~0 .CarryEnb = 1'b1;
  55177. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] (
  55178. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][0]~q ),
  55179. .B(vcc),
  55180. .C(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55181. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [1]),
  55182. .Cin(),
  55183. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0]),
  55184. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55185. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55186. .SyncReset(),
  55187. .ShiftData(),
  55188. .SyncLoad(),
  55189. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~0_combout ),
  55190. .Cout(),
  55191. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0]));
  55192. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .coord_x = 15;
  55193. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .coord_y = 12;
  55194. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .coord_z = 5;
  55195. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .mask = 16'hAFA0;
  55196. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .modeMux = 1'b0;
  55197. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  55198. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .ShiftMux = 1'b0;
  55199. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .BypassEn = 1'b0;
  55200. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[0] .CarryEnb = 1'b1;
  55201. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] (
  55202. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [2]),
  55203. .B(vcc),
  55204. .C(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55205. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][1]~q ),
  55206. .Cin(),
  55207. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [1]),
  55208. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55209. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55210. .SyncReset(),
  55211. .ShiftData(),
  55212. .SyncLoad(),
  55213. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~2_combout ),
  55214. .Cout(),
  55215. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [1]));
  55216. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .coord_x = 15;
  55217. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .coord_y = 12;
  55218. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .coord_z = 9;
  55219. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .mask = 16'hFA0A;
  55220. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .modeMux = 1'b0;
  55221. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  55222. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .ShiftMux = 1'b0;
  55223. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .BypassEn = 1'b0;
  55224. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[1] .CarryEnb = 1'b1;
  55225. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] (
  55226. .A(vcc),
  55227. .B(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55228. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][2]~q ),
  55229. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [3]),
  55230. .Cin(),
  55231. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [2]),
  55232. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55233. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55234. .SyncReset(),
  55235. .ShiftData(),
  55236. .SyncLoad(),
  55237. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~3_combout ),
  55238. .Cout(),
  55239. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [2]));
  55240. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .coord_x = 15;
  55241. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .coord_y = 12;
  55242. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .coord_z = 4;
  55243. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .mask = 16'hF3C0;
  55244. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .modeMux = 1'b0;
  55245. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  55246. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .ShiftMux = 1'b0;
  55247. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .BypassEn = 1'b0;
  55248. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2] .CarryEnb = 1'b1;
  55249. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] (
  55250. .A(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55251. .B(vcc),
  55252. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][3]~q ),
  55253. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [4]),
  55254. .Cin(),
  55255. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [3]),
  55256. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55257. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55258. .SyncReset(),
  55259. .ShiftData(),
  55260. .SyncLoad(),
  55261. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~4_combout ),
  55262. .Cout(),
  55263. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [3]));
  55264. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .coord_x = 15;
  55265. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .coord_y = 12;
  55266. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .coord_z = 6;
  55267. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .mask = 16'hF5A0;
  55268. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .modeMux = 1'b0;
  55269. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  55270. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .ShiftMux = 1'b0;
  55271. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .BypassEn = 1'b0;
  55272. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[3] .CarryEnb = 1'b1;
  55273. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] (
  55274. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [5]),
  55275. .B(vcc),
  55276. .C(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55277. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][4]~q ),
  55278. .Cin(),
  55279. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [4]),
  55280. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55281. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55282. .SyncReset(),
  55283. .ShiftData(),
  55284. .SyncLoad(),
  55285. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~5_combout ),
  55286. .Cout(),
  55287. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [4]));
  55288. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .coord_x = 15;
  55289. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .coord_y = 12;
  55290. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .coord_z = 1;
  55291. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .mask = 16'hFA0A;
  55292. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .modeMux = 1'b0;
  55293. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  55294. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .ShiftMux = 1'b0;
  55295. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .BypassEn = 1'b0;
  55296. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[4] .CarryEnb = 1'b1;
  55297. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] (
  55298. .A(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55299. .B(vcc),
  55300. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [6]),
  55301. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][5]~q ),
  55302. .Cin(),
  55303. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [5]),
  55304. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55305. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55306. .SyncReset(),
  55307. .ShiftData(),
  55308. .SyncLoad(),
  55309. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~6_combout ),
  55310. .Cout(),
  55311. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [5]));
  55312. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .coord_x = 15;
  55313. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .coord_y = 12;
  55314. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .coord_z = 12;
  55315. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .mask = 16'hFA50;
  55316. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .modeMux = 1'b0;
  55317. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  55318. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .ShiftMux = 1'b0;
  55319. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .BypassEn = 1'b0;
  55320. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[5] .CarryEnb = 1'b1;
  55321. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] (
  55322. .A(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55323. .B(vcc),
  55324. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [7]),
  55325. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][6]~q ),
  55326. .Cin(),
  55327. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [6]),
  55328. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55329. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55330. .SyncReset(),
  55331. .ShiftData(),
  55332. .SyncLoad(),
  55333. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~7_combout ),
  55334. .Cout(),
  55335. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [6]));
  55336. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .coord_x = 15;
  55337. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .coord_y = 12;
  55338. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .coord_z = 2;
  55339. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .mask = 16'hFA50;
  55340. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .modeMux = 1'b0;
  55341. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  55342. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .ShiftMux = 1'b0;
  55343. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .BypassEn = 1'b0;
  55344. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[6] .CarryEnb = 1'b1;
  55345. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] (
  55346. .A(vcc),
  55347. .B(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55348. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|fifo[1][7]~q ),
  55349. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [0]),
  55350. .Cin(),
  55351. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [7]),
  55352. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[2]~1_combout_X60_Y12_SIG_SIG ),
  55353. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y12_SIG ),
  55354. .SyncReset(),
  55355. .ShiftData(),
  55356. .SyncLoad(),
  55357. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg~8_combout ),
  55358. .Cout(),
  55359. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg [7]));
  55360. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .coord_x = 15;
  55361. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .coord_y = 12;
  55362. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .coord_z = 14;
  55363. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .mask = 16'hF3C0;
  55364. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .modeMux = 1'b0;
  55365. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  55366. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .ShiftMux = 1'b0;
  55367. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .BypassEn = 1'b0;
  55368. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_shift_reg[7] .CarryEnb = 1'b1;
  55369. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA (
  55370. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  55371. .B(\macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ),
  55372. .C(vcc),
  55373. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  55374. .Cin(),
  55375. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  55376. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  55377. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  55378. .SyncReset(),
  55379. .ShiftData(),
  55380. .SyncLoad(),
  55381. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector2~0_combout ),
  55382. .Cout(),
  55383. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ));
  55384. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .coord_x = 16;
  55385. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .coord_y = 10;
  55386. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .coord_z = 3;
  55387. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .mask = 16'hBA30;
  55388. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .modeMux = 1'b0;
  55389. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  55390. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .ShiftMux = 1'b0;
  55391. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .BypassEn = 1'b0;
  55392. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA .CarryEnb = 1'b1;
  55393. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE (
  55394. .A(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  55395. .B(vcc),
  55396. .C(vcc),
  55397. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_fifo|counter [0]),
  55398. .Cin(),
  55399. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  55400. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  55401. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  55402. .SyncReset(),
  55403. .ShiftData(),
  55404. .SyncLoad(),
  55405. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector0~0_combout ),
  55406. .Cout(),
  55407. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ));
  55408. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .coord_x = 18;
  55409. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .coord_y = 9;
  55410. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .coord_z = 2;
  55411. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .mask = 16'hFF50;
  55412. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .modeMux = 1'b0;
  55413. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  55414. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  55415. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .BypassEn = 1'b0;
  55416. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  55417. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY (
  55418. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  55419. .B(\macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ),
  55420. .C(\macro_inst|u_uart[1]|u_tx[3]|Selector3~0_combout ),
  55421. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  55422. .Cin(),
  55423. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ),
  55424. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  55425. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  55426. .SyncReset(),
  55427. .ShiftData(),
  55428. .SyncLoad(),
  55429. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector3~1_combout ),
  55430. .Cout(),
  55431. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY~q ));
  55432. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .coord_x = 16;
  55433. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .coord_y = 10;
  55434. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .coord_z = 11;
  55435. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .mask = 16'hF8F0;
  55436. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .modeMux = 1'b0;
  55437. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  55438. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  55439. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .BypassEn = 1'b0;
  55440. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  55441. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START (
  55442. .A(\macro_inst|u_uart[1]|u_tx[3]|comb~1_combout ),
  55443. .B(\macro_inst|u_uart[1]|u_tx[3]|fifo_rden~combout ),
  55444. .C(vcc),
  55445. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0_combout ),
  55446. .Cin(),
  55447. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  55448. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  55449. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  55450. .SyncReset(),
  55451. .ShiftData(),
  55452. .SyncLoad(),
  55453. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~1_combout ),
  55454. .Cout(),
  55455. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ));
  55456. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .coord_x = 17;
  55457. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .coord_y = 10;
  55458. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .coord_z = 7;
  55459. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .mask = 16'hDCCC;
  55460. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .modeMux = 1'b0;
  55461. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .FeedbackMux = 1'b1;
  55462. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .ShiftMux = 1'b0;
  55463. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .BypassEn = 1'b0;
  55464. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START .CarryEnb = 1'b1;
  55465. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 (
  55466. .A(\macro_inst|u_uart[1]|u_tx[3]|Selector5~3_combout ),
  55467. .B(\macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ),
  55468. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  55469. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  55470. .Cin(),
  55471. .Qin(),
  55472. .Clk(),
  55473. .AsyncReset(),
  55474. .SyncReset(),
  55475. .ShiftData(),
  55476. .SyncLoad(),
  55477. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0_combout ),
  55478. .Cout(),
  55479. .Q());
  55480. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .coord_x = 16;
  55481. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .coord_y = 10;
  55482. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .coord_z = 0;
  55483. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .mask = 16'h775F;
  55484. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .modeMux = 1'b0;
  55485. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  55486. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  55487. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .BypassEn = 1'b0;
  55488. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  55489. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP (
  55490. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  55491. .B(\macro_inst|u_uart[1]|u_tx[3]|always0~0_combout ),
  55492. .C(\macro_inst|u_uart[1]|u_tx[3]|Selector4~0_combout ),
  55493. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_DATA~q ),
  55494. .Cin(),
  55495. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  55496. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y9_SIG_VCC ),
  55497. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y9_SIG ),
  55498. .SyncReset(),
  55499. .ShiftData(),
  55500. .SyncLoad(),
  55501. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector4~1_combout ),
  55502. .Cout(),
  55503. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ));
  55504. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .coord_x = 16;
  55505. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .coord_y = 10;
  55506. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .coord_z = 5;
  55507. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .mask = 16'hF4F0;
  55508. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .modeMux = 1'b0;
  55509. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  55510. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .ShiftMux = 1'b0;
  55511. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .BypassEn = 1'b0;
  55512. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP .CarryEnb = 1'b1;
  55513. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt (
  55514. .A(vcc),
  55515. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0_combout ),
  55516. .C(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  55517. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  55518. .Cin(),
  55519. .Qin(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ),
  55520. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  55521. .AsyncReset(AsyncReset_X61_Y10_GND),
  55522. .SyncReset(),
  55523. .ShiftData(),
  55524. .SyncLoad(),
  55525. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~1_combout ),
  55526. .Cout(),
  55527. .Q(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ));
  55528. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .coord_x = 17;
  55529. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .coord_y = 10;
  55530. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .coord_z = 5;
  55531. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .mask = 16'hFCCC;
  55532. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .modeMux = 1'b0;
  55533. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .FeedbackMux = 1'b0;
  55534. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .ShiftMux = 1'b0;
  55535. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .BypassEn = 1'b0;
  55536. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt .CarryEnb = 1'b1;
  55537. alta_slice \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 (
  55538. .A(\macro_inst|u_uart[1]|u_tx[3]|tx_bit~q ),
  55539. .B(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~q ),
  55540. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  55541. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_START~q ),
  55542. .Cin(),
  55543. .Qin(),
  55544. .Clk(),
  55545. .AsyncReset(),
  55546. .SyncReset(),
  55547. .ShiftData(),
  55548. .SyncLoad(),
  55549. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0_combout ),
  55550. .Cout(),
  55551. .Q());
  55552. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .coord_x = 17;
  55553. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .coord_y = 10;
  55554. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .coord_z = 15;
  55555. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .mask = 16'h006C;
  55556. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .modeMux = 1'b0;
  55557. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  55558. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  55559. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .BypassEn = 1'b0;
  55560. defparam \macro_inst|u_uart[1]|u_tx[3]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  55561. alta_slice \macro_inst|u_uart[1]|u_tx[3]|uart_txd (
  55562. .A(vcc),
  55563. .B(\macro_inst|u_uart[1]|u_tx[3]|Selector5~2_combout ),
  55564. .C(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_STOP~q ),
  55565. .D(\macro_inst|u_uart[1]|u_tx[3]|tx_state.UART_IDLE~q ),
  55566. .Cin(),
  55567. .Qin(\macro_inst|u_uart[1]|u_tx[3]|uart_txd~q ),
  55568. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  55569. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y9_SIG ),
  55570. .SyncReset(),
  55571. .ShiftData(),
  55572. .SyncLoad(),
  55573. .LutOut(\macro_inst|u_uart[1]|u_tx[3]|Selector5~4_combout ),
  55574. .Cout(),
  55575. .Q(\macro_inst|u_uart[1]|u_tx[3]|uart_txd~q ));
  55576. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .coord_x = 18;
  55577. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .coord_y = 10;
  55578. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .coord_z = 6;
  55579. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .mask = 16'h0300;
  55580. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .modeMux = 1'b0;
  55581. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .FeedbackMux = 1'b0;
  55582. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .ShiftMux = 1'b0;
  55583. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .BypassEn = 1'b0;
  55584. defparam \macro_inst|u_uart[1]|u_tx[3]|uart_txd .CarryEnb = 1'b1;
  55585. alta_slice \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 (
  55586. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ),
  55587. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  55588. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ),
  55589. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  55590. .Cin(),
  55591. .Qin(),
  55592. .Clk(),
  55593. .AsyncReset(),
  55594. .SyncReset(),
  55595. .ShiftData(),
  55596. .SyncLoad(),
  55597. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector4~0_combout ),
  55598. .Cout(),
  55599. .Q());
  55600. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .coord_x = 15;
  55601. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .coord_y = 11;
  55602. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .coord_z = 14;
  55603. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .mask = 16'hEACC;
  55604. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .modeMux = 1'b0;
  55605. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .FeedbackMux = 1'b0;
  55606. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .ShiftMux = 1'b0;
  55607. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .BypassEn = 1'b0;
  55608. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector4~0 .CarryEnb = 1'b1;
  55609. alta_slice \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 (
  55610. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0]),
  55611. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~q ),
  55612. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ),
  55613. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  55614. .Cin(),
  55615. .Qin(),
  55616. .Clk(),
  55617. .AsyncReset(),
  55618. .SyncReset(),
  55619. .ShiftData(),
  55620. .SyncLoad(),
  55621. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector5~2_combout ),
  55622. .Cout(),
  55623. .Q());
  55624. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .coord_x = 15;
  55625. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .coord_y = 11;
  55626. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .coord_z = 10;
  55627. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .mask = 16'hEAC0;
  55628. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .modeMux = 1'b0;
  55629. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .FeedbackMux = 1'b0;
  55630. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .ShiftMux = 1'b0;
  55631. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .BypassEn = 1'b0;
  55632. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~2 .CarryEnb = 1'b1;
  55633. alta_slice \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 (
  55634. .A(vcc),
  55635. .B(vcc),
  55636. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  55637. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  55638. .Cin(),
  55639. .Qin(),
  55640. .Clk(),
  55641. .AsyncReset(),
  55642. .SyncReset(),
  55643. .ShiftData(),
  55644. .SyncLoad(),
  55645. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector5~3_combout ),
  55646. .Cout(),
  55647. .Q());
  55648. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .coord_x = 16;
  55649. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .coord_y = 11;
  55650. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .coord_z = 5;
  55651. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .mask = 16'h0F00;
  55652. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .modeMux = 1'b0;
  55653. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .FeedbackMux = 1'b0;
  55654. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .ShiftMux = 1'b0;
  55655. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .BypassEn = 1'b0;
  55656. defparam \macro_inst|u_uart[1]|u_tx[4]|Selector5~3 .CarryEnb = 1'b1;
  55657. alta_slice \macro_inst|u_uart[1]|u_tx[4]|always0~0 (
  55658. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  55659. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [2]),
  55660. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [1]),
  55661. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0]),
  55662. .Cin(),
  55663. .Qin(),
  55664. .Clk(),
  55665. .AsyncReset(),
  55666. .SyncReset(),
  55667. .ShiftData(),
  55668. .SyncLoad(),
  55669. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ),
  55670. .Cout(),
  55671. .Q());
  55672. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .coord_x = 16;
  55673. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .coord_y = 11;
  55674. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .coord_z = 14;
  55675. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .mask = 16'h0002;
  55676. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .modeMux = 1'b0;
  55677. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .FeedbackMux = 1'b0;
  55678. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .ShiftMux = 1'b0;
  55679. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .BypassEn = 1'b0;
  55680. defparam \macro_inst|u_uart[1]|u_tx[4]|always0~0 .CarryEnb = 1'b1;
  55681. alta_slice \macro_inst|u_uart[1]|u_tx[4]|always6~0 (
  55682. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [2]),
  55683. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [1]),
  55684. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [0]),
  55685. .D(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  55686. .Cin(),
  55687. .Qin(),
  55688. .Clk(),
  55689. .AsyncReset(),
  55690. .SyncReset(),
  55691. .ShiftData(),
  55692. .SyncLoad(),
  55693. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|always6~0_combout ),
  55694. .Cout(),
  55695. .Q());
  55696. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .coord_x = 16;
  55697. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .coord_y = 11;
  55698. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .coord_z = 4;
  55699. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .mask = 16'h8000;
  55700. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .modeMux = 1'b0;
  55701. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .FeedbackMux = 1'b0;
  55702. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .ShiftMux = 1'b0;
  55703. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .BypassEn = 1'b0;
  55704. defparam \macro_inst|u_uart[1]|u_tx[4]|always6~0 .CarryEnb = 1'b1;
  55705. alta_slice \macro_inst|u_uart[1]|u_tx[4]|fifo_rden (
  55706. .A(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0_combout ),
  55707. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  55708. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ),
  55709. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  55710. .Cin(),
  55711. .Qin(),
  55712. .Clk(),
  55713. .AsyncReset(),
  55714. .SyncReset(),
  55715. .ShiftData(),
  55716. .SyncLoad(),
  55717. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  55718. .Cout(),
  55719. .Q());
  55720. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .coord_x = 16;
  55721. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .coord_y = 11;
  55722. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .coord_z = 0;
  55723. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .mask = 16'h08CC;
  55724. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .modeMux = 1'b0;
  55725. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .FeedbackMux = 1'b0;
  55726. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .ShiftMux = 1'b0;
  55727. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .BypassEn = 1'b0;
  55728. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden .CarryEnb = 1'b1;
  55729. alta_slice \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 (
  55730. .A(vcc),
  55731. .B(vcc),
  55732. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  55733. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  55734. .Cin(),
  55735. .Qin(),
  55736. .Clk(),
  55737. .AsyncReset(),
  55738. .SyncReset(),
  55739. .ShiftData(),
  55740. .SyncLoad(),
  55741. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0_combout ),
  55742. .Cout(),
  55743. .Q());
  55744. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .coord_x = 16;
  55745. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .coord_y = 11;
  55746. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .coord_z = 1;
  55747. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .mask = 16'hF000;
  55748. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .modeMux = 1'b0;
  55749. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .FeedbackMux = 1'b0;
  55750. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .ShiftMux = 1'b0;
  55751. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .BypassEn = 1'b0;
  55752. defparam \macro_inst|u_uart[1]|u_tx[4]|fifo_rden~0 .CarryEnb = 1'b1;
  55753. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] (
  55754. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [0]),
  55755. .B(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  55756. .C(vcc),
  55757. .D(vcc),
  55758. .Cin(),
  55759. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [0]),
  55760. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  55761. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  55762. .SyncReset(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ),
  55763. .ShiftData(),
  55764. .SyncLoad(SyncLoad_X62_Y10_GND),
  55765. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0]~4_combout ),
  55766. .Cout(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0]~5 ),
  55767. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [0]));
  55768. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .coord_x = 16;
  55769. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .coord_y = 11;
  55770. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .coord_z = 10;
  55771. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .mask = 16'h6688;
  55772. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .modeMux = 1'b0;
  55773. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  55774. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  55775. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .BypassEn = 1'b1;
  55776. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  55777. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] (
  55778. .A(vcc),
  55779. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [1]),
  55780. .C(vcc),
  55781. .D(vcc),
  55782. .Cin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[0]~5 ),
  55783. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [1]),
  55784. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  55785. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  55786. .SyncReset(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ),
  55787. .ShiftData(),
  55788. .SyncLoad(SyncLoad_X62_Y10_GND),
  55789. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1]~6_combout ),
  55790. .Cout(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1]~7 ),
  55791. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [1]));
  55792. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .coord_x = 16;
  55793. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .coord_y = 11;
  55794. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .coord_z = 11;
  55795. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .mask = 16'h3C3F;
  55796. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .modeMux = 1'b1;
  55797. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  55798. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  55799. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .BypassEn = 1'b1;
  55800. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  55801. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] (
  55802. .A(vcc),
  55803. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [2]),
  55804. .C(vcc),
  55805. .D(vcc),
  55806. .Cin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[1]~7 ),
  55807. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [2]),
  55808. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  55809. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  55810. .SyncReset(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ),
  55811. .ShiftData(),
  55812. .SyncLoad(SyncLoad_X62_Y10_GND),
  55813. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2]~8_combout ),
  55814. .Cout(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2]~9 ),
  55815. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [2]));
  55816. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .coord_x = 16;
  55817. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .coord_y = 11;
  55818. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .coord_z = 12;
  55819. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .mask = 16'hC30C;
  55820. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .modeMux = 1'b1;
  55821. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  55822. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  55823. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .BypassEn = 1'b1;
  55824. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  55825. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] (
  55826. .A(vcc),
  55827. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [3]),
  55828. .C(vcc),
  55829. .D(vcc),
  55830. .Cin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[2]~9 ),
  55831. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [3]),
  55832. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  55833. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  55834. .SyncReset(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ),
  55835. .ShiftData(),
  55836. .SyncLoad(SyncLoad_X62_Y10_GND),
  55837. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3]~10_combout ),
  55838. .Cout(),
  55839. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [3]));
  55840. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .coord_x = 16;
  55841. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .coord_y = 11;
  55842. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .coord_z = 13;
  55843. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .mask = 16'h3C3C;
  55844. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .modeMux = 1'b1;
  55845. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  55846. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  55847. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .BypassEn = 1'b1;
  55848. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  55849. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_bit (
  55850. .A(vcc),
  55851. .B(vcc),
  55852. .C(\macro_inst|u_uart[1]|u_tx[4]|always6~0_combout ),
  55853. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_baud_cnt [3]),
  55854. .Cin(),
  55855. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  55856. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  55857. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  55858. .SyncReset(),
  55859. .ShiftData(),
  55860. .SyncLoad(),
  55861. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|always6~1_combout ),
  55862. .Cout(),
  55863. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ));
  55864. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .coord_x = 16;
  55865. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .coord_y = 11;
  55866. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .coord_z = 15;
  55867. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .mask = 16'hF000;
  55868. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .modeMux = 1'b0;
  55869. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .FeedbackMux = 1'b0;
  55870. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .ShiftMux = 1'b0;
  55871. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .BypassEn = 1'b0;
  55872. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_bit .CarryEnb = 1'b1;
  55873. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_complete (
  55874. .A(\macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ),
  55875. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  55876. .C(vcc),
  55877. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[4]~15_combout ),
  55878. .Cin(),
  55879. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_complete~q ),
  55880. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y8_SIG_VCC ),
  55881. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y8_SIG ),
  55882. .SyncReset(),
  55883. .ShiftData(),
  55884. .SyncLoad(),
  55885. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_complete~0_combout ),
  55886. .Cout(),
  55887. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_complete~q ));
  55888. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .coord_x = 17;
  55889. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .coord_y = 8;
  55890. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .coord_z = 3;
  55891. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .mask = 16'h3222;
  55892. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .modeMux = 1'b0;
  55893. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .FeedbackMux = 1'b1;
  55894. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .ShiftMux = 1'b0;
  55895. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .BypassEn = 1'b0;
  55896. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_complete .CarryEnb = 1'b1;
  55897. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] (
  55898. .A(vcc),
  55899. .B(vcc),
  55900. .C(vcc),
  55901. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  55902. .Cin(),
  55903. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0]),
  55904. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout_X62_Y10_SIG_SIG ),
  55905. .AsyncReset(AsyncReset_X62_Y10_GND),
  55906. .SyncReset(),
  55907. .ShiftData(),
  55908. .SyncLoad(),
  55909. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~2_combout ),
  55910. .Cout(),
  55911. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0]));
  55912. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .coord_x = 16;
  55913. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .coord_y = 11;
  55914. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .coord_z = 3;
  55915. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .mask = 16'hFF0F;
  55916. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .modeMux = 1'b0;
  55917. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  55918. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .ShiftMux = 1'b0;
  55919. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .BypassEn = 1'b0;
  55920. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[0] .CarryEnb = 1'b1;
  55921. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] (
  55922. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  55923. .B(vcc),
  55924. .C(vcc),
  55925. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0]),
  55926. .Cin(),
  55927. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [1]),
  55928. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout_X62_Y10_SIG_SIG ),
  55929. .AsyncReset(AsyncReset_X62_Y10_GND),
  55930. .SyncReset(),
  55931. .ShiftData(),
  55932. .SyncLoad(),
  55933. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~0_combout ),
  55934. .Cout(),
  55935. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [1]));
  55936. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .coord_x = 16;
  55937. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .coord_y = 11;
  55938. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .coord_z = 8;
  55939. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .mask = 16'hFAAF;
  55940. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .modeMux = 1'b0;
  55941. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  55942. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .ShiftMux = 1'b0;
  55943. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .BypassEn = 1'b0;
  55944. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[1] .CarryEnb = 1'b1;
  55945. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] (
  55946. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [1]),
  55947. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  55948. .C(vcc),
  55949. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [0]),
  55950. .Cin(),
  55951. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [2]),
  55952. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout_X62_Y10_SIG_SIG ),
  55953. .AsyncReset(AsyncReset_X62_Y10_GND),
  55954. .SyncReset(),
  55955. .ShiftData(),
  55956. .SyncLoad(),
  55957. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt~3_combout ),
  55958. .Cout(),
  55959. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt [2]));
  55960. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .coord_x = 16;
  55961. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .coord_y = 11;
  55962. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .coord_z = 7;
  55963. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .mask = 16'hFCED;
  55964. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .modeMux = 1'b0;
  55965. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  55966. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .ShiftMux = 1'b0;
  55967. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .BypassEn = 1'b0;
  55968. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2] .CarryEnb = 1'b1;
  55969. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 (
  55970. .A(vcc),
  55971. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  55972. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  55973. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  55974. .Cin(),
  55975. .Qin(),
  55976. .Clk(),
  55977. .AsyncReset(),
  55978. .SyncReset(),
  55979. .ShiftData(),
  55980. .SyncLoad(),
  55981. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1_combout ),
  55982. .Cout(),
  55983. .Q());
  55984. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .coord_x = 16;
  55985. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .coord_y = 11;
  55986. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .coord_z = 9;
  55987. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .mask = 16'hFCF0;
  55988. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .modeMux = 1'b0;
  55989. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .FeedbackMux = 1'b0;
  55990. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .ShiftMux = 1'b0;
  55991. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .BypassEn = 1'b0;
  55992. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_data_cnt[2]~1 .CarryEnb = 1'b1;
  55993. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] (
  55994. .A(\macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ),
  55995. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  55996. .C(vcc),
  55997. .D(\macro_inst|u_uart[1]|u_regs|tx_write [4]),
  55998. .Cin(),
  55999. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  56000. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56001. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56002. .SyncReset(),
  56003. .ShiftData(),
  56004. .SyncLoad(),
  56005. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter~0_combout ),
  56006. .Cout(),
  56007. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]));
  56008. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .coord_x = 17;
  56009. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .coord_y = 10;
  56010. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .coord_z = 6;
  56011. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .mask = 16'h4F40;
  56012. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .modeMux = 1'b0;
  56013. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  56014. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  56015. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .BypassEn = 1'b0;
  56016. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  56017. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] (
  56018. .A(),
  56019. .B(),
  56020. .C(vcc),
  56021. .D(\rv32.mem_ahb_hwdata[0] ),
  56022. .Cin(),
  56023. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]~q ),
  56024. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56025. .AsyncReset(AsyncReset_X62_Y12_GND),
  56026. .SyncReset(),
  56027. .ShiftData(),
  56028. .SyncLoad(),
  56029. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  56030. .Cout(),
  56031. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]~q ));
  56032. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .coord_x = 14;
  56033. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .coord_y = 11;
  56034. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .coord_z = 1;
  56035. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  56036. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  56037. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  56038. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  56039. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  56040. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  56041. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] (
  56042. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56043. .B(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56044. .C(\rv32.mem_ahb_hwdata[1] ),
  56045. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  56046. .Cin(),
  56047. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1]~q ),
  56048. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56049. .AsyncReset(AsyncReset_X62_Y12_GND),
  56050. .SyncReset(SyncReset_X62_Y12_GND),
  56051. .ShiftData(),
  56052. .SyncLoad(SyncLoad_X62_Y12_VCC),
  56053. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout ),
  56054. .Cout(),
  56055. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1]~q ));
  56056. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .coord_x = 14;
  56057. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .coord_y = 11;
  56058. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .coord_z = 4;
  56059. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .mask = 16'hEECC;
  56060. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .modeMux = 1'b0;
  56061. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  56062. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  56063. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .BypassEn = 1'b1;
  56064. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  56065. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] (
  56066. .A(),
  56067. .B(),
  56068. .C(vcc),
  56069. .D(\rv32.mem_ahb_hwdata[2] ),
  56070. .Cin(),
  56071. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]~q ),
  56072. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56073. .AsyncReset(AsyncReset_X62_Y12_GND),
  56074. .SyncReset(),
  56075. .ShiftData(),
  56076. .SyncLoad(),
  56077. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]__feeder__LutOut ),
  56078. .Cout(),
  56079. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]~q ));
  56080. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .coord_x = 14;
  56081. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .coord_y = 11;
  56082. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .coord_z = 15;
  56083. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .mask = 16'hFF00;
  56084. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .modeMux = 1'b1;
  56085. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  56086. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  56087. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .BypassEn = 1'b0;
  56088. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  56089. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] (
  56090. .A(),
  56091. .B(),
  56092. .C(vcc),
  56093. .D(\rv32.mem_ahb_hwdata[3] ),
  56094. .Cin(),
  56095. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]~q ),
  56096. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56097. .AsyncReset(AsyncReset_X62_Y12_GND),
  56098. .SyncReset(),
  56099. .ShiftData(),
  56100. .SyncLoad(),
  56101. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  56102. .Cout(),
  56103. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]~q ));
  56104. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .coord_x = 14;
  56105. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .coord_y = 11;
  56106. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .coord_z = 13;
  56107. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  56108. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  56109. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  56110. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  56111. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  56112. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  56113. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] (
  56114. .A(),
  56115. .B(),
  56116. .C(vcc),
  56117. .D(\rv32.mem_ahb_hwdata[4] ),
  56118. .Cin(),
  56119. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]~q ),
  56120. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56121. .AsyncReset(AsyncReset_X62_Y12_GND),
  56122. .SyncReset(),
  56123. .ShiftData(),
  56124. .SyncLoad(),
  56125. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]__feeder__LutOut ),
  56126. .Cout(),
  56127. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]~q ));
  56128. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .coord_x = 14;
  56129. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .coord_y = 11;
  56130. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .coord_z = 3;
  56131. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .mask = 16'hFF00;
  56132. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .modeMux = 1'b1;
  56133. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  56134. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  56135. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .BypassEn = 1'b0;
  56136. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  56137. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] (
  56138. .A(),
  56139. .B(),
  56140. .C(vcc),
  56141. .D(\rv32.mem_ahb_hwdata[5] ),
  56142. .Cin(),
  56143. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]~q ),
  56144. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56145. .AsyncReset(AsyncReset_X62_Y12_GND),
  56146. .SyncReset(),
  56147. .ShiftData(),
  56148. .SyncLoad(),
  56149. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  56150. .Cout(),
  56151. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]~q ));
  56152. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .coord_x = 14;
  56153. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .coord_y = 11;
  56154. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .coord_z = 11;
  56155. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  56156. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  56157. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  56158. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  56159. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  56160. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  56161. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] (
  56162. .A(),
  56163. .B(),
  56164. .C(vcc),
  56165. .D(\rv32.mem_ahb_hwdata[6] ),
  56166. .Cin(),
  56167. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]~q ),
  56168. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56169. .AsyncReset(AsyncReset_X62_Y12_GND),
  56170. .SyncReset(),
  56171. .ShiftData(),
  56172. .SyncLoad(),
  56173. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  56174. .Cout(),
  56175. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]~q ));
  56176. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .coord_x = 14;
  56177. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .coord_y = 11;
  56178. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .coord_z = 5;
  56179. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  56180. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  56181. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  56182. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  56183. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  56184. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  56185. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] (
  56186. .A(),
  56187. .B(),
  56188. .C(vcc),
  56189. .D(\rv32.mem_ahb_hwdata[7] ),
  56190. .Cin(),
  56191. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]~q ),
  56192. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout_X62_Y12_SIG_SIG ),
  56193. .AsyncReset(AsyncReset_X62_Y12_GND),
  56194. .SyncReset(),
  56195. .ShiftData(),
  56196. .SyncLoad(),
  56197. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  56198. .Cout(),
  56199. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]~q ));
  56200. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .coord_x = 14;
  56201. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .coord_y = 11;
  56202. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .coord_z = 2;
  56203. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  56204. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  56205. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  56206. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  56207. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  56208. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  56209. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 (
  56210. .A(\macro_inst|u_uart[1]|u_regs|tx_write [4]),
  56211. .B(vcc),
  56212. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  56213. .D(vcc),
  56214. .Cin(),
  56215. .Qin(),
  56216. .Clk(),
  56217. .AsyncReset(),
  56218. .SyncReset(),
  56219. .ShiftData(),
  56220. .SyncLoad(),
  56221. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0_combout ),
  56222. .Cout(),
  56223. .Q());
  56224. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .coord_x = 17;
  56225. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .coord_y = 10;
  56226. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .coord_z = 11;
  56227. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .mask = 16'h0A0A;
  56228. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .modeMux = 1'b0;
  56229. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .FeedbackMux = 1'b0;
  56230. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .ShiftMux = 1'b0;
  56231. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .BypassEn = 1'b0;
  56232. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_fifo|wrreq~0 .CarryEnb = 1'b1;
  56233. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_parity (
  56234. .A(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  56235. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~0_combout ),
  56236. .C(vcc),
  56237. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  56238. .Cin(),
  56239. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~q ),
  56240. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56241. .AsyncReset(AsyncReset_X62_Y6_GND),
  56242. .SyncReset(),
  56243. .ShiftData(),
  56244. .SyncLoad(),
  56245. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~1_combout ),
  56246. .Cout(),
  56247. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~q ));
  56248. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .coord_x = 15;
  56249. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .coord_y = 11;
  56250. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .coord_z = 1;
  56251. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .mask = 16'h553C;
  56252. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .modeMux = 1'b0;
  56253. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .FeedbackMux = 1'b1;
  56254. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .ShiftMux = 1'b0;
  56255. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .BypassEn = 1'b0;
  56256. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity .CarryEnb = 1'b1;
  56257. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 (
  56258. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0]),
  56259. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56260. .C(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  56261. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  56262. .Cin(),
  56263. .Qin(),
  56264. .Clk(),
  56265. .AsyncReset(),
  56266. .SyncReset(),
  56267. .ShiftData(),
  56268. .SyncLoad(),
  56269. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_parity~0_combout ),
  56270. .Cout(),
  56271. .Q());
  56272. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .coord_x = 15;
  56273. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .coord_y = 11;
  56274. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .coord_z = 9;
  56275. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .mask = 16'h0800;
  56276. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .modeMux = 1'b0;
  56277. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .FeedbackMux = 1'b0;
  56278. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .ShiftMux = 1'b0;
  56279. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .BypassEn = 1'b0;
  56280. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_parity~0 .CarryEnb = 1'b1;
  56281. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] (
  56282. .A(vcc),
  56283. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][0]~q ),
  56284. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [1]),
  56285. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56286. .Cin(),
  56287. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0]),
  56288. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56289. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56290. .SyncReset(),
  56291. .ShiftData(),
  56292. .SyncLoad(),
  56293. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~0_combout ),
  56294. .Cout(),
  56295. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0]));
  56296. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .coord_x = 14;
  56297. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .coord_y = 11;
  56298. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .coord_z = 9;
  56299. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .mask = 16'hCCF0;
  56300. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .modeMux = 1'b0;
  56301. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  56302. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .ShiftMux = 1'b0;
  56303. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .BypassEn = 1'b0;
  56304. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[0] .CarryEnb = 1'b1;
  56305. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] (
  56306. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [2]),
  56307. .B(vcc),
  56308. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][1]~q ),
  56309. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56310. .Cin(),
  56311. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [1]),
  56312. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56313. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56314. .SyncReset(),
  56315. .ShiftData(),
  56316. .SyncLoad(),
  56317. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~2_combout ),
  56318. .Cout(),
  56319. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [1]));
  56320. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .coord_x = 14;
  56321. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .coord_y = 11;
  56322. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .coord_z = 8;
  56323. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .mask = 16'hF0AA;
  56324. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .modeMux = 1'b0;
  56325. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  56326. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .ShiftMux = 1'b0;
  56327. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .BypassEn = 1'b0;
  56328. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[1] .CarryEnb = 1'b1;
  56329. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] (
  56330. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [3]),
  56331. .B(vcc),
  56332. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][2]~q ),
  56333. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56334. .Cin(),
  56335. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [2]),
  56336. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56337. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56338. .SyncReset(),
  56339. .ShiftData(),
  56340. .SyncLoad(),
  56341. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~3_combout ),
  56342. .Cout(),
  56343. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [2]));
  56344. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .coord_x = 14;
  56345. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .coord_y = 11;
  56346. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .coord_z = 14;
  56347. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .mask = 16'hF0AA;
  56348. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .modeMux = 1'b0;
  56349. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  56350. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .ShiftMux = 1'b0;
  56351. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .BypassEn = 1'b0;
  56352. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[2] .CarryEnb = 1'b1;
  56353. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] (
  56354. .A(vcc),
  56355. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][3]~q ),
  56356. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [4]),
  56357. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56358. .Cin(),
  56359. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [3]),
  56360. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56361. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56362. .SyncReset(),
  56363. .ShiftData(),
  56364. .SyncLoad(),
  56365. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~4_combout ),
  56366. .Cout(),
  56367. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [3]));
  56368. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .coord_x = 14;
  56369. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .coord_y = 11;
  56370. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .coord_z = 6;
  56371. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .mask = 16'hCCF0;
  56372. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .modeMux = 1'b0;
  56373. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  56374. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .ShiftMux = 1'b0;
  56375. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .BypassEn = 1'b0;
  56376. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[3] .CarryEnb = 1'b1;
  56377. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] (
  56378. .A(vcc),
  56379. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][4]~q ),
  56380. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [5]),
  56381. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56382. .Cin(),
  56383. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [4]),
  56384. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56385. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56386. .SyncReset(),
  56387. .ShiftData(),
  56388. .SyncLoad(),
  56389. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~5_combout ),
  56390. .Cout(),
  56391. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [4]));
  56392. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .coord_x = 14;
  56393. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .coord_y = 11;
  56394. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .coord_z = 7;
  56395. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .mask = 16'hCCF0;
  56396. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .modeMux = 1'b0;
  56397. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  56398. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .ShiftMux = 1'b0;
  56399. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .BypassEn = 1'b0;
  56400. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4] .CarryEnb = 1'b1;
  56401. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] (
  56402. .A(vcc),
  56403. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][5]~q ),
  56404. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [6]),
  56405. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56406. .Cin(),
  56407. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [5]),
  56408. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56409. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56410. .SyncReset(),
  56411. .ShiftData(),
  56412. .SyncLoad(),
  56413. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~6_combout ),
  56414. .Cout(),
  56415. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [5]));
  56416. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .coord_x = 14;
  56417. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .coord_y = 11;
  56418. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .coord_z = 0;
  56419. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .mask = 16'hCCF0;
  56420. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .modeMux = 1'b0;
  56421. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  56422. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .ShiftMux = 1'b0;
  56423. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .BypassEn = 1'b0;
  56424. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[5] .CarryEnb = 1'b1;
  56425. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] (
  56426. .A(vcc),
  56427. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][6]~q ),
  56428. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [7]),
  56429. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56430. .Cin(),
  56431. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [6]),
  56432. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56433. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56434. .SyncReset(),
  56435. .ShiftData(),
  56436. .SyncLoad(),
  56437. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~7_combout ),
  56438. .Cout(),
  56439. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [6]));
  56440. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .coord_x = 14;
  56441. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .coord_y = 11;
  56442. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .coord_z = 10;
  56443. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .mask = 16'hCCF0;
  56444. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .modeMux = 1'b0;
  56445. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  56446. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .ShiftMux = 1'b0;
  56447. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .BypassEn = 1'b0;
  56448. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[6] .CarryEnb = 1'b1;
  56449. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] (
  56450. .A(vcc),
  56451. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [0]),
  56452. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|fifo[1][7]~q ),
  56453. .D(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56454. .Cin(),
  56455. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [7]),
  56456. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[4]~1_combout_X62_Y12_SIG_SIG ),
  56457. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y12_SIG ),
  56458. .SyncReset(),
  56459. .ShiftData(),
  56460. .SyncLoad(),
  56461. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg~8_combout ),
  56462. .Cout(),
  56463. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg [7]));
  56464. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .coord_x = 14;
  56465. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .coord_y = 11;
  56466. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .coord_z = 12;
  56467. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .mask = 16'hF0CC;
  56468. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .modeMux = 1'b0;
  56469. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  56470. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .ShiftMux = 1'b0;
  56471. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .BypassEn = 1'b0;
  56472. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_shift_reg[7] .CarryEnb = 1'b1;
  56473. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA (
  56474. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  56475. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  56476. .C(vcc),
  56477. .D(\macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ),
  56478. .Cin(),
  56479. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56480. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56481. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  56482. .SyncReset(),
  56483. .ShiftData(),
  56484. .SyncLoad(),
  56485. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector2~0_combout ),
  56486. .Cout(),
  56487. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ));
  56488. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .coord_x = 15;
  56489. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .coord_y = 11;
  56490. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .coord_z = 15;
  56491. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .mask = 16'h88F8;
  56492. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .modeMux = 1'b0;
  56493. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  56494. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .ShiftMux = 1'b0;
  56495. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .BypassEn = 1'b0;
  56496. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA .CarryEnb = 1'b1;
  56497. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE (
  56498. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  56499. .B(vcc),
  56500. .C(vcc),
  56501. .D(\macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ),
  56502. .Cin(),
  56503. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  56504. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56505. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56506. .SyncReset(),
  56507. .ShiftData(),
  56508. .SyncLoad(),
  56509. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector0~0_combout ),
  56510. .Cout(),
  56511. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ));
  56512. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .coord_x = 17;
  56513. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .coord_y = 10;
  56514. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .coord_z = 13;
  56515. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .mask = 16'hAAFA;
  56516. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .modeMux = 1'b0;
  56517. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  56518. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  56519. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .BypassEn = 1'b0;
  56520. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  56521. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY (
  56522. .A(\macro_inst|u_uart[1]|u_tx[4]|Selector3~0_combout ),
  56523. .B(\macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ),
  56524. .C(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  56525. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56526. .Cin(),
  56527. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ),
  56528. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56529. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  56530. .SyncReset(),
  56531. .ShiftData(),
  56532. .SyncLoad(),
  56533. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector3~1_combout ),
  56534. .Cout(),
  56535. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY~q ));
  56536. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .coord_x = 15;
  56537. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .coord_y = 11;
  56538. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .coord_z = 8;
  56539. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .mask = 16'hEAAA;
  56540. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .modeMux = 1'b0;
  56541. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  56542. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  56543. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .BypassEn = 1'b0;
  56544. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  56545. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START (
  56546. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0_combout ),
  56547. .B(\macro_inst|u_uart[1]|u_tx[4]|fifo_rden~combout ),
  56548. .C(vcc),
  56549. .D(\macro_inst|u_uart[1]|u_tx[4]|comb~1_combout ),
  56550. .Cin(),
  56551. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  56552. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y10_SIG_VCC ),
  56553. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y10_SIG ),
  56554. .SyncReset(),
  56555. .ShiftData(),
  56556. .SyncLoad(),
  56557. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~1_combout ),
  56558. .Cout(),
  56559. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ));
  56560. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .coord_x = 16;
  56561. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .coord_y = 11;
  56562. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .coord_z = 2;
  56563. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .mask = 16'hCCEC;
  56564. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .modeMux = 1'b0;
  56565. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .FeedbackMux = 1'b1;
  56566. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .ShiftMux = 1'b0;
  56567. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .BypassEn = 1'b0;
  56568. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START .CarryEnb = 1'b1;
  56569. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 (
  56570. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  56571. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56572. .C(\macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ),
  56573. .D(\macro_inst|u_uart[1]|u_tx[4]|Selector5~3_combout ),
  56574. .Cin(),
  56575. .Qin(),
  56576. .Clk(),
  56577. .AsyncReset(),
  56578. .SyncReset(),
  56579. .ShiftData(),
  56580. .SyncLoad(),
  56581. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0_combout ),
  56582. .Cout(),
  56583. .Q());
  56584. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .coord_x = 16;
  56585. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .coord_y = 11;
  56586. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .coord_z = 6;
  56587. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .mask = 16'h1DFF;
  56588. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .modeMux = 1'b0;
  56589. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  56590. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  56591. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .BypassEn = 1'b0;
  56592. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  56593. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP (
  56594. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  56595. .B(\macro_inst|u_uart[1]|u_tx[4]|always0~0_combout ),
  56596. .C(\macro_inst|u_uart[1]|u_tx[4]|Selector4~0_combout ),
  56597. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_DATA~q ),
  56598. .Cin(),
  56599. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  56600. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56601. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  56602. .SyncReset(),
  56603. .ShiftData(),
  56604. .SyncLoad(),
  56605. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector4~1_combout ),
  56606. .Cout(),
  56607. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ));
  56608. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .coord_x = 15;
  56609. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .coord_y = 11;
  56610. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .coord_z = 13;
  56611. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .mask = 16'hF4F0;
  56612. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .modeMux = 1'b0;
  56613. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  56614. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .ShiftMux = 1'b0;
  56615. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .BypassEn = 1'b0;
  56616. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP .CarryEnb = 1'b1;
  56617. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_stop (
  56618. .A(vcc),
  56619. .B(vcc),
  56620. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_fifo|counter [0]),
  56621. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  56622. .Cin(),
  56623. .Qin(),
  56624. .Clk(),
  56625. .AsyncReset(),
  56626. .SyncReset(),
  56627. .ShiftData(),
  56628. .SyncLoad(),
  56629. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout ),
  56630. .Cout(),
  56631. .Q());
  56632. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .coord_x = 17;
  56633. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .coord_y = 10;
  56634. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .coord_z = 8;
  56635. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .mask = 16'h000F;
  56636. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .modeMux = 1'b0;
  56637. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .FeedbackMux = 1'b0;
  56638. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .ShiftMux = 1'b0;
  56639. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .BypassEn = 1'b0;
  56640. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop .CarryEnb = 1'b1;
  56641. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt (
  56642. .A(vcc),
  56643. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  56644. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0_combout ),
  56645. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  56646. .Cin(),
  56647. .Qin(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ),
  56648. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56649. .AsyncReset(AsyncReset_X62_Y6_GND),
  56650. .SyncReset(),
  56651. .ShiftData(),
  56652. .SyncLoad(),
  56653. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~1_combout ),
  56654. .Cout(),
  56655. .Q(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ));
  56656. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .coord_x = 15;
  56657. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .coord_y = 11;
  56658. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .coord_z = 6;
  56659. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .mask = 16'hFCF0;
  56660. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .modeMux = 1'b0;
  56661. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .FeedbackMux = 1'b0;
  56662. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .ShiftMux = 1'b0;
  56663. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .BypassEn = 1'b0;
  56664. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt .CarryEnb = 1'b1;
  56665. alta_slice \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 (
  56666. .A(\macro_inst|u_uart[1]|u_tx[4]|tx_bit~q ),
  56667. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_START~q ),
  56668. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~q ),
  56669. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  56670. .Cin(),
  56671. .Qin(),
  56672. .Clk(),
  56673. .AsyncReset(),
  56674. .SyncReset(),
  56675. .ShiftData(),
  56676. .SyncLoad(),
  56677. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0_combout ),
  56678. .Cout(),
  56679. .Q());
  56680. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .coord_x = 15;
  56681. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .coord_y = 11;
  56682. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .coord_z = 7;
  56683. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .mask = 16'h1230;
  56684. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .modeMux = 1'b0;
  56685. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  56686. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  56687. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .BypassEn = 1'b0;
  56688. defparam \macro_inst|u_uart[1]|u_tx[4]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  56689. alta_slice \macro_inst|u_uart[1]|u_tx[4]|uart_txd (
  56690. .A(vcc),
  56691. .B(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  56692. .C(\macro_inst|u_uart[1]|u_tx[4]|Selector5~2_combout ),
  56693. .D(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_STOP~q ),
  56694. .Cin(),
  56695. .Qin(\macro_inst|u_uart[1]|u_tx[4]|uart_txd~q ),
  56696. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X62_Y6_SIG_VCC ),
  56697. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y6_SIG ),
  56698. .SyncReset(),
  56699. .ShiftData(),
  56700. .SyncLoad(),
  56701. .LutOut(\macro_inst|u_uart[1]|u_tx[4]|Selector5~4_combout ),
  56702. .Cout(),
  56703. .Q(\macro_inst|u_uart[1]|u_tx[4]|uart_txd~q ));
  56704. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .coord_x = 15;
  56705. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .coord_y = 11;
  56706. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .coord_z = 11;
  56707. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .mask = 16'h000C;
  56708. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .modeMux = 1'b0;
  56709. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .FeedbackMux = 1'b0;
  56710. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .ShiftMux = 1'b0;
  56711. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .BypassEn = 1'b0;
  56712. defparam \macro_inst|u_uart[1]|u_tx[4]|uart_txd .CarryEnb = 1'b1;
  56713. alta_slice \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 (
  56714. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ),
  56715. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ),
  56716. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  56717. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  56718. .Cin(),
  56719. .Qin(),
  56720. .Clk(),
  56721. .AsyncReset(),
  56722. .SyncReset(),
  56723. .ShiftData(),
  56724. .SyncLoad(),
  56725. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector4~0_combout ),
  56726. .Cout(),
  56727. .Q());
  56728. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .coord_x = 16;
  56729. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .coord_y = 12;
  56730. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .coord_z = 9;
  56731. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .mask = 16'hEFC0;
  56732. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .modeMux = 1'b0;
  56733. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .FeedbackMux = 1'b0;
  56734. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .ShiftMux = 1'b0;
  56735. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .BypassEn = 1'b0;
  56736. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector4~0 .CarryEnb = 1'b1;
  56737. alta_slice \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 (
  56738. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~q ),
  56739. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0]),
  56740. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ),
  56741. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  56742. .Cin(),
  56743. .Qin(),
  56744. .Clk(),
  56745. .AsyncReset(),
  56746. .SyncReset(),
  56747. .ShiftData(),
  56748. .SyncLoad(),
  56749. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector5~2_combout ),
  56750. .Cout(),
  56751. .Q());
  56752. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .coord_x = 19;
  56753. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .coord_y = 10;
  56754. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .coord_z = 11;
  56755. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .mask = 16'hECA0;
  56756. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .modeMux = 1'b0;
  56757. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .FeedbackMux = 1'b0;
  56758. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .ShiftMux = 1'b0;
  56759. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .BypassEn = 1'b0;
  56760. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~2 .CarryEnb = 1'b1;
  56761. alta_slice \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 (
  56762. .A(vcc),
  56763. .B(vcc),
  56764. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  56765. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  56766. .Cin(),
  56767. .Qin(),
  56768. .Clk(),
  56769. .AsyncReset(),
  56770. .SyncReset(),
  56771. .ShiftData(),
  56772. .SyncLoad(),
  56773. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector5~3_combout ),
  56774. .Cout(),
  56775. .Q());
  56776. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .coord_x = 17;
  56777. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .coord_y = 9;
  56778. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .coord_z = 1;
  56779. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .mask = 16'h00F0;
  56780. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .modeMux = 1'b0;
  56781. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .FeedbackMux = 1'b0;
  56782. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .ShiftMux = 1'b0;
  56783. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .BypassEn = 1'b0;
  56784. defparam \macro_inst|u_uart[1]|u_tx[5]|Selector5~3 .CarryEnb = 1'b1;
  56785. alta_slice \macro_inst|u_uart[1]|u_tx[5]|always0~0 (
  56786. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [1]),
  56787. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [2]),
  56788. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  56789. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0]),
  56790. .Cin(),
  56791. .Qin(),
  56792. .Clk(),
  56793. .AsyncReset(),
  56794. .SyncReset(),
  56795. .ShiftData(),
  56796. .SyncLoad(),
  56797. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ),
  56798. .Cout(),
  56799. .Q());
  56800. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .coord_x = 16;
  56801. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .coord_y = 12;
  56802. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .coord_z = 13;
  56803. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .mask = 16'h0010;
  56804. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .modeMux = 1'b0;
  56805. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .FeedbackMux = 1'b0;
  56806. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .ShiftMux = 1'b0;
  56807. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .BypassEn = 1'b0;
  56808. defparam \macro_inst|u_uart[1]|u_tx[5]|always0~0 .CarryEnb = 1'b1;
  56809. alta_slice \macro_inst|u_uart[1]|u_tx[5]|always6~0 (
  56810. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  56811. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [0]),
  56812. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [1]),
  56813. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [2]),
  56814. .Cin(),
  56815. .Qin(),
  56816. .Clk(),
  56817. .AsyncReset(),
  56818. .SyncReset(),
  56819. .ShiftData(),
  56820. .SyncLoad(),
  56821. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|always6~0_combout ),
  56822. .Cout(),
  56823. .Q());
  56824. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .coord_x = 17;
  56825. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .coord_y = 10;
  56826. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .coord_z = 9;
  56827. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .mask = 16'h8000;
  56828. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .modeMux = 1'b0;
  56829. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .FeedbackMux = 1'b0;
  56830. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .ShiftMux = 1'b0;
  56831. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .BypassEn = 1'b0;
  56832. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~0 .CarryEnb = 1'b1;
  56833. alta_slice \macro_inst|u_uart[1]|u_tx[5]|always6~1 (
  56834. .A(vcc),
  56835. .B(vcc),
  56836. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [3]),
  56837. .D(\macro_inst|u_uart[1]|u_tx[5]|always6~0_combout ),
  56838. .Cin(),
  56839. .Qin(),
  56840. .Clk(),
  56841. .AsyncReset(),
  56842. .SyncReset(),
  56843. .ShiftData(),
  56844. .SyncLoad(),
  56845. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|always6~1_combout ),
  56846. .Cout(),
  56847. .Q());
  56848. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .coord_x = 17;
  56849. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .coord_y = 10;
  56850. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .coord_z = 10;
  56851. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .mask = 16'hF000;
  56852. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .modeMux = 1'b0;
  56853. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .FeedbackMux = 1'b0;
  56854. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .ShiftMux = 1'b0;
  56855. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .BypassEn = 1'b0;
  56856. defparam \macro_inst|u_uart[1]|u_tx[5]|always6~1 .CarryEnb = 1'b1;
  56857. alta_slice \macro_inst|u_uart[1]|u_tx[5]|comb~1 (
  56858. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  56859. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  56860. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ),
  56861. .D(vcc),
  56862. .Cin(),
  56863. .Qin(),
  56864. .Clk(),
  56865. .AsyncReset(),
  56866. .SyncReset(),
  56867. .ShiftData(),
  56868. .SyncLoad(),
  56869. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  56870. .Cout(),
  56871. .Q());
  56872. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .coord_x = 16;
  56873. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .coord_y = 12;
  56874. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .coord_z = 5;
  56875. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .mask = 16'h0808;
  56876. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .modeMux = 1'b0;
  56877. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .FeedbackMux = 1'b0;
  56878. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .ShiftMux = 1'b0;
  56879. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .BypassEn = 1'b0;
  56880. defparam \macro_inst|u_uart[1]|u_tx[5]|comb~1 .CarryEnb = 1'b1;
  56881. alta_slice \macro_inst|u_uart[1]|u_tx[5]|fifo_rden (
  56882. .A(vcc),
  56883. .B(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  56884. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  56885. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  56886. .Cin(),
  56887. .Qin(),
  56888. .Clk(),
  56889. .AsyncReset(),
  56890. .SyncReset(),
  56891. .ShiftData(),
  56892. .SyncLoad(),
  56893. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  56894. .Cout(),
  56895. .Q());
  56896. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .coord_x = 17;
  56897. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .coord_y = 9;
  56898. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .coord_z = 11;
  56899. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .mask = 16'hCF00;
  56900. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .modeMux = 1'b0;
  56901. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .FeedbackMux = 1'b0;
  56902. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .ShiftMux = 1'b0;
  56903. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .BypassEn = 1'b0;
  56904. defparam \macro_inst|u_uart[1]|u_tx[5]|fifo_rden .CarryEnb = 1'b1;
  56905. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] (
  56906. .A(\macro_inst|u_uart[1]|u_baud|baud16~q ),
  56907. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [0]),
  56908. .C(vcc),
  56909. .D(vcc),
  56910. .Cin(),
  56911. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [0]),
  56912. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56913. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56914. .SyncReset(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ),
  56915. .ShiftData(),
  56916. .SyncLoad(SyncLoad_X61_Y10_GND),
  56917. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0]~4_combout ),
  56918. .Cout(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0]~5 ),
  56919. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [0]));
  56920. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .coord_x = 17;
  56921. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .coord_y = 10;
  56922. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .coord_z = 1;
  56923. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .mask = 16'h6688;
  56924. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .modeMux = 1'b0;
  56925. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .FeedbackMux = 1'b0;
  56926. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .ShiftMux = 1'b0;
  56927. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .BypassEn = 1'b1;
  56928. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0] .CarryEnb = 1'b0;
  56929. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] (
  56930. .A(vcc),
  56931. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [1]),
  56932. .C(vcc),
  56933. .D(vcc),
  56934. .Cin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[0]~5 ),
  56935. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [1]),
  56936. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56937. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56938. .SyncReset(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ),
  56939. .ShiftData(),
  56940. .SyncLoad(SyncLoad_X61_Y10_GND),
  56941. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1]~6_combout ),
  56942. .Cout(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1]~7 ),
  56943. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [1]));
  56944. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .coord_x = 17;
  56945. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .coord_y = 10;
  56946. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .coord_z = 2;
  56947. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .mask = 16'h3C3F;
  56948. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .modeMux = 1'b1;
  56949. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .FeedbackMux = 1'b0;
  56950. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .ShiftMux = 1'b0;
  56951. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .BypassEn = 1'b1;
  56952. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1] .CarryEnb = 1'b0;
  56953. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] (
  56954. .A(vcc),
  56955. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [2]),
  56956. .C(vcc),
  56957. .D(vcc),
  56958. .Cin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[1]~7 ),
  56959. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [2]),
  56960. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56961. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56962. .SyncReset(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ),
  56963. .ShiftData(),
  56964. .SyncLoad(SyncLoad_X61_Y10_GND),
  56965. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2]~8_combout ),
  56966. .Cout(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2]~9 ),
  56967. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [2]));
  56968. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .coord_x = 17;
  56969. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .coord_y = 10;
  56970. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .coord_z = 3;
  56971. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .mask = 16'hC30C;
  56972. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .modeMux = 1'b1;
  56973. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .FeedbackMux = 1'b0;
  56974. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .ShiftMux = 1'b0;
  56975. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .BypassEn = 1'b1;
  56976. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2] .CarryEnb = 1'b0;
  56977. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] (
  56978. .A(vcc),
  56979. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [3]),
  56980. .C(vcc),
  56981. .D(vcc),
  56982. .Cin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[2]~9 ),
  56983. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [3]),
  56984. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y10_SIG_VCC ),
  56985. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y10_SIG ),
  56986. .SyncReset(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ),
  56987. .ShiftData(),
  56988. .SyncLoad(SyncLoad_X61_Y10_GND),
  56989. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3]~10_combout ),
  56990. .Cout(),
  56991. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt [3]));
  56992. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .coord_x = 17;
  56993. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .coord_y = 10;
  56994. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .coord_z = 4;
  56995. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .mask = 16'h3C3C;
  56996. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .modeMux = 1'b1;
  56997. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .FeedbackMux = 1'b0;
  56998. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .ShiftMux = 1'b0;
  56999. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .BypassEn = 1'b1;
  57000. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_baud_cnt[3] .CarryEnb = 1'b1;
  57001. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_bit (
  57002. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57003. .B(vcc),
  57004. .C(\macro_inst|u_uart[1]|u_tx[5]|always6~1_combout ),
  57005. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57006. .Cin(),
  57007. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57008. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  57009. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ),
  57010. .SyncReset(SyncReset_X50_Y3_GND),
  57011. .ShiftData(),
  57012. .SyncLoad(SyncLoad_X50_Y3_VCC),
  57013. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout ),
  57014. .Cout(),
  57015. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ));
  57016. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .coord_x = 16;
  57017. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .coord_y = 12;
  57018. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .coord_z = 4;
  57019. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .mask = 16'hFFA0;
  57020. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .modeMux = 1'b0;
  57021. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .FeedbackMux = 1'b1;
  57022. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .ShiftMux = 1'b0;
  57023. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .BypassEn = 1'b1;
  57024. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_bit .CarryEnb = 1'b1;
  57025. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_complete (
  57026. .A(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  57027. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  57028. .C(vcc),
  57029. .D(\macro_inst|u_uart[1]|u_regs|clear_flags[5]~16_combout ),
  57030. .Cin(),
  57031. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_complete~q ),
  57032. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y7_SIG_VCC ),
  57033. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X60_Y7_SIG ),
  57034. .SyncReset(),
  57035. .ShiftData(),
  57036. .SyncLoad(),
  57037. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_complete~0_combout ),
  57038. .Cout(),
  57039. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_complete~q ));
  57040. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .coord_x = 18;
  57041. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .coord_y = 9;
  57042. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .coord_z = 13;
  57043. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .mask = 16'h2232;
  57044. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .modeMux = 1'b0;
  57045. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .FeedbackMux = 1'b1;
  57046. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .ShiftMux = 1'b0;
  57047. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .BypassEn = 1'b0;
  57048. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_complete .CarryEnb = 1'b1;
  57049. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] (
  57050. .A(vcc),
  57051. .B(vcc),
  57052. .C(vcc),
  57053. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57054. .Cin(),
  57055. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0]),
  57056. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout_X50_Y3_SIG_SIG ),
  57057. .AsyncReset(AsyncReset_X50_Y3_GND),
  57058. .SyncReset(),
  57059. .ShiftData(),
  57060. .SyncLoad(),
  57061. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~2_combout ),
  57062. .Cout(),
  57063. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0]));
  57064. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .coord_x = 16;
  57065. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .coord_y = 12;
  57066. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .coord_z = 1;
  57067. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .mask = 16'hFF0F;
  57068. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .modeMux = 1'b0;
  57069. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .FeedbackMux = 1'b1;
  57070. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .ShiftMux = 1'b0;
  57071. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .BypassEn = 1'b0;
  57072. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[0] .CarryEnb = 1'b1;
  57073. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] (
  57074. .A(vcc),
  57075. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0]),
  57076. .C(vcc),
  57077. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57078. .Cin(),
  57079. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [1]),
  57080. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout_X50_Y3_SIG_SIG ),
  57081. .AsyncReset(AsyncReset_X50_Y3_GND),
  57082. .SyncReset(),
  57083. .ShiftData(),
  57084. .SyncLoad(),
  57085. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~0_combout ),
  57086. .Cout(),
  57087. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [1]));
  57088. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .coord_x = 16;
  57089. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .coord_y = 12;
  57090. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .coord_z = 6;
  57091. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .mask = 16'hFFC3;
  57092. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .modeMux = 1'b0;
  57093. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .FeedbackMux = 1'b1;
  57094. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .ShiftMux = 1'b0;
  57095. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .BypassEn = 1'b0;
  57096. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[1] .CarryEnb = 1'b1;
  57097. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] (
  57098. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [1]),
  57099. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [0]),
  57100. .C(vcc),
  57101. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57102. .Cin(),
  57103. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [2]),
  57104. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2]~1_combout_X50_Y3_SIG_SIG ),
  57105. .AsyncReset(AsyncReset_X50_Y3_GND),
  57106. .SyncReset(),
  57107. .ShiftData(),
  57108. .SyncLoad(),
  57109. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt~3_combout ),
  57110. .Cout(),
  57111. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt [2]));
  57112. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .coord_x = 16;
  57113. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .coord_y = 12;
  57114. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .coord_z = 12;
  57115. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .mask = 16'hFFE1;
  57116. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .modeMux = 1'b0;
  57117. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .FeedbackMux = 1'b1;
  57118. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .ShiftMux = 1'b0;
  57119. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .BypassEn = 1'b0;
  57120. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_data_cnt[2] .CarryEnb = 1'b1;
  57121. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] (
  57122. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  57123. .B(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  57124. .C(vcc),
  57125. .D(\macro_inst|u_uart[1]|u_regs|tx_write [5]),
  57126. .Cin(),
  57127. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  57128. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  57129. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  57130. .SyncReset(),
  57131. .ShiftData(),
  57132. .SyncLoad(),
  57133. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter~0_combout ),
  57134. .Cout(),
  57135. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]));
  57136. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .coord_x = 17;
  57137. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .coord_y = 9;
  57138. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .coord_z = 5;
  57139. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .mask = 16'h2F20;
  57140. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .modeMux = 1'b0;
  57141. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .FeedbackMux = 1'b1;
  57142. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .ShiftMux = 1'b0;
  57143. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .BypassEn = 1'b0;
  57144. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter[0] .CarryEnb = 1'b1;
  57145. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] (
  57146. .A(),
  57147. .B(),
  57148. .C(vcc),
  57149. .D(\rv32.mem_ahb_hwdata[0] ),
  57150. .Cin(),
  57151. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]~q ),
  57152. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57153. .AsyncReset(AsyncReset_X62_Y7_GND),
  57154. .SyncReset(),
  57155. .ShiftData(),
  57156. .SyncLoad(),
  57157. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]__feeder__LutOut ),
  57158. .Cout(),
  57159. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]~q ));
  57160. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .coord_x = 17;
  57161. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .coord_y = 12;
  57162. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .coord_z = 11;
  57163. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .mask = 16'hFF00;
  57164. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .modeMux = 1'b1;
  57165. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .FeedbackMux = 1'b0;
  57166. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .ShiftMux = 1'b0;
  57167. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .BypassEn = 1'b0;
  57168. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0] .CarryEnb = 1'b1;
  57169. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] (
  57170. .A(),
  57171. .B(),
  57172. .C(vcc),
  57173. .D(\rv32.mem_ahb_hwdata[1] ),
  57174. .Cin(),
  57175. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]~q ),
  57176. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57177. .AsyncReset(AsyncReset_X62_Y7_GND),
  57178. .SyncReset(),
  57179. .ShiftData(),
  57180. .SyncLoad(),
  57181. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]__feeder__LutOut ),
  57182. .Cout(),
  57183. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]~q ));
  57184. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .coord_x = 17;
  57185. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .coord_y = 12;
  57186. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .coord_z = 7;
  57187. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .mask = 16'hFF00;
  57188. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .modeMux = 1'b1;
  57189. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .FeedbackMux = 1'b0;
  57190. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .ShiftMux = 1'b0;
  57191. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .BypassEn = 1'b0;
  57192. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1] .CarryEnb = 1'b1;
  57193. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] (
  57194. .A(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57195. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57196. .C(\rv32.mem_ahb_hwdata[2] ),
  57197. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57198. .Cin(),
  57199. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2]~q ),
  57200. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57201. .AsyncReset(AsyncReset_X62_Y7_GND),
  57202. .SyncReset(SyncReset_X62_Y7_GND),
  57203. .ShiftData(),
  57204. .SyncLoad(SyncLoad_X62_Y7_VCC),
  57205. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout ),
  57206. .Cout(),
  57207. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2]~q ));
  57208. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .coord_x = 17;
  57209. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .coord_y = 12;
  57210. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .coord_z = 10;
  57211. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .mask = 16'hEEAA;
  57212. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .modeMux = 1'b0;
  57213. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .FeedbackMux = 1'b0;
  57214. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .ShiftMux = 1'b0;
  57215. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .BypassEn = 1'b1;
  57216. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2] .CarryEnb = 1'b1;
  57217. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] (
  57218. .A(),
  57219. .B(),
  57220. .C(vcc),
  57221. .D(\rv32.mem_ahb_hwdata[3] ),
  57222. .Cin(),
  57223. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]~q ),
  57224. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57225. .AsyncReset(AsyncReset_X62_Y7_GND),
  57226. .SyncReset(),
  57227. .ShiftData(),
  57228. .SyncLoad(),
  57229. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]__feeder__LutOut ),
  57230. .Cout(),
  57231. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]~q ));
  57232. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .coord_x = 17;
  57233. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .coord_y = 12;
  57234. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .coord_z = 9;
  57235. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .mask = 16'hFF00;
  57236. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .modeMux = 1'b1;
  57237. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .FeedbackMux = 1'b0;
  57238. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .ShiftMux = 1'b0;
  57239. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .BypassEn = 1'b0;
  57240. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3] .CarryEnb = 1'b1;
  57241. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] (
  57242. .A(vcc),
  57243. .B(vcc),
  57244. .C(\rv32.mem_ahb_hwdata[4] ),
  57245. .D(\macro_inst|u_uart[1]|u_regs|ibrd [0]),
  57246. .Cin(),
  57247. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4]~q ),
  57248. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57249. .AsyncReset(AsyncReset_X62_Y7_GND),
  57250. .SyncReset(SyncReset_X62_Y7_GND),
  57251. .ShiftData(),
  57252. .SyncLoad(SyncLoad_X62_Y7_VCC),
  57253. .LutOut(\macro_inst|u_uart[1]|u_regs|ibrd[0]~_wirecell_combout ),
  57254. .Cout(),
  57255. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4]~q ));
  57256. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .coord_x = 17;
  57257. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .coord_y = 12;
  57258. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .coord_z = 4;
  57259. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .mask = 16'h00FF;
  57260. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .modeMux = 1'b0;
  57261. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .FeedbackMux = 1'b0;
  57262. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .ShiftMux = 1'b0;
  57263. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .BypassEn = 1'b1;
  57264. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4] .CarryEnb = 1'b1;
  57265. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] (
  57266. .A(),
  57267. .B(),
  57268. .C(vcc),
  57269. .D(\rv32.mem_ahb_hwdata[5] ),
  57270. .Cin(),
  57271. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]~q ),
  57272. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57273. .AsyncReset(AsyncReset_X62_Y7_GND),
  57274. .SyncReset(),
  57275. .ShiftData(),
  57276. .SyncLoad(),
  57277. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]__feeder__LutOut ),
  57278. .Cout(),
  57279. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]~q ));
  57280. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .coord_x = 17;
  57281. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .coord_y = 12;
  57282. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .coord_z = 13;
  57283. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .mask = 16'hFF00;
  57284. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .modeMux = 1'b1;
  57285. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .FeedbackMux = 1'b0;
  57286. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .ShiftMux = 1'b0;
  57287. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .BypassEn = 1'b0;
  57288. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5] .CarryEnb = 1'b1;
  57289. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] (
  57290. .A(),
  57291. .B(),
  57292. .C(vcc),
  57293. .D(\rv32.mem_ahb_hwdata[6] ),
  57294. .Cin(),
  57295. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]~q ),
  57296. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57297. .AsyncReset(AsyncReset_X62_Y7_GND),
  57298. .SyncReset(),
  57299. .ShiftData(),
  57300. .SyncLoad(),
  57301. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]__feeder__LutOut ),
  57302. .Cout(),
  57303. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]~q ));
  57304. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .coord_x = 17;
  57305. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .coord_y = 12;
  57306. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .coord_z = 15;
  57307. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .mask = 16'hFF00;
  57308. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .modeMux = 1'b1;
  57309. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .FeedbackMux = 1'b0;
  57310. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .ShiftMux = 1'b0;
  57311. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .BypassEn = 1'b0;
  57312. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6] .CarryEnb = 1'b1;
  57313. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] (
  57314. .A(),
  57315. .B(),
  57316. .C(vcc),
  57317. .D(\rv32.mem_ahb_hwdata[7] ),
  57318. .Cin(),
  57319. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]~q ),
  57320. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout_X62_Y7_SIG_SIG ),
  57321. .AsyncReset(AsyncReset_X62_Y7_GND),
  57322. .SyncReset(),
  57323. .ShiftData(),
  57324. .SyncLoad(),
  57325. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]__feeder__LutOut ),
  57326. .Cout(),
  57327. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]~q ));
  57328. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .coord_x = 17;
  57329. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .coord_y = 12;
  57330. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .coord_z = 0;
  57331. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .mask = 16'hFF00;
  57332. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .modeMux = 1'b1;
  57333. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .FeedbackMux = 1'b0;
  57334. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .ShiftMux = 1'b0;
  57335. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .BypassEn = 1'b0;
  57336. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7] .CarryEnb = 1'b1;
  57337. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq (
  57338. .A(vcc),
  57339. .B(vcc),
  57340. .C(\macro_inst|u_uart[1]|u_regs|tx_write [5]),
  57341. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  57342. .Cin(),
  57343. .Qin(),
  57344. .Clk(),
  57345. .AsyncReset(),
  57346. .SyncReset(),
  57347. .ShiftData(),
  57348. .SyncLoad(),
  57349. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq~combout ),
  57350. .Cout(),
  57351. .Q());
  57352. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .coord_x = 17;
  57353. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .coord_y = 9;
  57354. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .coord_z = 14;
  57355. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .mask = 16'h00F0;
  57356. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .modeMux = 1'b0;
  57357. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .FeedbackMux = 1'b0;
  57358. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .ShiftMux = 1'b0;
  57359. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .BypassEn = 1'b0;
  57360. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_fifo|wrreq .CarryEnb = 1'b1;
  57361. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_parity (
  57362. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~0_combout ),
  57363. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57364. .C(vcc),
  57365. .D(\macro_inst|u_uart[1]|u_regs|lcr_eps~q ),
  57366. .Cin(),
  57367. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~q ),
  57368. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X60_Y9_SIG_VCC ),
  57369. .AsyncReset(AsyncReset_X60_Y9_GND),
  57370. .SyncReset(),
  57371. .ShiftData(),
  57372. .SyncLoad(),
  57373. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~1_combout ),
  57374. .Cout(),
  57375. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~q ));
  57376. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .coord_x = 18;
  57377. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .coord_y = 10;
  57378. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .coord_z = 0;
  57379. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .mask = 16'h12DE;
  57380. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .modeMux = 1'b0;
  57381. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .FeedbackMux = 1'b1;
  57382. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .ShiftMux = 1'b0;
  57383. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .BypassEn = 1'b0;
  57384. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity .CarryEnb = 1'b1;
  57385. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 (
  57386. .A(\macro_inst|u_uart[1]|u_regs|lcr_sps~q ),
  57387. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0]),
  57388. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57389. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57390. .Cin(),
  57391. .Qin(),
  57392. .Clk(),
  57393. .AsyncReset(),
  57394. .SyncReset(),
  57395. .ShiftData(),
  57396. .SyncLoad(),
  57397. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_parity~0_combout ),
  57398. .Cout(),
  57399. .Q());
  57400. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .coord_x = 19;
  57401. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .coord_y = 10;
  57402. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .coord_z = 1;
  57403. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .mask = 16'h4000;
  57404. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .modeMux = 1'b0;
  57405. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .FeedbackMux = 1'b0;
  57406. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .ShiftMux = 1'b0;
  57407. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .BypassEn = 1'b0;
  57408. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_parity~0 .CarryEnb = 1'b1;
  57409. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] (
  57410. .A(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57411. .B(vcc),
  57412. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [1]),
  57413. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][0]~q ),
  57414. .Cin(),
  57415. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0]),
  57416. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57417. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57418. .SyncReset(),
  57419. .ShiftData(),
  57420. .SyncLoad(),
  57421. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~0_combout ),
  57422. .Cout(),
  57423. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0]));
  57424. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .coord_x = 17;
  57425. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .coord_y = 12;
  57426. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .coord_z = 5;
  57427. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .mask = 16'hFA50;
  57428. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .modeMux = 1'b0;
  57429. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .FeedbackMux = 1'b0;
  57430. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .ShiftMux = 1'b0;
  57431. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .BypassEn = 1'b0;
  57432. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[0] .CarryEnb = 1'b1;
  57433. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] (
  57434. .A(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57435. .B(vcc),
  57436. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][1]~q ),
  57437. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [2]),
  57438. .Cin(),
  57439. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [1]),
  57440. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57441. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57442. .SyncReset(),
  57443. .ShiftData(),
  57444. .SyncLoad(),
  57445. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~2_combout ),
  57446. .Cout(),
  57447. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [1]));
  57448. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .coord_x = 17;
  57449. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .coord_y = 12;
  57450. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .coord_z = 6;
  57451. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .mask = 16'hF5A0;
  57452. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .modeMux = 1'b0;
  57453. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .FeedbackMux = 1'b0;
  57454. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .ShiftMux = 1'b0;
  57455. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .BypassEn = 1'b0;
  57456. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[1] .CarryEnb = 1'b1;
  57457. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] (
  57458. .A(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57459. .B(vcc),
  57460. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][2]~q ),
  57461. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [3]),
  57462. .Cin(),
  57463. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [2]),
  57464. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57465. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57466. .SyncReset(),
  57467. .ShiftData(),
  57468. .SyncLoad(),
  57469. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~3_combout ),
  57470. .Cout(),
  57471. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [2]));
  57472. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .coord_x = 17;
  57473. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .coord_y = 12;
  57474. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .coord_z = 1;
  57475. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .mask = 16'hF5A0;
  57476. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .modeMux = 1'b0;
  57477. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .FeedbackMux = 1'b0;
  57478. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .ShiftMux = 1'b0;
  57479. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .BypassEn = 1'b0;
  57480. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[2] .CarryEnb = 1'b1;
  57481. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] (
  57482. .A(vcc),
  57483. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [4]),
  57484. .C(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57485. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][3]~q ),
  57486. .Cin(),
  57487. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [3]),
  57488. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57489. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57490. .SyncReset(),
  57491. .ShiftData(),
  57492. .SyncLoad(),
  57493. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~4_combout ),
  57494. .Cout(),
  57495. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [3]));
  57496. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .coord_x = 17;
  57497. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .coord_y = 12;
  57498. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .coord_z = 8;
  57499. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .mask = 16'hFC0C;
  57500. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .modeMux = 1'b0;
  57501. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .FeedbackMux = 1'b0;
  57502. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .ShiftMux = 1'b0;
  57503. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .BypassEn = 1'b0;
  57504. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3] .CarryEnb = 1'b1;
  57505. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] (
  57506. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [5]),
  57507. .B(vcc),
  57508. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][4]~q ),
  57509. .D(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57510. .Cin(),
  57511. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [4]),
  57512. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57513. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57514. .SyncReset(),
  57515. .ShiftData(),
  57516. .SyncLoad(),
  57517. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~5_combout ),
  57518. .Cout(),
  57519. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [4]));
  57520. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .coord_x = 17;
  57521. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .coord_y = 12;
  57522. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .coord_z = 3;
  57523. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .mask = 16'hF0AA;
  57524. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .modeMux = 1'b0;
  57525. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .FeedbackMux = 1'b0;
  57526. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .ShiftMux = 1'b0;
  57527. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .BypassEn = 1'b0;
  57528. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[4] .CarryEnb = 1'b1;
  57529. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] (
  57530. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [6]),
  57531. .B(vcc),
  57532. .C(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57533. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][5]~q ),
  57534. .Cin(),
  57535. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [5]),
  57536. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57537. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57538. .SyncReset(),
  57539. .ShiftData(),
  57540. .SyncLoad(),
  57541. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~6_combout ),
  57542. .Cout(),
  57543. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [5]));
  57544. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .coord_x = 17;
  57545. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .coord_y = 12;
  57546. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .coord_z = 12;
  57547. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .mask = 16'hFA0A;
  57548. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .modeMux = 1'b0;
  57549. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .FeedbackMux = 1'b0;
  57550. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .ShiftMux = 1'b0;
  57551. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .BypassEn = 1'b0;
  57552. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[5] .CarryEnb = 1'b1;
  57553. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] (
  57554. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [7]),
  57555. .B(vcc),
  57556. .C(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57557. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][6]~q ),
  57558. .Cin(),
  57559. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [6]),
  57560. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57561. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57562. .SyncReset(),
  57563. .ShiftData(),
  57564. .SyncLoad(),
  57565. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~7_combout ),
  57566. .Cout(),
  57567. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [6]));
  57568. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .coord_x = 17;
  57569. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .coord_y = 12;
  57570. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .coord_z = 14;
  57571. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .mask = 16'hFA0A;
  57572. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .modeMux = 1'b0;
  57573. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .FeedbackMux = 1'b0;
  57574. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .ShiftMux = 1'b0;
  57575. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .BypassEn = 1'b0;
  57576. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[6] .CarryEnb = 1'b1;
  57577. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] (
  57578. .A(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57579. .B(vcc),
  57580. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|fifo[1][7]~q ),
  57581. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [0]),
  57582. .Cin(),
  57583. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [7]),
  57584. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp__macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[3]~1_combout_X62_Y7_SIG_SIG ),
  57585. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X62_Y7_SIG ),
  57586. .SyncReset(),
  57587. .ShiftData(),
  57588. .SyncLoad(),
  57589. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg~8_combout ),
  57590. .Cout(),
  57591. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg [7]));
  57592. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .coord_x = 17;
  57593. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .coord_y = 12;
  57594. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .coord_z = 2;
  57595. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .mask = 16'hF5A0;
  57596. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .modeMux = 1'b0;
  57597. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .FeedbackMux = 1'b0;
  57598. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .ShiftMux = 1'b0;
  57599. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .BypassEn = 1'b0;
  57600. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_shift_reg[7] .CarryEnb = 1'b1;
  57601. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA (
  57602. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57603. .B(\macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ),
  57604. .C(vcc),
  57605. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57606. .Cin(),
  57607. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57608. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  57609. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ),
  57610. .SyncReset(),
  57611. .ShiftData(),
  57612. .SyncLoad(),
  57613. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector2~0_combout ),
  57614. .Cout(),
  57615. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ));
  57616. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .coord_x = 16;
  57617. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .coord_y = 12;
  57618. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .coord_z = 14;
  57619. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .mask = 16'hBA30;
  57620. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .modeMux = 1'b0;
  57621. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .FeedbackMux = 1'b1;
  57622. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .ShiftMux = 1'b0;
  57623. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .BypassEn = 1'b0;
  57624. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA .CarryEnb = 1'b1;
  57625. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE (
  57626. .A(vcc),
  57627. .B(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  57628. .C(vcc),
  57629. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  57630. .Cin(),
  57631. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  57632. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  57633. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  57634. .SyncReset(),
  57635. .ShiftData(),
  57636. .SyncLoad(),
  57637. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector0~0_combout ),
  57638. .Cout(),
  57639. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ));
  57640. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .coord_x = 17;
  57641. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .coord_y = 9;
  57642. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .coord_z = 12;
  57643. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .mask = 16'hFF30;
  57644. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .modeMux = 1'b0;
  57645. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .FeedbackMux = 1'b1;
  57646. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .ShiftMux = 1'b0;
  57647. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .BypassEn = 1'b0;
  57648. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE .CarryEnb = 1'b1;
  57649. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY (
  57650. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57651. .B(\macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ),
  57652. .C(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  57653. .D(\macro_inst|u_uart[1]|u_tx[5]|Selector3~0_combout ),
  57654. .Cin(),
  57655. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ),
  57656. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  57657. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ),
  57658. .SyncReset(),
  57659. .ShiftData(),
  57660. .SyncLoad(),
  57661. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector3~1_combout ),
  57662. .Cout(),
  57663. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY~q ));
  57664. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .coord_x = 16;
  57665. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .coord_y = 12;
  57666. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .coord_z = 8;
  57667. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .mask = 16'hFF80;
  57668. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .modeMux = 1'b0;
  57669. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .FeedbackMux = 1'b0;
  57670. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .ShiftMux = 1'b0;
  57671. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .BypassEn = 1'b0;
  57672. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_PARITY .CarryEnb = 1'b1;
  57673. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START (
  57674. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0_combout ),
  57675. .B(\macro_inst|u_uart[1]|u_tx[5]|fifo_rden~combout ),
  57676. .C(vcc),
  57677. .D(\macro_inst|u_uart[1]|u_tx[5]|comb~1_combout ),
  57678. .Cin(),
  57679. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57680. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X61_Y7_SIG_VCC ),
  57681. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X61_Y7_SIG ),
  57682. .SyncReset(),
  57683. .ShiftData(),
  57684. .SyncLoad(),
  57685. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~1_combout ),
  57686. .Cout(),
  57687. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ));
  57688. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .coord_x = 17;
  57689. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .coord_y = 9;
  57690. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .coord_z = 6;
  57691. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .mask = 16'hCCEC;
  57692. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .modeMux = 1'b0;
  57693. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .FeedbackMux = 1'b1;
  57694. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .ShiftMux = 1'b0;
  57695. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .BypassEn = 1'b0;
  57696. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START .CarryEnb = 1'b1;
  57697. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 (
  57698. .A(\macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ),
  57699. .B(\macro_inst|u_uart[1]|u_tx[5]|Selector5~3_combout ),
  57700. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57701. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57702. .Cin(),
  57703. .Qin(),
  57704. .Clk(),
  57705. .AsyncReset(),
  57706. .SyncReset(),
  57707. .ShiftData(),
  57708. .SyncLoad(),
  57709. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0_combout ),
  57710. .Cout(),
  57711. .Q());
  57712. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .coord_x = 17;
  57713. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .coord_y = 9;
  57714. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .coord_z = 7;
  57715. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .mask = 16'h737F;
  57716. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .modeMux = 1'b0;
  57717. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .FeedbackMux = 1'b0;
  57718. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .ShiftMux = 1'b0;
  57719. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .BypassEn = 1'b0;
  57720. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~0 .CarryEnb = 1'b1;
  57721. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP (
  57722. .A(\macro_inst|u_uart[1]|u_regs|lcr_pen~q ),
  57723. .B(\macro_inst|u_uart[1]|u_tx[5]|Selector4~0_combout ),
  57724. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_DATA~q ),
  57725. .D(\macro_inst|u_uart[1]|u_tx[5]|always0~0_combout ),
  57726. .Cin(),
  57727. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  57728. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  57729. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X50_Y3_SIG ),
  57730. .SyncReset(),
  57731. .ShiftData(),
  57732. .SyncLoad(),
  57733. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector4~1_combout ),
  57734. .Cout(),
  57735. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ));
  57736. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .coord_x = 16;
  57737. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .coord_y = 12;
  57738. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .coord_z = 15;
  57739. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .mask = 16'hDCCC;
  57740. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .modeMux = 1'b0;
  57741. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .FeedbackMux = 1'b0;
  57742. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .ShiftMux = 1'b0;
  57743. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .BypassEn = 1'b0;
  57744. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP .CarryEnb = 1'b1;
  57745. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_stop (
  57746. .A(vcc),
  57747. .B(vcc),
  57748. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  57749. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_fifo|counter [0]),
  57750. .Cin(),
  57751. .Qin(),
  57752. .Clk(),
  57753. .AsyncReset(),
  57754. .SyncReset(),
  57755. .ShiftData(),
  57756. .SyncLoad(),
  57757. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout ),
  57758. .Cout(),
  57759. .Q());
  57760. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .coord_x = 17;
  57761. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .coord_y = 9;
  57762. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .coord_z = 0;
  57763. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .mask = 16'h000F;
  57764. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .modeMux = 1'b0;
  57765. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .FeedbackMux = 1'b0;
  57766. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .ShiftMux = 1'b0;
  57767. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .BypassEn = 1'b0;
  57768. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop .CarryEnb = 1'b1;
  57769. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt (
  57770. .A(vcc),
  57771. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57772. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0_combout ),
  57773. .D(\macro_inst|u_uart[1]|u_regs|lcr_stp2~q ),
  57774. .Cin(),
  57775. .Qin(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ),
  57776. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X50_Y3_SIG_VCC ),
  57777. .AsyncReset(AsyncReset_X50_Y3_GND),
  57778. .SyncReset(),
  57779. .ShiftData(),
  57780. .SyncLoad(),
  57781. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~1_combout ),
  57782. .Cout(),
  57783. .Q(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ));
  57784. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .coord_x = 16;
  57785. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .coord_y = 12;
  57786. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .coord_z = 10;
  57787. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .mask = 16'hFCF0;
  57788. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .modeMux = 1'b0;
  57789. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .FeedbackMux = 1'b0;
  57790. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .ShiftMux = 1'b0;
  57791. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .BypassEn = 1'b0;
  57792. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt .CarryEnb = 1'b1;
  57793. alta_slice \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 (
  57794. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~q ),
  57795. .B(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  57796. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_bit~q ),
  57797. .D(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_START~q ),
  57798. .Cin(),
  57799. .Qin(),
  57800. .Clk(),
  57801. .AsyncReset(),
  57802. .SyncReset(),
  57803. .ShiftData(),
  57804. .SyncLoad(),
  57805. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0_combout ),
  57806. .Cout(),
  57807. .Q());
  57808. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .coord_x = 16;
  57809. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .coord_y = 12;
  57810. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .coord_z = 11;
  57811. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .mask = 16'h006A;
  57812. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .modeMux = 1'b0;
  57813. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .FeedbackMux = 1'b0;
  57814. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .ShiftMux = 1'b0;
  57815. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .BypassEn = 1'b0;
  57816. defparam \macro_inst|u_uart[1]|u_tx[5]|tx_stop_cnt~0 .CarryEnb = 1'b1;
  57817. alta_slice \macro_inst|u_uart[1]|u_tx[5]|uart_txd (
  57818. .A(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_IDLE~q ),
  57819. .B(vcc),
  57820. .C(\macro_inst|u_uart[1]|u_tx[5]|tx_state.UART_STOP~q ),
  57821. .D(\macro_inst|u_uart[1]|u_tx[5]|Selector5~2_combout ),
  57822. .Cin(),
  57823. .Qin(\macro_inst|u_uart[1]|u_tx[5]|uart_txd~q ),
  57824. .Clk(\auto_generated_inst.hbo_22_717df45ba12dbb20_bp_X56_Y5_SIG_VCC ),
  57825. .AsyncReset(\sys_resetn~clkctrl_outclk__AsyncReset_X56_Y5_SIG ),
  57826. .SyncReset(),
  57827. .ShiftData(),
  57828. .SyncLoad(),
  57829. .LutOut(\macro_inst|u_uart[1]|u_tx[5]|Selector5~4_combout ),
  57830. .Cout(),
  57831. .Q(\macro_inst|u_uart[1]|u_tx[5]|uart_txd~q ));
  57832. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .coord_x = 17;
  57833. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .coord_y = 3;
  57834. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .coord_z = 15;
  57835. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .mask = 16'h000A;
  57836. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .modeMux = 1'b0;
  57837. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .FeedbackMux = 1'b0;
  57838. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .ShiftMux = 1'b0;
  57839. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .BypassEn = 1'b0;
  57840. defparam \macro_inst|u_uart[1]|u_tx[5]|uart_txd .CarryEnb = 1'b1;
  57841. alta_slice \macro_inst|uart_rxd[10] (
  57842. .A(vcc),
  57843. .B(vcc),
  57844. .C(\macro_inst|u_uart[1]|u_tx[4]|tx_state.UART_IDLE~q ),
  57845. .D(\SIM_IO[10]~input_o ),
  57846. .Cin(),
  57847. .Qin(),
  57848. .Clk(),
  57849. .AsyncReset(),
  57850. .SyncReset(),
  57851. .ShiftData(),
  57852. .SyncLoad(),
  57853. .LutOut(\macro_inst|uart_rxd [10]),
  57854. .Cout(),
  57855. .Q());
  57856. defparam \macro_inst|uart_rxd[10] .coord_x = 14;
  57857. defparam \macro_inst|uart_rxd[10] .coord_y = 9;
  57858. defparam \macro_inst|uart_rxd[10] .coord_z = 13;
  57859. defparam \macro_inst|uart_rxd[10] .mask = 16'h000F;
  57860. defparam \macro_inst|uart_rxd[10] .modeMux = 1'b0;
  57861. defparam \macro_inst|uart_rxd[10] .FeedbackMux = 1'b0;
  57862. defparam \macro_inst|uart_rxd[10] .ShiftMux = 1'b0;
  57863. defparam \macro_inst|uart_rxd[10] .BypassEn = 1'b0;
  57864. defparam \macro_inst|uart_rxd[10] .CarryEnb = 1'b1;
  57865. alta_pllve \pll_inst|auto_generated|pll1 (
  57866. .clkin(\PIN_HSE~input_o ),
  57867. .clkfb(\pll_inst|auto_generated|pll1~FBOUT ),
  57868. .pfden(vcc),
  57869. .resetn(!\PLL_ENABLE~combout ),
  57870. .phasecounterselect({gnd, gnd, gnd}),
  57871. .phaseupdown(gnd),
  57872. .phasestep(gnd),
  57873. .scanclk(gnd),
  57874. .scanclkena(vcc),
  57875. .scandata(gnd),
  57876. .configupdate(gnd),
  57877. .scandataout(),
  57878. .scandone(),
  57879. .phasedone(),
  57880. .clkout0(\pll_inst|auto_generated|pll1_CLK_bus [0]),
  57881. .clkout1(\pll_inst|auto_generated|pll1_CLK_bus [1]),
  57882. .clkout2(\pll_inst|auto_generated|pll1_CLK_bus [2]),
  57883. .clkout3(\pll_inst|auto_generated|pll1_CLK_bus [3]),
  57884. .clkout4(\pll_inst|auto_generated|pll1_CLK_bus [4]),
  57885. .clkfbout(\pll_inst|auto_generated|pll1~FBOUT ),
  57886. .lock(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp ));
  57887. defparam \pll_inst|auto_generated|pll1 .coord_x = 22;
  57888. defparam \pll_inst|auto_generated|pll1 .coord_y = 5;
  57889. defparam \pll_inst|auto_generated|pll1 .coord_z = 0;
  57890. defparam \pll_inst|auto_generated|pll1 .CLKIN_HIGH = 8'b11111111;
  57891. defparam \pll_inst|auto_generated|pll1 .CLKIN_LOW = 8'b11111111;
  57892. defparam \pll_inst|auto_generated|pll1 .CLKIN_TRIM = 1'b0;
  57893. defparam \pll_inst|auto_generated|pll1 .CLKIN_BYPASS = 1'b1;
  57894. defparam \pll_inst|auto_generated|pll1 .CLKFB_HIGH = 8'b00011101;
  57895. defparam \pll_inst|auto_generated|pll1 .CLKFB_LOW = 8'b00011101;
  57896. defparam \pll_inst|auto_generated|pll1 .CLKFB_TRIM = 1'b0;
  57897. defparam \pll_inst|auto_generated|pll1 .CLKFB_BYPASS = 1'b0;
  57898. defparam \pll_inst|auto_generated|pll1 .CLKDIV0_EN = 1'b1;
  57899. defparam \pll_inst|auto_generated|pll1 .CLKDIV1_EN = 1'b0;
  57900. defparam \pll_inst|auto_generated|pll1 .CLKDIV2_EN = 1'b0;
  57901. defparam \pll_inst|auto_generated|pll1 .CLKDIV3_EN = 1'b1;
  57902. defparam \pll_inst|auto_generated|pll1 .CLKDIV4_EN = 1'b0;
  57903. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_HIGH = 8'b00000000;
  57904. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_LOW = 8'b00000000;
  57905. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_TRIM = 1'b0;
  57906. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_BYPASS = 1'b0;
  57907. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_HIGH = 8'b11111111;
  57908. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_LOW = 8'b11111111;
  57909. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_TRIM = 1'b0;
  57910. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_BYPASS = 1'b0;
  57911. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_HIGH = 8'b11111111;
  57912. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_LOW = 8'b11111111;
  57913. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_TRIM = 1'b0;
  57914. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_BYPASS = 1'b0;
  57915. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_HIGH = 8'b00000001;
  57916. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_LOW = 8'b00000001;
  57917. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_TRIM = 1'b0;
  57918. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_BYPASS = 1'b0;
  57919. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_HIGH = 8'b11111111;
  57920. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_LOW = 8'b11111111;
  57921. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_TRIM = 1'b0;
  57922. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_BYPASS = 1'b0;
  57923. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_DEL = 8'b00000000;
  57924. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_DEL = 8'b00000000;
  57925. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_DEL = 8'b00000000;
  57926. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_DEL = 8'b00000000;
  57927. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_DEL = 8'b00000000;
  57928. defparam \pll_inst|auto_generated|pll1 .CLKOUT0_PHASE = 3'b000;
  57929. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_PHASE = 3'b000;
  57930. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_PHASE = 3'b000;
  57931. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_PHASE = 3'b000;
  57932. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_PHASE = 3'b000;
  57933. defparam \pll_inst|auto_generated|pll1 .CLKFB_DEL = 8'b00000000;
  57934. defparam \pll_inst|auto_generated|pll1 .CLKFB_PHASE = 3'b000;
  57935. defparam \pll_inst|auto_generated|pll1 .FEEDBACK_MODE = 3'b100;
  57936. defparam \pll_inst|auto_generated|pll1 .FBDELAY_VAL = 3'b100;
  57937. defparam \pll_inst|auto_generated|pll1 .PLLOUTP_EN = 1'b0;
  57938. defparam \pll_inst|auto_generated|pll1 .PLLOUTN_EN = 1'b0;
  57939. defparam \pll_inst|auto_generated|pll1 .CLKOUT1_CASCADE = 1'b0;
  57940. defparam \pll_inst|auto_generated|pll1 .CLKOUT2_CASCADE = 1'b0;
  57941. defparam \pll_inst|auto_generated|pll1 .CLKOUT3_CASCADE = 1'b0;
  57942. defparam \pll_inst|auto_generated|pll1 .CLKOUT4_CASCADE = 1'b0;
  57943. defparam \pll_inst|auto_generated|pll1 .VCO_POST_DIV = 1'b1;
  57944. defparam \pll_inst|auto_generated|pll1 .REG_CTRL = 2'b00;
  57945. defparam \pll_inst|auto_generated|pll1 .CP = 3'b100;
  57946. defparam \pll_inst|auto_generated|pll1 .RREF = 2'b01;
  57947. defparam \pll_inst|auto_generated|pll1 .RVI = 2'b01;
  57948. defparam \pll_inst|auto_generated|pll1 .IVCO = 3'b010;
  57949. defparam \pll_inst|auto_generated|pll1 .PLL_EN_FLAG = 1'b1;
  57950. alta_slice \pll_inst|auto_generated|pll_lock_sync (
  57951. .A(vcc),
  57952. .B(vcc),
  57953. .C(vcc),
  57954. .D(vcc),
  57955. .Cin(),
  57956. .Qin(\pll_inst|auto_generated|pll_lock_sync~q ),
  57957. .Clk(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp_X57_Y5_SIG_VCC ),
  57958. .AsyncReset(\PLL_ENABLE~clkctrl_outclk__AsyncReset_X57_Y5_SIG ),
  57959. .SyncReset(),
  57960. .ShiftData(),
  57961. .SyncLoad(),
  57962. .LutOut(\pll_inst|auto_generated|pll_lock_sync~feeder_combout ),
  57963. .Cout(),
  57964. .Q(\pll_inst|auto_generated|pll_lock_sync~q ));
  57965. defparam \pll_inst|auto_generated|pll_lock_sync .coord_x = 15;
  57966. defparam \pll_inst|auto_generated|pll_lock_sync .coord_y = 7;
  57967. defparam \pll_inst|auto_generated|pll_lock_sync .coord_z = 7;
  57968. defparam \pll_inst|auto_generated|pll_lock_sync .mask = 16'hFFFF;
  57969. defparam \pll_inst|auto_generated|pll_lock_sync .modeMux = 1'b0;
  57970. defparam \pll_inst|auto_generated|pll_lock_sync .FeedbackMux = 1'b0;
  57971. defparam \pll_inst|auto_generated|pll_lock_sync .ShiftMux = 1'b0;
  57972. defparam \pll_inst|auto_generated|pll_lock_sync .BypassEn = 1'b0;
  57973. defparam \pll_inst|auto_generated|pll_lock_sync .CarryEnb = 1'b1;
  57974. alta_rv32 rv32(
  57975. .sys_clk(\gclksw_inst|gclk_switch__alta_gclksw__clkout ),
  57976. .mem_ahb_hready(\rv32.mem_ahb_hready ),
  57977. .mem_ahb_hreadyout(!\macro_inst|u_ahb2apb|hreadyout~q ),
  57978. .mem_ahb_htrans({\rv32.mem_ahb_htrans[1] , \rv32.mem_ahb_htrans[0] }),
  57979. .mem_ahb_hsize({\rv32.mem_ahb_hsize[2] , \rv32.mem_ahb_hsize[1] , \rv32.mem_ahb_hsize[0] }),
  57980. .mem_ahb_hburst({\rv32.mem_ahb_hburst[2] , \rv32.mem_ahb_hburst[1] , \rv32.mem_ahb_hburst[0] }),
  57981. .mem_ahb_hwrite(\rv32.mem_ahb_hwrite ),
  57982. .mem_ahb_haddr({\rv32.mem_ahb_haddr[31] , \rv32.mem_ahb_haddr[30] , \rv32.mem_ahb_haddr[29] , \rv32.mem_ahb_haddr[28] , \rv32.mem_ahb_haddr[27] , \rv32.mem_ahb_haddr[26] , \rv32.mem_ahb_haddr[25] , \rv32.mem_ahb_haddr[24] , \rv32.mem_ahb_haddr[23] , \rv32.mem_ahb_haddr[22] , \rv32.mem_ahb_haddr[21] , \rv32.mem_ahb_haddr[20] , \rv32.mem_ahb_haddr[19] , \rv32.mem_ahb_haddr[18] , \rv32.mem_ahb_haddr[17] , \rv32.mem_ahb_haddr[16] , \rv32.mem_ahb_haddr[15] , \rv32.mem_ahb_haddr[14] , \rv32.mem_ahb_haddr[13] , \rv32.mem_ahb_haddr[12] , \rv32.mem_ahb_haddr[11] , \rv32.mem_ahb_haddr[10] , \rv32.mem_ahb_haddr[9] , \rv32.mem_ahb_haddr[8] , \rv32.mem_ahb_haddr[7] , \rv32.mem_ahb_haddr[6] , \rv32.mem_ahb_haddr[5] , \rv32.mem_ahb_haddr[4] , \rv32.mem_ahb_haddr[3] , \rv32.mem_ahb_haddr[2] , \rv32.mem_ahb_haddr[1] , \rv32.mem_ahb_haddr[0] }),
  57983. .mem_ahb_hwdata({\rv32.mem_ahb_hwdata[31] , \rv32.mem_ahb_hwdata[30] , \rv32.mem_ahb_hwdata[29] , \rv32.mem_ahb_hwdata[28] , \rv32.mem_ahb_hwdata[27] , \rv32.mem_ahb_hwdata[26] , \rv32.mem_ahb_hwdata[25] , \rv32.mem_ahb_hwdata[24] , \rv32.mem_ahb_hwdata[23] , \rv32.mem_ahb_hwdata[22] , \rv32.mem_ahb_hwdata[21] , \rv32.mem_ahb_hwdata[20] , \rv32.mem_ahb_hwdata[19] , \rv32.mem_ahb_hwdata[18] , \rv32.mem_ahb_hwdata[17] , \rv32.mem_ahb_hwdata[16] , \rv32.mem_ahb_hwdata[15] , \rv32.mem_ahb_hwdata[14] , \rv32.mem_ahb_hwdata[13] , \rv32.mem_ahb_hwdata[12] , \rv32.mem_ahb_hwdata[11] , \rv32.mem_ahb_hwdata[10] , \rv32.mem_ahb_hwdata[9] , \rv32.mem_ahb_hwdata[8] , \rv32.mem_ahb_hwdata[7] , \rv32.mem_ahb_hwdata[6] , \rv32.mem_ahb_hwdata[5] , \rv32.mem_ahb_hwdata[4] , \rv32.mem_ahb_hwdata[3] , \rv32.mem_ahb_hwdata[2] , \rv32.mem_ahb_hwdata[1] , \rv32.mem_ahb_hwdata[0] }),
  57984. .mem_ahb_hresp(gnd),
  57985. .mem_ahb_hrdata({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, \macro_inst|u_ahb2apb|prdata [15], \macro_inst|u_ahb2apb|prdata [14], \macro_inst|u_ahb2apb|prdata [13], \macro_inst|u_ahb2apb|prdata [12], \macro_inst|u_ahb2apb|prdata [11], \macro_inst|u_ahb2apb|prdata [10], \macro_inst|u_ahb2apb|prdata [9], \macro_inst|u_ahb2apb|prdata [8], \macro_inst|u_ahb2apb|prdata [7], \macro_inst|u_ahb2apb|prdata [6], \macro_inst|u_ahb2apb|prdata [5], \macro_inst|u_ahb2apb|prdata [4], \macro_inst|u_ahb2apb|prdata [3], \macro_inst|u_ahb2apb|prdata [2], \macro_inst|u_ahb2apb|prdata [1], \macro_inst|u_ahb2apb|prdata [0]}),
  57986. .slave_ahb_hsel(gnd),
  57987. .slave_ahb_hready(vcc),
  57988. .slave_ahb_hreadyout(\rv32.slave_ahb_hreadyout ),
  57989. .slave_ahb_htrans({gnd, gnd}),
  57990. .slave_ahb_hsize({gnd, gnd, gnd}),
  57991. .slave_ahb_hburst({gnd, gnd, gnd}),
  57992. .slave_ahb_hwrite(gnd),
  57993. .slave_ahb_haddr({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  57994. .slave_ahb_hwdata({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  57995. .slave_ahb_hresp(\rv32.slave_ahb_hresp ),
  57996. .slave_ahb_hrdata({\rv32.slave_ahb_hrdata[31] , \rv32.slave_ahb_hrdata[30] , \rv32.slave_ahb_hrdata[29] , \rv32.slave_ahb_hrdata[28] , \rv32.slave_ahb_hrdata[27] , \rv32.slave_ahb_hrdata[26] , \rv32.slave_ahb_hrdata[25] , \rv32.slave_ahb_hrdata[24] , \rv32.slave_ahb_hrdata[23] , \rv32.slave_ahb_hrdata[22] , \rv32.slave_ahb_hrdata[21] , \rv32.slave_ahb_hrdata[20] , \rv32.slave_ahb_hrdata[19] , \rv32.slave_ahb_hrdata[18] , \rv32.slave_ahb_hrdata[17] , \rv32.slave_ahb_hrdata[16] , \rv32.slave_ahb_hrdata[15] , \rv32.slave_ahb_hrdata[14] , \rv32.slave_ahb_hrdata[13] , \rv32.slave_ahb_hrdata[12] , \rv32.slave_ahb_hrdata[11] , \rv32.slave_ahb_hrdata[10] , \rv32.slave_ahb_hrdata[9] , \rv32.slave_ahb_hrdata[8] , \rv32.slave_ahb_hrdata[7] , \rv32.slave_ahb_hrdata[6] , \rv32.slave_ahb_hrdata[5] , \rv32.slave_ahb_hrdata[4] , \rv32.slave_ahb_hrdata[3] , \rv32.slave_ahb_hrdata[2] , \rv32.slave_ahb_hrdata[1] , \rv32.slave_ahb_hrdata[0] }),
  57997. .gpio0_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  57998. .gpio0_io_out_data({\rv32.gpio0_io_out_data[7] , \rv32.gpio0_io_out_data[6] , \rv32.gpio0_io_out_data[5] , \rv32.gpio0_io_out_data[4] , \rv32.gpio0_io_out_data[3] , \rv32.gpio0_io_out_data[2] , \rv32.gpio0_io_out_data[1] , \rv32.gpio0_io_out_data[0] }),
  57999. .gpio0_io_out_en({\rv32.gpio0_io_out_en[7] , \rv32.gpio0_io_out_en[6] , \rv32.gpio0_io_out_en[5] , \rv32.gpio0_io_out_en[4] , \rv32.gpio0_io_out_en[3] , \rv32.gpio0_io_out_en[2] , \rv32.gpio0_io_out_en[1] , \rv32.gpio0_io_out_en[0] }),
  58000. .gpio1_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  58001. .gpio1_io_out_data({\rv32.gpio1_io_out_data[7] , \rv32.gpio1_io_out_data[6] , \rv32.gpio1_io_out_data[5] , \rv32.gpio1_io_out_data[4] , \rv32.gpio1_io_out_data[3] , \rv32.gpio1_io_out_data[2] , \rv32.gpio1_io_out_data[1] , \rv32.gpio1_io_out_data[0] }),
  58002. .gpio1_io_out_en({\rv32.gpio1_io_out_en[7] , \rv32.gpio1_io_out_en[6] , \rv32.gpio1_io_out_en[5] , \rv32.gpio1_io_out_en[4] , \rv32.gpio1_io_out_en[3] , \rv32.gpio1_io_out_en[2] , \rv32.gpio1_io_out_en[1] , \rv32.gpio1_io_out_en[0] }),
  58003. .sys_ctrl_clkSource({\rv32.sys_ctrl_clkSource[1] , \rv32.sys_ctrl_clkSource[0] }),
  58004. .sys_ctrl_hseEnable(\rv32.sys_ctrl_hseEnable ),
  58005. .sys_ctrl_hseBypass(\rv32.sys_ctrl_hseBypass ),
  58006. .sys_ctrl_pllEnable(\rv32.sys_ctrl_pllEnable ),
  58007. .sys_ctrl_pllReady(\auto_generated_inst.hbo_13_1797ab7b230f061a_bp ),
  58008. .sys_ctrl_sleep(\rv32.sys_ctrl_sleep ),
  58009. .sys_ctrl_stop(\rv32.sys_ctrl_stop ),
  58010. .sys_ctrl_standby(\rv32.sys_ctrl_standby ),
  58011. .gpio2_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  58012. .gpio2_io_out_data({\rv32.gpio2_io_out_data[7] , \rv32.gpio2_io_out_data[6] , \rv32.gpio2_io_out_data[5] , \rv32.gpio2_io_out_data[4] , \rv32.gpio2_io_out_data[3] , \rv32.gpio2_io_out_data[2] , \rv32.gpio2_io_out_data[1] , \rv32.gpio2_io_out_data[0] }),
  58013. .gpio2_io_out_en({\rv32.gpio2_io_out_en[7] , \rv32.gpio2_io_out_en[6] , \rv32.gpio2_io_out_en[5] , \rv32.gpio2_io_out_en[4] , \rv32.gpio2_io_out_en[3] , \rv32.gpio2_io_out_en[2] , \rv32.gpio2_io_out_en[1] , \rv32.gpio2_io_out_en[0] }),
  58014. .gpio3_io_in({gnd, gnd, gnd, \GPIO3_4~input_o , \GPIO3_3~input_o , \GPIO3_2~input_o , \GPIO3_1~input_o , \GPIO3_0~input_o }),
  58015. .gpio3_io_out_data({\rv32.gpio3_io_out_data[7] , \rv32.gpio3_io_out_data[6] , \rv32.gpio3_io_out_data[5] , \rv32.gpio3_io_out_data[4] , \rv32.gpio3_io_out_data[3] , \rv32.gpio3_io_out_data[2] , \rv32.gpio3_io_out_data[1] , \rv32.gpio3_io_out_data[0] }),
  58016. .gpio3_io_out_en({\rv32.gpio3_io_out_en[7] , \rv32.gpio3_io_out_en[6] , \rv32.gpio3_io_out_en[5] , \rv32.gpio3_io_out_en[4] , \rv32.gpio3_io_out_en[3] , \rv32.gpio3_io_out_en[2] , \rv32.gpio3_io_out_en[1] , \rv32.gpio3_io_out_en[0] }),
  58017. .gpio4_io_in({gnd, gnd, \macro_inst|u_uart[0]|u_regs|interrupts [5], \macro_inst|u_uart[0]|u_regs|interrupts [4], \macro_inst|u_uart[0]|u_regs|interrupts [3], \macro_inst|u_uart[0]|u_regs|interrupts [2], \macro_inst|u_uart[0]|u_regs|interrupts [1], \macro_inst|u_uart[0]|u_regs|interrupts [0]}),
  58018. .gpio4_io_out_data({\rv32.gpio4_io_out_data[7] , \rv32.gpio4_io_out_data[6] , \rv32.gpio4_io_out_data[5] , \rv32.gpio4_io_out_data[4] , \rv32.gpio4_io_out_data[3] , \rv32.gpio4_io_out_data[2] , \rv32.gpio4_io_out_data[1] , \rv32.gpio4_io_out_data[0] }),
  58019. .gpio4_io_out_en({\rv32.gpio4_io_out_en[7] , \rv32.gpio4_io_out_en[6] , \rv32.gpio4_io_out_en[5] , \rv32.gpio4_io_out_en[4] , \rv32.gpio4_io_out_en[3] , \rv32.gpio4_io_out_en[2] , \rv32.gpio4_io_out_en[1] , \rv32.gpio4_io_out_en[0] }),
  58020. .gpio5_io_in({gnd, gnd, \macro_inst|u_uart[1]|u_regs|interrupts [5], \macro_inst|u_uart[1]|u_regs|interrupts [4], \macro_inst|u_uart[1]|u_regs|interrupts [3], \macro_inst|u_uart[1]|u_regs|interrupts [2], \macro_inst|u_uart[1]|u_regs|interrupts [1], \macro_inst|u_uart[1]|u_regs|interrupts [0]}),
  58021. .gpio5_io_out_data({\rv32.gpio5_io_out_data[7] , \rv32.gpio5_io_out_data[6] , \rv32.gpio5_io_out_data[5] , \rv32.gpio5_io_out_data[4] , \rv32.gpio5_io_out_data[3] , \rv32.gpio5_io_out_data[2] , \rv32.gpio5_io_out_data[1] , \rv32.gpio5_io_out_data[0] }),
  58022. .gpio5_io_out_en({\rv32.gpio5_io_out_en[7] , \rv32.gpio5_io_out_en[6] , \rv32.gpio5_io_out_en[5] , \rv32.gpio5_io_out_en[4] , \rv32.gpio5_io_out_en[3] , \rv32.gpio5_io_out_en[2] , \rv32.gpio5_io_out_en[1] , \rv32.gpio5_io_out_en[0] }),
  58023. .gpio6_io_in({\UART3_UARTRXD~input_o , \GPIO6_6~input_o , gpio6_io_in[5], gnd, gpio6_io_in[3], gnd, gpio6_io_in[1], gnd}),
  58024. .gpio6_io_out_data({\rv32.gpio6_io_out_data[7] , \rv32.gpio6_io_out_data[6] , \rv32.gpio6_io_out_data[5] , \rv32.gpio6_io_out_data[4] , \rv32.gpio6_io_out_data[3] , \rv32.gpio6_io_out_data[2] , \rv32.gpio6_io_out_data[1] , \rv32.gpio6_io_out_data[0] }),
  58025. .gpio6_io_out_en({\rv32.gpio6_io_out_en[7] , \rv32.gpio6_io_out_en[6] , \rv32.gpio6_io_out_en[5] , \rv32.gpio6_io_out_en[4] , \rv32.gpio6_io_out_en[3] , \rv32.gpio6_io_out_en[2] , \rv32.gpio6_io_out_en[1] , \rv32.gpio6_io_out_en[0] }),
  58026. .gpio7_io_in({gnd, gnd, gnd, gnd, gnd, gnd, \UART4_UARTRXD~input_o , gnd}),
  58027. .gpio7_io_out_data({\rv32.gpio7_io_out_data[7] , \rv32.gpio7_io_out_data[6] , \rv32.gpio7_io_out_data[5] , \rv32.gpio7_io_out_data[4] , \rv32.gpio7_io_out_data[3] , \rv32.gpio7_io_out_data[2] , \rv32.gpio7_io_out_data[1] , \rv32.gpio7_io_out_data[0] }),
  58028. .gpio7_io_out_en({\rv32.gpio7_io_out_en[7] , \rv32.gpio7_io_out_en[6] , \rv32.gpio7_io_out_en[5] , \rv32.gpio7_io_out_en[4] , \rv32.gpio7_io_out_en[3] , \rv32.gpio7_io_out_en[2] , \rv32.gpio7_io_out_en[1] , \rv32.gpio7_io_out_en[0] }),
  58029. .gpio8_io_in({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  58030. .gpio8_io_out_data({\rv32.gpio8_io_out_data[7] , \rv32.gpio8_io_out_data[6] , \rv32.gpio8_io_out_data[5] , \rv32.gpio8_io_out_data[4] , \rv32.gpio8_io_out_data[3] , \rv32.gpio8_io_out_data[2] , \rv32.gpio8_io_out_data[1] , \rv32.gpio8_io_out_data[0] }),
  58031. .gpio8_io_out_en({\rv32.gpio8_io_out_en[7] , \rv32.gpio8_io_out_en[6] , \rv32.gpio8_io_out_en[5] , \rv32.gpio8_io_out_en[4] , \rv32.gpio8_io_out_en[3] , \rv32.gpio8_io_out_en[2] , \rv32.gpio8_io_out_en[1] , \rv32.gpio8_io_out_en[0] }),
  58032. .gpio9_io_in({gnd, gnd, gnd, gnd, gnd, gnd, \GPIO9_1~input_o , gnd}),
  58033. .gpio9_io_out_data({\rv32.gpio9_io_out_data[7] , \rv32.gpio9_io_out_data[6] , \rv32.gpio9_io_out_data[5] , \rv32.gpio9_io_out_data[4] , \rv32.gpio9_io_out_data[3] , \rv32.gpio9_io_out_data[2] , \rv32.gpio9_io_out_data[1] , \rv32.gpio9_io_out_data[0] }),
  58034. .gpio9_io_out_en({\rv32.gpio9_io_out_en[7] , \rv32.gpio9_io_out_en[6] , \rv32.gpio9_io_out_en[5] , \rv32.gpio9_io_out_en[4] , \rv32.gpio9_io_out_en[3] , \rv32.gpio9_io_out_en[2] , \rv32.gpio9_io_out_en[1] , \rv32.gpio9_io_out_en[0] }),
  58035. .ext_resetn(vcc),
  58036. .resetn_out(\rv32.resetn_out ),
  58037. .dmactive(\rv32.dmactive ),
  58038. .swj_JTAGNSW(\rv32.swj_JTAGNSW ),
  58039. .swj_JTAGSTATE({\rv32.swj_JTAGSTATE[3] , \rv32.swj_JTAGSTATE[2] , \rv32.swj_JTAGSTATE[1] , \rv32.swj_JTAGSTATE[0] }),
  58040. .swj_JTAGIR({\rv32.swj_JTAGIR[3] , \rv32.swj_JTAGIR[2] , \rv32.swj_JTAGIR[1] , \rv32.swj_JTAGIR[0] }),
  58041. .ext_int({gnd, gnd, gnd, gnd, gnd, gnd, gnd, gnd}),
  58042. .ext_dma_DMACBREQ({\macro_inst|u_uart[0]|u_tx[1]|tx_dma_req~q , \macro_inst|u_uart[0]|u_tx[0]|tx_dma_req~q , \macro_inst|u_uart[0]|u_rx[1]|rx_dma_req~q , \macro_inst|u_uart[0]|u_rx[0]|rx_dma_req~q }),
  58043. .ext_dma_DMACLBREQ({gnd, gnd, gnd, gnd}),
  58044. .ext_dma_DMACSREQ({gnd, gnd, gnd, gnd}),
  58045. .ext_dma_DMACLSREQ({gnd, gnd, gnd, gnd}),
  58046. .ext_dma_DMACCLR({\rv32.ext_dma_DMACCLR[3] , \rv32.ext_dma_DMACCLR[2] , \rv32.ext_dma_DMACCLR[1] , \rv32.ext_dma_DMACCLR[0] }),
  58047. .ext_dma_DMACTC({\rv32.ext_dma_DMACTC[3] , \rv32.ext_dma_DMACTC[2] , \rv32.ext_dma_DMACTC[1] , \rv32.ext_dma_DMACTC[0] }),
  58048. .local_int({gnd, gnd, gnd, gnd}),
  58049. .test_mode({gnd, gnd}),
  58050. .usb0_xcvr_clk(vcc),
  58051. .usb0_id(vcc));
  58052. defparam rv32.coord_x = 0;
  58053. defparam rv32.coord_y = 5;
  58054. defparam rv32.coord_z = 0;
  58055. alta_syncctrl syncload_ctrl_X43_Y1(
  58056. .Din(),
  58057. .Dout(SyncLoad_X43_Y1_VCC));
  58058. defparam syncload_ctrl_X43_Y1.coord_x = 5;
  58059. defparam syncload_ctrl_X43_Y1.coord_y = 1;
  58060. defparam syncload_ctrl_X43_Y1.coord_z = 1;
  58061. defparam syncload_ctrl_X43_Y1.SyncCtrlMux = 2'b01;
  58062. alta_syncctrl syncload_ctrl_X43_Y2(
  58063. .Din(),
  58064. .Dout(SyncLoad_X43_Y2_VCC));
  58065. defparam syncload_ctrl_X43_Y2.coord_x = 2;
  58066. defparam syncload_ctrl_X43_Y2.coord_y = 2;
  58067. defparam syncload_ctrl_X43_Y2.coord_z = 1;
  58068. defparam syncload_ctrl_X43_Y2.SyncCtrlMux = 2'b01;
  58069. alta_syncctrl syncload_ctrl_X43_Y3(
  58070. .Din(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout ),
  58071. .Dout(\macro_inst|u_uart[0]|u_rx[5]|always6~1_combout__SyncLoad_X43_Y3_SIG ));
  58072. defparam syncload_ctrl_X43_Y3.coord_x = 1;
  58073. defparam syncload_ctrl_X43_Y3.coord_y = 1;
  58074. defparam syncload_ctrl_X43_Y3.coord_z = 1;
  58075. defparam syncload_ctrl_X43_Y3.SyncCtrlMux = 2'b10;
  58076. alta_syncctrl syncload_ctrl_X44_Y1(
  58077. .Din(),
  58078. .Dout(SyncLoad_X44_Y1_VCC));
  58079. defparam syncload_ctrl_X44_Y1.coord_x = 4;
  58080. defparam syncload_ctrl_X44_Y1.coord_y = 1;
  58081. defparam syncload_ctrl_X44_Y1.coord_z = 1;
  58082. defparam syncload_ctrl_X44_Y1.SyncCtrlMux = 2'b01;
  58083. alta_syncctrl syncload_ctrl_X44_Y2(
  58084. .Din(),
  58085. .Dout(SyncLoad_X44_Y2_VCC));
  58086. defparam syncload_ctrl_X44_Y2.coord_x = 3;
  58087. defparam syncload_ctrl_X44_Y2.coord_y = 2;
  58088. defparam syncload_ctrl_X44_Y2.coord_z = 1;
  58089. defparam syncload_ctrl_X44_Y2.SyncCtrlMux = 2'b01;
  58090. alta_syncctrl syncload_ctrl_X44_Y3(
  58091. .Din(),
  58092. .Dout(SyncLoad_X44_Y3_VCC));
  58093. defparam syncload_ctrl_X44_Y3.coord_x = 3;
  58094. defparam syncload_ctrl_X44_Y3.coord_y = 1;
  58095. defparam syncload_ctrl_X44_Y3.coord_z = 1;
  58096. defparam syncload_ctrl_X44_Y3.SyncCtrlMux = 2'b01;
  58097. alta_syncctrl syncload_ctrl_X45_Y1(
  58098. .Din(),
  58099. .Dout(SyncLoad_X45_Y1_GND));
  58100. defparam syncload_ctrl_X45_Y1.coord_x = 4;
  58101. defparam syncload_ctrl_X45_Y1.coord_y = 3;
  58102. defparam syncload_ctrl_X45_Y1.coord_z = 1;
  58103. defparam syncload_ctrl_X45_Y1.SyncCtrlMux = 2'b00;
  58104. alta_syncctrl syncload_ctrl_X45_Y2(
  58105. .Din(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout ),
  58106. .Dout(\macro_inst|u_uart[0]|u_rx[4]|always6~1_combout__SyncLoad_X45_Y2_SIG ));
  58107. defparam syncload_ctrl_X45_Y2.coord_x = 4;
  58108. defparam syncload_ctrl_X45_Y2.coord_y = 2;
  58109. defparam syncload_ctrl_X45_Y2.coord_z = 1;
  58110. defparam syncload_ctrl_X45_Y2.SyncCtrlMux = 2'b10;
  58111. alta_syncctrl syncload_ctrl_X45_Y3(
  58112. .Din(),
  58113. .Dout(SyncLoad_X45_Y3_VCC));
  58114. defparam syncload_ctrl_X45_Y3.coord_x = 2;
  58115. defparam syncload_ctrl_X45_Y3.coord_y = 1;
  58116. defparam syncload_ctrl_X45_Y3.coord_z = 1;
  58117. defparam syncload_ctrl_X45_Y3.SyncCtrlMux = 2'b01;
  58118. alta_syncctrl syncload_ctrl_X46_Y1(
  58119. .Din(),
  58120. .Dout(SyncLoad_X46_Y1_GND));
  58121. defparam syncload_ctrl_X46_Y1.coord_x = 3;
  58122. defparam syncload_ctrl_X46_Y1.coord_y = 3;
  58123. defparam syncload_ctrl_X46_Y1.coord_z = 1;
  58124. defparam syncload_ctrl_X46_Y1.SyncCtrlMux = 2'b00;
  58125. alta_syncctrl syncload_ctrl_X46_Y2(
  58126. .Din(),
  58127. .Dout(SyncLoad_X46_Y2_VCC));
  58128. defparam syncload_ctrl_X46_Y2.coord_x = 7;
  58129. defparam syncload_ctrl_X46_Y2.coord_y = 2;
  58130. defparam syncload_ctrl_X46_Y2.coord_z = 1;
  58131. defparam syncload_ctrl_X46_Y2.SyncCtrlMux = 2'b01;
  58132. alta_syncctrl syncload_ctrl_X46_Y3(
  58133. .Din(),
  58134. .Dout(SyncLoad_X46_Y3_VCC));
  58135. defparam syncload_ctrl_X46_Y3.coord_x = 6;
  58136. defparam syncload_ctrl_X46_Y3.coord_y = 3;
  58137. defparam syncload_ctrl_X46_Y3.coord_z = 1;
  58138. defparam syncload_ctrl_X46_Y3.SyncCtrlMux = 2'b01;
  58139. alta_syncctrl syncload_ctrl_X46_Y4(
  58140. .Din(),
  58141. .Dout(SyncLoad_X46_Y4_VCC));
  58142. defparam syncload_ctrl_X46_Y4.coord_x = 17;
  58143. defparam syncload_ctrl_X46_Y4.coord_y = 2;
  58144. defparam syncload_ctrl_X46_Y4.coord_z = 1;
  58145. defparam syncload_ctrl_X46_Y4.SyncCtrlMux = 2'b01;
  58146. alta_syncctrl syncload_ctrl_X47_Y1(
  58147. .Din(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout ),
  58148. .Dout(\macro_inst|u_uart[0]|u_rx[3]|always6~1_combout__SyncLoad_X47_Y1_SIG ));
  58149. defparam syncload_ctrl_X47_Y1.coord_x = 2;
  58150. defparam syncload_ctrl_X47_Y1.coord_y = 4;
  58151. defparam syncload_ctrl_X47_Y1.coord_z = 1;
  58152. defparam syncload_ctrl_X47_Y1.SyncCtrlMux = 2'b10;
  58153. alta_syncctrl syncload_ctrl_X47_Y2(
  58154. .Din(),
  58155. .Dout(SyncLoad_X47_Y2_VCC));
  58156. defparam syncload_ctrl_X47_Y2.coord_x = 4;
  58157. defparam syncload_ctrl_X47_Y2.coord_y = 4;
  58158. defparam syncload_ctrl_X47_Y2.coord_z = 1;
  58159. defparam syncload_ctrl_X47_Y2.SyncCtrlMux = 2'b01;
  58160. alta_syncctrl syncload_ctrl_X47_Y3(
  58161. .Din(),
  58162. .Dout(SyncLoad_X47_Y3_VCC));
  58163. defparam syncload_ctrl_X47_Y3.coord_x = 7;
  58164. defparam syncload_ctrl_X47_Y3.coord_y = 3;
  58165. defparam syncload_ctrl_X47_Y3.coord_z = 1;
  58166. defparam syncload_ctrl_X47_Y3.SyncCtrlMux = 2'b01;
  58167. alta_syncctrl syncload_ctrl_X47_Y4(
  58168. .Din(),
  58169. .Dout(SyncLoad_X47_Y4_VCC));
  58170. defparam syncload_ctrl_X47_Y4.coord_x = 10;
  58171. defparam syncload_ctrl_X47_Y4.coord_y = 4;
  58172. defparam syncload_ctrl_X47_Y4.coord_z = 1;
  58173. defparam syncload_ctrl_X47_Y4.SyncCtrlMux = 2'b01;
  58174. alta_syncctrl syncload_ctrl_X48_Y1(
  58175. .Din(),
  58176. .Dout(SyncLoad_X48_Y1_VCC));
  58177. defparam syncload_ctrl_X48_Y1.coord_x = 3;
  58178. defparam syncload_ctrl_X48_Y1.coord_y = 4;
  58179. defparam syncload_ctrl_X48_Y1.coord_z = 1;
  58180. defparam syncload_ctrl_X48_Y1.SyncCtrlMux = 2'b01;
  58181. alta_syncctrl syncload_ctrl_X48_Y2(
  58182. .Din(),
  58183. .Dout(SyncLoad_X48_Y2_VCC));
  58184. defparam syncload_ctrl_X48_Y2.coord_x = 6;
  58185. defparam syncload_ctrl_X48_Y2.coord_y = 4;
  58186. defparam syncload_ctrl_X48_Y2.coord_z = 1;
  58187. defparam syncload_ctrl_X48_Y2.SyncCtrlMux = 2'b01;
  58188. alta_syncctrl syncload_ctrl_X48_Y4(
  58189. .Din(),
  58190. .Dout(SyncLoad_X48_Y4_VCC));
  58191. defparam syncload_ctrl_X48_Y4.coord_x = 1;
  58192. defparam syncload_ctrl_X48_Y4.coord_y = 3;
  58193. defparam syncload_ctrl_X48_Y4.coord_z = 1;
  58194. defparam syncload_ctrl_X48_Y4.SyncCtrlMux = 2'b01;
  58195. alta_syncctrl syncload_ctrl_X49_Y1(
  58196. .Din(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout ),
  58197. .Dout(\macro_inst|u_uart[0]|u_rx[2]|always6~1_combout__SyncLoad_X49_Y1_SIG ));
  58198. defparam syncload_ctrl_X49_Y1.coord_x = 6;
  58199. defparam syncload_ctrl_X49_Y1.coord_y = 1;
  58200. defparam syncload_ctrl_X49_Y1.coord_z = 1;
  58201. defparam syncload_ctrl_X49_Y1.SyncCtrlMux = 2'b10;
  58202. alta_syncctrl syncload_ctrl_X49_Y2(
  58203. .Din(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout ),
  58204. .Dout(\macro_inst|u_uart[0]|u_rx[0]|always6~1_combout__SyncLoad_X49_Y2_SIG ));
  58205. defparam syncload_ctrl_X49_Y2.coord_x = 7;
  58206. defparam syncload_ctrl_X49_Y2.coord_y = 4;
  58207. defparam syncload_ctrl_X49_Y2.coord_z = 1;
  58208. defparam syncload_ctrl_X49_Y2.SyncCtrlMux = 2'b10;
  58209. alta_syncctrl syncload_ctrl_X49_Y3(
  58210. .Din(),
  58211. .Dout(SyncLoad_X49_Y3_VCC));
  58212. defparam syncload_ctrl_X49_Y3.coord_x = 6;
  58213. defparam syncload_ctrl_X49_Y3.coord_y = 2;
  58214. defparam syncload_ctrl_X49_Y3.coord_z = 1;
  58215. defparam syncload_ctrl_X49_Y3.SyncCtrlMux = 2'b01;
  58216. alta_syncctrl syncload_ctrl_X50_Y1(
  58217. .Din(),
  58218. .Dout(SyncLoad_X50_Y1_VCC));
  58219. defparam syncload_ctrl_X50_Y1.coord_x = 7;
  58220. defparam syncload_ctrl_X50_Y1.coord_y = 1;
  58221. defparam syncload_ctrl_X50_Y1.coord_z = 1;
  58222. defparam syncload_ctrl_X50_Y1.SyncCtrlMux = 2'b01;
  58223. alta_syncctrl syncload_ctrl_X50_Y2(
  58224. .Din(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout ),
  58225. .Dout(\macro_inst|u_uart[0]|u_rx[1]|always6~1_combout__SyncLoad_X50_Y2_SIG ));
  58226. defparam syncload_ctrl_X50_Y2.coord_x = 14;
  58227. defparam syncload_ctrl_X50_Y2.coord_y = 4;
  58228. defparam syncload_ctrl_X50_Y2.coord_z = 1;
  58229. defparam syncload_ctrl_X50_Y2.SyncCtrlMux = 2'b10;
  58230. alta_syncctrl syncload_ctrl_X50_Y3(
  58231. .Din(),
  58232. .Dout(SyncLoad_X50_Y3_VCC));
  58233. defparam syncload_ctrl_X50_Y3.coord_x = 16;
  58234. defparam syncload_ctrl_X50_Y3.coord_y = 12;
  58235. defparam syncload_ctrl_X50_Y3.coord_z = 1;
  58236. defparam syncload_ctrl_X50_Y3.SyncCtrlMux = 2'b01;
  58237. alta_syncctrl syncload_ctrl_X50_Y4(
  58238. .Din(),
  58239. .Dout(SyncLoad_X50_Y4_VCC));
  58240. defparam syncload_ctrl_X50_Y4.coord_x = 8;
  58241. defparam syncload_ctrl_X50_Y4.coord_y = 4;
  58242. defparam syncload_ctrl_X50_Y4.coord_z = 1;
  58243. defparam syncload_ctrl_X50_Y4.SyncCtrlMux = 2'b01;
  58244. alta_syncctrl syncload_ctrl_X51_Y3(
  58245. .Din(),
  58246. .Dout(SyncLoad_X51_Y3_GND));
  58247. defparam syncload_ctrl_X51_Y3.coord_x = 5;
  58248. defparam syncload_ctrl_X51_Y3.coord_y = 3;
  58249. defparam syncload_ctrl_X51_Y3.coord_z = 1;
  58250. defparam syncload_ctrl_X51_Y3.SyncCtrlMux = 2'b00;
  58251. alta_syncctrl syncload_ctrl_X51_Y4(
  58252. .Din(),
  58253. .Dout(SyncLoad_X51_Y4_GND));
  58254. defparam syncload_ctrl_X51_Y4.coord_x = 16;
  58255. defparam syncload_ctrl_X51_Y4.coord_y = 3;
  58256. defparam syncload_ctrl_X51_Y4.coord_z = 1;
  58257. defparam syncload_ctrl_X51_Y4.SyncCtrlMux = 2'b00;
  58258. alta_syncctrl syncload_ctrl_X52_Y1(
  58259. .Din(),
  58260. .Dout(SyncLoad_X52_Y1_VCC));
  58261. defparam syncload_ctrl_X52_Y1.coord_x = 12;
  58262. defparam syncload_ctrl_X52_Y1.coord_y = 4;
  58263. defparam syncload_ctrl_X52_Y1.coord_z = 1;
  58264. defparam syncload_ctrl_X52_Y1.SyncCtrlMux = 2'b01;
  58265. alta_syncctrl syncload_ctrl_X52_Y2(
  58266. .Din(),
  58267. .Dout(SyncLoad_X52_Y2_VCC));
  58268. defparam syncload_ctrl_X52_Y2.coord_x = 9;
  58269. defparam syncload_ctrl_X52_Y2.coord_y = 3;
  58270. defparam syncload_ctrl_X52_Y2.coord_z = 1;
  58271. defparam syncload_ctrl_X52_Y2.SyncCtrlMux = 2'b01;
  58272. alta_syncctrl syncload_ctrl_X52_Y3(
  58273. .Din(),
  58274. .Dout(SyncLoad_X52_Y3_VCC));
  58275. defparam syncload_ctrl_X52_Y3.coord_x = 17;
  58276. defparam syncload_ctrl_X52_Y3.coord_y = 1;
  58277. defparam syncload_ctrl_X52_Y3.coord_z = 1;
  58278. defparam syncload_ctrl_X52_Y3.SyncCtrlMux = 2'b01;
  58279. alta_syncctrl syncload_ctrl_X52_Y4(
  58280. .Din(),
  58281. .Dout(SyncLoad_X52_Y4_VCC));
  58282. defparam syncload_ctrl_X52_Y4.coord_x = 2;
  58283. defparam syncload_ctrl_X52_Y4.coord_y = 3;
  58284. defparam syncload_ctrl_X52_Y4.coord_z = 1;
  58285. defparam syncload_ctrl_X52_Y4.SyncCtrlMux = 2'b01;
  58286. alta_syncctrl syncload_ctrl_X53_Y1(
  58287. .Din(),
  58288. .Dout(SyncLoad_X53_Y1_GND));
  58289. defparam syncload_ctrl_X53_Y1.coord_x = 9;
  58290. defparam syncload_ctrl_X53_Y1.coord_y = 2;
  58291. defparam syncload_ctrl_X53_Y1.coord_z = 1;
  58292. defparam syncload_ctrl_X53_Y1.SyncCtrlMux = 2'b00;
  58293. alta_syncctrl syncload_ctrl_X53_Y2(
  58294. .Din(),
  58295. .Dout(SyncLoad_X53_Y2_VCC));
  58296. defparam syncload_ctrl_X53_Y2.coord_x = 11;
  58297. defparam syncload_ctrl_X53_Y2.coord_y = 3;
  58298. defparam syncload_ctrl_X53_Y2.coord_z = 1;
  58299. defparam syncload_ctrl_X53_Y2.SyncCtrlMux = 2'b01;
  58300. alta_syncctrl syncload_ctrl_X53_Y3(
  58301. .Din(),
  58302. .Dout(SyncLoad_X53_Y3_VCC));
  58303. defparam syncload_ctrl_X53_Y3.coord_x = 14;
  58304. defparam syncload_ctrl_X53_Y3.coord_y = 2;
  58305. defparam syncload_ctrl_X53_Y3.coord_z = 1;
  58306. defparam syncload_ctrl_X53_Y3.SyncCtrlMux = 2'b01;
  58307. alta_syncctrl syncload_ctrl_X53_Y4(
  58308. .Din(),
  58309. .Dout(SyncLoad_X53_Y4_VCC));
  58310. defparam syncload_ctrl_X53_Y4.coord_x = 18;
  58311. defparam syncload_ctrl_X53_Y4.coord_y = 2;
  58312. defparam syncload_ctrl_X53_Y4.coord_z = 1;
  58313. defparam syncload_ctrl_X53_Y4.SyncCtrlMux = 2'b01;
  58314. alta_syncctrl syncload_ctrl_X54_Y2(
  58315. .Din(),
  58316. .Dout(SyncLoad_X54_Y2_VCC));
  58317. defparam syncload_ctrl_X54_Y2.coord_x = 14;
  58318. defparam syncload_ctrl_X54_Y2.coord_y = 5;
  58319. defparam syncload_ctrl_X54_Y2.coord_z = 1;
  58320. defparam syncload_ctrl_X54_Y2.SyncCtrlMux = 2'b01;
  58321. alta_syncctrl syncload_ctrl_X54_Y3(
  58322. .Din(\macro_inst|u_uart[0]|u_baud|always0~0_combout ),
  58323. .Dout(\macro_inst|u_uart[0]|u_baud|always0~0_combout__SyncLoad_X54_Y3_SIG ));
  58324. defparam syncload_ctrl_X54_Y3.coord_x = 14;
  58325. defparam syncload_ctrl_X54_Y3.coord_y = 3;
  58326. defparam syncload_ctrl_X54_Y3.coord_z = 1;
  58327. defparam syncload_ctrl_X54_Y3.SyncCtrlMux = 2'b10;
  58328. alta_syncctrl syncload_ctrl_X56_Y1(
  58329. .Din(),
  58330. .Dout(SyncLoad_X56_Y1_VCC));
  58331. defparam syncload_ctrl_X56_Y1.coord_x = 10;
  58332. defparam syncload_ctrl_X56_Y1.coord_y = 3;
  58333. defparam syncload_ctrl_X56_Y1.coord_z = 1;
  58334. defparam syncload_ctrl_X56_Y1.SyncCtrlMux = 2'b01;
  58335. alta_syncctrl syncload_ctrl_X56_Y10(
  58336. .Din(),
  58337. .Dout(SyncLoad_X56_Y10_VCC));
  58338. defparam syncload_ctrl_X56_Y10.coord_x = 14;
  58339. defparam syncload_ctrl_X56_Y10.coord_y = 12;
  58340. defparam syncload_ctrl_X56_Y10.coord_z = 1;
  58341. defparam syncload_ctrl_X56_Y10.SyncCtrlMux = 2'b01;
  58342. alta_syncctrl syncload_ctrl_X56_Y11(
  58343. .Din(),
  58344. .Dout(SyncLoad_X56_Y11_VCC));
  58345. defparam syncload_ctrl_X56_Y11.coord_x = 20;
  58346. defparam syncload_ctrl_X56_Y11.coord_y = 6;
  58347. defparam syncload_ctrl_X56_Y11.coord_z = 1;
  58348. defparam syncload_ctrl_X56_Y11.SyncCtrlMux = 2'b01;
  58349. alta_syncctrl syncload_ctrl_X56_Y12(
  58350. .Din(),
  58351. .Dout(SyncLoad_X56_Y12_VCC));
  58352. defparam syncload_ctrl_X56_Y12.coord_x = 14;
  58353. defparam syncload_ctrl_X56_Y12.coord_y = 10;
  58354. defparam syncload_ctrl_X56_Y12.coord_z = 1;
  58355. defparam syncload_ctrl_X56_Y12.SyncCtrlMux = 2'b01;
  58356. alta_syncctrl syncload_ctrl_X56_Y2(
  58357. .Din(),
  58358. .Dout(SyncLoad_X56_Y2_VCC));
  58359. defparam syncload_ctrl_X56_Y2.coord_x = 12;
  58360. defparam syncload_ctrl_X56_Y2.coord_y = 1;
  58361. defparam syncload_ctrl_X56_Y2.coord_z = 1;
  58362. defparam syncload_ctrl_X56_Y2.SyncCtrlMux = 2'b01;
  58363. alta_syncctrl syncload_ctrl_X56_Y3(
  58364. .Din(),
  58365. .Dout(SyncLoad_X56_Y3_VCC));
  58366. defparam syncload_ctrl_X56_Y3.coord_x = 15;
  58367. defparam syncload_ctrl_X56_Y3.coord_y = 2;
  58368. defparam syncload_ctrl_X56_Y3.coord_z = 1;
  58369. defparam syncload_ctrl_X56_Y3.SyncCtrlMux = 2'b01;
  58370. alta_syncctrl syncload_ctrl_X56_Y4(
  58371. .Din(),
  58372. .Dout(SyncLoad_X56_Y4_VCC));
  58373. defparam syncload_ctrl_X56_Y4.coord_x = 18;
  58374. defparam syncload_ctrl_X56_Y4.coord_y = 5;
  58375. defparam syncload_ctrl_X56_Y4.coord_z = 1;
  58376. defparam syncload_ctrl_X56_Y4.SyncCtrlMux = 2'b01;
  58377. alta_syncctrl syncload_ctrl_X56_Y5(
  58378. .Din(\macro_inst|u_ahb2apb|paddr [10]),
  58379. .Dout(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X56_Y5_INV ));
  58380. defparam syncload_ctrl_X56_Y5.coord_x = 17;
  58381. defparam syncload_ctrl_X56_Y5.coord_y = 3;
  58382. defparam syncload_ctrl_X56_Y5.coord_z = 1;
  58383. defparam syncload_ctrl_X56_Y5.SyncCtrlMux = 2'b11;
  58384. alta_syncctrl syncload_ctrl_X56_Y6(
  58385. .Din(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout ),
  58386. .Dout(\macro_inst|u_uart[1]|u_rx[1]|always6~1_combout__SyncLoad_X56_Y6_SIG ));
  58387. defparam syncload_ctrl_X56_Y6.coord_x = 18;
  58388. defparam syncload_ctrl_X56_Y6.coord_y = 1;
  58389. defparam syncload_ctrl_X56_Y6.coord_z = 1;
  58390. defparam syncload_ctrl_X56_Y6.SyncCtrlMux = 2'b10;
  58391. alta_syncctrl syncload_ctrl_X56_Y8(
  58392. .Din(),
  58393. .Dout(SyncLoad_X56_Y8_GND));
  58394. defparam syncload_ctrl_X56_Y8.coord_x = 19;
  58395. defparam syncload_ctrl_X56_Y8.coord_y = 7;
  58396. defparam syncload_ctrl_X56_Y8.coord_z = 1;
  58397. defparam syncload_ctrl_X56_Y8.SyncCtrlMux = 2'b00;
  58398. alta_syncctrl syncload_ctrl_X56_Y9(
  58399. .Din(),
  58400. .Dout(SyncLoad_X56_Y9_VCC));
  58401. defparam syncload_ctrl_X56_Y9.coord_x = 19;
  58402. defparam syncload_ctrl_X56_Y9.coord_y = 3;
  58403. defparam syncload_ctrl_X56_Y9.coord_z = 1;
  58404. defparam syncload_ctrl_X56_Y9.SyncCtrlMux = 2'b01;
  58405. alta_syncctrl syncload_ctrl_X57_Y1(
  58406. .Din(),
  58407. .Dout(SyncLoad_X57_Y1_VCC));
  58408. defparam syncload_ctrl_X57_Y1.coord_x = 12;
  58409. defparam syncload_ctrl_X57_Y1.coord_y = 2;
  58410. defparam syncload_ctrl_X57_Y1.coord_z = 1;
  58411. defparam syncload_ctrl_X57_Y1.SyncCtrlMux = 2'b01;
  58412. alta_syncctrl syncload_ctrl_X57_Y10(
  58413. .Din(),
  58414. .Dout(SyncLoad_X57_Y10_VCC));
  58415. defparam syncload_ctrl_X57_Y10.coord_x = 19;
  58416. defparam syncload_ctrl_X57_Y10.coord_y = 12;
  58417. defparam syncload_ctrl_X57_Y10.coord_z = 1;
  58418. defparam syncload_ctrl_X57_Y10.SyncCtrlMux = 2'b01;
  58419. alta_syncctrl syncload_ctrl_X57_Y11(
  58420. .Din(),
  58421. .Dout(SyncLoad_X57_Y11_VCC));
  58422. defparam syncload_ctrl_X57_Y11.coord_x = 20;
  58423. defparam syncload_ctrl_X57_Y11.coord_y = 5;
  58424. defparam syncload_ctrl_X57_Y11.coord_z = 1;
  58425. defparam syncload_ctrl_X57_Y11.SyncCtrlMux = 2'b01;
  58426. alta_syncctrl syncload_ctrl_X57_Y12(
  58427. .Din(),
  58428. .Dout(SyncLoad_X57_Y12_VCC));
  58429. defparam syncload_ctrl_X57_Y12.coord_x = 20;
  58430. defparam syncload_ctrl_X57_Y12.coord_y = 4;
  58431. defparam syncload_ctrl_X57_Y12.coord_z = 1;
  58432. defparam syncload_ctrl_X57_Y12.SyncCtrlMux = 2'b01;
  58433. alta_syncctrl syncload_ctrl_X57_Y2(
  58434. .Din(),
  58435. .Dout(SyncLoad_X57_Y2_VCC));
  58436. defparam syncload_ctrl_X57_Y2.coord_x = 12;
  58437. defparam syncload_ctrl_X57_Y2.coord_y = 3;
  58438. defparam syncload_ctrl_X57_Y2.coord_z = 1;
  58439. defparam syncload_ctrl_X57_Y2.SyncCtrlMux = 2'b01;
  58440. alta_syncctrl syncload_ctrl_X57_Y3(
  58441. .Din(),
  58442. .Dout(SyncLoad_X57_Y3_VCC));
  58443. defparam syncload_ctrl_X57_Y3.coord_x = 16;
  58444. defparam syncload_ctrl_X57_Y3.coord_y = 1;
  58445. defparam syncload_ctrl_X57_Y3.coord_z = 1;
  58446. defparam syncload_ctrl_X57_Y3.SyncCtrlMux = 2'b01;
  58447. alta_syncctrl syncload_ctrl_X57_Y4(
  58448. .Din(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout ),
  58449. .Dout(\macro_inst|u_uart[1]|u_rx[2]|always6~1_combout__SyncLoad_X57_Y4_SIG ));
  58450. defparam syncload_ctrl_X57_Y4.coord_x = 19;
  58451. defparam syncload_ctrl_X57_Y4.coord_y = 5;
  58452. defparam syncload_ctrl_X57_Y4.coord_z = 1;
  58453. defparam syncload_ctrl_X57_Y4.SyncCtrlMux = 2'b10;
  58454. alta_syncctrl syncload_ctrl_X57_Y6(
  58455. .Din(),
  58456. .Dout(SyncLoad_X57_Y6_VCC));
  58457. defparam syncload_ctrl_X57_Y6.coord_x = 19;
  58458. defparam syncload_ctrl_X57_Y6.coord_y = 1;
  58459. defparam syncload_ctrl_X57_Y6.coord_z = 1;
  58460. defparam syncload_ctrl_X57_Y6.SyncCtrlMux = 2'b01;
  58461. alta_syncctrl syncload_ctrl_X57_Y7(
  58462. .Din(\macro_inst|u_ahb2apb|paddr [10]),
  58463. .Dout(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X57_Y7_INV ));
  58464. defparam syncload_ctrl_X57_Y7.coord_x = 18;
  58465. defparam syncload_ctrl_X57_Y7.coord_y = 4;
  58466. defparam syncload_ctrl_X57_Y7.coord_z = 1;
  58467. defparam syncload_ctrl_X57_Y7.SyncCtrlMux = 2'b11;
  58468. alta_syncctrl syncload_ctrl_X57_Y8(
  58469. .Din(),
  58470. .Dout(SyncLoad_X57_Y8_VCC));
  58471. defparam syncload_ctrl_X57_Y8.coord_x = 19;
  58472. defparam syncload_ctrl_X57_Y8.coord_y = 6;
  58473. defparam syncload_ctrl_X57_Y8.coord_z = 1;
  58474. defparam syncload_ctrl_X57_Y8.SyncCtrlMux = 2'b01;
  58475. alta_syncctrl syncload_ctrl_X57_Y9(
  58476. .Din(),
  58477. .Dout(SyncLoad_X57_Y9_GND));
  58478. defparam syncload_ctrl_X57_Y9.coord_x = 20;
  58479. defparam syncload_ctrl_X57_Y9.coord_y = 3;
  58480. defparam syncload_ctrl_X57_Y9.coord_z = 1;
  58481. defparam syncload_ctrl_X57_Y9.SyncCtrlMux = 2'b00;
  58482. alta_syncctrl syncload_ctrl_X58_Y1(
  58483. .Din(\macro_inst|u_ahb2apb|paddr [10]),
  58484. .Dout(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y1_INV ));
  58485. defparam syncload_ctrl_X58_Y1.coord_x = 10;
  58486. defparam syncload_ctrl_X58_Y1.coord_y = 1;
  58487. defparam syncload_ctrl_X58_Y1.coord_z = 1;
  58488. defparam syncload_ctrl_X58_Y1.SyncCtrlMux = 2'b11;
  58489. alta_syncctrl syncload_ctrl_X58_Y10(
  58490. .Din(),
  58491. .Dout(SyncLoad_X58_Y10_GND));
  58492. defparam syncload_ctrl_X58_Y10.coord_x = 20;
  58493. defparam syncload_ctrl_X58_Y10.coord_y = 12;
  58494. defparam syncload_ctrl_X58_Y10.coord_z = 1;
  58495. defparam syncload_ctrl_X58_Y10.SyncCtrlMux = 2'b00;
  58496. alta_syncctrl syncload_ctrl_X58_Y11(
  58497. .Din(),
  58498. .Dout(SyncLoad_X58_Y11_VCC));
  58499. defparam syncload_ctrl_X58_Y11.coord_x = 20;
  58500. defparam syncload_ctrl_X58_Y11.coord_y = 7;
  58501. defparam syncload_ctrl_X58_Y11.coord_z = 1;
  58502. defparam syncload_ctrl_X58_Y11.SyncCtrlMux = 2'b01;
  58503. alta_syncctrl syncload_ctrl_X58_Y12(
  58504. .Din(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout ),
  58505. .Dout(\macro_inst|u_uart[1]|u_rx[4]|always6~1_combout__SyncLoad_X58_Y12_SIG ));
  58506. defparam syncload_ctrl_X58_Y12.coord_x = 20;
  58507. defparam syncload_ctrl_X58_Y12.coord_y = 10;
  58508. defparam syncload_ctrl_X58_Y12.coord_z = 1;
  58509. defparam syncload_ctrl_X58_Y12.SyncCtrlMux = 2'b10;
  58510. alta_syncctrl syncload_ctrl_X58_Y2(
  58511. .Din(),
  58512. .Dout(SyncLoad_X58_Y2_VCC));
  58513. defparam syncload_ctrl_X58_Y2.coord_x = 15;
  58514. defparam syncload_ctrl_X58_Y2.coord_y = 4;
  58515. defparam syncload_ctrl_X58_Y2.coord_z = 1;
  58516. defparam syncload_ctrl_X58_Y2.SyncCtrlMux = 2'b01;
  58517. alta_syncctrl syncload_ctrl_X58_Y3(
  58518. .Din(\macro_inst|u_ahb2apb|paddr [10]),
  58519. .Dout(\macro_inst|u_ahb2apb|paddr[10]__SyncLoad_X58_Y3_INV ));
  58520. defparam syncload_ctrl_X58_Y3.coord_x = 16;
  58521. defparam syncload_ctrl_X58_Y3.coord_y = 2;
  58522. defparam syncload_ctrl_X58_Y3.coord_z = 1;
  58523. defparam syncload_ctrl_X58_Y3.SyncCtrlMux = 2'b11;
  58524. alta_syncctrl syncload_ctrl_X58_Y4(
  58525. .Din(),
  58526. .Dout(SyncLoad_X58_Y4_VCC));
  58527. defparam syncload_ctrl_X58_Y4.coord_x = 17;
  58528. defparam syncload_ctrl_X58_Y4.coord_y = 4;
  58529. defparam syncload_ctrl_X58_Y4.coord_z = 1;
  58530. defparam syncload_ctrl_X58_Y4.SyncCtrlMux = 2'b01;
  58531. alta_syncctrl syncload_ctrl_X58_Y5(
  58532. .Din(),
  58533. .Dout(SyncLoad_X58_Y5_VCC));
  58534. defparam syncload_ctrl_X58_Y5.coord_x = 17;
  58535. defparam syncload_ctrl_X58_Y5.coord_y = 6;
  58536. defparam syncload_ctrl_X58_Y5.coord_z = 1;
  58537. defparam syncload_ctrl_X58_Y5.SyncCtrlMux = 2'b01;
  58538. alta_syncctrl syncload_ctrl_X58_Y6(
  58539. .Din(),
  58540. .Dout(SyncLoad_X58_Y6_VCC));
  58541. defparam syncload_ctrl_X58_Y6.coord_x = 18;
  58542. defparam syncload_ctrl_X58_Y6.coord_y = 3;
  58543. defparam syncload_ctrl_X58_Y6.coord_z = 1;
  58544. defparam syncload_ctrl_X58_Y6.SyncCtrlMux = 2'b01;
  58545. alta_syncctrl syncload_ctrl_X58_Y7(
  58546. .Din(),
  58547. .Dout(SyncLoad_X58_Y7_VCC));
  58548. defparam syncload_ctrl_X58_Y7.coord_x = 17;
  58549. defparam syncload_ctrl_X58_Y7.coord_y = 5;
  58550. defparam syncload_ctrl_X58_Y7.coord_z = 1;
  58551. defparam syncload_ctrl_X58_Y7.SyncCtrlMux = 2'b01;
  58552. alta_syncctrl syncload_ctrl_X58_Y8(
  58553. .Din(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout ),
  58554. .Dout(\macro_inst|u_uart[1]|u_rx[0]|always6~1_combout__SyncLoad_X58_Y8_SIG ));
  58555. defparam syncload_ctrl_X58_Y8.coord_x = 20;
  58556. defparam syncload_ctrl_X58_Y8.coord_y = 8;
  58557. defparam syncload_ctrl_X58_Y8.coord_z = 1;
  58558. defparam syncload_ctrl_X58_Y8.SyncCtrlMux = 2'b10;
  58559. alta_syncctrl syncload_ctrl_X58_Y9(
  58560. .Din(),
  58561. .Dout(SyncLoad_X58_Y9_VCC));
  58562. defparam syncload_ctrl_X58_Y9.coord_x = 18;
  58563. defparam syncload_ctrl_X58_Y9.coord_y = 8;
  58564. defparam syncload_ctrl_X58_Y9.coord_z = 1;
  58565. defparam syncload_ctrl_X58_Y9.SyncCtrlMux = 2'b01;
  58566. alta_syncctrl syncload_ctrl_X59_Y1(
  58567. .Din(),
  58568. .Dout(SyncLoad_X59_Y1_VCC));
  58569. defparam syncload_ctrl_X59_Y1.coord_x = 9;
  58570. defparam syncload_ctrl_X59_Y1.coord_y = 1;
  58571. defparam syncload_ctrl_X59_Y1.coord_z = 1;
  58572. defparam syncload_ctrl_X59_Y1.SyncCtrlMux = 2'b01;
  58573. alta_syncctrl syncload_ctrl_X59_Y11(
  58574. .Din(),
  58575. .Dout(SyncLoad_X59_Y11_VCC));
  58576. defparam syncload_ctrl_X59_Y11.coord_x = 19;
  58577. defparam syncload_ctrl_X59_Y11.coord_y = 11;
  58578. defparam syncload_ctrl_X59_Y11.coord_z = 1;
  58579. defparam syncload_ctrl_X59_Y11.SyncCtrlMux = 2'b01;
  58580. alta_syncctrl syncload_ctrl_X59_Y12(
  58581. .Din(),
  58582. .Dout(SyncLoad_X59_Y12_VCC));
  58583. defparam syncload_ctrl_X59_Y12.coord_x = 20;
  58584. defparam syncload_ctrl_X59_Y12.coord_y = 11;
  58585. defparam syncload_ctrl_X59_Y12.coord_z = 1;
  58586. defparam syncload_ctrl_X59_Y12.SyncCtrlMux = 2'b01;
  58587. alta_syncctrl syncload_ctrl_X59_Y2(
  58588. .Din(),
  58589. .Dout(SyncLoad_X59_Y2_VCC));
  58590. defparam syncload_ctrl_X59_Y2.coord_x = 15;
  58591. defparam syncload_ctrl_X59_Y2.coord_y = 5;
  58592. defparam syncload_ctrl_X59_Y2.coord_z = 1;
  58593. defparam syncload_ctrl_X59_Y2.SyncCtrlMux = 2'b01;
  58594. alta_syncctrl syncload_ctrl_X59_Y3(
  58595. .Din(),
  58596. .Dout(SyncLoad_X59_Y3_VCC));
  58597. defparam syncload_ctrl_X59_Y3.coord_x = 16;
  58598. defparam syncload_ctrl_X59_Y3.coord_y = 4;
  58599. defparam syncload_ctrl_X59_Y3.coord_z = 1;
  58600. defparam syncload_ctrl_X59_Y3.SyncCtrlMux = 2'b01;
  58601. alta_syncctrl syncload_ctrl_X59_Y4(
  58602. .Din(),
  58603. .Dout(SyncLoad_X59_Y4_VCC));
  58604. defparam syncload_ctrl_X59_Y4.coord_x = 16;
  58605. defparam syncload_ctrl_X59_Y4.coord_y = 5;
  58606. defparam syncload_ctrl_X59_Y4.coord_z = 1;
  58607. defparam syncload_ctrl_X59_Y4.SyncCtrlMux = 2'b01;
  58608. alta_syncctrl syncload_ctrl_X59_Y5(
  58609. .Din(),
  58610. .Dout(SyncLoad_X59_Y5_VCC));
  58611. defparam syncload_ctrl_X59_Y5.coord_x = 16;
  58612. defparam syncload_ctrl_X59_Y5.coord_y = 6;
  58613. defparam syncload_ctrl_X59_Y5.coord_z = 1;
  58614. defparam syncload_ctrl_X59_Y5.SyncCtrlMux = 2'b01;
  58615. alta_syncctrl syncload_ctrl_X59_Y6(
  58616. .Din(),
  58617. .Dout(SyncLoad_X59_Y6_VCC));
  58618. defparam syncload_ctrl_X59_Y6.coord_x = 18;
  58619. defparam syncload_ctrl_X59_Y6.coord_y = 6;
  58620. defparam syncload_ctrl_X59_Y6.coord_z = 1;
  58621. defparam syncload_ctrl_X59_Y6.SyncCtrlMux = 2'b01;
  58622. alta_syncctrl syncload_ctrl_X59_Y7(
  58623. .Din(),
  58624. .Dout(SyncLoad_X59_Y7_VCC));
  58625. defparam syncload_ctrl_X59_Y7.coord_x = 17;
  58626. defparam syncload_ctrl_X59_Y7.coord_y = 7;
  58627. defparam syncload_ctrl_X59_Y7.coord_z = 1;
  58628. defparam syncload_ctrl_X59_Y7.SyncCtrlMux = 2'b01;
  58629. alta_syncctrl syncload_ctrl_X59_Y8(
  58630. .Din(),
  58631. .Dout(SyncLoad_X59_Y8_VCC));
  58632. defparam syncload_ctrl_X59_Y8.coord_x = 19;
  58633. defparam syncload_ctrl_X59_Y8.coord_y = 8;
  58634. defparam syncload_ctrl_X59_Y8.coord_z = 1;
  58635. defparam syncload_ctrl_X59_Y8.SyncCtrlMux = 2'b01;
  58636. alta_syncctrl syncload_ctrl_X60_Y1(
  58637. .Din(),
  58638. .Dout(SyncLoad_X60_Y1_VCC));
  58639. defparam syncload_ctrl_X60_Y1.coord_x = 11;
  58640. defparam syncload_ctrl_X60_Y1.coord_y = 1;
  58641. defparam syncload_ctrl_X60_Y1.coord_z = 1;
  58642. defparam syncload_ctrl_X60_Y1.SyncCtrlMux = 2'b01;
  58643. alta_syncctrl syncload_ctrl_X60_Y10(
  58644. .Din(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout ),
  58645. .Dout(\macro_inst|u_uart[1]|u_rx[3]|always6~1_combout__SyncLoad_X60_Y10_SIG ));
  58646. defparam syncload_ctrl_X60_Y10.coord_x = 20;
  58647. defparam syncload_ctrl_X60_Y10.coord_y = 9;
  58648. defparam syncload_ctrl_X60_Y10.coord_z = 1;
  58649. defparam syncload_ctrl_X60_Y10.SyncCtrlMux = 2'b10;
  58650. alta_syncctrl syncload_ctrl_X60_Y11(
  58651. .Din(),
  58652. .Dout(SyncLoad_X60_Y11_VCC));
  58653. defparam syncload_ctrl_X60_Y11.coord_x = 18;
  58654. defparam syncload_ctrl_X60_Y11.coord_y = 11;
  58655. defparam syncload_ctrl_X60_Y11.coord_z = 1;
  58656. defparam syncload_ctrl_X60_Y11.SyncCtrlMux = 2'b01;
  58657. alta_syncctrl syncload_ctrl_X60_Y12(
  58658. .Din(),
  58659. .Dout(SyncLoad_X60_Y12_VCC));
  58660. defparam syncload_ctrl_X60_Y12.coord_x = 15;
  58661. defparam syncload_ctrl_X60_Y12.coord_y = 12;
  58662. defparam syncload_ctrl_X60_Y12.coord_z = 1;
  58663. defparam syncload_ctrl_X60_Y12.SyncCtrlMux = 2'b01;
  58664. alta_syncctrl syncload_ctrl_X60_Y2(
  58665. .Din(),
  58666. .Dout(SyncLoad_X60_Y2_VCC));
  58667. defparam syncload_ctrl_X60_Y2.coord_x = 15;
  58668. defparam syncload_ctrl_X60_Y2.coord_y = 3;
  58669. defparam syncload_ctrl_X60_Y2.coord_z = 1;
  58670. defparam syncload_ctrl_X60_Y2.SyncCtrlMux = 2'b01;
  58671. alta_syncctrl syncload_ctrl_X60_Y4(
  58672. .Din(),
  58673. .Dout(SyncLoad_X60_Y4_VCC));
  58674. defparam syncload_ctrl_X60_Y4.coord_x = 16;
  58675. defparam syncload_ctrl_X60_Y4.coord_y = 7;
  58676. defparam syncload_ctrl_X60_Y4.coord_z = 1;
  58677. defparam syncload_ctrl_X60_Y4.SyncCtrlMux = 2'b01;
  58678. alta_syncctrl syncload_ctrl_X60_Y6(
  58679. .Din(),
  58680. .Dout(SyncLoad_X60_Y6_VCC));
  58681. defparam syncload_ctrl_X60_Y6.coord_x = 18;
  58682. defparam syncload_ctrl_X60_Y6.coord_y = 7;
  58683. defparam syncload_ctrl_X60_Y6.coord_z = 1;
  58684. defparam syncload_ctrl_X60_Y6.SyncCtrlMux = 2'b01;
  58685. alta_syncctrl syncload_ctrl_X60_Y7(
  58686. .Din(),
  58687. .Dout(SyncLoad_X60_Y7_VCC));
  58688. defparam syncload_ctrl_X60_Y7.coord_x = 18;
  58689. defparam syncload_ctrl_X60_Y7.coord_y = 9;
  58690. defparam syncload_ctrl_X60_Y7.coord_z = 1;
  58691. defparam syncload_ctrl_X60_Y7.SyncCtrlMux = 2'b01;
  58692. alta_syncctrl syncload_ctrl_X60_Y8(
  58693. .Din(),
  58694. .Dout(SyncLoad_X60_Y8_VCC));
  58695. defparam syncload_ctrl_X60_Y8.coord_x = 17;
  58696. defparam syncload_ctrl_X60_Y8.coord_y = 8;
  58697. defparam syncload_ctrl_X60_Y8.coord_z = 1;
  58698. defparam syncload_ctrl_X60_Y8.SyncCtrlMux = 2'b01;
  58699. alta_syncctrl syncload_ctrl_X60_Y9(
  58700. .Din(),
  58701. .Dout(SyncLoad_X60_Y9_VCC));
  58702. defparam syncload_ctrl_X60_Y9.coord_x = 18;
  58703. defparam syncload_ctrl_X60_Y9.coord_y = 10;
  58704. defparam syncload_ctrl_X60_Y9.coord_z = 1;
  58705. defparam syncload_ctrl_X60_Y9.SyncCtrlMux = 2'b01;
  58706. alta_syncctrl syncload_ctrl_X61_Y1(
  58707. .Din(),
  58708. .Dout(SyncLoad_X61_Y1_GND));
  58709. defparam syncload_ctrl_X61_Y1.coord_x = 8;
  58710. defparam syncload_ctrl_X61_Y1.coord_y = 2;
  58711. defparam syncload_ctrl_X61_Y1.coord_z = 1;
  58712. defparam syncload_ctrl_X61_Y1.SyncCtrlMux = 2'b00;
  58713. alta_syncctrl syncload_ctrl_X61_Y10(
  58714. .Din(),
  58715. .Dout(SyncLoad_X61_Y10_GND));
  58716. defparam syncload_ctrl_X61_Y10.coord_x = 17;
  58717. defparam syncload_ctrl_X61_Y10.coord_y = 10;
  58718. defparam syncload_ctrl_X61_Y10.coord_z = 1;
  58719. defparam syncload_ctrl_X61_Y10.SyncCtrlMux = 2'b00;
  58720. alta_syncctrl syncload_ctrl_X61_Y11(
  58721. .Din(),
  58722. .Dout(SyncLoad_X61_Y11_VCC));
  58723. defparam syncload_ctrl_X61_Y11.coord_x = 17;
  58724. defparam syncload_ctrl_X61_Y11.coord_y = 11;
  58725. defparam syncload_ctrl_X61_Y11.coord_z = 1;
  58726. defparam syncload_ctrl_X61_Y11.SyncCtrlMux = 2'b01;
  58727. alta_syncctrl syncload_ctrl_X61_Y12(
  58728. .Din(),
  58729. .Dout(SyncLoad_X61_Y12_VCC));
  58730. defparam syncload_ctrl_X61_Y12.coord_x = 14;
  58731. defparam syncload_ctrl_X61_Y12.coord_y = 8;
  58732. defparam syncload_ctrl_X61_Y12.coord_z = 1;
  58733. defparam syncload_ctrl_X61_Y12.SyncCtrlMux = 2'b01;
  58734. alta_syncctrl syncload_ctrl_X61_Y2(
  58735. .Din(),
  58736. .Dout(SyncLoad_X61_Y2_VCC));
  58737. defparam syncload_ctrl_X61_Y2.coord_x = 15;
  58738. defparam syncload_ctrl_X61_Y2.coord_y = 1;
  58739. defparam syncload_ctrl_X61_Y2.coord_z = 1;
  58740. defparam syncload_ctrl_X61_Y2.SyncCtrlMux = 2'b01;
  58741. alta_syncctrl syncload_ctrl_X61_Y4(
  58742. .Din(),
  58743. .Dout(SyncLoad_X61_Y4_VCC));
  58744. defparam syncload_ctrl_X61_Y4.coord_x = 14;
  58745. defparam syncload_ctrl_X61_Y4.coord_y = 9;
  58746. defparam syncload_ctrl_X61_Y4.coord_z = 1;
  58747. defparam syncload_ctrl_X61_Y4.SyncCtrlMux = 2'b01;
  58748. alta_syncctrl syncload_ctrl_X61_Y5(
  58749. .Din(),
  58750. .Dout(SyncLoad_X61_Y5_VCC));
  58751. defparam syncload_ctrl_X61_Y5.coord_x = 15;
  58752. defparam syncload_ctrl_X61_Y5.coord_y = 8;
  58753. defparam syncload_ctrl_X61_Y5.coord_z = 1;
  58754. defparam syncload_ctrl_X61_Y5.SyncCtrlMux = 2'b01;
  58755. alta_syncctrl syncload_ctrl_X61_Y6(
  58756. .Din(),
  58757. .Dout(SyncLoad_X61_Y6_VCC));
  58758. defparam syncload_ctrl_X61_Y6.coord_x = 16;
  58759. defparam syncload_ctrl_X61_Y6.coord_y = 8;
  58760. defparam syncload_ctrl_X61_Y6.coord_z = 1;
  58761. defparam syncload_ctrl_X61_Y6.SyncCtrlMux = 2'b01;
  58762. alta_syncctrl syncload_ctrl_X61_Y7(
  58763. .Din(),
  58764. .Dout(SyncLoad_X61_Y7_VCC));
  58765. defparam syncload_ctrl_X61_Y7.coord_x = 17;
  58766. defparam syncload_ctrl_X61_Y7.coord_y = 9;
  58767. defparam syncload_ctrl_X61_Y7.coord_z = 1;
  58768. defparam syncload_ctrl_X61_Y7.SyncCtrlMux = 2'b01;
  58769. alta_syncctrl syncload_ctrl_X61_Y8(
  58770. .Din(),
  58771. .Dout(SyncLoad_X61_Y8_GND));
  58772. defparam syncload_ctrl_X61_Y8.coord_x = 15;
  58773. defparam syncload_ctrl_X61_Y8.coord_y = 9;
  58774. defparam syncload_ctrl_X61_Y8.coord_z = 1;
  58775. defparam syncload_ctrl_X61_Y8.SyncCtrlMux = 2'b00;
  58776. alta_syncctrl syncload_ctrl_X61_Y9(
  58777. .Din(),
  58778. .Dout(SyncLoad_X61_Y9_VCC));
  58779. defparam syncload_ctrl_X61_Y9.coord_x = 15;
  58780. defparam syncload_ctrl_X61_Y9.coord_y = 10;
  58781. defparam syncload_ctrl_X61_Y9.coord_z = 1;
  58782. defparam syncload_ctrl_X61_Y9.SyncCtrlMux = 2'b01;
  58783. alta_syncctrl syncload_ctrl_X62_Y1(
  58784. .Din(),
  58785. .Dout(SyncLoad_X62_Y1_GND));
  58786. defparam syncload_ctrl_X62_Y1.coord_x = 8;
  58787. defparam syncload_ctrl_X62_Y1.coord_y = 1;
  58788. defparam syncload_ctrl_X62_Y1.coord_z = 1;
  58789. defparam syncload_ctrl_X62_Y1.SyncCtrlMux = 2'b00;
  58790. alta_syncctrl syncload_ctrl_X62_Y10(
  58791. .Din(),
  58792. .Dout(SyncLoad_X62_Y10_GND));
  58793. defparam syncload_ctrl_X62_Y10.coord_x = 16;
  58794. defparam syncload_ctrl_X62_Y10.coord_y = 11;
  58795. defparam syncload_ctrl_X62_Y10.coord_z = 1;
  58796. defparam syncload_ctrl_X62_Y10.SyncCtrlMux = 2'b00;
  58797. alta_syncctrl syncload_ctrl_X62_Y11(
  58798. .Din(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout ),
  58799. .Dout(\macro_inst|u_uart[1]|u_rx[5]|always6~1_combout__SyncLoad_X62_Y11_SIG ));
  58800. defparam syncload_ctrl_X62_Y11.coord_x = 18;
  58801. defparam syncload_ctrl_X62_Y11.coord_y = 12;
  58802. defparam syncload_ctrl_X62_Y11.coord_z = 1;
  58803. defparam syncload_ctrl_X62_Y11.SyncCtrlMux = 2'b10;
  58804. alta_syncctrl syncload_ctrl_X62_Y12(
  58805. .Din(),
  58806. .Dout(SyncLoad_X62_Y12_VCC));
  58807. defparam syncload_ctrl_X62_Y12.coord_x = 14;
  58808. defparam syncload_ctrl_X62_Y12.coord_y = 11;
  58809. defparam syncload_ctrl_X62_Y12.coord_z = 1;
  58810. defparam syncload_ctrl_X62_Y12.SyncCtrlMux = 2'b01;
  58811. alta_syncctrl syncload_ctrl_X62_Y2(
  58812. .Din(),
  58813. .Dout(SyncLoad_X62_Y2_GND));
  58814. defparam syncload_ctrl_X62_Y2.coord_x = 11;
  58815. defparam syncload_ctrl_X62_Y2.coord_y = 2;
  58816. defparam syncload_ctrl_X62_Y2.coord_z = 1;
  58817. defparam syncload_ctrl_X62_Y2.SyncCtrlMux = 2'b00;
  58818. alta_syncctrl syncload_ctrl_X62_Y3(
  58819. .Din(),
  58820. .Dout(SyncLoad_X62_Y3_GND));
  58821. defparam syncload_ctrl_X62_Y3.coord_x = 11;
  58822. defparam syncload_ctrl_X62_Y3.coord_y = 4;
  58823. defparam syncload_ctrl_X62_Y3.coord_z = 1;
  58824. defparam syncload_ctrl_X62_Y3.SyncCtrlMux = 2'b00;
  58825. alta_syncctrl syncload_ctrl_X62_Y4(
  58826. .Din(),
  58827. .Dout(SyncLoad_X62_Y4_VCC));
  58828. defparam syncload_ctrl_X62_Y4.coord_x = 20;
  58829. defparam syncload_ctrl_X62_Y4.coord_y = 1;
  58830. defparam syncload_ctrl_X62_Y4.coord_z = 1;
  58831. defparam syncload_ctrl_X62_Y4.SyncCtrlMux = 2'b01;
  58832. alta_syncctrl syncload_ctrl_X62_Y5(
  58833. .Din(),
  58834. .Dout(SyncLoad_X62_Y5_VCC));
  58835. defparam syncload_ctrl_X62_Y5.coord_x = 14;
  58836. defparam syncload_ctrl_X62_Y5.coord_y = 1;
  58837. defparam syncload_ctrl_X62_Y5.coord_z = 1;
  58838. defparam syncload_ctrl_X62_Y5.SyncCtrlMux = 2'b01;
  58839. alta_syncctrl syncload_ctrl_X62_Y6(
  58840. .Din(),
  58841. .Dout(SyncLoad_X62_Y6_VCC));
  58842. defparam syncload_ctrl_X62_Y6.coord_x = 15;
  58843. defparam syncload_ctrl_X62_Y6.coord_y = 11;
  58844. defparam syncload_ctrl_X62_Y6.coord_z = 1;
  58845. defparam syncload_ctrl_X62_Y6.SyncCtrlMux = 2'b01;
  58846. alta_syncctrl syncload_ctrl_X62_Y7(
  58847. .Din(),
  58848. .Dout(SyncLoad_X62_Y7_VCC));
  58849. defparam syncload_ctrl_X62_Y7.coord_x = 17;
  58850. defparam syncload_ctrl_X62_Y7.coord_y = 12;
  58851. defparam syncload_ctrl_X62_Y7.coord_z = 1;
  58852. defparam syncload_ctrl_X62_Y7.SyncCtrlMux = 2'b01;
  58853. alta_syncctrl syncload_ctrl_X62_Y8(
  58854. .Din(\macro_inst|u_uart[1]|u_baud|always0~0_combout ),
  58855. .Dout(\macro_inst|u_uart[1]|u_baud|always0~0_combout__SyncLoad_X62_Y8_SIG ));
  58856. defparam syncload_ctrl_X62_Y8.coord_x = 16;
  58857. defparam syncload_ctrl_X62_Y8.coord_y = 9;
  58858. defparam syncload_ctrl_X62_Y8.coord_z = 1;
  58859. defparam syncload_ctrl_X62_Y8.SyncCtrlMux = 2'b10;
  58860. alta_syncctrl syncload_ctrl_X62_Y9(
  58861. .Din(),
  58862. .Dout(SyncLoad_X62_Y9_GND));
  58863. defparam syncload_ctrl_X62_Y9.coord_x = 16;
  58864. defparam syncload_ctrl_X62_Y9.coord_y = 10;
  58865. defparam syncload_ctrl_X62_Y9.coord_z = 1;
  58866. defparam syncload_ctrl_X62_Y9.SyncCtrlMux = 2'b00;
  58867. alta_syncctrl syncreset_ctrl_X43_Y1(
  58868. .Din(),
  58869. .Dout(SyncReset_X43_Y1_GND));
  58870. defparam syncreset_ctrl_X43_Y1.coord_x = 5;
  58871. defparam syncreset_ctrl_X43_Y1.coord_y = 1;
  58872. defparam syncreset_ctrl_X43_Y1.coord_z = 0;
  58873. defparam syncreset_ctrl_X43_Y1.SyncCtrlMux = 2'b00;
  58874. alta_syncctrl syncreset_ctrl_X43_Y2(
  58875. .Din(),
  58876. .Dout(SyncReset_X43_Y2_GND));
  58877. defparam syncreset_ctrl_X43_Y2.coord_x = 2;
  58878. defparam syncreset_ctrl_X43_Y2.coord_y = 2;
  58879. defparam syncreset_ctrl_X43_Y2.coord_z = 0;
  58880. defparam syncreset_ctrl_X43_Y2.SyncCtrlMux = 2'b00;
  58881. alta_syncctrl syncreset_ctrl_X43_Y3(
  58882. .Din(),
  58883. .Dout(SyncReset_X43_Y3_GND));
  58884. defparam syncreset_ctrl_X43_Y3.coord_x = 1;
  58885. defparam syncreset_ctrl_X43_Y3.coord_y = 1;
  58886. defparam syncreset_ctrl_X43_Y3.coord_z = 0;
  58887. defparam syncreset_ctrl_X43_Y3.SyncCtrlMux = 2'b00;
  58888. alta_syncctrl syncreset_ctrl_X44_Y1(
  58889. .Din(),
  58890. .Dout(SyncReset_X44_Y1_GND));
  58891. defparam syncreset_ctrl_X44_Y1.coord_x = 4;
  58892. defparam syncreset_ctrl_X44_Y1.coord_y = 1;
  58893. defparam syncreset_ctrl_X44_Y1.coord_z = 0;
  58894. defparam syncreset_ctrl_X44_Y1.SyncCtrlMux = 2'b00;
  58895. alta_syncctrl syncreset_ctrl_X44_Y2(
  58896. .Din(),
  58897. .Dout(SyncReset_X44_Y2_GND));
  58898. defparam syncreset_ctrl_X44_Y2.coord_x = 3;
  58899. defparam syncreset_ctrl_X44_Y2.coord_y = 2;
  58900. defparam syncreset_ctrl_X44_Y2.coord_z = 0;
  58901. defparam syncreset_ctrl_X44_Y2.SyncCtrlMux = 2'b00;
  58902. alta_syncctrl syncreset_ctrl_X44_Y3(
  58903. .Din(),
  58904. .Dout(SyncReset_X44_Y3_GND));
  58905. defparam syncreset_ctrl_X44_Y3.coord_x = 3;
  58906. defparam syncreset_ctrl_X44_Y3.coord_y = 1;
  58907. defparam syncreset_ctrl_X44_Y3.coord_z = 0;
  58908. defparam syncreset_ctrl_X44_Y3.SyncCtrlMux = 2'b00;
  58909. alta_syncctrl syncreset_ctrl_X45_Y1(
  58910. .Din(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout ),
  58911. .Dout(\macro_inst|u_uart[0]|u_tx[5]|tx_stop~combout__SyncReset_X45_Y1_SIG ));
  58912. defparam syncreset_ctrl_X45_Y1.coord_x = 4;
  58913. defparam syncreset_ctrl_X45_Y1.coord_y = 3;
  58914. defparam syncreset_ctrl_X45_Y1.coord_z = 0;
  58915. defparam syncreset_ctrl_X45_Y1.SyncCtrlMux = 2'b10;
  58916. alta_syncctrl syncreset_ctrl_X45_Y2(
  58917. .Din(),
  58918. .Dout(SyncReset_X45_Y2_GND));
  58919. defparam syncreset_ctrl_X45_Y2.coord_x = 4;
  58920. defparam syncreset_ctrl_X45_Y2.coord_y = 2;
  58921. defparam syncreset_ctrl_X45_Y2.coord_z = 0;
  58922. defparam syncreset_ctrl_X45_Y2.SyncCtrlMux = 2'b00;
  58923. alta_syncctrl syncreset_ctrl_X45_Y3(
  58924. .Din(),
  58925. .Dout(SyncReset_X45_Y3_GND));
  58926. defparam syncreset_ctrl_X45_Y3.coord_x = 2;
  58927. defparam syncreset_ctrl_X45_Y3.coord_y = 1;
  58928. defparam syncreset_ctrl_X45_Y3.coord_z = 0;
  58929. defparam syncreset_ctrl_X45_Y3.SyncCtrlMux = 2'b00;
  58930. alta_syncctrl syncreset_ctrl_X46_Y1(
  58931. .Din(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout ),
  58932. .Dout(\macro_inst|u_uart[0]|u_tx[1]|tx_stop~combout__SyncReset_X46_Y1_SIG ));
  58933. defparam syncreset_ctrl_X46_Y1.coord_x = 3;
  58934. defparam syncreset_ctrl_X46_Y1.coord_y = 3;
  58935. defparam syncreset_ctrl_X46_Y1.coord_z = 0;
  58936. defparam syncreset_ctrl_X46_Y1.SyncCtrlMux = 2'b10;
  58937. alta_syncctrl syncreset_ctrl_X46_Y2(
  58938. .Din(),
  58939. .Dout(SyncReset_X46_Y2_GND));
  58940. defparam syncreset_ctrl_X46_Y2.coord_x = 7;
  58941. defparam syncreset_ctrl_X46_Y2.coord_y = 2;
  58942. defparam syncreset_ctrl_X46_Y2.coord_z = 0;
  58943. defparam syncreset_ctrl_X46_Y2.SyncCtrlMux = 2'b00;
  58944. alta_syncctrl syncreset_ctrl_X46_Y3(
  58945. .Din(),
  58946. .Dout(SyncReset_X46_Y3_GND));
  58947. defparam syncreset_ctrl_X46_Y3.coord_x = 6;
  58948. defparam syncreset_ctrl_X46_Y3.coord_y = 3;
  58949. defparam syncreset_ctrl_X46_Y3.coord_z = 0;
  58950. defparam syncreset_ctrl_X46_Y3.SyncCtrlMux = 2'b00;
  58951. alta_syncctrl syncreset_ctrl_X46_Y4(
  58952. .Din(),
  58953. .Dout(SyncReset_X46_Y4_GND));
  58954. defparam syncreset_ctrl_X46_Y4.coord_x = 17;
  58955. defparam syncreset_ctrl_X46_Y4.coord_y = 2;
  58956. defparam syncreset_ctrl_X46_Y4.coord_z = 0;
  58957. defparam syncreset_ctrl_X46_Y4.SyncCtrlMux = 2'b00;
  58958. alta_syncctrl syncreset_ctrl_X47_Y1(
  58959. .Din(),
  58960. .Dout(SyncReset_X47_Y1_GND));
  58961. defparam syncreset_ctrl_X47_Y1.coord_x = 2;
  58962. defparam syncreset_ctrl_X47_Y1.coord_y = 4;
  58963. defparam syncreset_ctrl_X47_Y1.coord_z = 0;
  58964. defparam syncreset_ctrl_X47_Y1.SyncCtrlMux = 2'b00;
  58965. alta_syncctrl syncreset_ctrl_X47_Y2(
  58966. .Din(),
  58967. .Dout(SyncReset_X47_Y2_GND));
  58968. defparam syncreset_ctrl_X47_Y2.coord_x = 4;
  58969. defparam syncreset_ctrl_X47_Y2.coord_y = 4;
  58970. defparam syncreset_ctrl_X47_Y2.coord_z = 0;
  58971. defparam syncreset_ctrl_X47_Y2.SyncCtrlMux = 2'b00;
  58972. alta_syncctrl syncreset_ctrl_X47_Y3(
  58973. .Din(),
  58974. .Dout(SyncReset_X47_Y3_GND));
  58975. defparam syncreset_ctrl_X47_Y3.coord_x = 7;
  58976. defparam syncreset_ctrl_X47_Y3.coord_y = 3;
  58977. defparam syncreset_ctrl_X47_Y3.coord_z = 0;
  58978. defparam syncreset_ctrl_X47_Y3.SyncCtrlMux = 2'b00;
  58979. alta_syncctrl syncreset_ctrl_X47_Y4(
  58980. .Din(),
  58981. .Dout(SyncReset_X47_Y4_GND));
  58982. defparam syncreset_ctrl_X47_Y4.coord_x = 10;
  58983. defparam syncreset_ctrl_X47_Y4.coord_y = 4;
  58984. defparam syncreset_ctrl_X47_Y4.coord_z = 0;
  58985. defparam syncreset_ctrl_X47_Y4.SyncCtrlMux = 2'b00;
  58986. alta_syncctrl syncreset_ctrl_X48_Y1(
  58987. .Din(),
  58988. .Dout(SyncReset_X48_Y1_GND));
  58989. defparam syncreset_ctrl_X48_Y1.coord_x = 3;
  58990. defparam syncreset_ctrl_X48_Y1.coord_y = 4;
  58991. defparam syncreset_ctrl_X48_Y1.coord_z = 0;
  58992. defparam syncreset_ctrl_X48_Y1.SyncCtrlMux = 2'b00;
  58993. alta_syncctrl syncreset_ctrl_X48_Y2(
  58994. .Din(),
  58995. .Dout(SyncReset_X48_Y2_GND));
  58996. defparam syncreset_ctrl_X48_Y2.coord_x = 6;
  58997. defparam syncreset_ctrl_X48_Y2.coord_y = 4;
  58998. defparam syncreset_ctrl_X48_Y2.coord_z = 0;
  58999. defparam syncreset_ctrl_X48_Y2.SyncCtrlMux = 2'b00;
  59000. alta_syncctrl syncreset_ctrl_X48_Y4(
  59001. .Din(),
  59002. .Dout(SyncReset_X48_Y4_GND));
  59003. defparam syncreset_ctrl_X48_Y4.coord_x = 1;
  59004. defparam syncreset_ctrl_X48_Y4.coord_y = 3;
  59005. defparam syncreset_ctrl_X48_Y4.coord_z = 0;
  59006. defparam syncreset_ctrl_X48_Y4.SyncCtrlMux = 2'b00;
  59007. alta_syncctrl syncreset_ctrl_X49_Y1(
  59008. .Din(),
  59009. .Dout(SyncReset_X49_Y1_GND));
  59010. defparam syncreset_ctrl_X49_Y1.coord_x = 6;
  59011. defparam syncreset_ctrl_X49_Y1.coord_y = 1;
  59012. defparam syncreset_ctrl_X49_Y1.coord_z = 0;
  59013. defparam syncreset_ctrl_X49_Y1.SyncCtrlMux = 2'b00;
  59014. alta_syncctrl syncreset_ctrl_X49_Y2(
  59015. .Din(),
  59016. .Dout(SyncReset_X49_Y2_GND));
  59017. defparam syncreset_ctrl_X49_Y2.coord_x = 7;
  59018. defparam syncreset_ctrl_X49_Y2.coord_y = 4;
  59019. defparam syncreset_ctrl_X49_Y2.coord_z = 0;
  59020. defparam syncreset_ctrl_X49_Y2.SyncCtrlMux = 2'b00;
  59021. alta_syncctrl syncreset_ctrl_X49_Y3(
  59022. .Din(),
  59023. .Dout(SyncReset_X49_Y3_GND));
  59024. defparam syncreset_ctrl_X49_Y3.coord_x = 6;
  59025. defparam syncreset_ctrl_X49_Y3.coord_y = 2;
  59026. defparam syncreset_ctrl_X49_Y3.coord_z = 0;
  59027. defparam syncreset_ctrl_X49_Y3.SyncCtrlMux = 2'b00;
  59028. alta_syncctrl syncreset_ctrl_X50_Y1(
  59029. .Din(),
  59030. .Dout(SyncReset_X50_Y1_GND));
  59031. defparam syncreset_ctrl_X50_Y1.coord_x = 7;
  59032. defparam syncreset_ctrl_X50_Y1.coord_y = 1;
  59033. defparam syncreset_ctrl_X50_Y1.coord_z = 0;
  59034. defparam syncreset_ctrl_X50_Y1.SyncCtrlMux = 2'b00;
  59035. alta_syncctrl syncreset_ctrl_X50_Y2(
  59036. .Din(),
  59037. .Dout(SyncReset_X50_Y2_GND));
  59038. defparam syncreset_ctrl_X50_Y2.coord_x = 14;
  59039. defparam syncreset_ctrl_X50_Y2.coord_y = 4;
  59040. defparam syncreset_ctrl_X50_Y2.coord_z = 0;
  59041. defparam syncreset_ctrl_X50_Y2.SyncCtrlMux = 2'b00;
  59042. alta_syncctrl syncreset_ctrl_X50_Y3(
  59043. .Din(),
  59044. .Dout(SyncReset_X50_Y3_GND));
  59045. defparam syncreset_ctrl_X50_Y3.coord_x = 16;
  59046. defparam syncreset_ctrl_X50_Y3.coord_y = 12;
  59047. defparam syncreset_ctrl_X50_Y3.coord_z = 0;
  59048. defparam syncreset_ctrl_X50_Y3.SyncCtrlMux = 2'b00;
  59049. alta_syncctrl syncreset_ctrl_X50_Y4(
  59050. .Din(),
  59051. .Dout(SyncReset_X50_Y4_GND));
  59052. defparam syncreset_ctrl_X50_Y4.coord_x = 8;
  59053. defparam syncreset_ctrl_X50_Y4.coord_y = 4;
  59054. defparam syncreset_ctrl_X50_Y4.coord_z = 0;
  59055. defparam syncreset_ctrl_X50_Y4.SyncCtrlMux = 2'b00;
  59056. alta_syncctrl syncreset_ctrl_X51_Y3(
  59057. .Din(\macro_inst|LessThan0~2_combout ),
  59058. .Dout(\macro_inst|LessThan0~2_combout__SyncReset_X51_Y3_SIG ));
  59059. defparam syncreset_ctrl_X51_Y3.coord_x = 5;
  59060. defparam syncreset_ctrl_X51_Y3.coord_y = 3;
  59061. defparam syncreset_ctrl_X51_Y3.coord_z = 0;
  59062. defparam syncreset_ctrl_X51_Y3.SyncCtrlMux = 2'b10;
  59063. alta_syncctrl syncreset_ctrl_X51_Y4(
  59064. .Din(\macro_inst|u_ahb2apb|paddr [7]),
  59065. .Dout(\macro_inst|u_ahb2apb|paddr[7]__SyncReset_X51_Y4_SIG ));
  59066. defparam syncreset_ctrl_X51_Y4.coord_x = 16;
  59067. defparam syncreset_ctrl_X51_Y4.coord_y = 3;
  59068. defparam syncreset_ctrl_X51_Y4.coord_z = 0;
  59069. defparam syncreset_ctrl_X51_Y4.SyncCtrlMux = 2'b10;
  59070. alta_syncctrl syncreset_ctrl_X52_Y1(
  59071. .Din(),
  59072. .Dout(SyncReset_X52_Y1_GND));
  59073. defparam syncreset_ctrl_X52_Y1.coord_x = 12;
  59074. defparam syncreset_ctrl_X52_Y1.coord_y = 4;
  59075. defparam syncreset_ctrl_X52_Y1.coord_z = 0;
  59076. defparam syncreset_ctrl_X52_Y1.SyncCtrlMux = 2'b00;
  59077. alta_syncctrl syncreset_ctrl_X52_Y2(
  59078. .Din(),
  59079. .Dout(SyncReset_X52_Y2_GND));
  59080. defparam syncreset_ctrl_X52_Y2.coord_x = 9;
  59081. defparam syncreset_ctrl_X52_Y2.coord_y = 3;
  59082. defparam syncreset_ctrl_X52_Y2.coord_z = 0;
  59083. defparam syncreset_ctrl_X52_Y2.SyncCtrlMux = 2'b00;
  59084. alta_syncctrl syncreset_ctrl_X52_Y3(
  59085. .Din(),
  59086. .Dout(SyncReset_X52_Y3_GND));
  59087. defparam syncreset_ctrl_X52_Y3.coord_x = 17;
  59088. defparam syncreset_ctrl_X52_Y3.coord_y = 1;
  59089. defparam syncreset_ctrl_X52_Y3.coord_z = 0;
  59090. defparam syncreset_ctrl_X52_Y3.SyncCtrlMux = 2'b00;
  59091. alta_syncctrl syncreset_ctrl_X52_Y4(
  59092. .Din(),
  59093. .Dout(SyncReset_X52_Y4_GND));
  59094. defparam syncreset_ctrl_X52_Y4.coord_x = 2;
  59095. defparam syncreset_ctrl_X52_Y4.coord_y = 3;
  59096. defparam syncreset_ctrl_X52_Y4.coord_z = 0;
  59097. defparam syncreset_ctrl_X52_Y4.SyncCtrlMux = 2'b00;
  59098. alta_syncctrl syncreset_ctrl_X53_Y1(
  59099. .Din(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout ),
  59100. .Dout(\macro_inst|u_uart[0]|u_tx[0]|tx_stop~combout__SyncReset_X53_Y1_SIG ));
  59101. defparam syncreset_ctrl_X53_Y1.coord_x = 9;
  59102. defparam syncreset_ctrl_X53_Y1.coord_y = 2;
  59103. defparam syncreset_ctrl_X53_Y1.coord_z = 0;
  59104. defparam syncreset_ctrl_X53_Y1.SyncCtrlMux = 2'b10;
  59105. alta_syncctrl syncreset_ctrl_X53_Y2(
  59106. .Din(),
  59107. .Dout(SyncReset_X53_Y2_GND));
  59108. defparam syncreset_ctrl_X53_Y2.coord_x = 11;
  59109. defparam syncreset_ctrl_X53_Y2.coord_y = 3;
  59110. defparam syncreset_ctrl_X53_Y2.coord_z = 0;
  59111. defparam syncreset_ctrl_X53_Y2.SyncCtrlMux = 2'b00;
  59112. alta_syncctrl syncreset_ctrl_X53_Y3(
  59113. .Din(),
  59114. .Dout(SyncReset_X53_Y3_GND));
  59115. defparam syncreset_ctrl_X53_Y3.coord_x = 14;
  59116. defparam syncreset_ctrl_X53_Y3.coord_y = 2;
  59117. defparam syncreset_ctrl_X53_Y3.coord_z = 0;
  59118. defparam syncreset_ctrl_X53_Y3.SyncCtrlMux = 2'b00;
  59119. alta_syncctrl syncreset_ctrl_X53_Y4(
  59120. .Din(),
  59121. .Dout(SyncReset_X53_Y4_GND));
  59122. defparam syncreset_ctrl_X53_Y4.coord_x = 18;
  59123. defparam syncreset_ctrl_X53_Y4.coord_y = 2;
  59124. defparam syncreset_ctrl_X53_Y4.coord_z = 0;
  59125. defparam syncreset_ctrl_X53_Y4.SyncCtrlMux = 2'b00;
  59126. alta_syncctrl syncreset_ctrl_X54_Y2(
  59127. .Din(),
  59128. .Dout(SyncReset_X54_Y2_GND));
  59129. defparam syncreset_ctrl_X54_Y2.coord_x = 14;
  59130. defparam syncreset_ctrl_X54_Y2.coord_y = 5;
  59131. defparam syncreset_ctrl_X54_Y2.coord_z = 0;
  59132. defparam syncreset_ctrl_X54_Y2.SyncCtrlMux = 2'b00;
  59133. alta_syncctrl syncreset_ctrl_X54_Y3(
  59134. .Din(),
  59135. .Dout(SyncReset_X54_Y3_GND));
  59136. defparam syncreset_ctrl_X54_Y3.coord_x = 14;
  59137. defparam syncreset_ctrl_X54_Y3.coord_y = 3;
  59138. defparam syncreset_ctrl_X54_Y3.coord_z = 0;
  59139. defparam syncreset_ctrl_X54_Y3.SyncCtrlMux = 2'b00;
  59140. alta_syncctrl syncreset_ctrl_X56_Y1(
  59141. .Din(),
  59142. .Dout(SyncReset_X56_Y1_GND));
  59143. defparam syncreset_ctrl_X56_Y1.coord_x = 10;
  59144. defparam syncreset_ctrl_X56_Y1.coord_y = 3;
  59145. defparam syncreset_ctrl_X56_Y1.coord_z = 0;
  59146. defparam syncreset_ctrl_X56_Y1.SyncCtrlMux = 2'b00;
  59147. alta_syncctrl syncreset_ctrl_X56_Y10(
  59148. .Din(),
  59149. .Dout(SyncReset_X56_Y10_GND));
  59150. defparam syncreset_ctrl_X56_Y10.coord_x = 14;
  59151. defparam syncreset_ctrl_X56_Y10.coord_y = 12;
  59152. defparam syncreset_ctrl_X56_Y10.coord_z = 0;
  59153. defparam syncreset_ctrl_X56_Y10.SyncCtrlMux = 2'b00;
  59154. alta_syncctrl syncreset_ctrl_X56_Y11(
  59155. .Din(),
  59156. .Dout(SyncReset_X56_Y11_GND));
  59157. defparam syncreset_ctrl_X56_Y11.coord_x = 20;
  59158. defparam syncreset_ctrl_X56_Y11.coord_y = 6;
  59159. defparam syncreset_ctrl_X56_Y11.coord_z = 0;
  59160. defparam syncreset_ctrl_X56_Y11.SyncCtrlMux = 2'b00;
  59161. alta_syncctrl syncreset_ctrl_X56_Y12(
  59162. .Din(),
  59163. .Dout(SyncReset_X56_Y12_GND));
  59164. defparam syncreset_ctrl_X56_Y12.coord_x = 14;
  59165. defparam syncreset_ctrl_X56_Y12.coord_y = 10;
  59166. defparam syncreset_ctrl_X56_Y12.coord_z = 0;
  59167. defparam syncreset_ctrl_X56_Y12.SyncCtrlMux = 2'b00;
  59168. alta_syncctrl syncreset_ctrl_X56_Y2(
  59169. .Din(),
  59170. .Dout(SyncReset_X56_Y2_GND));
  59171. defparam syncreset_ctrl_X56_Y2.coord_x = 12;
  59172. defparam syncreset_ctrl_X56_Y2.coord_y = 1;
  59173. defparam syncreset_ctrl_X56_Y2.coord_z = 0;
  59174. defparam syncreset_ctrl_X56_Y2.SyncCtrlMux = 2'b00;
  59175. alta_syncctrl syncreset_ctrl_X56_Y3(
  59176. .Din(),
  59177. .Dout(SyncReset_X56_Y3_GND));
  59178. defparam syncreset_ctrl_X56_Y3.coord_x = 15;
  59179. defparam syncreset_ctrl_X56_Y3.coord_y = 2;
  59180. defparam syncreset_ctrl_X56_Y3.coord_z = 0;
  59181. defparam syncreset_ctrl_X56_Y3.SyncCtrlMux = 2'b00;
  59182. alta_syncctrl syncreset_ctrl_X56_Y4(
  59183. .Din(),
  59184. .Dout(SyncReset_X56_Y4_GND));
  59185. defparam syncreset_ctrl_X56_Y4.coord_x = 18;
  59186. defparam syncreset_ctrl_X56_Y4.coord_y = 5;
  59187. defparam syncreset_ctrl_X56_Y4.coord_z = 0;
  59188. defparam syncreset_ctrl_X56_Y4.SyncCtrlMux = 2'b00;
  59189. alta_syncctrl syncreset_ctrl_X56_Y5(
  59190. .Din(),
  59191. .Dout(SyncReset_X56_Y5_GND));
  59192. defparam syncreset_ctrl_X56_Y5.coord_x = 17;
  59193. defparam syncreset_ctrl_X56_Y5.coord_y = 3;
  59194. defparam syncreset_ctrl_X56_Y5.coord_z = 0;
  59195. defparam syncreset_ctrl_X56_Y5.SyncCtrlMux = 2'b00;
  59196. alta_syncctrl syncreset_ctrl_X56_Y6(
  59197. .Din(),
  59198. .Dout(SyncReset_X56_Y6_GND));
  59199. defparam syncreset_ctrl_X56_Y6.coord_x = 18;
  59200. defparam syncreset_ctrl_X56_Y6.coord_y = 1;
  59201. defparam syncreset_ctrl_X56_Y6.coord_z = 0;
  59202. defparam syncreset_ctrl_X56_Y6.SyncCtrlMux = 2'b00;
  59203. alta_syncctrl syncreset_ctrl_X56_Y8(
  59204. .Din(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout ),
  59205. .Dout(\macro_inst|u_uart[1]|u_tx[1]|tx_stop~combout__SyncReset_X56_Y8_SIG ));
  59206. defparam syncreset_ctrl_X56_Y8.coord_x = 19;
  59207. defparam syncreset_ctrl_X56_Y8.coord_y = 7;
  59208. defparam syncreset_ctrl_X56_Y8.coord_z = 0;
  59209. defparam syncreset_ctrl_X56_Y8.SyncCtrlMux = 2'b10;
  59210. alta_syncctrl syncreset_ctrl_X56_Y9(
  59211. .Din(),
  59212. .Dout(SyncReset_X56_Y9_GND));
  59213. defparam syncreset_ctrl_X56_Y9.coord_x = 19;
  59214. defparam syncreset_ctrl_X56_Y9.coord_y = 3;
  59215. defparam syncreset_ctrl_X56_Y9.coord_z = 0;
  59216. defparam syncreset_ctrl_X56_Y9.SyncCtrlMux = 2'b00;
  59217. alta_syncctrl syncreset_ctrl_X57_Y1(
  59218. .Din(),
  59219. .Dout(SyncReset_X57_Y1_GND));
  59220. defparam syncreset_ctrl_X57_Y1.coord_x = 12;
  59221. defparam syncreset_ctrl_X57_Y1.coord_y = 2;
  59222. defparam syncreset_ctrl_X57_Y1.coord_z = 0;
  59223. defparam syncreset_ctrl_X57_Y1.SyncCtrlMux = 2'b00;
  59224. alta_syncctrl syncreset_ctrl_X57_Y10(
  59225. .Din(),
  59226. .Dout(SyncReset_X57_Y10_GND));
  59227. defparam syncreset_ctrl_X57_Y10.coord_x = 19;
  59228. defparam syncreset_ctrl_X57_Y10.coord_y = 12;
  59229. defparam syncreset_ctrl_X57_Y10.coord_z = 0;
  59230. defparam syncreset_ctrl_X57_Y10.SyncCtrlMux = 2'b00;
  59231. alta_syncctrl syncreset_ctrl_X57_Y11(
  59232. .Din(),
  59233. .Dout(SyncReset_X57_Y11_GND));
  59234. defparam syncreset_ctrl_X57_Y11.coord_x = 20;
  59235. defparam syncreset_ctrl_X57_Y11.coord_y = 5;
  59236. defparam syncreset_ctrl_X57_Y11.coord_z = 0;
  59237. defparam syncreset_ctrl_X57_Y11.SyncCtrlMux = 2'b00;
  59238. alta_syncctrl syncreset_ctrl_X57_Y12(
  59239. .Din(),
  59240. .Dout(SyncReset_X57_Y12_GND));
  59241. defparam syncreset_ctrl_X57_Y12.coord_x = 20;
  59242. defparam syncreset_ctrl_X57_Y12.coord_y = 4;
  59243. defparam syncreset_ctrl_X57_Y12.coord_z = 0;
  59244. defparam syncreset_ctrl_X57_Y12.SyncCtrlMux = 2'b00;
  59245. alta_syncctrl syncreset_ctrl_X57_Y2(
  59246. .Din(),
  59247. .Dout(SyncReset_X57_Y2_GND));
  59248. defparam syncreset_ctrl_X57_Y2.coord_x = 12;
  59249. defparam syncreset_ctrl_X57_Y2.coord_y = 3;
  59250. defparam syncreset_ctrl_X57_Y2.coord_z = 0;
  59251. defparam syncreset_ctrl_X57_Y2.SyncCtrlMux = 2'b00;
  59252. alta_syncctrl syncreset_ctrl_X57_Y3(
  59253. .Din(),
  59254. .Dout(SyncReset_X57_Y3_GND));
  59255. defparam syncreset_ctrl_X57_Y3.coord_x = 16;
  59256. defparam syncreset_ctrl_X57_Y3.coord_y = 1;
  59257. defparam syncreset_ctrl_X57_Y3.coord_z = 0;
  59258. defparam syncreset_ctrl_X57_Y3.SyncCtrlMux = 2'b00;
  59259. alta_syncctrl syncreset_ctrl_X57_Y4(
  59260. .Din(),
  59261. .Dout(SyncReset_X57_Y4_GND));
  59262. defparam syncreset_ctrl_X57_Y4.coord_x = 19;
  59263. defparam syncreset_ctrl_X57_Y4.coord_y = 5;
  59264. defparam syncreset_ctrl_X57_Y4.coord_z = 0;
  59265. defparam syncreset_ctrl_X57_Y4.SyncCtrlMux = 2'b00;
  59266. alta_syncctrl syncreset_ctrl_X57_Y6(
  59267. .Din(),
  59268. .Dout(SyncReset_X57_Y6_GND));
  59269. defparam syncreset_ctrl_X57_Y6.coord_x = 19;
  59270. defparam syncreset_ctrl_X57_Y6.coord_y = 1;
  59271. defparam syncreset_ctrl_X57_Y6.coord_z = 0;
  59272. defparam syncreset_ctrl_X57_Y6.SyncCtrlMux = 2'b00;
  59273. alta_syncctrl syncreset_ctrl_X57_Y7(
  59274. .Din(),
  59275. .Dout(SyncReset_X57_Y7_GND));
  59276. defparam syncreset_ctrl_X57_Y7.coord_x = 18;
  59277. defparam syncreset_ctrl_X57_Y7.coord_y = 4;
  59278. defparam syncreset_ctrl_X57_Y7.coord_z = 0;
  59279. defparam syncreset_ctrl_X57_Y7.SyncCtrlMux = 2'b00;
  59280. alta_syncctrl syncreset_ctrl_X57_Y8(
  59281. .Din(),
  59282. .Dout(SyncReset_X57_Y8_GND));
  59283. defparam syncreset_ctrl_X57_Y8.coord_x = 19;
  59284. defparam syncreset_ctrl_X57_Y8.coord_y = 6;
  59285. defparam syncreset_ctrl_X57_Y8.coord_z = 0;
  59286. defparam syncreset_ctrl_X57_Y8.SyncCtrlMux = 2'b00;
  59287. alta_syncctrl syncreset_ctrl_X57_Y9(
  59288. .Din(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout ),
  59289. .Dout(\macro_inst|u_uart[1]|u_tx[0]|tx_stop~combout__SyncReset_X57_Y9_SIG ));
  59290. defparam syncreset_ctrl_X57_Y9.coord_x = 20;
  59291. defparam syncreset_ctrl_X57_Y9.coord_y = 3;
  59292. defparam syncreset_ctrl_X57_Y9.coord_z = 0;
  59293. defparam syncreset_ctrl_X57_Y9.SyncCtrlMux = 2'b10;
  59294. alta_syncctrl syncreset_ctrl_X58_Y1(
  59295. .Din(),
  59296. .Dout(SyncReset_X58_Y1_GND));
  59297. defparam syncreset_ctrl_X58_Y1.coord_x = 10;
  59298. defparam syncreset_ctrl_X58_Y1.coord_y = 1;
  59299. defparam syncreset_ctrl_X58_Y1.coord_z = 0;
  59300. defparam syncreset_ctrl_X58_Y1.SyncCtrlMux = 2'b00;
  59301. alta_syncctrl syncreset_ctrl_X58_Y10(
  59302. .Din(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout ),
  59303. .Dout(\macro_inst|u_uart[1]|u_tx[2]|tx_stop~combout__SyncReset_X58_Y10_SIG ));
  59304. defparam syncreset_ctrl_X58_Y10.coord_x = 20;
  59305. defparam syncreset_ctrl_X58_Y10.coord_y = 12;
  59306. defparam syncreset_ctrl_X58_Y10.coord_z = 0;
  59307. defparam syncreset_ctrl_X58_Y10.SyncCtrlMux = 2'b10;
  59308. alta_syncctrl syncreset_ctrl_X58_Y11(
  59309. .Din(),
  59310. .Dout(SyncReset_X58_Y11_GND));
  59311. defparam syncreset_ctrl_X58_Y11.coord_x = 20;
  59312. defparam syncreset_ctrl_X58_Y11.coord_y = 7;
  59313. defparam syncreset_ctrl_X58_Y11.coord_z = 0;
  59314. defparam syncreset_ctrl_X58_Y11.SyncCtrlMux = 2'b00;
  59315. alta_syncctrl syncreset_ctrl_X58_Y12(
  59316. .Din(),
  59317. .Dout(SyncReset_X58_Y12_GND));
  59318. defparam syncreset_ctrl_X58_Y12.coord_x = 20;
  59319. defparam syncreset_ctrl_X58_Y12.coord_y = 10;
  59320. defparam syncreset_ctrl_X58_Y12.coord_z = 0;
  59321. defparam syncreset_ctrl_X58_Y12.SyncCtrlMux = 2'b00;
  59322. alta_syncctrl syncreset_ctrl_X58_Y2(
  59323. .Din(),
  59324. .Dout(SyncReset_X58_Y2_GND));
  59325. defparam syncreset_ctrl_X58_Y2.coord_x = 15;
  59326. defparam syncreset_ctrl_X58_Y2.coord_y = 4;
  59327. defparam syncreset_ctrl_X58_Y2.coord_z = 0;
  59328. defparam syncreset_ctrl_X58_Y2.SyncCtrlMux = 2'b00;
  59329. alta_syncctrl syncreset_ctrl_X58_Y3(
  59330. .Din(),
  59331. .Dout(SyncReset_X58_Y3_GND));
  59332. defparam syncreset_ctrl_X58_Y3.coord_x = 16;
  59333. defparam syncreset_ctrl_X58_Y3.coord_y = 2;
  59334. defparam syncreset_ctrl_X58_Y3.coord_z = 0;
  59335. defparam syncreset_ctrl_X58_Y3.SyncCtrlMux = 2'b00;
  59336. alta_syncctrl syncreset_ctrl_X58_Y4(
  59337. .Din(),
  59338. .Dout(SyncReset_X58_Y4_GND));
  59339. defparam syncreset_ctrl_X58_Y4.coord_x = 17;
  59340. defparam syncreset_ctrl_X58_Y4.coord_y = 4;
  59341. defparam syncreset_ctrl_X58_Y4.coord_z = 0;
  59342. defparam syncreset_ctrl_X58_Y4.SyncCtrlMux = 2'b00;
  59343. alta_syncctrl syncreset_ctrl_X58_Y5(
  59344. .Din(),
  59345. .Dout(SyncReset_X58_Y5_GND));
  59346. defparam syncreset_ctrl_X58_Y5.coord_x = 17;
  59347. defparam syncreset_ctrl_X58_Y5.coord_y = 6;
  59348. defparam syncreset_ctrl_X58_Y5.coord_z = 0;
  59349. defparam syncreset_ctrl_X58_Y5.SyncCtrlMux = 2'b00;
  59350. alta_syncctrl syncreset_ctrl_X58_Y6(
  59351. .Din(),
  59352. .Dout(SyncReset_X58_Y6_GND));
  59353. defparam syncreset_ctrl_X58_Y6.coord_x = 18;
  59354. defparam syncreset_ctrl_X58_Y6.coord_y = 3;
  59355. defparam syncreset_ctrl_X58_Y6.coord_z = 0;
  59356. defparam syncreset_ctrl_X58_Y6.SyncCtrlMux = 2'b00;
  59357. alta_syncctrl syncreset_ctrl_X58_Y7(
  59358. .Din(),
  59359. .Dout(SyncReset_X58_Y7_GND));
  59360. defparam syncreset_ctrl_X58_Y7.coord_x = 17;
  59361. defparam syncreset_ctrl_X58_Y7.coord_y = 5;
  59362. defparam syncreset_ctrl_X58_Y7.coord_z = 0;
  59363. defparam syncreset_ctrl_X58_Y7.SyncCtrlMux = 2'b00;
  59364. alta_syncctrl syncreset_ctrl_X58_Y8(
  59365. .Din(),
  59366. .Dout(SyncReset_X58_Y8_GND));
  59367. defparam syncreset_ctrl_X58_Y8.coord_x = 20;
  59368. defparam syncreset_ctrl_X58_Y8.coord_y = 8;
  59369. defparam syncreset_ctrl_X58_Y8.coord_z = 0;
  59370. defparam syncreset_ctrl_X58_Y8.SyncCtrlMux = 2'b00;
  59371. alta_syncctrl syncreset_ctrl_X58_Y9(
  59372. .Din(),
  59373. .Dout(SyncReset_X58_Y9_GND));
  59374. defparam syncreset_ctrl_X58_Y9.coord_x = 18;
  59375. defparam syncreset_ctrl_X58_Y9.coord_y = 8;
  59376. defparam syncreset_ctrl_X58_Y9.coord_z = 0;
  59377. defparam syncreset_ctrl_X58_Y9.SyncCtrlMux = 2'b00;
  59378. alta_syncctrl syncreset_ctrl_X59_Y1(
  59379. .Din(),
  59380. .Dout(SyncReset_X59_Y1_GND));
  59381. defparam syncreset_ctrl_X59_Y1.coord_x = 9;
  59382. defparam syncreset_ctrl_X59_Y1.coord_y = 1;
  59383. defparam syncreset_ctrl_X59_Y1.coord_z = 0;
  59384. defparam syncreset_ctrl_X59_Y1.SyncCtrlMux = 2'b00;
  59385. alta_syncctrl syncreset_ctrl_X59_Y11(
  59386. .Din(),
  59387. .Dout(SyncReset_X59_Y11_GND));
  59388. defparam syncreset_ctrl_X59_Y11.coord_x = 19;
  59389. defparam syncreset_ctrl_X59_Y11.coord_y = 11;
  59390. defparam syncreset_ctrl_X59_Y11.coord_z = 0;
  59391. defparam syncreset_ctrl_X59_Y11.SyncCtrlMux = 2'b00;
  59392. alta_syncctrl syncreset_ctrl_X59_Y12(
  59393. .Din(),
  59394. .Dout(SyncReset_X59_Y12_GND));
  59395. defparam syncreset_ctrl_X59_Y12.coord_x = 20;
  59396. defparam syncreset_ctrl_X59_Y12.coord_y = 11;
  59397. defparam syncreset_ctrl_X59_Y12.coord_z = 0;
  59398. defparam syncreset_ctrl_X59_Y12.SyncCtrlMux = 2'b00;
  59399. alta_syncctrl syncreset_ctrl_X59_Y2(
  59400. .Din(),
  59401. .Dout(SyncReset_X59_Y2_GND));
  59402. defparam syncreset_ctrl_X59_Y2.coord_x = 15;
  59403. defparam syncreset_ctrl_X59_Y2.coord_y = 5;
  59404. defparam syncreset_ctrl_X59_Y2.coord_z = 0;
  59405. defparam syncreset_ctrl_X59_Y2.SyncCtrlMux = 2'b00;
  59406. alta_syncctrl syncreset_ctrl_X59_Y3(
  59407. .Din(),
  59408. .Dout(SyncReset_X59_Y3_GND));
  59409. defparam syncreset_ctrl_X59_Y3.coord_x = 16;
  59410. defparam syncreset_ctrl_X59_Y3.coord_y = 4;
  59411. defparam syncreset_ctrl_X59_Y3.coord_z = 0;
  59412. defparam syncreset_ctrl_X59_Y3.SyncCtrlMux = 2'b00;
  59413. alta_syncctrl syncreset_ctrl_X59_Y4(
  59414. .Din(),
  59415. .Dout(SyncReset_X59_Y4_GND));
  59416. defparam syncreset_ctrl_X59_Y4.coord_x = 16;
  59417. defparam syncreset_ctrl_X59_Y4.coord_y = 5;
  59418. defparam syncreset_ctrl_X59_Y4.coord_z = 0;
  59419. defparam syncreset_ctrl_X59_Y4.SyncCtrlMux = 2'b00;
  59420. alta_syncctrl syncreset_ctrl_X59_Y5(
  59421. .Din(),
  59422. .Dout(SyncReset_X59_Y5_GND));
  59423. defparam syncreset_ctrl_X59_Y5.coord_x = 16;
  59424. defparam syncreset_ctrl_X59_Y5.coord_y = 6;
  59425. defparam syncreset_ctrl_X59_Y5.coord_z = 0;
  59426. defparam syncreset_ctrl_X59_Y5.SyncCtrlMux = 2'b00;
  59427. alta_syncctrl syncreset_ctrl_X59_Y6(
  59428. .Din(),
  59429. .Dout(SyncReset_X59_Y6_GND));
  59430. defparam syncreset_ctrl_X59_Y6.coord_x = 18;
  59431. defparam syncreset_ctrl_X59_Y6.coord_y = 6;
  59432. defparam syncreset_ctrl_X59_Y6.coord_z = 0;
  59433. defparam syncreset_ctrl_X59_Y6.SyncCtrlMux = 2'b00;
  59434. alta_syncctrl syncreset_ctrl_X59_Y7(
  59435. .Din(),
  59436. .Dout(SyncReset_X59_Y7_GND));
  59437. defparam syncreset_ctrl_X59_Y7.coord_x = 17;
  59438. defparam syncreset_ctrl_X59_Y7.coord_y = 7;
  59439. defparam syncreset_ctrl_X59_Y7.coord_z = 0;
  59440. defparam syncreset_ctrl_X59_Y7.SyncCtrlMux = 2'b00;
  59441. alta_syncctrl syncreset_ctrl_X59_Y8(
  59442. .Din(),
  59443. .Dout(SyncReset_X59_Y8_GND));
  59444. defparam syncreset_ctrl_X59_Y8.coord_x = 19;
  59445. defparam syncreset_ctrl_X59_Y8.coord_y = 8;
  59446. defparam syncreset_ctrl_X59_Y8.coord_z = 0;
  59447. defparam syncreset_ctrl_X59_Y8.SyncCtrlMux = 2'b00;
  59448. alta_syncctrl syncreset_ctrl_X60_Y1(
  59449. .Din(),
  59450. .Dout(SyncReset_X60_Y1_GND));
  59451. defparam syncreset_ctrl_X60_Y1.coord_x = 11;
  59452. defparam syncreset_ctrl_X60_Y1.coord_y = 1;
  59453. defparam syncreset_ctrl_X60_Y1.coord_z = 0;
  59454. defparam syncreset_ctrl_X60_Y1.SyncCtrlMux = 2'b00;
  59455. alta_syncctrl syncreset_ctrl_X60_Y10(
  59456. .Din(),
  59457. .Dout(SyncReset_X60_Y10_GND));
  59458. defparam syncreset_ctrl_X60_Y10.coord_x = 20;
  59459. defparam syncreset_ctrl_X60_Y10.coord_y = 9;
  59460. defparam syncreset_ctrl_X60_Y10.coord_z = 0;
  59461. defparam syncreset_ctrl_X60_Y10.SyncCtrlMux = 2'b00;
  59462. alta_syncctrl syncreset_ctrl_X60_Y11(
  59463. .Din(),
  59464. .Dout(SyncReset_X60_Y11_GND));
  59465. defparam syncreset_ctrl_X60_Y11.coord_x = 18;
  59466. defparam syncreset_ctrl_X60_Y11.coord_y = 11;
  59467. defparam syncreset_ctrl_X60_Y11.coord_z = 0;
  59468. defparam syncreset_ctrl_X60_Y11.SyncCtrlMux = 2'b00;
  59469. alta_syncctrl syncreset_ctrl_X60_Y12(
  59470. .Din(),
  59471. .Dout(SyncReset_X60_Y12_GND));
  59472. defparam syncreset_ctrl_X60_Y12.coord_x = 15;
  59473. defparam syncreset_ctrl_X60_Y12.coord_y = 12;
  59474. defparam syncreset_ctrl_X60_Y12.coord_z = 0;
  59475. defparam syncreset_ctrl_X60_Y12.SyncCtrlMux = 2'b00;
  59476. alta_syncctrl syncreset_ctrl_X60_Y2(
  59477. .Din(),
  59478. .Dout(SyncReset_X60_Y2_GND));
  59479. defparam syncreset_ctrl_X60_Y2.coord_x = 15;
  59480. defparam syncreset_ctrl_X60_Y2.coord_y = 3;
  59481. defparam syncreset_ctrl_X60_Y2.coord_z = 0;
  59482. defparam syncreset_ctrl_X60_Y2.SyncCtrlMux = 2'b00;
  59483. alta_syncctrl syncreset_ctrl_X60_Y4(
  59484. .Din(),
  59485. .Dout(SyncReset_X60_Y4_GND));
  59486. defparam syncreset_ctrl_X60_Y4.coord_x = 16;
  59487. defparam syncreset_ctrl_X60_Y4.coord_y = 7;
  59488. defparam syncreset_ctrl_X60_Y4.coord_z = 0;
  59489. defparam syncreset_ctrl_X60_Y4.SyncCtrlMux = 2'b00;
  59490. alta_syncctrl syncreset_ctrl_X60_Y6(
  59491. .Din(),
  59492. .Dout(SyncReset_X60_Y6_GND));
  59493. defparam syncreset_ctrl_X60_Y6.coord_x = 18;
  59494. defparam syncreset_ctrl_X60_Y6.coord_y = 7;
  59495. defparam syncreset_ctrl_X60_Y6.coord_z = 0;
  59496. defparam syncreset_ctrl_X60_Y6.SyncCtrlMux = 2'b00;
  59497. alta_syncctrl syncreset_ctrl_X60_Y7(
  59498. .Din(),
  59499. .Dout(SyncReset_X60_Y7_GND));
  59500. defparam syncreset_ctrl_X60_Y7.coord_x = 18;
  59501. defparam syncreset_ctrl_X60_Y7.coord_y = 9;
  59502. defparam syncreset_ctrl_X60_Y7.coord_z = 0;
  59503. defparam syncreset_ctrl_X60_Y7.SyncCtrlMux = 2'b00;
  59504. alta_syncctrl syncreset_ctrl_X60_Y8(
  59505. .Din(),
  59506. .Dout(SyncReset_X60_Y8_GND));
  59507. defparam syncreset_ctrl_X60_Y8.coord_x = 17;
  59508. defparam syncreset_ctrl_X60_Y8.coord_y = 8;
  59509. defparam syncreset_ctrl_X60_Y8.coord_z = 0;
  59510. defparam syncreset_ctrl_X60_Y8.SyncCtrlMux = 2'b00;
  59511. alta_syncctrl syncreset_ctrl_X60_Y9(
  59512. .Din(),
  59513. .Dout(SyncReset_X60_Y9_GND));
  59514. defparam syncreset_ctrl_X60_Y9.coord_x = 18;
  59515. defparam syncreset_ctrl_X60_Y9.coord_y = 10;
  59516. defparam syncreset_ctrl_X60_Y9.coord_z = 0;
  59517. defparam syncreset_ctrl_X60_Y9.SyncCtrlMux = 2'b00;
  59518. alta_syncctrl syncreset_ctrl_X61_Y1(
  59519. .Din(\macro_inst|u_uart[0]|u_regs|uart_en~q ),
  59520. .Dout(\macro_inst|u_uart[0]|u_regs|uart_en~q__SyncReset_X61_Y1_INV ));
  59521. defparam syncreset_ctrl_X61_Y1.coord_x = 8;
  59522. defparam syncreset_ctrl_X61_Y1.coord_y = 2;
  59523. defparam syncreset_ctrl_X61_Y1.coord_z = 0;
  59524. defparam syncreset_ctrl_X61_Y1.SyncCtrlMux = 2'b11;
  59525. alta_syncctrl syncreset_ctrl_X61_Y10(
  59526. .Din(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout ),
  59527. .Dout(\macro_inst|u_uart[1]|u_tx[5]|tx_stop~combout__SyncReset_X61_Y10_SIG ));
  59528. defparam syncreset_ctrl_X61_Y10.coord_x = 17;
  59529. defparam syncreset_ctrl_X61_Y10.coord_y = 10;
  59530. defparam syncreset_ctrl_X61_Y10.coord_z = 0;
  59531. defparam syncreset_ctrl_X61_Y10.SyncCtrlMux = 2'b10;
  59532. alta_syncctrl syncreset_ctrl_X61_Y11(
  59533. .Din(),
  59534. .Dout(SyncReset_X61_Y11_GND));
  59535. defparam syncreset_ctrl_X61_Y11.coord_x = 17;
  59536. defparam syncreset_ctrl_X61_Y11.coord_y = 11;
  59537. defparam syncreset_ctrl_X61_Y11.coord_z = 0;
  59538. defparam syncreset_ctrl_X61_Y11.SyncCtrlMux = 2'b00;
  59539. alta_syncctrl syncreset_ctrl_X61_Y12(
  59540. .Din(),
  59541. .Dout(SyncReset_X61_Y12_GND));
  59542. defparam syncreset_ctrl_X61_Y12.coord_x = 14;
  59543. defparam syncreset_ctrl_X61_Y12.coord_y = 8;
  59544. defparam syncreset_ctrl_X61_Y12.coord_z = 0;
  59545. defparam syncreset_ctrl_X61_Y12.SyncCtrlMux = 2'b00;
  59546. alta_syncctrl syncreset_ctrl_X61_Y2(
  59547. .Din(),
  59548. .Dout(SyncReset_X61_Y2_GND));
  59549. defparam syncreset_ctrl_X61_Y2.coord_x = 15;
  59550. defparam syncreset_ctrl_X61_Y2.coord_y = 1;
  59551. defparam syncreset_ctrl_X61_Y2.coord_z = 0;
  59552. defparam syncreset_ctrl_X61_Y2.SyncCtrlMux = 2'b00;
  59553. alta_syncctrl syncreset_ctrl_X61_Y4(
  59554. .Din(),
  59555. .Dout(SyncReset_X61_Y4_GND));
  59556. defparam syncreset_ctrl_X61_Y4.coord_x = 14;
  59557. defparam syncreset_ctrl_X61_Y4.coord_y = 9;
  59558. defparam syncreset_ctrl_X61_Y4.coord_z = 0;
  59559. defparam syncreset_ctrl_X61_Y4.SyncCtrlMux = 2'b00;
  59560. alta_syncctrl syncreset_ctrl_X61_Y5(
  59561. .Din(),
  59562. .Dout(SyncReset_X61_Y5_GND));
  59563. defparam syncreset_ctrl_X61_Y5.coord_x = 15;
  59564. defparam syncreset_ctrl_X61_Y5.coord_y = 8;
  59565. defparam syncreset_ctrl_X61_Y5.coord_z = 0;
  59566. defparam syncreset_ctrl_X61_Y5.SyncCtrlMux = 2'b00;
  59567. alta_syncctrl syncreset_ctrl_X61_Y6(
  59568. .Din(),
  59569. .Dout(SyncReset_X61_Y6_GND));
  59570. defparam syncreset_ctrl_X61_Y6.coord_x = 16;
  59571. defparam syncreset_ctrl_X61_Y6.coord_y = 8;
  59572. defparam syncreset_ctrl_X61_Y6.coord_z = 0;
  59573. defparam syncreset_ctrl_X61_Y6.SyncCtrlMux = 2'b00;
  59574. alta_syncctrl syncreset_ctrl_X61_Y7(
  59575. .Din(),
  59576. .Dout(SyncReset_X61_Y7_GND));
  59577. defparam syncreset_ctrl_X61_Y7.coord_x = 17;
  59578. defparam syncreset_ctrl_X61_Y7.coord_y = 9;
  59579. defparam syncreset_ctrl_X61_Y7.coord_z = 0;
  59580. defparam syncreset_ctrl_X61_Y7.SyncCtrlMux = 2'b00;
  59581. alta_syncctrl syncreset_ctrl_X61_Y8(
  59582. .Din(\macro_inst|u_uart[1]|u_regs|uart_en~q ),
  59583. .Dout(\macro_inst|u_uart[1]|u_regs|uart_en~q__SyncReset_X61_Y8_INV ));
  59584. defparam syncreset_ctrl_X61_Y8.coord_x = 15;
  59585. defparam syncreset_ctrl_X61_Y8.coord_y = 9;
  59586. defparam syncreset_ctrl_X61_Y8.coord_z = 0;
  59587. defparam syncreset_ctrl_X61_Y8.SyncCtrlMux = 2'b11;
  59588. alta_syncctrl syncreset_ctrl_X61_Y9(
  59589. .Din(),
  59590. .Dout(SyncReset_X61_Y9_GND));
  59591. defparam syncreset_ctrl_X61_Y9.coord_x = 15;
  59592. defparam syncreset_ctrl_X61_Y9.coord_y = 10;
  59593. defparam syncreset_ctrl_X61_Y9.coord_z = 0;
  59594. defparam syncreset_ctrl_X61_Y9.SyncCtrlMux = 2'b00;
  59595. alta_syncctrl syncreset_ctrl_X62_Y1(
  59596. .Din(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout ),
  59597. .Dout(\macro_inst|u_uart[0]|u_tx[2]|tx_stop~combout__SyncReset_X62_Y1_SIG ));
  59598. defparam syncreset_ctrl_X62_Y1.coord_x = 8;
  59599. defparam syncreset_ctrl_X62_Y1.coord_y = 1;
  59600. defparam syncreset_ctrl_X62_Y1.coord_z = 0;
  59601. defparam syncreset_ctrl_X62_Y1.SyncCtrlMux = 2'b10;
  59602. alta_syncctrl syncreset_ctrl_X62_Y10(
  59603. .Din(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout ),
  59604. .Dout(\macro_inst|u_uart[1]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y10_SIG ));
  59605. defparam syncreset_ctrl_X62_Y10.coord_x = 16;
  59606. defparam syncreset_ctrl_X62_Y10.coord_y = 11;
  59607. defparam syncreset_ctrl_X62_Y10.coord_z = 0;
  59608. defparam syncreset_ctrl_X62_Y10.SyncCtrlMux = 2'b10;
  59609. alta_syncctrl syncreset_ctrl_X62_Y11(
  59610. .Din(),
  59611. .Dout(SyncReset_X62_Y11_GND));
  59612. defparam syncreset_ctrl_X62_Y11.coord_x = 18;
  59613. defparam syncreset_ctrl_X62_Y11.coord_y = 12;
  59614. defparam syncreset_ctrl_X62_Y11.coord_z = 0;
  59615. defparam syncreset_ctrl_X62_Y11.SyncCtrlMux = 2'b00;
  59616. alta_syncctrl syncreset_ctrl_X62_Y12(
  59617. .Din(),
  59618. .Dout(SyncReset_X62_Y12_GND));
  59619. defparam syncreset_ctrl_X62_Y12.coord_x = 14;
  59620. defparam syncreset_ctrl_X62_Y12.coord_y = 11;
  59621. defparam syncreset_ctrl_X62_Y12.coord_z = 0;
  59622. defparam syncreset_ctrl_X62_Y12.SyncCtrlMux = 2'b00;
  59623. alta_syncctrl syncreset_ctrl_X62_Y2(
  59624. .Din(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout ),
  59625. .Dout(\macro_inst|u_uart[0]|u_tx[4]|tx_stop~combout__SyncReset_X62_Y2_SIG ));
  59626. defparam syncreset_ctrl_X62_Y2.coord_x = 11;
  59627. defparam syncreset_ctrl_X62_Y2.coord_y = 2;
  59628. defparam syncreset_ctrl_X62_Y2.coord_z = 0;
  59629. defparam syncreset_ctrl_X62_Y2.SyncCtrlMux = 2'b10;
  59630. alta_syncctrl syncreset_ctrl_X62_Y3(
  59631. .Din(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout ),
  59632. .Dout(\macro_inst|u_uart[0]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y3_SIG ));
  59633. defparam syncreset_ctrl_X62_Y3.coord_x = 11;
  59634. defparam syncreset_ctrl_X62_Y3.coord_y = 4;
  59635. defparam syncreset_ctrl_X62_Y3.coord_z = 0;
  59636. defparam syncreset_ctrl_X62_Y3.SyncCtrlMux = 2'b10;
  59637. alta_syncctrl syncreset_ctrl_X62_Y4(
  59638. .Din(),
  59639. .Dout(SyncReset_X62_Y4_GND));
  59640. defparam syncreset_ctrl_X62_Y4.coord_x = 20;
  59641. defparam syncreset_ctrl_X62_Y4.coord_y = 1;
  59642. defparam syncreset_ctrl_X62_Y4.coord_z = 0;
  59643. defparam syncreset_ctrl_X62_Y4.SyncCtrlMux = 2'b00;
  59644. alta_syncctrl syncreset_ctrl_X62_Y5(
  59645. .Din(),
  59646. .Dout(SyncReset_X62_Y5_GND));
  59647. defparam syncreset_ctrl_X62_Y5.coord_x = 14;
  59648. defparam syncreset_ctrl_X62_Y5.coord_y = 1;
  59649. defparam syncreset_ctrl_X62_Y5.coord_z = 0;
  59650. defparam syncreset_ctrl_X62_Y5.SyncCtrlMux = 2'b00;
  59651. alta_syncctrl syncreset_ctrl_X62_Y6(
  59652. .Din(),
  59653. .Dout(SyncReset_X62_Y6_GND));
  59654. defparam syncreset_ctrl_X62_Y6.coord_x = 15;
  59655. defparam syncreset_ctrl_X62_Y6.coord_y = 11;
  59656. defparam syncreset_ctrl_X62_Y6.coord_z = 0;
  59657. defparam syncreset_ctrl_X62_Y6.SyncCtrlMux = 2'b00;
  59658. alta_syncctrl syncreset_ctrl_X62_Y7(
  59659. .Din(),
  59660. .Dout(SyncReset_X62_Y7_GND));
  59661. defparam syncreset_ctrl_X62_Y7.coord_x = 17;
  59662. defparam syncreset_ctrl_X62_Y7.coord_y = 12;
  59663. defparam syncreset_ctrl_X62_Y7.coord_z = 0;
  59664. defparam syncreset_ctrl_X62_Y7.SyncCtrlMux = 2'b00;
  59665. alta_syncctrl syncreset_ctrl_X62_Y8(
  59666. .Din(),
  59667. .Dout(SyncReset_X62_Y8_GND));
  59668. defparam syncreset_ctrl_X62_Y8.coord_x = 16;
  59669. defparam syncreset_ctrl_X62_Y8.coord_y = 9;
  59670. defparam syncreset_ctrl_X62_Y8.coord_z = 0;
  59671. defparam syncreset_ctrl_X62_Y8.SyncCtrlMux = 2'b00;
  59672. alta_syncctrl syncreset_ctrl_X62_Y9(
  59673. .Din(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout ),
  59674. .Dout(\macro_inst|u_uart[1]|u_tx[3]|tx_stop~combout__SyncReset_X62_Y9_SIG ));
  59675. defparam syncreset_ctrl_X62_Y9.coord_x = 16;
  59676. defparam syncreset_ctrl_X62_Y9.coord_y = 10;
  59677. defparam syncreset_ctrl_X62_Y9.coord_z = 0;
  59678. defparam syncreset_ctrl_X62_Y9.SyncCtrlMux = 2'b10;
  59679. alta_io_gclk \sys_resetn~clkctrl (
  59680. .inclk(\sys_resetn~combout ),
  59681. .outclk(\sys_resetn~clkctrl_outclk ));
  59682. defparam \sys_resetn~clkctrl .coord_x = 22;
  59683. defparam \sys_resetn~clkctrl .coord_y = 4;
  59684. defparam \sys_resetn~clkctrl .coord_z = 3;
  59685. alta_rio \uart15_rx~input (
  59686. .padio(uart15_rx),
  59687. .datain(gnd),
  59688. .oe(gnd),
  59689. .outclk(gnd),
  59690. .outclkena(vcc),
  59691. .inclk(gnd),
  59692. .inclkena(vcc),
  59693. .areset(gnd),
  59694. .sreset(gnd),
  59695. .combout(\uart15_rx~input_o ),
  59696. .regout());
  59697. defparam \uart15_rx~input .coord_x = 0;
  59698. defparam \uart15_rx~input .coord_y = 1;
  59699. defparam \uart15_rx~input .coord_z = 0;
  59700. defparam \uart15_rx~input .IN_ASYNC_MODE = 1'b0;
  59701. defparam \uart15_rx~input .IN_SYNC_MODE = 1'b0;
  59702. defparam \uart15_rx~input .IN_POWERUP = 1'b0;
  59703. defparam \uart15_rx~input .OUT_REG_MODE = 1'b0;
  59704. defparam \uart15_rx~input .OUT_ASYNC_MODE = 1'b0;
  59705. defparam \uart15_rx~input .OUT_SYNC_MODE = 1'b0;
  59706. defparam \uart15_rx~input .OUT_POWERUP = 1'b0;
  59707. defparam \uart15_rx~input .OE_REG_MODE = 1'b0;
  59708. defparam \uart15_rx~input .OE_ASYNC_MODE = 1'b0;
  59709. defparam \uart15_rx~input .OE_SYNC_MODE = 1'b0;
  59710. defparam \uart15_rx~input .OE_POWERUP = 1'b0;
  59711. defparam \uart15_rx~input .CFG_TRI_INPUT = 1'b0;
  59712. defparam \uart15_rx~input .CFG_INPUT_EN = 1'b1;
  59713. defparam \uart15_rx~input .CFG_PULL_UP = 1'b0;
  59714. defparam \uart15_rx~input .CFG_SLR = 1'b0;
  59715. defparam \uart15_rx~input .CFG_OPEN_DRAIN = 1'b0;
  59716. defparam \uart15_rx~input .CFG_PDRCTRL = 4'b0100;
  59717. defparam \uart15_rx~input .CFG_KEEP = 2'b00;
  59718. defparam \uart15_rx~input .CFG_LVDS_OUT_EN = 1'b0;
  59719. defparam \uart15_rx~input .CFG_LVDS_SEL_CUA = 2'b00;
  59720. defparam \uart15_rx~input .CFG_LVDS_IREF = 10'b0110000000;
  59721. defparam \uart15_rx~input .CFG_LVDS_IN_EN = 1'b0;
  59722. defparam \uart15_rx~input .DPCLK_DELAY = 4'b0000;
  59723. defparam \uart15_rx~input .OUT_DELAY = 1'b0;
  59724. defparam \uart15_rx~input .IN_DATA_DELAY = 3'b000;
  59725. defparam \uart15_rx~input .IN_REG_DELAY = 3'b000;
  59726. alta_rio \uart15_tx~output (
  59727. .padio(uart15_tx),
  59728. .datain(\rv32.gpio7_io_out_data[6] ),
  59729. .oe(gpio8_io_out_en[7]),
  59730. .outclk(gnd),
  59731. .outclkena(vcc),
  59732. .inclk(gnd),
  59733. .inclkena(vcc),
  59734. .areset(gnd),
  59735. .sreset(gnd),
  59736. .combout(),
  59737. .regout());
  59738. defparam \uart15_tx~output .coord_x = 0;
  59739. defparam \uart15_tx~output .coord_y = 2;
  59740. defparam \uart15_tx~output .coord_z = 5;
  59741. defparam \uart15_tx~output .IN_ASYNC_MODE = 1'b0;
  59742. defparam \uart15_tx~output .IN_SYNC_MODE = 1'b0;
  59743. defparam \uart15_tx~output .IN_POWERUP = 1'b0;
  59744. defparam \uart15_tx~output .OUT_REG_MODE = 1'b0;
  59745. defparam \uart15_tx~output .OUT_ASYNC_MODE = 1'b0;
  59746. defparam \uart15_tx~output .OUT_SYNC_MODE = 1'b0;
  59747. defparam \uart15_tx~output .OUT_POWERUP = 1'b0;
  59748. defparam \uart15_tx~output .OE_REG_MODE = 1'b0;
  59749. defparam \uart15_tx~output .OE_ASYNC_MODE = 1'b0;
  59750. defparam \uart15_tx~output .OE_SYNC_MODE = 1'b0;
  59751. defparam \uart15_tx~output .OE_POWERUP = 1'b0;
  59752. defparam \uart15_tx~output .CFG_TRI_INPUT = 1'b0;
  59753. defparam \uart15_tx~output .CFG_INPUT_EN = 1'b0;
  59754. defparam \uart15_tx~output .CFG_PULL_UP = 1'b0;
  59755. defparam \uart15_tx~output .CFG_SLR = 1'b0;
  59756. defparam \uart15_tx~output .CFG_OPEN_DRAIN = 1'b0;
  59757. defparam \uart15_tx~output .CFG_PDRCTRL = 4'b0100;
  59758. defparam \uart15_tx~output .CFG_KEEP = 2'b00;
  59759. defparam \uart15_tx~output .CFG_LVDS_OUT_EN = 1'b0;
  59760. defparam \uart15_tx~output .CFG_LVDS_SEL_CUA = 2'b00;
  59761. defparam \uart15_tx~output .CFG_LVDS_IREF = 10'b0110000000;
  59762. defparam \uart15_tx~output .CFG_LVDS_IN_EN = 1'b0;
  59763. defparam \uart15_tx~output .DPCLK_DELAY = 4'b0000;
  59764. defparam \uart15_tx~output .OUT_DELAY = 1'b0;
  59765. defparam \uart15_tx~output .IN_DATA_DELAY = 3'b000;
  59766. defparam \uart15_tx~output .IN_REG_DELAY = 3'b000;
  59767. endmodule