encoding.h 182 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996
  1. /* SPDX-License-Identifier: BSD-3-Clause */
  2. /* Copyright (c) 2023 RISC-V International */
  3. /*
  4. * This file is auto-generated by running 'make' in
  5. * https://github.com/riscv/riscv-opcodes (ed68c21)
  6. */
  7. #ifndef RISCV_CSR_ENCODING_H
  8. #define RISCV_CSR_ENCODING_H
  9. #define MSTATUS_UIE 0x00000001
  10. #define MSTATUS_SIE 0x00000002
  11. #define MSTATUS_HIE 0x00000004
  12. #define MSTATUS_MIE 0x00000008
  13. #define MSTATUS_UPIE 0x00000010
  14. #define MSTATUS_SPIE 0x00000020
  15. #define MSTATUS_UBE 0x00000040
  16. #define MSTATUS_MPIE 0x00000080
  17. #define MSTATUS_SPP 0x00000100
  18. #define MSTATUS_VS 0x00000600
  19. #define MSTATUS_MPP 0x00001800
  20. #define MSTATUS_FS 0x00006000
  21. #define MSTATUS_XS 0x00018000
  22. #define MSTATUS_MPRV 0x00020000
  23. #define MSTATUS_SUM 0x00040000
  24. #define MSTATUS_MXR 0x00080000
  25. #define MSTATUS_TVM 0x00100000
  26. #define MSTATUS_TW 0x00200000
  27. #define MSTATUS_TSR 0x00400000
  28. #define MSTATUS32_SD 0x80000000
  29. #define MSTATUS_UXL 0x0000000300000000
  30. #define MSTATUS_SXL 0x0000000C00000000
  31. #define MSTATUS_SBE 0x0000001000000000
  32. #define MSTATUS_MBE 0x0000002000000000
  33. #define MSTATUS_GVA 0x0000004000000000
  34. #define MSTATUS_MPV 0x0000008000000000
  35. #define MSTATUS64_SD 0x8000000000000000
  36. #define MSTATUSH_SBE 0x00000010
  37. #define MSTATUSH_MBE 0x00000020
  38. #define MSTATUSH_GVA 0x00000040
  39. #define MSTATUSH_MPV 0x00000080
  40. #define SSTATUS_UIE 0x00000001
  41. #define SSTATUS_SIE 0x00000002
  42. #define SSTATUS_UPIE 0x00000010
  43. #define SSTATUS_SPIE 0x00000020
  44. #define SSTATUS_UBE 0x00000040
  45. #define SSTATUS_SPP 0x00000100
  46. #define SSTATUS_VS 0x00000600
  47. #define SSTATUS_FS 0x00006000
  48. #define SSTATUS_XS 0x00018000
  49. #define SSTATUS_SUM 0x00040000
  50. #define SSTATUS_MXR 0x00080000
  51. #define SSTATUS32_SD 0x80000000
  52. #define SSTATUS_UXL 0x0000000300000000
  53. #define SSTATUS64_SD 0x8000000000000000
  54. #define HSTATUS_VSXL 0x300000000
  55. #define HSTATUS_VTSR 0x00400000
  56. #define HSTATUS_VTW 0x00200000
  57. #define HSTATUS_VTVM 0x00100000
  58. #define HSTATUS_VGEIN 0x0003f000
  59. #define HSTATUS_HU 0x00000200
  60. #define HSTATUS_SPVP 0x00000100
  61. #define HSTATUS_SPV 0x00000080
  62. #define HSTATUS_GVA 0x00000040
  63. #define HSTATUS_VSBE 0x00000020
  64. #define USTATUS_UIE 0x00000001
  65. #define USTATUS_UPIE 0x00000010
  66. #define DCSR_XDEBUGVER (3U<<30)
  67. #define DCSR_NDRESET (1<<29)
  68. #define DCSR_FULLRESET (1<<28)
  69. #define DCSR_EBREAKM (1<<15)
  70. #define DCSR_EBREAKH (1<<14)
  71. #define DCSR_EBREAKS (1<<13)
  72. #define DCSR_EBREAKU (1<<12)
  73. #define DCSR_STOPCYCLE (1<<10)
  74. #define DCSR_STOPTIME (1<<9)
  75. #define DCSR_CAUSE (7<<6)
  76. #define DCSR_DEBUGINT (1<<5)
  77. #define DCSR_HALT (1<<3)
  78. #define DCSR_STEP (1<<2)
  79. #define DCSR_PRV (3<<0)
  80. #define DCSR_CAUSE_NONE 0
  81. #define DCSR_CAUSE_SWBP 1
  82. #define DCSR_CAUSE_HWBP 2
  83. #define DCSR_CAUSE_DEBUGINT 3
  84. #define DCSR_CAUSE_STEP 4
  85. #define DCSR_CAUSE_HALT 5
  86. #define DCSR_CAUSE_GROUP 6
  87. #define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4))
  88. #define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5))
  89. #define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
  90. #define MCONTROL_SELECT (1<<19)
  91. #define MCONTROL_TIMING (1<<18)
  92. #define MCONTROL_ACTION (0x3f<<12)
  93. #define MCONTROL_CHAIN (1<<11)
  94. #define MCONTROL_MATCH (0xf<<7)
  95. #define MCONTROL_M (1<<6)
  96. #define MCONTROL_H (1<<5)
  97. #define MCONTROL_S (1<<4)
  98. #define MCONTROL_U (1<<3)
  99. #define MCONTROL_EXECUTE (1<<2)
  100. #define MCONTROL_STORE (1<<1)
  101. #define MCONTROL_LOAD (1<<0)
  102. #define MCONTROL_TYPE_NONE 0
  103. #define MCONTROL_TYPE_MATCH 2
  104. #define MCONTROL_ACTION_DEBUG_EXCEPTION 0
  105. #define MCONTROL_ACTION_DEBUG_MODE 1
  106. #define MCONTROL_ACTION_TRACE_START 2
  107. #define MCONTROL_ACTION_TRACE_STOP 3
  108. #define MCONTROL_ACTION_TRACE_EMIT 4
  109. #define MCONTROL_MATCH_EQUAL 0
  110. #define MCONTROL_MATCH_NAPOT 1
  111. #define MCONTROL_MATCH_GE 2
  112. #define MCONTROL_MATCH_LT 3
  113. #define MCONTROL_MATCH_MASK_LOW 4
  114. #define MCONTROL_MATCH_MASK_HIGH 5
  115. #define MIP_USIP (1 << IRQ_U_SOFT)
  116. #define MIP_SSIP (1 << IRQ_S_SOFT)
  117. #define MIP_VSSIP (1 << IRQ_VS_SOFT)
  118. #define MIP_MSIP (1 << IRQ_M_SOFT)
  119. #define MIP_UTIP (1 << IRQ_U_TIMER)
  120. #define MIP_STIP (1 << IRQ_S_TIMER)
  121. #define MIP_VSTIP (1 << IRQ_VS_TIMER)
  122. #define MIP_MTIP (1 << IRQ_M_TIMER)
  123. #define MIP_UEIP (1 << IRQ_U_EXT)
  124. #define MIP_SEIP (1 << IRQ_S_EXT)
  125. #define MIP_VSEIP (1 << IRQ_VS_EXT)
  126. #define MIP_MEIP (1 << IRQ_M_EXT)
  127. #define MIP_SGEIP (1 << IRQ_S_GEXT)
  128. #define MIP_LCOFIP (1 << IRQ_LCOF)
  129. #define MIP_S_MASK (MIP_SSIP | MIP_STIP | MIP_SEIP)
  130. #define MIP_VS_MASK (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP)
  131. #define MIP_HS_MASK (MIP_VS_MASK | MIP_SGEIP)
  132. #define MIDELEG_FORCED_MASK MIP_HS_MASK
  133. #define SIP_SSIP MIP_SSIP
  134. #define SIP_STIP MIP_STIP
  135. #define MENVCFG_FIOM 0x00000001
  136. #define MENVCFG_CBIE 0x00000030
  137. //#define MENVCFG_CBCFE 0x00000040
  138. #define MENVCFG_CBCFE (0x1 << 6)
  139. //#define MENVCFG_CBZE 0x00000080
  140. #define MENVCFG_CBZE (0x1 << 7)
  141. #define MENVCFG_HADE 0x2000000000000000
  142. #define MENVCFG_PBMTE 0x4000000000000000
  143. #define MENVCFG_STCE 0x8000000000000000
  144. #define MENVCFGH_HADE 0x20000000
  145. #define MENVCFGH_PBMTE 0x40000000
  146. #define MENVCFGH_STCE 0x80000000
  147. #define MSTATEEN0_CS 0x00000001
  148. #define MSTATEEN0_FCSR 0x00000002
  149. #define MSTATEEN0_JVT 0x00000004
  150. #define MSTATEEN0_HCONTEXT 0x0200000000000000
  151. #define MSTATEEN0_HENVCFG 0x4000000000000000
  152. #define MSTATEEN_HSTATEEN 0x8000000000000000
  153. #define MSTATEEN0H_HCONTEXT 0x02000000
  154. #define MSTATEEN0H_HENVCFG 0x40000000
  155. #define MSTATEENH_HSTATEEN 0x80000000
  156. #define MHPMEVENT_VUINH 0x0400000000000000
  157. #define MHPMEVENT_VSINH 0x0800000000000000
  158. #define MHPMEVENT_UINH 0x1000000000000000
  159. #define MHPMEVENT_SINH 0x2000000000000000
  160. #define MHPMEVENT_MINH 0x4000000000000000
  161. #define MHPMEVENT_OF 0x8000000000000000
  162. #define MHPMEVENTH_VUINH 0x04000000
  163. #define MHPMEVENTH_VSINH 0x08000000
  164. #define MHPMEVENTH_UINH 0x10000000
  165. #define MHPMEVENTH_SINH 0x20000000
  166. #define MHPMEVENTH_MINH 0x40000000
  167. #define MHPMEVENTH_OF 0x80000000
  168. #define HENVCFG_FIOM 0x00000001
  169. #define HENVCFG_CBIE 0x00000030
  170. #define HENVCFG_CBCFE 0x00000040
  171. #define HENVCFG_CBZE 0x00000080
  172. #define HENVCFG_HADE 0x2000000000000000
  173. #define HENVCFG_PBMTE 0x4000000000000000
  174. #define HENVCFG_STCE 0x8000000000000000
  175. #define HENVCFGH_HADE 0x20000000
  176. #define HENVCFGH_PBMTE 0x40000000
  177. #define HENVCFGH_STCE 0x80000000
  178. #define HSTATEEN0_CS 0x00000001
  179. #define HSTATEEN0_FCSR 0x00000002
  180. #define HSTATEEN0_JVT 0x00000004
  181. #define HSTATEEN0_SCONTEXT 0x0200000000000000
  182. #define HSTATEEN0_SENVCFG 0x4000000000000000
  183. #define HSTATEEN_SSTATEEN 0x8000000000000000
  184. #define HSTATEEN0H_SCONTEXT 0x02000000
  185. #define HSTATEEN0H_SENVCFG 0x40000000
  186. #define HSTATEENH_SSTATEEN 0x80000000
  187. #define SENVCFG_FIOM 0x00000001
  188. #define SENVCFG_CBIE 0x00000030
  189. //#define SENVCFG_CBCFE 0x00000040
  190. #define SENVCFG_CBCFE (0x1 << 6)
  191. //#define SENVCFG_CBZE 0x00000080
  192. #define SENVCFG_CBZE (0x1 << 7)
  193. #define SSTATEEN0_CS 0x00000001
  194. #define SSTATEEN0_FCSR 0x00000002
  195. #define SSTATEEN0_JVT 0x00000004
  196. #define MSECCFG_MML 0x00000001
  197. #define MSECCFG_MMWP 0x00000002
  198. #define MSECCFG_RLB 0x00000004
  199. #define MSECCFG_USEED 0x00000100
  200. #define MSECCFG_SSEED 0x00000200
  201. /* jvt fields */
  202. #define JVT_MODE 0x3F
  203. #define JVT_BASE (~0x3F)
  204. #define PRV_U 0
  205. #define PRV_S 1
  206. #define PRV_M 3
  207. #define PRV_HS (PRV_S + 1)
  208. #define SATP32_MODE 0x80000000
  209. #define SATP32_ASID 0x7FC00000
  210. #define SATP32_PPN 0x003FFFFF
  211. #define SATP64_MODE 0xF000000000000000
  212. #define SATP64_ASID 0x0FFFF00000000000
  213. #define SATP64_PPN 0x00000FFFFFFFFFFF
  214. #define SATP_MODE_OFF 0
  215. #define SATP_MODE_SV32 1
  216. #define SATP_MODE_SV39 8
  217. #define SATP_MODE_SV48 9
  218. #define SATP_MODE_SV57 10
  219. #define SATP_MODE_SV64 11
  220. #define HGATP32_MODE 0x80000000
  221. #define HGATP32_VMID 0x1FC00000
  222. #define HGATP32_PPN 0x003FFFFF
  223. #define HGATP64_MODE 0xF000000000000000
  224. #define HGATP64_VMID 0x03FFF00000000000
  225. #define HGATP64_PPN 0x00000FFFFFFFFFFF
  226. #define HGATP_MODE_OFF 0
  227. #define HGATP_MODE_SV32X4 1
  228. #define HGATP_MODE_SV39X4 8
  229. #define HGATP_MODE_SV48X4 9
  230. #define HGATP_MODE_SV57X4 10
  231. #define PMP_R 0x01
  232. #define PMP_W 0x02
  233. #define PMP_X 0x04
  234. #define PMP_A 0x18
  235. #define PMP_L 0x80
  236. #define PMP_SHIFT 2
  237. #define PMP_TOR 0x08
  238. #define PMP_NA4 0x10
  239. #define PMP_NAPOT 0x18
  240. #define IRQ_U_SOFT 0
  241. #define IRQ_S_SOFT 1
  242. #define IRQ_VS_SOFT 2
  243. #define IRQ_M_SOFT 3
  244. #define IRQ_U_TIMER 4
  245. #define IRQ_S_TIMER 5
  246. #define IRQ_VS_TIMER 6
  247. #define IRQ_M_TIMER 7
  248. #define IRQ_U_EXT 8
  249. #define IRQ_S_EXT 9
  250. #define IRQ_VS_EXT 10
  251. #define IRQ_M_EXT 11
  252. #define IRQ_S_GEXT 12
  253. #define IRQ_COP 12
  254. #define IRQ_LCOF 13
  255. /* page table entry (PTE) fields */
  256. #define PTE_V 0x001 /* Valid */
  257. #define PTE_R 0x002 /* Read */
  258. #define PTE_W 0x004 /* Write */
  259. #define PTE_X 0x008 /* Execute */
  260. #define PTE_U 0x010 /* User */
  261. #define PTE_G 0x020 /* Global */
  262. #define PTE_A 0x040 /* Accessed */
  263. #define PTE_D 0x080 /* Dirty */
  264. #define PTE_SOFT 0x300 /* Reserved for Software */
  265. #define PTE_RSVD 0x1FC0000000000000 /* Reserved for future standard use */
  266. #define PTE_PBMT 0x6000000000000000 /* Svpbmt: Page-based memory types */
  267. #define PTE_N 0x8000000000000000 /* Svnapot: NAPOT translation contiguity */
  268. #define PTE_ATTR 0xFFC0000000000000 /* All attributes and reserved bits */
  269. #define PTE_PPN_SHIFT 10
  270. #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
  271. #ifdef __riscv
  272. #if __riscv_xlen == 64
  273. # define MSTATUS_SD MSTATUS64_SD
  274. # define SSTATUS_SD SSTATUS64_SD
  275. # define RISCV_PGLEVEL_BITS 9
  276. # define SATP_MODE SATP64_MODE
  277. #else
  278. # define MSTATUS_SD MSTATUS32_SD
  279. # define SSTATUS_SD SSTATUS32_SD
  280. # define RISCV_PGLEVEL_BITS 10
  281. # define SATP_MODE SATP32_MODE
  282. #endif
  283. #define RISCV_PGSHIFT 12
  284. #define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
  285. #ifndef __ASSEMBLER__
  286. #ifdef __GNUC__
  287. #define read_csr(reg) ({ unsigned long __tmp; \
  288. asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
  289. __tmp; })
  290. #define write_csr(reg, val) ({ \
  291. asm volatile ("csrw " #reg ", %0" :: "rK"(val)); })
  292. #define swap_csr(reg, val) ({ unsigned long __tmp; \
  293. asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \
  294. __tmp; })
  295. #define set_csr(reg, bit) ({ unsigned long __tmp; \
  296. asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
  297. __tmp; })
  298. #define clear_csr(reg, bit) ({ unsigned long __tmp; \
  299. asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
  300. __tmp; })
  301. #define rdtime() read_csr(time)
  302. #define rdcycle() read_csr(cycle)
  303. #define rdinstret() read_csr(instret)
  304. #endif
  305. #endif
  306. #endif
  307. #endif
  308. /* Automatically generated by parse_opcodes. */
  309. #ifndef RISCV_ENCODING_H
  310. #define RISCV_ENCODING_H
  311. #define MATCH_ADD 0x33
  312. #define MASK_ADD 0xfe00707f
  313. #define MATCH_ADD16 0x40000077
  314. #define MASK_ADD16 0xfe00707f
  315. #define MATCH_ADD32 0x40002077
  316. #define MASK_ADD32 0xfe00707f
  317. #define MATCH_ADD64 0xc0001077
  318. #define MASK_ADD64 0xfe00707f
  319. #define MATCH_ADD8 0x48000077
  320. #define MASK_ADD8 0xfe00707f
  321. #define MATCH_ADD_UW 0x800003b
  322. #define MASK_ADD_UW 0xfe00707f
  323. #define MATCH_ADDI 0x13
  324. #define MASK_ADDI 0x707f
  325. #define MATCH_ADDIW 0x1b
  326. #define MASK_ADDIW 0x707f
  327. #define MATCH_ADDW 0x3b
  328. #define MASK_ADDW 0xfe00707f
  329. #define MATCH_AES32DSI 0x2a000033
  330. #define MASK_AES32DSI 0x3e00707f
  331. #define MATCH_AES32DSMI 0x2e000033
  332. #define MASK_AES32DSMI 0x3e00707f
  333. #define MATCH_AES32ESI 0x22000033
  334. #define MASK_AES32ESI 0x3e00707f
  335. #define MATCH_AES32ESMI 0x26000033
  336. #define MASK_AES32ESMI 0x3e00707f
  337. #define MATCH_AES64DS 0x3a000033
  338. #define MASK_AES64DS 0xfe00707f
  339. #define MATCH_AES64DSM 0x3e000033
  340. #define MASK_AES64DSM 0xfe00707f
  341. #define MATCH_AES64ES 0x32000033
  342. #define MASK_AES64ES 0xfe00707f
  343. #define MATCH_AES64ESM 0x36000033
  344. #define MASK_AES64ESM 0xfe00707f
  345. #define MATCH_AES64IM 0x30001013
  346. #define MASK_AES64IM 0xfff0707f
  347. #define MATCH_AES64KS1I 0x31001013
  348. #define MASK_AES64KS1I 0xff00707f
  349. #define MATCH_AES64KS2 0x7e000033
  350. #define MASK_AES64KS2 0xfe00707f
  351. #define MATCH_AMOADD_D 0x302f
  352. #define MASK_AMOADD_D 0xf800707f
  353. #define MATCH_AMOADD_W 0x202f
  354. #define MASK_AMOADD_W 0xf800707f
  355. #define MATCH_AMOAND_D 0x6000302f
  356. #define MASK_AMOAND_D 0xf800707f
  357. #define MATCH_AMOAND_W 0x6000202f
  358. #define MASK_AMOAND_W 0xf800707f
  359. #define MATCH_AMOMAX_D 0xa000302f
  360. #define MASK_AMOMAX_D 0xf800707f
  361. #define MATCH_AMOMAX_W 0xa000202f
  362. #define MASK_AMOMAX_W 0xf800707f
  363. #define MATCH_AMOMAXU_D 0xe000302f
  364. #define MASK_AMOMAXU_D 0xf800707f
  365. #define MATCH_AMOMAXU_W 0xe000202f
  366. #define MASK_AMOMAXU_W 0xf800707f
  367. #define MATCH_AMOMIN_D 0x8000302f
  368. #define MASK_AMOMIN_D 0xf800707f
  369. #define MATCH_AMOMIN_W 0x8000202f
  370. #define MASK_AMOMIN_W 0xf800707f
  371. #define MATCH_AMOMINU_D 0xc000302f
  372. #define MASK_AMOMINU_D 0xf800707f
  373. #define MATCH_AMOMINU_W 0xc000202f
  374. #define MASK_AMOMINU_W 0xf800707f
  375. #define MATCH_AMOOR_D 0x4000302f
  376. #define MASK_AMOOR_D 0xf800707f
  377. #define MATCH_AMOOR_W 0x4000202f
  378. #define MASK_AMOOR_W 0xf800707f
  379. #define MATCH_AMOSWAP_D 0x800302f
  380. #define MASK_AMOSWAP_D 0xf800707f
  381. #define MATCH_AMOSWAP_W 0x800202f
  382. #define MASK_AMOSWAP_W 0xf800707f
  383. #define MATCH_AMOXOR_D 0x2000302f
  384. #define MASK_AMOXOR_D 0xf800707f
  385. #define MATCH_AMOXOR_W 0x2000202f
  386. #define MASK_AMOXOR_W 0xf800707f
  387. #define MATCH_AND 0x7033
  388. #define MASK_AND 0xfe00707f
  389. #define MATCH_ANDI 0x7013
  390. #define MASK_ANDI 0x707f
  391. #define MATCH_ANDN 0x40007033
  392. #define MASK_ANDN 0xfe00707f
  393. #define MATCH_AUIPC 0x17
  394. #define MASK_AUIPC 0x7f
  395. #define MATCH_AVE 0xe0000077
  396. #define MASK_AVE 0xfe00707f
  397. #define MATCH_BCLR 0x48001033
  398. #define MASK_BCLR 0xfe00707f
  399. #define MATCH_BCLRI 0x48001013
  400. #define MASK_BCLRI 0xfc00707f
  401. #define MATCH_BCOMPRESS 0x8006033
  402. #define MASK_BCOMPRESS 0xfe00707f
  403. #define MATCH_BCOMPRESSW 0x800603b
  404. #define MASK_BCOMPRESSW 0xfe00707f
  405. #define MATCH_BDECOMPRESS 0x48006033
  406. #define MASK_BDECOMPRESS 0xfe00707f
  407. #define MATCH_BDECOMPRESSW 0x4800603b
  408. #define MASK_BDECOMPRESSW 0xfe00707f
  409. #define MATCH_BEQ 0x63
  410. #define MASK_BEQ 0x707f
  411. #define MATCH_BEXT 0x48005033
  412. #define MASK_BEXT 0xfe00707f
  413. #define MATCH_BEXTI 0x48005013
  414. #define MASK_BEXTI 0xfc00707f
  415. #define MATCH_BFP 0x48007033
  416. #define MASK_BFP 0xfe00707f
  417. #define MATCH_BFPW 0x4800703b
  418. #define MASK_BFPW 0xfe00707f
  419. #define MATCH_BGE 0x5063
  420. #define MASK_BGE 0x707f
  421. #define MATCH_BGEU 0x7063
  422. #define MASK_BGEU 0x707f
  423. #define MATCH_BINV 0x68001033
  424. #define MASK_BINV 0xfe00707f
  425. #define MATCH_BINVI 0x68001013
  426. #define MASK_BINVI 0xfc00707f
  427. #define MATCH_BLT 0x4063
  428. #define MASK_BLT 0x707f
  429. #define MATCH_BLTU 0x6063
  430. #define MASK_BLTU 0x707f
  431. #define MATCH_BMATFLIP 0x60301013
  432. #define MASK_BMATFLIP 0xfff0707f
  433. #define MATCH_BMATOR 0x8003033
  434. #define MASK_BMATOR 0xfe00707f
  435. #define MATCH_BMATXOR 0x48003033
  436. #define MASK_BMATXOR 0xfe00707f
  437. #define MATCH_BNE 0x1063
  438. #define MASK_BNE 0x707f
  439. #define MATCH_BSET 0x28001033
  440. #define MASK_BSET 0xfe00707f
  441. #define MATCH_BSETI 0x28001013
  442. #define MASK_BSETI 0xfc00707f
  443. #define MATCH_C_ADD 0x9002
  444. #define MASK_C_ADD 0xf003
  445. #define MATCH_C_ADDI 0x1
  446. #define MASK_C_ADDI 0xe003
  447. #define MATCH_C_ADDI16SP 0x6101
  448. #define MASK_C_ADDI16SP 0xef83
  449. #define MATCH_C_ADDI4SPN 0x0
  450. #define MASK_C_ADDI4SPN 0xe003
  451. #define MATCH_C_ADDIW 0x2001
  452. #define MASK_C_ADDIW 0xe003
  453. #define MATCH_C_ADDW 0x9c21
  454. #define MASK_C_ADDW 0xfc63
  455. #define MATCH_C_AND 0x8c61
  456. #define MASK_C_AND 0xfc63
  457. #define MATCH_C_ANDI 0x8801
  458. #define MASK_C_ANDI 0xec03
  459. #define MATCH_C_BEQZ 0xc001
  460. #define MASK_C_BEQZ 0xe003
  461. #define MATCH_C_BNEZ 0xe001
  462. #define MASK_C_BNEZ 0xe003
  463. #define MATCH_C_EBREAK 0x9002
  464. #define MASK_C_EBREAK 0xffff
  465. #define MATCH_C_FLD 0x2000
  466. #define MASK_C_FLD 0xe003
  467. #define MATCH_C_FLDSP 0x2002
  468. #define MASK_C_FLDSP 0xe003
  469. #define MATCH_C_FLW 0x6000
  470. #define MASK_C_FLW 0xe003
  471. #define MATCH_C_FLWSP 0x6002
  472. #define MASK_C_FLWSP 0xe003
  473. #define MATCH_C_FSD 0xa000
  474. #define MASK_C_FSD 0xe003
  475. #define MATCH_C_FSDSP 0xa002
  476. #define MASK_C_FSDSP 0xe003
  477. #define MATCH_C_FSW 0xe000
  478. #define MASK_C_FSW 0xe003
  479. #define MATCH_C_FSWSP 0xe002
  480. #define MASK_C_FSWSP 0xe003
  481. #define MATCH_C_J 0xa001
  482. #define MASK_C_J 0xe003
  483. #define MATCH_C_JAL 0x2001
  484. #define MASK_C_JAL 0xe003
  485. #define MATCH_C_JALR 0x9002
  486. #define MASK_C_JALR 0xf07f
  487. #define MATCH_C_JR 0x8002
  488. #define MASK_C_JR 0xf07f
  489. #define MATCH_C_LBU 0x8000
  490. #define MASK_C_LBU 0xfc03
  491. #define MATCH_C_LD 0x6000
  492. #define MASK_C_LD 0xe003
  493. #define MATCH_C_LDSP 0x6002
  494. #define MASK_C_LDSP 0xe003
  495. #define MATCH_C_LH 0x8440
  496. #define MASK_C_LH 0xfc43
  497. #define MATCH_C_LHU 0x8400
  498. #define MASK_C_LHU 0xfc43
  499. #define MATCH_C_LI 0x4001
  500. #define MASK_C_LI 0xe003
  501. #define MATCH_C_LUI 0x6001
  502. #define MASK_C_LUI 0xe003
  503. #define MATCH_C_LW 0x4000
  504. #define MASK_C_LW 0xe003
  505. #define MATCH_C_LWSP 0x4002
  506. #define MASK_C_LWSP 0xe003
  507. #define MATCH_C_MUL 0x9c41
  508. #define MASK_C_MUL 0xfc63
  509. #define MATCH_C_MV 0x8002
  510. #define MASK_C_MV 0xf003
  511. #define MATCH_C_NOP 0x1
  512. #define MASK_C_NOP 0xef83
  513. #define MATCH_C_NOT 0x9c75
  514. #define MASK_C_NOT 0xfc7f
  515. #define MATCH_C_OR 0x8c41
  516. #define MASK_C_OR 0xfc63
  517. #define MATCH_C_SB 0x8800
  518. #define MASK_C_SB 0xfc03
  519. #define MATCH_C_SD 0xe000
  520. #define MASK_C_SD 0xe003
  521. #define MATCH_C_SDSP 0xe002
  522. #define MASK_C_SDSP 0xe003
  523. #define MATCH_C_SEXT_B 0x9c65
  524. #define MASK_C_SEXT_B 0xfc7f
  525. #define MATCH_C_SEXT_H 0x9c6d
  526. #define MASK_C_SEXT_H 0xfc7f
  527. #define MATCH_C_SH 0x8c00
  528. #define MASK_C_SH 0xfc43
  529. #define MATCH_C_SLLI 0x2
  530. #define MASK_C_SLLI 0xe003
  531. #define MATCH_C_SRAI 0x8401
  532. #define MASK_C_SRAI 0xec03
  533. #define MATCH_C_SRLI 0x8001
  534. #define MASK_C_SRLI 0xec03
  535. #define MATCH_C_SUB 0x8c01
  536. #define MASK_C_SUB 0xfc63
  537. #define MATCH_C_SUBW 0x9c01
  538. #define MASK_C_SUBW 0xfc63
  539. #define MATCH_C_SW 0xc000
  540. #define MASK_C_SW 0xe003
  541. #define MATCH_C_SWSP 0xc002
  542. #define MASK_C_SWSP 0xe003
  543. #define MATCH_C_XOR 0x8c21
  544. #define MASK_C_XOR 0xfc63
  545. #define MATCH_C_ZEXT_B 0x9c61
  546. #define MASK_C_ZEXT_B 0xfc7f
  547. #define MATCH_C_ZEXT_H 0x9c69
  548. #define MASK_C_ZEXT_H 0xfc7f
  549. #define MATCH_C_ZEXT_W 0x9c71
  550. #define MASK_C_ZEXT_W 0xfc7f
  551. #define MATCH_CBO_CLEAN 0x10200f
  552. #define MASK_CBO_CLEAN 0xfff07fff
  553. #define MATCH_CBO_FLUSH 0x20200f
  554. #define MASK_CBO_FLUSH 0xfff07fff
  555. #define MATCH_CBO_INVAL 0x200f
  556. #define MASK_CBO_INVAL 0xfff07fff
  557. #define MATCH_CBO_ZERO 0x40200f
  558. #define MASK_CBO_ZERO 0xfff07fff
  559. #define MATCH_CLMUL 0xa001033
  560. #define MASK_CLMUL 0xfe00707f
  561. #define MATCH_CLMULH 0xa003033
  562. #define MASK_CLMULH 0xfe00707f
  563. #define MATCH_CLMULR 0xa002033
  564. #define MASK_CLMULR 0xfe00707f
  565. #define MATCH_CLRS16 0xae800077
  566. #define MASK_CLRS16 0xfff0707f
  567. #define MATCH_CLRS32 0xaf800077
  568. #define MASK_CLRS32 0xfff0707f
  569. #define MATCH_CLRS8 0xae000077
  570. #define MASK_CLRS8 0xfff0707f
  571. #define MATCH_CLZ 0x60001013
  572. #define MASK_CLZ 0xfff0707f
  573. #define MATCH_CLZ16 0xae900077
  574. #define MASK_CLZ16 0xfff0707f
  575. #define MATCH_CLZ32 0xaf900077
  576. #define MASK_CLZ32 0xfff0707f
  577. #define MATCH_CLZ8 0xae100077
  578. #define MASK_CLZ8 0xfff0707f
  579. #define MATCH_CLZW 0x6000101b
  580. #define MASK_CLZW 0xfff0707f
  581. #define MATCH_CM_JALT 0xa002
  582. #define MASK_CM_JALT 0xfc03
  583. #define MATCH_CM_MVA01S 0xac62
  584. #define MASK_CM_MVA01S 0xfc63
  585. #define MATCH_CM_MVSA01 0xac22
  586. #define MASK_CM_MVSA01 0xfc63
  587. #define MATCH_CM_POP 0xba02
  588. #define MASK_CM_POP 0xff03
  589. #define MATCH_CM_POPRET 0xbe02
  590. #define MASK_CM_POPRET 0xff03
  591. #define MATCH_CM_POPRETZ 0xbc02
  592. #define MASK_CM_POPRETZ 0xff03
  593. #define MATCH_CM_PUSH 0xb802
  594. #define MASK_CM_PUSH 0xff03
  595. #define MATCH_CMIX 0x6001033
  596. #define MASK_CMIX 0x600707f
  597. #define MATCH_CMOV 0x6005033
  598. #define MASK_CMOV 0x600707f
  599. #define MATCH_CMPEQ16 0x4c000077
  600. #define MASK_CMPEQ16 0xfe00707f
  601. #define MATCH_CMPEQ8 0x4e000077
  602. #define MASK_CMPEQ8 0xfe00707f
  603. #define MATCH_CPOP 0x60201013
  604. #define MASK_CPOP 0xfff0707f
  605. #define MATCH_CPOPW 0x6020101b
  606. #define MASK_CPOPW 0xfff0707f
  607. #define MATCH_CRAS16 0x44000077
  608. #define MASK_CRAS16 0xfe00707f
  609. #define MATCH_CRAS32 0x44002077
  610. #define MASK_CRAS32 0xfe00707f
  611. #define MATCH_CRC32_B 0x61001013
  612. #define MASK_CRC32_B 0xfff0707f
  613. #define MATCH_CRC32_D 0x61301013
  614. #define MASK_CRC32_D 0xfff0707f
  615. #define MATCH_CRC32_H 0x61101013
  616. #define MASK_CRC32_H 0xfff0707f
  617. #define MATCH_CRC32_W 0x61201013
  618. #define MASK_CRC32_W 0xfff0707f
  619. #define MATCH_CRC32C_B 0x61801013
  620. #define MASK_CRC32C_B 0xfff0707f
  621. #define MATCH_CRC32C_D 0x61b01013
  622. #define MASK_CRC32C_D 0xfff0707f
  623. #define MATCH_CRC32C_H 0x61901013
  624. #define MASK_CRC32C_H 0xfff0707f
  625. #define MATCH_CRC32C_W 0x61a01013
  626. #define MASK_CRC32C_W 0xfff0707f
  627. #define MATCH_CRSA16 0x46000077
  628. #define MASK_CRSA16 0xfe00707f
  629. #define MATCH_CRSA32 0x46002077
  630. #define MASK_CRSA32 0xfe00707f
  631. #define MATCH_CSRRC 0x3073
  632. #define MASK_CSRRC 0x707f
  633. #define MATCH_CSRRCI 0x7073
  634. #define MASK_CSRRCI 0x707f
  635. #define MATCH_CSRRS 0x2073
  636. #define MASK_CSRRS 0x707f
  637. #define MATCH_CSRRSI 0x6073
  638. #define MASK_CSRRSI 0x707f
  639. #define MATCH_CSRRW 0x1073
  640. #define MASK_CSRRW 0x707f
  641. #define MATCH_CSRRWI 0x5073
  642. #define MASK_CSRRWI 0x707f
  643. #define MATCH_CTZ 0x60101013
  644. #define MASK_CTZ 0xfff0707f
  645. #define MATCH_CTZW 0x6010101b
  646. #define MASK_CTZW 0xfff0707f
  647. #define MATCH_CZERO_EQZ 0xe005033
  648. #define MASK_CZERO_EQZ 0xfe00707f
  649. #define MATCH_CZERO_NEZ 0xe007033
  650. #define MASK_CZERO_NEZ 0xfe00707f
  651. #define MATCH_DIV 0x2004033
  652. #define MASK_DIV 0xfe00707f
  653. #define MATCH_DIVU 0x2005033
  654. #define MASK_DIVU 0xfe00707f
  655. #define MATCH_DIVUW 0x200503b
  656. #define MASK_DIVUW 0xfe00707f
  657. #define MATCH_DIVW 0x200403b
  658. #define MASK_DIVW 0xfe00707f
  659. #define MATCH_DRET 0x7b200073
  660. #define MASK_DRET 0xffffffff
  661. #define MATCH_EBREAK 0x100073
  662. #define MASK_EBREAK 0xffffffff
  663. #define MATCH_ECALL 0x73
  664. #define MASK_ECALL 0xffffffff
  665. #define MATCH_FADD_D 0x2000053
  666. #define MASK_FADD_D 0xfe00007f
  667. #define MATCH_FADD_H 0x4000053
  668. #define MASK_FADD_H 0xfe00007f
  669. #define MATCH_FADD_Q 0x6000053
  670. #define MASK_FADD_Q 0xfe00007f
  671. #define MATCH_FADD_S 0x53
  672. #define MASK_FADD_S 0xfe00007f
  673. #define MATCH_FCLASS_D 0xe2001053
  674. #define MASK_FCLASS_D 0xfff0707f
  675. #define MATCH_FCLASS_H 0xe4001053
  676. #define MASK_FCLASS_H 0xfff0707f
  677. #define MATCH_FCLASS_Q 0xe6001053
  678. #define MASK_FCLASS_Q 0xfff0707f
  679. #define MATCH_FCLASS_S 0xe0001053
  680. #define MASK_FCLASS_S 0xfff0707f
  681. #define MATCH_FCVT_D_H 0x42200053
  682. #define MASK_FCVT_D_H 0xfff0007f
  683. #define MATCH_FCVT_D_L 0xd2200053
  684. #define MASK_FCVT_D_L 0xfff0007f
  685. #define MATCH_FCVT_D_LU 0xd2300053
  686. #define MASK_FCVT_D_LU 0xfff0007f
  687. #define MATCH_FCVT_D_Q 0x42300053
  688. #define MASK_FCVT_D_Q 0xfff0007f
  689. #define MATCH_FCVT_D_S 0x42000053
  690. #define MASK_FCVT_D_S 0xfff0007f
  691. #define MATCH_FCVT_D_W 0xd2000053
  692. #define MASK_FCVT_D_W 0xfff0007f
  693. #define MATCH_FCVT_D_WU 0xd2100053
  694. #define MASK_FCVT_D_WU 0xfff0007f
  695. #define MATCH_FCVT_H_D 0x44100053
  696. #define MASK_FCVT_H_D 0xfff0007f
  697. #define MATCH_FCVT_H_L 0xd4200053
  698. #define MASK_FCVT_H_L 0xfff0007f
  699. #define MATCH_FCVT_H_LU 0xd4300053
  700. #define MASK_FCVT_H_LU 0xfff0007f
  701. #define MATCH_FCVT_H_Q 0x44300053
  702. #define MASK_FCVT_H_Q 0xfff0007f
  703. #define MATCH_FCVT_H_S 0x44000053
  704. #define MASK_FCVT_H_S 0xfff0007f
  705. #define MATCH_FCVT_H_W 0xd4000053
  706. #define MASK_FCVT_H_W 0xfff0007f
  707. #define MATCH_FCVT_H_WU 0xd4100053
  708. #define MASK_FCVT_H_WU 0xfff0007f
  709. #define MATCH_FCVT_L_D 0xc2200053
  710. #define MASK_FCVT_L_D 0xfff0007f
  711. #define MATCH_FCVT_L_H 0xc4200053
  712. #define MASK_FCVT_L_H 0xfff0007f
  713. #define MATCH_FCVT_L_Q 0xc6200053
  714. #define MASK_FCVT_L_Q 0xfff0007f
  715. #define MATCH_FCVT_L_S 0xc0200053
  716. #define MASK_FCVT_L_S 0xfff0007f
  717. #define MATCH_FCVT_LU_D 0xc2300053
  718. #define MASK_FCVT_LU_D 0xfff0007f
  719. #define MATCH_FCVT_LU_H 0xc4300053
  720. #define MASK_FCVT_LU_H 0xfff0007f
  721. #define MATCH_FCVT_LU_Q 0xc6300053
  722. #define MASK_FCVT_LU_Q 0xfff0007f
  723. #define MATCH_FCVT_LU_S 0xc0300053
  724. #define MASK_FCVT_LU_S 0xfff0007f
  725. #define MATCH_FCVT_Q_D 0x46100053
  726. #define MASK_FCVT_Q_D 0xfff0007f
  727. #define MATCH_FCVT_Q_H 0x46200053
  728. #define MASK_FCVT_Q_H 0xfff0007f
  729. #define MATCH_FCVT_Q_L 0xd6200053
  730. #define MASK_FCVT_Q_L 0xfff0007f
  731. #define MATCH_FCVT_Q_LU 0xd6300053
  732. #define MASK_FCVT_Q_LU 0xfff0007f
  733. #define MATCH_FCVT_Q_S 0x46000053
  734. #define MASK_FCVT_Q_S 0xfff0007f
  735. #define MATCH_FCVT_Q_W 0xd6000053
  736. #define MASK_FCVT_Q_W 0xfff0007f
  737. #define MATCH_FCVT_Q_WU 0xd6100053
  738. #define MASK_FCVT_Q_WU 0xfff0007f
  739. #define MATCH_FCVT_S_D 0x40100053
  740. #define MASK_FCVT_S_D 0xfff0007f
  741. #define MATCH_FCVT_S_H 0x40200053
  742. #define MASK_FCVT_S_H 0xfff0007f
  743. #define MATCH_FCVT_S_L 0xd0200053
  744. #define MASK_FCVT_S_L 0xfff0007f
  745. #define MATCH_FCVT_S_LU 0xd0300053
  746. #define MASK_FCVT_S_LU 0xfff0007f
  747. #define MATCH_FCVT_S_Q 0x40300053
  748. #define MASK_FCVT_S_Q 0xfff0007f
  749. #define MATCH_FCVT_S_W 0xd0000053
  750. #define MASK_FCVT_S_W 0xfff0007f
  751. #define MATCH_FCVT_S_WU 0xd0100053
  752. #define MASK_FCVT_S_WU 0xfff0007f
  753. #define MATCH_FCVT_W_D 0xc2000053
  754. #define MASK_FCVT_W_D 0xfff0007f
  755. #define MATCH_FCVT_W_H 0xc4000053
  756. #define MASK_FCVT_W_H 0xfff0007f
  757. #define MATCH_FCVT_W_Q 0xc6000053
  758. #define MASK_FCVT_W_Q 0xfff0007f
  759. #define MATCH_FCVT_W_S 0xc0000053
  760. #define MASK_FCVT_W_S 0xfff0007f
  761. #define MATCH_FCVT_WU_D 0xc2100053
  762. #define MASK_FCVT_WU_D 0xfff0007f
  763. #define MATCH_FCVT_WU_H 0xc4100053
  764. #define MASK_FCVT_WU_H 0xfff0007f
  765. #define MATCH_FCVT_WU_Q 0xc6100053
  766. #define MASK_FCVT_WU_Q 0xfff0007f
  767. #define MATCH_FCVT_WU_S 0xc0100053
  768. #define MASK_FCVT_WU_S 0xfff0007f
  769. #define MATCH_FDIV_D 0x1a000053
  770. #define MASK_FDIV_D 0xfe00007f
  771. #define MATCH_FDIV_H 0x1c000053
  772. #define MASK_FDIV_H 0xfe00007f
  773. #define MATCH_FDIV_Q 0x1e000053
  774. #define MASK_FDIV_Q 0xfe00007f
  775. #define MATCH_FDIV_S 0x18000053
  776. #define MASK_FDIV_S 0xfe00007f
  777. #define MATCH_FENCE 0xf
  778. #define MASK_FENCE 0x707f
  779. #define MATCH_FENCE_I 0x100f
  780. #define MASK_FENCE_I 0x707f
  781. #define MATCH_FEQ_D 0xa2002053
  782. #define MASK_FEQ_D 0xfe00707f
  783. #define MATCH_FEQ_H 0xa4002053
  784. #define MASK_FEQ_H 0xfe00707f
  785. #define MATCH_FEQ_Q 0xa6002053
  786. #define MASK_FEQ_Q 0xfe00707f
  787. #define MATCH_FEQ_S 0xa0002053
  788. #define MASK_FEQ_S 0xfe00707f
  789. #define MATCH_FLD 0x3007
  790. #define MASK_FLD 0x707f
  791. #define MATCH_FLE_D 0xa2000053
  792. #define MASK_FLE_D 0xfe00707f
  793. #define MATCH_FLE_H 0xa4000053
  794. #define MASK_FLE_H 0xfe00707f
  795. #define MATCH_FLE_Q 0xa6000053
  796. #define MASK_FLE_Q 0xfe00707f
  797. #define MATCH_FLE_S 0xa0000053
  798. #define MASK_FLE_S 0xfe00707f
  799. #define MATCH_FLH 0x1007
  800. #define MASK_FLH 0x707f
  801. #define MATCH_FLQ 0x4007
  802. #define MASK_FLQ 0x707f
  803. #define MATCH_FLT_D 0xa2001053
  804. #define MASK_FLT_D 0xfe00707f
  805. #define MATCH_FLT_H 0xa4001053
  806. #define MASK_FLT_H 0xfe00707f
  807. #define MATCH_FLT_Q 0xa6001053
  808. #define MASK_FLT_Q 0xfe00707f
  809. #define MATCH_FLT_S 0xa0001053
  810. #define MASK_FLT_S 0xfe00707f
  811. #define MATCH_FLW 0x2007
  812. #define MASK_FLW 0x707f
  813. #define MATCH_FMADD_D 0x2000043
  814. #define MASK_FMADD_D 0x600007f
  815. #define MATCH_FMADD_H 0x4000043
  816. #define MASK_FMADD_H 0x600007f
  817. #define MATCH_FMADD_Q 0x6000043
  818. #define MASK_FMADD_Q 0x600007f
  819. #define MATCH_FMADD_S 0x43
  820. #define MASK_FMADD_S 0x600007f
  821. #define MATCH_FMAX_D 0x2a001053
  822. #define MASK_FMAX_D 0xfe00707f
  823. #define MATCH_FMAX_H 0x2c001053
  824. #define MASK_FMAX_H 0xfe00707f
  825. #define MATCH_FMAX_Q 0x2e001053
  826. #define MASK_FMAX_Q 0xfe00707f
  827. #define MATCH_FMAX_S 0x28001053
  828. #define MASK_FMAX_S 0xfe00707f
  829. #define MATCH_FMIN_D 0x2a000053
  830. #define MASK_FMIN_D 0xfe00707f
  831. #define MATCH_FMIN_H 0x2c000053
  832. #define MASK_FMIN_H 0xfe00707f
  833. #define MATCH_FMIN_Q 0x2e000053
  834. #define MASK_FMIN_Q 0xfe00707f
  835. #define MATCH_FMIN_S 0x28000053
  836. #define MASK_FMIN_S 0xfe00707f
  837. #define MATCH_FMSUB_D 0x2000047
  838. #define MASK_FMSUB_D 0x600007f
  839. #define MATCH_FMSUB_H 0x4000047
  840. #define MASK_FMSUB_H 0x600007f
  841. #define MATCH_FMSUB_Q 0x6000047
  842. #define MASK_FMSUB_Q 0x600007f
  843. #define MATCH_FMSUB_S 0x47
  844. #define MASK_FMSUB_S 0x600007f
  845. #define MATCH_FMUL_D 0x12000053
  846. #define MASK_FMUL_D 0xfe00007f
  847. #define MATCH_FMUL_H 0x14000053
  848. #define MASK_FMUL_H 0xfe00007f
  849. #define MATCH_FMUL_Q 0x16000053
  850. #define MASK_FMUL_Q 0xfe00007f
  851. #define MATCH_FMUL_S 0x10000053
  852. #define MASK_FMUL_S 0xfe00007f
  853. #define MATCH_FMV_D_X 0xf2000053
  854. #define MASK_FMV_D_X 0xfff0707f
  855. #define MATCH_FMV_H_X 0xf4000053
  856. #define MASK_FMV_H_X 0xfff0707f
  857. #define MATCH_FMV_W_X 0xf0000053
  858. #define MASK_FMV_W_X 0xfff0707f
  859. #define MATCH_FMV_X_D 0xe2000053
  860. #define MASK_FMV_X_D 0xfff0707f
  861. #define MATCH_FMV_X_H 0xe4000053
  862. #define MASK_FMV_X_H 0xfff0707f
  863. #define MATCH_FMV_X_W 0xe0000053
  864. #define MASK_FMV_X_W 0xfff0707f
  865. #define MATCH_FNMADD_D 0x200004f
  866. #define MASK_FNMADD_D 0x600007f
  867. #define MATCH_FNMADD_H 0x400004f
  868. #define MASK_FNMADD_H 0x600007f
  869. #define MATCH_FNMADD_Q 0x600004f
  870. #define MASK_FNMADD_Q 0x600007f
  871. #define MATCH_FNMADD_S 0x4f
  872. #define MASK_FNMADD_S 0x600007f
  873. #define MATCH_FNMSUB_D 0x200004b
  874. #define MASK_FNMSUB_D 0x600007f
  875. #define MATCH_FNMSUB_H 0x400004b
  876. #define MASK_FNMSUB_H 0x600007f
  877. #define MATCH_FNMSUB_Q 0x600004b
  878. #define MASK_FNMSUB_Q 0x600007f
  879. #define MATCH_FNMSUB_S 0x4b
  880. #define MASK_FNMSUB_S 0x600007f
  881. #define MATCH_FSD 0x3027
  882. #define MASK_FSD 0x707f
  883. #define MATCH_FSGNJ_D 0x22000053
  884. #define MASK_FSGNJ_D 0xfe00707f
  885. #define MATCH_FSGNJ_H 0x24000053
  886. #define MASK_FSGNJ_H 0xfe00707f
  887. #define MATCH_FSGNJ_Q 0x26000053
  888. #define MASK_FSGNJ_Q 0xfe00707f
  889. #define MATCH_FSGNJ_S 0x20000053
  890. #define MASK_FSGNJ_S 0xfe00707f
  891. #define MATCH_FSGNJN_D 0x22001053
  892. #define MASK_FSGNJN_D 0xfe00707f
  893. #define MATCH_FSGNJN_H 0x24001053
  894. #define MASK_FSGNJN_H 0xfe00707f
  895. #define MATCH_FSGNJN_Q 0x26001053
  896. #define MASK_FSGNJN_Q 0xfe00707f
  897. #define MATCH_FSGNJN_S 0x20001053
  898. #define MASK_FSGNJN_S 0xfe00707f
  899. #define MATCH_FSGNJX_D 0x22002053
  900. #define MASK_FSGNJX_D 0xfe00707f
  901. #define MATCH_FSGNJX_H 0x24002053
  902. #define MASK_FSGNJX_H 0xfe00707f
  903. #define MATCH_FSGNJX_Q 0x26002053
  904. #define MASK_FSGNJX_Q 0xfe00707f
  905. #define MATCH_FSGNJX_S 0x20002053
  906. #define MASK_FSGNJX_S 0xfe00707f
  907. #define MATCH_FSH 0x1027
  908. #define MASK_FSH 0x707f
  909. #define MATCH_FSL 0x4001033
  910. #define MASK_FSL 0x600707f
  911. #define MATCH_FSLW 0x400103b
  912. #define MASK_FSLW 0x600707f
  913. #define MATCH_FSQ 0x4027
  914. #define MASK_FSQ 0x707f
  915. #define MATCH_FSQRT_D 0x5a000053
  916. #define MASK_FSQRT_D 0xfff0007f
  917. #define MATCH_FSQRT_H 0x5c000053
  918. #define MASK_FSQRT_H 0xfff0007f
  919. #define MATCH_FSQRT_Q 0x5e000053
  920. #define MASK_FSQRT_Q 0xfff0007f
  921. #define MATCH_FSQRT_S 0x58000053
  922. #define MASK_FSQRT_S 0xfff0007f
  923. #define MATCH_FSR 0x4005033
  924. #define MASK_FSR 0x600707f
  925. #define MATCH_FSRI 0x4005013
  926. #define MASK_FSRI 0x400707f
  927. #define MATCH_FSRIW 0x400501b
  928. #define MASK_FSRIW 0x600707f
  929. #define MATCH_FSRW 0x400503b
  930. #define MASK_FSRW 0x600707f
  931. #define MATCH_FSUB_D 0xa000053
  932. #define MASK_FSUB_D 0xfe00007f
  933. #define MATCH_FSUB_H 0xc000053
  934. #define MASK_FSUB_H 0xfe00007f
  935. #define MATCH_FSUB_Q 0xe000053
  936. #define MASK_FSUB_Q 0xfe00007f
  937. #define MATCH_FSUB_S 0x8000053
  938. #define MASK_FSUB_S 0xfe00007f
  939. #define MATCH_FSW 0x2027
  940. #define MASK_FSW 0x707f
  941. #define MATCH_GORC 0x28005033
  942. #define MASK_GORC 0xfe00707f
  943. #define MATCH_GORCI 0x28005013
  944. #define MASK_GORCI 0xfc00707f
  945. #define MATCH_GORCIW 0x2800501b
  946. #define MASK_GORCIW 0xfe00707f
  947. #define MATCH_GORCW 0x2800503b
  948. #define MASK_GORCW 0xfe00707f
  949. #define MATCH_GREV 0x68005033
  950. #define MASK_GREV 0xfe00707f
  951. #define MATCH_GREVI 0x68005013
  952. #define MASK_GREVI 0xfc00707f
  953. #define MATCH_GREVIW 0x6800501b
  954. #define MASK_GREVIW 0xfe00707f
  955. #define MATCH_GREVW 0x6800503b
  956. #define MASK_GREVW 0xfe00707f
  957. #define MATCH_HFENCE_GVMA 0x62000073
  958. #define MASK_HFENCE_GVMA 0xfe007fff
  959. #define MATCH_HFENCE_VVMA 0x22000073
  960. #define MASK_HFENCE_VVMA 0xfe007fff
  961. #define MATCH_HINVAL_GVMA 0x66000073
  962. #define MASK_HINVAL_GVMA 0xfe007fff
  963. #define MATCH_HINVAL_VVMA 0x26000073
  964. #define MASK_HINVAL_VVMA 0xfe007fff
  965. #define MATCH_HLV_B 0x60004073
  966. #define MASK_HLV_B 0xfff0707f
  967. #define MATCH_HLV_BU 0x60104073
  968. #define MASK_HLV_BU 0xfff0707f
  969. #define MATCH_HLV_D 0x6c004073
  970. #define MASK_HLV_D 0xfff0707f
  971. #define MATCH_HLV_H 0x64004073
  972. #define MASK_HLV_H 0xfff0707f
  973. #define MATCH_HLV_HU 0x64104073
  974. #define MASK_HLV_HU 0xfff0707f
  975. #define MATCH_HLV_W 0x68004073
  976. #define MASK_HLV_W 0xfff0707f
  977. #define MATCH_HLV_WU 0x68104073
  978. #define MASK_HLV_WU 0xfff0707f
  979. #define MATCH_HLVX_HU 0x64304073
  980. #define MASK_HLVX_HU 0xfff0707f
  981. #define MATCH_HLVX_WU 0x68304073
  982. #define MASK_HLVX_WU 0xfff0707f
  983. #define MATCH_HSV_B 0x62004073
  984. #define MASK_HSV_B 0xfe007fff
  985. #define MATCH_HSV_D 0x6e004073
  986. #define MASK_HSV_D 0xfe007fff
  987. #define MATCH_HSV_H 0x66004073
  988. #define MASK_HSV_H 0xfe007fff
  989. #define MATCH_HSV_W 0x6a004073
  990. #define MASK_HSV_W 0xfe007fff
  991. #define MATCH_INSB 0xac000077
  992. #define MASK_INSB 0xff80707f
  993. #define MATCH_JAL 0x6f
  994. #define MASK_JAL 0x7f
  995. #define MATCH_JALR 0x67
  996. #define MASK_JALR 0x707f
  997. #define MATCH_KABS16 0xad100077
  998. #define MASK_KABS16 0xfff0707f
  999. #define MATCH_KABS32 0xad200077
  1000. #define MASK_KABS32 0xfff0707f
  1001. #define MATCH_KABS8 0xad000077
  1002. #define MASK_KABS8 0xfff0707f
  1003. #define MATCH_KABSW 0xad400077
  1004. #define MASK_KABSW 0xfff0707f
  1005. #define MATCH_KADD16 0x10000077
  1006. #define MASK_KADD16 0xfe00707f
  1007. #define MATCH_KADD32 0x10002077
  1008. #define MASK_KADD32 0xfe00707f
  1009. #define MATCH_KADD64 0x90001077
  1010. #define MASK_KADD64 0xfe00707f
  1011. #define MATCH_KADD8 0x18000077
  1012. #define MASK_KADD8 0xfe00707f
  1013. #define MATCH_KADDH 0x4001077
  1014. #define MASK_KADDH 0xfe00707f
  1015. #define MATCH_KADDW 0x1077
  1016. #define MASK_KADDW 0xfe00707f
  1017. #define MATCH_KCRAS16 0x14000077
  1018. #define MASK_KCRAS16 0xfe00707f
  1019. #define MATCH_KCRAS32 0x14002077
  1020. #define MASK_KCRAS32 0xfe00707f
  1021. #define MATCH_KCRSA16 0x16000077
  1022. #define MASK_KCRSA16 0xfe00707f
  1023. #define MATCH_KCRSA32 0x16002077
  1024. #define MASK_KCRSA32 0xfe00707f
  1025. #define MATCH_KDMABB 0xd2001077
  1026. #define MASK_KDMABB 0xfe00707f
  1027. #define MATCH_KDMABB16 0xd8001077
  1028. #define MASK_KDMABB16 0xfe00707f
  1029. #define MATCH_KDMABT 0xe2001077
  1030. #define MASK_KDMABT 0xfe00707f
  1031. #define MATCH_KDMABT16 0xe8001077
  1032. #define MASK_KDMABT16 0xfe00707f
  1033. #define MATCH_KDMATT 0xf2001077
  1034. #define MASK_KDMATT 0xfe00707f
  1035. #define MATCH_KDMATT16 0xf8001077
  1036. #define MASK_KDMATT16 0xfe00707f
  1037. #define MATCH_KDMBB 0xa001077
  1038. #define MASK_KDMBB 0xfe00707f
  1039. #define MATCH_KDMBB16 0xda001077
  1040. #define MASK_KDMBB16 0xfe00707f
  1041. #define MATCH_KDMBT 0x1a001077
  1042. #define MASK_KDMBT 0xfe00707f
  1043. #define MATCH_KDMBT16 0xea001077
  1044. #define MASK_KDMBT16 0xfe00707f
  1045. #define MATCH_KDMTT 0x2a001077
  1046. #define MASK_KDMTT 0xfe00707f
  1047. #define MATCH_KDMTT16 0xfa001077
  1048. #define MASK_KDMTT16 0xfe00707f
  1049. #define MATCH_KHM16 0x86000077
  1050. #define MASK_KHM16 0xfe00707f
  1051. #define MATCH_KHM8 0x8e000077
  1052. #define MASK_KHM8 0xfe00707f
  1053. #define MATCH_KHMBB 0xc001077
  1054. #define MASK_KHMBB 0xfe00707f
  1055. #define MATCH_KHMBB16 0xdc001077
  1056. #define MASK_KHMBB16 0xfe00707f
  1057. #define MATCH_KHMBT 0x1c001077
  1058. #define MASK_KHMBT 0xfe00707f
  1059. #define MATCH_KHMBT16 0xec001077
  1060. #define MASK_KHMBT16 0xfe00707f
  1061. #define MATCH_KHMTT 0x2c001077
  1062. #define MASK_KHMTT 0xfe00707f
  1063. #define MATCH_KHMTT16 0xfc001077
  1064. #define MASK_KHMTT16 0xfe00707f
  1065. #define MATCH_KHMX16 0x96000077
  1066. #define MASK_KHMX16 0xfe00707f
  1067. #define MATCH_KHMX8 0x9e000077
  1068. #define MASK_KHMX8 0xfe00707f
  1069. #define MATCH_KMABB 0x5a001077
  1070. #define MASK_KMABB 0xfe00707f
  1071. #define MATCH_KMABB32 0x5a002077
  1072. #define MASK_KMABB32 0xfe00707f
  1073. #define MATCH_KMABT 0x6a001077
  1074. #define MASK_KMABT 0xfe00707f
  1075. #define MATCH_KMABT32 0x6a002077
  1076. #define MASK_KMABT32 0xfe00707f
  1077. #define MATCH_KMADA 0x48001077
  1078. #define MASK_KMADA 0xfe00707f
  1079. #define MATCH_KMADRS 0x6c001077
  1080. #define MASK_KMADRS 0xfe00707f
  1081. #define MATCH_KMADRS32 0x6c002077
  1082. #define MASK_KMADRS32 0xfe00707f
  1083. #define MATCH_KMADS 0x5c001077
  1084. #define MASK_KMADS 0xfe00707f
  1085. #define MATCH_KMADS32 0x5c002077
  1086. #define MASK_KMADS32 0xfe00707f
  1087. #define MATCH_KMAR64 0x94001077
  1088. #define MASK_KMAR64 0xfe00707f
  1089. #define MATCH_KMATT 0x7a001077
  1090. #define MASK_KMATT 0xfe00707f
  1091. #define MATCH_KMATT32 0x7a002077
  1092. #define MASK_KMATT32 0xfe00707f
  1093. #define MATCH_KMAXDA 0x4a001077
  1094. #define MASK_KMAXDA 0xfe00707f
  1095. #define MATCH_KMAXDA32 0x4a002077
  1096. #define MASK_KMAXDA32 0xfe00707f
  1097. #define MATCH_KMAXDS 0x7c001077
  1098. #define MASK_KMAXDS 0xfe00707f
  1099. #define MATCH_KMAXDS32 0x7c002077
  1100. #define MASK_KMAXDS32 0xfe00707f
  1101. #define MATCH_KMDA 0x38001077
  1102. #define MASK_KMDA 0xfe00707f
  1103. #define MATCH_KMDA32 0x38002077
  1104. #define MASK_KMDA32 0xfe00707f
  1105. #define MATCH_KMMAC 0x60001077
  1106. #define MASK_KMMAC 0xfe00707f
  1107. #define MATCH_KMMAC_U 0x70001077
  1108. #define MASK_KMMAC_U 0xfe00707f
  1109. #define MATCH_KMMAWB 0x46001077
  1110. #define MASK_KMMAWB 0xfe00707f
  1111. #define MATCH_KMMAWB2 0xce001077
  1112. #define MASK_KMMAWB2 0xfe00707f
  1113. #define MATCH_KMMAWB2_U 0xde001077
  1114. #define MASK_KMMAWB2_U 0xfe00707f
  1115. #define MATCH_KMMAWB_U 0x56001077
  1116. #define MASK_KMMAWB_U 0xfe00707f
  1117. #define MATCH_KMMAWT 0x66001077
  1118. #define MASK_KMMAWT 0xfe00707f
  1119. #define MATCH_KMMAWT2 0xee001077
  1120. #define MASK_KMMAWT2 0xfe00707f
  1121. #define MATCH_KMMAWT2_U 0xfe001077
  1122. #define MASK_KMMAWT2_U 0xfe00707f
  1123. #define MATCH_KMMAWT_U 0x76001077
  1124. #define MASK_KMMAWT_U 0xfe00707f
  1125. #define MATCH_KMMSB 0x42001077
  1126. #define MASK_KMMSB 0xfe00707f
  1127. #define MATCH_KMMSB_U 0x52001077
  1128. #define MASK_KMMSB_U 0xfe00707f
  1129. #define MATCH_KMMWB2 0x8e001077
  1130. #define MASK_KMMWB2 0xfe00707f
  1131. #define MATCH_KMMWB2_U 0x9e001077
  1132. #define MASK_KMMWB2_U 0xfe00707f
  1133. #define MATCH_KMMWT2 0xae001077
  1134. #define MASK_KMMWT2 0xfe00707f
  1135. #define MATCH_KMMWT2_U 0xbe001077
  1136. #define MASK_KMMWT2_U 0xfe00707f
  1137. #define MATCH_KMSDA 0x4c001077
  1138. #define MASK_KMSDA 0xfe00707f
  1139. #define MATCH_KMSDA32 0x4c002077
  1140. #define MASK_KMSDA32 0xfe00707f
  1141. #define MATCH_KMSR64 0x96001077
  1142. #define MASK_KMSR64 0xfe00707f
  1143. #define MATCH_KMSXDA 0x4e001077
  1144. #define MASK_KMSXDA 0xfe00707f
  1145. #define MATCH_KMSXDA32 0x4e002077
  1146. #define MASK_KMSXDA32 0xfe00707f
  1147. #define MATCH_KMXDA 0x3a001077
  1148. #define MASK_KMXDA 0xfe00707f
  1149. #define MATCH_KMXDA32 0x3a002077
  1150. #define MASK_KMXDA32 0xfe00707f
  1151. #define MATCH_KSLL16 0x64000077
  1152. #define MASK_KSLL16 0xfe00707f
  1153. #define MATCH_KSLL32 0x64002077
  1154. #define MASK_KSLL32 0xfe00707f
  1155. #define MATCH_KSLL8 0x6c000077
  1156. #define MASK_KSLL8 0xfe00707f
  1157. #define MATCH_KSLLI16 0x75000077
  1158. #define MASK_KSLLI16 0xff00707f
  1159. #define MATCH_KSLLI32 0x84002077
  1160. #define MASK_KSLLI32 0xfe00707f
  1161. #define MATCH_KSLLI8 0x7c800077
  1162. #define MASK_KSLLI8 0xff80707f
  1163. #define MATCH_KSLLIW 0x36001077
  1164. #define MASK_KSLLIW 0xfe00707f
  1165. #define MATCH_KSLLW 0x26001077
  1166. #define MASK_KSLLW 0xfe00707f
  1167. #define MATCH_KSLRA16 0x56000077
  1168. #define MASK_KSLRA16 0xfe00707f
  1169. #define MATCH_KSLRA16_U 0x66000077
  1170. #define MASK_KSLRA16_U 0xfe00707f
  1171. #define MATCH_KSLRA32 0x56002077
  1172. #define MASK_KSLRA32 0xfe00707f
  1173. #define MATCH_KSLRA32_U 0x66002077
  1174. #define MASK_KSLRA32_U 0xfe00707f
  1175. #define MATCH_KSLRA8 0x5e000077
  1176. #define MASK_KSLRA8 0xfe00707f
  1177. #define MATCH_KSLRA8_U 0x6e000077
  1178. #define MASK_KSLRA8_U 0xfe00707f
  1179. #define MATCH_KSLRAW 0x6e001077
  1180. #define MASK_KSLRAW 0xfe00707f
  1181. #define MATCH_KSLRAW_U 0x7e001077
  1182. #define MASK_KSLRAW_U 0xfe00707f
  1183. #define MATCH_KSTAS16 0xc4002077
  1184. #define MASK_KSTAS16 0xfe00707f
  1185. #define MATCH_KSTAS32 0xc0002077
  1186. #define MASK_KSTAS32 0xfe00707f
  1187. #define MATCH_KSTSA16 0xc6002077
  1188. #define MASK_KSTSA16 0xfe00707f
  1189. #define MATCH_KSTSA32 0xc2002077
  1190. #define MASK_KSTSA32 0xfe00707f
  1191. #define MATCH_KSUB16 0x12000077
  1192. #define MASK_KSUB16 0xfe00707f
  1193. #define MATCH_KSUB32 0x12002077
  1194. #define MASK_KSUB32 0xfe00707f
  1195. #define MATCH_KSUB64 0x92001077
  1196. #define MASK_KSUB64 0xfe00707f
  1197. #define MATCH_KSUB8 0x1a000077
  1198. #define MASK_KSUB8 0xfe00707f
  1199. #define MATCH_KSUBH 0x6001077
  1200. #define MASK_KSUBH 0xfe00707f
  1201. #define MATCH_KSUBW 0x2001077
  1202. #define MASK_KSUBW 0xfe00707f
  1203. #define MATCH_KWMMUL 0x62001077
  1204. #define MASK_KWMMUL 0xfe00707f
  1205. #define MATCH_KWMMUL_U 0x72001077
  1206. #define MASK_KWMMUL_U 0xfe00707f
  1207. #define MATCH_LB 0x3
  1208. #define MASK_LB 0x707f
  1209. #define MATCH_LBU 0x4003
  1210. #define MASK_LBU 0x707f
  1211. #define MATCH_LD 0x3003
  1212. #define MASK_LD 0x707f
  1213. #define MATCH_LH 0x1003
  1214. #define MASK_LH 0x707f
  1215. #define MATCH_LHU 0x5003
  1216. #define MASK_LHU 0x707f
  1217. #define MATCH_LR_D 0x1000302f
  1218. #define MASK_LR_D 0xf9f0707f
  1219. #define MATCH_LR_W 0x1000202f
  1220. #define MASK_LR_W 0xf9f0707f
  1221. #define MATCH_LUI 0x37
  1222. #define MASK_LUI 0x7f
  1223. #define MATCH_LW 0x2003
  1224. #define MASK_LW 0x707f
  1225. #define MATCH_LWU 0x6003
  1226. #define MASK_LWU 0x707f
  1227. #define MATCH_MADDR32 0xc4001077
  1228. #define MASK_MADDR32 0xfe00707f
  1229. #define MATCH_MAX 0xa006033
  1230. #define MASK_MAX 0xfe00707f
  1231. #define MATCH_MAXU 0xa007033
  1232. #define MASK_MAXU 0xfe00707f
  1233. #define MATCH_MIN 0xa004033
  1234. #define MASK_MIN 0xfe00707f
  1235. #define MATCH_MINU 0xa005033
  1236. #define MASK_MINU 0xfe00707f
  1237. #define MATCH_MRET 0x30200073
  1238. #define MASK_MRET 0xffffffff
  1239. #define MATCH_MSUBR32 0xc6001077
  1240. #define MASK_MSUBR32 0xfe00707f
  1241. #define MATCH_MUL 0x2000033
  1242. #define MASK_MUL 0xfe00707f
  1243. #define MATCH_MULH 0x2001033
  1244. #define MASK_MULH 0xfe00707f
  1245. #define MATCH_MULHSU 0x2002033
  1246. #define MASK_MULHSU 0xfe00707f
  1247. #define MATCH_MULHU 0x2003033
  1248. #define MASK_MULHU 0xfe00707f
  1249. #define MATCH_MULR64 0xf0001077
  1250. #define MASK_MULR64 0xfe00707f
  1251. #define MATCH_MULSR64 0xe0001077
  1252. #define MASK_MULSR64 0xfe00707f
  1253. #define MATCH_MULW 0x200003b
  1254. #define MASK_MULW 0xfe00707f
  1255. #define MATCH_OR 0x6033
  1256. #define MASK_OR 0xfe00707f
  1257. #define MATCH_ORI 0x6013
  1258. #define MASK_ORI 0x707f
  1259. #define MATCH_ORN 0x40006033
  1260. #define MASK_ORN 0xfe00707f
  1261. #define MATCH_PACK 0x8004033
  1262. #define MASK_PACK 0xfe00707f
  1263. #define MATCH_PACKH 0x8007033
  1264. #define MASK_PACKH 0xfe00707f
  1265. #define MATCH_PACKU 0x48004033
  1266. #define MASK_PACKU 0xfe00707f
  1267. #define MATCH_PACKUW 0x4800403b
  1268. #define MASK_PACKUW 0xfe00707f
  1269. #define MATCH_PACKW 0x800403b
  1270. #define MASK_PACKW 0xfe00707f
  1271. #define MATCH_PAUSE 0x100000f
  1272. #define MASK_PAUSE 0xffffffff
  1273. #define MATCH_PBSAD 0xfc000077
  1274. #define MASK_PBSAD 0xfe00707f
  1275. #define MATCH_PBSADA 0xfe000077
  1276. #define MASK_PBSADA 0xfe00707f
  1277. #define MATCH_PKBB16 0xe001077
  1278. #define MASK_PKBB16 0xfe00707f
  1279. #define MATCH_PKBT16 0x1e001077
  1280. #define MASK_PKBT16 0xfe00707f
  1281. #define MATCH_PKBT32 0x1e002077
  1282. #define MASK_PKBT32 0xfe00707f
  1283. #define MATCH_PKTB16 0x3e001077
  1284. #define MASK_PKTB16 0xfe00707f
  1285. #define MATCH_PKTB32 0x3e002077
  1286. #define MASK_PKTB32 0xfe00707f
  1287. #define MATCH_PKTT16 0x2e001077
  1288. #define MASK_PKTT16 0xfe00707f
  1289. #define MATCH_PREFETCH_I 0x6013
  1290. #define MASK_PREFETCH_I 0x1f07fff
  1291. #define MATCH_PREFETCH_R 0x106013
  1292. #define MASK_PREFETCH_R 0x1f07fff
  1293. #define MATCH_PREFETCH_W 0x306013
  1294. #define MASK_PREFETCH_W 0x1f07fff
  1295. #define MATCH_RADD16 0x77
  1296. #define MASK_RADD16 0xfe00707f
  1297. #define MATCH_RADD32 0x2077
  1298. #define MASK_RADD32 0xfe00707f
  1299. #define MATCH_RADD64 0x80001077
  1300. #define MASK_RADD64 0xfe00707f
  1301. #define MATCH_RADD8 0x8000077
  1302. #define MASK_RADD8 0xfe00707f
  1303. #define MATCH_RADDW 0x20001077
  1304. #define MASK_RADDW 0xfe00707f
  1305. #define MATCH_RCRAS16 0x4000077
  1306. #define MASK_RCRAS16 0xfe00707f
  1307. #define MATCH_RCRAS32 0x4002077
  1308. #define MASK_RCRAS32 0xfe00707f
  1309. #define MATCH_RCRSA16 0x6000077
  1310. #define MASK_RCRSA16 0xfe00707f
  1311. #define MATCH_RCRSA32 0x6002077
  1312. #define MASK_RCRSA32 0xfe00707f
  1313. #define MATCH_REM 0x2006033
  1314. #define MASK_REM 0xfe00707f
  1315. #define MATCH_REMU 0x2007033
  1316. #define MASK_REMU 0xfe00707f
  1317. #define MATCH_REMUW 0x200703b
  1318. #define MASK_REMUW 0xfe00707f
  1319. #define MATCH_REMW 0x200603b
  1320. #define MASK_REMW 0xfe00707f
  1321. #define MATCH_ROL 0x60001033
  1322. #define MASK_ROL 0xfe00707f
  1323. #define MATCH_ROLW 0x6000103b
  1324. #define MASK_ROLW 0xfe00707f
  1325. #define MATCH_ROR 0x60005033
  1326. #define MASK_ROR 0xfe00707f
  1327. #define MATCH_RORI 0x60005013
  1328. #define MASK_RORI 0xfc00707f
  1329. #define MATCH_RORIW 0x6000501b
  1330. #define MASK_RORIW 0xfe00707f
  1331. #define MATCH_RORW 0x6000503b
  1332. #define MASK_RORW 0xfe00707f
  1333. #define MATCH_RSTAS16 0xb4002077
  1334. #define MASK_RSTAS16 0xfe00707f
  1335. #define MATCH_RSTAS32 0xb0002077
  1336. #define MASK_RSTAS32 0xfe00707f
  1337. #define MATCH_RSTSA16 0xb6002077
  1338. #define MASK_RSTSA16 0xfe00707f
  1339. #define MATCH_RSTSA32 0xb2002077
  1340. #define MASK_RSTSA32 0xfe00707f
  1341. #define MATCH_RSUB16 0x2000077
  1342. #define MASK_RSUB16 0xfe00707f
  1343. #define MATCH_RSUB32 0x2002077
  1344. #define MASK_RSUB32 0xfe00707f
  1345. #define MATCH_RSUB64 0x82001077
  1346. #define MASK_RSUB64 0xfe00707f
  1347. #define MATCH_RSUB8 0xa000077
  1348. #define MASK_RSUB8 0xfe00707f
  1349. #define MATCH_RSUBW 0x22001077
  1350. #define MASK_RSUBW 0xfe00707f
  1351. #define MATCH_SB 0x23
  1352. #define MASK_SB 0x707f
  1353. #define MATCH_SC_D 0x1800302f
  1354. #define MASK_SC_D 0xf800707f
  1355. #define MATCH_SC_W 0x1800202f
  1356. #define MASK_SC_W 0xf800707f
  1357. #define MATCH_SCLIP16 0x84000077
  1358. #define MASK_SCLIP16 0xff00707f
  1359. #define MATCH_SCLIP32 0xe4000077
  1360. #define MASK_SCLIP32 0xfe00707f
  1361. #define MATCH_SCLIP8 0x8c000077
  1362. #define MASK_SCLIP8 0xff80707f
  1363. #define MATCH_SCMPLE16 0x1c000077
  1364. #define MASK_SCMPLE16 0xfe00707f
  1365. #define MATCH_SCMPLE8 0x1e000077
  1366. #define MASK_SCMPLE8 0xfe00707f
  1367. #define MATCH_SCMPLT16 0xc000077
  1368. #define MASK_SCMPLT16 0xfe00707f
  1369. #define MATCH_SCMPLT8 0xe000077
  1370. #define MASK_SCMPLT8 0xfe00707f
  1371. #define MATCH_SD 0x3023
  1372. #define MASK_SD 0x707f
  1373. #define MATCH_SEXT_B 0x60401013
  1374. #define MASK_SEXT_B 0xfff0707f
  1375. #define MATCH_SEXT_H 0x60501013
  1376. #define MASK_SEXT_H 0xfff0707f
  1377. #define MATCH_SFENCE_INVAL_IR 0x18100073
  1378. #define MASK_SFENCE_INVAL_IR 0xffffffff
  1379. #define MATCH_SFENCE_VMA 0x12000073
  1380. #define MASK_SFENCE_VMA 0xfe007fff
  1381. #define MATCH_SFENCE_W_INVAL 0x18000073
  1382. #define MASK_SFENCE_W_INVAL 0xffffffff
  1383. #define MATCH_SH 0x1023
  1384. #define MASK_SH 0x707f
  1385. #define MATCH_SH1ADD 0x20002033
  1386. #define MASK_SH1ADD 0xfe00707f
  1387. #define MATCH_SH1ADD_UW 0x2000203b
  1388. #define MASK_SH1ADD_UW 0xfe00707f
  1389. #define MATCH_SH2ADD 0x20004033
  1390. #define MASK_SH2ADD 0xfe00707f
  1391. #define MATCH_SH2ADD_UW 0x2000403b
  1392. #define MASK_SH2ADD_UW 0xfe00707f
  1393. #define MATCH_SH3ADD 0x20006033
  1394. #define MASK_SH3ADD 0xfe00707f
  1395. #define MATCH_SH3ADD_UW 0x2000603b
  1396. #define MASK_SH3ADD_UW 0xfe00707f
  1397. #define MATCH_SHA256SIG0 0x10201013
  1398. #define MASK_SHA256SIG0 0xfff0707f
  1399. #define MATCH_SHA256SIG1 0x10301013
  1400. #define MASK_SHA256SIG1 0xfff0707f
  1401. #define MATCH_SHA256SUM0 0x10001013
  1402. #define MASK_SHA256SUM0 0xfff0707f
  1403. #define MATCH_SHA256SUM1 0x10101013
  1404. #define MASK_SHA256SUM1 0xfff0707f
  1405. #define MATCH_SHA512SIG0 0x10601013
  1406. #define MASK_SHA512SIG0 0xfff0707f
  1407. #define MATCH_SHA512SIG0H 0x5c000033
  1408. #define MASK_SHA512SIG0H 0xfe00707f
  1409. #define MATCH_SHA512SIG0L 0x54000033
  1410. #define MASK_SHA512SIG0L 0xfe00707f
  1411. #define MATCH_SHA512SIG1 0x10701013
  1412. #define MASK_SHA512SIG1 0xfff0707f
  1413. #define MATCH_SHA512SIG1H 0x5e000033
  1414. #define MASK_SHA512SIG1H 0xfe00707f
  1415. #define MATCH_SHA512SIG1L 0x56000033
  1416. #define MASK_SHA512SIG1L 0xfe00707f
  1417. #define MATCH_SHA512SUM0 0x10401013
  1418. #define MASK_SHA512SUM0 0xfff0707f
  1419. #define MATCH_SHA512SUM0R 0x50000033
  1420. #define MASK_SHA512SUM0R 0xfe00707f
  1421. #define MATCH_SHA512SUM1 0x10501013
  1422. #define MASK_SHA512SUM1 0xfff0707f
  1423. #define MATCH_SHA512SUM1R 0x52000033
  1424. #define MASK_SHA512SUM1R 0xfe00707f
  1425. #define MATCH_SHFL 0x8001033
  1426. #define MASK_SHFL 0xfe00707f
  1427. #define MATCH_SHFLI 0x8001013
  1428. #define MASK_SHFLI 0xfe00707f
  1429. #define MATCH_SHFLW 0x800103b
  1430. #define MASK_SHFLW 0xfe00707f
  1431. #define MATCH_SINVAL_VMA 0x16000073
  1432. #define MASK_SINVAL_VMA 0xfe007fff
  1433. #define MATCH_SLL 0x1033
  1434. #define MASK_SLL 0xfe00707f
  1435. #define MATCH_SLL16 0x54000077
  1436. #define MASK_SLL16 0xfe00707f
  1437. #define MATCH_SLL32 0x54002077
  1438. #define MASK_SLL32 0xfe00707f
  1439. #define MATCH_SLL8 0x5c000077
  1440. #define MASK_SLL8 0xfe00707f
  1441. #define MATCH_SLLI 0x1013
  1442. #define MASK_SLLI 0xfc00707f
  1443. #define MATCH_SLLI16 0x74000077
  1444. #define MASK_SLLI16 0xff00707f
  1445. #define MATCH_SLLI32 0x74002077
  1446. #define MASK_SLLI32 0xfe00707f
  1447. #define MATCH_SLLI8 0x7c000077
  1448. #define MASK_SLLI8 0xff80707f
  1449. #define MATCH_SLLI_RV32 0x1013
  1450. #define MASK_SLLI_RV32 0xfe00707f
  1451. #define MATCH_SLLI_UW 0x800101b
  1452. #define MASK_SLLI_UW 0xfc00707f
  1453. #define MATCH_SLLIW 0x101b
  1454. #define MASK_SLLIW 0xfe00707f
  1455. #define MATCH_SLLW 0x103b
  1456. #define MASK_SLLW 0xfe00707f
  1457. #define MATCH_SLO 0x20001033
  1458. #define MASK_SLO 0xfe00707f
  1459. #define MATCH_SLOI 0x20001013
  1460. #define MASK_SLOI 0xfc00707f
  1461. #define MATCH_SLOIW 0x2000101b
  1462. #define MASK_SLOIW 0xfe00707f
  1463. #define MATCH_SLOW 0x2000103b
  1464. #define MASK_SLOW 0xfe00707f
  1465. #define MATCH_SLT 0x2033
  1466. #define MASK_SLT 0xfe00707f
  1467. #define MATCH_SLTI 0x2013
  1468. #define MASK_SLTI 0x707f
  1469. #define MATCH_SLTIU 0x3013
  1470. #define MASK_SLTIU 0x707f
  1471. #define MATCH_SLTU 0x3033
  1472. #define MASK_SLTU 0xfe00707f
  1473. #define MATCH_SM3P0 0x10801013
  1474. #define MASK_SM3P0 0xfff0707f
  1475. #define MATCH_SM3P1 0x10901013
  1476. #define MASK_SM3P1 0xfff0707f
  1477. #define MATCH_SM4ED 0x30000033
  1478. #define MASK_SM4ED 0x3e00707f
  1479. #define MATCH_SM4KS 0x34000033
  1480. #define MASK_SM4KS 0x3e00707f
  1481. #define MATCH_SMAL 0x5e001077
  1482. #define MASK_SMAL 0xfe00707f
  1483. #define MATCH_SMALBB 0x88001077
  1484. #define MASK_SMALBB 0xfe00707f
  1485. #define MATCH_SMALBT 0x98001077
  1486. #define MASK_SMALBT 0xfe00707f
  1487. #define MATCH_SMALDA 0x8c001077
  1488. #define MASK_SMALDA 0xfe00707f
  1489. #define MATCH_SMALDRS 0x9a001077
  1490. #define MASK_SMALDRS 0xfe00707f
  1491. #define MATCH_SMALDS 0x8a001077
  1492. #define MASK_SMALDS 0xfe00707f
  1493. #define MATCH_SMALTT 0xa8001077
  1494. #define MASK_SMALTT 0xfe00707f
  1495. #define MATCH_SMALXDA 0x9c001077
  1496. #define MASK_SMALXDA 0xfe00707f
  1497. #define MATCH_SMALXDS 0xaa001077
  1498. #define MASK_SMALXDS 0xfe00707f
  1499. #define MATCH_SMAQA 0xc8000077
  1500. #define MASK_SMAQA 0xfe00707f
  1501. #define MATCH_SMAQA_SU 0xca000077
  1502. #define MASK_SMAQA_SU 0xfe00707f
  1503. #define MATCH_SMAR64 0x84001077
  1504. #define MASK_SMAR64 0xfe00707f
  1505. #define MATCH_SMAX16 0x82000077
  1506. #define MASK_SMAX16 0xfe00707f
  1507. #define MATCH_SMAX32 0x92002077
  1508. #define MASK_SMAX32 0xfe00707f
  1509. #define MATCH_SMAX8 0x8a000077
  1510. #define MASK_SMAX8 0xfe00707f
  1511. #define MATCH_SMBB16 0x8001077
  1512. #define MASK_SMBB16 0xfe00707f
  1513. #define MATCH_SMBT16 0x18001077
  1514. #define MASK_SMBT16 0xfe00707f
  1515. #define MATCH_SMBT32 0x18002077
  1516. #define MASK_SMBT32 0xfe00707f
  1517. #define MATCH_SMDRS 0x68001077
  1518. #define MASK_SMDRS 0xfe00707f
  1519. #define MATCH_SMDRS32 0x68002077
  1520. #define MASK_SMDRS32 0xfe00707f
  1521. #define MATCH_SMDS 0x58001077
  1522. #define MASK_SMDS 0xfe00707f
  1523. #define MATCH_SMDS32 0x58002077
  1524. #define MASK_SMDS32 0xfe00707f
  1525. #define MATCH_SMIN16 0x80000077
  1526. #define MASK_SMIN16 0xfe00707f
  1527. #define MATCH_SMIN32 0x90002077
  1528. #define MASK_SMIN32 0xfe00707f
  1529. #define MATCH_SMIN8 0x88000077
  1530. #define MASK_SMIN8 0xfe00707f
  1531. #define MATCH_SMMUL 0x40001077
  1532. #define MASK_SMMUL 0xfe00707f
  1533. #define MATCH_SMMUL_U 0x50001077
  1534. #define MASK_SMMUL_U 0xfe00707f
  1535. #define MATCH_SMMWB 0x44001077
  1536. #define MASK_SMMWB 0xfe00707f
  1537. #define MATCH_SMMWB_U 0x54001077
  1538. #define MASK_SMMWB_U 0xfe00707f
  1539. #define MATCH_SMMWT 0x64001077
  1540. #define MASK_SMMWT 0xfe00707f
  1541. #define MATCH_SMMWT_U 0x74001077
  1542. #define MASK_SMMWT_U 0xfe00707f
  1543. #define MATCH_SMSLDA 0xac001077
  1544. #define MASK_SMSLDA 0xfe00707f
  1545. #define MATCH_SMSLXDA 0xbc001077
  1546. #define MASK_SMSLXDA 0xfe00707f
  1547. #define MATCH_SMSR64 0x86001077
  1548. #define MASK_SMSR64 0xfe00707f
  1549. #define MATCH_SMTT16 0x28001077
  1550. #define MASK_SMTT16 0xfe00707f
  1551. #define MATCH_SMTT32 0x28002077
  1552. #define MASK_SMTT32 0xfe00707f
  1553. #define MATCH_SMUL16 0xa0000077
  1554. #define MASK_SMUL16 0xfe00707f
  1555. #define MATCH_SMUL8 0xa8000077
  1556. #define MASK_SMUL8 0xfe00707f
  1557. #define MATCH_SMULX16 0xa2000077
  1558. #define MASK_SMULX16 0xfe00707f
  1559. #define MATCH_SMULX8 0xaa000077
  1560. #define MASK_SMULX8 0xfe00707f
  1561. #define MATCH_SMXDS 0x78001077
  1562. #define MASK_SMXDS 0xfe00707f
  1563. #define MATCH_SMXDS32 0x78002077
  1564. #define MASK_SMXDS32 0xfe00707f
  1565. #define MATCH_SRA 0x40005033
  1566. #define MASK_SRA 0xfe00707f
  1567. #define MATCH_SRA16 0x50000077
  1568. #define MASK_SRA16 0xfe00707f
  1569. #define MATCH_SRA16_U 0x60000077
  1570. #define MASK_SRA16_U 0xfe00707f
  1571. #define MATCH_SRA32 0x50002077
  1572. #define MASK_SRA32 0xfe00707f
  1573. #define MATCH_SRA32_U 0x60002077
  1574. #define MASK_SRA32_U 0xfe00707f
  1575. #define MATCH_SRA8 0x58000077
  1576. #define MASK_SRA8 0xfe00707f
  1577. #define MATCH_SRA8_U 0x68000077
  1578. #define MASK_SRA8_U 0xfe00707f
  1579. #define MATCH_SRA_U 0x24001077
  1580. #define MASK_SRA_U 0xfe00707f
  1581. #define MATCH_SRAI 0x40005013
  1582. #define MASK_SRAI 0xfc00707f
  1583. #define MATCH_SRAI16 0x70000077
  1584. #define MASK_SRAI16 0xff00707f
  1585. #define MATCH_SRAI16_U 0x71000077
  1586. #define MASK_SRAI16_U 0xff00707f
  1587. #define MATCH_SRAI32 0x70002077
  1588. #define MASK_SRAI32 0xfe00707f
  1589. #define MATCH_SRAI32_U 0x80002077
  1590. #define MASK_SRAI32_U 0xfe00707f
  1591. #define MATCH_SRAI8 0x78000077
  1592. #define MASK_SRAI8 0xff80707f
  1593. #define MATCH_SRAI8_U 0x78800077
  1594. #define MASK_SRAI8_U 0xff80707f
  1595. #define MATCH_SRAI_RV32 0x40005013
  1596. #define MASK_SRAI_RV32 0xfe00707f
  1597. #define MATCH_SRAI_U 0xd4001077
  1598. #define MASK_SRAI_U 0xfc00707f
  1599. #define MATCH_SRAIW 0x4000501b
  1600. #define MASK_SRAIW 0xfe00707f
  1601. #define MATCH_SRAIW_U 0x34001077
  1602. #define MASK_SRAIW_U 0xfe00707f
  1603. #define MATCH_SRAW 0x4000503b
  1604. #define MASK_SRAW 0xfe00707f
  1605. #define MATCH_SRET 0x10200073
  1606. #define MASK_SRET 0xffffffff
  1607. #define MATCH_SRL 0x5033
  1608. #define MASK_SRL 0xfe00707f
  1609. #define MATCH_SRL16 0x52000077
  1610. #define MASK_SRL16 0xfe00707f
  1611. #define MATCH_SRL16_U 0x62000077
  1612. #define MASK_SRL16_U 0xfe00707f
  1613. #define MATCH_SRL32 0x52002077
  1614. #define MASK_SRL32 0xfe00707f
  1615. #define MATCH_SRL32_U 0x62002077
  1616. #define MASK_SRL32_U 0xfe00707f
  1617. #define MATCH_SRL8 0x5a000077
  1618. #define MASK_SRL8 0xfe00707f
  1619. #define MATCH_SRL8_U 0x6a000077
  1620. #define MASK_SRL8_U 0xfe00707f
  1621. #define MATCH_SRLI 0x5013
  1622. #define MASK_SRLI 0xfc00707f
  1623. #define MATCH_SRLI16 0x72000077
  1624. #define MASK_SRLI16 0xff00707f
  1625. #define MATCH_SRLI16_U 0x73000077
  1626. #define MASK_SRLI16_U 0xff00707f
  1627. #define MATCH_SRLI32 0x72002077
  1628. #define MASK_SRLI32 0xfe00707f
  1629. #define MATCH_SRLI32_U 0x82002077
  1630. #define MASK_SRLI32_U 0xfe00707f
  1631. #define MATCH_SRLI8 0x7a000077
  1632. #define MASK_SRLI8 0xff80707f
  1633. #define MATCH_SRLI8_U 0x7a800077
  1634. #define MASK_SRLI8_U 0xff80707f
  1635. #define MATCH_SRLI_RV32 0x5013
  1636. #define MASK_SRLI_RV32 0xfe00707f
  1637. #define MATCH_SRLIW 0x501b
  1638. #define MASK_SRLIW 0xfe00707f
  1639. #define MATCH_SRLW 0x503b
  1640. #define MASK_SRLW 0xfe00707f
  1641. #define MATCH_SRO 0x20005033
  1642. #define MASK_SRO 0xfe00707f
  1643. #define MATCH_SROI 0x20005013
  1644. #define MASK_SROI 0xfc00707f
  1645. #define MATCH_SROIW 0x2000501b
  1646. #define MASK_SROIW 0xfe00707f
  1647. #define MATCH_SROW 0x2000503b
  1648. #define MASK_SROW 0xfe00707f
  1649. #define MATCH_STAS16 0xf4002077
  1650. #define MASK_STAS16 0xfe00707f
  1651. #define MATCH_STAS32 0xf0002077
  1652. #define MASK_STAS32 0xfe00707f
  1653. #define MATCH_STSA16 0xf6002077
  1654. #define MASK_STSA16 0xfe00707f
  1655. #define MATCH_STSA32 0xf2002077
  1656. #define MASK_STSA32 0xfe00707f
  1657. #define MATCH_SUB 0x40000033
  1658. #define MASK_SUB 0xfe00707f
  1659. #define MATCH_SUB16 0x42000077
  1660. #define MASK_SUB16 0xfe00707f
  1661. #define MATCH_SUB32 0x42002077
  1662. #define MASK_SUB32 0xfe00707f
  1663. #define MATCH_SUB64 0xc2001077
  1664. #define MASK_SUB64 0xfe00707f
  1665. #define MATCH_SUB8 0x4a000077
  1666. #define MASK_SUB8 0xfe00707f
  1667. #define MATCH_SUBW 0x4000003b
  1668. #define MASK_SUBW 0xfe00707f
  1669. #define MATCH_SUNPKD810 0xac800077
  1670. #define MASK_SUNPKD810 0xfff0707f
  1671. #define MATCH_SUNPKD820 0xac900077
  1672. #define MASK_SUNPKD820 0xfff0707f
  1673. #define MATCH_SUNPKD830 0xaca00077
  1674. #define MASK_SUNPKD830 0xfff0707f
  1675. #define MATCH_SUNPKD831 0xacb00077
  1676. #define MASK_SUNPKD831 0xfff0707f
  1677. #define MATCH_SUNPKD832 0xad300077
  1678. #define MASK_SUNPKD832 0xfff0707f
  1679. #define MATCH_SW 0x2023
  1680. #define MASK_SW 0x707f
  1681. #define MATCH_UCLIP16 0x85000077
  1682. #define MASK_UCLIP16 0xff00707f
  1683. #define MATCH_UCLIP32 0xf4000077
  1684. #define MASK_UCLIP32 0xfe00707f
  1685. #define MATCH_UCLIP8 0x8d000077
  1686. #define MASK_UCLIP8 0xff80707f
  1687. #define MATCH_UCMPLE16 0x3c000077
  1688. #define MASK_UCMPLE16 0xfe00707f
  1689. #define MATCH_UCMPLE8 0x3e000077
  1690. #define MASK_UCMPLE8 0xfe00707f
  1691. #define MATCH_UCMPLT16 0x2c000077
  1692. #define MASK_UCMPLT16 0xfe00707f
  1693. #define MATCH_UCMPLT8 0x2e000077
  1694. #define MASK_UCMPLT8 0xfe00707f
  1695. #define MATCH_UKADD16 0x30000077
  1696. #define MASK_UKADD16 0xfe00707f
  1697. #define MATCH_UKADD32 0x30002077
  1698. #define MASK_UKADD32 0xfe00707f
  1699. #define MATCH_UKADD64 0xb0001077
  1700. #define MASK_UKADD64 0xfe00707f
  1701. #define MATCH_UKADD8 0x38000077
  1702. #define MASK_UKADD8 0xfe00707f
  1703. #define MATCH_UKADDH 0x14001077
  1704. #define MASK_UKADDH 0xfe00707f
  1705. #define MATCH_UKADDW 0x10001077
  1706. #define MASK_UKADDW 0xfe00707f
  1707. #define MATCH_UKCRAS16 0x34000077
  1708. #define MASK_UKCRAS16 0xfe00707f
  1709. #define MATCH_UKCRAS32 0x34002077
  1710. #define MASK_UKCRAS32 0xfe00707f
  1711. #define MATCH_UKCRSA16 0x36000077
  1712. #define MASK_UKCRSA16 0xfe00707f
  1713. #define MATCH_UKCRSA32 0x36002077
  1714. #define MASK_UKCRSA32 0xfe00707f
  1715. #define MATCH_UKMAR64 0xb4001077
  1716. #define MASK_UKMAR64 0xfe00707f
  1717. #define MATCH_UKMSR64 0xb6001077
  1718. #define MASK_UKMSR64 0xfe00707f
  1719. #define MATCH_UKSTAS16 0xe4002077
  1720. #define MASK_UKSTAS16 0xfe00707f
  1721. #define MATCH_UKSTAS32 0xe0002077
  1722. #define MASK_UKSTAS32 0xfe00707f
  1723. #define MATCH_UKSTSA16 0xe6002077
  1724. #define MASK_UKSTSA16 0xfe00707f
  1725. #define MATCH_UKSTSA32 0xe2002077
  1726. #define MASK_UKSTSA32 0xfe00707f
  1727. #define MATCH_UKSUB16 0x32000077
  1728. #define MASK_UKSUB16 0xfe00707f
  1729. #define MATCH_UKSUB32 0x32002077
  1730. #define MASK_UKSUB32 0xfe00707f
  1731. #define MATCH_UKSUB64 0xb2001077
  1732. #define MASK_UKSUB64 0xfe00707f
  1733. #define MATCH_UKSUB8 0x3a000077
  1734. #define MASK_UKSUB8 0xfe00707f
  1735. #define MATCH_UKSUBH 0x16001077
  1736. #define MASK_UKSUBH 0xfe00707f
  1737. #define MATCH_UKSUBW 0x12001077
  1738. #define MASK_UKSUBW 0xfe00707f
  1739. #define MATCH_UMAQA 0xcc000077
  1740. #define MASK_UMAQA 0xfe00707f
  1741. #define MATCH_UMAR64 0xa4001077
  1742. #define MASK_UMAR64 0xfe00707f
  1743. #define MATCH_UMAX16 0x92000077
  1744. #define MASK_UMAX16 0xfe00707f
  1745. #define MATCH_UMAX32 0xa2002077
  1746. #define MASK_UMAX32 0xfe00707f
  1747. #define MATCH_UMAX8 0x9a000077
  1748. #define MASK_UMAX8 0xfe00707f
  1749. #define MATCH_UMIN16 0x90000077
  1750. #define MASK_UMIN16 0xfe00707f
  1751. #define MATCH_UMIN32 0xa0002077
  1752. #define MASK_UMIN32 0xfe00707f
  1753. #define MATCH_UMIN8 0x98000077
  1754. #define MASK_UMIN8 0xfe00707f
  1755. #define MATCH_UMSR64 0xa6001077
  1756. #define MASK_UMSR64 0xfe00707f
  1757. #define MATCH_UMUL16 0xb0000077
  1758. #define MASK_UMUL16 0xfe00707f
  1759. #define MATCH_UMUL8 0xb8000077
  1760. #define MASK_UMUL8 0xfe00707f
  1761. #define MATCH_UMULX16 0xb2000077
  1762. #define MASK_UMULX16 0xfe00707f
  1763. #define MATCH_UMULX8 0xba000077
  1764. #define MASK_UMULX8 0xfe00707f
  1765. #define MATCH_UNSHFL 0x8005033
  1766. #define MASK_UNSHFL 0xfe00707f
  1767. #define MATCH_UNSHFLI 0x8005013
  1768. #define MASK_UNSHFLI 0xfe00707f
  1769. #define MATCH_UNSHFLW 0x800503b
  1770. #define MASK_UNSHFLW 0xfe00707f
  1771. #define MATCH_URADD16 0x20000077
  1772. #define MASK_URADD16 0xfe00707f
  1773. #define MATCH_URADD32 0x20002077
  1774. #define MASK_URADD32 0xfe00707f
  1775. #define MATCH_URADD64 0xa0001077
  1776. #define MASK_URADD64 0xfe00707f
  1777. #define MATCH_URADD8 0x28000077
  1778. #define MASK_URADD8 0xfe00707f
  1779. #define MATCH_URADDW 0x30001077
  1780. #define MASK_URADDW 0xfe00707f
  1781. #define MATCH_URCRAS16 0x24000077
  1782. #define MASK_URCRAS16 0xfe00707f
  1783. #define MATCH_URCRAS32 0x24002077
  1784. #define MASK_URCRAS32 0xfe00707f
  1785. #define MATCH_URCRSA16 0x26000077
  1786. #define MASK_URCRSA16 0xfe00707f
  1787. #define MATCH_URCRSA32 0x26002077
  1788. #define MASK_URCRSA32 0xfe00707f
  1789. #define MATCH_URSTAS16 0xd4002077
  1790. #define MASK_URSTAS16 0xfe00707f
  1791. #define MATCH_URSTAS32 0xd0002077
  1792. #define MASK_URSTAS32 0xfe00707f
  1793. #define MATCH_URSTSA16 0xd6002077
  1794. #define MASK_URSTSA16 0xfe00707f
  1795. #define MATCH_URSTSA32 0xd2002077
  1796. #define MASK_URSTSA32 0xfe00707f
  1797. #define MATCH_URSUB16 0x22000077
  1798. #define MASK_URSUB16 0xfe00707f
  1799. #define MATCH_URSUB32 0x22002077
  1800. #define MASK_URSUB32 0xfe00707f
  1801. #define MATCH_URSUB64 0xa2001077
  1802. #define MASK_URSUB64 0xfe00707f
  1803. #define MATCH_URSUB8 0x2a000077
  1804. #define MASK_URSUB8 0xfe00707f
  1805. #define MATCH_URSUBW 0x32001077
  1806. #define MASK_URSUBW 0xfe00707f
  1807. #define MATCH_VAADD_VV 0x24002057
  1808. #define MASK_VAADD_VV 0xfc00707f
  1809. #define MATCH_VAADD_VX 0x24006057
  1810. #define MASK_VAADD_VX 0xfc00707f
  1811. #define MATCH_VAADDU_VV 0x20002057
  1812. #define MASK_VAADDU_VV 0xfc00707f
  1813. #define MATCH_VAADDU_VX 0x20006057
  1814. #define MASK_VAADDU_VX 0xfc00707f
  1815. #define MATCH_VADC_VIM 0x40003057
  1816. #define MASK_VADC_VIM 0xfe00707f
  1817. #define MATCH_VADC_VVM 0x40000057
  1818. #define MASK_VADC_VVM 0xfe00707f
  1819. #define MATCH_VADC_VXM 0x40004057
  1820. #define MASK_VADC_VXM 0xfe00707f
  1821. #define MATCH_VADD_VI 0x3057
  1822. #define MASK_VADD_VI 0xfc00707f
  1823. #define MATCH_VADD_VV 0x57
  1824. #define MASK_VADD_VV 0xfc00707f
  1825. #define MATCH_VADD_VX 0x4057
  1826. #define MASK_VADD_VX 0xfc00707f
  1827. #define MATCH_VAMOADDEI16_V 0x502f
  1828. #define MASK_VAMOADDEI16_V 0xf800707f
  1829. #define MATCH_VAMOADDEI32_V 0x602f
  1830. #define MASK_VAMOADDEI32_V 0xf800707f
  1831. #define MATCH_VAMOADDEI64_V 0x702f
  1832. #define MASK_VAMOADDEI64_V 0xf800707f
  1833. #define MATCH_VAMOADDEI8_V 0x2f
  1834. #define MASK_VAMOADDEI8_V 0xf800707f
  1835. #define MATCH_VAMOANDEI16_V 0x6000502f
  1836. #define MASK_VAMOANDEI16_V 0xf800707f
  1837. #define MATCH_VAMOANDEI32_V 0x6000602f
  1838. #define MASK_VAMOANDEI32_V 0xf800707f
  1839. #define MATCH_VAMOANDEI64_V 0x6000702f
  1840. #define MASK_VAMOANDEI64_V 0xf800707f
  1841. #define MATCH_VAMOANDEI8_V 0x6000002f
  1842. #define MASK_VAMOANDEI8_V 0xf800707f
  1843. #define MATCH_VAMOMAXEI16_V 0xa000502f
  1844. #define MASK_VAMOMAXEI16_V 0xf800707f
  1845. #define MATCH_VAMOMAXEI32_V 0xa000602f
  1846. #define MASK_VAMOMAXEI32_V 0xf800707f
  1847. #define MATCH_VAMOMAXEI64_V 0xa000702f
  1848. #define MASK_VAMOMAXEI64_V 0xf800707f
  1849. #define MATCH_VAMOMAXEI8_V 0xa000002f
  1850. #define MASK_VAMOMAXEI8_V 0xf800707f
  1851. #define MATCH_VAMOMAXUEI16_V 0xe000502f
  1852. #define MASK_VAMOMAXUEI16_V 0xf800707f
  1853. #define MATCH_VAMOMAXUEI32_V 0xe000602f
  1854. #define MASK_VAMOMAXUEI32_V 0xf800707f
  1855. #define MATCH_VAMOMAXUEI64_V 0xe000702f
  1856. #define MASK_VAMOMAXUEI64_V 0xf800707f
  1857. #define MATCH_VAMOMAXUEI8_V 0xe000002f
  1858. #define MASK_VAMOMAXUEI8_V 0xf800707f
  1859. #define MATCH_VAMOMINEI16_V 0x8000502f
  1860. #define MASK_VAMOMINEI16_V 0xf800707f
  1861. #define MATCH_VAMOMINEI32_V 0x8000602f
  1862. #define MASK_VAMOMINEI32_V 0xf800707f
  1863. #define MATCH_VAMOMINEI64_V 0x8000702f
  1864. #define MASK_VAMOMINEI64_V 0xf800707f
  1865. #define MATCH_VAMOMINEI8_V 0x8000002f
  1866. #define MASK_VAMOMINEI8_V 0xf800707f
  1867. #define MATCH_VAMOMINUEI16_V 0xc000502f
  1868. #define MASK_VAMOMINUEI16_V 0xf800707f
  1869. #define MATCH_VAMOMINUEI32_V 0xc000602f
  1870. #define MASK_VAMOMINUEI32_V 0xf800707f
  1871. #define MATCH_VAMOMINUEI64_V 0xc000702f
  1872. #define MASK_VAMOMINUEI64_V 0xf800707f
  1873. #define MATCH_VAMOMINUEI8_V 0xc000002f
  1874. #define MASK_VAMOMINUEI8_V 0xf800707f
  1875. #define MATCH_VAMOOREI16_V 0x4000502f
  1876. #define MASK_VAMOOREI16_V 0xf800707f
  1877. #define MATCH_VAMOOREI32_V 0x4000602f
  1878. #define MASK_VAMOOREI32_V 0xf800707f
  1879. #define MATCH_VAMOOREI64_V 0x4000702f
  1880. #define MASK_VAMOOREI64_V 0xf800707f
  1881. #define MATCH_VAMOOREI8_V 0x4000002f
  1882. #define MASK_VAMOOREI8_V 0xf800707f
  1883. #define MATCH_VAMOSWAPEI16_V 0x800502f
  1884. #define MASK_VAMOSWAPEI16_V 0xf800707f
  1885. #define MATCH_VAMOSWAPEI32_V 0x800602f
  1886. #define MASK_VAMOSWAPEI32_V 0xf800707f
  1887. #define MATCH_VAMOSWAPEI64_V 0x800702f
  1888. #define MASK_VAMOSWAPEI64_V 0xf800707f
  1889. #define MATCH_VAMOSWAPEI8_V 0x800002f
  1890. #define MASK_VAMOSWAPEI8_V 0xf800707f
  1891. #define MATCH_VAMOXOREI16_V 0x2000502f
  1892. #define MASK_VAMOXOREI16_V 0xf800707f
  1893. #define MATCH_VAMOXOREI32_V 0x2000602f
  1894. #define MASK_VAMOXOREI32_V 0xf800707f
  1895. #define MATCH_VAMOXOREI64_V 0x2000702f
  1896. #define MASK_VAMOXOREI64_V 0xf800707f
  1897. #define MATCH_VAMOXOREI8_V 0x2000002f
  1898. #define MASK_VAMOXOREI8_V 0xf800707f
  1899. #define MATCH_VAND_VI 0x24003057
  1900. #define MASK_VAND_VI 0xfc00707f
  1901. #define MATCH_VAND_VV 0x24000057
  1902. #define MASK_VAND_VV 0xfc00707f
  1903. #define MATCH_VAND_VX 0x24004057
  1904. #define MASK_VAND_VX 0xfc00707f
  1905. #define MATCH_VASUB_VV 0x2c002057
  1906. #define MASK_VASUB_VV 0xfc00707f
  1907. #define MATCH_VASUB_VX 0x2c006057
  1908. #define MASK_VASUB_VX 0xfc00707f
  1909. #define MATCH_VASUBU_VV 0x28002057
  1910. #define MASK_VASUBU_VV 0xfc00707f
  1911. #define MATCH_VASUBU_VX 0x28006057
  1912. #define MASK_VASUBU_VX 0xfc00707f
  1913. #define MATCH_VCOMPRESS_VM 0x5e002057
  1914. #define MASK_VCOMPRESS_VM 0xfe00707f
  1915. #define MATCH_VCPOP_M 0x40082057
  1916. #define MASK_VCPOP_M 0xfc0ff07f
  1917. #define MATCH_VDIV_VV 0x84002057
  1918. #define MASK_VDIV_VV 0xfc00707f
  1919. #define MATCH_VDIV_VX 0x84006057
  1920. #define MASK_VDIV_VX 0xfc00707f
  1921. #define MATCH_VDIVU_VV 0x80002057
  1922. #define MASK_VDIVU_VV 0xfc00707f
  1923. #define MATCH_VDIVU_VX 0x80006057
  1924. #define MASK_VDIVU_VX 0xfc00707f
  1925. #define MATCH_VFADD_VF 0x5057
  1926. #define MASK_VFADD_VF 0xfc00707f
  1927. #define MATCH_VFADD_VV 0x1057
  1928. #define MASK_VFADD_VV 0xfc00707f
  1929. #define MATCH_VFCLASS_V 0x4c081057
  1930. #define MASK_VFCLASS_V 0xfc0ff07f
  1931. #define MATCH_VFCVT_F_X_V 0x48019057
  1932. #define MASK_VFCVT_F_X_V 0xfc0ff07f
  1933. #define MATCH_VFCVT_F_XU_V 0x48011057
  1934. #define MASK_VFCVT_F_XU_V 0xfc0ff07f
  1935. #define MATCH_VFCVT_RTZ_X_F_V 0x48039057
  1936. #define MASK_VFCVT_RTZ_X_F_V 0xfc0ff07f
  1937. #define MATCH_VFCVT_RTZ_XU_F_V 0x48031057
  1938. #define MASK_VFCVT_RTZ_XU_F_V 0xfc0ff07f
  1939. #define MATCH_VFCVT_X_F_V 0x48009057
  1940. #define MASK_VFCVT_X_F_V 0xfc0ff07f
  1941. #define MATCH_VFCVT_XU_F_V 0x48001057
  1942. #define MASK_VFCVT_XU_F_V 0xfc0ff07f
  1943. #define MATCH_VFDIV_VF 0x80005057
  1944. #define MASK_VFDIV_VF 0xfc00707f
  1945. #define MATCH_VFDIV_VV 0x80001057
  1946. #define MASK_VFDIV_VV 0xfc00707f
  1947. #define MATCH_VFIRST_M 0x4008a057
  1948. #define MASK_VFIRST_M 0xfc0ff07f
  1949. #define MATCH_VFMACC_VF 0xb0005057
  1950. #define MASK_VFMACC_VF 0xfc00707f
  1951. #define MATCH_VFMACC_VV 0xb0001057
  1952. #define MASK_VFMACC_VV 0xfc00707f
  1953. #define MATCH_VFMADD_VF 0xa0005057
  1954. #define MASK_VFMADD_VF 0xfc00707f
  1955. #define MATCH_VFMADD_VV 0xa0001057
  1956. #define MASK_VFMADD_VV 0xfc00707f
  1957. #define MATCH_VFMAX_VF 0x18005057
  1958. #define MASK_VFMAX_VF 0xfc00707f
  1959. #define MATCH_VFMAX_VV 0x18001057
  1960. #define MASK_VFMAX_VV 0xfc00707f
  1961. #define MATCH_VFMERGE_VFM 0x5c005057
  1962. #define MASK_VFMERGE_VFM 0xfe00707f
  1963. #define MATCH_VFMIN_VF 0x10005057
  1964. #define MASK_VFMIN_VF 0xfc00707f
  1965. #define MATCH_VFMIN_VV 0x10001057
  1966. #define MASK_VFMIN_VV 0xfc00707f
  1967. #define MATCH_VFMSAC_VF 0xb8005057
  1968. #define MASK_VFMSAC_VF 0xfc00707f
  1969. #define MATCH_VFMSAC_VV 0xb8001057
  1970. #define MASK_VFMSAC_VV 0xfc00707f
  1971. #define MATCH_VFMSUB_VF 0xa8005057
  1972. #define MASK_VFMSUB_VF 0xfc00707f
  1973. #define MATCH_VFMSUB_VV 0xa8001057
  1974. #define MASK_VFMSUB_VV 0xfc00707f
  1975. #define MATCH_VFMUL_VF 0x90005057
  1976. #define MASK_VFMUL_VF 0xfc00707f
  1977. #define MATCH_VFMUL_VV 0x90001057
  1978. #define MASK_VFMUL_VV 0xfc00707f
  1979. #define MATCH_VFMV_F_S 0x42001057
  1980. #define MASK_VFMV_F_S 0xfe0ff07f
  1981. #define MATCH_VFMV_S_F 0x42005057
  1982. #define MASK_VFMV_S_F 0xfff0707f
  1983. #define MATCH_VFMV_V_F 0x5e005057
  1984. #define MASK_VFMV_V_F 0xfff0707f
  1985. #define MATCH_VFNCVT_F_F_W 0x480a1057
  1986. #define MASK_VFNCVT_F_F_W 0xfc0ff07f
  1987. #define MATCH_VFNCVT_F_X_W 0x48099057
  1988. #define MASK_VFNCVT_F_X_W 0xfc0ff07f
  1989. #define MATCH_VFNCVT_F_XU_W 0x48091057
  1990. #define MASK_VFNCVT_F_XU_W 0xfc0ff07f
  1991. #define MATCH_VFNCVT_ROD_F_F_W 0x480a9057
  1992. #define MASK_VFNCVT_ROD_F_F_W 0xfc0ff07f
  1993. #define MATCH_VFNCVT_RTZ_X_F_W 0x480b9057
  1994. #define MASK_VFNCVT_RTZ_X_F_W 0xfc0ff07f
  1995. #define MATCH_VFNCVT_RTZ_XU_F_W 0x480b1057
  1996. #define MASK_VFNCVT_RTZ_XU_F_W 0xfc0ff07f
  1997. #define MATCH_VFNCVT_X_F_W 0x48089057
  1998. #define MASK_VFNCVT_X_F_W 0xfc0ff07f
  1999. #define MATCH_VFNCVT_XU_F_W 0x48081057
  2000. #define MASK_VFNCVT_XU_F_W 0xfc0ff07f
  2001. #define MATCH_VFNMACC_VF 0xb4005057
  2002. #define MASK_VFNMACC_VF 0xfc00707f
  2003. #define MATCH_VFNMACC_VV 0xb4001057
  2004. #define MASK_VFNMACC_VV 0xfc00707f
  2005. #define MATCH_VFNMADD_VF 0xa4005057
  2006. #define MASK_VFNMADD_VF 0xfc00707f
  2007. #define MATCH_VFNMADD_VV 0xa4001057
  2008. #define MASK_VFNMADD_VV 0xfc00707f
  2009. #define MATCH_VFNMSAC_VF 0xbc005057
  2010. #define MASK_VFNMSAC_VF 0xfc00707f
  2011. #define MATCH_VFNMSAC_VV 0xbc001057
  2012. #define MASK_VFNMSAC_VV 0xfc00707f
  2013. #define MATCH_VFNMSUB_VF 0xac005057
  2014. #define MASK_VFNMSUB_VF 0xfc00707f
  2015. #define MATCH_VFNMSUB_VV 0xac001057
  2016. #define MASK_VFNMSUB_VV 0xfc00707f
  2017. #define MATCH_VFRDIV_VF 0x84005057
  2018. #define MASK_VFRDIV_VF 0xfc00707f
  2019. #define MATCH_VFREC7_V 0x4c029057
  2020. #define MASK_VFREC7_V 0xfc0ff07f
  2021. #define MATCH_VFREDMAX_VS 0x1c001057
  2022. #define MASK_VFREDMAX_VS 0xfc00707f
  2023. #define MATCH_VFREDMIN_VS 0x14001057
  2024. #define MASK_VFREDMIN_VS 0xfc00707f
  2025. #define MATCH_VFREDOSUM_VS 0xc001057
  2026. #define MASK_VFREDOSUM_VS 0xfc00707f
  2027. #define MATCH_VFREDUSUM_VS 0x4001057
  2028. #define MASK_VFREDUSUM_VS 0xfc00707f
  2029. #define MATCH_VFRSQRT7_V 0x4c021057
  2030. #define MASK_VFRSQRT7_V 0xfc0ff07f
  2031. #define MATCH_VFRSUB_VF 0x9c005057
  2032. #define MASK_VFRSUB_VF 0xfc00707f
  2033. #define MATCH_VFSGNJ_VF 0x20005057
  2034. #define MASK_VFSGNJ_VF 0xfc00707f
  2035. #define MATCH_VFSGNJ_VV 0x20001057
  2036. #define MASK_VFSGNJ_VV 0xfc00707f
  2037. #define MATCH_VFSGNJN_VF 0x24005057
  2038. #define MASK_VFSGNJN_VF 0xfc00707f
  2039. #define MATCH_VFSGNJN_VV 0x24001057
  2040. #define MASK_VFSGNJN_VV 0xfc00707f
  2041. #define MATCH_VFSGNJX_VF 0x28005057
  2042. #define MASK_VFSGNJX_VF 0xfc00707f
  2043. #define MATCH_VFSGNJX_VV 0x28001057
  2044. #define MASK_VFSGNJX_VV 0xfc00707f
  2045. #define MATCH_VFSLIDE1DOWN_VF 0x3c005057
  2046. #define MASK_VFSLIDE1DOWN_VF 0xfc00707f
  2047. #define MATCH_VFSLIDE1UP_VF 0x38005057
  2048. #define MASK_VFSLIDE1UP_VF 0xfc00707f
  2049. #define MATCH_VFSQRT_V 0x4c001057
  2050. #define MASK_VFSQRT_V 0xfc0ff07f
  2051. #define MATCH_VFSUB_VF 0x8005057
  2052. #define MASK_VFSUB_VF 0xfc00707f
  2053. #define MATCH_VFSUB_VV 0x8001057
  2054. #define MASK_VFSUB_VV 0xfc00707f
  2055. #define MATCH_VFWADD_VF 0xc0005057
  2056. #define MASK_VFWADD_VF 0xfc00707f
  2057. #define MATCH_VFWADD_VV 0xc0001057
  2058. #define MASK_VFWADD_VV 0xfc00707f
  2059. #define MATCH_VFWADD_WF 0xd0005057
  2060. #define MASK_VFWADD_WF 0xfc00707f
  2061. #define MATCH_VFWADD_WV 0xd0001057
  2062. #define MASK_VFWADD_WV 0xfc00707f
  2063. #define MATCH_VFWCVT_F_F_V 0x48061057
  2064. #define MASK_VFWCVT_F_F_V 0xfc0ff07f
  2065. #define MATCH_VFWCVT_F_X_V 0x48059057
  2066. #define MASK_VFWCVT_F_X_V 0xfc0ff07f
  2067. #define MATCH_VFWCVT_F_XU_V 0x48051057
  2068. #define MASK_VFWCVT_F_XU_V 0xfc0ff07f
  2069. #define MATCH_VFWCVT_RTZ_X_F_V 0x48079057
  2070. #define MASK_VFWCVT_RTZ_X_F_V 0xfc0ff07f
  2071. #define MATCH_VFWCVT_RTZ_XU_F_V 0x48071057
  2072. #define MASK_VFWCVT_RTZ_XU_F_V 0xfc0ff07f
  2073. #define MATCH_VFWCVT_X_F_V 0x48049057
  2074. #define MASK_VFWCVT_X_F_V 0xfc0ff07f
  2075. #define MATCH_VFWCVT_XU_F_V 0x48041057
  2076. #define MASK_VFWCVT_XU_F_V 0xfc0ff07f
  2077. #define MATCH_VFWMACC_VF 0xf0005057
  2078. #define MASK_VFWMACC_VF 0xfc00707f
  2079. #define MATCH_VFWMACC_VV 0xf0001057
  2080. #define MASK_VFWMACC_VV 0xfc00707f
  2081. #define MATCH_VFWMSAC_VF 0xf8005057
  2082. #define MASK_VFWMSAC_VF 0xfc00707f
  2083. #define MATCH_VFWMSAC_VV 0xf8001057
  2084. #define MASK_VFWMSAC_VV 0xfc00707f
  2085. #define MATCH_VFWMUL_VF 0xe0005057
  2086. #define MASK_VFWMUL_VF 0xfc00707f
  2087. #define MATCH_VFWMUL_VV 0xe0001057
  2088. #define MASK_VFWMUL_VV 0xfc00707f
  2089. #define MATCH_VFWNMACC_VF 0xf4005057
  2090. #define MASK_VFWNMACC_VF 0xfc00707f
  2091. #define MATCH_VFWNMACC_VV 0xf4001057
  2092. #define MASK_VFWNMACC_VV 0xfc00707f
  2093. #define MATCH_VFWNMSAC_VF 0xfc005057
  2094. #define MASK_VFWNMSAC_VF 0xfc00707f
  2095. #define MATCH_VFWNMSAC_VV 0xfc001057
  2096. #define MASK_VFWNMSAC_VV 0xfc00707f
  2097. #define MATCH_VFWREDOSUM_VS 0xcc001057
  2098. #define MASK_VFWREDOSUM_VS 0xfc00707f
  2099. #define MATCH_VFWREDUSUM_VS 0xc4001057
  2100. #define MASK_VFWREDUSUM_VS 0xfc00707f
  2101. #define MATCH_VFWSUB_VF 0xc8005057
  2102. #define MASK_VFWSUB_VF 0xfc00707f
  2103. #define MATCH_VFWSUB_VV 0xc8001057
  2104. #define MASK_VFWSUB_VV 0xfc00707f
  2105. #define MATCH_VFWSUB_WF 0xd8005057
  2106. #define MASK_VFWSUB_WF 0xfc00707f
  2107. #define MATCH_VFWSUB_WV 0xd8001057
  2108. #define MASK_VFWSUB_WV 0xfc00707f
  2109. #define MATCH_VID_V 0x5008a057
  2110. #define MASK_VID_V 0xfdfff07f
  2111. #define MATCH_VIOTA_M 0x50082057
  2112. #define MASK_VIOTA_M 0xfc0ff07f
  2113. #define MATCH_VL1RE16_V 0x2805007
  2114. #define MASK_VL1RE16_V 0xfff0707f
  2115. #define MATCH_VL1RE32_V 0x2806007
  2116. #define MASK_VL1RE32_V 0xfff0707f
  2117. #define MATCH_VL1RE64_V 0x2807007
  2118. #define MASK_VL1RE64_V 0xfff0707f
  2119. #define MATCH_VL1RE8_V 0x2800007
  2120. #define MASK_VL1RE8_V 0xfff0707f
  2121. #define MATCH_VL2RE16_V 0x22805007
  2122. #define MASK_VL2RE16_V 0xfff0707f
  2123. #define MATCH_VL2RE32_V 0x22806007
  2124. #define MASK_VL2RE32_V 0xfff0707f
  2125. #define MATCH_VL2RE64_V 0x22807007
  2126. #define MASK_VL2RE64_V 0xfff0707f
  2127. #define MATCH_VL2RE8_V 0x22800007
  2128. #define MASK_VL2RE8_V 0xfff0707f
  2129. #define MATCH_VL4RE16_V 0x62805007
  2130. #define MASK_VL4RE16_V 0xfff0707f
  2131. #define MATCH_VL4RE32_V 0x62806007
  2132. #define MASK_VL4RE32_V 0xfff0707f
  2133. #define MATCH_VL4RE64_V 0x62807007
  2134. #define MASK_VL4RE64_V 0xfff0707f
  2135. #define MATCH_VL4RE8_V 0x62800007
  2136. #define MASK_VL4RE8_V 0xfff0707f
  2137. #define MATCH_VL8RE16_V 0xe2805007
  2138. #define MASK_VL8RE16_V 0xfff0707f
  2139. #define MATCH_VL8RE32_V 0xe2806007
  2140. #define MASK_VL8RE32_V 0xfff0707f
  2141. #define MATCH_VL8RE64_V 0xe2807007
  2142. #define MASK_VL8RE64_V 0xfff0707f
  2143. #define MATCH_VL8RE8_V 0xe2800007
  2144. #define MASK_VL8RE8_V 0xfff0707f
  2145. #define MATCH_VLE1024_V 0x10007007
  2146. #define MASK_VLE1024_V 0x1df0707f
  2147. #define MATCH_VLE1024FF_V 0x11007007
  2148. #define MASK_VLE1024FF_V 0x1df0707f
  2149. #define MATCH_VLE128_V 0x10000007
  2150. #define MASK_VLE128_V 0x1df0707f
  2151. #define MATCH_VLE128FF_V 0x11000007
  2152. #define MASK_VLE128FF_V 0x1df0707f
  2153. #define MATCH_VLE16_V 0x5007
  2154. #define MASK_VLE16_V 0x1df0707f
  2155. #define MATCH_VLE16FF_V 0x1005007
  2156. #define MASK_VLE16FF_V 0x1df0707f
  2157. #define MATCH_VLE256_V 0x10005007
  2158. #define MASK_VLE256_V 0x1df0707f
  2159. #define MATCH_VLE256FF_V 0x11005007
  2160. #define MASK_VLE256FF_V 0x1df0707f
  2161. #define MATCH_VLE32_V 0x6007
  2162. #define MASK_VLE32_V 0x1df0707f
  2163. #define MATCH_VLE32FF_V 0x1006007
  2164. #define MASK_VLE32FF_V 0x1df0707f
  2165. #define MATCH_VLE512_V 0x10006007
  2166. #define MASK_VLE512_V 0x1df0707f
  2167. #define MATCH_VLE512FF_V 0x11006007
  2168. #define MASK_VLE512FF_V 0x1df0707f
  2169. #define MATCH_VLE64_V 0x7007
  2170. #define MASK_VLE64_V 0x1df0707f
  2171. #define MATCH_VLE64FF_V 0x1007007
  2172. #define MASK_VLE64FF_V 0x1df0707f
  2173. #define MATCH_VLE8_V 0x7
  2174. #define MASK_VLE8_V 0x1df0707f
  2175. #define MATCH_VLE8FF_V 0x1000007
  2176. #define MASK_VLE8FF_V 0x1df0707f
  2177. #define MATCH_VLM_V 0x2b00007
  2178. #define MASK_VLM_V 0xfff0707f
  2179. #define MATCH_VLOXEI1024_V 0x1c007007
  2180. #define MASK_VLOXEI1024_V 0x1c00707f
  2181. #define MATCH_VLOXEI128_V 0x1c000007
  2182. #define MASK_VLOXEI128_V 0x1c00707f
  2183. #define MATCH_VLOXEI16_V 0xc005007
  2184. #define MASK_VLOXEI16_V 0x1c00707f
  2185. #define MATCH_VLOXEI256_V 0x1c005007
  2186. #define MASK_VLOXEI256_V 0x1c00707f
  2187. #define MATCH_VLOXEI32_V 0xc006007
  2188. #define MASK_VLOXEI32_V 0x1c00707f
  2189. #define MATCH_VLOXEI512_V 0x1c006007
  2190. #define MASK_VLOXEI512_V 0x1c00707f
  2191. #define MATCH_VLOXEI64_V 0xc007007
  2192. #define MASK_VLOXEI64_V 0x1c00707f
  2193. #define MATCH_VLOXEI8_V 0xc000007
  2194. #define MASK_VLOXEI8_V 0x1c00707f
  2195. #define MATCH_VLSE1024_V 0x18007007
  2196. #define MASK_VLSE1024_V 0x1c00707f
  2197. #define MATCH_VLSE128_V 0x18000007
  2198. #define MASK_VLSE128_V 0x1c00707f
  2199. #define MATCH_VLSE16_V 0x8005007
  2200. #define MASK_VLSE16_V 0x1c00707f
  2201. #define MATCH_VLSE256_V 0x18005007
  2202. #define MASK_VLSE256_V 0x1c00707f
  2203. #define MATCH_VLSE32_V 0x8006007
  2204. #define MASK_VLSE32_V 0x1c00707f
  2205. #define MATCH_VLSE512_V 0x18006007
  2206. #define MASK_VLSE512_V 0x1c00707f
  2207. #define MATCH_VLSE64_V 0x8007007
  2208. #define MASK_VLSE64_V 0x1c00707f
  2209. #define MATCH_VLSE8_V 0x8000007
  2210. #define MASK_VLSE8_V 0x1c00707f
  2211. #define MATCH_VLUXEI1024_V 0x14007007
  2212. #define MASK_VLUXEI1024_V 0x1c00707f
  2213. #define MATCH_VLUXEI128_V 0x14000007
  2214. #define MASK_VLUXEI128_V 0x1c00707f
  2215. #define MATCH_VLUXEI16_V 0x4005007
  2216. #define MASK_VLUXEI16_V 0x1c00707f
  2217. #define MATCH_VLUXEI256_V 0x14005007
  2218. #define MASK_VLUXEI256_V 0x1c00707f
  2219. #define MATCH_VLUXEI32_V 0x4006007
  2220. #define MASK_VLUXEI32_V 0x1c00707f
  2221. #define MATCH_VLUXEI512_V 0x14006007
  2222. #define MASK_VLUXEI512_V 0x1c00707f
  2223. #define MATCH_VLUXEI64_V 0x4007007
  2224. #define MASK_VLUXEI64_V 0x1c00707f
  2225. #define MATCH_VLUXEI8_V 0x4000007
  2226. #define MASK_VLUXEI8_V 0x1c00707f
  2227. #define MATCH_VMACC_VV 0xb4002057
  2228. #define MASK_VMACC_VV 0xfc00707f
  2229. #define MATCH_VMACC_VX 0xb4006057
  2230. #define MASK_VMACC_VX 0xfc00707f
  2231. #define MATCH_VMADC_VI 0x46003057
  2232. #define MASK_VMADC_VI 0xfe00707f
  2233. #define MATCH_VMADC_VIM 0x44003057
  2234. #define MASK_VMADC_VIM 0xfe00707f
  2235. #define MATCH_VMADC_VV 0x46000057
  2236. #define MASK_VMADC_VV 0xfe00707f
  2237. #define MATCH_VMADC_VVM 0x44000057
  2238. #define MASK_VMADC_VVM 0xfe00707f
  2239. #define MATCH_VMADC_VX 0x46004057
  2240. #define MASK_VMADC_VX 0xfe00707f
  2241. #define MATCH_VMADC_VXM 0x44004057
  2242. #define MASK_VMADC_VXM 0xfe00707f
  2243. #define MATCH_VMADD_VV 0xa4002057
  2244. #define MASK_VMADD_VV 0xfc00707f
  2245. #define MATCH_VMADD_VX 0xa4006057
  2246. #define MASK_VMADD_VX 0xfc00707f
  2247. #define MATCH_VMAND_MM 0x64002057
  2248. #define MASK_VMAND_MM 0xfc00707f
  2249. #define MATCH_VMANDN_MM 0x60002057
  2250. #define MASK_VMANDN_MM 0xfc00707f
  2251. #define MATCH_VMAX_VV 0x1c000057
  2252. #define MASK_VMAX_VV 0xfc00707f
  2253. #define MATCH_VMAX_VX 0x1c004057
  2254. #define MASK_VMAX_VX 0xfc00707f
  2255. #define MATCH_VMAXU_VV 0x18000057
  2256. #define MASK_VMAXU_VV 0xfc00707f
  2257. #define MATCH_VMAXU_VX 0x18004057
  2258. #define MASK_VMAXU_VX 0xfc00707f
  2259. #define MATCH_VMERGE_VIM 0x5c003057
  2260. #define MASK_VMERGE_VIM 0xfe00707f
  2261. #define MATCH_VMERGE_VVM 0x5c000057
  2262. #define MASK_VMERGE_VVM 0xfe00707f
  2263. #define MATCH_VMERGE_VXM 0x5c004057
  2264. #define MASK_VMERGE_VXM 0xfe00707f
  2265. #define MATCH_VMFEQ_VF 0x60005057
  2266. #define MASK_VMFEQ_VF 0xfc00707f
  2267. #define MATCH_VMFEQ_VV 0x60001057
  2268. #define MASK_VMFEQ_VV 0xfc00707f
  2269. #define MATCH_VMFGE_VF 0x7c005057
  2270. #define MASK_VMFGE_VF 0xfc00707f
  2271. #define MATCH_VMFGT_VF 0x74005057
  2272. #define MASK_VMFGT_VF 0xfc00707f
  2273. #define MATCH_VMFLE_VF 0x64005057
  2274. #define MASK_VMFLE_VF 0xfc00707f
  2275. #define MATCH_VMFLE_VV 0x64001057
  2276. #define MASK_VMFLE_VV 0xfc00707f
  2277. #define MATCH_VMFLT_VF 0x6c005057
  2278. #define MASK_VMFLT_VF 0xfc00707f
  2279. #define MATCH_VMFLT_VV 0x6c001057
  2280. #define MASK_VMFLT_VV 0xfc00707f
  2281. #define MATCH_VMFNE_VF 0x70005057
  2282. #define MASK_VMFNE_VF 0xfc00707f
  2283. #define MATCH_VMFNE_VV 0x70001057
  2284. #define MASK_VMFNE_VV 0xfc00707f
  2285. #define MATCH_VMIN_VV 0x14000057
  2286. #define MASK_VMIN_VV 0xfc00707f
  2287. #define MATCH_VMIN_VX 0x14004057
  2288. #define MASK_VMIN_VX 0xfc00707f
  2289. #define MATCH_VMINU_VV 0x10000057
  2290. #define MASK_VMINU_VV 0xfc00707f
  2291. #define MATCH_VMINU_VX 0x10004057
  2292. #define MASK_VMINU_VX 0xfc00707f
  2293. #define MATCH_VMNAND_MM 0x74002057
  2294. #define MASK_VMNAND_MM 0xfc00707f
  2295. #define MATCH_VMNOR_MM 0x78002057
  2296. #define MASK_VMNOR_MM 0xfc00707f
  2297. #define MATCH_VMOR_MM 0x68002057
  2298. #define MASK_VMOR_MM 0xfc00707f
  2299. #define MATCH_VMORN_MM 0x70002057
  2300. #define MASK_VMORN_MM 0xfc00707f
  2301. #define MATCH_VMSBC_VV 0x4e000057
  2302. #define MASK_VMSBC_VV 0xfe00707f
  2303. #define MATCH_VMSBC_VVM 0x4c000057
  2304. #define MASK_VMSBC_VVM 0xfe00707f
  2305. #define MATCH_VMSBC_VX 0x4e004057
  2306. #define MASK_VMSBC_VX 0xfe00707f
  2307. #define MATCH_VMSBC_VXM 0x4c004057
  2308. #define MASK_VMSBC_VXM 0xfe00707f
  2309. #define MATCH_VMSBF_M 0x5000a057
  2310. #define MASK_VMSBF_M 0xfc0ff07f
  2311. #define MATCH_VMSEQ_VI 0x60003057
  2312. #define MASK_VMSEQ_VI 0xfc00707f
  2313. #define MATCH_VMSEQ_VV 0x60000057
  2314. #define MASK_VMSEQ_VV 0xfc00707f
  2315. #define MATCH_VMSEQ_VX 0x60004057
  2316. #define MASK_VMSEQ_VX 0xfc00707f
  2317. #define MATCH_VMSGT_VI 0x7c003057
  2318. #define MASK_VMSGT_VI 0xfc00707f
  2319. #define MATCH_VMSGT_VX 0x7c004057
  2320. #define MASK_VMSGT_VX 0xfc00707f
  2321. #define MATCH_VMSGTU_VI 0x78003057
  2322. #define MASK_VMSGTU_VI 0xfc00707f
  2323. #define MATCH_VMSGTU_VX 0x78004057
  2324. #define MASK_VMSGTU_VX 0xfc00707f
  2325. #define MATCH_VMSIF_M 0x5001a057
  2326. #define MASK_VMSIF_M 0xfc0ff07f
  2327. #define MATCH_VMSLE_VI 0x74003057
  2328. #define MASK_VMSLE_VI 0xfc00707f
  2329. #define MATCH_VMSLE_VV 0x74000057
  2330. #define MASK_VMSLE_VV 0xfc00707f
  2331. #define MATCH_VMSLE_VX 0x74004057
  2332. #define MASK_VMSLE_VX 0xfc00707f
  2333. #define MATCH_VMSLEU_VI 0x70003057
  2334. #define MASK_VMSLEU_VI 0xfc00707f
  2335. #define MATCH_VMSLEU_VV 0x70000057
  2336. #define MASK_VMSLEU_VV 0xfc00707f
  2337. #define MATCH_VMSLEU_VX 0x70004057
  2338. #define MASK_VMSLEU_VX 0xfc00707f
  2339. #define MATCH_VMSLT_VV 0x6c000057
  2340. #define MASK_VMSLT_VV 0xfc00707f
  2341. #define MATCH_VMSLT_VX 0x6c004057
  2342. #define MASK_VMSLT_VX 0xfc00707f
  2343. #define MATCH_VMSLTU_VV 0x68000057
  2344. #define MASK_VMSLTU_VV 0xfc00707f
  2345. #define MATCH_VMSLTU_VX 0x68004057
  2346. #define MASK_VMSLTU_VX 0xfc00707f
  2347. #define MATCH_VMSNE_VI 0x64003057
  2348. #define MASK_VMSNE_VI 0xfc00707f
  2349. #define MATCH_VMSNE_VV 0x64000057
  2350. #define MASK_VMSNE_VV 0xfc00707f
  2351. #define MATCH_VMSNE_VX 0x64004057
  2352. #define MASK_VMSNE_VX 0xfc00707f
  2353. #define MATCH_VMSOF_M 0x50012057
  2354. #define MASK_VMSOF_M 0xfc0ff07f
  2355. #define MATCH_VMUL_VV 0x94002057
  2356. #define MASK_VMUL_VV 0xfc00707f
  2357. #define MATCH_VMUL_VX 0x94006057
  2358. #define MASK_VMUL_VX 0xfc00707f
  2359. #define MATCH_VMULH_VV 0x9c002057
  2360. #define MASK_VMULH_VV 0xfc00707f
  2361. #define MATCH_VMULH_VX 0x9c006057
  2362. #define MASK_VMULH_VX 0xfc00707f
  2363. #define MATCH_VMULHSU_VV 0x98002057
  2364. #define MASK_VMULHSU_VV 0xfc00707f
  2365. #define MATCH_VMULHSU_VX 0x98006057
  2366. #define MASK_VMULHSU_VX 0xfc00707f
  2367. #define MATCH_VMULHU_VV 0x90002057
  2368. #define MASK_VMULHU_VV 0xfc00707f
  2369. #define MATCH_VMULHU_VX 0x90006057
  2370. #define MASK_VMULHU_VX 0xfc00707f
  2371. #define MATCH_VMV1R_V 0x9e003057
  2372. #define MASK_VMV1R_V 0xfe0ff07f
  2373. #define MATCH_VMV2R_V 0x9e00b057
  2374. #define MASK_VMV2R_V 0xfe0ff07f
  2375. #define MATCH_VMV4R_V 0x9e01b057
  2376. #define MASK_VMV4R_V 0xfe0ff07f
  2377. #define MATCH_VMV8R_V 0x9e03b057
  2378. #define MASK_VMV8R_V 0xfe0ff07f
  2379. #define MATCH_VMV_S_X 0x42006057
  2380. #define MASK_VMV_S_X 0xfff0707f
  2381. #define MATCH_VMV_V_I 0x5e003057
  2382. #define MASK_VMV_V_I 0xfff0707f
  2383. #define MATCH_VMV_V_V 0x5e000057
  2384. #define MASK_VMV_V_V 0xfff0707f
  2385. #define MATCH_VMV_V_X 0x5e004057
  2386. #define MASK_VMV_V_X 0xfff0707f
  2387. #define MATCH_VMV_X_S 0x42002057
  2388. #define MASK_VMV_X_S 0xfe0ff07f
  2389. #define MATCH_VMXNOR_MM 0x7c002057
  2390. #define MASK_VMXNOR_MM 0xfc00707f
  2391. #define MATCH_VMXOR_MM 0x6c002057
  2392. #define MASK_VMXOR_MM 0xfc00707f
  2393. #define MATCH_VNCLIP_WI 0xbc003057
  2394. #define MASK_VNCLIP_WI 0xfc00707f
  2395. #define MATCH_VNCLIP_WV 0xbc000057
  2396. #define MASK_VNCLIP_WV 0xfc00707f
  2397. #define MATCH_VNCLIP_WX 0xbc004057
  2398. #define MASK_VNCLIP_WX 0xfc00707f
  2399. #define MATCH_VNCLIPU_WI 0xb8003057
  2400. #define MASK_VNCLIPU_WI 0xfc00707f
  2401. #define MATCH_VNCLIPU_WV 0xb8000057
  2402. #define MASK_VNCLIPU_WV 0xfc00707f
  2403. #define MATCH_VNCLIPU_WX 0xb8004057
  2404. #define MASK_VNCLIPU_WX 0xfc00707f
  2405. #define MATCH_VNMSAC_VV 0xbc002057
  2406. #define MASK_VNMSAC_VV 0xfc00707f
  2407. #define MATCH_VNMSAC_VX 0xbc006057
  2408. #define MASK_VNMSAC_VX 0xfc00707f
  2409. #define MATCH_VNMSUB_VV 0xac002057
  2410. #define MASK_VNMSUB_VV 0xfc00707f
  2411. #define MATCH_VNMSUB_VX 0xac006057
  2412. #define MASK_VNMSUB_VX 0xfc00707f
  2413. #define MATCH_VNSRA_WI 0xb4003057
  2414. #define MASK_VNSRA_WI 0xfc00707f
  2415. #define MATCH_VNSRA_WV 0xb4000057
  2416. #define MASK_VNSRA_WV 0xfc00707f
  2417. #define MATCH_VNSRA_WX 0xb4004057
  2418. #define MASK_VNSRA_WX 0xfc00707f
  2419. #define MATCH_VNSRL_WI 0xb0003057
  2420. #define MASK_VNSRL_WI 0xfc00707f
  2421. #define MATCH_VNSRL_WV 0xb0000057
  2422. #define MASK_VNSRL_WV 0xfc00707f
  2423. #define MATCH_VNSRL_WX 0xb0004057
  2424. #define MASK_VNSRL_WX 0xfc00707f
  2425. #define MATCH_VOR_VI 0x28003057
  2426. #define MASK_VOR_VI 0xfc00707f
  2427. #define MATCH_VOR_VV 0x28000057
  2428. #define MASK_VOR_VV 0xfc00707f
  2429. #define MATCH_VOR_VX 0x28004057
  2430. #define MASK_VOR_VX 0xfc00707f
  2431. #define MATCH_VREDAND_VS 0x4002057
  2432. #define MASK_VREDAND_VS 0xfc00707f
  2433. #define MATCH_VREDMAX_VS 0x1c002057
  2434. #define MASK_VREDMAX_VS 0xfc00707f
  2435. #define MATCH_VREDMAXU_VS 0x18002057
  2436. #define MASK_VREDMAXU_VS 0xfc00707f
  2437. #define MATCH_VREDMIN_VS 0x14002057
  2438. #define MASK_VREDMIN_VS 0xfc00707f
  2439. #define MATCH_VREDMINU_VS 0x10002057
  2440. #define MASK_VREDMINU_VS 0xfc00707f
  2441. #define MATCH_VREDOR_VS 0x8002057
  2442. #define MASK_VREDOR_VS 0xfc00707f
  2443. #define MATCH_VREDSUM_VS 0x2057
  2444. #define MASK_VREDSUM_VS 0xfc00707f
  2445. #define MATCH_VREDXOR_VS 0xc002057
  2446. #define MASK_VREDXOR_VS 0xfc00707f
  2447. #define MATCH_VREM_VV 0x8c002057
  2448. #define MASK_VREM_VV 0xfc00707f
  2449. #define MATCH_VREM_VX 0x8c006057
  2450. #define MASK_VREM_VX 0xfc00707f
  2451. #define MATCH_VREMU_VV 0x88002057
  2452. #define MASK_VREMU_VV 0xfc00707f
  2453. #define MATCH_VREMU_VX 0x88006057
  2454. #define MASK_VREMU_VX 0xfc00707f
  2455. #define MATCH_VRGATHER_VI 0x30003057
  2456. #define MASK_VRGATHER_VI 0xfc00707f
  2457. #define MATCH_VRGATHER_VV 0x30000057
  2458. #define MASK_VRGATHER_VV 0xfc00707f
  2459. #define MATCH_VRGATHER_VX 0x30004057
  2460. #define MASK_VRGATHER_VX 0xfc00707f
  2461. #define MATCH_VRGATHEREI16_VV 0x38000057
  2462. #define MASK_VRGATHEREI16_VV 0xfc00707f
  2463. #define MATCH_VRSUB_VI 0xc003057
  2464. #define MASK_VRSUB_VI 0xfc00707f
  2465. #define MATCH_VRSUB_VX 0xc004057
  2466. #define MASK_VRSUB_VX 0xfc00707f
  2467. #define MATCH_VS1R_V 0x2800027
  2468. #define MASK_VS1R_V 0xfff0707f
  2469. #define MATCH_VS2R_V 0x22800027
  2470. #define MASK_VS2R_V 0xfff0707f
  2471. #define MATCH_VS4R_V 0x62800027
  2472. #define MASK_VS4R_V 0xfff0707f
  2473. #define MATCH_VS8R_V 0xe2800027
  2474. #define MASK_VS8R_V 0xfff0707f
  2475. #define MATCH_VSADD_VI 0x84003057
  2476. #define MASK_VSADD_VI 0xfc00707f
  2477. #define MATCH_VSADD_VV 0x84000057
  2478. #define MASK_VSADD_VV 0xfc00707f
  2479. #define MATCH_VSADD_VX 0x84004057
  2480. #define MASK_VSADD_VX 0xfc00707f
  2481. #define MATCH_VSADDU_VI 0x80003057
  2482. #define MASK_VSADDU_VI 0xfc00707f
  2483. #define MATCH_VSADDU_VV 0x80000057
  2484. #define MASK_VSADDU_VV 0xfc00707f
  2485. #define MATCH_VSADDU_VX 0x80004057
  2486. #define MASK_VSADDU_VX 0xfc00707f
  2487. #define MATCH_VSBC_VVM 0x48000057
  2488. #define MASK_VSBC_VVM 0xfe00707f
  2489. #define MATCH_VSBC_VXM 0x48004057
  2490. #define MASK_VSBC_VXM 0xfe00707f
  2491. #define MATCH_VSE1024_V 0x10007027
  2492. #define MASK_VSE1024_V 0x1df0707f
  2493. #define MATCH_VSE128_V 0x10000027
  2494. #define MASK_VSE128_V 0x1df0707f
  2495. #define MATCH_VSE16_V 0x5027
  2496. #define MASK_VSE16_V 0x1df0707f
  2497. #define MATCH_VSE256_V 0x10005027
  2498. #define MASK_VSE256_V 0x1df0707f
  2499. #define MATCH_VSE32_V 0x6027
  2500. #define MASK_VSE32_V 0x1df0707f
  2501. #define MATCH_VSE512_V 0x10006027
  2502. #define MASK_VSE512_V 0x1df0707f
  2503. #define MATCH_VSE64_V 0x7027
  2504. #define MASK_VSE64_V 0x1df0707f
  2505. #define MATCH_VSE8_V 0x27
  2506. #define MASK_VSE8_V 0x1df0707f
  2507. #define MATCH_VSETIVLI 0xc0007057
  2508. #define MASK_VSETIVLI 0xc000707f
  2509. #define MATCH_VSETVL 0x80007057
  2510. #define MASK_VSETVL 0xfe00707f
  2511. #define MATCH_VSETVLI 0x7057
  2512. #define MASK_VSETVLI 0x8000707f
  2513. #define MATCH_VSEXT_VF2 0x4803a057
  2514. #define MASK_VSEXT_VF2 0xfc0ff07f
  2515. #define MATCH_VSEXT_VF4 0x4802a057
  2516. #define MASK_VSEXT_VF4 0xfc0ff07f
  2517. #define MATCH_VSEXT_VF8 0x4801a057
  2518. #define MASK_VSEXT_VF8 0xfc0ff07f
  2519. #define MATCH_VSLIDE1DOWN_VX 0x3c006057
  2520. #define MASK_VSLIDE1DOWN_VX 0xfc00707f
  2521. #define MATCH_VSLIDE1UP_VX 0x38006057
  2522. #define MASK_VSLIDE1UP_VX 0xfc00707f
  2523. #define MATCH_VSLIDEDOWN_VI 0x3c003057
  2524. #define MASK_VSLIDEDOWN_VI 0xfc00707f
  2525. #define MATCH_VSLIDEDOWN_VX 0x3c004057
  2526. #define MASK_VSLIDEDOWN_VX 0xfc00707f
  2527. #define MATCH_VSLIDEUP_VI 0x38003057
  2528. #define MASK_VSLIDEUP_VI 0xfc00707f
  2529. #define MATCH_VSLIDEUP_VX 0x38004057
  2530. #define MASK_VSLIDEUP_VX 0xfc00707f
  2531. #define MATCH_VSLL_VI 0x94003057
  2532. #define MASK_VSLL_VI 0xfc00707f
  2533. #define MATCH_VSLL_VV 0x94000057
  2534. #define MASK_VSLL_VV 0xfc00707f
  2535. #define MATCH_VSLL_VX 0x94004057
  2536. #define MASK_VSLL_VX 0xfc00707f
  2537. #define MATCH_VSM_V 0x2b00027
  2538. #define MASK_VSM_V 0xfff0707f
  2539. #define MATCH_VSMUL_VV 0x9c000057
  2540. #define MASK_VSMUL_VV 0xfc00707f
  2541. #define MATCH_VSMUL_VX 0x9c004057
  2542. #define MASK_VSMUL_VX 0xfc00707f
  2543. #define MATCH_VSOXEI1024_V 0x1c007027
  2544. #define MASK_VSOXEI1024_V 0x1c00707f
  2545. #define MATCH_VSOXEI128_V 0x1c000027
  2546. #define MASK_VSOXEI128_V 0x1c00707f
  2547. #define MATCH_VSOXEI16_V 0xc005027
  2548. #define MASK_VSOXEI16_V 0x1c00707f
  2549. #define MATCH_VSOXEI256_V 0x1c005027
  2550. #define MASK_VSOXEI256_V 0x1c00707f
  2551. #define MATCH_VSOXEI32_V 0xc006027
  2552. #define MASK_VSOXEI32_V 0x1c00707f
  2553. #define MATCH_VSOXEI512_V 0x1c006027
  2554. #define MASK_VSOXEI512_V 0x1c00707f
  2555. #define MATCH_VSOXEI64_V 0xc007027
  2556. #define MASK_VSOXEI64_V 0x1c00707f
  2557. #define MATCH_VSOXEI8_V 0xc000027
  2558. #define MASK_VSOXEI8_V 0x1c00707f
  2559. #define MATCH_VSRA_VI 0xa4003057
  2560. #define MASK_VSRA_VI 0xfc00707f
  2561. #define MATCH_VSRA_VV 0xa4000057
  2562. #define MASK_VSRA_VV 0xfc00707f
  2563. #define MATCH_VSRA_VX 0xa4004057
  2564. #define MASK_VSRA_VX 0xfc00707f
  2565. #define MATCH_VSRL_VI 0xa0003057
  2566. #define MASK_VSRL_VI 0xfc00707f
  2567. #define MATCH_VSRL_VV 0xa0000057
  2568. #define MASK_VSRL_VV 0xfc00707f
  2569. #define MATCH_VSRL_VX 0xa0004057
  2570. #define MASK_VSRL_VX 0xfc00707f
  2571. #define MATCH_VSSE1024_V 0x18007027
  2572. #define MASK_VSSE1024_V 0x1c00707f
  2573. #define MATCH_VSSE128_V 0x18000027
  2574. #define MASK_VSSE128_V 0x1c00707f
  2575. #define MATCH_VSSE16_V 0x8005027
  2576. #define MASK_VSSE16_V 0x1c00707f
  2577. #define MATCH_VSSE256_V 0x18005027
  2578. #define MASK_VSSE256_V 0x1c00707f
  2579. #define MATCH_VSSE32_V 0x8006027
  2580. #define MASK_VSSE32_V 0x1c00707f
  2581. #define MATCH_VSSE512_V 0x18006027
  2582. #define MASK_VSSE512_V 0x1c00707f
  2583. #define MATCH_VSSE64_V 0x8007027
  2584. #define MASK_VSSE64_V 0x1c00707f
  2585. #define MATCH_VSSE8_V 0x8000027
  2586. #define MASK_VSSE8_V 0x1c00707f
  2587. #define MATCH_VSSRA_VI 0xac003057
  2588. #define MASK_VSSRA_VI 0xfc00707f
  2589. #define MATCH_VSSRA_VV 0xac000057
  2590. #define MASK_VSSRA_VV 0xfc00707f
  2591. #define MATCH_VSSRA_VX 0xac004057
  2592. #define MASK_VSSRA_VX 0xfc00707f
  2593. #define MATCH_VSSRL_VI 0xa8003057
  2594. #define MASK_VSSRL_VI 0xfc00707f
  2595. #define MATCH_VSSRL_VV 0xa8000057
  2596. #define MASK_VSSRL_VV 0xfc00707f
  2597. #define MATCH_VSSRL_VX 0xa8004057
  2598. #define MASK_VSSRL_VX 0xfc00707f
  2599. #define MATCH_VSSUB_VV 0x8c000057
  2600. #define MASK_VSSUB_VV 0xfc00707f
  2601. #define MATCH_VSSUB_VX 0x8c004057
  2602. #define MASK_VSSUB_VX 0xfc00707f
  2603. #define MATCH_VSSUBU_VV 0x88000057
  2604. #define MASK_VSSUBU_VV 0xfc00707f
  2605. #define MATCH_VSSUBU_VX 0x88004057
  2606. #define MASK_VSSUBU_VX 0xfc00707f
  2607. #define MATCH_VSUB_VV 0x8000057
  2608. #define MASK_VSUB_VV 0xfc00707f
  2609. #define MATCH_VSUB_VX 0x8004057
  2610. #define MASK_VSUB_VX 0xfc00707f
  2611. #define MATCH_VSUXEI1024_V 0x14007027
  2612. #define MASK_VSUXEI1024_V 0x1c00707f
  2613. #define MATCH_VSUXEI128_V 0x14000027
  2614. #define MASK_VSUXEI128_V 0x1c00707f
  2615. #define MATCH_VSUXEI16_V 0x4005027
  2616. #define MASK_VSUXEI16_V 0x1c00707f
  2617. #define MATCH_VSUXEI256_V 0x14005027
  2618. #define MASK_VSUXEI256_V 0x1c00707f
  2619. #define MATCH_VSUXEI32_V 0x4006027
  2620. #define MASK_VSUXEI32_V 0x1c00707f
  2621. #define MATCH_VSUXEI512_V 0x14006027
  2622. #define MASK_VSUXEI512_V 0x1c00707f
  2623. #define MATCH_VSUXEI64_V 0x4007027
  2624. #define MASK_VSUXEI64_V 0x1c00707f
  2625. #define MATCH_VSUXEI8_V 0x4000027
  2626. #define MASK_VSUXEI8_V 0x1c00707f
  2627. #define MATCH_VWADD_VV 0xc4002057
  2628. #define MASK_VWADD_VV 0xfc00707f
  2629. #define MATCH_VWADD_VX 0xc4006057
  2630. #define MASK_VWADD_VX 0xfc00707f
  2631. #define MATCH_VWADD_WV 0xd4002057
  2632. #define MASK_VWADD_WV 0xfc00707f
  2633. #define MATCH_VWADD_WX 0xd4006057
  2634. #define MASK_VWADD_WX 0xfc00707f
  2635. #define MATCH_VWADDU_VV 0xc0002057
  2636. #define MASK_VWADDU_VV 0xfc00707f
  2637. #define MATCH_VWADDU_VX 0xc0006057
  2638. #define MASK_VWADDU_VX 0xfc00707f
  2639. #define MATCH_VWADDU_WV 0xd0002057
  2640. #define MASK_VWADDU_WV 0xfc00707f
  2641. #define MATCH_VWADDU_WX 0xd0006057
  2642. #define MASK_VWADDU_WX 0xfc00707f
  2643. #define MATCH_VWMACC_VV 0xf4002057
  2644. #define MASK_VWMACC_VV 0xfc00707f
  2645. #define MATCH_VWMACC_VX 0xf4006057
  2646. #define MASK_VWMACC_VX 0xfc00707f
  2647. #define MATCH_VWMACCSU_VV 0xfc002057
  2648. #define MASK_VWMACCSU_VV 0xfc00707f
  2649. #define MATCH_VWMACCSU_VX 0xfc006057
  2650. #define MASK_VWMACCSU_VX 0xfc00707f
  2651. #define MATCH_VWMACCU_VV 0xf0002057
  2652. #define MASK_VWMACCU_VV 0xfc00707f
  2653. #define MATCH_VWMACCU_VX 0xf0006057
  2654. #define MASK_VWMACCU_VX 0xfc00707f
  2655. #define MATCH_VWMACCUS_VX 0xf8006057
  2656. #define MASK_VWMACCUS_VX 0xfc00707f
  2657. #define MATCH_VWMUL_VV 0xec002057
  2658. #define MASK_VWMUL_VV 0xfc00707f
  2659. #define MATCH_VWMUL_VX 0xec006057
  2660. #define MASK_VWMUL_VX 0xfc00707f
  2661. #define MATCH_VWMULSU_VV 0xe8002057
  2662. #define MASK_VWMULSU_VV 0xfc00707f
  2663. #define MATCH_VWMULSU_VX 0xe8006057
  2664. #define MASK_VWMULSU_VX 0xfc00707f
  2665. #define MATCH_VWMULU_VV 0xe0002057
  2666. #define MASK_VWMULU_VV 0xfc00707f
  2667. #define MATCH_VWMULU_VX 0xe0006057
  2668. #define MASK_VWMULU_VX 0xfc00707f
  2669. #define MATCH_VWREDSUM_VS 0xc4000057
  2670. #define MASK_VWREDSUM_VS 0xfc00707f
  2671. #define MATCH_VWREDSUMU_VS 0xc0000057
  2672. #define MASK_VWREDSUMU_VS 0xfc00707f
  2673. #define MATCH_VWSUB_VV 0xcc002057
  2674. #define MASK_VWSUB_VV 0xfc00707f
  2675. #define MATCH_VWSUB_VX 0xcc006057
  2676. #define MASK_VWSUB_VX 0xfc00707f
  2677. #define MATCH_VWSUB_WV 0xdc002057
  2678. #define MASK_VWSUB_WV 0xfc00707f
  2679. #define MATCH_VWSUB_WX 0xdc006057
  2680. #define MASK_VWSUB_WX 0xfc00707f
  2681. #define MATCH_VWSUBU_VV 0xc8002057
  2682. #define MASK_VWSUBU_VV 0xfc00707f
  2683. #define MATCH_VWSUBU_VX 0xc8006057
  2684. #define MASK_VWSUBU_VX 0xfc00707f
  2685. #define MATCH_VWSUBU_WV 0xd8002057
  2686. #define MASK_VWSUBU_WV 0xfc00707f
  2687. #define MATCH_VWSUBU_WX 0xd8006057
  2688. #define MASK_VWSUBU_WX 0xfc00707f
  2689. #define MATCH_VXOR_VI 0x2c003057
  2690. #define MASK_VXOR_VI 0xfc00707f
  2691. #define MATCH_VXOR_VV 0x2c000057
  2692. #define MASK_VXOR_VV 0xfc00707f
  2693. #define MATCH_VXOR_VX 0x2c004057
  2694. #define MASK_VXOR_VX 0xfc00707f
  2695. #define MATCH_VZEXT_VF2 0x48032057
  2696. #define MASK_VZEXT_VF2 0xfc0ff07f
  2697. #define MATCH_VZEXT_VF4 0x48022057
  2698. #define MASK_VZEXT_VF4 0xfc0ff07f
  2699. #define MATCH_VZEXT_VF8 0x48012057
  2700. #define MASK_VZEXT_VF8 0xfc0ff07f
  2701. #define MATCH_WFI 0x10500073
  2702. #define MASK_WFI 0xffffffff
  2703. #define MATCH_WRS_NTO 0xd00073
  2704. #define MASK_WRS_NTO 0xffffffff
  2705. #define MATCH_WRS_STO 0x1d00073
  2706. #define MASK_WRS_STO 0xffffffff
  2707. #define MATCH_XNOR 0x40004033
  2708. #define MASK_XNOR 0xfe00707f
  2709. #define MATCH_XOR 0x4033
  2710. #define MASK_XOR 0xfe00707f
  2711. #define MATCH_XORI 0x4013
  2712. #define MASK_XORI 0x707f
  2713. #define MATCH_XPERM16 0x28006033
  2714. #define MASK_XPERM16 0xfe00707f
  2715. #define MATCH_XPERM32 0x28000033
  2716. #define MASK_XPERM32 0xfe00707f
  2717. #define MATCH_XPERM4 0x28002033
  2718. #define MASK_XPERM4 0xfe00707f
  2719. #define MATCH_XPERM8 0x28004033
  2720. #define MASK_XPERM8 0xfe00707f
  2721. #define MATCH_ZUNPKD810 0xacc00077
  2722. #define MASK_ZUNPKD810 0xfff0707f
  2723. #define MATCH_ZUNPKD820 0xacd00077
  2724. #define MASK_ZUNPKD820 0xfff0707f
  2725. #define MATCH_ZUNPKD830 0xace00077
  2726. #define MASK_ZUNPKD830 0xfff0707f
  2727. #define MATCH_ZUNPKD831 0xacf00077
  2728. #define MASK_ZUNPKD831 0xfff0707f
  2729. #define MATCH_ZUNPKD832 0xad700077
  2730. #define MASK_ZUNPKD832 0xfff0707f
  2731. #define CSR_FFLAGS 0x1
  2732. #define CSR_FRM 0x2
  2733. #define CSR_FCSR 0x3
  2734. #define CSR_VSTART 0x8
  2735. #define CSR_VXSAT 0x9
  2736. #define CSR_VXRM 0xa
  2737. #define CSR_VCSR 0xf
  2738. #define CSR_SEED 0x15
  2739. #define CSR_JVT 0x17
  2740. #define CSR_CYCLE 0xc00
  2741. #define CSR_TIME 0xc01
  2742. #define CSR_INSTRET 0xc02
  2743. #define CSR_HPMCOUNTER3 0xc03
  2744. #define CSR_HPMCOUNTER4 0xc04
  2745. #define CSR_HPMCOUNTER5 0xc05
  2746. #define CSR_HPMCOUNTER6 0xc06
  2747. #define CSR_HPMCOUNTER7 0xc07
  2748. #define CSR_HPMCOUNTER8 0xc08
  2749. #define CSR_HPMCOUNTER9 0xc09
  2750. #define CSR_HPMCOUNTER10 0xc0a
  2751. #define CSR_HPMCOUNTER11 0xc0b
  2752. #define CSR_HPMCOUNTER12 0xc0c
  2753. #define CSR_HPMCOUNTER13 0xc0d
  2754. #define CSR_HPMCOUNTER14 0xc0e
  2755. #define CSR_HPMCOUNTER15 0xc0f
  2756. #define CSR_HPMCOUNTER16 0xc10
  2757. #define CSR_HPMCOUNTER17 0xc11
  2758. #define CSR_HPMCOUNTER18 0xc12
  2759. #define CSR_HPMCOUNTER19 0xc13
  2760. #define CSR_HPMCOUNTER20 0xc14
  2761. #define CSR_HPMCOUNTER21 0xc15
  2762. #define CSR_HPMCOUNTER22 0xc16
  2763. #define CSR_HPMCOUNTER23 0xc17
  2764. #define CSR_HPMCOUNTER24 0xc18
  2765. #define CSR_HPMCOUNTER25 0xc19
  2766. #define CSR_HPMCOUNTER26 0xc1a
  2767. #define CSR_HPMCOUNTER27 0xc1b
  2768. #define CSR_HPMCOUNTER28 0xc1c
  2769. #define CSR_HPMCOUNTER29 0xc1d
  2770. #define CSR_HPMCOUNTER30 0xc1e
  2771. #define CSR_HPMCOUNTER31 0xc1f
  2772. #define CSR_VL 0xc20
  2773. #define CSR_VTYPE 0xc21
  2774. #define CSR_VLENB 0xc22
  2775. #define CSR_SSTATUS 0x100
  2776. #define CSR_SEDELEG 0x102
  2777. #define CSR_SIDELEG 0x103
  2778. #define CSR_SIE 0x104
  2779. #define CSR_STVEC 0x105
  2780. #define CSR_SCOUNTEREN 0x106
  2781. #define CSR_SENVCFG 0x10a
  2782. #define CSR_SSTATEEN0 0x10c
  2783. #define CSR_SSTATEEN1 0x10d
  2784. #define CSR_SSTATEEN2 0x10e
  2785. #define CSR_SSTATEEN3 0x10f
  2786. #define CSR_SSCRATCH 0x140
  2787. #define CSR_SEPC 0x141
  2788. #define CSR_SCAUSE 0x142
  2789. #define CSR_STVAL 0x143
  2790. #define CSR_SIP 0x144
  2791. #define CSR_STIMECMP 0x14d
  2792. #define CSR_SISELECT 0x150
  2793. #define CSR_SIREG 0x151
  2794. #define CSR_STOPEI 0x15c
  2795. #define CSR_SATP 0x180
  2796. #define CSR_SCONTEXT 0x5a8
  2797. #define CSR_VSSTATUS 0x200
  2798. #define CSR_VSIE 0x204
  2799. #define CSR_VSTVEC 0x205
  2800. #define CSR_VSSCRATCH 0x240
  2801. #define CSR_VSEPC 0x241
  2802. #define CSR_VSCAUSE 0x242
  2803. #define CSR_VSTVAL 0x243
  2804. #define CSR_VSIP 0x244
  2805. #define CSR_VSTIMECMP 0x24d
  2806. #define CSR_VSISELECT 0x250
  2807. #define CSR_VSIREG 0x251
  2808. #define CSR_VSTOPEI 0x25c
  2809. #define CSR_VSATP 0x280
  2810. #define CSR_HSTATUS 0x600
  2811. #define CSR_HEDELEG 0x602
  2812. #define CSR_HIDELEG 0x603
  2813. #define CSR_HIE 0x604
  2814. #define CSR_HTIMEDELTA 0x605
  2815. #define CSR_HCOUNTEREN 0x606
  2816. #define CSR_HGEIE 0x607
  2817. #define CSR_HVIEN 0x608
  2818. #define CSR_HVICTL 0x609
  2819. #define CSR_HENVCFG 0x60a
  2820. #define CSR_HSTATEEN0 0x60c
  2821. #define CSR_HSTATEEN1 0x60d
  2822. #define CSR_HSTATEEN2 0x60e
  2823. #define CSR_HSTATEEN3 0x60f
  2824. #define CSR_HTVAL 0x643
  2825. #define CSR_HIP 0x644
  2826. #define CSR_HVIP 0x645
  2827. #define CSR_HVIPRIO1 0x646
  2828. #define CSR_HVIPRIO2 0x647
  2829. #define CSR_HTINST 0x64a
  2830. #define CSR_HGATP 0x680
  2831. #define CSR_HCONTEXT 0x6a8
  2832. #define CSR_HGEIP 0xe12
  2833. #define CSR_VSTOPI 0xeb0
  2834. #define CSR_SCOUNTOVF 0xda0
  2835. #define CSR_STOPI 0xdb0
  2836. #define CSR_UTVT 0x7
  2837. #define CSR_UNXTI 0x45
  2838. #define CSR_UINTSTATUS 0x46
  2839. #define CSR_USCRATCHCSW 0x48
  2840. #define CSR_USCRATCHCSWL 0x49
  2841. #define CSR_STVT 0x107
  2842. #define CSR_SNXTI 0x145
  2843. #define CSR_SINTSTATUS 0x146
  2844. #define CSR_SSCRATCHCSW 0x148
  2845. #define CSR_SSCRATCHCSWL 0x149
  2846. #define CSR_MTVT 0x307
  2847. #define CSR_MNXTI 0x345
  2848. #define CSR_MINTSTATUS 0x346
  2849. #define CSR_MSCRATCHCSW 0x348
  2850. #define CSR_MSCRATCHCSWL 0x349
  2851. #define CSR_MSTATUS 0x300
  2852. #define CSR_MISA 0x301
  2853. #define CSR_MEDELEG 0x302
  2854. #define CSR_MIDELEG 0x303
  2855. #define CSR_MIE 0x304
  2856. #define CSR_MTVEC 0x305
  2857. #define CSR_MCOUNTEREN 0x306
  2858. #define CSR_MVIEN 0x308
  2859. #define CSR_MVIP 0x309
  2860. #define CSR_MENVCFG 0x30a
  2861. #define CSR_MSTATEEN0 0x30c
  2862. #define CSR_MSTATEEN1 0x30d
  2863. #define CSR_MSTATEEN2 0x30e
  2864. #define CSR_MSTATEEN3 0x30f
  2865. #define CSR_MCOUNTINHIBIT 0x320
  2866. #define CSR_MSCRATCH 0x340
  2867. #define CSR_MEPC 0x341
  2868. #define CSR_MCAUSE 0x342
  2869. #define CSR_MTVAL 0x343
  2870. #define CSR_MIP 0x344
  2871. #define CSR_MTINST 0x34a
  2872. #define CSR_MTVAL2 0x34b
  2873. #define CSR_MISELECT 0x350
  2874. #define CSR_MIREG 0x351
  2875. #define CSR_MTOPEI 0x35c
  2876. #define CSR_PMPCFG0 0x3a0
  2877. #define CSR_PMPCFG1 0x3a1
  2878. #define CSR_PMPCFG2 0x3a2
  2879. #define CSR_PMPCFG3 0x3a3
  2880. #define CSR_PMPCFG4 0x3a4
  2881. #define CSR_PMPCFG5 0x3a5
  2882. #define CSR_PMPCFG6 0x3a6
  2883. #define CSR_PMPCFG7 0x3a7
  2884. #define CSR_PMPCFG8 0x3a8
  2885. #define CSR_PMPCFG9 0x3a9
  2886. #define CSR_PMPCFG10 0x3aa
  2887. #define CSR_PMPCFG11 0x3ab
  2888. #define CSR_PMPCFG12 0x3ac
  2889. #define CSR_PMPCFG13 0x3ad
  2890. #define CSR_PMPCFG14 0x3ae
  2891. #define CSR_PMPCFG15 0x3af
  2892. #define CSR_PMPADDR0 0x3b0
  2893. #define CSR_PMPADDR1 0x3b1
  2894. #define CSR_PMPADDR2 0x3b2
  2895. #define CSR_PMPADDR3 0x3b3
  2896. #define CSR_PMPADDR4 0x3b4
  2897. #define CSR_PMPADDR5 0x3b5
  2898. #define CSR_PMPADDR6 0x3b6
  2899. #define CSR_PMPADDR7 0x3b7
  2900. #define CSR_PMPADDR8 0x3b8
  2901. #define CSR_PMPADDR9 0x3b9
  2902. #define CSR_PMPADDR10 0x3ba
  2903. #define CSR_PMPADDR11 0x3bb
  2904. #define CSR_PMPADDR12 0x3bc
  2905. #define CSR_PMPADDR13 0x3bd
  2906. #define CSR_PMPADDR14 0x3be
  2907. #define CSR_PMPADDR15 0x3bf
  2908. #define CSR_PMPADDR16 0x3c0
  2909. #define CSR_PMPADDR17 0x3c1
  2910. #define CSR_PMPADDR18 0x3c2
  2911. #define CSR_PMPADDR19 0x3c3
  2912. #define CSR_PMPADDR20 0x3c4
  2913. #define CSR_PMPADDR21 0x3c5
  2914. #define CSR_PMPADDR22 0x3c6
  2915. #define CSR_PMPADDR23 0x3c7
  2916. #define CSR_PMPADDR24 0x3c8
  2917. #define CSR_PMPADDR25 0x3c9
  2918. #define CSR_PMPADDR26 0x3ca
  2919. #define CSR_PMPADDR27 0x3cb
  2920. #define CSR_PMPADDR28 0x3cc
  2921. #define CSR_PMPADDR29 0x3cd
  2922. #define CSR_PMPADDR30 0x3ce
  2923. #define CSR_PMPADDR31 0x3cf
  2924. #define CSR_PMPADDR32 0x3d0
  2925. #define CSR_PMPADDR33 0x3d1
  2926. #define CSR_PMPADDR34 0x3d2
  2927. #define CSR_PMPADDR35 0x3d3
  2928. #define CSR_PMPADDR36 0x3d4
  2929. #define CSR_PMPADDR37 0x3d5
  2930. #define CSR_PMPADDR38 0x3d6
  2931. #define CSR_PMPADDR39 0x3d7
  2932. #define CSR_PMPADDR40 0x3d8
  2933. #define CSR_PMPADDR41 0x3d9
  2934. #define CSR_PMPADDR42 0x3da
  2935. #define CSR_PMPADDR43 0x3db
  2936. #define CSR_PMPADDR44 0x3dc
  2937. #define CSR_PMPADDR45 0x3dd
  2938. #define CSR_PMPADDR46 0x3de
  2939. #define CSR_PMPADDR47 0x3df
  2940. #define CSR_PMPADDR48 0x3e0
  2941. #define CSR_PMPADDR49 0x3e1
  2942. #define CSR_PMPADDR50 0x3e2
  2943. #define CSR_PMPADDR51 0x3e3
  2944. #define CSR_PMPADDR52 0x3e4
  2945. #define CSR_PMPADDR53 0x3e5
  2946. #define CSR_PMPADDR54 0x3e6
  2947. #define CSR_PMPADDR55 0x3e7
  2948. #define CSR_PMPADDR56 0x3e8
  2949. #define CSR_PMPADDR57 0x3e9
  2950. #define CSR_PMPADDR58 0x3ea
  2951. #define CSR_PMPADDR59 0x3eb
  2952. #define CSR_PMPADDR60 0x3ec
  2953. #define CSR_PMPADDR61 0x3ed
  2954. #define CSR_PMPADDR62 0x3ee
  2955. #define CSR_PMPADDR63 0x3ef
  2956. #define CSR_MSECCFG 0x747
  2957. #define CSR_TSELECT 0x7a0
  2958. #define CSR_TDATA1 0x7a1
  2959. #define CSR_TDATA2 0x7a2
  2960. #define CSR_TDATA3 0x7a3
  2961. #define CSR_TINFO 0x7a4
  2962. #define CSR_TCONTROL 0x7a5
  2963. #define CSR_MCONTEXT 0x7a8
  2964. #define CSR_MSCONTEXT 0x7aa
  2965. #define CSR_DCSR 0x7b0
  2966. #define CSR_DPC 0x7b1
  2967. #define CSR_DSCRATCH0 0x7b2
  2968. #define CSR_DSCRATCH1 0x7b3
  2969. #define CSR_MCYCLE 0xb00
  2970. #define CSR_MINSTRET 0xb02
  2971. #define CSR_MHPMCOUNTER3 0xb03
  2972. #define CSR_MHPMCOUNTER4 0xb04
  2973. #define CSR_MHPMCOUNTER5 0xb05
  2974. #define CSR_MHPMCOUNTER6 0xb06
  2975. #define CSR_MHPMCOUNTER7 0xb07
  2976. #define CSR_MHPMCOUNTER8 0xb08
  2977. #define CSR_MHPMCOUNTER9 0xb09
  2978. #define CSR_MHPMCOUNTER10 0xb0a
  2979. #define CSR_MHPMCOUNTER11 0xb0b
  2980. #define CSR_MHPMCOUNTER12 0xb0c
  2981. #define CSR_MHPMCOUNTER13 0xb0d
  2982. #define CSR_MHPMCOUNTER14 0xb0e
  2983. #define CSR_MHPMCOUNTER15 0xb0f
  2984. #define CSR_MHPMCOUNTER16 0xb10
  2985. #define CSR_MHPMCOUNTER17 0xb11
  2986. #define CSR_MHPMCOUNTER18 0xb12
  2987. #define CSR_MHPMCOUNTER19 0xb13
  2988. #define CSR_MHPMCOUNTER20 0xb14
  2989. #define CSR_MHPMCOUNTER21 0xb15
  2990. #define CSR_MHPMCOUNTER22 0xb16
  2991. #define CSR_MHPMCOUNTER23 0xb17
  2992. #define CSR_MHPMCOUNTER24 0xb18
  2993. #define CSR_MHPMCOUNTER25 0xb19
  2994. #define CSR_MHPMCOUNTER26 0xb1a
  2995. #define CSR_MHPMCOUNTER27 0xb1b
  2996. #define CSR_MHPMCOUNTER28 0xb1c
  2997. #define CSR_MHPMCOUNTER29 0xb1d
  2998. #define CSR_MHPMCOUNTER30 0xb1e
  2999. #define CSR_MHPMCOUNTER31 0xb1f
  3000. #define CSR_MHPMEVENT3 0x323
  3001. #define CSR_MHPMEVENT4 0x324
  3002. #define CSR_MHPMEVENT5 0x325
  3003. #define CSR_MHPMEVENT6 0x326
  3004. #define CSR_MHPMEVENT7 0x327
  3005. #define CSR_MHPMEVENT8 0x328
  3006. #define CSR_MHPMEVENT9 0x329
  3007. #define CSR_MHPMEVENT10 0x32a
  3008. #define CSR_MHPMEVENT11 0x32b
  3009. #define CSR_MHPMEVENT12 0x32c
  3010. #define CSR_MHPMEVENT13 0x32d
  3011. #define CSR_MHPMEVENT14 0x32e
  3012. #define CSR_MHPMEVENT15 0x32f
  3013. #define CSR_MHPMEVENT16 0x330
  3014. #define CSR_MHPMEVENT17 0x331
  3015. #define CSR_MHPMEVENT18 0x332
  3016. #define CSR_MHPMEVENT19 0x333
  3017. #define CSR_MHPMEVENT20 0x334
  3018. #define CSR_MHPMEVENT21 0x335
  3019. #define CSR_MHPMEVENT22 0x336
  3020. #define CSR_MHPMEVENT23 0x337
  3021. #define CSR_MHPMEVENT24 0x338
  3022. #define CSR_MHPMEVENT25 0x339
  3023. #define CSR_MHPMEVENT26 0x33a
  3024. #define CSR_MHPMEVENT27 0x33b
  3025. #define CSR_MHPMEVENT28 0x33c
  3026. #define CSR_MHPMEVENT29 0x33d
  3027. #define CSR_MHPMEVENT30 0x33e
  3028. #define CSR_MHPMEVENT31 0x33f
  3029. #define CSR_MVENDORID 0xf11
  3030. #define CSR_MARCHID 0xf12
  3031. #define CSR_MIMPID 0xf13
  3032. #define CSR_MHARTID 0xf14
  3033. #define CSR_MCONFIGPTR 0xf15
  3034. #define CSR_MTOPI 0xfb0
  3035. #define CSR_SIEH 0x114
  3036. #define CSR_SIPH 0x154
  3037. #define CSR_STIMECMPH 0x15d
  3038. #define CSR_VSIEH 0x214
  3039. #define CSR_VSIPH 0x254
  3040. #define CSR_VSTIMECMPH 0x25d
  3041. #define CSR_HTIMEDELTAH 0x615
  3042. #define CSR_HIDELEGH 0x613
  3043. #define CSR_HVIENH 0x618
  3044. #define CSR_HENVCFGH 0x61a
  3045. #define CSR_HVIPH 0x655
  3046. #define CSR_HVIPRIO1H 0x656
  3047. #define CSR_HVIPRIO2H 0x657
  3048. #define CSR_HSTATEEN0H 0x61c
  3049. #define CSR_HSTATEEN1H 0x61d
  3050. #define CSR_HSTATEEN2H 0x61e
  3051. #define CSR_HSTATEEN3H 0x61f
  3052. #define CSR_CYCLEH 0xc80
  3053. #define CSR_TIMEH 0xc81
  3054. #define CSR_INSTRETH 0xc82
  3055. #define CSR_HPMCOUNTER3H 0xc83
  3056. #define CSR_HPMCOUNTER4H 0xc84
  3057. #define CSR_HPMCOUNTER5H 0xc85
  3058. #define CSR_HPMCOUNTER6H 0xc86
  3059. #define CSR_HPMCOUNTER7H 0xc87
  3060. #define CSR_HPMCOUNTER8H 0xc88
  3061. #define CSR_HPMCOUNTER9H 0xc89
  3062. #define CSR_HPMCOUNTER10H 0xc8a
  3063. #define CSR_HPMCOUNTER11H 0xc8b
  3064. #define CSR_HPMCOUNTER12H 0xc8c
  3065. #define CSR_HPMCOUNTER13H 0xc8d
  3066. #define CSR_HPMCOUNTER14H 0xc8e
  3067. #define CSR_HPMCOUNTER15H 0xc8f
  3068. #define CSR_HPMCOUNTER16H 0xc90
  3069. #define CSR_HPMCOUNTER17H 0xc91
  3070. #define CSR_HPMCOUNTER18H 0xc92
  3071. #define CSR_HPMCOUNTER19H 0xc93
  3072. #define CSR_HPMCOUNTER20H 0xc94
  3073. #define CSR_HPMCOUNTER21H 0xc95
  3074. #define CSR_HPMCOUNTER22H 0xc96
  3075. #define CSR_HPMCOUNTER23H 0xc97
  3076. #define CSR_HPMCOUNTER24H 0xc98
  3077. #define CSR_HPMCOUNTER25H 0xc99
  3078. #define CSR_HPMCOUNTER26H 0xc9a
  3079. #define CSR_HPMCOUNTER27H 0xc9b
  3080. #define CSR_HPMCOUNTER28H 0xc9c
  3081. #define CSR_HPMCOUNTER29H 0xc9d
  3082. #define CSR_HPMCOUNTER30H 0xc9e
  3083. #define CSR_HPMCOUNTER31H 0xc9f
  3084. #define CSR_MSTATUSH 0x310
  3085. #define CSR_MIDELEGH 0x313
  3086. #define CSR_MIEH 0x314
  3087. #define CSR_MVIENH 0x318
  3088. #define CSR_MVIPH 0x319
  3089. #define CSR_MENVCFGH 0x31a
  3090. #define CSR_MSTATEEN0H 0x31c
  3091. #define CSR_MSTATEEN1H 0x31d
  3092. #define CSR_MSTATEEN2H 0x31e
  3093. #define CSR_MSTATEEN3H 0x31f
  3094. #define CSR_MIPH 0x354
  3095. #define CSR_MHPMEVENT3H 0x723
  3096. #define CSR_MHPMEVENT4H 0x724
  3097. #define CSR_MHPMEVENT5H 0x725
  3098. #define CSR_MHPMEVENT6H 0x726
  3099. #define CSR_MHPMEVENT7H 0x727
  3100. #define CSR_MHPMEVENT8H 0x728
  3101. #define CSR_MHPMEVENT9H 0x729
  3102. #define CSR_MHPMEVENT10H 0x72a
  3103. #define CSR_MHPMEVENT11H 0x72b
  3104. #define CSR_MHPMEVENT12H 0x72c
  3105. #define CSR_MHPMEVENT13H 0x72d
  3106. #define CSR_MHPMEVENT14H 0x72e
  3107. #define CSR_MHPMEVENT15H 0x72f
  3108. #define CSR_MHPMEVENT16H 0x730
  3109. #define CSR_MHPMEVENT17H 0x731
  3110. #define CSR_MHPMEVENT18H 0x732
  3111. #define CSR_MHPMEVENT19H 0x733
  3112. #define CSR_MHPMEVENT20H 0x734
  3113. #define CSR_MHPMEVENT21H 0x735
  3114. #define CSR_MHPMEVENT22H 0x736
  3115. #define CSR_MHPMEVENT23H 0x737
  3116. #define CSR_MHPMEVENT24H 0x738
  3117. #define CSR_MHPMEVENT25H 0x739
  3118. #define CSR_MHPMEVENT26H 0x73a
  3119. #define CSR_MHPMEVENT27H 0x73b
  3120. #define CSR_MHPMEVENT28H 0x73c
  3121. #define CSR_MHPMEVENT29H 0x73d
  3122. #define CSR_MHPMEVENT30H 0x73e
  3123. #define CSR_MHPMEVENT31H 0x73f
  3124. #define CSR_MSECCFGH 0x757
  3125. #define CSR_MCYCLEH 0xb80
  3126. #define CSR_MINSTRETH 0xb82
  3127. #define CSR_MHPMCOUNTER3H 0xb83
  3128. #define CSR_MHPMCOUNTER4H 0xb84
  3129. #define CSR_MHPMCOUNTER5H 0xb85
  3130. #define CSR_MHPMCOUNTER6H 0xb86
  3131. #define CSR_MHPMCOUNTER7H 0xb87
  3132. #define CSR_MHPMCOUNTER8H 0xb88
  3133. #define CSR_MHPMCOUNTER9H 0xb89
  3134. #define CSR_MHPMCOUNTER10H 0xb8a
  3135. #define CSR_MHPMCOUNTER11H 0xb8b
  3136. #define CSR_MHPMCOUNTER12H 0xb8c
  3137. #define CSR_MHPMCOUNTER13H 0xb8d
  3138. #define CSR_MHPMCOUNTER14H 0xb8e
  3139. #define CSR_MHPMCOUNTER15H 0xb8f
  3140. #define CSR_MHPMCOUNTER16H 0xb90
  3141. #define CSR_MHPMCOUNTER17H 0xb91
  3142. #define CSR_MHPMCOUNTER18H 0xb92
  3143. #define CSR_MHPMCOUNTER19H 0xb93
  3144. #define CSR_MHPMCOUNTER20H 0xb94
  3145. #define CSR_MHPMCOUNTER21H 0xb95
  3146. #define CSR_MHPMCOUNTER22H 0xb96
  3147. #define CSR_MHPMCOUNTER23H 0xb97
  3148. #define CSR_MHPMCOUNTER24H 0xb98
  3149. #define CSR_MHPMCOUNTER25H 0xb99
  3150. #define CSR_MHPMCOUNTER26H 0xb9a
  3151. #define CSR_MHPMCOUNTER27H 0xb9b
  3152. #define CSR_MHPMCOUNTER28H 0xb9c
  3153. #define CSR_MHPMCOUNTER29H 0xb9d
  3154. #define CSR_MHPMCOUNTER30H 0xb9e
  3155. #define CSR_MHPMCOUNTER31H 0xb9f
  3156. #define CAUSE_MISALIGNED_FETCH 0x0
  3157. #define CAUSE_FETCH_ACCESS 0x1
  3158. #define CAUSE_ILLEGAL_INSTRUCTION 0x2
  3159. #define CAUSE_BREAKPOINT 0x3
  3160. #define CAUSE_MISALIGNED_LOAD 0x4
  3161. #define CAUSE_LOAD_ACCESS 0x5
  3162. #define CAUSE_MISALIGNED_STORE 0x6
  3163. #define CAUSE_STORE_ACCESS 0x7
  3164. #define CAUSE_USER_ECALL 0x8
  3165. #define CAUSE_SUPERVISOR_ECALL 0x9
  3166. #define CAUSE_VIRTUAL_SUPERVISOR_ECALL 0xa
  3167. #define CAUSE_MACHINE_ECALL 0xb
  3168. #define CAUSE_FETCH_PAGE_FAULT 0xc
  3169. #define CAUSE_LOAD_PAGE_FAULT 0xd
  3170. #define CAUSE_STORE_PAGE_FAULT 0xf
  3171. #define CAUSE_FETCH_GUEST_PAGE_FAULT 0x14
  3172. #define CAUSE_LOAD_GUEST_PAGE_FAULT 0x15
  3173. #define CAUSE_VIRTUAL_INSTRUCTION 0x16
  3174. #define CAUSE_STORE_GUEST_PAGE_FAULT 0x17
  3175. #define INSN_FIELD_RD 0xf80
  3176. #define INSN_FIELD_RT 0xf8000
  3177. #define INSN_FIELD_RS1 0xf8000
  3178. #define INSN_FIELD_RS2 0x1f00000
  3179. #define INSN_FIELD_RS3 0xf8000000
  3180. #define INSN_FIELD_AQRL 0x6000000
  3181. #define INSN_FIELD_AQ 0x4000000
  3182. #define INSN_FIELD_RL 0x2000000
  3183. #define INSN_FIELD_FM 0xf0000000
  3184. #define INSN_FIELD_PRED 0xf000000
  3185. #define INSN_FIELD_SUCC 0xf00000
  3186. #define INSN_FIELD_RM 0x7000
  3187. #define INSN_FIELD_FUNCT3 0x7000
  3188. #define INSN_FIELD_FUNCT2 0x6000000
  3189. #define INSN_FIELD_IMM20 0xfffff000
  3190. #define INSN_FIELD_JIMM20 0xfffff000
  3191. #define INSN_FIELD_IMM12 0xfff00000
  3192. #define INSN_FIELD_CSR 0xfff00000
  3193. #define INSN_FIELD_IMM12HI 0xfe000000
  3194. #define INSN_FIELD_BIMM12HI 0xfe000000
  3195. #define INSN_FIELD_IMM12LO 0xf80
  3196. #define INSN_FIELD_BIMM12LO 0xf80
  3197. #define INSN_FIELD_ZIMM 0xf8000
  3198. #define INSN_FIELD_SHAMTQ 0x7f00000
  3199. #define INSN_FIELD_SHAMTW 0x1f00000
  3200. #define INSN_FIELD_SHAMTW4 0xf00000
  3201. #define INSN_FIELD_SHAMTD 0x3f00000
  3202. #define INSN_FIELD_BS 0xc0000000
  3203. #define INSN_FIELD_RNUM 0xf00000
  3204. #define INSN_FIELD_RC 0x3e000000
  3205. #define INSN_FIELD_IMM2 0x300000
  3206. #define INSN_FIELD_IMM3 0x700000
  3207. #define INSN_FIELD_IMM4 0xf00000
  3208. #define INSN_FIELD_IMM5 0x1f00000
  3209. #define INSN_FIELD_IMM6 0x3f00000
  3210. #define INSN_FIELD_OPCODE 0x7f
  3211. #define INSN_FIELD_FUNCT7 0xfe000000
  3212. #define INSN_FIELD_VD 0xf80
  3213. #define INSN_FIELD_VS3 0xf80
  3214. #define INSN_FIELD_VS1 0xf8000
  3215. #define INSN_FIELD_VS2 0x1f00000
  3216. #define INSN_FIELD_VM 0x2000000
  3217. #define INSN_FIELD_WD 0x4000000
  3218. #define INSN_FIELD_AMOOP 0xf8000000
  3219. #define INSN_FIELD_NF 0xe0000000
  3220. #define INSN_FIELD_SIMM5 0xf8000
  3221. #define INSN_FIELD_ZIMM10 0x3ff00000
  3222. #define INSN_FIELD_ZIMM11 0x7ff00000
  3223. #define INSN_FIELD_C_NZUIMM10 0x1fe0
  3224. #define INSN_FIELD_C_UIMM7LO 0x60
  3225. #define INSN_FIELD_C_UIMM7HI 0x1c00
  3226. #define INSN_FIELD_C_UIMM8LO 0x60
  3227. #define INSN_FIELD_C_UIMM8HI 0x1c00
  3228. #define INSN_FIELD_C_UIMM9LO 0x60
  3229. #define INSN_FIELD_C_UIMM9HI 0x1c00
  3230. #define INSN_FIELD_C_NZIMM6LO 0x7c
  3231. #define INSN_FIELD_C_NZIMM6HI 0x1000
  3232. #define INSN_FIELD_C_IMM6LO 0x7c
  3233. #define INSN_FIELD_C_IMM6HI 0x1000
  3234. #define INSN_FIELD_C_NZIMM10HI 0x1000
  3235. #define INSN_FIELD_C_NZIMM10LO 0x7c
  3236. #define INSN_FIELD_C_NZIMM18HI 0x1000
  3237. #define INSN_FIELD_C_NZIMM18LO 0x7c
  3238. #define INSN_FIELD_C_IMM12 0x1ffc
  3239. #define INSN_FIELD_C_BIMM9LO 0x7c
  3240. #define INSN_FIELD_C_BIMM9HI 0x1c00
  3241. #define INSN_FIELD_C_NZUIMM5 0x7c
  3242. #define INSN_FIELD_C_NZUIMM6LO 0x7c
  3243. #define INSN_FIELD_C_NZUIMM6HI 0x1000
  3244. #define INSN_FIELD_C_UIMM8SPLO 0x7c
  3245. #define INSN_FIELD_C_UIMM8SPHI 0x1000
  3246. #define INSN_FIELD_C_UIMM8SP_S 0x1f80
  3247. #define INSN_FIELD_C_UIMM10SPLO 0x7c
  3248. #define INSN_FIELD_C_UIMM10SPHI 0x1000
  3249. #define INSN_FIELD_C_UIMM9SPLO 0x7c
  3250. #define INSN_FIELD_C_UIMM9SPHI 0x1000
  3251. #define INSN_FIELD_C_UIMM10SP_S 0x1f80
  3252. #define INSN_FIELD_C_UIMM9SP_S 0x1f80
  3253. #define INSN_FIELD_C_UIMM2 0x60
  3254. #define INSN_FIELD_C_UIMM1 0x20
  3255. #define INSN_FIELD_C_RLIST 0xf0
  3256. #define INSN_FIELD_C_SPIMM 0xc
  3257. #define INSN_FIELD_C_INDEX 0x3fc
  3258. #define INSN_FIELD_RS1_P 0x380
  3259. #define INSN_FIELD_RS2_P 0x1c
  3260. #define INSN_FIELD_RD_P 0x1c
  3261. #define INSN_FIELD_RD_RS1_N0 0xf80
  3262. #define INSN_FIELD_RD_RS1_P 0x380
  3263. #define INSN_FIELD_RD_RS1 0xf80
  3264. #define INSN_FIELD_RD_N2 0xf80
  3265. #define INSN_FIELD_RD_N0 0xf80
  3266. #define INSN_FIELD_RS1_N0 0xf80
  3267. #define INSN_FIELD_C_RS2_N0 0x7c
  3268. #define INSN_FIELD_C_RS1_N0 0xf80
  3269. #define INSN_FIELD_C_RS2 0x7c
  3270. #define INSN_FIELD_C_SREG1 0x380
  3271. #define INSN_FIELD_C_SREG2 0x1c
  3272. #endif
  3273. #ifdef DECLARE_INSN
  3274. DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
  3275. DECLARE_INSN(add16, MATCH_ADD16, MASK_ADD16)
  3276. DECLARE_INSN(add32, MATCH_ADD32, MASK_ADD32)
  3277. DECLARE_INSN(add64, MATCH_ADD64, MASK_ADD64)
  3278. DECLARE_INSN(add8, MATCH_ADD8, MASK_ADD8)
  3279. DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW)
  3280. DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
  3281. DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
  3282. DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
  3283. DECLARE_INSN(aes32dsi, MATCH_AES32DSI, MASK_AES32DSI)
  3284. DECLARE_INSN(aes32dsmi, MATCH_AES32DSMI, MASK_AES32DSMI)
  3285. DECLARE_INSN(aes32esi, MATCH_AES32ESI, MASK_AES32ESI)
  3286. DECLARE_INSN(aes32esmi, MATCH_AES32ESMI, MASK_AES32ESMI)
  3287. DECLARE_INSN(aes64ds, MATCH_AES64DS, MASK_AES64DS)
  3288. DECLARE_INSN(aes64dsm, MATCH_AES64DSM, MASK_AES64DSM)
  3289. DECLARE_INSN(aes64es, MATCH_AES64ES, MASK_AES64ES)
  3290. DECLARE_INSN(aes64esm, MATCH_AES64ESM, MASK_AES64ESM)
  3291. DECLARE_INSN(aes64im, MATCH_AES64IM, MASK_AES64IM)
  3292. DECLARE_INSN(aes64ks1i, MATCH_AES64KS1I, MASK_AES64KS1I)
  3293. DECLARE_INSN(aes64ks2, MATCH_AES64KS2, MASK_AES64KS2)
  3294. DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D)
  3295. DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
  3296. DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
  3297. DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
  3298. DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
  3299. DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W)
  3300. DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
  3301. DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W)
  3302. DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D)
  3303. DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W)
  3304. DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
  3305. DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W)
  3306. DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D)
  3307. DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
  3308. DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
  3309. DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W)
  3310. DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
  3311. DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
  3312. DECLARE_INSN(and, MATCH_AND, MASK_AND)
  3313. DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
  3314. DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN)
  3315. DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
  3316. DECLARE_INSN(ave, MATCH_AVE, MASK_AVE)
  3317. DECLARE_INSN(bclr, MATCH_BCLR, MASK_BCLR)
  3318. DECLARE_INSN(bclri, MATCH_BCLRI, MASK_BCLRI)
  3319. DECLARE_INSN(bcompress, MATCH_BCOMPRESS, MASK_BCOMPRESS)
  3320. DECLARE_INSN(bcompressw, MATCH_BCOMPRESSW, MASK_BCOMPRESSW)
  3321. DECLARE_INSN(bdecompress, MATCH_BDECOMPRESS, MASK_BDECOMPRESS)
  3322. DECLARE_INSN(bdecompressw, MATCH_BDECOMPRESSW, MASK_BDECOMPRESSW)
  3323. DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
  3324. DECLARE_INSN(bext, MATCH_BEXT, MASK_BEXT)
  3325. DECLARE_INSN(bexti, MATCH_BEXTI, MASK_BEXTI)
  3326. DECLARE_INSN(bfp, MATCH_BFP, MASK_BFP)
  3327. DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW)
  3328. DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
  3329. DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
  3330. DECLARE_INSN(binv, MATCH_BINV, MASK_BINV)
  3331. DECLARE_INSN(binvi, MATCH_BINVI, MASK_BINVI)
  3332. DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
  3333. DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
  3334. DECLARE_INSN(bmatflip, MATCH_BMATFLIP, MASK_BMATFLIP)
  3335. DECLARE_INSN(bmator, MATCH_BMATOR, MASK_BMATOR)
  3336. DECLARE_INSN(bmatxor, MATCH_BMATXOR, MASK_BMATXOR)
  3337. DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
  3338. DECLARE_INSN(bset, MATCH_BSET, MASK_BSET)
  3339. DECLARE_INSN(bseti, MATCH_BSETI, MASK_BSETI)
  3340. DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD)
  3341. DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI)
  3342. DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
  3343. DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN)
  3344. DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
  3345. DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW)
  3346. DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND)
  3347. DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI)
  3348. DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ)
  3349. DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
  3350. DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
  3351. DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD)
  3352. DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP)
  3353. DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW)
  3354. DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP)
  3355. DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD)
  3356. DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP)
  3357. DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW)
  3358. DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP)
  3359. DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J)
  3360. DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL)
  3361. DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
  3362. DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
  3363. DECLARE_INSN(c_lbu, MATCH_C_LBU, MASK_C_LBU)
  3364. DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
  3365. DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
  3366. DECLARE_INSN(c_lh, MATCH_C_LH, MASK_C_LH)
  3367. DECLARE_INSN(c_lhu, MATCH_C_LHU, MASK_C_LHU)
  3368. DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
  3369. DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
  3370. DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
  3371. DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
  3372. DECLARE_INSN(c_mul, MATCH_C_MUL, MASK_C_MUL)
  3373. DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
  3374. DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
  3375. DECLARE_INSN(c_not, MATCH_C_NOT, MASK_C_NOT)
  3376. DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
  3377. DECLARE_INSN(c_sb, MATCH_C_SB, MASK_C_SB)
  3378. DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
  3379. DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
  3380. DECLARE_INSN(c_sext_b, MATCH_C_SEXT_B, MASK_C_SEXT_B)
  3381. DECLARE_INSN(c_sext_h, MATCH_C_SEXT_H, MASK_C_SEXT_H)
  3382. DECLARE_INSN(c_sh, MATCH_C_SH, MASK_C_SH)
  3383. DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
  3384. DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
  3385. DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
  3386. DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
  3387. DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
  3388. DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW)
  3389. DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP)
  3390. DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR)
  3391. DECLARE_INSN(c_zext_b, MATCH_C_ZEXT_B, MASK_C_ZEXT_B)
  3392. DECLARE_INSN(c_zext_h, MATCH_C_ZEXT_H, MASK_C_ZEXT_H)
  3393. DECLARE_INSN(c_zext_w, MATCH_C_ZEXT_W, MASK_C_ZEXT_W)
  3394. DECLARE_INSN(cbo_clean, MATCH_CBO_CLEAN, MASK_CBO_CLEAN)
  3395. DECLARE_INSN(cbo_flush, MATCH_CBO_FLUSH, MASK_CBO_FLUSH)
  3396. DECLARE_INSN(cbo_inval, MATCH_CBO_INVAL, MASK_CBO_INVAL)
  3397. DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO)
  3398. DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL)
  3399. DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH)
  3400. DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR)
  3401. DECLARE_INSN(clrs16, MATCH_CLRS16, MASK_CLRS16)
  3402. DECLARE_INSN(clrs32, MATCH_CLRS32, MASK_CLRS32)
  3403. DECLARE_INSN(clrs8, MATCH_CLRS8, MASK_CLRS8)
  3404. DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ)
  3405. DECLARE_INSN(clz16, MATCH_CLZ16, MASK_CLZ16)
  3406. DECLARE_INSN(clz32, MATCH_CLZ32, MASK_CLZ32)
  3407. DECLARE_INSN(clz8, MATCH_CLZ8, MASK_CLZ8)
  3408. DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW)
  3409. DECLARE_INSN(cm_jalt, MATCH_CM_JALT, MASK_CM_JALT)
  3410. DECLARE_INSN(cm_mva01s, MATCH_CM_MVA01S, MASK_CM_MVA01S)
  3411. DECLARE_INSN(cm_mvsa01, MATCH_CM_MVSA01, MASK_CM_MVSA01)
  3412. DECLARE_INSN(cm_pop, MATCH_CM_POP, MASK_CM_POP)
  3413. DECLARE_INSN(cm_popret, MATCH_CM_POPRET, MASK_CM_POPRET)
  3414. DECLARE_INSN(cm_popretz, MATCH_CM_POPRETZ, MASK_CM_POPRETZ)
  3415. DECLARE_INSN(cm_push, MATCH_CM_PUSH, MASK_CM_PUSH)
  3416. DECLARE_INSN(cmix, MATCH_CMIX, MASK_CMIX)
  3417. DECLARE_INSN(cmov, MATCH_CMOV, MASK_CMOV)
  3418. DECLARE_INSN(cmpeq16, MATCH_CMPEQ16, MASK_CMPEQ16)
  3419. DECLARE_INSN(cmpeq8, MATCH_CMPEQ8, MASK_CMPEQ8)
  3420. DECLARE_INSN(cpop, MATCH_CPOP, MASK_CPOP)
  3421. DECLARE_INSN(cpopw, MATCH_CPOPW, MASK_CPOPW)
  3422. DECLARE_INSN(cras16, MATCH_CRAS16, MASK_CRAS16)
  3423. DECLARE_INSN(cras32, MATCH_CRAS32, MASK_CRAS32)
  3424. DECLARE_INSN(crc32_b, MATCH_CRC32_B, MASK_CRC32_B)
  3425. DECLARE_INSN(crc32_d, MATCH_CRC32_D, MASK_CRC32_D)
  3426. DECLARE_INSN(crc32_h, MATCH_CRC32_H, MASK_CRC32_H)
  3427. DECLARE_INSN(crc32_w, MATCH_CRC32_W, MASK_CRC32_W)
  3428. DECLARE_INSN(crc32c_b, MATCH_CRC32C_B, MASK_CRC32C_B)
  3429. DECLARE_INSN(crc32c_d, MATCH_CRC32C_D, MASK_CRC32C_D)
  3430. DECLARE_INSN(crc32c_h, MATCH_CRC32C_H, MASK_CRC32C_H)
  3431. DECLARE_INSN(crc32c_w, MATCH_CRC32C_W, MASK_CRC32C_W)
  3432. DECLARE_INSN(crsa16, MATCH_CRSA16, MASK_CRSA16)
  3433. DECLARE_INSN(crsa32, MATCH_CRSA32, MASK_CRSA32)
  3434. DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
  3435. DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
  3436. DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
  3437. DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
  3438. DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
  3439. DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
  3440. DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ)
  3441. DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW)
  3442. DECLARE_INSN(czero_eqz, MATCH_CZERO_EQZ, MASK_CZERO_EQZ)
  3443. DECLARE_INSN(czero_nez, MATCH_CZERO_NEZ, MASK_CZERO_NEZ)
  3444. DECLARE_INSN(div, MATCH_DIV, MASK_DIV)
  3445. DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU)
  3446. DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
  3447. DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
  3448. DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
  3449. DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
  3450. DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
  3451. DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
  3452. DECLARE_INSN(fadd_h, MATCH_FADD_H, MASK_FADD_H)
  3453. DECLARE_INSN(fadd_q, MATCH_FADD_Q, MASK_FADD_Q)
  3454. DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
  3455. DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
  3456. DECLARE_INSN(fclass_h, MATCH_FCLASS_H, MASK_FCLASS_H)
  3457. DECLARE_INSN(fclass_q, MATCH_FCLASS_Q, MASK_FCLASS_Q)
  3458. DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
  3459. DECLARE_INSN(fcvt_d_h, MATCH_FCVT_D_H, MASK_FCVT_D_H)
  3460. DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
  3461. DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
  3462. DECLARE_INSN(fcvt_d_q, MATCH_FCVT_D_Q, MASK_FCVT_D_Q)
  3463. DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
  3464. DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
  3465. DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
  3466. DECLARE_INSN(fcvt_h_d, MATCH_FCVT_H_D, MASK_FCVT_H_D)
  3467. DECLARE_INSN(fcvt_h_l, MATCH_FCVT_H_L, MASK_FCVT_H_L)
  3468. DECLARE_INSN(fcvt_h_lu, MATCH_FCVT_H_LU, MASK_FCVT_H_LU)
  3469. DECLARE_INSN(fcvt_h_q, MATCH_FCVT_H_Q, MASK_FCVT_H_Q)
  3470. DECLARE_INSN(fcvt_h_s, MATCH_FCVT_H_S, MASK_FCVT_H_S)
  3471. DECLARE_INSN(fcvt_h_w, MATCH_FCVT_H_W, MASK_FCVT_H_W)
  3472. DECLARE_INSN(fcvt_h_wu, MATCH_FCVT_H_WU, MASK_FCVT_H_WU)
  3473. DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
  3474. DECLARE_INSN(fcvt_l_h, MATCH_FCVT_L_H, MASK_FCVT_L_H)
  3475. DECLARE_INSN(fcvt_l_q, MATCH_FCVT_L_Q, MASK_FCVT_L_Q)
  3476. DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S)
  3477. DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
  3478. DECLARE_INSN(fcvt_lu_h, MATCH_FCVT_LU_H, MASK_FCVT_LU_H)
  3479. DECLARE_INSN(fcvt_lu_q, MATCH_FCVT_LU_Q, MASK_FCVT_LU_Q)
  3480. DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S)
  3481. DECLARE_INSN(fcvt_q_d, MATCH_FCVT_Q_D, MASK_FCVT_Q_D)
  3482. DECLARE_INSN(fcvt_q_h, MATCH_FCVT_Q_H, MASK_FCVT_Q_H)
  3483. DECLARE_INSN(fcvt_q_l, MATCH_FCVT_Q_L, MASK_FCVT_Q_L)
  3484. DECLARE_INSN(fcvt_q_lu, MATCH_FCVT_Q_LU, MASK_FCVT_Q_LU)
  3485. DECLARE_INSN(fcvt_q_s, MATCH_FCVT_Q_S, MASK_FCVT_Q_S)
  3486. DECLARE_INSN(fcvt_q_w, MATCH_FCVT_Q_W, MASK_FCVT_Q_W)
  3487. DECLARE_INSN(fcvt_q_wu, MATCH_FCVT_Q_WU, MASK_FCVT_Q_WU)
  3488. DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
  3489. DECLARE_INSN(fcvt_s_h, MATCH_FCVT_S_H, MASK_FCVT_S_H)
  3490. DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L)
  3491. DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU)
  3492. DECLARE_INSN(fcvt_s_q, MATCH_FCVT_S_Q, MASK_FCVT_S_Q)
  3493. DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
  3494. DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU)
  3495. DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D)
  3496. DECLARE_INSN(fcvt_w_h, MATCH_FCVT_W_H, MASK_FCVT_W_H)
  3497. DECLARE_INSN(fcvt_w_q, MATCH_FCVT_W_Q, MASK_FCVT_W_Q)
  3498. DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S)
  3499. DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
  3500. DECLARE_INSN(fcvt_wu_h, MATCH_FCVT_WU_H, MASK_FCVT_WU_H)
  3501. DECLARE_INSN(fcvt_wu_q, MATCH_FCVT_WU_Q, MASK_FCVT_WU_Q)
  3502. DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S)
  3503. DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D)
  3504. DECLARE_INSN(fdiv_h, MATCH_FDIV_H, MASK_FDIV_H)
  3505. DECLARE_INSN(fdiv_q, MATCH_FDIV_Q, MASK_FDIV_Q)
  3506. DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S)
  3507. DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
  3508. DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
  3509. DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
  3510. DECLARE_INSN(feq_h, MATCH_FEQ_H, MASK_FEQ_H)
  3511. DECLARE_INSN(feq_q, MATCH_FEQ_Q, MASK_FEQ_Q)
  3512. DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
  3513. DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
  3514. DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
  3515. DECLARE_INSN(fle_h, MATCH_FLE_H, MASK_FLE_H)
  3516. DECLARE_INSN(fle_q, MATCH_FLE_Q, MASK_FLE_Q)
  3517. DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
  3518. DECLARE_INSN(flh, MATCH_FLH, MASK_FLH)
  3519. DECLARE_INSN(flq, MATCH_FLQ, MASK_FLQ)
  3520. DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
  3521. DECLARE_INSN(flt_h, MATCH_FLT_H, MASK_FLT_H)
  3522. DECLARE_INSN(flt_q, MATCH_FLT_Q, MASK_FLT_Q)
  3523. DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S)
  3524. DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
  3525. DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
  3526. DECLARE_INSN(fmadd_h, MATCH_FMADD_H, MASK_FMADD_H)
  3527. DECLARE_INSN(fmadd_q, MATCH_FMADD_Q, MASK_FMADD_Q)
  3528. DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S)
  3529. DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
  3530. DECLARE_INSN(fmax_h, MATCH_FMAX_H, MASK_FMAX_H)
  3531. DECLARE_INSN(fmax_q, MATCH_FMAX_Q, MASK_FMAX_Q)
  3532. DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
  3533. DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
  3534. DECLARE_INSN(fmin_h, MATCH_FMIN_H, MASK_FMIN_H)
  3535. DECLARE_INSN(fmin_q, MATCH_FMIN_Q, MASK_FMIN_Q)
  3536. DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
  3537. DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
  3538. DECLARE_INSN(fmsub_h, MATCH_FMSUB_H, MASK_FMSUB_H)
  3539. DECLARE_INSN(fmsub_q, MATCH_FMSUB_Q, MASK_FMSUB_Q)
  3540. DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S)
  3541. DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D)
  3542. DECLARE_INSN(fmul_h, MATCH_FMUL_H, MASK_FMUL_H)
  3543. DECLARE_INSN(fmul_q, MATCH_FMUL_Q, MASK_FMUL_Q)
  3544. DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
  3545. DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
  3546. DECLARE_INSN(fmv_h_x, MATCH_FMV_H_X, MASK_FMV_H_X)
  3547. DECLARE_INSN(fmv_w_x, MATCH_FMV_W_X, MASK_FMV_W_X)
  3548. DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
  3549. DECLARE_INSN(fmv_x_h, MATCH_FMV_X_H, MASK_FMV_X_H)
  3550. DECLARE_INSN(fmv_x_w, MATCH_FMV_X_W, MASK_FMV_X_W)
  3551. DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
  3552. DECLARE_INSN(fnmadd_h, MATCH_FNMADD_H, MASK_FNMADD_H)
  3553. DECLARE_INSN(fnmadd_q, MATCH_FNMADD_Q, MASK_FNMADD_Q)
  3554. DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S)
  3555. DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
  3556. DECLARE_INSN(fnmsub_h, MATCH_FNMSUB_H, MASK_FNMSUB_H)
  3557. DECLARE_INSN(fnmsub_q, MATCH_FNMSUB_Q, MASK_FNMSUB_Q)
  3558. DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S)
  3559. DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
  3560. DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D)
  3561. DECLARE_INSN(fsgnj_h, MATCH_FSGNJ_H, MASK_FSGNJ_H)
  3562. DECLARE_INSN(fsgnj_q, MATCH_FSGNJ_Q, MASK_FSGNJ_Q)
  3563. DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S)
  3564. DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
  3565. DECLARE_INSN(fsgnjn_h, MATCH_FSGNJN_H, MASK_FSGNJN_H)
  3566. DECLARE_INSN(fsgnjn_q, MATCH_FSGNJN_Q, MASK_FSGNJN_Q)
  3567. DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S)
  3568. DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D)
  3569. DECLARE_INSN(fsgnjx_h, MATCH_FSGNJX_H, MASK_FSGNJX_H)
  3570. DECLARE_INSN(fsgnjx_q, MATCH_FSGNJX_Q, MASK_FSGNJX_Q)
  3571. DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
  3572. DECLARE_INSN(fsh, MATCH_FSH, MASK_FSH)
  3573. DECLARE_INSN(fsl, MATCH_FSL, MASK_FSL)
  3574. DECLARE_INSN(fslw, MATCH_FSLW, MASK_FSLW)
  3575. DECLARE_INSN(fsq, MATCH_FSQ, MASK_FSQ)
  3576. DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
  3577. DECLARE_INSN(fsqrt_h, MATCH_FSQRT_H, MASK_FSQRT_H)
  3578. DECLARE_INSN(fsqrt_q, MATCH_FSQRT_Q, MASK_FSQRT_Q)
  3579. DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
  3580. DECLARE_INSN(fsr, MATCH_FSR, MASK_FSR)
  3581. DECLARE_INSN(fsri, MATCH_FSRI, MASK_FSRI)
  3582. DECLARE_INSN(fsriw, MATCH_FSRIW, MASK_FSRIW)
  3583. DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW)
  3584. DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
  3585. DECLARE_INSN(fsub_h, MATCH_FSUB_H, MASK_FSUB_H)
  3586. DECLARE_INSN(fsub_q, MATCH_FSUB_Q, MASK_FSUB_Q)
  3587. DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
  3588. DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
  3589. DECLARE_INSN(gorc, MATCH_GORC, MASK_GORC)
  3590. DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI)
  3591. DECLARE_INSN(gorciw, MATCH_GORCIW, MASK_GORCIW)
  3592. DECLARE_INSN(gorcw, MATCH_GORCW, MASK_GORCW)
  3593. DECLARE_INSN(grev, MATCH_GREV, MASK_GREV)
  3594. DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI)
  3595. DECLARE_INSN(greviw, MATCH_GREVIW, MASK_GREVIW)
  3596. DECLARE_INSN(grevw, MATCH_GREVW, MASK_GREVW)
  3597. DECLARE_INSN(hfence_gvma, MATCH_HFENCE_GVMA, MASK_HFENCE_GVMA)
  3598. DECLARE_INSN(hfence_vvma, MATCH_HFENCE_VVMA, MASK_HFENCE_VVMA)
  3599. DECLARE_INSN(hinval_gvma, MATCH_HINVAL_GVMA, MASK_HINVAL_GVMA)
  3600. DECLARE_INSN(hinval_vvma, MATCH_HINVAL_VVMA, MASK_HINVAL_VVMA)
  3601. DECLARE_INSN(hlv_b, MATCH_HLV_B, MASK_HLV_B)
  3602. DECLARE_INSN(hlv_bu, MATCH_HLV_BU, MASK_HLV_BU)
  3603. DECLARE_INSN(hlv_d, MATCH_HLV_D, MASK_HLV_D)
  3604. DECLARE_INSN(hlv_h, MATCH_HLV_H, MASK_HLV_H)
  3605. DECLARE_INSN(hlv_hu, MATCH_HLV_HU, MASK_HLV_HU)
  3606. DECLARE_INSN(hlv_w, MATCH_HLV_W, MASK_HLV_W)
  3607. DECLARE_INSN(hlv_wu, MATCH_HLV_WU, MASK_HLV_WU)
  3608. DECLARE_INSN(hlvx_hu, MATCH_HLVX_HU, MASK_HLVX_HU)
  3609. DECLARE_INSN(hlvx_wu, MATCH_HLVX_WU, MASK_HLVX_WU)
  3610. DECLARE_INSN(hsv_b, MATCH_HSV_B, MASK_HSV_B)
  3611. DECLARE_INSN(hsv_d, MATCH_HSV_D, MASK_HSV_D)
  3612. DECLARE_INSN(hsv_h, MATCH_HSV_H, MASK_HSV_H)
  3613. DECLARE_INSN(hsv_w, MATCH_HSV_W, MASK_HSV_W)
  3614. DECLARE_INSN(insb, MATCH_INSB, MASK_INSB)
  3615. DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
  3616. DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
  3617. DECLARE_INSN(kabs16, MATCH_KABS16, MASK_KABS16)
  3618. DECLARE_INSN(kabs32, MATCH_KABS32, MASK_KABS32)
  3619. DECLARE_INSN(kabs8, MATCH_KABS8, MASK_KABS8)
  3620. DECLARE_INSN(kabsw, MATCH_KABSW, MASK_KABSW)
  3621. DECLARE_INSN(kadd16, MATCH_KADD16, MASK_KADD16)
  3622. DECLARE_INSN(kadd32, MATCH_KADD32, MASK_KADD32)
  3623. DECLARE_INSN(kadd64, MATCH_KADD64, MASK_KADD64)
  3624. DECLARE_INSN(kadd8, MATCH_KADD8, MASK_KADD8)
  3625. DECLARE_INSN(kaddh, MATCH_KADDH, MASK_KADDH)
  3626. DECLARE_INSN(kaddw, MATCH_KADDW, MASK_KADDW)
  3627. DECLARE_INSN(kcras16, MATCH_KCRAS16, MASK_KCRAS16)
  3628. DECLARE_INSN(kcras32, MATCH_KCRAS32, MASK_KCRAS32)
  3629. DECLARE_INSN(kcrsa16, MATCH_KCRSA16, MASK_KCRSA16)
  3630. DECLARE_INSN(kcrsa32, MATCH_KCRSA32, MASK_KCRSA32)
  3631. DECLARE_INSN(kdmabb, MATCH_KDMABB, MASK_KDMABB)
  3632. DECLARE_INSN(kdmabb16, MATCH_KDMABB16, MASK_KDMABB16)
  3633. DECLARE_INSN(kdmabt, MATCH_KDMABT, MASK_KDMABT)
  3634. DECLARE_INSN(kdmabt16, MATCH_KDMABT16, MASK_KDMABT16)
  3635. DECLARE_INSN(kdmatt, MATCH_KDMATT, MASK_KDMATT)
  3636. DECLARE_INSN(kdmatt16, MATCH_KDMATT16, MASK_KDMATT16)
  3637. DECLARE_INSN(kdmbb, MATCH_KDMBB, MASK_KDMBB)
  3638. DECLARE_INSN(kdmbb16, MATCH_KDMBB16, MASK_KDMBB16)
  3639. DECLARE_INSN(kdmbt, MATCH_KDMBT, MASK_KDMBT)
  3640. DECLARE_INSN(kdmbt16, MATCH_KDMBT16, MASK_KDMBT16)
  3641. DECLARE_INSN(kdmtt, MATCH_KDMTT, MASK_KDMTT)
  3642. DECLARE_INSN(kdmtt16, MATCH_KDMTT16, MASK_KDMTT16)
  3643. DECLARE_INSN(khm16, MATCH_KHM16, MASK_KHM16)
  3644. DECLARE_INSN(khm8, MATCH_KHM8, MASK_KHM8)
  3645. DECLARE_INSN(khmbb, MATCH_KHMBB, MASK_KHMBB)
  3646. DECLARE_INSN(khmbb16, MATCH_KHMBB16, MASK_KHMBB16)
  3647. DECLARE_INSN(khmbt, MATCH_KHMBT, MASK_KHMBT)
  3648. DECLARE_INSN(khmbt16, MATCH_KHMBT16, MASK_KHMBT16)
  3649. DECLARE_INSN(khmtt, MATCH_KHMTT, MASK_KHMTT)
  3650. DECLARE_INSN(khmtt16, MATCH_KHMTT16, MASK_KHMTT16)
  3651. DECLARE_INSN(khmx16, MATCH_KHMX16, MASK_KHMX16)
  3652. DECLARE_INSN(khmx8, MATCH_KHMX8, MASK_KHMX8)
  3653. DECLARE_INSN(kmabb, MATCH_KMABB, MASK_KMABB)
  3654. DECLARE_INSN(kmabb32, MATCH_KMABB32, MASK_KMABB32)
  3655. DECLARE_INSN(kmabt, MATCH_KMABT, MASK_KMABT)
  3656. DECLARE_INSN(kmabt32, MATCH_KMABT32, MASK_KMABT32)
  3657. DECLARE_INSN(kmada, MATCH_KMADA, MASK_KMADA)
  3658. DECLARE_INSN(kmadrs, MATCH_KMADRS, MASK_KMADRS)
  3659. DECLARE_INSN(kmadrs32, MATCH_KMADRS32, MASK_KMADRS32)
  3660. DECLARE_INSN(kmads, MATCH_KMADS, MASK_KMADS)
  3661. DECLARE_INSN(kmads32, MATCH_KMADS32, MASK_KMADS32)
  3662. DECLARE_INSN(kmar64, MATCH_KMAR64, MASK_KMAR64)
  3663. DECLARE_INSN(kmatt, MATCH_KMATT, MASK_KMATT)
  3664. DECLARE_INSN(kmatt32, MATCH_KMATT32, MASK_KMATT32)
  3665. DECLARE_INSN(kmaxda, MATCH_KMAXDA, MASK_KMAXDA)
  3666. DECLARE_INSN(kmaxda32, MATCH_KMAXDA32, MASK_KMAXDA32)
  3667. DECLARE_INSN(kmaxds, MATCH_KMAXDS, MASK_KMAXDS)
  3668. DECLARE_INSN(kmaxds32, MATCH_KMAXDS32, MASK_KMAXDS32)
  3669. DECLARE_INSN(kmda, MATCH_KMDA, MASK_KMDA)
  3670. DECLARE_INSN(kmda32, MATCH_KMDA32, MASK_KMDA32)
  3671. DECLARE_INSN(kmmac, MATCH_KMMAC, MASK_KMMAC)
  3672. DECLARE_INSN(kmmac_u, MATCH_KMMAC_U, MASK_KMMAC_U)
  3673. DECLARE_INSN(kmmawb, MATCH_KMMAWB, MASK_KMMAWB)
  3674. DECLARE_INSN(kmmawb2, MATCH_KMMAWB2, MASK_KMMAWB2)
  3675. DECLARE_INSN(kmmawb2_u, MATCH_KMMAWB2_U, MASK_KMMAWB2_U)
  3676. DECLARE_INSN(kmmawb_u, MATCH_KMMAWB_U, MASK_KMMAWB_U)
  3677. DECLARE_INSN(kmmawt, MATCH_KMMAWT, MASK_KMMAWT)
  3678. DECLARE_INSN(kmmawt2, MATCH_KMMAWT2, MASK_KMMAWT2)
  3679. DECLARE_INSN(kmmawt2_u, MATCH_KMMAWT2_U, MASK_KMMAWT2_U)
  3680. DECLARE_INSN(kmmawt_u, MATCH_KMMAWT_U, MASK_KMMAWT_U)
  3681. DECLARE_INSN(kmmsb, MATCH_KMMSB, MASK_KMMSB)
  3682. DECLARE_INSN(kmmsb_u, MATCH_KMMSB_U, MASK_KMMSB_U)
  3683. DECLARE_INSN(kmmwb2, MATCH_KMMWB2, MASK_KMMWB2)
  3684. DECLARE_INSN(kmmwb2_u, MATCH_KMMWB2_U, MASK_KMMWB2_U)
  3685. DECLARE_INSN(kmmwt2, MATCH_KMMWT2, MASK_KMMWT2)
  3686. DECLARE_INSN(kmmwt2_u, MATCH_KMMWT2_U, MASK_KMMWT2_U)
  3687. DECLARE_INSN(kmsda, MATCH_KMSDA, MASK_KMSDA)
  3688. DECLARE_INSN(kmsda32, MATCH_KMSDA32, MASK_KMSDA32)
  3689. DECLARE_INSN(kmsr64, MATCH_KMSR64, MASK_KMSR64)
  3690. DECLARE_INSN(kmsxda, MATCH_KMSXDA, MASK_KMSXDA)
  3691. DECLARE_INSN(kmsxda32, MATCH_KMSXDA32, MASK_KMSXDA32)
  3692. DECLARE_INSN(kmxda, MATCH_KMXDA, MASK_KMXDA)
  3693. DECLARE_INSN(kmxda32, MATCH_KMXDA32, MASK_KMXDA32)
  3694. DECLARE_INSN(ksll16, MATCH_KSLL16, MASK_KSLL16)
  3695. DECLARE_INSN(ksll32, MATCH_KSLL32, MASK_KSLL32)
  3696. DECLARE_INSN(ksll8, MATCH_KSLL8, MASK_KSLL8)
  3697. DECLARE_INSN(kslli16, MATCH_KSLLI16, MASK_KSLLI16)
  3698. DECLARE_INSN(kslli32, MATCH_KSLLI32, MASK_KSLLI32)
  3699. DECLARE_INSN(kslli8, MATCH_KSLLI8, MASK_KSLLI8)
  3700. DECLARE_INSN(kslliw, MATCH_KSLLIW, MASK_KSLLIW)
  3701. DECLARE_INSN(ksllw, MATCH_KSLLW, MASK_KSLLW)
  3702. DECLARE_INSN(kslra16, MATCH_KSLRA16, MASK_KSLRA16)
  3703. DECLARE_INSN(kslra16_u, MATCH_KSLRA16_U, MASK_KSLRA16_U)
  3704. DECLARE_INSN(kslra32, MATCH_KSLRA32, MASK_KSLRA32)
  3705. DECLARE_INSN(kslra32_u, MATCH_KSLRA32_U, MASK_KSLRA32_U)
  3706. DECLARE_INSN(kslra8, MATCH_KSLRA8, MASK_KSLRA8)
  3707. DECLARE_INSN(kslra8_u, MATCH_KSLRA8_U, MASK_KSLRA8_U)
  3708. DECLARE_INSN(kslraw, MATCH_KSLRAW, MASK_KSLRAW)
  3709. DECLARE_INSN(kslraw_u, MATCH_KSLRAW_U, MASK_KSLRAW_U)
  3710. DECLARE_INSN(kstas16, MATCH_KSTAS16, MASK_KSTAS16)
  3711. DECLARE_INSN(kstas32, MATCH_KSTAS32, MASK_KSTAS32)
  3712. DECLARE_INSN(kstsa16, MATCH_KSTSA16, MASK_KSTSA16)
  3713. DECLARE_INSN(kstsa32, MATCH_KSTSA32, MASK_KSTSA32)
  3714. DECLARE_INSN(ksub16, MATCH_KSUB16, MASK_KSUB16)
  3715. DECLARE_INSN(ksub32, MATCH_KSUB32, MASK_KSUB32)
  3716. DECLARE_INSN(ksub64, MATCH_KSUB64, MASK_KSUB64)
  3717. DECLARE_INSN(ksub8, MATCH_KSUB8, MASK_KSUB8)
  3718. DECLARE_INSN(ksubh, MATCH_KSUBH, MASK_KSUBH)
  3719. DECLARE_INSN(ksubw, MATCH_KSUBW, MASK_KSUBW)
  3720. DECLARE_INSN(kwmmul, MATCH_KWMMUL, MASK_KWMMUL)
  3721. DECLARE_INSN(kwmmul_u, MATCH_KWMMUL_U, MASK_KWMMUL_U)
  3722. DECLARE_INSN(lb, MATCH_LB, MASK_LB)
  3723. DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
  3724. DECLARE_INSN(ld, MATCH_LD, MASK_LD)
  3725. DECLARE_INSN(lh, MATCH_LH, MASK_LH)
  3726. DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
  3727. DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
  3728. DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
  3729. DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
  3730. DECLARE_INSN(lw, MATCH_LW, MASK_LW)
  3731. DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
  3732. DECLARE_INSN(maddr32, MATCH_MADDR32, MASK_MADDR32)
  3733. DECLARE_INSN(max, MATCH_MAX, MASK_MAX)
  3734. DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
  3735. DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
  3736. DECLARE_INSN(minu, MATCH_MINU, MASK_MINU)
  3737. DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
  3738. DECLARE_INSN(msubr32, MATCH_MSUBR32, MASK_MSUBR32)
  3739. DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
  3740. DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
  3741. DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
  3742. DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
  3743. DECLARE_INSN(mulr64, MATCH_MULR64, MASK_MULR64)
  3744. DECLARE_INSN(mulsr64, MATCH_MULSR64, MASK_MULSR64)
  3745. DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW)
  3746. DECLARE_INSN(or, MATCH_OR, MASK_OR)
  3747. DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
  3748. DECLARE_INSN(orn, MATCH_ORN, MASK_ORN)
  3749. DECLARE_INSN(pack, MATCH_PACK, MASK_PACK)
  3750. DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH)
  3751. DECLARE_INSN(packu, MATCH_PACKU, MASK_PACKU)
  3752. DECLARE_INSN(packuw, MATCH_PACKUW, MASK_PACKUW)
  3753. DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW)
  3754. DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE)
  3755. DECLARE_INSN(pbsad, MATCH_PBSAD, MASK_PBSAD)
  3756. DECLARE_INSN(pbsada, MATCH_PBSADA, MASK_PBSADA)
  3757. DECLARE_INSN(pkbb16, MATCH_PKBB16, MASK_PKBB16)
  3758. DECLARE_INSN(pkbt16, MATCH_PKBT16, MASK_PKBT16)
  3759. DECLARE_INSN(pkbt32, MATCH_PKBT32, MASK_PKBT32)
  3760. DECLARE_INSN(pktb16, MATCH_PKTB16, MASK_PKTB16)
  3761. DECLARE_INSN(pktb32, MATCH_PKTB32, MASK_PKTB32)
  3762. DECLARE_INSN(pktt16, MATCH_PKTT16, MASK_PKTT16)
  3763. DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I)
  3764. DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R)
  3765. DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W)
  3766. DECLARE_INSN(radd16, MATCH_RADD16, MASK_RADD16)
  3767. DECLARE_INSN(radd32, MATCH_RADD32, MASK_RADD32)
  3768. DECLARE_INSN(radd64, MATCH_RADD64, MASK_RADD64)
  3769. DECLARE_INSN(radd8, MATCH_RADD8, MASK_RADD8)
  3770. DECLARE_INSN(raddw, MATCH_RADDW, MASK_RADDW)
  3771. DECLARE_INSN(rcras16, MATCH_RCRAS16, MASK_RCRAS16)
  3772. DECLARE_INSN(rcras32, MATCH_RCRAS32, MASK_RCRAS32)
  3773. DECLARE_INSN(rcrsa16, MATCH_RCRSA16, MASK_RCRSA16)
  3774. DECLARE_INSN(rcrsa32, MATCH_RCRSA32, MASK_RCRSA32)
  3775. DECLARE_INSN(rem, MATCH_REM, MASK_REM)
  3776. DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
  3777. DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
  3778. DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
  3779. DECLARE_INSN(rol, MATCH_ROL, MASK_ROL)
  3780. DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW)
  3781. DECLARE_INSN(ror, MATCH_ROR, MASK_ROR)
  3782. DECLARE_INSN(rori, MATCH_RORI, MASK_RORI)
  3783. DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
  3784. DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
  3785. DECLARE_INSN(rstas16, MATCH_RSTAS16, MASK_RSTAS16)
  3786. DECLARE_INSN(rstas32, MATCH_RSTAS32, MASK_RSTAS32)
  3787. DECLARE_INSN(rstsa16, MATCH_RSTSA16, MASK_RSTSA16)
  3788. DECLARE_INSN(rstsa32, MATCH_RSTSA32, MASK_RSTSA32)
  3789. DECLARE_INSN(rsub16, MATCH_RSUB16, MASK_RSUB16)
  3790. DECLARE_INSN(rsub32, MATCH_RSUB32, MASK_RSUB32)
  3791. DECLARE_INSN(rsub64, MATCH_RSUB64, MASK_RSUB64)
  3792. DECLARE_INSN(rsub8, MATCH_RSUB8, MASK_RSUB8)
  3793. DECLARE_INSN(rsubw, MATCH_RSUBW, MASK_RSUBW)
  3794. DECLARE_INSN(sb, MATCH_SB, MASK_SB)
  3795. DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
  3796. DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
  3797. DECLARE_INSN(sclip16, MATCH_SCLIP16, MASK_SCLIP16)
  3798. DECLARE_INSN(sclip32, MATCH_SCLIP32, MASK_SCLIP32)
  3799. DECLARE_INSN(sclip8, MATCH_SCLIP8, MASK_SCLIP8)
  3800. DECLARE_INSN(scmple16, MATCH_SCMPLE16, MASK_SCMPLE16)
  3801. DECLARE_INSN(scmple8, MATCH_SCMPLE8, MASK_SCMPLE8)
  3802. DECLARE_INSN(scmplt16, MATCH_SCMPLT16, MASK_SCMPLT16)
  3803. DECLARE_INSN(scmplt8, MATCH_SCMPLT8, MASK_SCMPLT8)
  3804. DECLARE_INSN(sd, MATCH_SD, MASK_SD)
  3805. DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B)
  3806. DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H)
  3807. DECLARE_INSN(sfence_inval_ir, MATCH_SFENCE_INVAL_IR, MASK_SFENCE_INVAL_IR)
  3808. DECLARE_INSN(sfence_vma, MATCH_SFENCE_VMA, MASK_SFENCE_VMA)
  3809. DECLARE_INSN(sfence_w_inval, MATCH_SFENCE_W_INVAL, MASK_SFENCE_W_INVAL)
  3810. DECLARE_INSN(sh, MATCH_SH, MASK_SH)
  3811. DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
  3812. DECLARE_INSN(sh1add_uw, MATCH_SH1ADD_UW, MASK_SH1ADD_UW)
  3813. DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD)
  3814. DECLARE_INSN(sh2add_uw, MATCH_SH2ADD_UW, MASK_SH2ADD_UW)
  3815. DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD)
  3816. DECLARE_INSN(sh3add_uw, MATCH_SH3ADD_UW, MASK_SH3ADD_UW)
  3817. DECLARE_INSN(sha256sig0, MATCH_SHA256SIG0, MASK_SHA256SIG0)
  3818. DECLARE_INSN(sha256sig1, MATCH_SHA256SIG1, MASK_SHA256SIG1)
  3819. DECLARE_INSN(sha256sum0, MATCH_SHA256SUM0, MASK_SHA256SUM0)
  3820. DECLARE_INSN(sha256sum1, MATCH_SHA256SUM1, MASK_SHA256SUM1)
  3821. DECLARE_INSN(sha512sig0, MATCH_SHA512SIG0, MASK_SHA512SIG0)
  3822. DECLARE_INSN(sha512sig0h, MATCH_SHA512SIG0H, MASK_SHA512SIG0H)
  3823. DECLARE_INSN(sha512sig0l, MATCH_SHA512SIG0L, MASK_SHA512SIG0L)
  3824. DECLARE_INSN(sha512sig1, MATCH_SHA512SIG1, MASK_SHA512SIG1)
  3825. DECLARE_INSN(sha512sig1h, MATCH_SHA512SIG1H, MASK_SHA512SIG1H)
  3826. DECLARE_INSN(sha512sig1l, MATCH_SHA512SIG1L, MASK_SHA512SIG1L)
  3827. DECLARE_INSN(sha512sum0, MATCH_SHA512SUM0, MASK_SHA512SUM0)
  3828. DECLARE_INSN(sha512sum0r, MATCH_SHA512SUM0R, MASK_SHA512SUM0R)
  3829. DECLARE_INSN(sha512sum1, MATCH_SHA512SUM1, MASK_SHA512SUM1)
  3830. DECLARE_INSN(sha512sum1r, MATCH_SHA512SUM1R, MASK_SHA512SUM1R)
  3831. DECLARE_INSN(shfl, MATCH_SHFL, MASK_SHFL)
  3832. DECLARE_INSN(shfli, MATCH_SHFLI, MASK_SHFLI)
  3833. DECLARE_INSN(shflw, MATCH_SHFLW, MASK_SHFLW)
  3834. DECLARE_INSN(sinval_vma, MATCH_SINVAL_VMA, MASK_SINVAL_VMA)
  3835. DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
  3836. DECLARE_INSN(sll16, MATCH_SLL16, MASK_SLL16)
  3837. DECLARE_INSN(sll32, MATCH_SLL32, MASK_SLL32)
  3838. DECLARE_INSN(sll8, MATCH_SLL8, MASK_SLL8)
  3839. DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
  3840. DECLARE_INSN(slli16, MATCH_SLLI16, MASK_SLLI16)
  3841. DECLARE_INSN(slli32, MATCH_SLLI32, MASK_SLLI32)
  3842. DECLARE_INSN(slli8, MATCH_SLLI8, MASK_SLLI8)
  3843. DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
  3844. DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW)
  3845. DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
  3846. DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
  3847. DECLARE_INSN(slo, MATCH_SLO, MASK_SLO)
  3848. DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI)
  3849. DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW)
  3850. DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW)
  3851. DECLARE_INSN(slt, MATCH_SLT, MASK_SLT)
  3852. DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI)
  3853. DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
  3854. DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
  3855. DECLARE_INSN(sm3p0, MATCH_SM3P0, MASK_SM3P0)
  3856. DECLARE_INSN(sm3p1, MATCH_SM3P1, MASK_SM3P1)
  3857. DECLARE_INSN(sm4ed, MATCH_SM4ED, MASK_SM4ED)
  3858. DECLARE_INSN(sm4ks, MATCH_SM4KS, MASK_SM4KS)
  3859. DECLARE_INSN(smal, MATCH_SMAL, MASK_SMAL)
  3860. DECLARE_INSN(smalbb, MATCH_SMALBB, MASK_SMALBB)
  3861. DECLARE_INSN(smalbt, MATCH_SMALBT, MASK_SMALBT)
  3862. DECLARE_INSN(smalda, MATCH_SMALDA, MASK_SMALDA)
  3863. DECLARE_INSN(smaldrs, MATCH_SMALDRS, MASK_SMALDRS)
  3864. DECLARE_INSN(smalds, MATCH_SMALDS, MASK_SMALDS)
  3865. DECLARE_INSN(smaltt, MATCH_SMALTT, MASK_SMALTT)
  3866. DECLARE_INSN(smalxda, MATCH_SMALXDA, MASK_SMALXDA)
  3867. DECLARE_INSN(smalxds, MATCH_SMALXDS, MASK_SMALXDS)
  3868. DECLARE_INSN(smaqa, MATCH_SMAQA, MASK_SMAQA)
  3869. DECLARE_INSN(smaqa_su, MATCH_SMAQA_SU, MASK_SMAQA_SU)
  3870. DECLARE_INSN(smar64, MATCH_SMAR64, MASK_SMAR64)
  3871. DECLARE_INSN(smax16, MATCH_SMAX16, MASK_SMAX16)
  3872. DECLARE_INSN(smax32, MATCH_SMAX32, MASK_SMAX32)
  3873. DECLARE_INSN(smax8, MATCH_SMAX8, MASK_SMAX8)
  3874. DECLARE_INSN(smbb16, MATCH_SMBB16, MASK_SMBB16)
  3875. DECLARE_INSN(smbt16, MATCH_SMBT16, MASK_SMBT16)
  3876. DECLARE_INSN(smbt32, MATCH_SMBT32, MASK_SMBT32)
  3877. DECLARE_INSN(smdrs, MATCH_SMDRS, MASK_SMDRS)
  3878. DECLARE_INSN(smdrs32, MATCH_SMDRS32, MASK_SMDRS32)
  3879. DECLARE_INSN(smds, MATCH_SMDS, MASK_SMDS)
  3880. DECLARE_INSN(smds32, MATCH_SMDS32, MASK_SMDS32)
  3881. DECLARE_INSN(smin16, MATCH_SMIN16, MASK_SMIN16)
  3882. DECLARE_INSN(smin32, MATCH_SMIN32, MASK_SMIN32)
  3883. DECLARE_INSN(smin8, MATCH_SMIN8, MASK_SMIN8)
  3884. DECLARE_INSN(smmul, MATCH_SMMUL, MASK_SMMUL)
  3885. DECLARE_INSN(smmul_u, MATCH_SMMUL_U, MASK_SMMUL_U)
  3886. DECLARE_INSN(smmwb, MATCH_SMMWB, MASK_SMMWB)
  3887. DECLARE_INSN(smmwb_u, MATCH_SMMWB_U, MASK_SMMWB_U)
  3888. DECLARE_INSN(smmwt, MATCH_SMMWT, MASK_SMMWT)
  3889. DECLARE_INSN(smmwt_u, MATCH_SMMWT_U, MASK_SMMWT_U)
  3890. DECLARE_INSN(smslda, MATCH_SMSLDA, MASK_SMSLDA)
  3891. DECLARE_INSN(smslxda, MATCH_SMSLXDA, MASK_SMSLXDA)
  3892. DECLARE_INSN(smsr64, MATCH_SMSR64, MASK_SMSR64)
  3893. DECLARE_INSN(smtt16, MATCH_SMTT16, MASK_SMTT16)
  3894. DECLARE_INSN(smtt32, MATCH_SMTT32, MASK_SMTT32)
  3895. DECLARE_INSN(smul16, MATCH_SMUL16, MASK_SMUL16)
  3896. DECLARE_INSN(smul8, MATCH_SMUL8, MASK_SMUL8)
  3897. DECLARE_INSN(smulx16, MATCH_SMULX16, MASK_SMULX16)
  3898. DECLARE_INSN(smulx8, MATCH_SMULX8, MASK_SMULX8)
  3899. DECLARE_INSN(smxds, MATCH_SMXDS, MASK_SMXDS)
  3900. DECLARE_INSN(smxds32, MATCH_SMXDS32, MASK_SMXDS32)
  3901. DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
  3902. DECLARE_INSN(sra16, MATCH_SRA16, MASK_SRA16)
  3903. DECLARE_INSN(sra16_u, MATCH_SRA16_U, MASK_SRA16_U)
  3904. DECLARE_INSN(sra32, MATCH_SRA32, MASK_SRA32)
  3905. DECLARE_INSN(sra32_u, MATCH_SRA32_U, MASK_SRA32_U)
  3906. DECLARE_INSN(sra8, MATCH_SRA8, MASK_SRA8)
  3907. DECLARE_INSN(sra8_u, MATCH_SRA8_U, MASK_SRA8_U)
  3908. DECLARE_INSN(sra_u, MATCH_SRA_U, MASK_SRA_U)
  3909. DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
  3910. DECLARE_INSN(srai16, MATCH_SRAI16, MASK_SRAI16)
  3911. DECLARE_INSN(srai16_u, MATCH_SRAI16_U, MASK_SRAI16_U)
  3912. DECLARE_INSN(srai32, MATCH_SRAI32, MASK_SRAI32)
  3913. DECLARE_INSN(srai32_u, MATCH_SRAI32_U, MASK_SRAI32_U)
  3914. DECLARE_INSN(srai8, MATCH_SRAI8, MASK_SRAI8)
  3915. DECLARE_INSN(srai8_u, MATCH_SRAI8_U, MASK_SRAI8_U)
  3916. DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32)
  3917. DECLARE_INSN(srai_u, MATCH_SRAI_U, MASK_SRAI_U)
  3918. DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
  3919. DECLARE_INSN(sraiw_u, MATCH_SRAIW_U, MASK_SRAIW_U)
  3920. DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
  3921. DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
  3922. DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
  3923. DECLARE_INSN(srl16, MATCH_SRL16, MASK_SRL16)
  3924. DECLARE_INSN(srl16_u, MATCH_SRL16_U, MASK_SRL16_U)
  3925. DECLARE_INSN(srl32, MATCH_SRL32, MASK_SRL32)
  3926. DECLARE_INSN(srl32_u, MATCH_SRL32_U, MASK_SRL32_U)
  3927. DECLARE_INSN(srl8, MATCH_SRL8, MASK_SRL8)
  3928. DECLARE_INSN(srl8_u, MATCH_SRL8_U, MASK_SRL8_U)
  3929. DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
  3930. DECLARE_INSN(srli16, MATCH_SRLI16, MASK_SRLI16)
  3931. DECLARE_INSN(srli16_u, MATCH_SRLI16_U, MASK_SRLI16_U)
  3932. DECLARE_INSN(srli32, MATCH_SRLI32, MASK_SRLI32)
  3933. DECLARE_INSN(srli32_u, MATCH_SRLI32_U, MASK_SRLI32_U)
  3934. DECLARE_INSN(srli8, MATCH_SRLI8, MASK_SRLI8)
  3935. DECLARE_INSN(srli8_u, MATCH_SRLI8_U, MASK_SRLI8_U)
  3936. DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32)
  3937. DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
  3938. DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
  3939. DECLARE_INSN(sro, MATCH_SRO, MASK_SRO)
  3940. DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI)
  3941. DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW)
  3942. DECLARE_INSN(srow, MATCH_SROW, MASK_SROW)
  3943. DECLARE_INSN(stas16, MATCH_STAS16, MASK_STAS16)
  3944. DECLARE_INSN(stas32, MATCH_STAS32, MASK_STAS32)
  3945. DECLARE_INSN(stsa16, MATCH_STSA16, MASK_STSA16)
  3946. DECLARE_INSN(stsa32, MATCH_STSA32, MASK_STSA32)
  3947. DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
  3948. DECLARE_INSN(sub16, MATCH_SUB16, MASK_SUB16)
  3949. DECLARE_INSN(sub32, MATCH_SUB32, MASK_SUB32)
  3950. DECLARE_INSN(sub64, MATCH_SUB64, MASK_SUB64)
  3951. DECLARE_INSN(sub8, MATCH_SUB8, MASK_SUB8)
  3952. DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
  3953. DECLARE_INSN(sunpkd810, MATCH_SUNPKD810, MASK_SUNPKD810)
  3954. DECLARE_INSN(sunpkd820, MATCH_SUNPKD820, MASK_SUNPKD820)
  3955. DECLARE_INSN(sunpkd830, MATCH_SUNPKD830, MASK_SUNPKD830)
  3956. DECLARE_INSN(sunpkd831, MATCH_SUNPKD831, MASK_SUNPKD831)
  3957. DECLARE_INSN(sunpkd832, MATCH_SUNPKD832, MASK_SUNPKD832)
  3958. DECLARE_INSN(sw, MATCH_SW, MASK_SW)
  3959. DECLARE_INSN(uclip16, MATCH_UCLIP16, MASK_UCLIP16)
  3960. DECLARE_INSN(uclip32, MATCH_UCLIP32, MASK_UCLIP32)
  3961. DECLARE_INSN(uclip8, MATCH_UCLIP8, MASK_UCLIP8)
  3962. DECLARE_INSN(ucmple16, MATCH_UCMPLE16, MASK_UCMPLE16)
  3963. DECLARE_INSN(ucmple8, MATCH_UCMPLE8, MASK_UCMPLE8)
  3964. DECLARE_INSN(ucmplt16, MATCH_UCMPLT16, MASK_UCMPLT16)
  3965. DECLARE_INSN(ucmplt8, MATCH_UCMPLT8, MASK_UCMPLT8)
  3966. DECLARE_INSN(ukadd16, MATCH_UKADD16, MASK_UKADD16)
  3967. DECLARE_INSN(ukadd32, MATCH_UKADD32, MASK_UKADD32)
  3968. DECLARE_INSN(ukadd64, MATCH_UKADD64, MASK_UKADD64)
  3969. DECLARE_INSN(ukadd8, MATCH_UKADD8, MASK_UKADD8)
  3970. DECLARE_INSN(ukaddh, MATCH_UKADDH, MASK_UKADDH)
  3971. DECLARE_INSN(ukaddw, MATCH_UKADDW, MASK_UKADDW)
  3972. DECLARE_INSN(ukcras16, MATCH_UKCRAS16, MASK_UKCRAS16)
  3973. DECLARE_INSN(ukcras32, MATCH_UKCRAS32, MASK_UKCRAS32)
  3974. DECLARE_INSN(ukcrsa16, MATCH_UKCRSA16, MASK_UKCRSA16)
  3975. DECLARE_INSN(ukcrsa32, MATCH_UKCRSA32, MASK_UKCRSA32)
  3976. DECLARE_INSN(ukmar64, MATCH_UKMAR64, MASK_UKMAR64)
  3977. DECLARE_INSN(ukmsr64, MATCH_UKMSR64, MASK_UKMSR64)
  3978. DECLARE_INSN(ukstas16, MATCH_UKSTAS16, MASK_UKSTAS16)
  3979. DECLARE_INSN(ukstas32, MATCH_UKSTAS32, MASK_UKSTAS32)
  3980. DECLARE_INSN(ukstsa16, MATCH_UKSTSA16, MASK_UKSTSA16)
  3981. DECLARE_INSN(ukstsa32, MATCH_UKSTSA32, MASK_UKSTSA32)
  3982. DECLARE_INSN(uksub16, MATCH_UKSUB16, MASK_UKSUB16)
  3983. DECLARE_INSN(uksub32, MATCH_UKSUB32, MASK_UKSUB32)
  3984. DECLARE_INSN(uksub64, MATCH_UKSUB64, MASK_UKSUB64)
  3985. DECLARE_INSN(uksub8, MATCH_UKSUB8, MASK_UKSUB8)
  3986. DECLARE_INSN(uksubh, MATCH_UKSUBH, MASK_UKSUBH)
  3987. DECLARE_INSN(uksubw, MATCH_UKSUBW, MASK_UKSUBW)
  3988. DECLARE_INSN(umaqa, MATCH_UMAQA, MASK_UMAQA)
  3989. DECLARE_INSN(umar64, MATCH_UMAR64, MASK_UMAR64)
  3990. DECLARE_INSN(umax16, MATCH_UMAX16, MASK_UMAX16)
  3991. DECLARE_INSN(umax32, MATCH_UMAX32, MASK_UMAX32)
  3992. DECLARE_INSN(umax8, MATCH_UMAX8, MASK_UMAX8)
  3993. DECLARE_INSN(umin16, MATCH_UMIN16, MASK_UMIN16)
  3994. DECLARE_INSN(umin32, MATCH_UMIN32, MASK_UMIN32)
  3995. DECLARE_INSN(umin8, MATCH_UMIN8, MASK_UMIN8)
  3996. DECLARE_INSN(umsr64, MATCH_UMSR64, MASK_UMSR64)
  3997. DECLARE_INSN(umul16, MATCH_UMUL16, MASK_UMUL16)
  3998. DECLARE_INSN(umul8, MATCH_UMUL8, MASK_UMUL8)
  3999. DECLARE_INSN(umulx16, MATCH_UMULX16, MASK_UMULX16)
  4000. DECLARE_INSN(umulx8, MATCH_UMULX8, MASK_UMULX8)
  4001. DECLARE_INSN(unshfl, MATCH_UNSHFL, MASK_UNSHFL)
  4002. DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI)
  4003. DECLARE_INSN(unshflw, MATCH_UNSHFLW, MASK_UNSHFLW)
  4004. DECLARE_INSN(uradd16, MATCH_URADD16, MASK_URADD16)
  4005. DECLARE_INSN(uradd32, MATCH_URADD32, MASK_URADD32)
  4006. DECLARE_INSN(uradd64, MATCH_URADD64, MASK_URADD64)
  4007. DECLARE_INSN(uradd8, MATCH_URADD8, MASK_URADD8)
  4008. DECLARE_INSN(uraddw, MATCH_URADDW, MASK_URADDW)
  4009. DECLARE_INSN(urcras16, MATCH_URCRAS16, MASK_URCRAS16)
  4010. DECLARE_INSN(urcras32, MATCH_URCRAS32, MASK_URCRAS32)
  4011. DECLARE_INSN(urcrsa16, MATCH_URCRSA16, MASK_URCRSA16)
  4012. DECLARE_INSN(urcrsa32, MATCH_URCRSA32, MASK_URCRSA32)
  4013. DECLARE_INSN(urstas16, MATCH_URSTAS16, MASK_URSTAS16)
  4014. DECLARE_INSN(urstas32, MATCH_URSTAS32, MASK_URSTAS32)
  4015. DECLARE_INSN(urstsa16, MATCH_URSTSA16, MASK_URSTSA16)
  4016. DECLARE_INSN(urstsa32, MATCH_URSTSA32, MASK_URSTSA32)
  4017. DECLARE_INSN(ursub16, MATCH_URSUB16, MASK_URSUB16)
  4018. DECLARE_INSN(ursub32, MATCH_URSUB32, MASK_URSUB32)
  4019. DECLARE_INSN(ursub64, MATCH_URSUB64, MASK_URSUB64)
  4020. DECLARE_INSN(ursub8, MATCH_URSUB8, MASK_URSUB8)
  4021. DECLARE_INSN(ursubw, MATCH_URSUBW, MASK_URSUBW)
  4022. DECLARE_INSN(vaadd_vv, MATCH_VAADD_VV, MASK_VAADD_VV)
  4023. DECLARE_INSN(vaadd_vx, MATCH_VAADD_VX, MASK_VAADD_VX)
  4024. DECLARE_INSN(vaaddu_vv, MATCH_VAADDU_VV, MASK_VAADDU_VV)
  4025. DECLARE_INSN(vaaddu_vx, MATCH_VAADDU_VX, MASK_VAADDU_VX)
  4026. DECLARE_INSN(vadc_vim, MATCH_VADC_VIM, MASK_VADC_VIM)
  4027. DECLARE_INSN(vadc_vvm, MATCH_VADC_VVM, MASK_VADC_VVM)
  4028. DECLARE_INSN(vadc_vxm, MATCH_VADC_VXM, MASK_VADC_VXM)
  4029. DECLARE_INSN(vadd_vi, MATCH_VADD_VI, MASK_VADD_VI)
  4030. DECLARE_INSN(vadd_vv, MATCH_VADD_VV, MASK_VADD_VV)
  4031. DECLARE_INSN(vadd_vx, MATCH_VADD_VX, MASK_VADD_VX)
  4032. DECLARE_INSN(vamoaddei16_v, MATCH_VAMOADDEI16_V, MASK_VAMOADDEI16_V)
  4033. DECLARE_INSN(vamoaddei32_v, MATCH_VAMOADDEI32_V, MASK_VAMOADDEI32_V)
  4034. DECLARE_INSN(vamoaddei64_v, MATCH_VAMOADDEI64_V, MASK_VAMOADDEI64_V)
  4035. DECLARE_INSN(vamoaddei8_v, MATCH_VAMOADDEI8_V, MASK_VAMOADDEI8_V)
  4036. DECLARE_INSN(vamoandei16_v, MATCH_VAMOANDEI16_V, MASK_VAMOANDEI16_V)
  4037. DECLARE_INSN(vamoandei32_v, MATCH_VAMOANDEI32_V, MASK_VAMOANDEI32_V)
  4038. DECLARE_INSN(vamoandei64_v, MATCH_VAMOANDEI64_V, MASK_VAMOANDEI64_V)
  4039. DECLARE_INSN(vamoandei8_v, MATCH_VAMOANDEI8_V, MASK_VAMOANDEI8_V)
  4040. DECLARE_INSN(vamomaxei16_v, MATCH_VAMOMAXEI16_V, MASK_VAMOMAXEI16_V)
  4041. DECLARE_INSN(vamomaxei32_v, MATCH_VAMOMAXEI32_V, MASK_VAMOMAXEI32_V)
  4042. DECLARE_INSN(vamomaxei64_v, MATCH_VAMOMAXEI64_V, MASK_VAMOMAXEI64_V)
  4043. DECLARE_INSN(vamomaxei8_v, MATCH_VAMOMAXEI8_V, MASK_VAMOMAXEI8_V)
  4044. DECLARE_INSN(vamomaxuei16_v, MATCH_VAMOMAXUEI16_V, MASK_VAMOMAXUEI16_V)
  4045. DECLARE_INSN(vamomaxuei32_v, MATCH_VAMOMAXUEI32_V, MASK_VAMOMAXUEI32_V)
  4046. DECLARE_INSN(vamomaxuei64_v, MATCH_VAMOMAXUEI64_V, MASK_VAMOMAXUEI64_V)
  4047. DECLARE_INSN(vamomaxuei8_v, MATCH_VAMOMAXUEI8_V, MASK_VAMOMAXUEI8_V)
  4048. DECLARE_INSN(vamominei16_v, MATCH_VAMOMINEI16_V, MASK_VAMOMINEI16_V)
  4049. DECLARE_INSN(vamominei32_v, MATCH_VAMOMINEI32_V, MASK_VAMOMINEI32_V)
  4050. DECLARE_INSN(vamominei64_v, MATCH_VAMOMINEI64_V, MASK_VAMOMINEI64_V)
  4051. DECLARE_INSN(vamominei8_v, MATCH_VAMOMINEI8_V, MASK_VAMOMINEI8_V)
  4052. DECLARE_INSN(vamominuei16_v, MATCH_VAMOMINUEI16_V, MASK_VAMOMINUEI16_V)
  4053. DECLARE_INSN(vamominuei32_v, MATCH_VAMOMINUEI32_V, MASK_VAMOMINUEI32_V)
  4054. DECLARE_INSN(vamominuei64_v, MATCH_VAMOMINUEI64_V, MASK_VAMOMINUEI64_V)
  4055. DECLARE_INSN(vamominuei8_v, MATCH_VAMOMINUEI8_V, MASK_VAMOMINUEI8_V)
  4056. DECLARE_INSN(vamoorei16_v, MATCH_VAMOOREI16_V, MASK_VAMOOREI16_V)
  4057. DECLARE_INSN(vamoorei32_v, MATCH_VAMOOREI32_V, MASK_VAMOOREI32_V)
  4058. DECLARE_INSN(vamoorei64_v, MATCH_VAMOOREI64_V, MASK_VAMOOREI64_V)
  4059. DECLARE_INSN(vamoorei8_v, MATCH_VAMOOREI8_V, MASK_VAMOOREI8_V)
  4060. DECLARE_INSN(vamoswapei16_v, MATCH_VAMOSWAPEI16_V, MASK_VAMOSWAPEI16_V)
  4061. DECLARE_INSN(vamoswapei32_v, MATCH_VAMOSWAPEI32_V, MASK_VAMOSWAPEI32_V)
  4062. DECLARE_INSN(vamoswapei64_v, MATCH_VAMOSWAPEI64_V, MASK_VAMOSWAPEI64_V)
  4063. DECLARE_INSN(vamoswapei8_v, MATCH_VAMOSWAPEI8_V, MASK_VAMOSWAPEI8_V)
  4064. DECLARE_INSN(vamoxorei16_v, MATCH_VAMOXOREI16_V, MASK_VAMOXOREI16_V)
  4065. DECLARE_INSN(vamoxorei32_v, MATCH_VAMOXOREI32_V, MASK_VAMOXOREI32_V)
  4066. DECLARE_INSN(vamoxorei64_v, MATCH_VAMOXOREI64_V, MASK_VAMOXOREI64_V)
  4067. DECLARE_INSN(vamoxorei8_v, MATCH_VAMOXOREI8_V, MASK_VAMOXOREI8_V)
  4068. DECLARE_INSN(vand_vi, MATCH_VAND_VI, MASK_VAND_VI)
  4069. DECLARE_INSN(vand_vv, MATCH_VAND_VV, MASK_VAND_VV)
  4070. DECLARE_INSN(vand_vx, MATCH_VAND_VX, MASK_VAND_VX)
  4071. DECLARE_INSN(vasub_vv, MATCH_VASUB_VV, MASK_VASUB_VV)
  4072. DECLARE_INSN(vasub_vx, MATCH_VASUB_VX, MASK_VASUB_VX)
  4073. DECLARE_INSN(vasubu_vv, MATCH_VASUBU_VV, MASK_VASUBU_VV)
  4074. DECLARE_INSN(vasubu_vx, MATCH_VASUBU_VX, MASK_VASUBU_VX)
  4075. DECLARE_INSN(vcompress_vm, MATCH_VCOMPRESS_VM, MASK_VCOMPRESS_VM)
  4076. DECLARE_INSN(vcpop_m, MATCH_VCPOP_M, MASK_VCPOP_M)
  4077. DECLARE_INSN(vdiv_vv, MATCH_VDIV_VV, MASK_VDIV_VV)
  4078. DECLARE_INSN(vdiv_vx, MATCH_VDIV_VX, MASK_VDIV_VX)
  4079. DECLARE_INSN(vdivu_vv, MATCH_VDIVU_VV, MASK_VDIVU_VV)
  4080. DECLARE_INSN(vdivu_vx, MATCH_VDIVU_VX, MASK_VDIVU_VX)
  4081. DECLARE_INSN(vfadd_vf, MATCH_VFADD_VF, MASK_VFADD_VF)
  4082. DECLARE_INSN(vfadd_vv, MATCH_VFADD_VV, MASK_VFADD_VV)
  4083. DECLARE_INSN(vfclass_v, MATCH_VFCLASS_V, MASK_VFCLASS_V)
  4084. DECLARE_INSN(vfcvt_f_x_v, MATCH_VFCVT_F_X_V, MASK_VFCVT_F_X_V)
  4085. DECLARE_INSN(vfcvt_f_xu_v, MATCH_VFCVT_F_XU_V, MASK_VFCVT_F_XU_V)
  4086. DECLARE_INSN(vfcvt_rtz_x_f_v, MATCH_VFCVT_RTZ_X_F_V, MASK_VFCVT_RTZ_X_F_V)
  4087. DECLARE_INSN(vfcvt_rtz_xu_f_v, MATCH_VFCVT_RTZ_XU_F_V, MASK_VFCVT_RTZ_XU_F_V)
  4088. DECLARE_INSN(vfcvt_x_f_v, MATCH_VFCVT_X_F_V, MASK_VFCVT_X_F_V)
  4089. DECLARE_INSN(vfcvt_xu_f_v, MATCH_VFCVT_XU_F_V, MASK_VFCVT_XU_F_V)
  4090. DECLARE_INSN(vfdiv_vf, MATCH_VFDIV_VF, MASK_VFDIV_VF)
  4091. DECLARE_INSN(vfdiv_vv, MATCH_VFDIV_VV, MASK_VFDIV_VV)
  4092. DECLARE_INSN(vfirst_m, MATCH_VFIRST_M, MASK_VFIRST_M)
  4093. DECLARE_INSN(vfmacc_vf, MATCH_VFMACC_VF, MASK_VFMACC_VF)
  4094. DECLARE_INSN(vfmacc_vv, MATCH_VFMACC_VV, MASK_VFMACC_VV)
  4095. DECLARE_INSN(vfmadd_vf, MATCH_VFMADD_VF, MASK_VFMADD_VF)
  4096. DECLARE_INSN(vfmadd_vv, MATCH_VFMADD_VV, MASK_VFMADD_VV)
  4097. DECLARE_INSN(vfmax_vf, MATCH_VFMAX_VF, MASK_VFMAX_VF)
  4098. DECLARE_INSN(vfmax_vv, MATCH_VFMAX_VV, MASK_VFMAX_VV)
  4099. DECLARE_INSN(vfmerge_vfm, MATCH_VFMERGE_VFM, MASK_VFMERGE_VFM)
  4100. DECLARE_INSN(vfmin_vf, MATCH_VFMIN_VF, MASK_VFMIN_VF)
  4101. DECLARE_INSN(vfmin_vv, MATCH_VFMIN_VV, MASK_VFMIN_VV)
  4102. DECLARE_INSN(vfmsac_vf, MATCH_VFMSAC_VF, MASK_VFMSAC_VF)
  4103. DECLARE_INSN(vfmsac_vv, MATCH_VFMSAC_VV, MASK_VFMSAC_VV)
  4104. DECLARE_INSN(vfmsub_vf, MATCH_VFMSUB_VF, MASK_VFMSUB_VF)
  4105. DECLARE_INSN(vfmsub_vv, MATCH_VFMSUB_VV, MASK_VFMSUB_VV)
  4106. DECLARE_INSN(vfmul_vf, MATCH_VFMUL_VF, MASK_VFMUL_VF)
  4107. DECLARE_INSN(vfmul_vv, MATCH_VFMUL_VV, MASK_VFMUL_VV)
  4108. DECLARE_INSN(vfmv_f_s, MATCH_VFMV_F_S, MASK_VFMV_F_S)
  4109. DECLARE_INSN(vfmv_s_f, MATCH_VFMV_S_F, MASK_VFMV_S_F)
  4110. DECLARE_INSN(vfmv_v_f, MATCH_VFMV_V_F, MASK_VFMV_V_F)
  4111. DECLARE_INSN(vfncvt_f_f_w, MATCH_VFNCVT_F_F_W, MASK_VFNCVT_F_F_W)
  4112. DECLARE_INSN(vfncvt_f_x_w, MATCH_VFNCVT_F_X_W, MASK_VFNCVT_F_X_W)
  4113. DECLARE_INSN(vfncvt_f_xu_w, MATCH_VFNCVT_F_XU_W, MASK_VFNCVT_F_XU_W)
  4114. DECLARE_INSN(vfncvt_rod_f_f_w, MATCH_VFNCVT_ROD_F_F_W, MASK_VFNCVT_ROD_F_F_W)
  4115. DECLARE_INSN(vfncvt_rtz_x_f_w, MATCH_VFNCVT_RTZ_X_F_W, MASK_VFNCVT_RTZ_X_F_W)
  4116. DECLARE_INSN(vfncvt_rtz_xu_f_w, MATCH_VFNCVT_RTZ_XU_F_W, MASK_VFNCVT_RTZ_XU_F_W)
  4117. DECLARE_INSN(vfncvt_x_f_w, MATCH_VFNCVT_X_F_W, MASK_VFNCVT_X_F_W)
  4118. DECLARE_INSN(vfncvt_xu_f_w, MATCH_VFNCVT_XU_F_W, MASK_VFNCVT_XU_F_W)
  4119. DECLARE_INSN(vfnmacc_vf, MATCH_VFNMACC_VF, MASK_VFNMACC_VF)
  4120. DECLARE_INSN(vfnmacc_vv, MATCH_VFNMACC_VV, MASK_VFNMACC_VV)
  4121. DECLARE_INSN(vfnmadd_vf, MATCH_VFNMADD_VF, MASK_VFNMADD_VF)
  4122. DECLARE_INSN(vfnmadd_vv, MATCH_VFNMADD_VV, MASK_VFNMADD_VV)
  4123. DECLARE_INSN(vfnmsac_vf, MATCH_VFNMSAC_VF, MASK_VFNMSAC_VF)
  4124. DECLARE_INSN(vfnmsac_vv, MATCH_VFNMSAC_VV, MASK_VFNMSAC_VV)
  4125. DECLARE_INSN(vfnmsub_vf, MATCH_VFNMSUB_VF, MASK_VFNMSUB_VF)
  4126. DECLARE_INSN(vfnmsub_vv, MATCH_VFNMSUB_VV, MASK_VFNMSUB_VV)
  4127. DECLARE_INSN(vfrdiv_vf, MATCH_VFRDIV_VF, MASK_VFRDIV_VF)
  4128. DECLARE_INSN(vfrec7_v, MATCH_VFREC7_V, MASK_VFREC7_V)
  4129. DECLARE_INSN(vfredmax_vs, MATCH_VFREDMAX_VS, MASK_VFREDMAX_VS)
  4130. DECLARE_INSN(vfredmin_vs, MATCH_VFREDMIN_VS, MASK_VFREDMIN_VS)
  4131. DECLARE_INSN(vfredosum_vs, MATCH_VFREDOSUM_VS, MASK_VFREDOSUM_VS)
  4132. DECLARE_INSN(vfredusum_vs, MATCH_VFREDUSUM_VS, MASK_VFREDUSUM_VS)
  4133. DECLARE_INSN(vfrsqrt7_v, MATCH_VFRSQRT7_V, MASK_VFRSQRT7_V)
  4134. DECLARE_INSN(vfrsub_vf, MATCH_VFRSUB_VF, MASK_VFRSUB_VF)
  4135. DECLARE_INSN(vfsgnj_vf, MATCH_VFSGNJ_VF, MASK_VFSGNJ_VF)
  4136. DECLARE_INSN(vfsgnj_vv, MATCH_VFSGNJ_VV, MASK_VFSGNJ_VV)
  4137. DECLARE_INSN(vfsgnjn_vf, MATCH_VFSGNJN_VF, MASK_VFSGNJN_VF)
  4138. DECLARE_INSN(vfsgnjn_vv, MATCH_VFSGNJN_VV, MASK_VFSGNJN_VV)
  4139. DECLARE_INSN(vfsgnjx_vf, MATCH_VFSGNJX_VF, MASK_VFSGNJX_VF)
  4140. DECLARE_INSN(vfsgnjx_vv, MATCH_VFSGNJX_VV, MASK_VFSGNJX_VV)
  4141. DECLARE_INSN(vfslide1down_vf, MATCH_VFSLIDE1DOWN_VF, MASK_VFSLIDE1DOWN_VF)
  4142. DECLARE_INSN(vfslide1up_vf, MATCH_VFSLIDE1UP_VF, MASK_VFSLIDE1UP_VF)
  4143. DECLARE_INSN(vfsqrt_v, MATCH_VFSQRT_V, MASK_VFSQRT_V)
  4144. DECLARE_INSN(vfsub_vf, MATCH_VFSUB_VF, MASK_VFSUB_VF)
  4145. DECLARE_INSN(vfsub_vv, MATCH_VFSUB_VV, MASK_VFSUB_VV)
  4146. DECLARE_INSN(vfwadd_vf, MATCH_VFWADD_VF, MASK_VFWADD_VF)
  4147. DECLARE_INSN(vfwadd_vv, MATCH_VFWADD_VV, MASK_VFWADD_VV)
  4148. DECLARE_INSN(vfwadd_wf, MATCH_VFWADD_WF, MASK_VFWADD_WF)
  4149. DECLARE_INSN(vfwadd_wv, MATCH_VFWADD_WV, MASK_VFWADD_WV)
  4150. DECLARE_INSN(vfwcvt_f_f_v, MATCH_VFWCVT_F_F_V, MASK_VFWCVT_F_F_V)
  4151. DECLARE_INSN(vfwcvt_f_x_v, MATCH_VFWCVT_F_X_V, MASK_VFWCVT_F_X_V)
  4152. DECLARE_INSN(vfwcvt_f_xu_v, MATCH_VFWCVT_F_XU_V, MASK_VFWCVT_F_XU_V)
  4153. DECLARE_INSN(vfwcvt_rtz_x_f_v, MATCH_VFWCVT_RTZ_X_F_V, MASK_VFWCVT_RTZ_X_F_V)
  4154. DECLARE_INSN(vfwcvt_rtz_xu_f_v, MATCH_VFWCVT_RTZ_XU_F_V, MASK_VFWCVT_RTZ_XU_F_V)
  4155. DECLARE_INSN(vfwcvt_x_f_v, MATCH_VFWCVT_X_F_V, MASK_VFWCVT_X_F_V)
  4156. DECLARE_INSN(vfwcvt_xu_f_v, MATCH_VFWCVT_XU_F_V, MASK_VFWCVT_XU_F_V)
  4157. DECLARE_INSN(vfwmacc_vf, MATCH_VFWMACC_VF, MASK_VFWMACC_VF)
  4158. DECLARE_INSN(vfwmacc_vv, MATCH_VFWMACC_VV, MASK_VFWMACC_VV)
  4159. DECLARE_INSN(vfwmsac_vf, MATCH_VFWMSAC_VF, MASK_VFWMSAC_VF)
  4160. DECLARE_INSN(vfwmsac_vv, MATCH_VFWMSAC_VV, MASK_VFWMSAC_VV)
  4161. DECLARE_INSN(vfwmul_vf, MATCH_VFWMUL_VF, MASK_VFWMUL_VF)
  4162. DECLARE_INSN(vfwmul_vv, MATCH_VFWMUL_VV, MASK_VFWMUL_VV)
  4163. DECLARE_INSN(vfwnmacc_vf, MATCH_VFWNMACC_VF, MASK_VFWNMACC_VF)
  4164. DECLARE_INSN(vfwnmacc_vv, MATCH_VFWNMACC_VV, MASK_VFWNMACC_VV)
  4165. DECLARE_INSN(vfwnmsac_vf, MATCH_VFWNMSAC_VF, MASK_VFWNMSAC_VF)
  4166. DECLARE_INSN(vfwnmsac_vv, MATCH_VFWNMSAC_VV, MASK_VFWNMSAC_VV)
  4167. DECLARE_INSN(vfwredosum_vs, MATCH_VFWREDOSUM_VS, MASK_VFWREDOSUM_VS)
  4168. DECLARE_INSN(vfwredusum_vs, MATCH_VFWREDUSUM_VS, MASK_VFWREDUSUM_VS)
  4169. DECLARE_INSN(vfwsub_vf, MATCH_VFWSUB_VF, MASK_VFWSUB_VF)
  4170. DECLARE_INSN(vfwsub_vv, MATCH_VFWSUB_VV, MASK_VFWSUB_VV)
  4171. DECLARE_INSN(vfwsub_wf, MATCH_VFWSUB_WF, MASK_VFWSUB_WF)
  4172. DECLARE_INSN(vfwsub_wv, MATCH_VFWSUB_WV, MASK_VFWSUB_WV)
  4173. DECLARE_INSN(vid_v, MATCH_VID_V, MASK_VID_V)
  4174. DECLARE_INSN(viota_m, MATCH_VIOTA_M, MASK_VIOTA_M)
  4175. DECLARE_INSN(vl1re16_v, MATCH_VL1RE16_V, MASK_VL1RE16_V)
  4176. DECLARE_INSN(vl1re32_v, MATCH_VL1RE32_V, MASK_VL1RE32_V)
  4177. DECLARE_INSN(vl1re64_v, MATCH_VL1RE64_V, MASK_VL1RE64_V)
  4178. DECLARE_INSN(vl1re8_v, MATCH_VL1RE8_V, MASK_VL1RE8_V)
  4179. DECLARE_INSN(vl2re16_v, MATCH_VL2RE16_V, MASK_VL2RE16_V)
  4180. DECLARE_INSN(vl2re32_v, MATCH_VL2RE32_V, MASK_VL2RE32_V)
  4181. DECLARE_INSN(vl2re64_v, MATCH_VL2RE64_V, MASK_VL2RE64_V)
  4182. DECLARE_INSN(vl2re8_v, MATCH_VL2RE8_V, MASK_VL2RE8_V)
  4183. DECLARE_INSN(vl4re16_v, MATCH_VL4RE16_V, MASK_VL4RE16_V)
  4184. DECLARE_INSN(vl4re32_v, MATCH_VL4RE32_V, MASK_VL4RE32_V)
  4185. DECLARE_INSN(vl4re64_v, MATCH_VL4RE64_V, MASK_VL4RE64_V)
  4186. DECLARE_INSN(vl4re8_v, MATCH_VL4RE8_V, MASK_VL4RE8_V)
  4187. DECLARE_INSN(vl8re16_v, MATCH_VL8RE16_V, MASK_VL8RE16_V)
  4188. DECLARE_INSN(vl8re32_v, MATCH_VL8RE32_V, MASK_VL8RE32_V)
  4189. DECLARE_INSN(vl8re64_v, MATCH_VL8RE64_V, MASK_VL8RE64_V)
  4190. DECLARE_INSN(vl8re8_v, MATCH_VL8RE8_V, MASK_VL8RE8_V)
  4191. DECLARE_INSN(vle1024_v, MATCH_VLE1024_V, MASK_VLE1024_V)
  4192. DECLARE_INSN(vle1024ff_v, MATCH_VLE1024FF_V, MASK_VLE1024FF_V)
  4193. DECLARE_INSN(vle128_v, MATCH_VLE128_V, MASK_VLE128_V)
  4194. DECLARE_INSN(vle128ff_v, MATCH_VLE128FF_V, MASK_VLE128FF_V)
  4195. DECLARE_INSN(vle16_v, MATCH_VLE16_V, MASK_VLE16_V)
  4196. DECLARE_INSN(vle16ff_v, MATCH_VLE16FF_V, MASK_VLE16FF_V)
  4197. DECLARE_INSN(vle256_v, MATCH_VLE256_V, MASK_VLE256_V)
  4198. DECLARE_INSN(vle256ff_v, MATCH_VLE256FF_V, MASK_VLE256FF_V)
  4199. DECLARE_INSN(vle32_v, MATCH_VLE32_V, MASK_VLE32_V)
  4200. DECLARE_INSN(vle32ff_v, MATCH_VLE32FF_V, MASK_VLE32FF_V)
  4201. DECLARE_INSN(vle512_v, MATCH_VLE512_V, MASK_VLE512_V)
  4202. DECLARE_INSN(vle512ff_v, MATCH_VLE512FF_V, MASK_VLE512FF_V)
  4203. DECLARE_INSN(vle64_v, MATCH_VLE64_V, MASK_VLE64_V)
  4204. DECLARE_INSN(vle64ff_v, MATCH_VLE64FF_V, MASK_VLE64FF_V)
  4205. DECLARE_INSN(vle8_v, MATCH_VLE8_V, MASK_VLE8_V)
  4206. DECLARE_INSN(vle8ff_v, MATCH_VLE8FF_V, MASK_VLE8FF_V)
  4207. DECLARE_INSN(vlm_v, MATCH_VLM_V, MASK_VLM_V)
  4208. DECLARE_INSN(vloxei1024_v, MATCH_VLOXEI1024_V, MASK_VLOXEI1024_V)
  4209. DECLARE_INSN(vloxei128_v, MATCH_VLOXEI128_V, MASK_VLOXEI128_V)
  4210. DECLARE_INSN(vloxei16_v, MATCH_VLOXEI16_V, MASK_VLOXEI16_V)
  4211. DECLARE_INSN(vloxei256_v, MATCH_VLOXEI256_V, MASK_VLOXEI256_V)
  4212. DECLARE_INSN(vloxei32_v, MATCH_VLOXEI32_V, MASK_VLOXEI32_V)
  4213. DECLARE_INSN(vloxei512_v, MATCH_VLOXEI512_V, MASK_VLOXEI512_V)
  4214. DECLARE_INSN(vloxei64_v, MATCH_VLOXEI64_V, MASK_VLOXEI64_V)
  4215. DECLARE_INSN(vloxei8_v, MATCH_VLOXEI8_V, MASK_VLOXEI8_V)
  4216. DECLARE_INSN(vlse1024_v, MATCH_VLSE1024_V, MASK_VLSE1024_V)
  4217. DECLARE_INSN(vlse128_v, MATCH_VLSE128_V, MASK_VLSE128_V)
  4218. DECLARE_INSN(vlse16_v, MATCH_VLSE16_V, MASK_VLSE16_V)
  4219. DECLARE_INSN(vlse256_v, MATCH_VLSE256_V, MASK_VLSE256_V)
  4220. DECLARE_INSN(vlse32_v, MATCH_VLSE32_V, MASK_VLSE32_V)
  4221. DECLARE_INSN(vlse512_v, MATCH_VLSE512_V, MASK_VLSE512_V)
  4222. DECLARE_INSN(vlse64_v, MATCH_VLSE64_V, MASK_VLSE64_V)
  4223. DECLARE_INSN(vlse8_v, MATCH_VLSE8_V, MASK_VLSE8_V)
  4224. DECLARE_INSN(vluxei1024_v, MATCH_VLUXEI1024_V, MASK_VLUXEI1024_V)
  4225. DECLARE_INSN(vluxei128_v, MATCH_VLUXEI128_V, MASK_VLUXEI128_V)
  4226. DECLARE_INSN(vluxei16_v, MATCH_VLUXEI16_V, MASK_VLUXEI16_V)
  4227. DECLARE_INSN(vluxei256_v, MATCH_VLUXEI256_V, MASK_VLUXEI256_V)
  4228. DECLARE_INSN(vluxei32_v, MATCH_VLUXEI32_V, MASK_VLUXEI32_V)
  4229. DECLARE_INSN(vluxei512_v, MATCH_VLUXEI512_V, MASK_VLUXEI512_V)
  4230. DECLARE_INSN(vluxei64_v, MATCH_VLUXEI64_V, MASK_VLUXEI64_V)
  4231. DECLARE_INSN(vluxei8_v, MATCH_VLUXEI8_V, MASK_VLUXEI8_V)
  4232. DECLARE_INSN(vmacc_vv, MATCH_VMACC_VV, MASK_VMACC_VV)
  4233. DECLARE_INSN(vmacc_vx, MATCH_VMACC_VX, MASK_VMACC_VX)
  4234. DECLARE_INSN(vmadc_vi, MATCH_VMADC_VI, MASK_VMADC_VI)
  4235. DECLARE_INSN(vmadc_vim, MATCH_VMADC_VIM, MASK_VMADC_VIM)
  4236. DECLARE_INSN(vmadc_vv, MATCH_VMADC_VV, MASK_VMADC_VV)
  4237. DECLARE_INSN(vmadc_vvm, MATCH_VMADC_VVM, MASK_VMADC_VVM)
  4238. DECLARE_INSN(vmadc_vx, MATCH_VMADC_VX, MASK_VMADC_VX)
  4239. DECLARE_INSN(vmadc_vxm, MATCH_VMADC_VXM, MASK_VMADC_VXM)
  4240. DECLARE_INSN(vmadd_vv, MATCH_VMADD_VV, MASK_VMADD_VV)
  4241. DECLARE_INSN(vmadd_vx, MATCH_VMADD_VX, MASK_VMADD_VX)
  4242. DECLARE_INSN(vmand_mm, MATCH_VMAND_MM, MASK_VMAND_MM)
  4243. DECLARE_INSN(vmandn_mm, MATCH_VMANDN_MM, MASK_VMANDN_MM)
  4244. DECLARE_INSN(vmax_vv, MATCH_VMAX_VV, MASK_VMAX_VV)
  4245. DECLARE_INSN(vmax_vx, MATCH_VMAX_VX, MASK_VMAX_VX)
  4246. DECLARE_INSN(vmaxu_vv, MATCH_VMAXU_VV, MASK_VMAXU_VV)
  4247. DECLARE_INSN(vmaxu_vx, MATCH_VMAXU_VX, MASK_VMAXU_VX)
  4248. DECLARE_INSN(vmerge_vim, MATCH_VMERGE_VIM, MASK_VMERGE_VIM)
  4249. DECLARE_INSN(vmerge_vvm, MATCH_VMERGE_VVM, MASK_VMERGE_VVM)
  4250. DECLARE_INSN(vmerge_vxm, MATCH_VMERGE_VXM, MASK_VMERGE_VXM)
  4251. DECLARE_INSN(vmfeq_vf, MATCH_VMFEQ_VF, MASK_VMFEQ_VF)
  4252. DECLARE_INSN(vmfeq_vv, MATCH_VMFEQ_VV, MASK_VMFEQ_VV)
  4253. DECLARE_INSN(vmfge_vf, MATCH_VMFGE_VF, MASK_VMFGE_VF)
  4254. DECLARE_INSN(vmfgt_vf, MATCH_VMFGT_VF, MASK_VMFGT_VF)
  4255. DECLARE_INSN(vmfle_vf, MATCH_VMFLE_VF, MASK_VMFLE_VF)
  4256. DECLARE_INSN(vmfle_vv, MATCH_VMFLE_VV, MASK_VMFLE_VV)
  4257. DECLARE_INSN(vmflt_vf, MATCH_VMFLT_VF, MASK_VMFLT_VF)
  4258. DECLARE_INSN(vmflt_vv, MATCH_VMFLT_VV, MASK_VMFLT_VV)
  4259. DECLARE_INSN(vmfne_vf, MATCH_VMFNE_VF, MASK_VMFNE_VF)
  4260. DECLARE_INSN(vmfne_vv, MATCH_VMFNE_VV, MASK_VMFNE_VV)
  4261. DECLARE_INSN(vmin_vv, MATCH_VMIN_VV, MASK_VMIN_VV)
  4262. DECLARE_INSN(vmin_vx, MATCH_VMIN_VX, MASK_VMIN_VX)
  4263. DECLARE_INSN(vminu_vv, MATCH_VMINU_VV, MASK_VMINU_VV)
  4264. DECLARE_INSN(vminu_vx, MATCH_VMINU_VX, MASK_VMINU_VX)
  4265. DECLARE_INSN(vmnand_mm, MATCH_VMNAND_MM, MASK_VMNAND_MM)
  4266. DECLARE_INSN(vmnor_mm, MATCH_VMNOR_MM, MASK_VMNOR_MM)
  4267. DECLARE_INSN(vmor_mm, MATCH_VMOR_MM, MASK_VMOR_MM)
  4268. DECLARE_INSN(vmorn_mm, MATCH_VMORN_MM, MASK_VMORN_MM)
  4269. DECLARE_INSN(vmsbc_vv, MATCH_VMSBC_VV, MASK_VMSBC_VV)
  4270. DECLARE_INSN(vmsbc_vvm, MATCH_VMSBC_VVM, MASK_VMSBC_VVM)
  4271. DECLARE_INSN(vmsbc_vx, MATCH_VMSBC_VX, MASK_VMSBC_VX)
  4272. DECLARE_INSN(vmsbc_vxm, MATCH_VMSBC_VXM, MASK_VMSBC_VXM)
  4273. DECLARE_INSN(vmsbf_m, MATCH_VMSBF_M, MASK_VMSBF_M)
  4274. DECLARE_INSN(vmseq_vi, MATCH_VMSEQ_VI, MASK_VMSEQ_VI)
  4275. DECLARE_INSN(vmseq_vv, MATCH_VMSEQ_VV, MASK_VMSEQ_VV)
  4276. DECLARE_INSN(vmseq_vx, MATCH_VMSEQ_VX, MASK_VMSEQ_VX)
  4277. DECLARE_INSN(vmsgt_vi, MATCH_VMSGT_VI, MASK_VMSGT_VI)
  4278. DECLARE_INSN(vmsgt_vx, MATCH_VMSGT_VX, MASK_VMSGT_VX)
  4279. DECLARE_INSN(vmsgtu_vi, MATCH_VMSGTU_VI, MASK_VMSGTU_VI)
  4280. DECLARE_INSN(vmsgtu_vx, MATCH_VMSGTU_VX, MASK_VMSGTU_VX)
  4281. DECLARE_INSN(vmsif_m, MATCH_VMSIF_M, MASK_VMSIF_M)
  4282. DECLARE_INSN(vmsle_vi, MATCH_VMSLE_VI, MASK_VMSLE_VI)
  4283. DECLARE_INSN(vmsle_vv, MATCH_VMSLE_VV, MASK_VMSLE_VV)
  4284. DECLARE_INSN(vmsle_vx, MATCH_VMSLE_VX, MASK_VMSLE_VX)
  4285. DECLARE_INSN(vmsleu_vi, MATCH_VMSLEU_VI, MASK_VMSLEU_VI)
  4286. DECLARE_INSN(vmsleu_vv, MATCH_VMSLEU_VV, MASK_VMSLEU_VV)
  4287. DECLARE_INSN(vmsleu_vx, MATCH_VMSLEU_VX, MASK_VMSLEU_VX)
  4288. DECLARE_INSN(vmslt_vv, MATCH_VMSLT_VV, MASK_VMSLT_VV)
  4289. DECLARE_INSN(vmslt_vx, MATCH_VMSLT_VX, MASK_VMSLT_VX)
  4290. DECLARE_INSN(vmsltu_vv, MATCH_VMSLTU_VV, MASK_VMSLTU_VV)
  4291. DECLARE_INSN(vmsltu_vx, MATCH_VMSLTU_VX, MASK_VMSLTU_VX)
  4292. DECLARE_INSN(vmsne_vi, MATCH_VMSNE_VI, MASK_VMSNE_VI)
  4293. DECLARE_INSN(vmsne_vv, MATCH_VMSNE_VV, MASK_VMSNE_VV)
  4294. DECLARE_INSN(vmsne_vx, MATCH_VMSNE_VX, MASK_VMSNE_VX)
  4295. DECLARE_INSN(vmsof_m, MATCH_VMSOF_M, MASK_VMSOF_M)
  4296. DECLARE_INSN(vmul_vv, MATCH_VMUL_VV, MASK_VMUL_VV)
  4297. DECLARE_INSN(vmul_vx, MATCH_VMUL_VX, MASK_VMUL_VX)
  4298. DECLARE_INSN(vmulh_vv, MATCH_VMULH_VV, MASK_VMULH_VV)
  4299. DECLARE_INSN(vmulh_vx, MATCH_VMULH_VX, MASK_VMULH_VX)
  4300. DECLARE_INSN(vmulhsu_vv, MATCH_VMULHSU_VV, MASK_VMULHSU_VV)
  4301. DECLARE_INSN(vmulhsu_vx, MATCH_VMULHSU_VX, MASK_VMULHSU_VX)
  4302. DECLARE_INSN(vmulhu_vv, MATCH_VMULHU_VV, MASK_VMULHU_VV)
  4303. DECLARE_INSN(vmulhu_vx, MATCH_VMULHU_VX, MASK_VMULHU_VX)
  4304. DECLARE_INSN(vmv1r_v, MATCH_VMV1R_V, MASK_VMV1R_V)
  4305. DECLARE_INSN(vmv2r_v, MATCH_VMV2R_V, MASK_VMV2R_V)
  4306. DECLARE_INSN(vmv4r_v, MATCH_VMV4R_V, MASK_VMV4R_V)
  4307. DECLARE_INSN(vmv8r_v, MATCH_VMV8R_V, MASK_VMV8R_V)
  4308. DECLARE_INSN(vmv_s_x, MATCH_VMV_S_X, MASK_VMV_S_X)
  4309. DECLARE_INSN(vmv_v_i, MATCH_VMV_V_I, MASK_VMV_V_I)
  4310. DECLARE_INSN(vmv_v_v, MATCH_VMV_V_V, MASK_VMV_V_V)
  4311. DECLARE_INSN(vmv_v_x, MATCH_VMV_V_X, MASK_VMV_V_X)
  4312. DECLARE_INSN(vmv_x_s, MATCH_VMV_X_S, MASK_VMV_X_S)
  4313. DECLARE_INSN(vmxnor_mm, MATCH_VMXNOR_MM, MASK_VMXNOR_MM)
  4314. DECLARE_INSN(vmxor_mm, MATCH_VMXOR_MM, MASK_VMXOR_MM)
  4315. DECLARE_INSN(vnclip_wi, MATCH_VNCLIP_WI, MASK_VNCLIP_WI)
  4316. DECLARE_INSN(vnclip_wv, MATCH_VNCLIP_WV, MASK_VNCLIP_WV)
  4317. DECLARE_INSN(vnclip_wx, MATCH_VNCLIP_WX, MASK_VNCLIP_WX)
  4318. DECLARE_INSN(vnclipu_wi, MATCH_VNCLIPU_WI, MASK_VNCLIPU_WI)
  4319. DECLARE_INSN(vnclipu_wv, MATCH_VNCLIPU_WV, MASK_VNCLIPU_WV)
  4320. DECLARE_INSN(vnclipu_wx, MATCH_VNCLIPU_WX, MASK_VNCLIPU_WX)
  4321. DECLARE_INSN(vnmsac_vv, MATCH_VNMSAC_VV, MASK_VNMSAC_VV)
  4322. DECLARE_INSN(vnmsac_vx, MATCH_VNMSAC_VX, MASK_VNMSAC_VX)
  4323. DECLARE_INSN(vnmsub_vv, MATCH_VNMSUB_VV, MASK_VNMSUB_VV)
  4324. DECLARE_INSN(vnmsub_vx, MATCH_VNMSUB_VX, MASK_VNMSUB_VX)
  4325. DECLARE_INSN(vnsra_wi, MATCH_VNSRA_WI, MASK_VNSRA_WI)
  4326. DECLARE_INSN(vnsra_wv, MATCH_VNSRA_WV, MASK_VNSRA_WV)
  4327. DECLARE_INSN(vnsra_wx, MATCH_VNSRA_WX, MASK_VNSRA_WX)
  4328. DECLARE_INSN(vnsrl_wi, MATCH_VNSRL_WI, MASK_VNSRL_WI)
  4329. DECLARE_INSN(vnsrl_wv, MATCH_VNSRL_WV, MASK_VNSRL_WV)
  4330. DECLARE_INSN(vnsrl_wx, MATCH_VNSRL_WX, MASK_VNSRL_WX)
  4331. DECLARE_INSN(vor_vi, MATCH_VOR_VI, MASK_VOR_VI)
  4332. DECLARE_INSN(vor_vv, MATCH_VOR_VV, MASK_VOR_VV)
  4333. DECLARE_INSN(vor_vx, MATCH_VOR_VX, MASK_VOR_VX)
  4334. DECLARE_INSN(vredand_vs, MATCH_VREDAND_VS, MASK_VREDAND_VS)
  4335. DECLARE_INSN(vredmax_vs, MATCH_VREDMAX_VS, MASK_VREDMAX_VS)
  4336. DECLARE_INSN(vredmaxu_vs, MATCH_VREDMAXU_VS, MASK_VREDMAXU_VS)
  4337. DECLARE_INSN(vredmin_vs, MATCH_VREDMIN_VS, MASK_VREDMIN_VS)
  4338. DECLARE_INSN(vredminu_vs, MATCH_VREDMINU_VS, MASK_VREDMINU_VS)
  4339. DECLARE_INSN(vredor_vs, MATCH_VREDOR_VS, MASK_VREDOR_VS)
  4340. DECLARE_INSN(vredsum_vs, MATCH_VREDSUM_VS, MASK_VREDSUM_VS)
  4341. DECLARE_INSN(vredxor_vs, MATCH_VREDXOR_VS, MASK_VREDXOR_VS)
  4342. DECLARE_INSN(vrem_vv, MATCH_VREM_VV, MASK_VREM_VV)
  4343. DECLARE_INSN(vrem_vx, MATCH_VREM_VX, MASK_VREM_VX)
  4344. DECLARE_INSN(vremu_vv, MATCH_VREMU_VV, MASK_VREMU_VV)
  4345. DECLARE_INSN(vremu_vx, MATCH_VREMU_VX, MASK_VREMU_VX)
  4346. DECLARE_INSN(vrgather_vi, MATCH_VRGATHER_VI, MASK_VRGATHER_VI)
  4347. DECLARE_INSN(vrgather_vv, MATCH_VRGATHER_VV, MASK_VRGATHER_VV)
  4348. DECLARE_INSN(vrgather_vx, MATCH_VRGATHER_VX, MASK_VRGATHER_VX)
  4349. DECLARE_INSN(vrgatherei16_vv, MATCH_VRGATHEREI16_VV, MASK_VRGATHEREI16_VV)
  4350. DECLARE_INSN(vrsub_vi, MATCH_VRSUB_VI, MASK_VRSUB_VI)
  4351. DECLARE_INSN(vrsub_vx, MATCH_VRSUB_VX, MASK_VRSUB_VX)
  4352. DECLARE_INSN(vs1r_v, MATCH_VS1R_V, MASK_VS1R_V)
  4353. DECLARE_INSN(vs2r_v, MATCH_VS2R_V, MASK_VS2R_V)
  4354. DECLARE_INSN(vs4r_v, MATCH_VS4R_V, MASK_VS4R_V)
  4355. DECLARE_INSN(vs8r_v, MATCH_VS8R_V, MASK_VS8R_V)
  4356. DECLARE_INSN(vsadd_vi, MATCH_VSADD_VI, MASK_VSADD_VI)
  4357. DECLARE_INSN(vsadd_vv, MATCH_VSADD_VV, MASK_VSADD_VV)
  4358. DECLARE_INSN(vsadd_vx, MATCH_VSADD_VX, MASK_VSADD_VX)
  4359. DECLARE_INSN(vsaddu_vi, MATCH_VSADDU_VI, MASK_VSADDU_VI)
  4360. DECLARE_INSN(vsaddu_vv, MATCH_VSADDU_VV, MASK_VSADDU_VV)
  4361. DECLARE_INSN(vsaddu_vx, MATCH_VSADDU_VX, MASK_VSADDU_VX)
  4362. DECLARE_INSN(vsbc_vvm, MATCH_VSBC_VVM, MASK_VSBC_VVM)
  4363. DECLARE_INSN(vsbc_vxm, MATCH_VSBC_VXM, MASK_VSBC_VXM)
  4364. DECLARE_INSN(vse1024_v, MATCH_VSE1024_V, MASK_VSE1024_V)
  4365. DECLARE_INSN(vse128_v, MATCH_VSE128_V, MASK_VSE128_V)
  4366. DECLARE_INSN(vse16_v, MATCH_VSE16_V, MASK_VSE16_V)
  4367. DECLARE_INSN(vse256_v, MATCH_VSE256_V, MASK_VSE256_V)
  4368. DECLARE_INSN(vse32_v, MATCH_VSE32_V, MASK_VSE32_V)
  4369. DECLARE_INSN(vse512_v, MATCH_VSE512_V, MASK_VSE512_V)
  4370. DECLARE_INSN(vse64_v, MATCH_VSE64_V, MASK_VSE64_V)
  4371. DECLARE_INSN(vse8_v, MATCH_VSE8_V, MASK_VSE8_V)
  4372. DECLARE_INSN(vsetivli, MATCH_VSETIVLI, MASK_VSETIVLI)
  4373. DECLARE_INSN(vsetvl, MATCH_VSETVL, MASK_VSETVL)
  4374. DECLARE_INSN(vsetvli, MATCH_VSETVLI, MASK_VSETVLI)
  4375. DECLARE_INSN(vsext_vf2, MATCH_VSEXT_VF2, MASK_VSEXT_VF2)
  4376. DECLARE_INSN(vsext_vf4, MATCH_VSEXT_VF4, MASK_VSEXT_VF4)
  4377. DECLARE_INSN(vsext_vf8, MATCH_VSEXT_VF8, MASK_VSEXT_VF8)
  4378. DECLARE_INSN(vslide1down_vx, MATCH_VSLIDE1DOWN_VX, MASK_VSLIDE1DOWN_VX)
  4379. DECLARE_INSN(vslide1up_vx, MATCH_VSLIDE1UP_VX, MASK_VSLIDE1UP_VX)
  4380. DECLARE_INSN(vslidedown_vi, MATCH_VSLIDEDOWN_VI, MASK_VSLIDEDOWN_VI)
  4381. DECLARE_INSN(vslidedown_vx, MATCH_VSLIDEDOWN_VX, MASK_VSLIDEDOWN_VX)
  4382. DECLARE_INSN(vslideup_vi, MATCH_VSLIDEUP_VI, MASK_VSLIDEUP_VI)
  4383. DECLARE_INSN(vslideup_vx, MATCH_VSLIDEUP_VX, MASK_VSLIDEUP_VX)
  4384. DECLARE_INSN(vsll_vi, MATCH_VSLL_VI, MASK_VSLL_VI)
  4385. DECLARE_INSN(vsll_vv, MATCH_VSLL_VV, MASK_VSLL_VV)
  4386. DECLARE_INSN(vsll_vx, MATCH_VSLL_VX, MASK_VSLL_VX)
  4387. DECLARE_INSN(vsm_v, MATCH_VSM_V, MASK_VSM_V)
  4388. DECLARE_INSN(vsmul_vv, MATCH_VSMUL_VV, MASK_VSMUL_VV)
  4389. DECLARE_INSN(vsmul_vx, MATCH_VSMUL_VX, MASK_VSMUL_VX)
  4390. DECLARE_INSN(vsoxei1024_v, MATCH_VSOXEI1024_V, MASK_VSOXEI1024_V)
  4391. DECLARE_INSN(vsoxei128_v, MATCH_VSOXEI128_V, MASK_VSOXEI128_V)
  4392. DECLARE_INSN(vsoxei16_v, MATCH_VSOXEI16_V, MASK_VSOXEI16_V)
  4393. DECLARE_INSN(vsoxei256_v, MATCH_VSOXEI256_V, MASK_VSOXEI256_V)
  4394. DECLARE_INSN(vsoxei32_v, MATCH_VSOXEI32_V, MASK_VSOXEI32_V)
  4395. DECLARE_INSN(vsoxei512_v, MATCH_VSOXEI512_V, MASK_VSOXEI512_V)
  4396. DECLARE_INSN(vsoxei64_v, MATCH_VSOXEI64_V, MASK_VSOXEI64_V)
  4397. DECLARE_INSN(vsoxei8_v, MATCH_VSOXEI8_V, MASK_VSOXEI8_V)
  4398. DECLARE_INSN(vsra_vi, MATCH_VSRA_VI, MASK_VSRA_VI)
  4399. DECLARE_INSN(vsra_vv, MATCH_VSRA_VV, MASK_VSRA_VV)
  4400. DECLARE_INSN(vsra_vx, MATCH_VSRA_VX, MASK_VSRA_VX)
  4401. DECLARE_INSN(vsrl_vi, MATCH_VSRL_VI, MASK_VSRL_VI)
  4402. DECLARE_INSN(vsrl_vv, MATCH_VSRL_VV, MASK_VSRL_VV)
  4403. DECLARE_INSN(vsrl_vx, MATCH_VSRL_VX, MASK_VSRL_VX)
  4404. DECLARE_INSN(vsse1024_v, MATCH_VSSE1024_V, MASK_VSSE1024_V)
  4405. DECLARE_INSN(vsse128_v, MATCH_VSSE128_V, MASK_VSSE128_V)
  4406. DECLARE_INSN(vsse16_v, MATCH_VSSE16_V, MASK_VSSE16_V)
  4407. DECLARE_INSN(vsse256_v, MATCH_VSSE256_V, MASK_VSSE256_V)
  4408. DECLARE_INSN(vsse32_v, MATCH_VSSE32_V, MASK_VSSE32_V)
  4409. DECLARE_INSN(vsse512_v, MATCH_VSSE512_V, MASK_VSSE512_V)
  4410. DECLARE_INSN(vsse64_v, MATCH_VSSE64_V, MASK_VSSE64_V)
  4411. DECLARE_INSN(vsse8_v, MATCH_VSSE8_V, MASK_VSSE8_V)
  4412. DECLARE_INSN(vssra_vi, MATCH_VSSRA_VI, MASK_VSSRA_VI)
  4413. DECLARE_INSN(vssra_vv, MATCH_VSSRA_VV, MASK_VSSRA_VV)
  4414. DECLARE_INSN(vssra_vx, MATCH_VSSRA_VX, MASK_VSSRA_VX)
  4415. DECLARE_INSN(vssrl_vi, MATCH_VSSRL_VI, MASK_VSSRL_VI)
  4416. DECLARE_INSN(vssrl_vv, MATCH_VSSRL_VV, MASK_VSSRL_VV)
  4417. DECLARE_INSN(vssrl_vx, MATCH_VSSRL_VX, MASK_VSSRL_VX)
  4418. DECLARE_INSN(vssub_vv, MATCH_VSSUB_VV, MASK_VSSUB_VV)
  4419. DECLARE_INSN(vssub_vx, MATCH_VSSUB_VX, MASK_VSSUB_VX)
  4420. DECLARE_INSN(vssubu_vv, MATCH_VSSUBU_VV, MASK_VSSUBU_VV)
  4421. DECLARE_INSN(vssubu_vx, MATCH_VSSUBU_VX, MASK_VSSUBU_VX)
  4422. DECLARE_INSN(vsub_vv, MATCH_VSUB_VV, MASK_VSUB_VV)
  4423. DECLARE_INSN(vsub_vx, MATCH_VSUB_VX, MASK_VSUB_VX)
  4424. DECLARE_INSN(vsuxei1024_v, MATCH_VSUXEI1024_V, MASK_VSUXEI1024_V)
  4425. DECLARE_INSN(vsuxei128_v, MATCH_VSUXEI128_V, MASK_VSUXEI128_V)
  4426. DECLARE_INSN(vsuxei16_v, MATCH_VSUXEI16_V, MASK_VSUXEI16_V)
  4427. DECLARE_INSN(vsuxei256_v, MATCH_VSUXEI256_V, MASK_VSUXEI256_V)
  4428. DECLARE_INSN(vsuxei32_v, MATCH_VSUXEI32_V, MASK_VSUXEI32_V)
  4429. DECLARE_INSN(vsuxei512_v, MATCH_VSUXEI512_V, MASK_VSUXEI512_V)
  4430. DECLARE_INSN(vsuxei64_v, MATCH_VSUXEI64_V, MASK_VSUXEI64_V)
  4431. DECLARE_INSN(vsuxei8_v, MATCH_VSUXEI8_V, MASK_VSUXEI8_V)
  4432. DECLARE_INSN(vwadd_vv, MATCH_VWADD_VV, MASK_VWADD_VV)
  4433. DECLARE_INSN(vwadd_vx, MATCH_VWADD_VX, MASK_VWADD_VX)
  4434. DECLARE_INSN(vwadd_wv, MATCH_VWADD_WV, MASK_VWADD_WV)
  4435. DECLARE_INSN(vwadd_wx, MATCH_VWADD_WX, MASK_VWADD_WX)
  4436. DECLARE_INSN(vwaddu_vv, MATCH_VWADDU_VV, MASK_VWADDU_VV)
  4437. DECLARE_INSN(vwaddu_vx, MATCH_VWADDU_VX, MASK_VWADDU_VX)
  4438. DECLARE_INSN(vwaddu_wv, MATCH_VWADDU_WV, MASK_VWADDU_WV)
  4439. DECLARE_INSN(vwaddu_wx, MATCH_VWADDU_WX, MASK_VWADDU_WX)
  4440. DECLARE_INSN(vwmacc_vv, MATCH_VWMACC_VV, MASK_VWMACC_VV)
  4441. DECLARE_INSN(vwmacc_vx, MATCH_VWMACC_VX, MASK_VWMACC_VX)
  4442. DECLARE_INSN(vwmaccsu_vv, MATCH_VWMACCSU_VV, MASK_VWMACCSU_VV)
  4443. DECLARE_INSN(vwmaccsu_vx, MATCH_VWMACCSU_VX, MASK_VWMACCSU_VX)
  4444. DECLARE_INSN(vwmaccu_vv, MATCH_VWMACCU_VV, MASK_VWMACCU_VV)
  4445. DECLARE_INSN(vwmaccu_vx, MATCH_VWMACCU_VX, MASK_VWMACCU_VX)
  4446. DECLARE_INSN(vwmaccus_vx, MATCH_VWMACCUS_VX, MASK_VWMACCUS_VX)
  4447. DECLARE_INSN(vwmul_vv, MATCH_VWMUL_VV, MASK_VWMUL_VV)
  4448. DECLARE_INSN(vwmul_vx, MATCH_VWMUL_VX, MASK_VWMUL_VX)
  4449. DECLARE_INSN(vwmulsu_vv, MATCH_VWMULSU_VV, MASK_VWMULSU_VV)
  4450. DECLARE_INSN(vwmulsu_vx, MATCH_VWMULSU_VX, MASK_VWMULSU_VX)
  4451. DECLARE_INSN(vwmulu_vv, MATCH_VWMULU_VV, MASK_VWMULU_VV)
  4452. DECLARE_INSN(vwmulu_vx, MATCH_VWMULU_VX, MASK_VWMULU_VX)
  4453. DECLARE_INSN(vwredsum_vs, MATCH_VWREDSUM_VS, MASK_VWREDSUM_VS)
  4454. DECLARE_INSN(vwredsumu_vs, MATCH_VWREDSUMU_VS, MASK_VWREDSUMU_VS)
  4455. DECLARE_INSN(vwsub_vv, MATCH_VWSUB_VV, MASK_VWSUB_VV)
  4456. DECLARE_INSN(vwsub_vx, MATCH_VWSUB_VX, MASK_VWSUB_VX)
  4457. DECLARE_INSN(vwsub_wv, MATCH_VWSUB_WV, MASK_VWSUB_WV)
  4458. DECLARE_INSN(vwsub_wx, MATCH_VWSUB_WX, MASK_VWSUB_WX)
  4459. DECLARE_INSN(vwsubu_vv, MATCH_VWSUBU_VV, MASK_VWSUBU_VV)
  4460. DECLARE_INSN(vwsubu_vx, MATCH_VWSUBU_VX, MASK_VWSUBU_VX)
  4461. DECLARE_INSN(vwsubu_wv, MATCH_VWSUBU_WV, MASK_VWSUBU_WV)
  4462. DECLARE_INSN(vwsubu_wx, MATCH_VWSUBU_WX, MASK_VWSUBU_WX)
  4463. DECLARE_INSN(vxor_vi, MATCH_VXOR_VI, MASK_VXOR_VI)
  4464. DECLARE_INSN(vxor_vv, MATCH_VXOR_VV, MASK_VXOR_VV)
  4465. DECLARE_INSN(vxor_vx, MATCH_VXOR_VX, MASK_VXOR_VX)
  4466. DECLARE_INSN(vzext_vf2, MATCH_VZEXT_VF2, MASK_VZEXT_VF2)
  4467. DECLARE_INSN(vzext_vf4, MATCH_VZEXT_VF4, MASK_VZEXT_VF4)
  4468. DECLARE_INSN(vzext_vf8, MATCH_VZEXT_VF8, MASK_VZEXT_VF8)
  4469. DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
  4470. DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO)
  4471. DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO)
  4472. DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR)
  4473. DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
  4474. DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
  4475. DECLARE_INSN(xperm16, MATCH_XPERM16, MASK_XPERM16)
  4476. DECLARE_INSN(xperm32, MATCH_XPERM32, MASK_XPERM32)
  4477. DECLARE_INSN(xperm4, MATCH_XPERM4, MASK_XPERM4)
  4478. DECLARE_INSN(xperm8, MATCH_XPERM8, MASK_XPERM8)
  4479. DECLARE_INSN(zunpkd810, MATCH_ZUNPKD810, MASK_ZUNPKD810)
  4480. DECLARE_INSN(zunpkd820, MATCH_ZUNPKD820, MASK_ZUNPKD820)
  4481. DECLARE_INSN(zunpkd830, MATCH_ZUNPKD830, MASK_ZUNPKD830)
  4482. DECLARE_INSN(zunpkd831, MATCH_ZUNPKD831, MASK_ZUNPKD831)
  4483. DECLARE_INSN(zunpkd832, MATCH_ZUNPKD832, MASK_ZUNPKD832)
  4484. #endif
  4485. #ifdef DECLARE_CSR
  4486. DECLARE_CSR(fflags, CSR_FFLAGS)
  4487. DECLARE_CSR(frm, CSR_FRM)
  4488. DECLARE_CSR(fcsr, CSR_FCSR)
  4489. DECLARE_CSR(vstart, CSR_VSTART)
  4490. DECLARE_CSR(vxsat, CSR_VXSAT)
  4491. DECLARE_CSR(vxrm, CSR_VXRM)
  4492. DECLARE_CSR(vcsr, CSR_VCSR)
  4493. DECLARE_CSR(seed, CSR_SEED)
  4494. DECLARE_CSR(jvt, CSR_JVT)
  4495. DECLARE_CSR(cycle, CSR_CYCLE)
  4496. DECLARE_CSR(time, CSR_TIME)
  4497. DECLARE_CSR(instret, CSR_INSTRET)
  4498. DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3)
  4499. DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4)
  4500. DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5)
  4501. DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6)
  4502. DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7)
  4503. DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8)
  4504. DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9)
  4505. DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10)
  4506. DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11)
  4507. DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)
  4508. DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13)
  4509. DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14)
  4510. DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)
  4511. DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16)
  4512. DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)
  4513. DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18)
  4514. DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19)
  4515. DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20)
  4516. DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21)
  4517. DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22)
  4518. DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23)
  4519. DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)
  4520. DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25)
  4521. DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26)
  4522. DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27)
  4523. DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28)
  4524. DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)
  4525. DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30)
  4526. DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
  4527. DECLARE_CSR(vl, CSR_VL)
  4528. DECLARE_CSR(vtype, CSR_VTYPE)
  4529. DECLARE_CSR(vlenb, CSR_VLENB)
  4530. DECLARE_CSR(sstatus, CSR_SSTATUS)
  4531. DECLARE_CSR(sedeleg, CSR_SEDELEG)
  4532. DECLARE_CSR(sideleg, CSR_SIDELEG)
  4533. DECLARE_CSR(sie, CSR_SIE)
  4534. DECLARE_CSR(stvec, CSR_STVEC)
  4535. DECLARE_CSR(scounteren, CSR_SCOUNTEREN)
  4536. DECLARE_CSR(senvcfg, CSR_SENVCFG)
  4537. DECLARE_CSR(sstateen0, CSR_SSTATEEN0)
  4538. DECLARE_CSR(sstateen1, CSR_SSTATEEN1)
  4539. DECLARE_CSR(sstateen2, CSR_SSTATEEN2)
  4540. DECLARE_CSR(sstateen3, CSR_SSTATEEN3)
  4541. DECLARE_CSR(sscratch, CSR_SSCRATCH)
  4542. DECLARE_CSR(sepc, CSR_SEPC)
  4543. DECLARE_CSR(scause, CSR_SCAUSE)
  4544. DECLARE_CSR(stval, CSR_STVAL)
  4545. DECLARE_CSR(sip, CSR_SIP)
  4546. DECLARE_CSR(stimecmp, CSR_STIMECMP)
  4547. DECLARE_CSR(siselect, CSR_SISELECT)
  4548. DECLARE_CSR(sireg, CSR_SIREG)
  4549. DECLARE_CSR(stopei, CSR_STOPEI)
  4550. DECLARE_CSR(satp, CSR_SATP)
  4551. DECLARE_CSR(scontext, CSR_SCONTEXT)
  4552. DECLARE_CSR(vsstatus, CSR_VSSTATUS)
  4553. DECLARE_CSR(vsie, CSR_VSIE)
  4554. DECLARE_CSR(vstvec, CSR_VSTVEC)
  4555. DECLARE_CSR(vsscratch, CSR_VSSCRATCH)
  4556. DECLARE_CSR(vsepc, CSR_VSEPC)
  4557. DECLARE_CSR(vscause, CSR_VSCAUSE)
  4558. DECLARE_CSR(vstval, CSR_VSTVAL)
  4559. DECLARE_CSR(vsip, CSR_VSIP)
  4560. DECLARE_CSR(vstimecmp, CSR_VSTIMECMP)
  4561. DECLARE_CSR(vsiselect, CSR_VSISELECT)
  4562. DECLARE_CSR(vsireg, CSR_VSIREG)
  4563. DECLARE_CSR(vstopei, CSR_VSTOPEI)
  4564. DECLARE_CSR(vsatp, CSR_VSATP)
  4565. DECLARE_CSR(hstatus, CSR_HSTATUS)
  4566. DECLARE_CSR(hedeleg, CSR_HEDELEG)
  4567. DECLARE_CSR(hideleg, CSR_HIDELEG)
  4568. DECLARE_CSR(hie, CSR_HIE)
  4569. DECLARE_CSR(htimedelta, CSR_HTIMEDELTA)
  4570. DECLARE_CSR(hcounteren, CSR_HCOUNTEREN)
  4571. DECLARE_CSR(hgeie, CSR_HGEIE)
  4572. DECLARE_CSR(hvien, CSR_HVIEN)
  4573. DECLARE_CSR(hvictl, CSR_HVICTL)
  4574. DECLARE_CSR(henvcfg, CSR_HENVCFG)
  4575. DECLARE_CSR(hstateen0, CSR_HSTATEEN0)
  4576. DECLARE_CSR(hstateen1, CSR_HSTATEEN1)
  4577. DECLARE_CSR(hstateen2, CSR_HSTATEEN2)
  4578. DECLARE_CSR(hstateen3, CSR_HSTATEEN3)
  4579. DECLARE_CSR(htval, CSR_HTVAL)
  4580. DECLARE_CSR(hip, CSR_HIP)
  4581. DECLARE_CSR(hvip, CSR_HVIP)
  4582. DECLARE_CSR(hviprio1, CSR_HVIPRIO1)
  4583. DECLARE_CSR(hviprio2, CSR_HVIPRIO2)
  4584. DECLARE_CSR(htinst, CSR_HTINST)
  4585. DECLARE_CSR(hgatp, CSR_HGATP)
  4586. DECLARE_CSR(hcontext, CSR_HCONTEXT)
  4587. DECLARE_CSR(hgeip, CSR_HGEIP)
  4588. DECLARE_CSR(vstopi, CSR_VSTOPI)
  4589. DECLARE_CSR(scountovf, CSR_SCOUNTOVF)
  4590. DECLARE_CSR(stopi, CSR_STOPI)
  4591. DECLARE_CSR(utvt, CSR_UTVT)
  4592. DECLARE_CSR(unxti, CSR_UNXTI)
  4593. DECLARE_CSR(uintstatus, CSR_UINTSTATUS)
  4594. DECLARE_CSR(uscratchcsw, CSR_USCRATCHCSW)
  4595. DECLARE_CSR(uscratchcswl, CSR_USCRATCHCSWL)
  4596. DECLARE_CSR(stvt, CSR_STVT)
  4597. DECLARE_CSR(snxti, CSR_SNXTI)
  4598. DECLARE_CSR(sintstatus, CSR_SINTSTATUS)
  4599. DECLARE_CSR(sscratchcsw, CSR_SSCRATCHCSW)
  4600. DECLARE_CSR(sscratchcswl, CSR_SSCRATCHCSWL)
  4601. DECLARE_CSR(mtvt, CSR_MTVT)
  4602. DECLARE_CSR(mnxti, CSR_MNXTI)
  4603. DECLARE_CSR(mintstatus, CSR_MINTSTATUS)
  4604. DECLARE_CSR(mscratchcsw, CSR_MSCRATCHCSW)
  4605. DECLARE_CSR(mscratchcswl, CSR_MSCRATCHCSWL)
  4606. DECLARE_CSR(mstatus, CSR_MSTATUS)
  4607. DECLARE_CSR(misa, CSR_MISA)
  4608. DECLARE_CSR(medeleg, CSR_MEDELEG)
  4609. DECLARE_CSR(mideleg, CSR_MIDELEG)
  4610. DECLARE_CSR(mie, CSR_MIE)
  4611. DECLARE_CSR(mtvec, CSR_MTVEC)
  4612. DECLARE_CSR(mcounteren, CSR_MCOUNTEREN)
  4613. DECLARE_CSR(mvien, CSR_MVIEN)
  4614. DECLARE_CSR(mvip, CSR_MVIP)
  4615. DECLARE_CSR(menvcfg, CSR_MENVCFG)
  4616. DECLARE_CSR(mstateen0, CSR_MSTATEEN0)
  4617. DECLARE_CSR(mstateen1, CSR_MSTATEEN1)
  4618. DECLARE_CSR(mstateen2, CSR_MSTATEEN2)
  4619. DECLARE_CSR(mstateen3, CSR_MSTATEEN3)
  4620. DECLARE_CSR(mcountinhibit, CSR_MCOUNTINHIBIT)
  4621. DECLARE_CSR(mscratch, CSR_MSCRATCH)
  4622. DECLARE_CSR(mepc, CSR_MEPC)
  4623. DECLARE_CSR(mcause, CSR_MCAUSE)
  4624. DECLARE_CSR(mtval, CSR_MTVAL)
  4625. DECLARE_CSR(mip, CSR_MIP)
  4626. DECLARE_CSR(mtinst, CSR_MTINST)
  4627. DECLARE_CSR(mtval2, CSR_MTVAL2)
  4628. DECLARE_CSR(miselect, CSR_MISELECT)
  4629. DECLARE_CSR(mireg, CSR_MIREG)
  4630. DECLARE_CSR(mtopei, CSR_MTOPEI)
  4631. DECLARE_CSR(pmpcfg0, CSR_PMPCFG0)
  4632. DECLARE_CSR(pmpcfg1, CSR_PMPCFG1)
  4633. DECLARE_CSR(pmpcfg2, CSR_PMPCFG2)
  4634. DECLARE_CSR(pmpcfg3, CSR_PMPCFG3)
  4635. DECLARE_CSR(pmpcfg4, CSR_PMPCFG4)
  4636. DECLARE_CSR(pmpcfg5, CSR_PMPCFG5)
  4637. DECLARE_CSR(pmpcfg6, CSR_PMPCFG6)
  4638. DECLARE_CSR(pmpcfg7, CSR_PMPCFG7)
  4639. DECLARE_CSR(pmpcfg8, CSR_PMPCFG8)
  4640. DECLARE_CSR(pmpcfg9, CSR_PMPCFG9)
  4641. DECLARE_CSR(pmpcfg10, CSR_PMPCFG10)
  4642. DECLARE_CSR(pmpcfg11, CSR_PMPCFG11)
  4643. DECLARE_CSR(pmpcfg12, CSR_PMPCFG12)
  4644. DECLARE_CSR(pmpcfg13, CSR_PMPCFG13)
  4645. DECLARE_CSR(pmpcfg14, CSR_PMPCFG14)
  4646. DECLARE_CSR(pmpcfg15, CSR_PMPCFG15)
  4647. DECLARE_CSR(pmpaddr0, CSR_PMPADDR0)
  4648. DECLARE_CSR(pmpaddr1, CSR_PMPADDR1)
  4649. DECLARE_CSR(pmpaddr2, CSR_PMPADDR2)
  4650. DECLARE_CSR(pmpaddr3, CSR_PMPADDR3)
  4651. DECLARE_CSR(pmpaddr4, CSR_PMPADDR4)
  4652. DECLARE_CSR(pmpaddr5, CSR_PMPADDR5)
  4653. DECLARE_CSR(pmpaddr6, CSR_PMPADDR6)
  4654. DECLARE_CSR(pmpaddr7, CSR_PMPADDR7)
  4655. DECLARE_CSR(pmpaddr8, CSR_PMPADDR8)
  4656. DECLARE_CSR(pmpaddr9, CSR_PMPADDR9)
  4657. DECLARE_CSR(pmpaddr10, CSR_PMPADDR10)
  4658. DECLARE_CSR(pmpaddr11, CSR_PMPADDR11)
  4659. DECLARE_CSR(pmpaddr12, CSR_PMPADDR12)
  4660. DECLARE_CSR(pmpaddr13, CSR_PMPADDR13)
  4661. DECLARE_CSR(pmpaddr14, CSR_PMPADDR14)
  4662. DECLARE_CSR(pmpaddr15, CSR_PMPADDR15)
  4663. DECLARE_CSR(pmpaddr16, CSR_PMPADDR16)
  4664. DECLARE_CSR(pmpaddr17, CSR_PMPADDR17)
  4665. DECLARE_CSR(pmpaddr18, CSR_PMPADDR18)
  4666. DECLARE_CSR(pmpaddr19, CSR_PMPADDR19)
  4667. DECLARE_CSR(pmpaddr20, CSR_PMPADDR20)
  4668. DECLARE_CSR(pmpaddr21, CSR_PMPADDR21)
  4669. DECLARE_CSR(pmpaddr22, CSR_PMPADDR22)
  4670. DECLARE_CSR(pmpaddr23, CSR_PMPADDR23)
  4671. DECLARE_CSR(pmpaddr24, CSR_PMPADDR24)
  4672. DECLARE_CSR(pmpaddr25, CSR_PMPADDR25)
  4673. DECLARE_CSR(pmpaddr26, CSR_PMPADDR26)
  4674. DECLARE_CSR(pmpaddr27, CSR_PMPADDR27)
  4675. DECLARE_CSR(pmpaddr28, CSR_PMPADDR28)
  4676. DECLARE_CSR(pmpaddr29, CSR_PMPADDR29)
  4677. DECLARE_CSR(pmpaddr30, CSR_PMPADDR30)
  4678. DECLARE_CSR(pmpaddr31, CSR_PMPADDR31)
  4679. DECLARE_CSR(pmpaddr32, CSR_PMPADDR32)
  4680. DECLARE_CSR(pmpaddr33, CSR_PMPADDR33)
  4681. DECLARE_CSR(pmpaddr34, CSR_PMPADDR34)
  4682. DECLARE_CSR(pmpaddr35, CSR_PMPADDR35)
  4683. DECLARE_CSR(pmpaddr36, CSR_PMPADDR36)
  4684. DECLARE_CSR(pmpaddr37, CSR_PMPADDR37)
  4685. DECLARE_CSR(pmpaddr38, CSR_PMPADDR38)
  4686. DECLARE_CSR(pmpaddr39, CSR_PMPADDR39)
  4687. DECLARE_CSR(pmpaddr40, CSR_PMPADDR40)
  4688. DECLARE_CSR(pmpaddr41, CSR_PMPADDR41)
  4689. DECLARE_CSR(pmpaddr42, CSR_PMPADDR42)
  4690. DECLARE_CSR(pmpaddr43, CSR_PMPADDR43)
  4691. DECLARE_CSR(pmpaddr44, CSR_PMPADDR44)
  4692. DECLARE_CSR(pmpaddr45, CSR_PMPADDR45)
  4693. DECLARE_CSR(pmpaddr46, CSR_PMPADDR46)
  4694. DECLARE_CSR(pmpaddr47, CSR_PMPADDR47)
  4695. DECLARE_CSR(pmpaddr48, CSR_PMPADDR48)
  4696. DECLARE_CSR(pmpaddr49, CSR_PMPADDR49)
  4697. DECLARE_CSR(pmpaddr50, CSR_PMPADDR50)
  4698. DECLARE_CSR(pmpaddr51, CSR_PMPADDR51)
  4699. DECLARE_CSR(pmpaddr52, CSR_PMPADDR52)
  4700. DECLARE_CSR(pmpaddr53, CSR_PMPADDR53)
  4701. DECLARE_CSR(pmpaddr54, CSR_PMPADDR54)
  4702. DECLARE_CSR(pmpaddr55, CSR_PMPADDR55)
  4703. DECLARE_CSR(pmpaddr56, CSR_PMPADDR56)
  4704. DECLARE_CSR(pmpaddr57, CSR_PMPADDR57)
  4705. DECLARE_CSR(pmpaddr58, CSR_PMPADDR58)
  4706. DECLARE_CSR(pmpaddr59, CSR_PMPADDR59)
  4707. DECLARE_CSR(pmpaddr60, CSR_PMPADDR60)
  4708. DECLARE_CSR(pmpaddr61, CSR_PMPADDR61)
  4709. DECLARE_CSR(pmpaddr62, CSR_PMPADDR62)
  4710. DECLARE_CSR(pmpaddr63, CSR_PMPADDR63)
  4711. DECLARE_CSR(mseccfg, CSR_MSECCFG)
  4712. DECLARE_CSR(tselect, CSR_TSELECT)
  4713. DECLARE_CSR(tdata1, CSR_TDATA1)
  4714. DECLARE_CSR(tdata2, CSR_TDATA2)
  4715. DECLARE_CSR(tdata3, CSR_TDATA3)
  4716. DECLARE_CSR(tinfo, CSR_TINFO)
  4717. DECLARE_CSR(tcontrol, CSR_TCONTROL)
  4718. DECLARE_CSR(mcontext, CSR_MCONTEXT)
  4719. DECLARE_CSR(mscontext, CSR_MSCONTEXT)
  4720. DECLARE_CSR(dcsr, CSR_DCSR)
  4721. DECLARE_CSR(dpc, CSR_DPC)
  4722. DECLARE_CSR(dscratch0, CSR_DSCRATCH0)
  4723. DECLARE_CSR(dscratch1, CSR_DSCRATCH1)
  4724. DECLARE_CSR(mcycle, CSR_MCYCLE)
  4725. DECLARE_CSR(minstret, CSR_MINSTRET)
  4726. DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3)
  4727. DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4)
  4728. DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5)
  4729. DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6)
  4730. DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7)
  4731. DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8)
  4732. DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9)
  4733. DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10)
  4734. DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11)
  4735. DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)
  4736. DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13)
  4737. DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)
  4738. DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15)
  4739. DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)
  4740. DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)
  4741. DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18)
  4742. DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19)
  4743. DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)
  4744. DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21)
  4745. DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22)
  4746. DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23)
  4747. DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24)
  4748. DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25)
  4749. DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26)
  4750. DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27)
  4751. DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28)
  4752. DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)
  4753. DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30)
  4754. DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31)
  4755. DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3)
  4756. DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4)
  4757. DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5)
  4758. DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6)
  4759. DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7)
  4760. DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8)
  4761. DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9)
  4762. DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10)
  4763. DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11)
  4764. DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12)
  4765. DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13)
  4766. DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14)
  4767. DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15)
  4768. DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16)
  4769. DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17)
  4770. DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18)
  4771. DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)
  4772. DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20)
  4773. DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21)
  4774. DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22)
  4775. DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)
  4776. DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24)
  4777. DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25)
  4778. DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26)
  4779. DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27)
  4780. DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28)
  4781. DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29)
  4782. DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30)
  4783. DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31)
  4784. DECLARE_CSR(mvendorid, CSR_MVENDORID)
  4785. DECLARE_CSR(marchid, CSR_MARCHID)
  4786. DECLARE_CSR(mimpid, CSR_MIMPID)
  4787. DECLARE_CSR(mhartid, CSR_MHARTID)
  4788. DECLARE_CSR(mconfigptr, CSR_MCONFIGPTR)
  4789. DECLARE_CSR(mtopi, CSR_MTOPI)
  4790. DECLARE_CSR(sieh, CSR_SIEH)
  4791. DECLARE_CSR(siph, CSR_SIPH)
  4792. DECLARE_CSR(stimecmph, CSR_STIMECMPH)
  4793. DECLARE_CSR(vsieh, CSR_VSIEH)
  4794. DECLARE_CSR(vsiph, CSR_VSIPH)
  4795. DECLARE_CSR(vstimecmph, CSR_VSTIMECMPH)
  4796. DECLARE_CSR(htimedeltah, CSR_HTIMEDELTAH)
  4797. DECLARE_CSR(hidelegh, CSR_HIDELEGH)
  4798. DECLARE_CSR(hvienh, CSR_HVIENH)
  4799. DECLARE_CSR(henvcfgh, CSR_HENVCFGH)
  4800. DECLARE_CSR(hviph, CSR_HVIPH)
  4801. DECLARE_CSR(hviprio1h, CSR_HVIPRIO1H)
  4802. DECLARE_CSR(hviprio2h, CSR_HVIPRIO2H)
  4803. DECLARE_CSR(hstateen0h, CSR_HSTATEEN0H)
  4804. DECLARE_CSR(hstateen1h, CSR_HSTATEEN1H)
  4805. DECLARE_CSR(hstateen2h, CSR_HSTATEEN2H)
  4806. DECLARE_CSR(hstateen3h, CSR_HSTATEEN3H)
  4807. DECLARE_CSR(cycleh, CSR_CYCLEH)
  4808. DECLARE_CSR(timeh, CSR_TIMEH)
  4809. DECLARE_CSR(instreth, CSR_INSTRETH)
  4810. DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H)
  4811. DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H)
  4812. DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H)
  4813. DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H)
  4814. DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H)
  4815. DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H)
  4816. DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H)
  4817. DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H)
  4818. DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H)
  4819. DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H)
  4820. DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H)
  4821. DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H)
  4822. DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H)
  4823. DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H)
  4824. DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H)
  4825. DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H)
  4826. DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H)
  4827. DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H)
  4828. DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H)
  4829. DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H)
  4830. DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H)
  4831. DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H)
  4832. DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H)
  4833. DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H)
  4834. DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H)
  4835. DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H)
  4836. DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H)
  4837. DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H)
  4838. DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H)
  4839. DECLARE_CSR(mstatush, CSR_MSTATUSH)
  4840. DECLARE_CSR(midelegh, CSR_MIDELEGH)
  4841. DECLARE_CSR(mieh, CSR_MIEH)
  4842. DECLARE_CSR(mvienh, CSR_MVIENH)
  4843. DECLARE_CSR(mviph, CSR_MVIPH)
  4844. DECLARE_CSR(menvcfgh, CSR_MENVCFGH)
  4845. DECLARE_CSR(mstateen0h, CSR_MSTATEEN0H)
  4846. DECLARE_CSR(mstateen1h, CSR_MSTATEEN1H)
  4847. DECLARE_CSR(mstateen2h, CSR_MSTATEEN2H)
  4848. DECLARE_CSR(mstateen3h, CSR_MSTATEEN3H)
  4849. DECLARE_CSR(miph, CSR_MIPH)
  4850. DECLARE_CSR(mhpmevent3h, CSR_MHPMEVENT3H)
  4851. DECLARE_CSR(mhpmevent4h, CSR_MHPMEVENT4H)
  4852. DECLARE_CSR(mhpmevent5h, CSR_MHPMEVENT5H)
  4853. DECLARE_CSR(mhpmevent6h, CSR_MHPMEVENT6H)
  4854. DECLARE_CSR(mhpmevent7h, CSR_MHPMEVENT7H)
  4855. DECLARE_CSR(mhpmevent8h, CSR_MHPMEVENT8H)
  4856. DECLARE_CSR(mhpmevent9h, CSR_MHPMEVENT9H)
  4857. DECLARE_CSR(mhpmevent10h, CSR_MHPMEVENT10H)
  4858. DECLARE_CSR(mhpmevent11h, CSR_MHPMEVENT11H)
  4859. DECLARE_CSR(mhpmevent12h, CSR_MHPMEVENT12H)
  4860. DECLARE_CSR(mhpmevent13h, CSR_MHPMEVENT13H)
  4861. DECLARE_CSR(mhpmevent14h, CSR_MHPMEVENT14H)
  4862. DECLARE_CSR(mhpmevent15h, CSR_MHPMEVENT15H)
  4863. DECLARE_CSR(mhpmevent16h, CSR_MHPMEVENT16H)
  4864. DECLARE_CSR(mhpmevent17h, CSR_MHPMEVENT17H)
  4865. DECLARE_CSR(mhpmevent18h, CSR_MHPMEVENT18H)
  4866. DECLARE_CSR(mhpmevent19h, CSR_MHPMEVENT19H)
  4867. DECLARE_CSR(mhpmevent20h, CSR_MHPMEVENT20H)
  4868. DECLARE_CSR(mhpmevent21h, CSR_MHPMEVENT21H)
  4869. DECLARE_CSR(mhpmevent22h, CSR_MHPMEVENT22H)
  4870. DECLARE_CSR(mhpmevent23h, CSR_MHPMEVENT23H)
  4871. DECLARE_CSR(mhpmevent24h, CSR_MHPMEVENT24H)
  4872. DECLARE_CSR(mhpmevent25h, CSR_MHPMEVENT25H)
  4873. DECLARE_CSR(mhpmevent26h, CSR_MHPMEVENT26H)
  4874. DECLARE_CSR(mhpmevent27h, CSR_MHPMEVENT27H)
  4875. DECLARE_CSR(mhpmevent28h, CSR_MHPMEVENT28H)
  4876. DECLARE_CSR(mhpmevent29h, CSR_MHPMEVENT29H)
  4877. DECLARE_CSR(mhpmevent30h, CSR_MHPMEVENT30H)
  4878. DECLARE_CSR(mhpmevent31h, CSR_MHPMEVENT31H)
  4879. DECLARE_CSR(mseccfgh, CSR_MSECCFGH)
  4880. DECLARE_CSR(mcycleh, CSR_MCYCLEH)
  4881. DECLARE_CSR(minstreth, CSR_MINSTRETH)
  4882. DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H)
  4883. DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H)
  4884. DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H)
  4885. DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H)
  4886. DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H)
  4887. DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H)
  4888. DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H)
  4889. DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H)
  4890. DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H)
  4891. DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H)
  4892. DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H)
  4893. DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H)
  4894. DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H)
  4895. DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H)
  4896. DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H)
  4897. DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H)
  4898. DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H)
  4899. DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H)
  4900. DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H)
  4901. DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H)
  4902. DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H)
  4903. DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H)
  4904. DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H)
  4905. DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H)
  4906. DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H)
  4907. DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
  4908. DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
  4909. DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
  4910. DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
  4911. #endif
  4912. #ifdef DECLARE_CAUSE
  4913. DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
  4914. DECLARE_CAUSE("fetch access", CAUSE_FETCH_ACCESS)
  4915. DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION)
  4916. DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT)
  4917. DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD)
  4918. DECLARE_CAUSE("load access", CAUSE_LOAD_ACCESS)
  4919. DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE)
  4920. DECLARE_CAUSE("store access", CAUSE_STORE_ACCESS)
  4921. DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL)
  4922. DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
  4923. DECLARE_CAUSE("virtual_supervisor_ecall", CAUSE_VIRTUAL_SUPERVISOR_ECALL)
  4924. DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
  4925. DECLARE_CAUSE("fetch page fault", CAUSE_FETCH_PAGE_FAULT)
  4926. DECLARE_CAUSE("load page fault", CAUSE_LOAD_PAGE_FAULT)
  4927. DECLARE_CAUSE("store page fault", CAUSE_STORE_PAGE_FAULT)
  4928. DECLARE_CAUSE("fetch guest page fault", CAUSE_FETCH_GUEST_PAGE_FAULT)
  4929. DECLARE_CAUSE("load guest page fault", CAUSE_LOAD_GUEST_PAGE_FAULT)
  4930. DECLARE_CAUSE("virtual instruction", CAUSE_VIRTUAL_INSTRUCTION)
  4931. DECLARE_CAUSE("store guest page fault", CAUSE_STORE_GUEST_PAGE_FAULT)
  4932. #endif