State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[5]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[4]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[3]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[2]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[1]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_rx:u_rx[0]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[5]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[4]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[3]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[2]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[1]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[1]|uart_tx:u_tx[0]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[5]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[4]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[3]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[2]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[1]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]|rx_state Name rx_state.UART_PARITY rx_state.UART_DATA rx_state.UART_START rx_state.UART_IDLE rx_state.UART_STOP rx_state.UART_IDLE 0 0 0 0 0 rx_state.UART_START 0 0 1 1 0 rx_state.UART_DATA 0 1 0 1 0 rx_state.UART_PARITY 1 0 0 1 0 rx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[5]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[4]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[3]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[2]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[1]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]|tx_state Name tx_state.UART_PARITY tx_state.UART_DATA tx_state.UART_START tx_state.UART_IDLE tx_state.UART_STOP tx_state.UART_IDLE 0 0 0 0 0 tx_state.UART_START 0 0 1 1 0 tx_state.UART_DATA 0 1 0 1 0 tx_state.UART_PARITY 1 0 0 1 0 tx_state.UART_STOP 0 0 0 1 1 State Machine - |test_uart|multi_uart_ip:macro_inst|ahb2apb:u_ahb2apb|apbState Name apbState.apbIdle apbState.apbAccess apbState.apbSetup apbState.apbIdle 0 0 0 apbState.apbSetup 1 0 1 apbState.apbAccess 1 1 0