{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1752567965096 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Full Version " "Version 13.0.0 Build 156 04/24/2013 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1752567965097 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 15 16:26:04 2025 " "Processing started: Tue Jul 15 16:26:04 2025" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1752567965097 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1752567965097 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off test_uart -c test_uart " "Command: quartus_map --read_settings_files=on --write_settings_files=off test_uart -c test_uart" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1752567965097 ""} { "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS_MORE_LOGICAL" "4 4 8 " "Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead." { } { } 0 11104 "Parallel Compilation has detected %3!i! hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use %1!i! of the %2!i! physical processors detected instead." 0 0 "Quartus II" 0 -1 1752567965504 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "test_uart.v 1 1 " "Found 1 design units, including 1 entities, in source file test_uart.v" { { "Info" "ISGN_ENTITY_NAME" "1 test_uart " "Found entity 1: test_uart" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965557 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965557 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip.v" { { "Info" "ISGN_ENTITY_NAME" "1 multi_uart_ip " "Found entity 1: multi_uart_ip" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965559 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965559 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/baud_gen.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/baud_gen.v" { { "Info" "ISGN_ENTITY_NAME" "1 baud_gen " "Found entity 1: baud_gen" { } { { "multi_uart_ip/baud_gen.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/baud_gen.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965562 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965562 ""} { "Warning" "WVRFX_L2_VERI_INGORE_DANGLING_COMMA" "multi_uart.v(90) " "Verilog HDL Module Instantiation warning at multi_uart.v(90): ignored dangling comma in List of Port Connections" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 90 0 0 } } } 0 10275 "Verilog HDL Module Instantiation warning at %1!s!: ignored dangling comma in List of Port Connections" 0 0 "Quartus II" 0 -1 1752567965564 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/multi_uart.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/multi_uart.v" { { "Info" "ISGN_ENTITY_NAME" "1 multi_uart " "Found entity 1: multi_uart" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965564 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965564 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/sync_fifo.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/sync_fifo.v" { { "Info" "ISGN_ENTITY_NAME" "1 sync_fifo " "Found entity 1: sync_fifo" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965566 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965566 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/uart_regs.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/uart_regs.v" { { "Info" "ISGN_ENTITY_NAME" "1 uart_regs " "Found entity 1: uart_regs" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965568 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965568 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/uart_rx.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/uart_rx.v" { { "Info" "ISGN_ENTITY_NAME" "1 uart_rx " "Found entity 1: uart_rx" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965570 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965570 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "multi_uart_ip/uart_tx.v 1 1 " "Found 1 design units, including 1 entities, in source file multi_uart_ip/uart_tx.v" { { "Info" "ISGN_ENTITY_NAME" "1 uart_tx " "Found entity 1: uart_tx" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965572 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965572 ""} { "Info" "IVRFX_L3_VERI_OBJ_DIFF_ONLY_IN_CASE" "initVal initval alta_sim.v(4171) " "Verilog HDL Declaration information at alta_sim.v(4171): object \"initVal\" differs only in case from object \"initval\" in the same scope" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4171 0 0 } } } 0 10281 "Verilog HDL Declaration information at %3!s!: object \"%1!s!\" differs only in case from object \"%2!s!\" in the same scope" 1 0 "Quartus II" 0 -1 1752567965579 ""} { "Warning" "WVRFX_L3_VERI_XZ_EXTEND_SIGNIFICANT" "alta_sim.v(4325) " "Verilog HDL warning at alta_sim.v(4325): extended using \"x\" or \"z\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4325 0 0 } } } 0 10273 "Verilog HDL warning at %1!s!: extended using \"x\" or \"z\"" 1 0 "Quartus II" 0 -1 1752567965580 ""} { "Info" "IVRFX_L3_VERI_OBJ_DIFF_ONLY_IN_CASE" "initVal initval alta_sim.v(4376) " "Verilog HDL Declaration information at alta_sim.v(4376): object \"initVal\" differs only in case from object \"initval\" in the same scope" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4376 0 0 } } } 0 10281 "Verilog HDL Declaration information at %3!s!: object \"%1!s!\" differs only in case from object \"%2!s!\" in the same scope" 1 0 "Quartus II" 0 -1 1752567965580 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v 57 57 " "Found 57 design units, including 57 entities, in source file c:/users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" { { "Info" "ISGN_ENTITY_NAME" "1 alta_slice " "Found entity 1: alta_slice" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 43 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "2 alta_clkenctrl_rst " "Found entity 2: alta_clkenctrl_rst" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 85 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "3 alta_clkenctrl " "Found entity 3: alta_clkenctrl" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 101 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "4 alta_asyncctrl " "Found entity 4: alta_asyncctrl" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 118 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "5 alta_syncctrl " "Found entity 5: alta_syncctrl" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 132 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "6 alta_io_gclk " "Found entity 6: alta_io_gclk" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 146 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "7 alta_gclksel " "Found entity 7: alta_gclksel" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 159 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "8 alta_gclkgen " "Found entity 8: alta_gclkgen" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 171 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "9 alta_gclkgen0 " "Found entity 9: alta_gclkgen0" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 184 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "10 alta_gclkgen2 " "Found entity 10: alta_gclkgen2" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 194 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "11 alta_io " "Found entity 11: alta_io" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 209 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "12 alta_rio " "Found entity 12: alta_rio" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 275 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "13 alta_srff " "Found entity 13: alta_srff" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 343 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "14 alta_dff " "Found entity 14: alta_dff" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 366 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "15 alta_ufm_gddd " "Found entity 15: alta_ufm_gddd" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 373 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "16 alta_dff_stall " "Found entity 16: alta_dff_stall" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 377 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "17 alta_srlat " "Found entity 17: alta_srlat" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 384 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "18 alta_dio " "Found entity 18: alta_dio" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 402 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "19 alta_indel " "Found entity 19: alta_indel" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 498 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "20 alta_dpclkdel " "Found entity 20: alta_dpclkdel" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 509 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "21 alta_ufms " "Found entity 21: alta_ufms" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 520 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "22 alta_ufms_sim " "Found entity 22: alta_ufms_sim" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 546 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "23 alta_pll " "Found entity 23: alta_pll" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 902 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "24 alta_pllx " "Found entity 24: alta_pllx" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 960 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "25 pll_clk_trim " "Found entity 25: pll_clk_trim" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 1985 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "26 alta_pllv " "Found entity 26: alta_pllv" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 1999 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "27 alta_pllve " "Found entity 27: alta_pllve" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2103 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "28 alta_sram " "Found entity 28: alta_sram" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2310 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "29 alta_dpram16x4 " "Found entity 29: alta_dpram16x4" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2349 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "30 alta_spram16x4 " "Found entity 30: alta_spram16x4" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2367 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "31 alta_wram " "Found entity 31: alta_wram" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2384 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "32 alta_bram_pulse_generator " "Found entity 32: alta_bram_pulse_generator" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2423 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "33 alta_bram " "Found entity 33: alta_bram" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2440 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "34 alta_boot " "Found entity 34: alta_boot" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2611 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "35 alta_osc " "Found entity 35: alta_osc" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2625 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "36 alta_ufml " "Found entity 36: alta_ufml" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2640 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "37 alta_jtag " "Found entity 37: alta_jtag" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2649 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "38 alta_mult " "Found entity 38: alta_mult" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2682 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "39 alta_dff_en " "Found entity 39: alta_dff_en" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2754 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "40 alta_multm_add " "Found entity 40: alta_multm_add" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2762 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "41 alta_multm " "Found entity 41: alta_multm" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2785 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "42 alta_i2c " "Found entity 42: alta_i2c" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3020 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "43 alta_spi " "Found entity 43: alta_spi" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3057 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "44 alta_irda " "Found entity 44: alta_irda" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3104 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "45 alta_bram9k " "Found entity 45: alta_bram9k" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3124 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "46 alta_mcu " "Found entity 46: alta_mcu" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3365 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "47 alta_mcu_m3 " "Found entity 47: alta_mcu_m3" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3494 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "48 alta_remote " "Found entity 48: alta_remote" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3657 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "49 alta_saradc " "Found entity 49: alta_saradc" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3668 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "50 alta_gclksw " "Found entity 50: alta_gclksw" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3683 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "51 alta_rv32 " "Found entity 51: alta_rv32" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3715 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "52 alta_mipi_clk " "Found entity 52: alta_mipi_clk" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3906 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "53 alta_adc " "Found entity 53: alta_adc" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3922 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "54 alta_dac " "Found entity 54: alta_dac" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3985 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "55 alta_cmp " "Found entity 55: alta_cmp" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4006 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "56 alta_ram4k " "Found entity 56: alta_ram4k" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4062 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Info" "ISGN_ENTITY_NAME" "57 alta_ram9k " "Found entity 57: alta_ram9k" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 4241 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965582 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_32_in test_uart.v(143) " "Verilog HDL Implicit Net warning at test_uart.v(143): created implicit net for \"PIN_32_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 143 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965584 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_33_in test_uart.v(146) " "Verilog HDL Implicit Net warning at test_uart.v(146): created implicit net for \"PIN_33_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 146 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965584 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_35_in test_uart.v(154) " "Verilog HDL Implicit Net warning at test_uart.v(154): created implicit net for \"PIN_35_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 154 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965584 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_38_in test_uart.v(162) " "Verilog HDL Implicit Net warning at test_uart.v(162): created implicit net for \"PIN_38_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 162 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_48_in test_uart.v(180) " "Verilog HDL Implicit Net warning at test_uart.v(180): created implicit net for \"PIN_48_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 180 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_66_in test_uart.v(201) " "Verilog HDL Implicit Net warning at test_uart.v(201): created implicit net for \"PIN_66_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 201 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_95_in test_uart.v(259) " "Verilog HDL Implicit Net warning at test_uart.v(259): created implicit net for \"PIN_95_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 259 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_97_in test_uart.v(267) " "Verilog HDL Implicit Net warning at test_uart.v(267): created implicit net for \"PIN_97_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 267 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_98_in test_uart.v(270) " "Verilog HDL Implicit Net warning at test_uart.v(270): created implicit net for \"PIN_98_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 270 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_HSE_in test_uart.v(276) " "Verilog HDL Implicit Net warning at test_uart.v(276): created implicit net for \"PIN_HSE_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 276 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_HSI_in test_uart.v(279) " "Verilog HDL Implicit Net warning at test_uart.v(279): created implicit net for \"PIN_HSI_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 279 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "PIN_OSC_in test_uart.v(282) " "Verilog HDL Implicit Net warning at test_uart.v(282): created implicit net for \"PIN_OSC_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 282 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "usb0_xcvr_clk test_uart.v(405) " "Verilog HDL Implicit Net warning at test_uart.v(405): created implicit net for \"usb0_xcvr_clk\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 405 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "bus_clk test_uart.v(424) " "Verilog HDL Implicit Net warning at test_uart.v(424): created implicit net for \"bus_clk\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 424 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "sys_clk test_uart.v(437) " "Verilog HDL Implicit Net warning at test_uart.v(437): created implicit net for \"sys_clk\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 437 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__5__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__5__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__4__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__4__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__3__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__3__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__2__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__2__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__1__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__1__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g0_in__0__ test_uart.v(492) " "Verilog HDL Implicit Net warning at test_uart.v(492): created implicit net for \"gpio_int_g0_in__0__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 492 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__5__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__5__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__4__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__4__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__3__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__3__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965585 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__2__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__2__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__1__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__1__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "gpio_int_g1_in__0__ test_uart.v(493) " "Verilog HDL Implicit Net warning at test_uart.v(493): created implicit net for \"gpio_int_g1_in__0__\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 493 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "rxd_12_ip_in test_uart.v(494) " "Verilog HDL Implicit Net warning at test_uart.v(494): created implicit net for \"rxd_12_ip_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 494 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "rxd_13_ip_in test_uart.v(495) " "Verilog HDL Implicit Net warning at test_uart.v(495): created implicit net for \"rxd_13_ip_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 495 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "rxd_15_ip_in test_uart.v(496) " "Verilog HDL Implicit Net warning at test_uart.v(496): created implicit net for \"rxd_15_ip_in\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 496 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_12_ip_out_data test_uart.v(497) " "Verilog HDL Implicit Net warning at test_uart.v(497): created implicit net for \"txd_12_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 497 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_12_ip_out_en test_uart.v(498) " "Verilog HDL Implicit Net warning at test_uart.v(498): created implicit net for \"txd_12_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 498 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_13_ip_out_data test_uart.v(499) " "Verilog HDL Implicit Net warning at test_uart.v(499): created implicit net for \"txd_13_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 499 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_13_ip_out_en test_uart.v(500) " "Verilog HDL Implicit Net warning at test_uart.v(500): created implicit net for \"txd_13_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 500 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_15_ip_out_data test_uart.v(501) " "Verilog HDL Implicit Net warning at test_uart.v(501): created implicit net for \"txd_15_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 501 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txd_15_ip_out_en test_uart.v(502) " "Verilog HDL Implicit Net warning at test_uart.v(502): created implicit net for \"txd_15_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 502 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_12_ip_out_data test_uart.v(503) " "Verilog HDL Implicit Net warning at test_uart.v(503): created implicit net for \"txen_12_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 503 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_12_ip_out_en test_uart.v(504) " "Verilog HDL Implicit Net warning at test_uart.v(504): created implicit net for \"txen_12_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 504 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_13_ip_out_data test_uart.v(505) " "Verilog HDL Implicit Net warning at test_uart.v(505): created implicit net for \"txen_13_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 505 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_13_ip_out_en test_uart.v(506) " "Verilog HDL Implicit Net warning at test_uart.v(506): created implicit net for \"txen_13_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 506 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_15_ip_out_data test_uart.v(507) " "Verilog HDL Implicit Net warning at test_uart.v(507): created implicit net for \"txen_15_ip_out_data\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 507 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "txen_15_ip_out_en test_uart.v(508) " "Verilog HDL Implicit Net warning at test_uart.v(508): created implicit net for \"txen_15_ip_out_en\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 508 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "baud16 multi_uart.v(51) " "Verilog HDL Implicit Net warning at multi_uart.v(51): created implicit net for \"baud16\"" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 51 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "lcr_sps multi_uart.v(83) " "Verilog HDL Implicit Net warning at multi_uart.v(83): created implicit net for \"lcr_sps\"" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 83 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "lcr_stp2 multi_uart.v(84) " "Verilog HDL Implicit Net warning at multi_uart.v(84): created implicit net for \"lcr_stp2\"" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 84 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "lcr_eps multi_uart.v(85) " "Verilog HDL Implicit Net warning at multi_uart.v(85): created implicit net for \"lcr_eps\"" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 85 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "lcr_pen multi_uart.v(86) " "Verilog HDL Implicit Net warning at multi_uart.v(86): created implicit net for \"lcr_pen\"" { } { { "multi_uart_ip/multi_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 86 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965586 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "ena_reg alta_sim.v(180) " "Verilog HDL Implicit Net warning at alta_sim.v(180): created implicit net for \"ena_reg\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 180 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "ena_int alta_sim.v(204) " "Verilog HDL Implicit Net warning at alta_sim.v(204): created implicit net for \"ena_int\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 204 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "ena_reg alta_sim.v(205) " "Verilog HDL Implicit Net warning at alta_sim.v(205): created implicit net for \"ena_reg\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 205 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "outreg_h alta_sim.v(476) " "Verilog HDL Implicit Net warning at alta_sim.v(476): created implicit net for \"outreg_h\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 476 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "outreg_l alta_sim.v(477) " "Verilog HDL Implicit Net warning at alta_sim.v(477): created implicit net for \"outreg_l\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 477 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "oe_reg_h alta_sim.v(485) " "Verilog HDL Implicit Net warning at alta_sim.v(485): created implicit net for \"oe_reg_h\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 485 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "oe_reg_l alta_sim.v(486) " "Verilog HDL Implicit Net warning at alta_sim.v(486): created implicit net for \"oe_reg_l\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 486 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "dffOut alta_sim.v(2758) " "Verilog HDL Implicit Net warning at alta_sim.v(2758): created implicit net for \"dffOut\"" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2758 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965587 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(105) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(105): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 105 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965588 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(106) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(106): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 106 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965588 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(126) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(126): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 126 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965588 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(127) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(127): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 127 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965588 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(128) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(128): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 128 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965588 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(38) " "Verilog HDL Parameter Declaration warning at uart_regs.v(38): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 38 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(39) " "Verilog HDL Parameter Declaration warning at uart_regs.v(39): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 39 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(40) " "Verilog HDL Parameter Declaration warning at uart_regs.v(40): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 40 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(41) " "Verilog HDL Parameter Declaration warning at uart_regs.v(41): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 41 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(42) " "Verilog HDL Parameter Declaration warning at uart_regs.v(42): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 42 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(43) " "Verilog HDL Parameter Declaration warning at uart_regs.v(43): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 43 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(44) " "Verilog HDL Parameter Declaration warning at uart_regs.v(44): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 44 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(45) " "Verilog HDL Parameter Declaration warning at uart_regs.v(45): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 45 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(46) " "Verilog HDL Parameter Declaration warning at uart_regs.v(46): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 46 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(47) " "Verilog HDL Parameter Declaration warning at uart_regs.v(47): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 47 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_regs uart_regs.v(49) " "Verilog HDL Parameter Declaration warning at uart_regs.v(49): Parameter Declaration in module \"uart_regs\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 49 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965589 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_tx uart_tx.v(21) " "Verilog HDL Parameter Declaration warning at uart_tx.v(21): Parameter Declaration in module \"uart_tx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 21 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_tx uart_tx.v(22) " "Verilog HDL Parameter Declaration warning at uart_tx.v(22): Parameter Declaration in module \"uart_tx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 22 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_tx uart_tx.v(23) " "Verilog HDL Parameter Declaration warning at uart_tx.v(23): Parameter Declaration in module \"uart_tx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 23 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_tx uart_tx.v(24) " "Verilog HDL Parameter Declaration warning at uart_tx.v(24): Parameter Declaration in module \"uart_tx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 24 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_tx uart_tx.v(25) " "Verilog HDL Parameter Declaration warning at uart_tx.v(25): Parameter Declaration in module \"uart_tx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 25 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "sync_fifo sync_fifo.v(12) " "Verilog HDL Parameter Declaration warning at sync_fifo.v(12): Parameter Declaration in module \"sync_fifo\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 12 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "sync_fifo sync_fifo.v(13) " "Verilog HDL Parameter Declaration warning at sync_fifo.v(13): Parameter Declaration in module \"sync_fifo\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 13 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "sync_fifo sync_fifo.v(18) " "Verilog HDL Parameter Declaration warning at sync_fifo.v(18): Parameter Declaration in module \"sync_fifo\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 18 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965590 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(24) " "Verilog HDL Parameter Declaration warning at uart_rx.v(24): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 24 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(25) " "Verilog HDL Parameter Declaration warning at uart_rx.v(25): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 25 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(26) " "Verilog HDL Parameter Declaration warning at uart_rx.v(26): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 26 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(27) " "Verilog HDL Parameter Declaration warning at uart_rx.v(27): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 27 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(28) " "Verilog HDL Parameter Declaration warning at uart_rx.v(28): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 28 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(30) " "Verilog HDL Parameter Declaration warning at uart_rx.v(30): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 30 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "uart_rx uart_rx.v(31) " "Verilog HDL Parameter Declaration warning at uart_rx.v(31): Parameter Declaration in module \"uart_rx\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 31 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(228) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(228): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 228 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(229) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(229): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 229 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "multi_uart_ip multi_uart_ip.v(230) " "Verilog HDL Parameter Declaration warning at multi_uart_ip.v(230): Parameter Declaration in module \"multi_uart_ip\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 230 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965591 ""} { "Warning" "WVRFX_VERI_PARAM_DECL_BEHAVES_AS_LOCAL" "alta_bram_pulse_generator alta_sim.v(2428) " "Verilog HDL Parameter Declaration warning at alta_sim.v(2428): Parameter Declaration in module \"alta_bram_pulse_generator\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 2428 0 0 } } } 0 10222 "Verilog HDL Parameter Declaration warning at %2!s!: Parameter Declaration in module \"%1!s!\" behaves as a Local Parameter Declaration because the module has a Module Parameter Port List" 0 0 "Quartus II" 0 -1 1752567965595 ""} { "Info" "ISGN_START_ELABORATION_TOP" "test_uart " "Elaborating entity \"test_uart\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1752567965639 ""} { "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "PIN_OSC_in test_uart.v(282) " "Verilog HDL or VHDL warning at test_uart.v(282): object \"PIN_OSC_in\" assigned a value but never read" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 282 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1752567965642 "|test_uart"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll altpll:pll_inst " "Elaborating entity \"altpll\" for hierarchy \"altpll:pll_inst\"" { } { { "test_uart.v" "pll_inst" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 371 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965686 ""} { "Info" "ISGN_ELABORATION_HEADER" "altpll:pll_inst " "Elaborated megafunction instantiation \"altpll:pll_inst\"" { } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 371 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_TOP" "altpll:pll_inst " "Instantiated megafunction \"altpll:pll_inst\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "bandwidth_type AUTO " "Parameter \"bandwidth_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 4 " "Parameter \"clk0_divide_by\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 120 " "Parameter \"clk0_multiply_by\" = \"120\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Parameter \"clk0_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk1_divide_by 4 " "Parameter \"clk1_divide_by\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk1_multiply_by 120 " "Parameter \"clk1_multiply_by\" = \"120\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk1_phase_shift 0 " "Parameter \"clk1_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk2_divide_by 4 " "Parameter \"clk2_divide_by\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk2_multiply_by 120 " "Parameter \"clk2_multiply_by\" = \"120\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk2_phase_shift 0 " "Parameter \"clk2_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk3_divide_by 8 " "Parameter \"clk3_divide_by\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk3_multiply_by 120 " "Parameter \"clk3_multiply_by\" = \"120\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk3_phase_shift 0 " "Parameter \"clk3_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk4_divide_by 4 " "Parameter \"clk4_divide_by\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk4_multiply_by 120 " "Parameter \"clk4_multiply_by\" = \"120\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk4_phase_shift 0 " "Parameter \"clk4_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Parameter \"compensate_clock\" = \"CLK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 125000 " "Parameter \"inclk0_input_frequency\" = \"125000\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Parameter \"lpm_type\" = \"altpll\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Parameter \"operation_mode\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Parameter \"pll_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_USED " "Parameter \"port_areset\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Parameter \"port_inclk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_USED " "Parameter \"port_locked\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Parameter \"port_clk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Parameter \"port_clk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk2 PORT_UNUSED " "Parameter \"port_clk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_USED " "Parameter \"port_clk3\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Parameter \"port_clk4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_clock 5 " "Parameter \"width_clock\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_phasecounterselect 3 " "Parameter \"width_phasecounterselect\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965689 ""} } { { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 371 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Quartus II" 0 -1 1752567965689 ""} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altpll_9g32.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altpll_9g32.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altpll_9g32 " "Found entity 1: altpll_9g32" { } { { "db/altpll_9g32.tdf" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/db/altpll_9g32.tdf" 27 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965745 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1752567965745 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll_9g32 altpll:pll_inst\|altpll_9g32:auto_generated " "Elaborating entity \"altpll_9g32\" for hierarchy \"altpll:pll_inst\|altpll_9g32:auto_generated\"" { } { { "altpll.tdf" "auto_generated" { Text "c:/altera/13.0/quartus/libraries/megafunctions/altpll.tdf" 897 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965746 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "alta_gclksw alta_gclksw:gclksw_inst " "Elaborating entity \"alta_gclksw\" for hierarchy \"alta_gclksw:gclksw_inst\"" { } { { "test_uart.v" "gclksw_inst" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 437 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965750 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "multi_uart_ip multi_uart_ip:macro_inst " "Elaborating entity \"multi_uart_ip\" for hierarchy \"multi_uart_ip:macro_inst\"" { } { { "test_uart.v" "macro_inst" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 541 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965752 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 1 multi_uart_ip.v(238) " "Verilog HDL assignment warning at multi_uart_ip.v(238): truncated value with size 8 to match size of target (1)" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 238 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965754 "|test_uart|multi_uart_ip:macro_inst"} { "Warning" "WVRFX_VDB_DRIVERLESS_NET" "tx_dma_clr\[11..2\] 0 multi_uart_ip.v(108) " "Net \"tx_dma_clr\[11..2\]\" at multi_uart_ip.v(108) has no driver or initial value, using a default initial value '0'" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 108 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Quartus II" 0 -1 1752567965754 "|test_uart|multi_uart_ip:macro_inst"} { "Warning" "WVRFX_VDB_DRIVERLESS_NET" "rx_dma_clr\[11..2\] 0 multi_uart_ip.v(110) " "Net \"rx_dma_clr\[11..2\]\" at multi_uart_ip.v(110) has no driver or initial value, using a default initial value '0'" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 110 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Quartus II" 0 -1 1752567965754 "|test_uart|multi_uart_ip:macro_inst"} { "Warning" "WSGN_SEARCH_FILE" "ahb2apb.v 1 1 " "Using design file ahb2apb.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 ahb2apb " "Found entity 1: ahb2apb" { } { { "ahb2apb.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/ahb2apb.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965768 ""} } { } 0 12125 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "Quartus II" 0 -1 1752567965768 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb2apb multi_uart_ip:macro_inst\|ahb2apb:u_ahb2apb " "Elaborating entity \"ahb2apb\" for hierarchy \"multi_uart_ip:macro_inst\|ahb2apb:u_ahb2apb\"" { } { { "multi_uart_ip.v" "u_ahb2apb" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 180 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965769 ""} { "Warning" "WVRFX_VERI_2086_UNCONVERTED" "ahb2apb.v(52) " "Verilog HDL warning at ahb2apb.v(52): converting signed shift amount to unsigned" { } { { "ahb2apb.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/ahb2apb.v" 52 0 0 } } } 0 10764 "Verilog HDL warning at %1!s!: converting signed shift amount to unsigned" 0 0 "Quartus II" 0 -1 1752567965772 "|test_uart|multi_uart_ip:macro_inst|ahb2apb:u_ahb2apb"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 ahb2apb.v(52) " "Verilog HDL assignment warning at ahb2apb.v(52): truncated value with size 32 to match size of target (4)" { } { { "ahb2apb.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/ahb2apb.v" 52 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965772 "|test_uart|multi_uart_ip:macro_inst|ahb2apb:u_ahb2apb"} { "Warning" "WSGN_SEARCH_FILE" "apb_mux.v 1 1 " "Using design file apb_mux.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 apb_mux " "Found entity 1: apb_mux" { } { { "apb_mux.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/apb_mux.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1752567965786 ""} } { } 0 12125 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "Quartus II" 0 -1 1752567965786 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "apb_mux multi_uart_ip:macro_inst\|apb_mux:u_apb_mux " "Elaborating entity \"apb_mux\" for hierarchy \"multi_uart_ip:macro_inst\|apb_mux:u_apb_mux\"" { } { { "multi_uart_ip.v" "u_apb_mux" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 202 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965787 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "multi_uart multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\] " "Elaborating entity \"multi_uart\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\"" { } { { "multi_uart_ip.v" "u_uart\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 222 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965789 ""} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "baud_gen multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|baud_gen:u_baud " "Elaborating entity \"baud_gen\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|baud_gen:u_baud\"" { } { { "multi_uart_ip/multi_uart.v" "u_baud" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 52 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965792 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 baud_gen.v(21) " "Verilog HDL assignment warning at baud_gen.v(21): truncated value with size 32 to match size of target (16)" { } { { "multi_uart_ip/baud_gen.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/baud_gen.v" 21 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965792 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|baud_gen:u_baud"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 baud_gen.v(31) " "Verilog HDL assignment warning at baud_gen.v(31): truncated value with size 32 to match size of target (6)" { } { { "multi_uart_ip/baud_gen.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/baud_gen.v" 31 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965792 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|baud_gen:u_baud"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "uart_regs multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_regs:u_regs " "Elaborating entity \"uart_regs\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_regs:u_regs\"" { } { { "multi_uart_ip/multi_uart.v" "u_regs" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 90 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965794 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "16 6 uart_regs.v(87) " "Verilog HDL assignment warning at uart_regs.v(87): truncated value with size 16 to match size of target (6)" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 87 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965796 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_regs:u_regs"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 uart_regs.v(208) " "Verilog HDL assignment warning at uart_regs.v(208): truncated value with size 32 to match size of target (6)" { } { { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 208 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965796 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_regs:u_regs"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "uart_tx multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_tx:u_tx\[0\] " "Elaborating entity \"uart_tx\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_tx:u_tx\[0\]\"" { } { { "multi_uart_ip/multi_uart.v" "u_tx\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 111 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965798 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 uart_tx.v(90) " "Verilog HDL assignment warning at uart_tx.v(90): truncated value with size 32 to match size of target (3)" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 90 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965799 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 uart_tx.v(92) " "Verilog HDL assignment warning at uart_tx.v(92): truncated value with size 32 to match size of target (3)" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 92 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965799 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 uart_tx.v(100) " "Verilog HDL assignment warning at uart_tx.v(100): truncated value with size 32 to match size of target (1)" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 100 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965799 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_tx.v(110) " "Verilog HDL assignment warning at uart_tx.v(110): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 110 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965800 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "sync_fifo multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_tx:u_tx\[0\]\|sync_fifo:tx_fifo " "Elaborating entity \"sync_fifo\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_tx:u_tx\[0\]\|sync_fifo:tx_fifo\"" { } { { "multi_uart_ip/uart_tx.v" "tx_fifo" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 52 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965801 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 sync_fifo.v(36) " "Verilog HDL assignment warning at sync_fifo.v(36): truncated value with size 32 to match size of target (1)" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 36 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965801 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]|sync_fifo:tx_fifo"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 sync_fifo.v(38) " "Verilog HDL assignment warning at sync_fifo.v(38): truncated value with size 32 to match size of target (1)" { } { { "multi_uart_ip/sync_fifo.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/sync_fifo.v" 38 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965801 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_tx:u_tx[0]|sync_fifo:tx_fifo"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "uart_rx multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_rx:u_rx\[0\] " "Elaborating entity \"uart_rx\" for hierarchy \"multi_uart_ip:macro_inst\|multi_uart:u_uart\[0\]\|uart_rx:u_rx\[0\]\"" { } { { "multi_uart_ip/multi_uart.v" "u_rx\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/multi_uart.v" 135 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965813 ""} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_rx.v(88) " "Verilog HDL assignment warning at uart_rx.v(88): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 88 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965815 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_rx.v(91) " "Verilog HDL assignment warning at uart_rx.v(91): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 91 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965815 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_rx.v(93) " "Verilog HDL assignment warning at uart_rx.v(93): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 93 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965815 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_rx.v(118) " "Verilog HDL assignment warning at uart_rx.v(118): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 118 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965816 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]"} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 uart_rx.v(120) " "Verilog HDL assignment warning at uart_rx.v(120): truncated value with size 32 to match size of target (4)" { } { { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 120 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1752567965816 "|test_uart|multi_uart_ip:macro_inst|multi_uart:u_uart[0]|uart_rx:u_rx[0]"} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "alta_rv32 alta_rv32:rv32 " "Elaborating entity \"alta_rv32\" for hierarchy \"alta_rv32:rv32\"" { } { { "test_uart.v" "rv32" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 733 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1752567965870 ""} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio0_io_out_data alta_sim.v(3739) " "Output port \"gpio0_io_out_data\" at alta_sim.v(3739) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965872 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio0_io_out_en alta_sim.v(3740) " "Output port \"gpio0_io_out_en\" at alta_sim.v(3740) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio1_io_out_data alta_sim.v(3742) " "Output port \"gpio1_io_out_data\" at alta_sim.v(3742) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio1_io_out_en alta_sim.v(3743) " "Output port \"gpio1_io_out_en\" at alta_sim.v(3743) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio2_io_out_data alta_sim.v(3753) " "Output port \"gpio2_io_out_data\" at alta_sim.v(3753) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio2_io_out_en alta_sim.v(3754) " "Output port \"gpio2_io_out_en\" at alta_sim.v(3754) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio3_io_out_data alta_sim.v(3756) " "Output port \"gpio3_io_out_data\" at alta_sim.v(3756) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio3_io_out_en alta_sim.v(3757) " "Output port \"gpio3_io_out_en\" at alta_sim.v(3757) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio4_io_out_data alta_sim.v(3759) " "Output port \"gpio4_io_out_data\" at alta_sim.v(3759) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio4_io_out_en alta_sim.v(3760) " "Output port \"gpio4_io_out_en\" at alta_sim.v(3760) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio5_io_out_data alta_sim.v(3762) " "Output port \"gpio5_io_out_data\" at alta_sim.v(3762) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio5_io_out_en alta_sim.v(3763) " "Output port \"gpio5_io_out_en\" at alta_sim.v(3763) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio6_io_out_data alta_sim.v(3765) " "Output port \"gpio6_io_out_data\" at alta_sim.v(3765) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio6_io_out_en alta_sim.v(3766) " "Output port \"gpio6_io_out_en\" at alta_sim.v(3766) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio7_io_out_data alta_sim.v(3768) " "Output port \"gpio7_io_out_data\" at alta_sim.v(3768) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio7_io_out_en alta_sim.v(3769) " "Output port \"gpio7_io_out_en\" at alta_sim.v(3769) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio8_io_out_data alta_sim.v(3771) " "Output port \"gpio8_io_out_data\" at alta_sim.v(3771) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio8_io_out_en alta_sim.v(3772) " "Output port \"gpio8_io_out_en\" at alta_sim.v(3772) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio9_io_out_data alta_sim.v(3774) " "Output port \"gpio9_io_out_data\" at alta_sim.v(3774) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "gpio9_io_out_en alta_sim.v(3775) " "Output port \"gpio9_io_out_en\" at alta_sim.v(3775) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "swj_JTAGSTATE alta_sim.v(3780) " "Output port \"swj_JTAGSTATE\" at alta_sim.v(3780) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3780 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "swj_JTAGIR alta_sim.v(3781) " "Output port \"swj_JTAGIR\" at alta_sim.v(3781) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3781 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "dmactive alta_sim.v(3778) " "Output port \"dmactive\" at alta_sim.v(3778) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3778 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "swj_JTAGNSW alta_sim.v(3779) " "Output port \"swj_JTAGNSW\" at alta_sim.v(3779) has no driver" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3779 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Quartus II" 0 -1 1752567965873 "|test_uart|alta_rv32:rv32"} { "Info" "ISGN_QIC_SYNTHESIS_TOP_SEVERAL" "2 " "2 design partitions require synthesis" { { "Info" "ISGN_QIC_SYNTHESIS_REASON_SOURCE" "rv32 " "Partition \"rv32\" requires synthesis because its netlist type is Source File" { } { } 0 12210 "Partition \"%1!s!\" requires synthesis because its netlist type is Source File" 0 0 "Quartus II" 0 -1 1752567966031 ""} { "Info" "ISGN_QIC_SYNTHESIS_REASON_SOURCE" "Top " "Partition \"Top\" requires synthesis because its netlist type is Source File" { } { } 0 12210 "Partition \"%1!s!\" requires synthesis because its netlist type is Source File" 0 0 "Quartus II" 0 -1 1752567966031 ""} } { } 0 12206 "%1!d! design partitions require synthesis" 0 0 "Quartus II" 0 -1 1752567966031 ""} { "Info" "ISGN_QIC_NO_SYNTHESIS_TOP_ZERO" "" "No design partitions will skip synthesis in the current incremental compilation" { } { } 0 12209 "No design partitions will skip synthesis in the current incremental compilation" 0 0 "Quartus II" 0 -1 1752567966031 ""} { "Warning" "WSGN_CONNECTIVITY_WARNINGS" "2 " "2 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Quartus II" 0 -1 1752567966337 ""} { "Info" "IQSYN_PARALLEL_SYNTHESIS" "4 2 " "Using 4 processors to synthesize 2 partitions in parallel" { } { } 0 281037 "Using %1!d! processors to synthesize %2!d! partitions in parallel" 0 0 "Quartus II" 0 -1 1752567966346 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 0 1752567966707 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Full Version " "Version 13.0.0 Build 156 04/24/2013 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 0 1752567966707 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 15 16:26:06 2025 " "Processing started: Tue Jul 15 16:26:06 2025" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 0 1752567966707 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 0 1752567966707 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --parallel=1 --helper=0 --partition=Top test_uart -c test_uart " "Command: quartus_map --parallel=1 --helper=0 --partition=Top test_uart -c test_uart" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 0 1752567966707 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_WIRE" "multi_uart_ip:macro_inst\|rxd_15_ip_in " "Converted tri-state buffer \"multi_uart_ip:macro_inst\|rxd_15_ip_in\" feeding internal logic into a wire" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 23 -1 0 } } } 0 13049 "Converted tri-state buffer \"%1!s!\" feeding internal logic into a wire" 0 0 "Quartus II" 0 0 1752567967062 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Quartus II" 0 0 1752567967062 ""} { "Info" "IBAL_PROCESSED_MAX_DSP_BLOCKS_ASSIGNMENT" "0 partition Top " "Limiting DSP block usage to 0 DSP block(s) for the partition Top" { } { } 0 270000 "Limiting DSP block usage to %1!d! DSP block(s) for the %2!s!" 0 0 "Quartus II" 0 0 1752567968632 ""} { "Info" "IBAL_PROCESSED_MAX_M4K_ASSIGNMENT" "4 Top " "Limiting M4K/M9K RAM block usage to 4 M4K/M9K RAM block(s) for the Top" { } { } 0 270017 "Limiting M4K/M9K RAM block usage to %1!d! M4K/M9K RAM block(s) for the %2!s!" 0 0 "Quartus II" 0 0 1752567968645 ""} { "Info" "IBAL_PROCESSED_MAX_M4K_ASSIGNMENT" "4 Top " "Limiting M4K/M9K RAM block usage to 4 M4K/M9K RAM block(s) for the Top" { } { } 0 270017 "Limiting M4K/M9K RAM block usage to %1!d! M4K/M9K RAM block(s) for the %2!s!" 0 0 "Quartus II" 0 0 1752567968645 ""} { "Info" "IQSYN_SYNTHESIZE_TOP_PARTITION" "" "Starting Logic Optimization and Technology Mapping for Top Partition" { } { } 0 281020 "Starting Logic Optimization and Technology Mapping for Top Partition" 0 0 "Quartus II" 0 0 1752567968781 ""} { "Info" "ISCL_SCL_WYSIWYG_RESYNTHESIS" "0 balanced 0 " "Resynthesizing 0 WYSIWYG logic cells and I/Os using \"balanced\" technology mapper which leaves 0 WYSIWYG logic cells and I/Os untouched" { } { } 0 17026 "Resynthesizing %1!d! WYSIWYG logic cells and I/Os using \"%2!s!\" technology mapper which leaves %3!d! WYSIWYG logic cells and I/Os untouched" 0 0 "Quartus II" 0 0 1752567968783 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "multi_uart_ip:macro_inst\|rxd_12_ip_in gpio6_io_in\[3\] " "Converted the fan-out from the tri-state buffer \"multi_uart_ip:macro_inst\|rxd_12_ip_in\" to the node \"gpio6_io_in\[3\]\" into an OR gate" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 20 -1 0 } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Quartus II" 0 0 1752567968810 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "multi_uart_ip:macro_inst\|rxd_13_ip_in gpio6_io_in\[5\] " "Converted the fan-out from the tri-state buffer \"multi_uart_ip:macro_inst\|rxd_13_ip_in\" to the node \"gpio6_io_in\[5\]\" into an OR gate" { } { { "multi_uart_ip.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip.v" 21 -1 0 } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Quartus II" 0 0 1752567968810 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Quartus II" 0 0 1752567968810 ""} { "Info" "IMLS_MLS_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" { } { { "ahb2apb.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/ahb2apb.v" 62 -1 0 } } { "multi_uart_ip/uart_regs.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_regs.v" 10 -1 0 } } { "ahb2apb.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/ahb2apb.v" 51 -1 0 } } { "multi_uart_ip/uart_tx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_tx.v" 20 -1 0 } } { "multi_uart_ip/uart_rx.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/multi_uart_ip/uart_rx.v" 64 -1 0 } } } 0 13000 "Registers with preset signals will power-up high" 0 0 "Quartus II" 0 0 1752567968829 ""} { "Info" "IMLS_MLS_DEV_CLRN_SETS_REGISTERS" "" "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 13003 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "Quartus II" 0 0 1752567968829 ""} { "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING_ON_PARTITION" "Top " "Timing-Driven Synthesis is running on partition \"Top\"" { } { } 0 286031 "Timing-Driven Synthesis is running on partition \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567969659 ""} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "48 " "48 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Quartus II" 0 0 1752567972358 ""} { "Info" "ISCL_SCL_WANNA_REM_USR_WIRE" "" "Found the following redundant logic cells in design" { { "Info" "ISCL_SCL_CELL_NAME" "gpio3_io_in\[0\] " "Logic cell \"gpio3_io_in\[0\]\"" { } { { "test_uart.v" "gpio3_io_in\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 589 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio3_io_in\[1\] " "Logic cell \"gpio3_io_in\[1\]\"" { } { { "test_uart.v" "gpio3_io_in\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 589 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio3_io_in\[2\] " "Logic cell \"gpio3_io_in\[2\]\"" { } { { "test_uart.v" "gpio3_io_in\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 589 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio3_io_in\[3\] " "Logic cell \"gpio3_io_in\[3\]\"" { } { { "test_uart.v" "gpio3_io_in\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 589 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio3_io_in\[4\] " "Logic cell \"gpio3_io_in\[4\]\"" { } { { "test_uart.v" "gpio3_io_in\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 589 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[0\] " "Logic cell \"gpio4_io_in\[0\]\"" { } { { "test_uart.v" "gpio4_io_in\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[1\] " "Logic cell \"gpio4_io_in\[1\]\"" { } { { "test_uart.v" "gpio4_io_in\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[2\] " "Logic cell \"gpio4_io_in\[2\]\"" { } { { "test_uart.v" "gpio4_io_in\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[3\] " "Logic cell \"gpio4_io_in\[3\]\"" { } { { "test_uart.v" "gpio4_io_in\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[4\] " "Logic cell \"gpio4_io_in\[4\]\"" { } { { "test_uart.v" "gpio4_io_in\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio4_io_in\[5\] " "Logic cell \"gpio4_io_in\[5\]\"" { } { { "test_uart.v" "gpio4_io_in\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 593 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[0\] " "Logic cell \"gpio5_io_in\[0\]\"" { } { { "test_uart.v" "gpio5_io_in\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[1\] " "Logic cell \"gpio5_io_in\[1\]\"" { } { { "test_uart.v" "gpio5_io_in\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[2\] " "Logic cell \"gpio5_io_in\[2\]\"" { } { { "test_uart.v" "gpio5_io_in\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[3\] " "Logic cell \"gpio5_io_in\[3\]\"" { } { { "test_uart.v" "gpio5_io_in\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[4\] " "Logic cell \"gpio5_io_in\[4\]\"" { } { { "test_uart.v" "gpio5_io_in\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio5_io_in\[5\] " "Logic cell \"gpio5_io_in\[5\]\"" { } { { "test_uart.v" "gpio5_io_in\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 597 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_in\[6\] " "Logic cell \"gpio6_io_in\[6\]\"" { } { { "test_uart.v" "gpio6_io_in\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 609 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_in\[7\] " "Logic cell \"gpio6_io_in\[7\]\"" { } { { "test_uart.v" "gpio6_io_in\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 609 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio7_io_in\[1\] " "Logic cell \"gpio7_io_in\[1\]\"" { } { { "test_uart.v" "gpio7_io_in\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 615 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_in\[1\] " "Logic cell \"gpio9_io_in\[1\]\"" { } { { "test_uart.v" "gpio9_io_in\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 653 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[0\] " "Logic cell \"gpio1_io_out_data\[0\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[0\] " "Logic cell \"gpio1_io_out_en\[0\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[1\] " "Logic cell \"gpio1_io_out_data\[1\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[1\] " "Logic cell \"gpio1_io_out_en\[1\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[2\] " "Logic cell \"gpio1_io_out_data\[2\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[2\] " "Logic cell \"gpio1_io_out_en\[2\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[3\] " "Logic cell \"gpio1_io_out_data\[3\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[3\] " "Logic cell \"gpio1_io_out_en\[3\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[4\] " "Logic cell \"gpio1_io_out_data\[4\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[4\] " "Logic cell \"gpio1_io_out_en\[4\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[5\] " "Logic cell \"gpio1_io_out_data\[5\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[5\] " "Logic cell \"gpio1_io_out_en\[5\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[6\] " "Logic cell \"gpio1_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[6\] " "Logic cell \"gpio1_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_data\[7\] " "Logic cell \"gpio1_io_out_data\[7\]\"" { } { { "test_uart.v" "gpio1_io_out_data\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 547 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio1_io_out_en\[7\] " "Logic cell \"gpio1_io_out_en\[7\]\"" { } { { "test_uart.v" "gpio1_io_out_en\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 548 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[0\] " "Logic cell \"gpio2_io_out_data\[0\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[0\] " "Logic cell \"gpio2_io_out_en\[0\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[1\] " "Logic cell \"gpio2_io_out_data\[1\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[1\] " "Logic cell \"gpio2_io_out_en\[1\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[2\] " "Logic cell \"gpio2_io_out_data\[2\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[2\] " "Logic cell \"gpio2_io_out_en\[2\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[3\] " "Logic cell \"gpio2_io_out_data\[3\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[3\] " "Logic cell \"gpio2_io_out_en\[3\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[4\] " "Logic cell \"gpio2_io_out_data\[4\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[4\] " "Logic cell \"gpio2_io_out_en\[4\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[5\] " "Logic cell \"gpio2_io_out_data\[5\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[5\] " "Logic cell \"gpio2_io_out_en\[5\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[6\] " "Logic cell \"gpio2_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[6\] " "Logic cell \"gpio2_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_data\[7\] " "Logic cell \"gpio2_io_out_data\[7\]\"" { } { { "test_uart.v" "gpio2_io_out_data\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 567 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio2_io_out_en\[7\] " "Logic cell \"gpio2_io_out_en\[7\]\"" { } { { "test_uart.v" "gpio2_io_out_en\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 568 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_data\[0\] " "Logic cell \"gpio6_io_out_data\[0\]\"" { } { { "test_uart.v" "gpio6_io_out_data\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 599 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_en\[0\] " "Logic cell \"gpio6_io_out_en\[0\]\"" { } { { "test_uart.v" "gpio6_io_out_en\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 600 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_data\[2\] " "Logic cell \"gpio6_io_out_data\[2\]\"" { } { { "test_uart.v" "gpio6_io_out_data\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 599 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_en\[2\] " "Logic cell \"gpio6_io_out_en\[2\]\"" { } { { "test_uart.v" "gpio6_io_out_en\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 600 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_data\[4\] " "Logic cell \"gpio6_io_out_data\[4\]\"" { } { { "test_uart.v" "gpio6_io_out_data\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 599 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_en\[4\] " "Logic cell \"gpio6_io_out_en\[4\]\"" { } { { "test_uart.v" "gpio6_io_out_en\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 600 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[0\] " "Logic cell \"gpio9_io_out_data\[0\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[0\] " "Logic cell \"gpio9_io_out_en\[0\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[2\] " "Logic cell \"gpio9_io_out_data\[2\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[2\] " "Logic cell \"gpio9_io_out_en\[2\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[3\] " "Logic cell \"gpio9_io_out_data\[3\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[3\] " "Logic cell \"gpio9_io_out_en\[3\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[4\] " "Logic cell \"gpio9_io_out_data\[4\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[4\] " "Logic cell \"gpio9_io_out_en\[4\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[5\] " "Logic cell \"gpio9_io_out_data\[5\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[5\] " "Logic cell \"gpio9_io_out_en\[5\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[5\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[6\] " "Logic cell \"gpio9_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[6\] " "Logic cell \"gpio9_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[7\] " "Logic cell \"gpio9_io_out_data\[7\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[7\] " "Logic cell \"gpio9_io_out_en\[7\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "sys_resetn " "Logic cell \"sys_resetn\"" { } { { "test_uart.v" "sys_resetn" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 288 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[4\] " "Logic cell \"gpio8_io_out_data\[4\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[4\] " "Logic cell \"gpio8_io_out_en\[4\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[4\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[6\] " "Logic cell \"gpio8_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[6\] " "Logic cell \"gpio8_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio7_io_out_data\[6\] " "Logic cell \"gpio7_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio7_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 611 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[7\] " "Logic cell \"gpio8_io_out_en\[7\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[1\] " "Logic cell \"gpio8_io_out_data\[1\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[1\] " "Logic cell \"gpio8_io_out_en\[1\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[3\] " "Logic cell \"gpio8_io_out_data\[3\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[3\] " "Logic cell \"gpio8_io_out_en\[3\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[3\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "sys_ctrl_clkSource\[0\] " "Logic cell \"sys_ctrl_clkSource\[0\]\"" { } { { "test_uart.v" "sys_ctrl_clkSource\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 290 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "sys_ctrl_clkSource\[1\] " "Logic cell \"sys_ctrl_clkSource\[1\]\"" { } { { "test_uart.v" "sys_ctrl_clkSource\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 290 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_data\[6\] " "Logic cell \"gpio6_io_out_data\[6\]\"" { } { { "test_uart.v" "gpio6_io_out_data\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 599 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio6_io_out_en\[6\] " "Logic cell \"gpio6_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio6_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 600 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_data\[1\] " "Logic cell \"gpio9_io_out_data\[1\]\"" { } { { "test_uart.v" "gpio9_io_out_data\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 635 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio9_io_out_en\[1\] " "Logic cell \"gpio9_io_out_en\[1\]\"" { } { { "test_uart.v" "gpio9_io_out_en\[1\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 636 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[0\] " "Logic cell \"gpio8_io_out_data\[0\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[0\] " "Logic cell \"gpio8_io_out_en\[0\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[0\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[2\] " "Logic cell \"gpio8_io_out_data\[2\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_en\[2\] " "Logic cell \"gpio8_io_out_en\[2\]\"" { } { { "test_uart.v" "gpio8_io_out_en\[2\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 618 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio7_io_out_en\[6\] " "Logic cell \"gpio7_io_out_en\[6\]\"" { } { { "test_uart.v" "gpio7_io_out_en\[6\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 612 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "gpio8_io_out_data\[7\] " "Logic cell \"gpio8_io_out_data\[7\]\"" { } { { "test_uart.v" "gpio8_io_out_data\[7\]" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 617 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Info" "ISCL_SCL_CELL_NAME" "PLL_ENABLE " "Logic cell \"PLL_ENABLE\"" { } { { "test_uart.v" "PLL_ENABLE" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 286 -1 0 } } } 0 17048 "Logic cell \"%1!s!\"" 0 0 "Quartus II" 0 0 1752567972367 ""} } { } 0 17016 "Found the following redundant logic cells in design" 0 0 "Quartus II" 0 0 1752567972367 ""} { "Warning" "WCUT_PLL_MULT_DIV_SPECIFIED_CLOCK_NOT_CONNECTED" "altpll:pll_inst\|altpll_9g32:auto_generated\|pll1 CLK\[1\] clk1_multiply_by clk1_divide_by " "PLL \"altpll:pll_inst\|altpll_9g32:auto_generated\|pll1\" has parameters clk1_multiply_by and clk1_divide_by specified but port CLK\[1\] is not connected" { } { { "db/altpll_9g32.tdf" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/db/altpll_9g32.tdf" 30 2 0 } } { "altpll.tdf" "" { Text "c:/altera/13.0/quartus/libraries/megafunctions/altpll.tdf" 897 3 0 } } { "test_uart.v" "" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 371 0 0 } } } 0 15899 "PLL \"%1!s!\" has parameters %3!s! and %4!s! specified but port %2!s! is not connected" 0 0 "Quartus II" 0 0 1752567972545 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_START" "speed " "Starting physical synthesis optimizations for speed" { } { } 0 128000 "Starting physical synthesis optimizations for %1!s!" 0 0 "Quartus II" 0 0 1752567972568 ""} { "Info" "ISTA_USER_TDC_OPTIMIZATION_GOALS" "" "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" { } { } 0 332129 "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "Found 4 clocks " "Found 4 clocks" { { "Info" "ISTA_REPORT_CLOCKS_INFO" " Period Clock Name " " Period Clock Name" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "======== ============ " "======== ============" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 125.000 PIN_HSE " " 125.000 PIN_HSE" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 100.000 PIN_HSI " " 100.000 PIN_HSI" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 4.166 pll_inst\|auto_generated\|pll1\|clk\[0\] " " 4.166 pll_inst\|auto_generated\|pll1\|clk\[0\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 8.333 pll_inst\|auto_generated\|pll1\|clk\[3\] " " 8.333 pll_inst\|auto_generated\|pll1\|clk\[3\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 0 1752567973151 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_ALGO_START" "combinational resynthesis using boolean division " "Starting physical synthesis algorithm combinational resynthesis using boolean division" { } { } 0 128002 "Starting physical synthesis algorithm %1!s!" 0 0 "Quartus II" 0 0 1752567973219 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_ALGO_END_SLACK" "combinational resynthesis using boolean division 0 " "Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 0 ps" { } { } 0 128003 "Physical synthesis algorithm %1!s! complete: estimated slack improvement of %2!d! ps" 0 0 "Quartus II" 0 0 1752567973307 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_END" "speed 00:00:01 " "Physical synthesis optimizations for speed complete: elapsed time is 00:00:01" { } { } 0 128001 "Physical synthesis optimizations for %1!s! complete: elapsed time is %2!s!" 0 0 "Quartus II" 0 0 1752567973310 ""} { "Info" "ICUT_CUT_TM_SUMMARY" "2476 " "Implemented 2476 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "11 " "Implemented 11 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "ICUT_CUT_TM_OPINS" "30 " "Implemented 30 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "17 " "Implemented 17 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "ICUT_CUT_TM_LCELLS" "2414 " "Implemented 2414 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Implemented 1 PLLs" { } { } 0 21065 "Implemented %1!d! PLLs" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "ICUT_CUT_TM_BLACKBOX" "1 " "Implemented 1 partitions" { } { } 0 21071 "Implemented %1!d! partitions" 0 0 "Quartus II" 0 0 1752567973387 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 0 1752567973387 ""} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 6 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4692 " "Peak virtual memory: 4692 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 0 1752567973488 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 15 16:26:13 2025 " "Processing ended: Tue Jul 15 16:26:13 2025" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 0 1752567973488 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Elapsed time: 00:00:07" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 0 1752567973488 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 0 1752567973488 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 0 1752567973488 ""} { "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 1 1752567966723 ""} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Full Version " "Version 13.0.0 Build 156 04/24/2013 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 1 1752567966723 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jul 15 16:26:06 2025 " "Processing started: Tue Jul 15 16:26:06 2025" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 1 1752567966723 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 1 1752567966723 ""} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --parallel=1 --helper=1 --partition=rv32 test_uart -c test_uart " "Command: quartus_map --parallel=1 --helper=1 --partition=rv32 test_uart -c test_uart" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 1 1752567966723 ""} { "Info" "IBAL_PROCESSED_MAX_DSP_BLOCKS_ASSIGNMENT" "0 partition alta_rv32:rv32 " "Limiting DSP block usage to 0 DSP block(s) for the partition alta_rv32:rv32" { } { } 0 270000 "Limiting DSP block usage to %1!d! DSP block(s) for the %2!s!" 0 0 "Quartus II" 0 1 1752567967168 ""} { "Info" "IBAL_PROCESSED_MAX_M4K_ASSIGNMENT" "4 alta_rv32:rv32 " "Limiting M4K/M9K RAM block usage to 4 M4K/M9K RAM block(s) for the alta_rv32:rv32" { } { } 0 270017 "Limiting M4K/M9K RAM block usage to %1!d! M4K/M9K RAM block(s) for the %2!s!" 0 0 "Quartus II" 0 1 1752567967180 ""} { "Info" "IBAL_PROCESSED_MAX_M4K_ASSIGNMENT" "4 alta_rv32:rv32 " "Limiting M4K/M9K RAM block usage to 4 M4K/M9K RAM block(s) for the alta_rv32:rv32" { } { } 0 270017 "Limiting M4K/M9K RAM block usage to %1!d! M4K/M9K RAM block(s) for the %2!s!" 0 0 "Quartus II" 0 1 1752567967180 ""} { "Info" "IQSYN_SYNTHESIZE_PARTITION" "rv32 " "Starting Logic Optimization and Technology Mapping for Partition rv32" { } { { "test_uart.v" "rv32" { Text "D:/LYW/NEW_DECODE/2006_APP_s2/logic/test_uart.v" 733 0 0 } } } 0 281019 "Starting Logic Optimization and Technology Mapping for Partition %1!s!" 0 0 "Quartus II" 0 1 1752567967236 ""} { "Info" "ISCL_SCL_WYSIWYG_RESYNTHESIS" "0 balanced 0 " "Resynthesizing 0 WYSIWYG logic cells and I/Os using \"balanced\" technology mapper which leaves 0 WYSIWYG logic cells and I/Os untouched" { } { } 0 17026 "Resynthesizing %1!d! WYSIWYG logic cells and I/Os using \"%2!s!\" technology mapper which leaves %3!d! WYSIWYG logic cells and I/Os untouched" 0 0 "Quartus II" 0 1 1752567967237 ""} { "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3739 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio0_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio0_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3740 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio0_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3742 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio1_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio1_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3743 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio1_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3753 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio2_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio2_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3754 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio2_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3756 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio3_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio3_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3757 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio3_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3759 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio4_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio4_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3760 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio4_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3762 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio5_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio5_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3763 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio5_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3765 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio6_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio6_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3766 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio6_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3768 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio7_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio7_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3769 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio7_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3771 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio8_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio8_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3772 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio8_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[0\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[1\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[2\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[3\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[4\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[5\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[6\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_data\[7\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_data\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3774 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_data[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[0\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[1\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[2\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[3\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[4\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[4\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[5\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[5\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[6\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[6\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|gpio9_io_out_en\[7\] GND " "Pin \"alta_rv32:rv32\|gpio9_io_out_en\[7\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3775 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|gpio9_io_out_en[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|dmactive GND " "Pin \"alta_rv32:rv32\|dmactive\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3778 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|dmactive"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGNSW GND " "Pin \"alta_rv32:rv32\|swj_JTAGNSW\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3779 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGNSW"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGSTATE\[0\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGSTATE\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3780 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGSTATE[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGSTATE\[1\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGSTATE\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3780 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGSTATE[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGSTATE\[2\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGSTATE\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3780 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGSTATE[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGSTATE\[3\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGSTATE\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3780 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGSTATE[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGIR\[0\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGIR\[0\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3781 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGIR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGIR\[1\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGIR\[1\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3781 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGIR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGIR\[2\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGIR\[2\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3781 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGIR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "alta_rv32:rv32\|swj_JTAGIR\[3\] GND " "Pin \"alta_rv32:rv32\|swj_JTAGIR\[3\]\" is stuck at GND" { } { { "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" "" { Text "C:/Users/zzz17/.platformio/packages/tool-agrv_logic/etc/arch/rodinia/alta_sim.v" 3781 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 1 1752567967550 "|test_uart|alta_rv32:rv32|swj_JTAGIR[3]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Quartus II" 0 1 1752567967550 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_START" "speed " "Starting physical synthesis optimizations for speed" { } { } 0 128000 "Starting physical synthesis optimizations for %1!s!" 0 0 "Quartus II" 0 1 1752567967729 ""} { "Info" "ISTA_USER_TDC_OPTIMIZATION_GOALS" "" "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" { } { } 0 332129 "Detected timing requirements -- optimizing circuit to achieve only the specified requirements" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "Found 4 clocks " "Found 4 clocks" { { "Info" "ISTA_REPORT_CLOCKS_INFO" " Period Clock Name " " Period Clock Name" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" "======== ============ " "======== ============" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 125.000 PIN_HSE " " 125.000 PIN_HSE" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 100.000 PIN_HSI " " 100.000 PIN_HSI" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 4.166 pll_inst\|auto_generated\|pll1\|clk\[0\] " " 4.166 pll_inst\|auto_generated\|pll1\|clk\[0\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ISTA_REPORT_CLOCKS_INFO" " 8.333 pll_inst\|auto_generated\|pll1\|clk\[3\] " " 8.333 pll_inst\|auto_generated\|pll1\|clk\[3\]" { } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} } { } 0 332111 "%1!s!" 0 0 "Quartus II" 0 1 1752567968207 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_ALGO_START" "combinational resynthesis using boolean division " "Starting physical synthesis algorithm combinational resynthesis using boolean division" { } { } 0 128002 "Starting physical synthesis algorithm %1!s!" 0 0 "Quartus II" 0 1 1752567968220 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_ALGO_END_SLACK" "combinational resynthesis using boolean division 0 " "Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 0 ps" { } { } 0 128003 "Physical synthesis algorithm %1!s! complete: estimated slack improvement of %2!d! ps" 0 0 "Quartus II" 0 1 1752567968248 ""} { "Info" "ICSYN_PHYSICAL_SYNTHESIS_END" "speed 00:00:01 " "Physical synthesis optimizations for speed complete: elapsed time is 00:00:01" { } { } 0 128001 "Physical synthesis optimizations for %1!s! complete: elapsed time is %2!s!" 0 0 "Quartus II" 0 1 1752567968249 ""} { "Info" "ICUT_CUT_TM_SUMMARY" "520 " "Implemented 520 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "224 " "Implemented 224 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 1 1752567968295 ""} { "Info" "ICUT_CUT_TM_OPINS" "295 " "Implemented 295 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 1 1752567968295 ""} { "Info" "ICUT_CUT_TM_LCELLS" "1 " "Implemented 1 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 1 1752567968295 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 1 1752567968295 ""} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 171 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 171 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4676 " "Peak virtual memory: 4676 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 1 1752567968323 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 15 16:26:08 2025 " "Processing ended: Tue Jul 15 16:26:08 2025" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 1 1752567968323 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 1 1752567968323 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 1 1752567968323 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 1 1752567968323 ""} { "Info" "IQSYN_PARALLEL_SYNTHESIS_SUCCESS" "" "Finished parallel synthesis of all partitions" { } { } 0 281038 "Finished parallel synthesis of all partitions" 0 0 "Quartus II" 0 -1 1752567974060 ""} { "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/LYW/NEW_DECODE/2006_APP_s2/logic/quartus_logs/test_uart.map.smsg " "Generated suppressed messages file D:/LYW/NEW_DECODE/2006_APP_s2/logic/quartus_logs/test_uart.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1752567974171 ""} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 316 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 316 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4628 " "Peak virtual memory: 4628 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1752567974251 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jul 15 16:26:14 2025 " "Processing ended: Tue Jul 15 16:26:14 2025" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1752567974251 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Elapsed time: 00:00:10" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1752567974251 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:11 " "Total CPU time (on all processors): 00:00:11" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1752567974251 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1752567974251 ""}