gd32f10x_it.h 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111
  1. /*!
  2. \file gd32f10x_it.h
  3. \brief the header file of the ISR
  4. \version 2015-11-16, V1.0.0, demo for GD32F10x
  5. \version 2017-06-30, V2.0.0, demo for GD32F10x
  6. \version 2021-04-30, V2.1.0, demo for GD32F10x
  7. */
  8. /*
  9. Copyright (c) 2021, GigaDevice Semiconductor Inc.
  10. Redistribution and use in source and binary forms, with or without modification,
  11. are permitted provided that the following conditions are met:
  12. 1. Redistributions of source code must retain the above copyright notice, this
  13. list of conditions and the following disclaimer.
  14. 2. Redistributions in binary form must reproduce the above copyright notice,
  15. this list of conditions and the following disclaimer in the documentation
  16. and/or other materials provided with the distribution.
  17. 3. Neither the name of the copyright holder nor the names of its contributors
  18. may be used to endorse or promote products derived from this software without
  19. specific prior written permission.
  20. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  22. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  24. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  26. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  29. OF SUCH DAMAGE.
  30. */
  31. #ifndef GD32F10X_IT_H
  32. #define GD32F10X_IT_H
  33. #include "gd32f10x.h"
  34. /* function declarations */
  35. /* this function handles NMI exception */
  36. void NMI_Handler(void);
  37. /* this function handles HardFault exception */
  38. void HardFault_Handler(void);
  39. /* this function handles MemManage exception */
  40. void MemManage_Handler(void);
  41. /* this function handles BusFault exception */
  42. void BusFault_Handler(void);
  43. /* this function handles UsageFault exception */
  44. void UsageFault_Handler(void);
  45. /* this function handles SVC exception */
  46. void SVC_Handler(void);
  47. /* this function handles DebugMon exception */
  48. void DebugMon_Handler(void);
  49. /* this function handles PendSV exception */
  50. void PendSV_Handler(void);
  51. /* this function handles SysTick exception */
  52. void SysTick_Handler(void);
  53. extern uint32_t Get_SysTick(void);
  54. //IO口操作宏定义
  55. #define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
  56. #define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
  57. #define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
  58. //IO口地址映射
  59. #define GPIOA_ODR_Addr (GPIOA+12) //0x4001080C
  60. #define GPIOB_ODR_Addr (GPIOB+12) //0x40010C0C
  61. #define GPIOC_ODR_Addr (GPIOC+12) //0x4001100C
  62. #define GPIOD_ODR_Addr (GPIOD+12) //0x4001140C
  63. #define GPIOE_ODR_Addr (GPIOE+12) //0x4001180C
  64. #define GPIOF_ODR_Addr (GPIOF+12) //0x40011A0C
  65. #define GPIOG_ODR_Addr (GPIOG+12) //0x40011E0C
  66. #define GPIOA_IDR_Addr (GPIOA+8) //0x40010808
  67. #define GPIOB_IDR_Addr (GPIOB+8) //0x40010C08
  68. #define GPIOC_IDR_Addr (GPIOC+8) //0x40011008
  69. #define GPIOD_IDR_Addr (GPIOD+8) //0x40011408
  70. #define GPIOE_IDR_Addr (GPIOE+8) //0x40011808
  71. #define GPIOF_IDR_Addr (GPIOF+8) //0x40011A08
  72. #define GPIOG_IDR_Addr (GPIOG+8) //0x40011E08
  73. //IO口操作,只对单一的IO口
  74. //确保N的值小于16!
  75. #define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //ê?3?
  76. #define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //ê?è?
  77. #define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //ê?3?
  78. #define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //ê?è?
  79. #define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //ê?3?
  80. #define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //ê?è?
  81. #define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //ê?3?
  82. #define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //ê?è?
  83. #define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //ê?3?
  84. #define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //ê?è?
  85. #define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //ê?3?
  86. #define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //ê?è?
  87. #define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //ê?3?
  88. #define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //ê?è?
  89. #endif /* GD32F10X_IT_H */