[setup]
boards_dir = boards
board = agrv2k_407
board_logic.ve = PT_0104.ve

#ips_dir = ../ips
ip_name = PT_0104_fpga
logic_dir = logic
; logic_ve = top.ve
board_logic.asf = myboard.asf

framework = agrv_sdk
program = PT_0104_MCU_01042002

src_dir = src
include_dir = src
src_filter = "-<*> +<*.c>"

lwip_imp_dir =
tinyusb_imp_dir =
#lwip_param = freertos
#tinyusb_param =

#board_build.boot_addr = upload
#board_build.boot_mode = sram
#board_upload.address = 0x20000000
#board_upload.logic_address = 0x80020000
#board_logic.device = AGRV2KL100
#board_logic.ve = my_board.ve
board_upload.address = 0x80010000
board_build.boot_addr = 0x80010000

#board_build.boot_mode = flash_sram

board_logic.compress = true
build_unflags = -O2
build_flags = -Os
            -DLOGGER_BAUD_RATE=${setup.monitor_speed}
            -DAGRV_FP_STACK=0
            -DDFU_FPGA_CONFIG=\"PT_0104.inc\"

build_src_flags = -Wno-cast-align


logger_if = UART0
#upload_port = /dev/ttyUSB0
#monitor_port = /dev/ttyUSB0
upload_port = COM3
monitor_port = COM3
monitor_speed = 57600
debug_speed = 10000

#debug_tools = cmsis-dap-openocd
#upload_protocols = cmsis-dap-openocd
#debug_tool = cmsis-dap-openocd
#upload_protocol = cmsis-dap-openocd
debug_tool = jlink-openocd
upload_protocol = jlink-openocd

#build_flags =
#build_src_flags =

#check_tool = cppcheck, clangtidy, pvs-studio
#check_device = false
#check_logic = 2

[setup_rtt]
logger_if = RTT
monitor_port = socket://localhost:19021


[platformio]
boards_dir = ${setup.boards_dir}
src_dir = ${setup.src_dir}
include_dir = ${setup.include_dir}
default_envs = dev
#board_upload.address = 0x80010000

[env]
platform = AgRV
extends = setup

[env:dev]
build_type = debug
board_upload.address = 0x80010000

[env:release]
build_type = release
board_upload.address = 0x80010000
; board_upload.logic_address = 0x80060000

[env:rtt]
build_type = debug
extends = setup_rtt

[env:serial]
build_type = release
board_upload.address = 0x80010000
upload_protocol = serial
upload_speed = 460800
custom_speed = 115200